Re: [PATCH] drm/msm: fix the `CRASHDUMP_READ` target of `a6xx_get_shader_block()`
On Sat, 30 Mar 2024 at 04:39, Abhinav Kumar wrote:
>
>
>
> On 3/26/2024 2:23 PM, Miguel Ojeda wrote:
> > Clang 14 in an (essentially) defconfig arm64 build for next-20240326
> > reports [1]:
> >
> > drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:843:6: error:
> > variable 'out' set but not used [-Werror,-Wunused-but-set-variable]
> >
> > The variable `out` in these functions is meant to compute the `target` of
> > `CRASHDUMP_READ()`, but in this case only the initial value (`dumper->iova
> > + A6XX_CD_DATA_OFFSET`) was being passed.
> >
> > Thus use `out` as it was intended by Connor [2].
> >
> > There was an alternative patch at [3] that removed the variable
> > altogether, but that would only use the initial value.
> >
> > Fixes: 64d6255650d4 ("drm/msm: More fully implement devcoredump for a7xx")
> > Closes:
> > https://lore.kernel.org/lkml/caniq72mjc5t4n25sqvysroehxxpxypz4ppznesjhenc3qap...@mail.gmail.com/
> > [1]
> > Link:
> > https://lore.kernel.org/lkml/cacu1e7hhckmjd6fixzspinaz6ekoznkmthtclfvmbz-9vol...@mail.gmail.com/
> > [2]
> > Link:
> > https://lore.kernel.org/lkml/20240307093727.1978126-1-colin.i.k...@gmail.com/
> > [3]
> > Signed-off-by: Miguel Ojeda
> > ---
>
>
> LGTM,
>
> Reviewed-by: Abhinav Kumar
I'm seeing this on my drm-next tree, where is this fix landing?
Dave.
Re: [PATCH] phy: qcom: qmp-combo: Fix register base for QSERDES_DP_PHY_MODE
On Fri, 5 Apr 2024 at 03:01, Stephen Boyd wrote:
>
> The register base that was used to write to the QSERDES_DP_PHY_MODE
> register was 'dp_dp_phy' before commit 815891eee668 ("phy:
> qcom-qmp-combo: Introduce orientation variable"). There isn't any
> explanation in the commit why this is changed, so I suspect it was an
> oversight or happened while being extracted from some other series.
> Oddly the value being 0x4c or 0x5c doesn't seem to matter for me, so I
> suspect this is dead code, but that can be fixed in another patch. It's
> not good to write to the wrong register space, and maybe some other
> version of this phy relies on this.
>
> Cc: Douglas Anderson
> Cc: Abhinav Kumar
> Cc: Dmitry Baryshkov
> Cc: Neil Armstrong
> Cc: Abel Vesa
> Cc: Steev Klimaszewski
> Cc: Johan Hovold
> Cc: Bjorn Andersson
> Fixes: 815891eee668 ("phy: qcom-qmp-combo: Introduce orientation variable")
> Signed-off-by: Stephen Boyd
> ---
> drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
Reviewed-by: Dmitry Baryshkov
--
With best wishes
Dmitry
Re: [PATCH] phy: qcom: qmp-combo: Fix VCO div offset on v3
On Fri, 5 Apr 2024 at 02:43, Stephen Boyd wrote:
>
> Commit ec17373aebd0 ("phy: qcom: qmp-combo: extract common function to
> setup clocks") changed the offset that is used to write to
> DP_PHY_VCO_DIV from QSERDES_V3_DP_PHY_VCO_DIV to
> QSERDES_V4_DP_PHY_VCO_DIV. Unfortunately, this offset is different
> between v3 and v4 phys:
>
> #define QSERDES_V3_DP_PHY_VCO_DIV 0x064
> #define QSERDES_V4_DP_PHY_VCO_DIV 0x070
>
> meaning that we write the wrong register on v3 phys now. Add another
> generic register to 'regs' and use it here instead of a version specific
> define to fix this.
>
> This was discovered after Abhinav looked over register dumps with me
> from sc7180 Trogdor devices that started failing to light up the
> external display with v6.6 based kernels. It turns out that some
> monitors are very specific about their link clk frequency and if the
> default power on reset value is still there the monitor will show a
> blank screen or a garbled display. Other monitors are perfectly happy to
> get a bad clock signal.
>
> Cc: Douglas Anderson
> Cc: Abhinav Kumar
> Cc: Dmitry Baryshkov
> Fixes: ec17373aebd0 ("phy: qcom: qmp-combo: extract common function to setup
> clocks")
> Signed-off-by: Stephen Boyd
> ---
> drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 6 +-
> 1 file changed, 5 insertions(+), 1 deletion(-)
Reviewed-by: Dmitry Baryshkov
--
With best wishes
Dmitry
Re: [PATCH] phy: qcom: qmp-combo: Fix register base for QSERDES_DP_PHY_MODE
On Thu, Apr 04, 2024 at 05:01:03PM -0700, Stephen Boyd wrote:
> The register base that was used to write to the QSERDES_DP_PHY_MODE
> register was 'dp_dp_phy' before commit 815891eee668 ("phy:
> qcom-qmp-combo: Introduce orientation variable"). There isn't any
> explanation in the commit why this is changed, so I suspect it was an
> oversight or happened while being extracted from some other series.
Thanks for catching that, I wrote that patch long before Johan did the
rename of "pcs" to "dp_dp_phy", and must have missed that while later
rebasing the patch.
Reviewed-by: Bjorn Andersson
Regards,
Bjorn
> Oddly the value being 0x4c or 0x5c doesn't seem to matter for me, so I
> suspect this is dead code, but that can be fixed in another patch. It's
> not good to write to the wrong register space, and maybe some other
> version of this phy relies on this.
>
> Cc: Douglas Anderson
> Cc: Abhinav Kumar
> Cc: Dmitry Baryshkov
> Cc: Neil Armstrong
> Cc: Abel Vesa
> Cc: Steev Klimaszewski
> Cc: Johan Hovold
> Cc: Bjorn Andersson
> Fixes: 815891eee668 ("phy: qcom-qmp-combo: Introduce orientation variable")
> Signed-off-by: Stephen Boyd
> ---
> drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
> b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
> index 7d585a4a..746d009d702b 100644
> --- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
> +++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
> @@ -2150,9 +2150,9 @@ static bool qmp_combo_configure_dp_mode(struct
> qmp_combo *qmp)
> writel(val, qmp->dp_dp_phy + QSERDES_DP_PHY_PD_CTL);
>
> if (reverse)
> - writel(0x4c, qmp->pcs + QSERDES_DP_PHY_MODE);
> + writel(0x4c, qmp->dp_dp_phy + QSERDES_DP_PHY_MODE);
> else
> - writel(0x5c, qmp->pcs + QSERDES_DP_PHY_MODE);
> + writel(0x5c, qmp->dp_dp_phy + QSERDES_DP_PHY_MODE);
>
> return reverse;
> }
>
> base-commit: 4cece764965020c22cff7665b18a012006359095
> --
> https://chromeos.dev
>
Re: [PATCH] phy: qcom: qmp-combo: Fix register base for QSERDES_DP_PHY_MODE
On 4/4/2024 5:01 PM, Stephen Boyd wrote:
The register base that was used to write to the QSERDES_DP_PHY_MODE
register was 'dp_dp_phy' before commit 815891eee668 ("phy:
qcom-qmp-combo: Introduce orientation variable"). There isn't any
explanation in the commit why this is changed, so I suspect it was an
oversight or happened while being extracted from some other series.
Oddly the value being 0x4c or 0x5c doesn't seem to matter for me, so I
suspect this is dead code, but that can be fixed in another patch. It's
not good to write to the wrong register space, and maybe some other
version of this phy relies on this.
Cc: Douglas Anderson
Cc: Abhinav Kumar
Cc: Dmitry Baryshkov
Cc: Neil Armstrong
Cc: Abel Vesa
Cc: Steev Klimaszewski
Cc: Johan Hovold
Cc: Bjorn Andersson
Fixes: 815891eee668 ("phy: qcom-qmp-combo: Introduce orientation variable")
Signed-off-by: Stephen Boyd
---
drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
Yes I dont know why the commit 815891eee668 ("phy:
qcom-qmp-combo: Introduce orientation variable") changed the base in
below code. Certainly looks like a bug to me because we should be
writing to DP_PHY_MODE which is at an offset 0x1c from the dp_phy base.
Hence, this LGTM,
Reviewed-by: Abhinav Kumar
Re: [PATCH] phy: qcom: qmp-combo: Fix VCO div offset on v3
On 4/4/2024 4:43 PM, Stephen Boyd wrote:
Commit ec17373aebd0 ("phy: qcom: qmp-combo: extract common function to
setup clocks") changed the offset that is used to write to
DP_PHY_VCO_DIV from QSERDES_V3_DP_PHY_VCO_DIV to
QSERDES_V4_DP_PHY_VCO_DIV. Unfortunately, this offset is different
between v3 and v4 phys:
#define QSERDES_V3_DP_PHY_VCO_DIV 0x064
#define QSERDES_V4_DP_PHY_VCO_DIV 0x070
meaning that we write the wrong register on v3 phys now. Add another
generic register to 'regs' and use it here instead of a version specific
define to fix this.
This was discovered after Abhinav looked over register dumps with me
from sc7180 Trogdor devices that started failing to light up the
external display with v6.6 based kernels. It turns out that some
monitors are very specific about their link clk frequency and if the
default power on reset value is still there the monitor will show a
blank screen or a garbled display. Other monitors are perfectly happy to
get a bad clock signal.
Cc: Douglas Anderson
Cc: Abhinav Kumar
Cc: Dmitry Baryshkov
Fixes: ec17373aebd0 ("phy: qcom: qmp-combo: extract common function to setup
clocks")
Signed-off-by: Stephen Boyd
---
drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
I cross-checked the foll chipsets which use qmp_v3_usb3phy_regs_layout:
-> sdm845
-> sc7180
-> sm6350
All of them have VCO_DIV at offset 0x64.
And, I cross-checked the foll chipsets which use
qmp_v45_usb3phy_regs_layout:
-> sc8180x
-> x1e80100
-> sm8250
-> sm8350
All of them have VCO_DIV at offset 0x70.
Now, thing look in order to me.
Hence,
Reviewed-by: Abhinav Kumar
[PATCH] phy: qcom: qmp-combo: Fix register base for QSERDES_DP_PHY_MODE
The register base that was used to write to the QSERDES_DP_PHY_MODE
register was 'dp_dp_phy' before commit 815891eee668 ("phy:
qcom-qmp-combo: Introduce orientation variable"). There isn't any
explanation in the commit why this is changed, so I suspect it was an
oversight or happened while being extracted from some other series.
Oddly the value being 0x4c or 0x5c doesn't seem to matter for me, so I
suspect this is dead code, but that can be fixed in another patch. It's
not good to write to the wrong register space, and maybe some other
version of this phy relies on this.
Cc: Douglas Anderson
Cc: Abhinav Kumar
Cc: Dmitry Baryshkov
Cc: Neil Armstrong
Cc: Abel Vesa
Cc: Steev Klimaszewski
Cc: Johan Hovold
Cc: Bjorn Andersson
Fixes: 815891eee668 ("phy: qcom-qmp-combo: Introduce orientation variable")
Signed-off-by: Stephen Boyd
---
drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
index 7d585a4a..746d009d702b 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
@@ -2150,9 +2150,9 @@ static bool qmp_combo_configure_dp_mode(struct qmp_combo
*qmp)
writel(val, qmp->dp_dp_phy + QSERDES_DP_PHY_PD_CTL);
if (reverse)
- writel(0x4c, qmp->pcs + QSERDES_DP_PHY_MODE);
+ writel(0x4c, qmp->dp_dp_phy + QSERDES_DP_PHY_MODE);
else
- writel(0x5c, qmp->pcs + QSERDES_DP_PHY_MODE);
+ writel(0x5c, qmp->dp_dp_phy + QSERDES_DP_PHY_MODE);
return reverse;
}
base-commit: 4cece764965020c22cff7665b18a012006359095
--
https://chromeos.dev
[PATCH] phy: qcom: qmp-combo: Fix VCO div offset on v3
Commit ec17373aebd0 ("phy: qcom: qmp-combo: extract common function to
setup clocks") changed the offset that is used to write to
DP_PHY_VCO_DIV from QSERDES_V3_DP_PHY_VCO_DIV to
QSERDES_V4_DP_PHY_VCO_DIV. Unfortunately, this offset is different
between v3 and v4 phys:
#define QSERDES_V3_DP_PHY_VCO_DIV 0x064
#define QSERDES_V4_DP_PHY_VCO_DIV 0x070
meaning that we write the wrong register on v3 phys now. Add another
generic register to 'regs' and use it here instead of a version specific
define to fix this.
This was discovered after Abhinav looked over register dumps with me
from sc7180 Trogdor devices that started failing to light up the
external display with v6.6 based kernels. It turns out that some
monitors are very specific about their link clk frequency and if the
default power on reset value is still there the monitor will show a
blank screen or a garbled display. Other monitors are perfectly happy to
get a bad clock signal.
Cc: Douglas Anderson
Cc: Abhinav Kumar
Cc: Dmitry Baryshkov
Fixes: ec17373aebd0 ("phy: qcom: qmp-combo: extract common function to setup
clocks")
Signed-off-by: Stephen Boyd
---
drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
index 7d585a4a..3b19d8ebf467 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
@@ -77,6 +77,7 @@ enum qphy_reg_layout {
QPHY_COM_BIAS_EN_CLKBUFLR_EN,
QPHY_DP_PHY_STATUS,
+ QPHY_DP_PHY_VCO_DIV,
QPHY_TX_TX_POL_INV,
QPHY_TX_TX_DRV_LVL,
@@ -102,6 +103,7 @@ static const unsigned int
qmp_v3_usb3phy_regs_layout[QPHY_LAYOUT_SIZE] = {
[QPHY_COM_BIAS_EN_CLKBUFLR_EN] = QSERDES_V3_COM_BIAS_EN_CLKBUFLR_EN,
[QPHY_DP_PHY_STATUS]= QSERDES_V3_DP_PHY_STATUS,
+ [QPHY_DP_PHY_VCO_DIV] = QSERDES_V3_DP_PHY_VCO_DIV,
[QPHY_TX_TX_POL_INV]= QSERDES_V3_TX_TX_POL_INV,
[QPHY_TX_TX_DRV_LVL]= QSERDES_V3_TX_TX_DRV_LVL,
@@ -126,6 +128,7 @@ static const unsigned int
qmp_v45_usb3phy_regs_layout[QPHY_LAYOUT_SIZE] = {
[QPHY_COM_BIAS_EN_CLKBUFLR_EN] = QSERDES_V4_COM_BIAS_EN_CLKBUFLR_EN,
[QPHY_DP_PHY_STATUS]= QSERDES_V4_DP_PHY_STATUS,
+ [QPHY_DP_PHY_VCO_DIV] = QSERDES_V4_DP_PHY_VCO_DIV,
[QPHY_TX_TX_POL_INV]= QSERDES_V4_TX_TX_POL_INV,
[QPHY_TX_TX_DRV_LVL]= QSERDES_V4_TX_TX_DRV_LVL,
@@ -2162,6 +2165,7 @@ static int qmp_combo_configure_dp_clocks(struct qmp_combo
*qmp)
const struct phy_configure_opts_dp *dp_opts = >dp_opts;
u32 phy_vco_div;
unsigned long pixel_freq;
+ const struct qmp_phy_cfg *cfg = qmp->cfg;
switch (dp_opts->link_rate) {
case 1620:
@@ -2184,7 +2188,7 @@ static int qmp_combo_configure_dp_clocks(struct qmp_combo
*qmp)
/* Other link rates aren't supported */
return -EINVAL;
}
- writel(phy_vco_div, qmp->dp_dp_phy + QSERDES_V4_DP_PHY_VCO_DIV);
+ writel(phy_vco_div, qmp->dp_dp_phy + cfg->regs[QPHY_DP_PHY_VCO_DIV]);
clk_set_rate(qmp->dp_link_hw.clk, dp_opts->link_rate * 10);
clk_set_rate(qmp->dp_pixel_hw.clk, pixel_freq);
base-commit: 4cece764965020c22cff7665b18a012006359095
--
https://chromeos.dev
Re: (subset) [PATCH v3 0/4] arm64: dts: fix several display-related schema warnings
On Tue, 02 Apr 2024 05:57:14 +0300, Dmitry Baryshkov wrote: > Fix several warnings produced by the display nodes. > > Please excuse me for the spam for sending v3 soon after v2. > > Applied, thanks! [2/4] arm64: dts: qcom: sc8180x: drop legacy property #stream-id-cells commit: 7fb5680b589d5eae64ada1d917b6ff2dab82f5ae [3/4] arm64: dts: qcom: sc8180x: Drop flags for mdss irqs commit: 580701ec27f61e0996dd5fcd23b091b6bf6933e3 [4/4] arm64: dts: qcom: sc8180x: add dp_p1 register blocks to DP nodes commit: 1106ea2266d11ebd97c3493a0c36a45272bfb67a Best regards, -- Bjorn Andersson
[linux-next:master] BUILD REGRESSION 2b3d5988ae2cb5cd945ddbc653f0a71706231fdd
tree/branch:
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
branch HEAD: 2b3d5988ae2cb5cd945ddbc653f0a71706231fdd Add linux-next specific
files for 20240404
Error/Warning reports:
https://lore.kernel.org/oe-kbuild-all/202404041707.4bl4ifti-...@intel.com
https://lore.kernel.org/oe-kbuild-all/202404041832.tmsatkyb-...@intel.com
https://lore.kernel.org/oe-kbuild-all/202404042206.mjaqc32x-...@intel.com
https://lore.kernel.org/oe-kbuild-all/202404042327.jrpt81kp-...@intel.com
Error/Warning: (recently discovered and may have been fixed)
ERROR: modpost: "__aeabi_d2ulz" [drivers/gpu/drm/amd/amdgpu/amdgpu.ko]
undefined!
ERROR: modpost: "__aeabi_l2d" [drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined!
drivers/input/serio/parkbd.c:168:10: error: '__section__' attribute only
applies to functions, global variables, Objective-C methods, and Objective-C
properties
drivers/input/serio/parkbd.c:168:10: error: 'section' attribute only applies to
functions, global variables, Objective-C methods, and Objective-C properties
drivers/input/serio/parkbd.c:168:10: error: non-extern declaration of
'__pcpu_unique__alloc_tag_cntr' follows extern declaration
drivers/input/serio/ps2-gpio.c:408:10: error: '__section__' attribute only
applies to functions, global variables, Objective-C methods, and Objective-C
properties
drivers/input/serio/ps2-gpio.c:408:10: error: 'section' attribute only applies
to functions, global variables, Objective-C methods, and Objective-C properties
drivers/input/serio/ps2-gpio.c:408:10: error: non-extern declaration of
'__pcpu_unique__alloc_tag_cntr' follows extern declaration
drivers/input/serio/ps2mult.c:130:10: error: '__section__' attribute only
applies to functions, global variables, Objective-C methods, and Objective-C
properties
drivers/input/serio/ps2mult.c:130:10: error: 'section' attribute only applies
to functions, global variables, Objective-C methods, and Objective-C properties
drivers/input/serio/ps2mult.c:130:10: error: non-extern declaration of
'__pcpu_unique__alloc_tag_cntr' follows extern declaration
drivers/input/serio/serio_raw.c:95:11: error: '__section__' attribute only
applies to functions, global variables, Objective-C methods, and Objective-C
properties
drivers/input/serio/serio_raw.c:95:11: error: 'section' attribute only applies
to functions, global variables, Objective-C methods, and Objective-C properties
drivers/input/serio/serio_raw.c:95:11: error: non-extern declaration of
'__pcpu_unique__alloc_tag_cntr' follows extern declaration
include/linux/mempool.h:105:9: error: '__section__' attribute only applies to
functions, global variables, Objective-C methods, and Objective-C properties
include/linux/mempool.h:105:9: error: 'section' attribute only applies to
functions, global variables, Objective-C methods, and Objective-C properties
include/linux/mempool.h:105:9: error: non-extern declaration of
'__pcpu_unique__alloc_tag_cntr' follows extern declaration
include/linux/mempool.h:105:9: error: non-extern declaration of
'_alloc_tag_cntr' follows extern declaration
include/linux/mempool.h:105:9: error: weak declaration cannot have internal
linkage
ld.lld: error: undefined symbol: i2c_root_adapter
powerpc64-linux-ld: warning: orphan section `.bss..Lubsan_data249' from
`kernel/ptrace.o' being placed in section `.bss..Lubsan_data249'
Unverified Error/Warning (likely false positive, please contact us if
interested):
include/linux/mm_types.h:1175:17: error: '__section__' attribute only applies
to functions, global variables, Objective-C methods, and Objective-C properties
include/linux/mm_types.h:1175:17: error: 'section' attribute only applies to
functions, global variables, Objective-C methods, and Objective-C properties
include/linux/mm_types.h:1175:17: error: non-extern declaration of
'__pcpu_unique__alloc_tag_cntr' follows extern declaration
include/linux/mm_types.h:1175:17: error: non-extern declaration of
'_alloc_tag_cntr' follows extern declaration
include/linux/mm_types.h:1175:17: error: weak declaration cannot have internal
linkage
{standard input}:722: Warning: overflow in branch to .L153; converted into
longer instruction sequence
{standard input}:733: Warning: overflow in branch to .L155; converted into
longer instruction sequence
Error/Warning ids grouped by kconfigs:
gcc_recent_errors
|-- alpha-allnoconfig
| |--
mm-mempool.c:warning:Function-parameter-or-struct-member-gfp_mask-not-described-in-mempool_create_node
| `--
mm-mempool.c:warning:Function-parameter-or-struct-member-node_id-not-described-in-mempool_create_node
|-- alpha-allyesconfig
| |--
drivers-gpu-drm-imx-ipuv3-imx-ldb.c:error:_sel-directive-output-may-be-truncated-writing-bytes-into-a-region-of-size-between-and
| |--
drivers-gpu-drm-nouveau-nouveau_backlight.c:error:d-directive-output-may-be-truncated-writing-between-and-bytes-into-a-region-of-size
| |--
mm-mempool.c:warning:Function-parameter-or-st
