Re: [gem5-dev] Review Request 3686: misc: use a simple_initiator_socket to implement the SystemC TLM Slave Port

[Andreas Hansson]

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Ship it!


Ship It!

- Andreas Hansson


On Oct. 28, 2016, 4:55 p.m., Christian Menard wrote:
> 
> ---
> This is an automatically generated e-mail. To reply, visit:
> http://reviews.gem5.org/r/3686/
> ---
> 
> (Updated Oct. 28, 2016, 4:55 p.m.)
> 
> 
> Review request for Default.
> 
> 
> Repository: gem5
> 
> 
> Description
> ---
> 
> Changeset 11691:9733d3adf993
> ---
> misc: use a simple_initiator_socket to implement the SystemC TLM Slave Port
> 
> 
> Diffs
> -
> 
>   util/tlm/sc_slave_port.hh PRE-CREATION 
>   util/tlm/sc_slave_port.cc PRE-CREATION 
> 
> Diff: http://reviews.gem5.org/r/3686/diff/
> 
> 
> Testing
> ---
> 
> Example applications are still running.
> 
> 
> Thanks,
> 
> Christian Menard
> 
>

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Re: [gem5-dev] Review Request 3711: ruby: Detect garnet network-level deadlock.

[Andreas Hansson]

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src/mem/ruby/network/garnet2.0/GarnetNetwork.py (line 49)


what is the unit?

if it is time we should not use Uint



src/mem/ruby/network/garnet2.0/GarnetNetwork.py (line 62)


what is the unit?



src/mem/ruby/network/garnet2.0/NetworkInterface.cc (line 73)


just do it in the initialisation list



src/mem/ruby/network/garnet2.0/NetworkInterface.cc (line 326)


this should not be a panic, perhaps a fatal?



src/mem/ruby/network/garnet2.0/NetworkInterface.cc (line 328)


seems the arguments are wrong?

curTick should also be llu if I remember correctly


- Andreas Hansson


On Nov. 17, 2016, 6:37 p.m., Jieming Yin wrote:
> 
> ---
> This is an automatically generated e-mail. To reply, visit:
> http://reviews.gem5.org/r/3711/
> ---
> 
> (Updated Nov. 17, 2016, 6:37 p.m.)
> 
> 
> Review request for Default.
> 
> 
> Repository: gem5
> 
> 
> Description
> ---
> 
> Changeset 11706:527f77b1d6df
> ---
> ruby: Detect garnet network-level deadlock.
> 
> This patch detects garnet network deadlock by monitoring
> network interfaces. If a network interface continuously
> fails to allocate virtual channels for a message, a
> possible deadlock is detected.
> 
> 
> Diffs
> -
> 
>   configs/network/Network.py c38fcdaa5fe508dbb18cc084e758ad0ce8e2e2f4 
>   src/mem/ruby/network/garnet2.0/GarnetNetwork.py 
> c38fcdaa5fe508dbb18cc084e758ad0ce8e2e2f4 
>   src/mem/ruby/network/garnet2.0/NetworkInterface.hh 
> c38fcdaa5fe508dbb18cc084e758ad0ce8e2e2f4 
>   src/mem/ruby/network/garnet2.0/NetworkInterface.cc 
> c38fcdaa5fe508dbb18cc084e758ad0ce8e2e2f4 
> 
> Diff: http://reviews.gem5.org/r/3711/diff/
> 
> 
> Testing
> ---
> 
> 
> Thanks,
> 
> Jieming Yin
> 
>

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Re: [gem5-dev] Review Request 3721: x86: fix issue with casting in Cvtf2i

[Alexandru Dutu]

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Ship it!


Ship It!

- Alexandru Dutu


On Nov. 17, 2016, 8:54 p.m., Tony Gutierrez wrote:
> 
> ---
> This is an automatically generated e-mail. To reply, visit:
> http://reviews.gem5.org/r/3721/
> ---
> 
> (Updated Nov. 17, 2016, 8:54 p.m.)
> 
> 
> Review request for Default.
> 
> 
> Repository: gem5
> 
> 
> Description
> ---
> 
> Changeset 11892:35849c921444
> ---
> x86: fix issue with casting in Cvtf2i
> 
> UBSAN flags this operation because it detects that arg is being cast directly
> to an unsigned type, argBits. this patch fixes this by first casting the
> value to a signed int type, then reintrepreting the raw bits of the signed
> int into argBits.
> 
> 
> Diffs
> -
> 
>   src/arch/x86/isa/microops/mediaop.isa 
> c38fcdaa5fe508dbb18cc084e758ad0ce8e2e2f4 
> 
> Diff: http://reviews.gem5.org/r/3721/diff/
> 
> 
> Testing
> ---
> 
> 
> Thanks,
> 
> Tony Gutierrez
> 
>

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Re: [gem5-dev] Review Request 3709: ruby: Fix potential bugs in garnet2.0

[Joe Gross]

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Ship it!


Ship It!

- Joe Gross


On Nov. 17, 2016, 12:39 a.m., Jieming Yin wrote:
> 
> ---
> This is an automatically generated e-mail. To reply, visit:
> http://reviews.gem5.org/r/3709/
> ---
> 
> (Updated Nov. 17, 2016, 12:39 a.m.)
> 
> 
> Review request for Default.
> 
> 
> Repository: gem5
> 
> 
> Description
> ---
> 
> Changeset 11705:44fd1b68b23a
> ---
> ruby: Fix potential bugs in garnet2.0
> 
> 1. Delete unused variable from struct LinkEntry
> 2. Correct GarnetExtLink and GarnetIntLink inheritance
> 
> 
> Diffs
> -
> 
>   src/mem/ruby/network/Topology.hh c38fcdaa5fe508dbb18cc084e758ad0ce8e2e2f4 
>   src/mem/ruby/network/garnet2.0/GarnetLink.hh 
> c38fcdaa5fe508dbb18cc084e758ad0ce8e2e2f4 
>   src/mem/ruby/network/garnet2.0/GarnetLink.cc 
> c38fcdaa5fe508dbb18cc084e758ad0ce8e2e2f4 
> 
> Diff: http://reviews.gem5.org/r/3709/diff/
> 
> 
> Testing
> ---
> 
> not yet
> 
> 
> Thanks,
> 
> Jieming Yin
> 
>

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[gem5-dev] Review Request 3721: x86: fix issue with casting in Cvtf2i

[Tony Gutierrez]

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---

Review request for Default.


Repository: gem5


Description
---

Changeset 11892:35849c921444
---
x86: fix issue with casting in Cvtf2i

UBSAN flags this operation because it detects that arg is being cast directly
to an unsigned type, argBits. this patch fixes this by first casting the
value to a signed int type, then reintrepreting the raw bits of the signed
int into argBits.


Diffs
-

  src/arch/x86/isa/microops/mediaop.isa 
c38fcdaa5fe508dbb18cc084e758ad0ce8e2e2f4 

Diff: http://reviews.gem5.org/r/3721/diff/


Testing
---


Thanks,

Tony Gutierrez

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Re: [gem5-dev] Review Request 3715: hsail: add popcount type and generate popcount instructions

[Tony Gutierrez]

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Ship it!


Ship It!

- Tony Gutierrez


On Nov. 17, 2016, 12:28 p.m., Brandon Potter wrote:
> 
> ---
> This is an automatically generated e-mail. To reply, visit:
> http://reviews.gem5.org/r/3715/
> ---
> 
> (Updated Nov. 17, 2016, 12:28 p.m.)
> 
> 
> Review request for Default.
> 
> 
> Repository: gem5
> 
> 
> Description
> ---
> 
> Changeset 11708:cb9fa9d8240e
> ---
> hsail: add popcount type and generate popcount instructions
> 
> 
> Diffs
> -
> 
>   src/arch/hsail/Brig_new.hpp c38fcdaa5fe508dbb18cc084e758ad0ce8e2e2f4 
>   src/arch/hsail/gen.py c38fcdaa5fe508dbb18cc084e758ad0ce8e2e2f4 
>   src/arch/hsail/insts/decl.hh c38fcdaa5fe508dbb18cc084e758ad0ce8e2e2f4 
> 
> Diff: http://reviews.gem5.org/r/3715/diff/
> 
> 
> Testing
> ---
> 
> 
> Thanks,
> 
> Brandon Potter
> 
>

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Re: [gem5-dev] Review Request 3712: hsail: remove the panic guarding function directives

[Tony Gutierrez]

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Ship it!


Ship It!

- Tony Gutierrez


On Nov. 17, 2016, 12:25 p.m., Brandon Potter wrote:
> 
> ---
> This is an automatically generated e-mail. To reply, visit:
> http://reviews.gem5.org/r/3712/
> ---
> 
> (Updated Nov. 17, 2016, 12:25 p.m.)
> 
> 
> Review request for Default.
> 
> 
> Repository: gem5
> 
> 
> Description
> ---
> 
> Changeset 11705:3dbaf4ac9c81
> ---
> hsail: remove the panic guarding function directives
> 
> HSA functions calls are still not supported properly with HSAIL, but
> the recent AMP runtime modifications rely on being able to parse the
> BRIG/HSAIL files that are extracted from the application binaries.
> We need to parse the function call HSAIL definitions, but we do not
> actually need to make the function calls.
> 
> The reason that this happens is that HCC appends a set of routines
> to every HSAIL binary that it creates. These extra, unnecessary
> routines exist in the HCC source as a file; this file is cat'd onto
> everything that the compiler outputs before being assembled into the
> application's binary. HCC does this because it might call these helper
> functions. However, it doesn't actually appear to do so in the AMP
> codes so we just parse these functions with the HSAIL parser and
> then ignore them.
> 
> 
> Diffs
> -
> 
>   src/gpu-compute/brig_object.cc c38fcdaa5fe508dbb18cc084e758ad0ce8e2e2f4 
> 
> Diff: http://reviews.gem5.org/r/3712/diff/
> 
> 
> Testing
> ---
> 
> 
> Thanks,
> 
> Brandon Potter
> 
>

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Re: [gem5-dev] Review Request 3717: hsail: disable asserts to allow immediate operands i.e. 0 with loads

[Tony Gutierrez]

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Ship it!


Minor issue.


src/arch/hsail/operand.cc (line 327)


remove the assert as opposed to commenting it out


- Tony Gutierrez


On Nov. 17, 2016, 12:27 p.m., Brandon Potter wrote:
> 
> ---
> This is an automatically generated e-mail. To reply, visit:
> http://reviews.gem5.org/r/3717/
> ---
> 
> (Updated Nov. 17, 2016, 12:27 p.m.)
> 
> 
> Review request for Default.
> 
> 
> Repository: gem5
> 
> 
> Description
> ---
> 
> Changeset 11710:05a4d1bea8d9
> ---
> hsail: disable asserts to allow immediate operands i.e. 0 with loads
> 
> 
> Diffs
> -
> 
>   src/arch/hsail/operand.cc c38fcdaa5fe508dbb18cc084e758ad0ce8e2e2f4 
> 
> Diff: http://reviews.gem5.org/r/3717/diff/
> 
> 
> Testing
> ---
> 
> 
> Thanks,
> 
> Brandon Potter
> 
>

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Re: [gem5-dev] Review Request 3714: hsail: add a wavesize case statement to register operand code

[Tony Gutierrez]

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Ship it!


Minor issue, otherwise LGTM.


src/arch/hsail/operand.cc (line 230)


can you directly initialize reg_kind to BRIG_REGISTER_KIND_DOUBLE?


- Tony Gutierrez


On Nov. 17, 2016, 12:28 p.m., Brandon Potter wrote:
> 
> ---
> This is an automatically generated e-mail. To reply, visit:
> http://reviews.gem5.org/r/3714/
> ---
> 
> (Updated Nov. 17, 2016, 12:28 p.m.)
> 
> 
> Review request for Default.
> 
> 
> Repository: gem5
> 
> 
> Description
> ---
> 
> Changeset 11707:fd91bcd20fb2
> ---
> hsail: add a wavesize case statement to register operand code
> 
> 
> Diffs
> -
> 
>   src/arch/hsail/operand.cc c38fcdaa5fe508dbb18cc084e758ad0ce8e2e2f4 
> 
> Diff: http://reviews.gem5.org/r/3714/diff/
> 
> 
> Testing
> ---
> 
> 
> Thanks,
> 
> Brandon Potter
> 
>

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Re: [gem5-dev] Review Request 3713: hsail: generate mov instructions for more arith_types and bit_types

[Tony Gutierrez]

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Ship it!


Ship It!

- Tony Gutierrez


On Nov. 17, 2016, 12:28 p.m., Brandon Potter wrote:
> 
> ---
> This is an automatically generated e-mail. To reply, visit:
> http://reviews.gem5.org/r/3713/
> ---
> 
> (Updated Nov. 17, 2016, 12:28 p.m.)
> 
> 
> Review request for Default.
> 
> 
> Repository: gem5
> 
> 
> Description
> ---
> 
> Changeset 11706:d01337668c3c
> ---
> hsail: generate mov instructions for more arith_types and bit_types
> 
> 
> Diffs
> -
> 
>   src/arch/hsail/gen.py c38fcdaa5fe508dbb18cc084e758ad0ce8e2e2f4 
> 
> Diff: http://reviews.gem5.org/r/3713/diff/
> 
> 
> Testing
> ---
> 
> 
> Thanks,
> 
> Brandon Potter
> 
>

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[gem5-dev] Review Request 3714: hsail: add a wavesize case statement to register operand code

[Brandon Potter]

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---

Review request for Default.


Repository: gem5


Description
---

Changeset 11707:fd91bcd20fb2
---
hsail: add a wavesize case statement to register operand code


Diffs
-

  src/arch/hsail/operand.cc c38fcdaa5fe508dbb18cc084e758ad0ce8e2e2f4 

Diff: http://reviews.gem5.org/r/3714/diff/


Testing
---


Thanks,

Brandon Potter

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[gem5-dev] Review Request 3713: hsail: generate mov instructions for more arith_types and bit_types

[Brandon Potter]

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Review request for Default.


Repository: gem5


Description
---

Changeset 11706:d01337668c3c
---
hsail: generate mov instructions for more arith_types and bit_types


Diffs
-

  src/arch/hsail/gen.py c38fcdaa5fe508dbb18cc084e758ad0ce8e2e2f4 

Diff: http://reviews.gem5.org/r/3713/diff/


Testing
---


Thanks,

Brandon Potter

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[gem5-dev] Review Request 3715: hsail: add popcount type and generate popcount instructions

[Brandon Potter]

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Review request for Default.


Repository: gem5


Description
---

Changeset 11708:cb9fa9d8240e
---
hsail: add popcount type and generate popcount instructions


Diffs
-

  src/arch/hsail/Brig_new.hpp c38fcdaa5fe508dbb18cc084e758ad0ce8e2e2f4 
  src/arch/hsail/gen.py c38fcdaa5fe508dbb18cc084e758ad0ce8e2e2f4 
  src/arch/hsail/insts/decl.hh c38fcdaa5fe508dbb18cc084e758ad0ce8e2e2f4 

Diff: http://reviews.gem5.org/r/3715/diff/


Testing
---


Thanks,

Brandon Potter

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[gem5-dev] Review Request 3716: hsail: add stub type and stub out several instructions

[Brandon Potter]

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Review request for Default.


Repository: gem5


Description
---

Changeset 11709:7aeedaa99901
---
hsail: add stub type and stub out several instructions


Diffs
-

  src/arch/hsail/gen.py c38fcdaa5fe508dbb18cc084e758ad0ce8e2e2f4 
  src/arch/hsail/insts/decl.hh c38fcdaa5fe508dbb18cc084e758ad0ce8e2e2f4 

Diff: http://reviews.gem5.org/r/3716/diff/


Testing
---


Thanks,

Brandon Potter

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[gem5-dev] Review Request 3717: hsail: disable asserts to allow immediate operands i.e. 0 with loads

[Brandon Potter]

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Review request for Default.


Repository: gem5


Description
---

Changeset 11710:05a4d1bea8d9
---
hsail: disable asserts to allow immediate operands i.e. 0 with loads


Diffs
-

  src/arch/hsail/operand.cc c38fcdaa5fe508dbb18cc084e758ad0ce8e2e2f4 

Diff: http://reviews.gem5.org/r/3717/diff/


Testing
---


Thanks,

Brandon Potter

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[gem5-dev] Review Request 3718: syscall_emul: extend sysinfo system call to include mem_unit

[Brandon Potter]

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Review request for Default.


Repository: gem5


Description
---

Changeset 11711:96f28447a815
---
syscall_emul: extend sysinfo system call to include mem_unit


Diffs
-

  src/sim/syscall_emul.hh c38fcdaa5fe508dbb18cc084e758ad0ce8e2e2f4 

Diff: http://reviews.gem5.org/r/3718/diff/


Testing
---


Thanks,

Brandon Potter

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[gem5-dev] Review Request 3719: syscall_emul: add support for x86 statfs system calls

[Brandon Potter]

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---

Review request for Default.


Repository: gem5


Description
---

Changeset 11712:767b13a252fe
---
syscall_emul: add support for x86 statfs system calls


Diffs
-

  src/arch/x86/linux/linux.hh c38fcdaa5fe508dbb18cc084e758ad0ce8e2e2f4 
  src/arch/x86/linux/process.cc c38fcdaa5fe508dbb18cc084e758ad0ce8e2e2f4 
  src/sim/syscall_emul.hh c38fcdaa5fe508dbb18cc084e758ad0ce8e2e2f4 

Diff: http://reviews.gem5.org/r/3719/diff/


Testing
---


Thanks,

Brandon Potter

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[gem5-dev] Review Request 3720: syscall_emul: implement fallocate

[Brandon Potter]

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---

Review request for Default.


Repository: gem5


Description
---

Changeset 11713:f2882a43dda0
---
syscall_emul: implement fallocate


Diffs
-

  src/arch/x86/linux/process.cc c38fcdaa5fe508dbb18cc084e758ad0ce8e2e2f4 
  src/sim/syscall_emul.hh c38fcdaa5fe508dbb18cc084e758ad0ce8e2e2f4 
  src/sim/syscall_emul.cc c38fcdaa5fe508dbb18cc084e758ad0ce8e2e2f4 

Diff: http://reviews.gem5.org/r/3720/diff/


Testing
---


Thanks,

Brandon Potter

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[gem5-dev] Review Request 3712: hsail: remove the panic guarding function directives

[Brandon Potter]

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http://reviews.gem5.org/r/3712/
---

Review request for Default.


Repository: gem5


Description
---

Changeset 11705:3dbaf4ac9c81
---
hsail: remove the panic guarding function directives

HSA functions calls are still not supported properly with HSAIL, but
the recent AMP runtime modifications rely on being able to parse the
BRIG/HSAIL files that are extracted from the application binaries.
We need to parse the function call HSAIL definitions, but we do not
actually need to make the function calls.

The reason that this happens is that HCC appends a set of routines
to every HSAIL binary that it creates. These extra, unnecessary
routines exist in the HCC source as a file; this file is cat'd onto
everything that the compiler outputs before being assembled into the
application's binary. HCC does this because it might call these helper
functions. However, it doesn't actually appear to do so in the AMP
codes so we just parse these functions with the HSAIL parser and
then ignore them.


Diffs
-

  src/gpu-compute/brig_object.cc c38fcdaa5fe508dbb18cc084e758ad0ce8e2e2f4 

Diff: http://reviews.gem5.org/r/3712/diff/


Testing
---


Thanks,

Brandon Potter

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Re: [gem5-dev] Review Request 3708: commit 752c67b134f4cb0b7ca68a907c39a5a482de30b3

[Rahul Thakur]

> On Nov. 17, 2016, 11:40 a.m., Andreas Sandberg wrote:
> > src/mem/probes/mem_footprint.cc, line 87
> > 
> >
> > You could actually do this instead of using a custom class:
> > 
> > ```
> > registerResetCallback(new MakeCallback > ::statReset>(this))
> > ```

Thanks for review!


- Rahul


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On Nov. 17, 2016, 8:02 p.m., Rahul Thakur wrote:
> 
> ---
> This is an automatically generated e-mail. To reply, visit:
> http://reviews.gem5.org/r/3708/
> ---
> 
> (Updated Nov. 17, 2016, 8:02 p.m.)
> 
> 
> Review request for Default.
> 
> 
> Repository: gem5
> 
> 
> Description
> ---
> 
> Changeset 11705:f55d4a414fa1
> ---
> commit 752c67b134f4cb0b7ca68a907c39a5a482de30b3
> Author: Rahul Thakur 
> Date:   Thu Oct 27 17:44:40 2016 -0700
> 
> mem: Add memory footprint probe
> 
> Change-Id: I0fba8995edd63df4ef49969347be6d2aefceca9f
> 
> 
> Diffs
> -
> 
>   COPYING c38fcdaa5fe5 
>   configs/dram/lat_mem_rd.py c38fcdaa5fe5 
>   src/mem/probes/MemFootprintProbe.py PRE-CREATION 
>   src/mem/probes/SConscript c38fcdaa5fe5 
>   src/mem/probes/mem_footprint.hh PRE-CREATION 
>   src/mem/probes/mem_footprint.cc PRE-CREATION 
> 
> Diff: http://reviews.gem5.org/r/3708/diff/
> 
> 
> Testing
> ---
> 
> 
> Thanks,
> 
> Rahul Thakur
> 
>

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Re: [gem5-dev] Review Request 3708: commit 752c67b134f4cb0b7ca68a907c39a5a482de30b3

[Rahul Thakur]

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Ship it!


Ship It!

- Rahul Thakur


On Nov. 17, 2016, 8:02 p.m., Rahul Thakur wrote:
> 
> ---
> This is an automatically generated e-mail. To reply, visit:
> http://reviews.gem5.org/r/3708/
> ---
> 
> (Updated Nov. 17, 2016, 8:02 p.m.)
> 
> 
> Review request for Default.
> 
> 
> Repository: gem5
> 
> 
> Description
> ---
> 
> Changeset 11705:f55d4a414fa1
> ---
> commit 752c67b134f4cb0b7ca68a907c39a5a482de30b3
> Author: Rahul Thakur 
> Date:   Thu Oct 27 17:44:40 2016 -0700
> 
> mem: Add memory footprint probe
> 
> Change-Id: I0fba8995edd63df4ef49969347be6d2aefceca9f
> 
> 
> Diffs
> -
> 
>   COPYING c38fcdaa5fe5 
>   configs/dram/lat_mem_rd.py c38fcdaa5fe5 
>   src/mem/probes/MemFootprintProbe.py PRE-CREATION 
>   src/mem/probes/SConscript c38fcdaa5fe5 
>   src/mem/probes/mem_footprint.hh PRE-CREATION 
>   src/mem/probes/mem_footprint.cc PRE-CREATION 
> 
> Diff: http://reviews.gem5.org/r/3708/diff/
> 
> 
> Testing
> ---
> 
> 
> Thanks,
> 
> Rahul Thakur
> 
>

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Re: [gem5-dev] Review Request 3708: commit 752c67b134f4cb0b7ca68a907c39a5a482de30b3

[Rahul Thakur]

---
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---

(Updated Nov. 17, 2016, 8:02 p.m.)


Review request for Default.


Repository: gem5


Description (updated)
---

Changeset 11705:f55d4a414fa1
---
commit 752c67b134f4cb0b7ca68a907c39a5a482de30b3
Author: Rahul Thakur 
Date:   Thu Oct 27 17:44:40 2016 -0700

mem: Add memory footprint probe

Change-Id: I0fba8995edd63df4ef49969347be6d2aefceca9f


Diffs (updated)
-

  COPYING c38fcdaa5fe5 
  configs/dram/lat_mem_rd.py c38fcdaa5fe5 
  src/mem/probes/MemFootprintProbe.py PRE-CREATION 
  src/mem/probes/SConscript c38fcdaa5fe5 
  src/mem/probes/mem_footprint.hh PRE-CREATION 
  src/mem/probes/mem_footprint.cc PRE-CREATION 

Diff: http://reviews.gem5.org/r/3708/diff/


Testing
---


Thanks,

Rahul Thakur

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Re: [gem5-dev] Review Request 3700: syscall_emul: [PATCH 19/22] adds basic signaling mechanism to SE mode

[Alexandru Dutu]

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---



src/sim/se_signal.hh (line 45)


This should not have an underscore, also why not just use signal?


- Alexandru Dutu


On Nov. 16, 2016, 4:36 p.m., Brandon Potter wrote:
> 
> ---
> This is an automatically generated e-mail. To reply, visit:
> http://reviews.gem5.org/r/3700/
> ---
> 
> (Updated Nov. 16, 2016, 4:36 p.m.)
> 
> 
> Review request for Default.
> 
> 
> Repository: gem5
> 
> 
> Description
> ---
> 
> Changeset 11728:85a344df47dd
> ---
> syscall_emul: [PATCH 19/22] adds basic signaling mechanism to SE mode
> 
> 
> Diffs
> -
> 
>   src/sim/system.hh c38fcdaa5fe508dbb18cc084e758ad0ce8e2e2f4 
>   src/sim/se_signal.hh PRE-CREATION 
>   src/sim/se_signal.cc PRE-CREATION 
>   src/sim/SConscript c38fcdaa5fe508dbb18cc084e758ad0ce8e2e2f4 
> 
> Diff: http://reviews.gem5.org/r/3700/diff/
> 
> 
> Testing
> ---
> 
> 
> Thanks,
> 
> Brandon Potter
> 
>

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Re: [gem5-dev] Review Request 3706: style: local variable name correction

[Alexandru Dutu]

---
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---

Ship it!


Ship It!

- Alexandru Dutu


On Nov. 16, 2016, 4:24 p.m., Brandon Potter wrote:
> 
> ---
> This is an automatically generated e-mail. To reply, visit:
> http://reviews.gem5.org/r/3706/
> ---
> 
> (Updated Nov. 16, 2016, 4:24 p.m.)
> 
> 
> Review request for Default.
> 
> 
> Repository: gem5
> 
> 
> Description
> ---
> 
> Changeset 11726:71d4b80b78ab
> ---
> style: local variable name correction
> 
> 
> Diffs
> -
> 
>   src/sim/syscall_emul.cc c38fcdaa5fe508dbb18cc084e758ad0ce8e2e2f4 
> 
> Diff: http://reviews.gem5.org/r/3706/diff/
> 
> 
> Testing
> ---
> 
> 
> Thanks,
> 
> Brandon Potter
> 
>

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Re: [gem5-dev] Review Request 3702: syscall_emul: [PATCH 21/22] rewrite code related to system call exits

[Alexandru Dutu]

---
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---

Ship it!


Ship It!

- Alexandru Dutu


On Nov. 16, 2016, 4:44 p.m., Brandon Potter wrote:
> 
> ---
> This is an automatically generated e-mail. To reply, visit:
> http://reviews.gem5.org/r/3702/
> ---
> 
> (Updated Nov. 16, 2016, 4:44 p.m.)
> 
> 
> Review request for Default.
> 
> 
> Repository: gem5
> 
> 
> Description
> ---
> 
> Changeset 11730:9ee83d124c9c
> ---
> syscall_emul: [PATCH 21/22] rewrite code related to system call exits
> 
> The changeset refactors exit, exit_group, and futex related exit
> functionality.
> 
> 
> Diffs
> -
> 
>   src/sim/system.hh c38fcdaa5fe508dbb18cc084e758ad0ce8e2e2f4 
>   src/sim/syscall_emul.hh c38fcdaa5fe508dbb18cc084e758ad0ce8e2e2f4 
>   src/sim/syscall_emul.cc c38fcdaa5fe508dbb18cc084e758ad0ce8e2e2f4 
>   src/sim/futex_map.hh PRE-CREATION 
>   src/sim/process.cc c38fcdaa5fe508dbb18cc084e758ad0ce8e2e2f4 
> 
> Diff: http://reviews.gem5.org/r/3702/diff/
> 
> 
> Testing
> ---
> 
> 
> Thanks,
> 
> Brandon Potter
> 
>

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Re: [gem5-dev] Review Request 3701: syscall_emul: [PATCH 20/22] add the tgkill system call

[Alexandru Dutu]

---
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http://reviews.gem5.org/r/3701/#review9101
---

Ship it!


Ship It!

- Alexandru Dutu


On Nov. 14, 2016, 8:56 p.m., Brandon Potter wrote:
> 
> ---
> This is an automatically generated e-mail. To reply, visit:
> http://reviews.gem5.org/r/3701/
> ---
> 
> (Updated Nov. 14, 2016, 8:56 p.m.)
> 
> 
> Review request for Default.
> 
> 
> Repository: gem5
> 
> 
> Description
> ---
> 
> Changeset 11727:33fae597297e
> ---
> syscall_emul: [PATCH 20/22] add the tgkill system call
> 
> 
> Diffs
> -
> 
>   src/sim/syscall_emul.hh c38fcdaa5fe508dbb18cc084e758ad0ce8e2e2f4 
>   src/arch/x86/linux/process.cc c38fcdaa5fe508dbb18cc084e758ad0ce8e2e2f4 
> 
> Diff: http://reviews.gem5.org/r/3701/diff/
> 
> 
> Testing
> ---
> 
> 
> Thanks,
> 
> Brandon Potter
> 
>

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Re: [gem5-dev] Review Request 3705: dev: Fix buffer length when unserializing an eth pkt

[Gabor Dozsa]

---
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---


The patch fixes my full system test which failed before. 

I think it needs a chekpoint upgrader though. Making bufLength optional is not 
enough to avoid the problem of not allocating (enough) buffer space for an 
ethernet packet when unserializing a legacy checkpoint.

- Gabor Dozsa


On Nov. 15, 2016, 9:22 p.m., Michael LeBeane wrote:
> 
> ---
> This is an automatically generated e-mail. To reply, visit:
> http://reviews.gem5.org/r/3705/
> ---
> 
> (Updated Nov. 15, 2016, 9:22 p.m.)
> 
> 
> Review request for Default.
> 
> 
> Repository: gem5
> 
> 
> Description
> ---
> 
> Changeset 11705:008f04dcc085
> ---
> dev: Fix buffer length when unserializing an eth pkt
> Changeset 11701 only serialized the useful portion of of an ethernet packets'
> payload.  However, the device models expect each ethernet packet to contain
> a 16KB buffer, even if there is no data in it.  This patch adds a 'bufLength'
> field to EthPacketData so the original size of the packet buffer can always be
> unserialized.
> 
> Reported-by: Gabor Dozsa 
> 
> 
> Diffs
> -
> 
>   src/dev/net/etherpkt.hh c38fcdaa5fe508dbb18cc084e758ad0ce8e2e2f4 
>   src/dev/net/etherpkt.cc c38fcdaa5fe508dbb18cc084e758ad0ce8e2e2f4 
> 
> Diff: http://reviews.gem5.org/r/3705/diff/
> 
> 
> Testing
> ---
> 
> 
> Thanks,
> 
> Michael LeBeane
> 
>

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Re: [gem5-dev] Review Request 3708: commit 752c67b134f4cb0b7ca68a907c39a5a482de30b3

[Andreas Sandberg]

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---

Ship it!


Looks good. You might want to consider changing the way the reset callback is 
created to remove an unnecessary class though.


src/mem/probes/mem_footprint.cc (line 87)


You could actually do this instead of using a custom class:

```
registerResetCallback(new MakeCallback(this))
```


- Andreas Sandberg


On Nov. 16, 2016, 11:02 p.m., Rahul Thakur wrote:
> 
> ---
> This is an automatically generated e-mail. To reply, visit:
> http://reviews.gem5.org/r/3708/
> ---
> 
> (Updated Nov. 16, 2016, 11:02 p.m.)
> 
> 
> Review request for Default.
> 
> 
> Repository: gem5
> 
> 
> Description
> ---
> 
> Changeset 11705:df194a470063
> ---
> commit 752c67b134f4cb0b7ca68a907c39a5a482de30b3
> Author: Rahul Thakur 
> Date:   Thu Oct 27 17:44:40 2016 -0700
> 
> mem: Add memory footprint probe
> 
> Change-Id: I0fba8995edd63df4ef49969347be6d2aefceca9f
> 
> 
> Diffs
> -
> 
>   src/mem/probes/mem_footprint.hh PRE-CREATION 
>   src/mem/probes/mem_footprint.cc PRE-CREATION 
>   COPYING c38fcdaa5fe5 
>   configs/dram/lat_mem_rd.py c38fcdaa5fe5 
>   src/mem/probes/MemFootprintProbe.py PRE-CREATION 
>   src/mem/probes/SConscript c38fcdaa5fe5 
> 
> Diff: http://reviews.gem5.org/r/3708/diff/
> 
> 
> Testing
> ---
> 
> 
> Thanks,
> 
> Rahul Thakur
> 
>

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[gem5-dev] changeset in gem5: alpha: Remove ALPHA tru64 support and associa...

[Andreas Hansson]

changeset d40bdd3c5778 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=d40bdd3c5778
description:
alpha: Remove ALPHA tru64 support and associated tests

No one appears to be using it, and it is causing build issues
and increases the development and maintenance effort.

diffstat:

 src/arch/alpha/AlphaSystem.py  
   | 6 -
 src/arch/alpha/SConscript  
   | 3 -
 src/arch/alpha/kernel_stats.cc 
   |11 -
 src/arch/alpha/tru64/process.cc
   |   584 --
 src/arch/alpha/tru64/process.hh
   |60 -
 src/arch/alpha/tru64/system.cc 
   |92 -
 src/arch/alpha/tru64/system.hh 
   |76 -
 src/arch/alpha/tru64/tru64.cc  
   |94 -
 src/arch/alpha/tru64/tru64.hh  
   |   168 -
 src/kern/SConscript
   | 8 -
 src/kern/kernel_stats.cc   
   |21 -
 src/kern/kernel_stats.hh   
   | 5 -
 src/kern/tru64/dump_mbuf.cc
   |82 -
 src/kern/tru64/dump_mbuf.hh
   |40 -
 src/kern/tru64/mbuf.hh 
   |   100 -
 src/kern/tru64/printf.cc   
   |   272 -
 src/kern/tru64/printf.hh   
   |40 -
 src/kern/tru64/tru64.hh
   |  1222 -
 src/kern/tru64/tru64_events.cc 
   |   114 -
 src/kern/tru64/tru64_events.hh 
   |86 -
 src/kern/tru64/tru64_syscalls.cc   
   |   440 --
 src/kern/tru64/tru64_syscalls.hh   
   |   361 -
 src/sim/process.cc 
   | 5 -
 tests/long/se/20.parser/ref/alpha/tru64/NOTE   
   | 6 -
 tests/long/se/20.parser/ref/alpha/tru64/minor-timing/config.ini
   |   877 
 tests/long/se/20.parser/ref/alpha/tru64/minor-timing/simerr
   | 7 -
 tests/long/se/20.parser/ref/alpha/tru64/minor-timing/simout
   |72 -
 tests/long/se/20.parser/ref/alpha/tru64/minor-timing/stats.txt 
   |   833 ---
 tests/long/se/30.eon/ref/alpha/tru64/minor-timing/config.ini   
   |   877 
 tests/long/se/30.eon/ref/alpha/tru64/minor-timing/simerr   
   |53 -
 tests/long/se/30.eon/ref/alpha/tru64/minor-timing/simout   
   |17 -
 tests/long/se/30.eon/ref/alpha/tru64/minor-timing/stats.txt
   |   794 ---
 tests/long/se/30.eon/ref/alpha/tru64/o3-timing/config.ini  
   |   825 ---
 tests/long/se/30.eon/ref/alpha/tru64/o3-timing/simerr  
   |53 -
 tests/long/se/30.eon/ref/alpha/tru64/o3-timing/simout  
   |17 -
 tests/long/se/30.eon/ref/alpha/tru64/o3-timing/stats.txt   
   |  1059 
 tests/long/se/30.eon/ref/alpha/tru64/simple-timing/config.ini  
   |   366 -
 tests/long/se/30.eon/ref/alpha/tru64/simple-timing/simerr  
   |52 -
 tests/long/se/30.eon/ref/alpha/tru64/simple-timing/simout  
   |17 -
 tests/long/se/30.eon/ref/alpha/tru64/simple-timing/stats.txt   
   |   555 --
 tests/long/se/40.perlbmk/ref/alpha/tru64/minor-timing/config.ini   
   |   877 
 tests/long/se/40.perlbmk/ref/alpha/tru64/minor-timing/simerr   
   | 8 -
 tests/long/se/40.perlbmk/ref/alpha/tru64/minor-timing/simout   
   |   653 ---
 tests/long/se/40.perlbmk/ref/alpha/tru64/minor-timing/stats.txt
   |   829 ---
 tests/long/se/40.perlbmk/ref/alpha/tru64/o3-timing/config.ini  
   |   825 ---
 

[gem5-dev] changeset in gem5: stats, alpha: Update ALPHA stats

[Andreas Hansson]

changeset 1d085f66c4ca in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=1d085f66c4ca
description:
stats, alpha: Update ALPHA stats

Reflect the removal of the syscall tracking.

diffstat:

 tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-minor/stats.txt
 |  41 +-
 tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/stats.txt  
 |  66 +
 tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/stats.txt   
 |  43 +-
 
tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/stats.txt
   |  59 +
 tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/stats.txt   
 |  41 +-
 
tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/stats.txt
   |  54 +---
 tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/stats.txt   
 |  41 +-
 
tests/quick/fs/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/stats.txt
 |  53 +--
 8 files changed, 47 insertions(+), 351 deletions(-)

diffs (truncated from 590 to 300 lines):

diff -r 7339a92fffb5 -r 1d085f66c4ca 
tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-minor/stats.txt
--- a/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-minor/stats.txt   
Thu Nov 17 04:54:16 2016 -0500
+++ b/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-minor/stats.txt   
Thu Nov 17 04:54:18 2016 -0500
@@ -4,11 +4,11 @@
 sim_ticks1893220881500   # 
Number of ticks simulated
 final_tick   1893220881500   # 
Number of ticks from beginning of simulation (restored from checkpoints and 
never reset)
 sim_freq 1   # 
Frequency of simulated ticks
-host_inst_rate  27932   # 
Simulator instruction rate (inst/s)
-host_op_rate27932   # 
Simulator op (including micro ops) rate (op/s)
-host_tick_rate  941819152   # 
Simulator tick rate (ticks/s)
-host_mem_usage 393408   # 
Number of bytes of host memory used
-host_seconds  2010.17   # 
Real time elapsed on the host
+host_inst_rate  25399   # 
Simulator instruction rate (inst/s)
+host_op_rate25399   # 
Simulator op (including micro ops) rate (op/s)
+host_tick_rate  856404595   # 
Simulator tick rate (ticks/s)
+host_mem_usage 393548   # 
Number of bytes of host memory used
+host_seconds  2210.66   # 
Real time elapsed on the host
 sim_insts56147815   # 
Number of instructions simulated
 sim_ops  56147815   # 
Number of ops (including micro ops) simulated
 system.voltage_domain.voltage   1   # 
Voltage in Volts
@@ -443,37 +443,6 @@
 system.cpu.kern.ipl_used::221   # 
fraction of swpipl calls that actually changed the ipl
 system.cpu.kern.ipl_used::31 0.693386   # 
fraction of swpipl calls that actually changed the ipl
 system.cpu.kern.ipl_used::total  0.814825   # 
fraction of swpipl calls that actually changed the ipl
-system.cpu.kern.syscall::2  8  2.45%  2.45% # 
number of syscalls executed
-system.cpu.kern.syscall::3 30  9.20% 11.66% # 
number of syscalls executed
-system.cpu.kern.syscall::4  4  1.23% 12.88% # 
number of syscalls executed
-system.cpu.kern.syscall::6 42 12.88% 25.77% # 
number of syscalls executed
-system.cpu.kern.syscall::12 1  0.31% 26.07% # 
number of syscalls executed
-system.cpu.kern.syscall::15 1  0.31% 26.38% # 
number of syscalls executed
-system.cpu.kern.syscall::1715  4.60% 30.98% # 
number of syscalls executed
-system.cpu.kern.syscall::1910  3.07% 34.05% # 
number of syscalls executed
-system.cpu.kern.syscall::20 6  1.84% 35.89% # 
number of syscalls executed
-system.cpu.kern.syscall::23 4  1.23% 37.12% # 
number of syscalls executed
-system.cpu.kern.syscall::24 6  1.84% 38.96% # 
number of syscalls 

Re: [gem5-dev] Review Request 3502: mem: Split the hit_latency into tag_latency and data_latency

[Sophiane SENNI]

> On oct. 27, 2016, 12:11 après-midi, Andreas Hansson wrote:
> > thanks for getting this in shape

Hi all,

Could someone commit this patch, please ?
Thanks


- Sophiane


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On oct. 27, 2016, 11:25 matin, Sophiane SENNI wrote:
> 
> ---
> This is an automatically generated e-mail. To reply, visit:
> http://reviews.gem5.org/r/3502/
> ---
> 
> (Updated oct. 27, 2016, 11:25 matin)
> 
> 
> Review request for Default.
> 
> 
> Repository: gem5
> 
> 
> Description
> ---
> 
> Changeset 11688:1a792798e845
> ---
> mem: Split the hit_latency into tag_latency and data_latency
> 
> If the cache access mode is parallel, i.e. "sequential_access" parameter
> is set to "False", tags and data are accessed in parallel. Therefore,
> the hit_latency is the maximum latency between tag_latency and
> data_latency. On the other hand, if the cache access mode is
> sequential, i.e. "sequential_access" parameter is set to "True",
> tags and data are accessed sequentially. Therefore, the hit_latency
> is the sum of tag_latency plus data_latency.
> 
> 
> Diffs
> -
> 
>   configs/common/Caches.py 4aac82f10951 
>   configs/common/O3_ARM_v7a.py 4aac82f10951 
>   configs/example/arm/devices.py 4aac82f10951 
>   configs/learning_gem5/part1/caches.py 4aac82f10951 
>   src/mem/cache/Cache.py 4aac82f10951 
>   src/mem/cache/base.hh 4aac82f10951 
>   src/mem/cache/base.cc 4aac82f10951 
>   src/mem/cache/tags/Tags.py 4aac82f10951 
>   src/mem/cache/tags/base.hh 4aac82f10951 
>   src/mem/cache/tags/base.cc 4aac82f10951 
>   src/mem/cache/tags/base_set_assoc.hh 4aac82f10951 
>   src/mem/cache/tags/fa_lru.hh 4aac82f10951 
>   src/mem/cache/tags/fa_lru.cc 4aac82f10951 
> 
> Diff: http://reviews.gem5.org/r/3502/diff/
> 
> 
> Testing
> ---
> 
> Tested using --Debug-flags=Cache
> 
> 
> Thanks,
> 
> Sophiane SENNI
> 
>

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[gem5-dev] Cron <m5test@zizzer> /z/m5/regression/do-regression quick

[Cron Daemon]

* build/HSAIL_X86/tests/opt/quick/se/04.gpu/x86/linux/gpu-ruby-GPU_RfO: 
CHANGED!
* build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby: 
passed.
* build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/o3-timing: 
passed.* build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/simple-atomic: 
passed.
* build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/minor-timing: passed.
* build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/simple-timing: passed.
* build/ALPHA/tests/opt/quick/se/00.hello/alpha/tru64/minor-timing: passed.
* build/ALPHA/tests/opt/quick/se/00.hello/alpha/tru64/o3-timing: passed.
* build/ALPHA/tests/opt/quick/se/00.hello/alpha/tru64/simple-atomic: passed.
* build/ALPHA/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing: passed.
* build/ALPHA/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby: 
passed.
* build/ALPHA/tests/opt/quick/se/50.memtest/alpha/linux/memtest-ruby: 
passed.
* 
build/ALPHA/tests/opt/quick/se/03.learning-gem5/alpha/linux/learning-gem5-p1-simple:
 passed.
* 
build/ALPHA/tests/opt/quick/se/03.learning-gem5/alpha/linux/learning-gem5-p1-two-level:
 passed.
* build/ALPHA/tests/opt/quick/se/01.hello-2T-smt/alpha/linux/o3-timing-mt: 
passed.
* build/ALPHA/tests/opt/quick/se/30.eon/alpha/tru64/simple-atomic: passed.
* build/ALPHA/tests/opt/quick/se/50.vortex/alpha/tru64/simple-atomic: 
passed.
* build/ALPHA/tests/opt/quick/se/50.vortex/alpha/tru64/simple-timing: 
passed.
* build/ALPHA/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby: 
passed.
* 
build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-atomic-dual:
 passed.
* 
build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-atomic: 
passed.
* build/ALPHA/tests/opt/quick/se/70.twolf/alpha/tru64/simple-atomic: passed.
* 
build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-timing: 
passed.
* 
build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-timing-dual:
 passed.
* build/ALPHA/tests/opt/quick/se/70.twolf/alpha/tru64/simple-timing: passed.
* 
build/ALPHA/tests/opt/quick/fs/80.netperf-stream/alpha/linux/twosys-tsunami-simple-atomic:
 passed.
* 
build/ALPHA_MOESI_hammer/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby-MOESI_hammer:
 passed.* 
build/ALPHA_MOESI_hammer/tests/opt/quick/se/50.memtest/alpha/linux/memtest-ruby-MOESI_hammer:
 passed.
* 
build/ALPHA_MOESI_hammer/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby-MOESI_hammer:
 passed.
* 
build/ALPHA_MOESI_hammer/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby-MOESI_hammer:
 passed.
* 
build/ALPHA_MESI_Two_Level/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby-MESI_Two_Level:
 passed.
* 
build/ALPHA_MESI_Two_Level/tests/opt/quick/se/50.memtest/alpha/linux/memtest-ruby-MESI_Two_Level:
 passed.
* 
build/ALPHA_MESI_Two_Level/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby-MESI_Two_Level:
 passed.
* 
build/ALPHA_MESI_Two_Level/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby-MESI_Two_Level:
 passed.
* 
build/ALPHA_MOESI_CMP_directory/tests/opt/quick/se/50.memtest/alpha/linux/memtest-ruby-MOESI_CMP_directory:
 passed.
* 
build/ALPHA_MOESI_CMP_directory/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby-MOESI_CMP_directory:
 passed.
* 
build/ALPHA_MOESI_CMP_directory/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory:
 passed.
* 
build/ALPHA_MOESI_CMP_directory/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby-MOESI_CMP_directory:
 passed.
* 
build/ALPHA_MOESI_CMP_token/tests/opt/quick/se/50.memtest/alpha/linux/memtest-ruby-MOESI_CMP_token:
 passed.
* 
build/ALPHA_MOESI_CMP_token/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby-MOESI_CMP_token:
 passed.
* 
build/ALPHA_MOESI_CMP_token/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby-MOESI_CMP_token:
 passed.
* 
build/ALPHA_MOESI_CMP_token/tests/opt/quick/se/60.rubytest/alpha/linux/rubytest-ruby-MOESI_CMP_token:
 passed.
* build/MIPS/tests/opt/quick/se/00.hello/mips/linux/o3-timing: passed.
* build/MIPS/tests/opt/quick/se/00.hello/mips/linux/simple-timing: passed.
* build/MIPS/tests/opt/quick/se/00.hello/mips/linux/simple-atomic: passed.
 * 
build/MIPS/tests/opt/quick/se/03.learning-gem5/mips/linux/learning-gem5-p1-two-level:
 passed.
* 
build/MIPS/tests/opt/quick/se/03.learning-gem5/mips/linux/learning-gem5-p1-simple:
 passed.* 
build/MIPS/tests/opt/quick/se/00.hello/mips/linux/simple-timing-ruby: passed.
* build/NULL/tests/opt/quick/se/50.memtest/null/none/memtest-filter: passed.
* build/NULL/tests/opt/quick/se/51.memcheck/null/none/memcheck: passed.
* build/NULL/tests/opt/quick/se/50.memtest/null/none/memtest: passed.
* build/NULL/tests/opt/quick/se/70.tgen/null/none/tgen-dram-ctrl: passed.
*