date:20090512

The following message is a courtesy copy of an article
that has been posted to bit.listserv.ibm-main as well.


scottyt.har...@gmail.com (Scott T. Harder) writes:
 Very cool.  Funny, though... I remember first logging onto TSO on what
 I thought was a 3082 (although I didn't know what even DASD was at the
 time).  Then, when I finally got my hands on a mainframe in MCO, it
 was a 3084.  This slideshow shows a 3083, which I don't have any
 recollection of.  Looks like a 3084, from what I can remember, though.

308x were going to be multiprocessor only ... 3081 was two-processor
machine, 3084 was pair of 3081s ganged together for four-processor
machines.

traditional 370 cache machines slowed the processing cycle down by 10%
to allow for cross-cache chatter in a two-processor configuration (and
four-processor was even slower) ... that is addition to the actual cache
processing overhead of handling cross-cache signals (two-way met that
there was signals from one other cache, four-way resulted in signals
from three other caches).

TPF/ACP was an important market segment at the time ... but didn't have
SMP (tightly-coupled, shared memory, multiprocessor) support. 3083 was
3081 with some of the hardware removed for a single processor and the
single machine running nearly 15% faster (cross-cache chatter slowdown
disabled). Prior to 3083, TPF/ACP operation on 3081 was under vm/370
(handling multiprocessor hardware) providing multiple (single processor)
virtual machines for TPF/ACP operator (TPF/ACP did have loosely-coupled,
cluster support ... so the multiple TPF/ACP virtual machines could be
coordinated ... as opposed to say, production vis-a-vis test). Although
there were some TPF/ACP 3081 operations where the 2nd processor would
sit mostly idle. 3083 was primarily introduced to address TPF/ACP
market.

web reference:
http://www-03.ibm.com/ibm/history/exhibits/mainframe/mainframe_PP3081.html

prior to 308x, a 370 multiprocessor had fully replicated hardware ...
and a two processor system could be split and run as two independent
single processors. for the 3081, the term dyadic was introduced to
differentiate that while it had two execution processors ... all the
hardware was not fully duplicated and so a 3081 couldn't be split and
operated as two independent uniprocessors (although a 4-processor 3084
could be split into two 3081s).

3082 waas the service processor. One of the issues was that field
engineering required a boot-strap diagnostic process ... which started
with scoping failed components and going up from there. TCMs in 308x
were not scope'able ... so things started with a service processor
that was simpler technology and was scope'able ... then a working
service processor had all sorts of diagnostices instrumentation into the
TCMs.

There were lots of issues with developing a roll-your-own operating
system and diagnostic applications for the service processor in the 308x
... so for the 3090 ... it was decided to go with a standard (low-end,
scope' able) 370 for the service process. The 3090 effort started out
with 4331 running a customized version of vm370 release six and all the
service screens implemented in cms ios3720. by the time, the 3090
shipped, the service processor had been upgraded to a pair of 4361s
(effectively replicated units in lieu of having to scope the service
processor for diagnostic process).

misc. past posts mentioning 3083:
http://www.garlic.com/~lynn/99.html#103 IBM 9020 computers used by FAA (was Re: 
EPO stories (was: HELP IT'S HOT!))
http://www.garlic.com/~lynn/2000b.html#65 oddly portable machines
http://www.garlic.com/~lynn/2000d.html#9 4341 was Is a VAX a mainframe?
http://www.garlic.com/~lynn/2000f.html#69 TSS ancient history, was X86 ultimate 
CISC? designs)
http://www.garlic.com/~lynn/2001b.html#37 John Mashey's greatest hits
http://www.garlic.com/~lynn/2001c.html#13 LINUS for S/390
http://www.garlic.com/~lynn/2001j.html#17 I hate Compaq
http://www.garlic.com/~lynn/2002c.html#9 IBM Doesn't Make Small MP's Anymore
http://www.garlic.com/~lynn/2002i.html#83 HONE
http://www.garlic.com/~lynn/2002m.html#67 Tweaking old computers?
http://www.garlic.com/~lynn/2002o.html#28 TPF
http://www.garlic.com/~lynn/2002p.html#58 AMP  vs  SMP
http://www.garlic.com/~lynn/2003g.html#30 One Processor is bad?
http://www.garlic.com/~lynn/2003p.html#45 Saturation Design Point
http://www.garlic.com/~lynn/2004.html#7 Dyadic
http://www.garlic.com/~lynn/2004c.html#35 Computer-oriented license plates
http://www.garlic.com/~lynn/2004e.html#44 Infiniband - practicalities for small 
clusters
http://www.garlic.com/~lynn/2005.html#22 The Soul of Barb's New Machine (was 
Re: creat)
http://www.garlic.com/~lynn/2005j.html#16 Performance and Capacity Planning
http://www.garlic.com/~lynn/2005m.html#55 54 Processors?
http://www.garlic.com/~lynn/2005o.html#44 Intel engineer discusses their 
dual-core design
http://www.garlic.com/~lynn/2005s.html#7 Performance of zOS guest

Re: Validating Addrees

2009-05-12 Thread Binyamin Dissen

On Mon, 11 May 2009 07:34:43 -0500 Tom Marchant m42tom-ibmm...@yahoo.com
wrote:

:On Sat, 9 May 2009 16:35:58 -0400, Tony Harminc wrote:
:
:2009/5/8 Joe Reichman wrote:
:
:  would anyone know if you have a stroage address to determine its nature
:
: e.g. CSA SQA etc.
:
: would I have to check all of the entries in the LDA ..GDA
:
:
: Keep in mind that in many cases the attributes can change
:between the time you check, and the time you (or some service or
:program you call) actually uses the storage.
:
:And Binyamin made a similar comment.
:
:What do you mean by this?  If you determine that an address is in CSA, it
:will continue to be a CSA address.  

More precisely, the virtual address will only be assigned to a CSA request.

:Of course, that location could no longer
:be allocated to the same address space, or indeed any address space. 

CSA is not really allocated to an address space (with the possible exception
of a dynamic load to global where the system will free the storage when the
LOADer goes away).

:  In
:addition, the location could have been converted to SQA, I suppose, or have
:been used to hold a dynamic LPA module.  Is that what you are talking about?

Basically, if you check the attributes of a storage location they may change
before you can use it. It may be released, its key may change, etc. 

Should a system routine be passed an address that must be validated in some
way to make sure that it is the right - kind - of address the appropriate
locks must be taken before the processing to make sure that the use does not
change. Only if you take the VSM locks that serialize storage allocation, can
you be sure that the storage will not be freed and reallocated while your
processing takes place.

--
Binyamin Dissen bdis...@dissensoftware.com
http://www.dissensoftware.com

Director, Dissen Software, Bar  Grill - Israel


Should you use the mailblocks package and expect a response from me,
you should preauthorize the dissensoftware.com domain.

I very rarely bother responding to challenge/response systems,
especially those from irresponsible companies.

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HiperDispatch OA27869 IRA863E HIPERDISPATCH MODE ALGORITHM DETECTED AN ERROR. RC=002F

2009-05-12 Thread Knutson, Sam

http://www.ibm.com/support/docview.wss?uid=isg1OA27869

OA27869: IRA863E HIPERDISPATCH MODE ALGORITHM DETECTED AN ERROR.  RC=002F

We ran into this problem just once but it was the first time for someone in the 
field and IBM took APAR OA27869 which is now closed. Because we already had the 
fix for OA26540 is applied we were able to do a SET OPT=xx for our normal IPL 
time IEAOPTxx to turn HiperDispatch back on. You can review the documentation 
in the APAR now that it is closed using the link above.

We picked up on the original problem right away because we had the Health 
Checker for z/OS configured to send exceptions to our team.  

This is an update to the HiperDispatch segment in Bit Bucket x'25' from SHARE 
in Austin.

http://ew.share.org/client_files/callpapers/attach/SHARE_in_Austin/S2817SK213820.pdf
 

http://ew.share.org/proceedingmod/abstract.cfm?abstract_id=18797conference_id=20
  

Best Regards, 

Sam Knutson, GEICO 
System z Performance and Availability Management 
mailto:sknut...@geico.com 
(office)  301.986.3574 

Think big, act bold, start simple, grow fast... 



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Re: Mainframe articles

2009-05-12 Thread Martin Packer

Care to talk about the various slugged (and not slugged) models. And 
base vs X?

Cheers, Martin

Martin Packer
Performance Consultant
IBM United Kingdom Ltd
+44-20-8832-5167
+44-7802-245-584

email: martin_pac...@uk.ibm.com

Twitter ID: MartinPacker

They're figuring out that collaboration isn't a productivity hit, it 
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Re: Mainframe articles

The following message is a courtesy copy of an article
that has been posted to bit.listserv.ibm-main as well.


re:
http://www.garlic.com/~lynn/2009g.html#66 Mainframe articles
http://www.garlic.com/~lynn/2009g.html#67 Mainframe articles
http://www.garlic.com/~lynn/2009g.html#68 IT Infrastructure Slideshow: The IBM 
Mainframe: 50 Years of Big Iron Innovation

the pre-occupation with future system (which was going to replace all
370 ... in much the way 360 replaced all the stuff before it)
... resulted in the 370 software  hardware pipeline to drain. 
http://www.garlic.com/~lynn/submain.html#futuresys

when future system was killed, there was mad rush to get stuff back in
370 product pipeline ... and basically a 308x  370-xa effort was kicked
off (expected to take 6-8 yrs) ... in parallel with crash 303x, QD
stop-gap effort until 308x.

303x channel director was basically 158-3 processor engine with just
the integrated channel microcode and the 370 microcode removed

3031 was 158-3 with the integrated channel microcode removed (only 370
microcode) and reconfigured to work with 303x channel director
(i.e. 158-3 bascially multiplexed integrated channel microcode on 370
microcode on single engine, 3031 had two processor engines, one
dedicated to integrated channel microcode and one dedicated to 370
microcode)
http://www-03.ibm.com/ibm/history/exhibits/mainframe/mainframe_2423PH3031.html

3032 was 168-3 reconfigured to work with 303x channel director(s)
http://www-03.ibm.com/ibm/history/exhibits/mainframe/mainframe_2423PH3032.html

3033 started out as 168-3 wiring diagram mapped to faster chip
technology ... originally only going to abe 20% faster than 168-3.  the
chips were 20% faster ... the chips also had about ten times the
circuits per chip ... but using the 168-3 wiring diagrams would have
left all the additional circuits unused. during the 3033 development,
there were some critical path redesign that took advantage of the higher
onchip density resulting in 3033 being closer to 50% faster than 168-3.
http://www-03.ibm.com/ibm/history/exhibits/3033/3033_album.html

as soon as the 3033 was out the door ... that group started on 3090
(overlapped with 3081 activity).
http://www-03.ibm.com/ibm/history/exhibits/mainframe/mainframe_2423PH3090.html

initial 3081 ... was 3081D where each processor was about five mips ...
not a whole lot faster than 3033 two-processor. fairly quickly after
that, 3081K shipped with each processor about seven mips (14mips
aggregate).

3083 was bascially single 3081k processor with x-cache slowdown removed
so it ran about 15% faster or approx. 8mips
http://www-03.ibm.com/ibm/history/exhibits/mainframe/mainframe_2423PH3083.html

-- 
40+yrs virtualization experience (since Jan68), online at home since Mar1970

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TSSO Message TSSA305E

2009-05-12 Thread Hal Merritt

Just went to z/os 1.9 and running the updated version of TSSO. However, when a 
rule fires to issue a command, I receive TSSA305E.

I found only one comment in the archives (16 Oct 2008) that mentioned a local 
fix.

Anyone on z/os 1.9 see this problem and have a suggested fix?

Thanks!!

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Re: Mainframe articles

2009-05-12 Thread Tom Marchant

On Tue, 12 May 2009 07:14:32 -0400, Anne  Lynn Wheeler wrote:


3082 waas the service processor. One of the issues was that field
engineering required a boot-strap diagnostic process ... which started
with scoping failed components and going up from there. TCMs in 308x
were not scope'able ... so things started with a service processor
that was simpler technology and was scope'able ... then a working
service processor had all sorts of diagnostices instrumentation into the
TCMs.

This is similar to what Amdahl did with the 470 series.  It used a Data
General Nova processor for what they called the console processor.  Each
Multi-Chip Carrier (MCC) had circuitry to interface to the console
processor.  The MCC's were scope' able though, but it was rarely necessary
to scope them.

There were lots of issues with developing a roll-your-own operating
system and diagnostic applications for the service processor in the 308x
... so for the 3090 ... it was decided to go with a standard (low-end,
scope' able) 370 for the service process. The 3090 effort started out
with 4331 running a customized version of vm370 release six and all the
service screens implemented in cms ios3720.

Similarly, on the Amdahl 580 series, the DG Nova was replaced by a 370
processor that ran UTS (Universal Timesharing System perhaps  I forget),
which was the Unix system that Amdahl had been offering for the 370.  The
console processor on the 580 could not be scoped, though, as it was
implemented on one MCC in the pizza oven.  The MCC's on the 580s were
about 15 inches square, IIRC and slid into slots between the two side panels
that were used to connect them together.  We used to refer to the processor
cage as a pizza oven because of the way that the MCC's slid in.

-- 
Tom Marchant

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Re: 308x Processors - was Mainframe articles

2009-05-12 Thread Patrick Falcone

We had 3081's at a time share back in the mid 80's. At one point we took 2 
3081G's and had IBM put them together to form a 3084 Q64 w/PIF.

--- On Tue, 5/12/09, Martin Packer martin_pac...@uk.ibm.com wrote:

From: Martin Packer martin_pac...@uk.ibm.com
Subject: 308x Processors - was Mainframe articles
To: IBM-MAIN@bama.ua.edu
Date: Tuesday, May 12, 2009, 9:39 AM

3083 was Uni, 3081 was Dyadic (2 -way Non-Partitionable), 3084 was 
Partitionable 4-way. Base and X models with almost unrememberable model 
letters.

Interestingly, later on you could get a 1+1 2-way and a 2+1 3-way.  The 
benefits of these were larger caches (as you got 2 of them). I'm not sure 
who bought these, though.

Martin

Martin Packer
Performance Consultant
IBM United Kingdom Ltd
+44-20-8832-5167
+44-7802-245-584

email: martin_pac...@uk.ibm.com

Twitter ID: MartinPacker

They're figuring out that collaboration isn't a productivity hit,
it 
makes them smarter. Sam Palmisano on BlogCentral, 26 November 2008

Unless stated otherwise above:
IBM United Kingdom Limited - Registered in England and Wales with number 
741598. 
Registered office: PO Box 41, North Harbour, Portsmouth, Hampshire PO6 3AU

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Re: Mainframe articles

2009-05-12 Thread Bruno Sugliani

On Tue, 12 May 2009 11:03:04 +0200, Vernooy, C.P. - SPLXM
kees.vern...@klm.com wrote:



Bruno Sugliani oldti...@wanadoo.fr wrote in message
news:listserv%200905120314167138.0...@bama.ua.edu...
 On Tue, 12 May 2009 01:51:26 -0400, Scott T. Harder
 scottyt.har...@gmail.com wrote:

 Maybe it was a 3080 when I first logged on to TSO???  Sorry... a bit
foggy.
 
 I would guess a 3081

 Bruno Sugliani


I think so too.
A 3082 and 3083 were parts of the 3081 complex.
When you bolted 2 3081's together, you got a 3084.

Well i am not sure 
But as far as i remember)
The 3081 was a dyadic box made of 2 processors
But IIRC the 3083 was a box with only one processor 
And yes the 3084 was an MP made of 2 x 3081   
The 3082 was the processor controller ( 43xx with its 3370) 
the 3089 was the 400hz supply generator  
and the 3087 the cooling unit ( coming in 2 flavours air or water cooled)
But it was a long time ago so it is a bit hazy 

Bruno Sugliani 
zxnetconsult(at)free(dot)fr
http://zxnetconsult.free.fr
 

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Re: RACF Newbie question

2009-05-12 Thread Walt Farrell

On Mon, 11 May 2009 18:58:00 -0500, Paul Gilmartin paulgboul...@aim.com wrote:

[quoting someone, perhaps Mark Zelden]:
I guess the fact that it isn't documented could be called MVS System
Programming 101 on program fetch / system search order.   Pretty
much anything reentrant or non-executable like a table can be in LPA
instead of LNKLST.

Would this include Java byte code?

As Java .class files are not load modules, I would say no.  I think we can
assume that by anything reentrant Mark meant load modules (or program
objects), since that's what LPA and LNKLST contain.  Java byte code is just
data.

But you could, in theory, embed that data into a load module, and create a
special Java class loader that would know to look for its data in LPA
instead of looking for it in the UNIX file system, and would know how to
extract that data from the load module.  And then you could put Java byte
code into LPA.

Sounds like a fun project, but not one I have time for  :-)

-- 
Walt

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Re: ADRDSSU protection [was:RE: Using FTP to send loadlib]

Obviously some shops must be radically different.  In a full SMS shop, 
applications programmers of course have no business doing volume-level 
or volume-specific operations, and to prevent override of RACF access 
restrictions ADRDSSU ADMIN authority must be tightly restricted to those 
authorized to perform DASDAdmin functions; but for us to deny 
applications access to DFDSS for dataset level backup/restore functions 
on their own application datasets would be counterproductive.


We find that SMS configuration and conventions can reasonably be used to 
handle a few backups, but are completely inadequate for many others 
where the only kinds of backups that make sense are driven by 
application-level events, with sets of related datasets that must be 
handled as a consistent group, and/or with archival retention 
requirements that don't fit within the rather simplistic SMS management 
capabilities.


As a SysProg it is part of my responsibility to see that we can recover 
the data center as a whole to a point-in-time in the event of a data 
center failure.  But, I do not have the time, the inclination, or the 
responsibility to determine what additional backups many different 
individual application areas may need in order to recover from 
mini-disasters caused by application program failures, to reprocess old 
data because of changed end-user requirements, or to meet data archival 
requirements imposed by management or law specific to that application area.


Given that there are of necessity backups that must be designed by and 
maintained by non-SysProg, applications people who are the ones in the 
best position to understand their archival requirements, to deny them 
ADRDSSU, effectively limiting them to sequential file backups and 
awkward and inefficient file stacking on tape backups, makes little sense.

  JC Ewing

Obviously
Scott T. Harder wrote:

I can see where IF you have ALL the appropriate security profiles set up
properly, then I suppose I see your point.  For me, though, I would rather
cut off access completely.  I would ask Why do they need it?  If your SMS
constructs and ACS routines, and your backups, are all set up properly, why
do they need to be moving data around or backing it up with DSS???

I think my mom *did* say that once or twice, btw.  ;-)

All the best,
Scott T. Harder

-Original Message-
From: IBM Mainframe Discussion List [mailto:ibm-m...@bama.ua.edu]on Behalf
Of R.S.
Sent: Wednesday, May 06, 2009 4:28 AM
To: IBM-MAIN@bama.ua.edu
Subject: Re: ADRDSSU protection [was:RE: Using FTP to send loadlib]

Scott T. Harder pisze:

Sorry, guys.  In my world, Application Programmers have no business having
access to Storage Management utilities like DSS.  Period.  That needs to
remain a centralized function.


Why?
Because mama said that?
Poor justification.

In my shop appliccation prgrammers have access to any tool they want,
UNLESS it is dangerous, i.e. bypasses regular security checking.
That's why DSS is available to everyone, but STGADMIN.ADR.STGADMIN.** is
not.

--
Radoslaw Skorupka
Lodz, Poland

...

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Re: Mainframe articles

2009-05-12 Thread Ed Finnell

 
In a message dated 5/12/2009 8:20:44 A.M. Central Daylight Time,  
l...@garlic.com writes:

initial 3081 ... was 3081D where each processor was about five mips  ...
not a whole lot faster than 3033 two-processor. fairly quickly  after
that, 3081K shipped with each processor about seven mips  (14mips
aggregate).



Don't remember the details. The ACP versions  were
9081 and 9190? We tried to frontend IMS with  TPF
under VM on 4381's in mid 80's but was less  than successful.
Albeit a great learning  experience.




**A Good Credit Score is 700 or Above. See yours in just 2 easy 
steps! 
(http://pr.atwola.com/promoclk/100126575x1221322936x1201367173/aol?redir=http://www.freecreditreport.com/pm/default.aspx?sc=668072hmpgID=115bcd
=Mayfooter51209NO115)

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Re: ADRDSSU protection [was:RE: Using FTP to send loadlib]

2009-05-12 Thread Farley, Peter x23353

Thank you from this applications programmer for the most sensible and
reasonable answer and attitude I have yet seen.

It would be terrific if every systems programmer and storage
administrator and auditor and management were so enlightened.

Peter

 -Original Message-
 From: IBM Mainframe Discussion List [mailto:ibm-m...@bama.ua.edu] On
 Behalf Of Joel C Ewing
 Sent: Tuesday, May 12, 2009 10:58 AM
 To: IBM-MAIN@bama.ua.edu
 Subject: Re: ADRDSSU protection [was:RE: Using FTP to send loadlib]
 
 Obviously some shops must be radically different.  In a full SMS shop,
 applications programmers of course have no business doing volume-level
 or volume-specific operations, and to prevent override of RACF access
 restrictions ADRDSSU ADMIN authority must be tightly restricted to
those
 authorized to perform DASDAdmin functions; but for us to deny
 applications access to DFDSS for dataset level backup/restore
functions
 on their own application datasets would be counterproductive.
 
 We find that SMS configuration and conventions can reasonably be used
to
 handle a few backups, but are completely inadequate for many others
 where the only kinds of backups that make sense are driven by
 application-level events, with sets of related datasets that must be
 handled as a consistent group, and/or with archival retention
 requirements that don't fit within the rather simplistic SMS
management
 capabilities.
 
 As a SysProg it is part of my responsibility to see that we can
recover
 the data center as a whole to a point-in-time in the event of a data
 center failure.  But, I do not have the time, the inclination, or the
 responsibility to determine what additional backups many different
 individual application areas may need in order to recover from
 mini-disasters caused by application program failures, to reprocess
old
 data because of changed end-user requirements, or to meet data
archival
 requirements imposed by management or law specific to that application
 area.
 
 Given that there are of necessity backups that must be designed by and
 maintained by non-SysProg, applications people who are the ones in the
 best position to understand their archival requirements, to deny them
 ADRDSSU, effectively limiting them to sequential file backups and
 awkward and inefficient file stacking on tape backups, makes little
sense.
JC Ewing


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Fw: Re: 308x Processors - was Mainframe articles

2009-05-12 Thread Patrick Falcone

Correction they were 3081K 32's, one of the other posts jolted my memory back 
into focus. Sorry for the drift.

--- On Tue, 5/12/09, Patrick Falcone patrick.falco...@verizon.net wrote:

From: Patrick Falcone patrick.falco...@verizon.net
Subject: Re: 308x Processors - was Mainframe articles
To: IBM Mainframe Discussion List IBM-MAIN@bama.ua.edu
Date: Tuesday, May 12, 2009, 1:59 PM

We had 3081's at a time share back in the mid 80's. At one point we took 2 
3081G's and had IBM put them together to form a 3084 Q64 w/PIF.

--- On Tue, 5/12/09, Martin Packer martin_pac...@uk.ibm.com wrote:

From: Martin Packer martin_pac...@uk.ibm.com
Subject: 308x Processors - was Mainframe articles
To: IBM-MAIN@bama.ua.edu
Date: Tuesday, May 12, 2009, 9:39 AM

3083 was Uni, 3081 was Dyadic (2 -way Non-Partitionable), 3084 was 
Partitionable 4-way. Base and X models with almost unrememberable model 
letters.

Interestingly, later on you could get a 1+1 2-way and a 2+1 3-way.  The 
benefits of these were larger caches (as you got 2 of them). I'm not sure 
who bought these, though.

Martin

Martin Packer
Performance Consultant
IBM United Kingdom Ltd
+44-20-8832-5167
+44-7802-245-584

email: martin_pac...@uk.ibm.com

Twitter ID: MartinPacker

They're figuring out that collaboration isn't a productivity hit,
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makes them smarter. Sam Palmisano on BlogCentral, 26 November 2008

Unless stated otherwise above:
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Re: ADRDSSU protection [was:RE: Using FTP to send loadlib]

2009-05-12 Thread Roach, Dennis (N-GHG)

As a sysprog, I agree. 

For the applprog, verify what happens when a data set is on ML1 or ML2
and a masked include is used. DSS used to skip these and still have a
zero return code. This caused the application source to be left off of
their DR tapes.

Dennis Roach
GHG Corporation
Lockheed Martin Mission Services
Flight Design and Operations Contract
NASA/JSC
Address:
   2100 Space Park Drive 
   LM-15-4BH
   Houston, Texas 77058
Mail:
   P.O. Box 58487
   Mail Code H4C
   Houston, Texas 77258
Phone:
   Voice:  (281)336-5027
   Cell:   (713)591-1059
   Fax:(281)336-5410
E-Mail:  dennis.ro...@lmco.com

All opinions expressed by me are mine and may not agree with my employer
or any person, company, or thing, living or dead, on or near this or any
other planet, moon, asteroid, or other spatial object, natural or
manufactured, since the beginning of time.

 -Original Message-
 From: IBM Mainframe Discussion List [mailto:ibm-m...@bama.ua.edu] On
 Behalf Of Farley, Peter x23353
 Sent: Tuesday, May 12, 2009 10:16 AM
 To: IBM-MAIN@bama.ua.edu
 Subject: Re: ADRDSSU protection [was:RE: Using FTP to send loadlib]
 
 Thank you from this applications programmer for the most sensible and
 reasonable answer and attitude I have yet seen.
 
 It would be terrific if every systems programmer and storage
 administrator and auditor and management were so enlightened.
 
 Peter
 
  -Original Message-
  From: IBM Mainframe Discussion List [mailto:ibm-m...@bama.ua.edu] On
  Behalf Of Joel C Ewing
  Sent: Tuesday, May 12, 2009 10:58 AM
  To: IBM-MAIN@bama.ua.edu
  Subject: Re: ADRDSSU protection [was:RE: Using FTP to send loadlib]
 
  Obviously some shops must be radically different.  In a full SMS
 shop,
  applications programmers of course have no business doing volume-
 level
  or volume-specific operations, and to prevent override of RACF
access
  restrictions ADRDSSU ADMIN authority must be tightly restricted to
 those
  authorized to perform DASDAdmin functions; but for us to deny
  applications access to DFDSS for dataset level backup/restore
 functions
  on their own application datasets would be counterproductive.
 
  We find that SMS configuration and conventions can reasonably be
used
 to
  handle a few backups, but are completely inadequate for many others
  where the only kinds of backups that make sense are driven by
  application-level events, with sets of related datasets that must be
  handled as a consistent group, and/or with archival retention
  requirements that don't fit within the rather simplistic SMS
 management
  capabilities.
 
  As a SysProg it is part of my responsibility to see that we can
 recover
  the data center as a whole to a point-in-time in the event of a data
  center failure.  But, I do not have the time, the inclination, or
the
  responsibility to determine what additional backups many different
  individual application areas may need in order to recover from
  mini-disasters caused by application program failures, to reprocess
 old
  data because of changed end-user requirements, or to meet data
 archival
  requirements imposed by management or law specific to that
 application
  area.
 
  Given that there are of necessity backups that must be designed by
 and
  maintained by non-SysProg, applications people who are the ones in
 the
  best position to understand their archival requirements, to deny
them
  ADRDSSU, effectively limiting them to sequential file backups and
  awkward and inefficient file stacking on tape backups, makes little
 sense.
 JC Ewing
 
 
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Re: ADRDSSU protection [was:RE: Using FTP to send loadlib]

2009-05-12 Thread R.S.


Roach, Dennis (N-GHG) pisze:
As a sysprog, I agree. 


For the applprog, verify what happens when a data set is on ML1 or ML2
and a masked include is used. DSS used to skip these and still have a
zero return code. This caused the application source to be left off of
their DR tapes.


This is well-know and documented behavior. We shouldn't assume, that 
applprog is less intelligent than sysprog.

And this gotcha is no justification to for denying ADRDSSU at all.
Applprogs (everyone) can make mistake without ADRDSSU as well.
Applprogs are probably  allowed to use many tools which they don't know 
well.


--
Radoslaw Skorupka
Lodz, Poland


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Re: ADRDSSU protection [was:RE: Using FTP to send loadlib]

2009-05-12 Thread Mark Jacobs

R.S. wrote:
 Roach, Dennis (N-GHG) pisze:
 As a sysprog, I agree.
 For the applprog, verify what happens when a data set is on ML1 or ML2
 and a masked include is used. DSS used to skip these and still have a
 zero return code. This caused the application source to be left off of
 their DR tapes.

 This is well-know and documented behavior. We shouldn't assume, that
 applprog is less intelligent than sysprog.
 And this gotcha is no justification to for denying ADRDSSU at all.
 Applprogs (everyone) can make mistake without ADRDSSU as well.
 Applprogs are probably  allowed to use many tools which they don't
 know well.


Jobstep 1 - HRECALL with wait option
Jobstep 2 - DFDSS processing.

It's not rocket science.

-- 
Mark Jacobs
Time Customer Service
Tampa, FL


The avalanche has already started.  It is too late for 
the pebbles to vote.
-- Kosh, Babylon 5

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Re: ADRDSSU protection [was:RE: Using FTP to send loadlib]

2009-05-12 Thread O'Brien, David W. (NIH/CIT) [C]

Why not use HSM ABAR Backups which include migrated datasets?

Dave O'Brien
NIH Contractor

From: IBM Mainframe Discussion List [ibm-m...@bama.ua.edu] On Behalf Of Mark 
Jacobs [mark.jac...@custserv.com]
Sent: Tuesday, May 12, 2009 11:37 AM
To: IBM-MAIN@bama.ua.edu
Subject: Re: ADRDSSU protection [was:RE: Using FTP to send loadlib]

R.S. wrote:
 Roach, Dennis (N-GHG) pisze:
 As a sysprog, I agree.
 For the applprog, verify what happens when a data set is on ML1 or ML2
 and a masked include is used. DSS used to skip these and still have a
 zero return code. This caused the application source to be left off of
 their DR tapes.

 This is well-know and documented behavior. We shouldn't assume, that
 applprog is less intelligent than sysprog.
 And this gotcha is no justification to for denying ADRDSSU at all.
 Applprogs (everyone) can make mistake without ADRDSSU as well.
 Applprogs are probably  allowed to use many tools which they don't
 know well.

Jobstep 1 - HRECALL with wait option
Jobstep 2 - DFDSS processing.

It's not rocket science.

--
Mark Jacobs
Time Customer Service
Tampa, FL

The avalanche has already started.  It is too late for
the pebbles to vote.
-- Kosh, Babylon 5

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MULTACC and MULTSDN rule of thumb

2009-05-12 Thread Kirk Wolf

I'm writing a general purpose QSAM I/O library to be called from a
HLL, where the JCL / dynamic allocation / dataset label will supply
nearly all of the parameters (RECFM/BLKSIZE/LRECL, etc).   I would
like to make it perform well without requiring much in the way of
parameter tuning by the user (performance is a key factor since this
would be an alternative to a library that is slow).   Looking at the
new DCBE MULTACC and MULTSDN parameters, I was wondering is anyone
would have suggestions as to what would be reasonable defaults.

I was thinking of something like  MULTSDN=6 MULTACC=3

Any thoughts or suggestions would be appreciated.

Kirk Wolf
Dovetailed Technologies
http://dovetail.com

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Re: ADRDSSU protection [was:RE: Using FTP to send loadlib]

2009-05-12 Thread Paul Gilmartin

On Tue, 12 May 2009 17:31:43 +0200, R.S. wrote:

Roach, Dennis (N-GHG) pisze:
 As a sysprog, I agree.

 For the applprog, verify what happens when a data set is on ML1 or ML2
 and a masked include is used. DSS used to skip these and still have a
 zero return code. This caused the application source to be left off of
 their DR tapes.

This is well-know and documented behavior. We shouldn't assume, that
applprog is less intelligent than sysprog.
And this gotcha is no justification to for denying ADRDSSU at all.
Applprogs (everyone) can make mistake without ADRDSSU as well.
Applprogs are probably  allowed to use many tools which they don't know
well.

What, then, should one use to create a complete copy of one's data
such as might be needed for disaster recovery?

I could imagine a hirearchy of Requirements for dealing with this:

o An option to set nonzero return code when a data set is so skipped.

o An option to force recall of migrated data sets when needed.

o A similar option with an enhancement; a side door to  HSM so
  data could be moved directly from ML[12] to the backup medium,
  avoiding the double I/O otherwise necessary.  But that's the
  edge of a slippery slope; others could imagine the need for
  infrequent access to specific migrated data for which the
  overhead of recall and re-migrate appears onerous.

-- gil

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Re: ADRDSSU protection [was:RE: Using FTP to send loadlib]

2009-05-12 Thread Roach, Dennis (N-GHG)

It wasn't so well documented 25+ years ago.
Applprogs, just like sysprogs, make use of the most common command on a
computer, COPY. RTFM is generally a last resort.
We wrote affront end for DSS that checked the catalog, recalled what was
needed, then XCTLd to DSS.

Dennis Roach
GHG Corporation
Lockheed Martin Mission Services
Flight Design and Operations Contract
NASA/JSC
Address:
   2100 Space Park Drive 
   LM-15-4BH
   Houston, Texas 77058
Mail:
   P.O. Box 58487
   Mail Code H4C
   Houston, Texas 77258
Phone:
   Voice:  (281)336-5027
   Cell:   (713)591-1059
   Fax:(281)336-5410
E-Mail:  dennis.ro...@lmco.com

All opinions expressed by me are mine and may not agree with my employer
or any person, company, or thing, living or dead, on or near this or any
other planet, moon, asteroid, or other spatial object, natural or
manufactured, since the beginning of time.


 -Original Message-
 From: IBM Mainframe Discussion List [mailto:ibm-m...@bama.ua.edu] On
 Behalf Of Mark Jacobs
 Sent: Tuesday, May 12, 2009 10:38 AM
 To: IBM-MAIN@bama.ua.edu
 Subject: Re: ADRDSSU protection [was:RE: Using FTP to send loadlib]
 
 R.S. wrote:
  Roach, Dennis (N-GHG) pisze:
  As a sysprog, I agree.
  For the applprog, verify what happens when a data set is on ML1 or
 ML2
  and a masked include is used. DSS used to skip these and still have
 a
  zero return code. This caused the application source to be left off
 of
  their DR tapes.
 
  This is well-know and documented behavior. We shouldn't assume, that
  applprog is less intelligent than sysprog.
  And this gotcha is no justification to for denying ADRDSSU at all.
  Applprogs (everyone) can make mistake without ADRDSSU as well.
  Applprogs are probably  allowed to use many tools which they don't
  know well.
 
 
 Jobstep 1 - HRECALL with wait option
 Jobstep 2 - DFDSS processing.
 
 It's not rocket science.
 
 --
 Mark Jacobs
 Time Customer Service
 Tampa, FL
 
 
 The avalanche has already started.  It is too late for
 the pebbles to vote.
 -- Kosh, Babylon 5
 
 --
 For IBM-MAIN subscribe / signoff / archive access instructions,
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Re: ADRDSSU protection [was:RE: Using FTP to send loadlib]

2009-05-12 Thread O'Brien, David W. (NIH/CIT) [C]

Do you mean to say that you go to DR without your HSM environment?
That's what Duplexing is for, besides protecting against the odd bad tape.

Dave O'Brien
NIH Contractor

From: IBM Mainframe Discussion List [ibm-m...@bama.ua.edu] On Behalf Of Paul 
Gilmartin [paulgboul...@aim.com]
Sent: Tuesday, May 12, 2009 11:56 AM
To: IBM-MAIN@bama.ua.edu
Subject: Re: ADRDSSU protection [was:RE: Using FTP to send loadlib]

On Tue, 12 May 2009 17:31:43 +0200, R.S. wrote:

Roach, Dennis (N-GHG) pisze:
 As a sysprog, I agree.

 For the applprog, verify what happens when a data set is on ML1 or ML2
 and a masked include is used. DSS used to skip these and still have a
 zero return code. This caused the application source to be left off of
 their DR tapes.

This is well-know and documented behavior. We shouldn't assume, that
applprog is less intelligent than sysprog.
And this gotcha is no justification to for denying ADRDSSU at all.
Applprogs (everyone) can make mistake without ADRDSSU as well.
Applprogs are probably  allowed to use many tools which they don't know
well.

What, then, should one use to create a complete copy of one's data
such as might be needed for disaster recovery?

I could imagine a hirearchy of Requirements for dealing with this:

o An option to set nonzero return code when a data set is so skipped.

o An option to force recall of migrated data sets when needed.

o A similar option with an enhancement; a side door to  HSM so
  data could be moved directly from ML[12] to the backup medium,
  avoiding the double I/O otherwise necessary.  But that's the
  edge of a slippery slope; others could imagine the need for
  infrequent access to specific migrated data for which the
  overhead of recall and re-migrate appears onerous.

-- gil

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Re: VTOC Full

I interpreted the can live without as just an affirmation that 
applications could continue to access the volume without failure while 
the index delete/rebuild was in progress, not as a recommendation for 
running that way long-term.


We used to not put a VTOCIX on our spool volumes either, until we found 
an unexpected side effect at DR:  Using DFDSS with FlashCopy without 
copying the volser allows keeping both volumes online, and a subsequent 
DFDSS DUMP with dump conditioning allows the dump of the FlashCopy 
volume to be restored later with the original source volume volser - 
except that on a restore from a volume dump of a volume without a VTOCIX 
and without a VVDS, the correct original volser is not restored, just 
the FlashCopy volume volser!  Apparently with DFDSS and dump 
conditioning, the VTOCIX plays a role in determining the original source 
volser.

   JC Ewing

Mark Jacobs wrote:

Ted MacNEIL wrote:

Note that a nonSMS volume can live without a VTOC index.


But, it performs better with one.
IBM Canada always recommended putting one on the pack, even before SMS was 
announced.

Because

You also find free space.
-
Too busy driving to stop for gas!

--

...
  

There are only a couple of volumes that I don't request a vtocix,
usually volumes that only have one dataset like a page or spool volume.



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Re: ADRDSSU protection [was:RE: Using FTP to send loadlib]

2009-05-12 Thread Paul Gilmartin

On Tue, 12 May 2009 12:08:45 -0400, O'Brien, David W. (NIH/CIT) [C] wrote:

Do you mean to say that you go to DR without your HSM environment?

I'm not the sysprog; just a curious reader here.

That's what Duplexing is for, besides protecting against the odd bad tape.

-- gil

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Re: ADRDSSU protection [was:RE: Using FTP to send loadlib]

2009-05-12 Thread Roach, Dennis (N-GHG)

At the shop I was with at that time, yes.
O/S provided a running system with empty TMC, HSM, and catalogs.
Applications were responsible for their own DR plan and were required to
be recovered on ANY compatible MVS system.

At my current shop, a copy of every DASD volume and virtual tape volume
goes offsite.

Dennis Roach
GHG Corporation
Lockheed Martin Mission Services
Flight Design and Operations Contract
NASA/JSC
Address:
   2100 Space Park Drive 
   LM-15-4BH
   Houston, Texas 77058
Mail:
   P.O. Box 58487
   Mail Code H4C
   Houston, Texas 77258
Phone:
   Voice:  (281)336-5027
   Cell:   (713)591-1059
   Fax:(281)336-5410
E-Mail:  dennis.ro...@lmco.com

All opinions expressed by me are mine and may not agree with my employer
or any person, company, or thing, living or dead, on or near this or any
other planet, moon, asteroid, or other spatial object, natural or
manufactured, since the beginning of time.


 -Original Message-
 From: IBM Mainframe Discussion List [mailto:ibm-m...@bama.ua.edu] On
 Behalf Of O'Brien, David W. (NIH/CIT) [C]
 Sent: Tuesday, May 12, 2009 11:09 AM
 To: IBM-MAIN@bama.ua.edu
 Subject: Re: ADRDSSU protection [was:RE: Using FTP to send loadlib]
 
 Do you mean to say that you go to DR without your HSM environment?
 That's what Duplexing is for, besides protecting against the odd bad
 tape.
 
 Dave O'Brien
 NIH Contractor
 
 From: IBM Mainframe Discussion List [ibm-m...@bama.ua.edu] On Behalf
Of
 Paul Gilmartin [paulgboul...@aim.com]
 Sent: Tuesday, May 12, 2009 11:56 AM
 To: IBM-MAIN@bama.ua.edu
 Subject: Re: ADRDSSU protection [was:RE: Using FTP to send loadlib]
 
 On Tue, 12 May 2009 17:31:43 +0200, R.S. wrote:
 
 Roach, Dennis (N-GHG) pisze:
  As a sysprog, I agree.
 
  For the applprog, verify what happens when a data set is on ML1 or
 ML2
  and a masked include is used. DSS used to skip these and still have
 a
  zero return code. This caused the application source to be left off
 of
  their DR tapes.
 
 This is well-know and documented behavior. We shouldn't assume, that
 applprog is less intelligent than sysprog.
 And this gotcha is no justification to for denying ADRDSSU at all.
 Applprogs (everyone) can make mistake without ADRDSSU as well.
 Applprogs are probably  allowed to use many tools which they don't
 know
 well.
 
 What, then, should one use to create a complete copy of one's data
 such as might be needed for disaster recovery?
 
 I could imagine a hirearchy of Requirements for dealing with this:
 
 o An option to set nonzero return code when a data set is so skipped.
 
 o An option to force recall of migrated data sets when needed.
 
 o A similar option with an enhancement; a side door to  HSM so
   data could be moved directly from ML[12] to the backup medium,
   avoiding the double I/O otherwise necessary.  But that's the
   edge of a slippery slope; others could imagine the need for
   infrequent access to specific migrated data for which the
   overhead of recall and re-migrate appears onerous.
 
 -- gil
 
 --
 For IBM-MAIN subscribe / signoff / archive access instructions,
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Re: MULTACC and MULTSDN rule of thumb

2009-05-12 Thread Martin Packer

Hi Kirk!

It's probable we documented this in SG24-2557 Parallel Sysplex Batch 
Performance in 1995. We talked A LOT about QSAM performance. (This is 
where Dave Betten of DFSORT Development REALLY went to town. :-) NOT my 
chapters.)

Let me know if you need anything in this area.

Cheers, Martin

Martin Packer
Performance Consultant
IBM United Kingdom Ltd
+44-20-8832-5167
+44-7802-245-584

email: martin_pac...@uk.ibm.com

Twitter ID: MartinPacker

They're figuring out that collaboration isn't a productivity hit, it 
makes them smarter. Sam Palmisano on BlogCentral, 26 November 2008



From:
Kirk Wolf k...@dovetail.com
To:
IBM-MAIN@bama.ua.edu
Date:
12/05/2009 16:47
Subject:
MULTACC and MULTSDN rule of thumb
Sent by:
IBM Mainframe Discussion List IBM-MAIN@bama.ua.edu



I'm writing a general purpose QSAM I/O library to be called from a
HLL, where the JCL / dynamic allocation / dataset label will supply
nearly all of the parameters (RECFM/BLKSIZE/LRECL, etc).   I would
like to make it perform well without requiring much in the way of
parameter tuning by the user (performance is a key factor since this
would be an alternative to a library that is slow).   Looking at the
new DCBE MULTACC and MULTSDN parameters, I was wondering is anyone
would have suggestions as to what would be reasonable defaults.

I was thinking of something like  MULTSDN=6 MULTACC=3

Any thoughts or suggestions would be appreciated.

Kirk Wolf
Dovetailed Technologies
http://dovetail.com

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Unless stated otherwise above:
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Registered office: PO Box 41, North Harbour, Portsmouth, Hampshire PO6 3AU






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Adding CPU engines without IPL

2009-05-12 Thread Horne, Jim - James S

Hi all,

We are planning to upgrade one of our 2094s dynamically from a 712 to a 714.  
IBM assures us that their stuff will work.  Since we have the two engines in 
reserve our understanding is that we can simply configure them online without 
an IPL or Activate.  My question is in two parts.  Has anyone done this and 
were there any issues with third party products?

Thanks,

Jim Horne
Systems Programmer
Large Systems Engineering  Messaging NC4IT
Lowe's Companies, Inc.
1000 Lowe's Boulevard
Mooresville, NC
704-758-5354
jim.ho...@lowes.commailto:jim.ho...@lowes.com




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Re: Adding CPU engines without IPL

2009-05-12 Thread Cebell, David

We have done that twice here.
Ho IPL just configured it on line.

Since the CPU serial number does not change,
There was no problem with third party software.


-Original Message-
From: IBM Mainframe Discussion List [mailto:ibm-m...@bama.ua.edu] On
Behalf Of Horne, Jim - James S
Sent: Tuesday, May 12, 2009 12:09 PM
To: IBM-MAIN@bama.ua.edu
Subject: Adding CPU engines without IPL

Hi all,

We are planning to upgrade one of our 2094s dynamically from a 712 to a
714.  IBM assures us that their stuff will work.  Since we have the two
engines in reserve our understanding is that we can simply configure
them online without an IPL or Activate.  My question is in two parts.
Has anyone done this and were there any issues with third party
products?

Thanks,

Jim Horne
Systems Programmer
Large Systems Engineering  Messaging NC4IT
Lowe's Companies, Inc.
1000 Lowe's Boulevard
Mooresville, NC
704-758-5354
jim.ho...@lowes.commailto:jim.ho...@lowes.com




NOTICE:
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Re: Adding CPU engines without IPL

2009-05-12 Thread Mark Jacobs

Horne, Jim - James S wrote:
 Hi all,

 We are planning to upgrade one of our 2094s dynamically from a 712 to a 714.  
 IBM assures us that their stuff will work.  Since we have the two engines in 
 reserve our understanding is that we can simply configure them online without 
 an IPL or Activate.  My question is in two parts.  Has anyone done this and 
 were there any issues with third party products?

 Thanks,

 Jim Horne
 Systems Programmer
 Large Systems Engineering  Messaging NC4IT
 Lowe's Companies, Inc.
 1000 Lowe's Boulevard
 Mooresville, NC
 704-758-5354
 jim.ho...@lowes.commailto:jim.ho...@lowes.com



   
I assume that you aren't talking about vendor authorization checking
since the model number will change? Otherwise you shouldn't have a problem.

-- 
Mark Jacobs
Time Customer Service
Tampa, FL


The avalanche has already started.  It is too late for 
the pebbles to vote.
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Re: Adding CPU engines without IPL

2009-05-12 Thread Mark Jacobs

Cebell, David wrote:
 We have done that twice here.
 Ho IPL just configured it on line.

 Since the CPU serial number does not change,
 There was no problem with third party software.


   

Some products do check for model number (number of CPU's) however.

snip

-- 
Mark Jacobs
Time Customer Service
Tampa, FL


The avalanche has already started.  It is too late for 
the pebbles to vote.
-- Kosh, Babylon 5

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VSMLOC results questin

2009-05-12 Thread Paul Schuster

Hello:

 If you do (for example) a VSMLOC PVT,AREA=((R4),(R0)),TCB=VSMLCTCB
by one task (I will call it TCB123) and it  completes RC=0, but the TCB
returned in the VSMLCTCB field is another task (I will call it TCB456), what
is this really telling me?  The RC=0 (at the time VSMLOC processing
determined it was to be RC=0) says that the The specified virtual storage
area is allocated., but...


1) Can the TCB123 task really access this storage successfully? (Assume this
is just key-8 non-fetch-protected storage, and I want to access  read-only)

2) Is there not the possibility that after VSMLOC has determined it will
return a RC=0, that the TCB456 task could freemain (release) this storage?

I am trying to understand better the RC=0 when the TCB that has obtained the
storage (TCB456) is different than the TCB issuing the VSMLOC (TCB123).

Thank you.

Paul 

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Re: Adding CPU engines without IPL

2009-05-12 Thread Field, Alan C.

Jim, we just turned a 706 into a 707. IBM's stuff works great. No
issues. 
We also turned a 703 into a 603, no issues.

Are your HMC IMAGE profiles defined with reserved engines? That's a
requirement. 

After they get done just CF CPU(xx),ONLINE.

As to the ISVs, we notified them. Some products care about the
MSUs/MIPS, some care about model numbers, some only care about serial
numbers.

Some vendors thanked us and updated their records, some sent us new
product keys. 

Alan  



-Original Message-
From: IBM Mainframe Discussion List [mailto:ibm-m...@bama.ua.edu] On
Behalf Of Horne, Jim - James S
Sent: Tuesday, May 12, 2009 12:09 
To: IBM-MAIN@bama.ua.edu
Subject: Adding CPU engines without IPL

Hi all,

We are planning to upgrade one of our 2094s dynamically from a 712 to a
714.  IBM assures us that their stuff will work.  Since we have the two
engines in reserve our understanding is that we can simply configure
them online without an IPL or Activate.  My question is in two parts.
Has anyone done this and were there any issues with third party
products?

Thanks,

Jim Horne
Systems Programmer
Large Systems Engineering  Messaging NC4IT
Lowe's Companies, Inc.
1000 Lowe's Boulevard
Mooresville, NC
704-758-5354
jim.ho...@lowes.commailto:jim.ho...@lowes.com

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Re: Adding CPU engines without IPL

2009-05-12 Thread Horne, Jim - James S

Thanks, Alan.  If I understand you right you're going with the old systems 
programmer Standard Reply #1, It depends.

Which is pretty much what we thought .

Jim Horne 
Systems Programmer 
Large Systems Engineering  Messaging NC4IT 
Lowe's Companies, Inc. 
1000 Lowe's Boulevard
Mooresville, NC 
704-758-5354 
jim.ho...@lowes.com

-Original Message-
From: IBM Mainframe Discussion List [mailto:ibm-m...@bama.ua.edu] On Behalf Of 
Field, Alan C.
Sent: Tuesday, May 12, 2009 1:32 PM
To: IBM-MAIN@bama.ua.edu
Subject: Re: Adding CPU engines without IPL

Jim, we just turned a 706 into a 707. IBM's stuff works great. No
issues. 
We also turned a 703 into a 603, no issues.

Are your HMC IMAGE profiles defined with reserved engines? That's a
requirement. 

After they get done just CF CPU(xx),ONLINE.

As to the ISVs, we notified them. Some products care about the
MSUs/MIPS, some care about model numbers, some only care about serial
numbers.

Some vendors thanked us and updated their records, some sent us new
product keys. 

Alan  



-Original Message-
From: IBM Mainframe Discussion List [mailto:ibm-m...@bama.ua.edu] On
Behalf Of Horne, Jim - James S
Sent: Tuesday, May 12, 2009 12:09 
To: IBM-MAIN@bama.ua.edu
Subject: Adding CPU engines without IPL

Hi all,

We are planning to upgrade one of our 2094s dynamically from a 712 to a
714.  IBM assures us that their stuff will work.  Since we have the two
engines in reserve our understanding is that we can simply configure
them online without an IPL or Activate.  My question is in two parts.
Has anyone done this and were there any issues with third party
products?

Thanks,

Jim Horne
Systems Programmer
Large Systems Engineering  Messaging NC4IT
Lowe's Companies, Inc.
1000 Lowe's Boulevard
Mooresville, NC
704-758-5354
jim.ho...@lowes.commailto:jim.ho...@lowes.com

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Re: Fw: Re: 308x Processors - was Mainframe articles

The following message is a courtesy copy of an article
that has been posted to bit.listserv.ibm-main as well.

patrick.falco...@verizon.net (Patrick Falcone) writes:
 Correction they were 3081K 32's, one of the other posts jolted my
 memory back into focus. Sorry for the drift.

re:
http://www.garlic.com/~lynn/2009g.html#66 Mainframe articles
http://www.garlic.com/~lynn/2009g.html#67 Mainframe articles
http://www.garlic.com/~lynn/2009g.html#68 IT Infrastructure Slideshow: The IBM 
Mainframe: 50 Years of Big Iron Innovation
http://www.garlic.com/~lynn/2009g.html#70 Mainframe articles

3033 and 3081 in 370 mode were 24bit (16mbyte) addressing (real 
virtual).

issue was that disk thruputs weren't keeping pace with the rest of the
system infrastructure ... i.e. processing  memory performance was
increasing faster than disk performance.

I had started pontificating in the 70s about the growing performance
mismatch. what was happening was that increasing amounts of electronic
storage (starting with real memory on the processor and then disk
controller cache) was being used to cache disk information to compensate
for the increasing disk thruput bottleneck.

this is referencing comparing 360/67 to 3081k (separated by almost 15
yrs) running similar (virtual machine) CMS workload ... and claiming
that relative system disk thruput had declined by a factor of ten times
in the period.
http://www.garlic.com/~lynn/93.html#31 Big I/O or Kicking the Mainframe out the 
Door

some disk division executives took some offense with the claims and
assigned the division performance group to refute my statements. after a
few weeks, the group came back and effectively said that I had slightly
understated the problem.  That study eventually turned into a SHARE (63)
presentation (B874) recommending how to configure/manage disks to
improve system thruput. old post with reference:
http://www.garlic.com/~lynn/2006f.html#3 using 3390 mod-9s
http://www.garlic.com/~lynn/2006o.html#68 DASD Response Time (on antique 3390?)

in any case, it was starting to become a real issue in the 3033
time-frame. it was possible to configure vm clusters of 4341s with
higher aggregate thruput than 3033 at a lower cost. furthermore, each
4341 could have 16mbytes (and six i/o channels) compared to 3033's with
16mbytes (and 16 i/o channels).

to somewhat address/compensate ... there was a hardware hack to have
3033 configured with 32mbytes of real storage (even though the processor
was restricted to both real  virtual 16mbytes addressing).

the hack involved 

1) using (31bit) IDALs to being able to do I/O for real addresses above
16mbyte line (most importantly being able to read/write pages above
the line)

2) page table entry was defined as 16bits, 12bit page number (4096
4096byte pages or 16mbytes), 2 defined bits and 2 undefined bits. the
two undefined bits were re-allocated for prepending to the page number
allowing up to 16384 4096byte pages or up to 64mbytes real storage,
but only max. of 16mbytes per virtual address space).

...

lots of things would require virtual pages, that were above the
(16mbyte) line to be brought into the first 16mbytes of real storage.
initially there was a definition where the software would write the
(above the line) virtual page out to disk and then read it back into
real storage (below the line). I generated some example code that
involved special virtual address space and fiddling the real page
numbers in two page table entries ... allowing 4k of real storage above
the line to be copied/moved to 4k of real storage below the line
(avoiding having to write to disk and read back in).

this hack (for real storage 16mbytes) was carried forward for 3081s
operating in 370 (24bit, 16mbyte) addressing mode.

a few past posts discussing (3033/3081) 16mbyte
http://www.garlic.com/~lynn/2004o.html#59 Integer types for 128-bit addressing
http://www.garlic.com/~lynn/2006m.html#27 Old Hashing Routine
http://www.garlic.com/~lynn/2006t.html#15 more than 16mbyte support for 370
http://www.garlic.com/~lynn/2006w.html#23 Multiple mappings
http://www.garlic.com/~lynn/2006y.html#9 The Future of CPUs: What's After 
Multi-Core?
http://www.garlic.com/~lynn/2007b.html#34 Just another example of mainframe 
costs
http://www.garlic.com/~lynn/2007g.html#59 IBM to the PCM market(the sky is 
falling!!!the sky is falling!!)
http://www.garlic.com/~lynn/2008f.html#12 
Fantasy-Land_Hierarchal_NUMA_Memory-Model_on_Vertical
http://www.garlic.com/~lynn/2009d.html#48 Mainframe Hall of Fame: 17 New 
Members Added

and some number of past posts mentioning vm/4341 clusters
http://www.garlic.com/~lynn/2001m.html#15 departmental servers
http://www.garlic.com/~lynn/2004o.html#57 Integer types for 128-bit addressing
http://www.garlic.com/~lynn/2005.html#34 increasing addressable memory via 
paged memory?
http://www.garlic.com/~lynn/2005n.html#11 Code density and performance?
http://www.garlic.com/~lynn/2005p.html#1 Intel engineer discusses their 
dual-core design

Re: Adding CPU engines without IPL

2009-05-12 Thread Jerry Whitteridge

We do it here all the time too. 

You will quickly find out which products are engine/model specific and
which are serial number specific. As the others have said the IBM code
just works -- the 3rd party stuff is as you suggest it depends

Jerry Whitteridge
Mainframe Engineering
Safeway Inc
925 951 4184
jerry.whitteri...@safeway.com
If everything seems under control, you're just not going fast enough. 
 

 -Original Message-
 From: IBM Mainframe Discussion List 
 [mailto:ibm-m...@bama.ua.edu] On Behalf Of Horne, Jim - James S
 Sent: Tuesday, May 12, 2009 10:09 AM
 To: IBM-MAIN@bama.ua.edu
 Subject: Adding CPU engines without IPL
 
 Hi all,
 
 We are planning to upgrade one of our 2094s dynamically from 
 a 712 to a 714.  IBM assures us that their stuff will work.  
 Since we have the two engines in reserve our understanding is 
 that we can simply configure them online without an IPL or 
 Activate.  My question is in two parts.  Has anyone done this 
 and were there any issues with third party products?
 
 Thanks,
 
 Jim Horne
 Systems Programmer
 Large Systems Engineering  Messaging NC4IT
 Lowe's Companies, Inc.
 1000 Lowe's Boulevard
 Mooresville, NC
 704-758-5354
 jim.ho...@lowes.commailto:jim.ho...@lowes.com
 
 
 
 
 NOTICE:
 All information in and attached to the e-mail(s) below may be 
 proprietary, confidential, privileged and otherwise protected 
 from improper or erroneous disclosure.  If you are not the 
 sender's intended recipient, you are not authorized to 
 intercept, read, print, retain, copy, forward, or disseminate 
 this message.  If you have erroneously received this 
 communication, please notify the sender immediately by phone
 (704-758-1000) or by e-mail and destroy all copies of this 
 message (electronic, paper, or otherwise).  Thank you.
 
 
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Re: Fw: Re: 308x Processors - was Mainframe articles

2009-05-12 Thread Thompson, Steve

-Original Message-
From: IBM Mainframe Discussion List [mailto:ibm-m...@bama.ua.edu] On
Behalf Of Anne  Lynn Wheeler
Sent: Tuesday, May 12, 2009 12:40 PM
To: IBM-MAIN@bama.ua.edu
Subject: Re: Fw: Re: 308x Processors - was Mainframe articles

SNIP

3033 and 3081 in 370 mode were 24bit (16mbyte) addressing (real 
virtual).

SNIPPAGE

Didn't the 30xx machines have 26 bit addressing (the 3033 mode) when
operating in S/370 mode? Starting with the 3033MP?

Regards,
Steve Thompson

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Batch Process Calling a Web Service

2009-05-12 Thread George.William

This is just an initial concept question.
In general, what mechanism could;

*   a batch job, most likely an Enterprise COBOL batch program, 
*   connect with a web service and request information from some 
application the web service connects with outside of the mainframe world
*   receive a response back from said application
or if no response, be able to deal with a 404 
(timeout, service not available, basically no response) type situation
*   and then go about it batch processing with the returned information

We are at the pre-pre-concept of this and just looking for ideas.
Thanks
Bill George

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Re: Adding CPU engines without IPL

2009-05-12 Thread Al Sherkow

Hi Jim --

I think the engines just be in the LPAR configuration as 'reserved' at the
previous IPL for MVS to recognize them. PR/SM can use additional engines
lowering the logical to physical ratio, but MVS only builds enough control
blocks on for the number of initial engines plus the number of reserved
engines. 

This may have been improved with recent releases of z/OS but this was
certainly an issue in the past.

Regards,

Al
---
Al Sherkow, I/S Management Strategies, Ltd.
Consulting Expertise on Capacity Planning, Performance Tuning,
zPricing, LPARs, IRD and LCS Software

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Re: Batch Process Calling a Web Service

2009-05-12 Thread Kirk Wolf

If you are interested in using Java in a batch job step (as a web
service client), there is an example of this in the JZOS Cookbook,
available on alphaWorks:

http://www.alphaworks.ibm.com/tech/zosjavabatchtk

Kirk Wolf
Dovetailed Technologies

On Tue, May 12, 2009 at 12:49 PM, George.William
william.geo...@ftb.ca.gov wrote:
 This is just an initial concept question.
 In general, what mechanism could;

 *       a batch job, most likely an Enterprise COBOL batch program,
 *       connect with a web service and request information from some
 application the web service connects with outside of the mainframe world
 *       receive a response back from said application
 or if no response, be able to deal with a 404
 (timeout, service not available, basically no response) type situation
 *       and then go about it batch processing with the returned information

 We are at the pre-pre-concept of this and just looking for ideas.
 Thanks
 Bill George

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Re: Adding CPU engines without IPL

2009-05-12 Thread David Hanson

I have been through this a few times. IBM stuff was no problem. We had a few
vendor keys to apply because of license agreements and they checked the
whole model # not just the first four 4 bytes. On the fly at 5:00 p.m.

Thanks, Dave Hanson
315-464-8889
SUNY Upstate Medical University


 Horne, Jim - James S jim.s.ho...@lowes.com 5/12/2009 1:09 PM 
Hi all,

We are planning to upgrade one of our 2094s dynamically from a 712 to a
714.  IBM assures us that their stuff will work.  Since we have the two
engines in reserve our understanding is that we can simply configure them
online without an IPL or Activate.  My question is in two parts.  Has anyone
done this and were there any issues with third party products?

Thanks,

Jim Horne
Systems Programmer
Large Systems Engineering  Messaging NC4IT
Lowe's Companies, Inc.
1000 Lowe's Boulevard
Mooresville, NC
704-758-5354
jim.ho...@lowes.commailto:jim.ho...@lowes.com




NOTICE:
All information in and attached to the e-mail(s) below may be proprietary,
confidential, privileged and otherwise protected from improper or erroneous
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authorized to intercept, read, print, retain, copy, forward, or disseminate
this message.  If you have erroneously received this communication, please
notify the sender immediately by phone
(704-758-1000) or by e-mail and destroy all copies of this message
(electronic, paper, or otherwise).  Thank you.


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Re: VSMLOC results questin

2009-05-12 Thread Tony Harminc

2009/5/12 Paul Schuster pgs4ibmm...@pacbell.net:

  If you do (for example) a VSMLOC PVT,AREA=((R4),(R0)),TCB=VSMLCTCB
 by one task (I will call it TCB123) and it  completes RC=0, but the TCB
 returned in the VSMLCTCB field is another task (I will call it TCB456), what
 is this really telling me?  The RC=0 (at the time VSMLOC processing
 determined it was to be RC=0) says that the The specified virtual storage
 area is allocated., but...


 1) Can the TCB123 task really access this storage successfully? (Assume this
 is just key-8 non-fetch-protected storage, and I want to access  read-only)

Sure - it's in the same address space. Other than key protection, and
perhaps very odd cases like page protection or something, you can
access it.

 2) Is there not the possibility that after VSMLOC has determined it will
 return a RC=0, that the TCB456 task could freemain (release) this storage?

Absolutely. It could be freed, and then even allocated by yet another
TCB (or an SRB), have its protection key changed, and be used for some
unrelated purpose, all between the VSMLOC and the next instruction in
your program. Unless you are holding some probably-inadvisably-strong
lock, you really cannot use a non-atomic sequence to check access and
then use the storage. VSMLOC/VSMLIST are very good for reporting on
storage usage in an application (typically a long-running, server type
of thing), but it is not the way to implement any kind of security
controls, or determine in advance if it is safe to reference the
storage at an address.

 I am trying to understand better the RC=0 when the TCB that has obtained the
 storage (TCB456) is different than the TCB issuing the VSMLOC (TCB123).

It's very normal to share subpools among TCBs, which would allow
TCB123 to release storage obtained by TCB456. But even if they are not
in a shared subpool, there is still addressibility.

Tony H.

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Re: VSMLOC results questin

2009-05-12 Thread Binyamin Dissen

On Tue, 12 May 2009 12:20:42 -0500 Paul Schuster pgs4ibmm...@pacbell.net
wrote:

: If you do (for example) a VSMLOC PVT,AREA=((R4),(R0)),TCB=VSMLCTCB
:by one task (I will call it TCB123) and it  completes RC=0, but the TCB
:returned in the VSMLCTCB field is another task (I will call it TCB456), what
:is this really telling me?  The RC=0 (at the time VSMLOC processing
:determined it was to be RC=0) says that the The specified virtual storage
:area is allocated., but...

Yes.

:1) Can the TCB123 task really access this storage successfully? (Assume this
:is just key-8 non-fetch-protected storage, and I want to access  read-only)

:2) Is there not the possibility that after VSMLOC has determined it will
:return a RC=0, that the TCB456 task could freemain (release) this storage?

:I am trying to understand better the RC=0 when the TCB that has obtained the
:storage (TCB456) is different than the TCB issuing the VSMLOC (TCB123).

If you hold the LOCAL lock, the storage will be around regardless if it is of
the current task or some other task. If the lock is not held, even storage
allocated to the current task can do away - yes, Virginia, one can freemain
storage owned by a different task.

The real question is - why do you need this information? What is your real
business need?

--
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http://www.dissensoftware.com

Director, Dissen Software, Bar  Grill - Israel


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Re: Batch Process Calling a Web Service

2009-05-12 Thread George.William

Thanks, I'll see what this entails from our batch side.

-Original Message-
From: IBM Mainframe Discussion List [mailto:ibm-m...@bama.ua.edu]on
Behalf Of Kirk Wolf
Sent: Tuesday, May 12, 2009 11:03 AM
To: IBM-MAIN@bama.ua.edu
Subject: Re: Batch Process Calling a Web Service

If you are interested in using Java in a batch job step (as a web
service client), there is an example of this in the JZOS Cookbook,
available on alphaWorks:

http://www.alphaworks.ibm.com/tech/zosjavabatchtk

Kirk Wolf
Dovetailed Technologies

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Re: Mainframe articles

re:
http://www.garlic.com/~lynn/2009g.html#66 Mainframe articles
http://www.garlic.com/~lynn/2009g.html#67 Mainframe articles
http://www.garlic.com/~lynn/2009g.html#68 IT Infrastructure Slideshow: The IBM 
Mainframe: 50 Years of Big Iron Innovation
http://www.garlic.com/~lynn/2009g.html#70 Mainframe articles
http://www.garlic.com/~lynn/2009g.html#71 Mainframe articles

for totally unrelated 3081k topic drift 

I was also doing HSDT (high-speed data transport) project and connecting
it to the internal network running high-speed links (full duplex T1 and
faster).

The internal network was larger than the arpanet/internet from just
about the beginning until possibly late '85 or early '86. The internal
network also required all links leaving physical corporate property to
be encrypted. Somebody commented in '85 time-frame that the internal
network had over half of all link encryptors in the world. This was not
bad for 56kbit links ... but it started to become much more of problem
when running at (full-duplex) T1 (1.5mbits/sec in each direction) and
higher speeds.

old email mentioning internal network approaching 2000 nodes and
needing a whole lot of (DES) link encryptors
http://www.garlic.com/~lynn/2006t.html#email850625
in this post
http://www.garlic.com/~lynn/2006t.html#50

old email complaing that (370) software DES was taking about 1 sec.
of 3081K processor time per 150kbytes ... which would require full,
dedicated 3081K to handle sustained full-duplex T1
http://www.garlic.com/~lynn/2006n.html#email841115
in this post
http://www.garlic.com/~lynn/2006n.html#36

for other drift, one friday (in that time-frame), somebody from the
communication group set-out an announcement for a new networking
discussion conference on the internal network ... which included the
following definition:

  low-speed   9.6kbits
  medium-speed19.2kbits
  high-speed  56kbits
  very high-speed 1.5mbits

that weekend I left on business trip to the other side of the pacific
to look at getting some hardware for HSDT project ... and monday
morning on a wall of a conference room there was the following:

  low-speed   20mbits
  medium-speed100mbits
  high-speed  200-300mbits
  very high-speed 600mbits

-- 
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Re: Fw: Re: 308x Processors - was Mainframe articles

steve_thomp...@stercomm.com (Thompson, Steve) writes:
 SNIP

 3033 and 3081 in 370 mode were 24bit (16mbyte) addressing (real 
 virtual).

 SNIPPAGE

 Didn't the 30xx machines have 26 bit addressing (the 3033 mode) when
 operating in S/370 mode? Starting with the 3033MP?

re:
http://www.garlic.com/~lynn/2009g.html#71 308x Processors - was Mainframe 
articles

... the 3033 had special page table entry definition for 14-bit real
page number (16384 4096byte real pages or 64mbytes).

the internal 3033 hardware could address more than 16mbites ... but
instructions (both real and virtual) were limited to 24bits.

3033 hardware hack for 16mbytes ... supported 16mbyte effective
addresses from (31bit) IDALs or as output of virtual address translation
(using 14bit page number in the page number entry).

however instruction addressing (whether running in virtual addressing
mode or running w/o virtual address translation turned on) was still
limited to 24bit addressing.

the 32mbyte option was independent of 3033mp.

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Re: Adding CPU engines without IPL

We are planning to upgrade one of our 2094s dynamically from a 712 to a 714.
IBM assures us that their stuff will work.  

IBM's products do work.

Since we have the two engines in reserve our understanding is that we can 
simply configure them online without an IPL or Activate.

This will work if you have extra CP's in the RSVD field for the image profile.
If you don't, you will have to re-set, re-activate  re-IPL.

My question is in two parts.
Has anyone done this

I've done it many times on a z/990.
It only works if the engines are available.
And, you have to have them configured in RSVD.
(IBM has recommended, for years, that the reserved CP's be the difference 
between the maximum configurable and the current online).
Eventually, you will have to update the image profile; the reserved engines 
will be offline at the next IPL.


and were there any issues with third party products?

It depends on the product.
CA, for example, has each logical CPU serial number in its licence keys.
SYNCHSORT, as another, allows 60-90 days before the product(s) expire.
Others don't care.

You will have to call (or get somebody to) call all your vendors.
With time zones, and differing hours of service, you may find this the most 
time consuming part of the process.
-
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Re: ADRDSSU protection [was:RE: Using FTP to send loadlib]

2009-05-12 Thread Scott T. Harder

Joes (and Radoslaw),

You both have moved me more towards the center, certainly, of this
issue.  Excellent points.  I just was brought up in a centralized
environment, where CONTROL and MANAGED storage were the words of the
day.  How do you coordinate recovery well when there are multiple
groups, both in and outside the data center, responsible for
recovering everything?  Obviously, it can be done, but much harder
IMO.

Products such as ABARS (ok... I know) and other 3rd party DR backup
products can group application data set backups together - on a point
in time - and allow for proper recovery.  That, of course, takes money
though and I can see where your model would make sense and work.

All the best,
Scott T. Harder

On 5/12/09, Joel C Ewing jcew...@acm.org wrote:
 Obviously some shops must be radically different.  In a full SMS shop,
 applications programmers of course have no business doing volume-level
 or volume-specific operations, and to prevent override of RACF access
 restrictions ADRDSSU ADMIN authority must be tightly restricted to those
 authorized to perform DASDAdmin functions; but for us to deny
 applications access to DFDSS for dataset level backup/restore functions
 on their own application datasets would be counterproductive.

 We find that SMS configuration and conventions can reasonably be used to
 handle a few backups, but are completely inadequate for many others
 where the only kinds of backups that make sense are driven by
 application-level events, with sets of related datasets that must be
 handled as a consistent group, and/or with archival retention
 requirements that don't fit within the rather simplistic SMS management
 capabilities.

 As a SysProg it is part of my responsibility to see that we can recover
 the data center as a whole to a point-in-time in the event of a data
 center failure.  But, I do not have the time, the inclination, or the
 responsibility to determine what additional backups many different
 individual application areas may need in order to recover from
 mini-disasters caused by application program failures, to reprocess old
 data because of changed end-user requirements, or to meet data archival
 requirements imposed by management or law specific to that application area.

 Given that there are of necessity backups that must be designed by and
 maintained by non-SysProg, applications people who are the ones in the
 best position to understand their archival requirements, to deny them
 ADRDSSU, effectively limiting them to sequential file backups and
 awkward and inefficient file stacking on tape backups, makes little sense.
JC Ewing

 Obviously
 Scott T. Harder wrote:
 I can see where IF you have ALL the appropriate security profiles set up
 properly, then I suppose I see your point.  For me, though, I would rather
 cut off access completely.  I would ask Why do they need it?  If your
 SMS
 constructs and ACS routines, and your backups, are all set up properly,
 why
 do they need to be moving data around or backing it up with DSS???

 I think my mom *did* say that once or twice, btw.  ;-)

 All the best,
 Scott T. Harder

 -Original Message-
 From: IBM Mainframe Discussion List [mailto:ibm-m...@bama.ua.edu]on Behalf
 Of R.S.
 Sent: Wednesday, May 06, 2009 4:28 AM
 To: IBM-MAIN@bama.ua.edu
 Subject: Re: ADRDSSU protection [was:RE: Using FTP to send loadlib]

 Scott T. Harder pisze:
 Sorry, guys.  In my world, Application Programmers have no business
 having
 access to Storage Management utilities like DSS.  Period.  That needs to
 remain a centralized function.

 Why?
 Because mama said that?
 Poor justification.

 In my shop appliccation prgrammers have access to any tool they want,
 UNLESS it is dangerous, i.e. bypasses regular security checking.
 That's why DSS is available to everyone, but STGADMIN.ADR.STGADMIN.** is
 not.

 --
 Radoslaw Skorupka
 Lodz, Poland
 ...

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Re: Adding CPU engines without IPL

Since the CPU serial number does not change,
There was no problem with third party software.

Lucky you!
If the vendor only looks at the last 5 characters of the serial number that 
works.

Each logical CP has the first two characters of the 'logical' serial number 
made up of Partition number and logical CP number.
If the product looks at the entire 7, then you may have a problem.

We had two vendors who did that, and we had to get new keys for them.
The products stopped working after the first time we did an upgrade.
We were pro-active after that.

You have to ask each vendor, individually.
You cannot make a blanket statement that they all work; only IBM is guaranteed.
-
Too busy driving to stop for gas!

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Re: Fw: Re: 308x Processors - was Mainframe articles

3033 and 3081 in 370 mode were 24bit 16mbyte) addressing (real  virtual).


We had 40M on our 3081 in 370 mode.
Virtual was 16, but the OS could use the extra 24M, not as efficiently as XA, 
but it was used.

-
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Re: Adding CPU engines without IPL

2009-05-12 Thread Mark Zelden

On Tue, 12 May 2009 13:09:21 -0400, Horne, Jim - James S
jim.s.ho...@lowes.com wrote:

Hi all,

We are planning to upgrade one of our 2094s dynamically from a 712 to a
714.  IBM assures us that their stuff will work.  Since we have the two
engines in reserve our understanding is that we can simply configure them
online without an IPL or Activate.  My question is in two parts.  Has anyone
done this and were there any issues with third party products?

Thanks,

Part 1:  Yes, many times... upgrades and downgrades

PArt 2:  Depends (of course).  Software that only cares about the serial 
will be fine (but you still may be violating a contract if you don't notify the
vendor).  Software that cares about the model number or capacity could
have a problem.   An ENF signal is sent when the upgrade happens so anyone
who cares and is listening will know about it.  SYSEVENT QVS will tell 
the software what the capacity is.  I do know of some software that does 
this sort of thing.  One example is Compuware LMS.

Mark
--
Mark Zelden
Sr. Software and Systems Architect - z/OS Team Lead
Zurich North America / Farmers Insurance Group - ZFUS G-ITO
mailto:mark.zel...@zurichna.com
z/OS Systems Programming expert at http://expertanswercenter.techtarget.com/
Mark's MVS Utilities: http://home.flash.net/~mzelden/mvsutil.html

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Re: Adding CPU engines without IPL

2009-05-12 Thread Mark Zelden

On Tue, 12 May 2009 12:50:22 -0500, Al Sherkow a...@sherkow.com wrote:

Hi Jim --

I think the engines just be in the LPAR configuration as 'reserved' at the
previous IPL for MVS to recognize them. PR/SM can use additional engines
lowering the logical to physical ratio, but MVS only builds enough control
blocks on for the number of initial engines plus the number of reserved
engines.

This may have been improved with recent releases of z/OS but this was
certainly an issue in the past.

On Tue, 12 May 2009 18:17:22 +, Ted MacNEIL eamacn...@yahoo.ca wrote:

This will work if you have extra CP's in the RSVD field for the image profile.
If you don't, you will have to re-set, re-activate re-IPL.

It was true as Al and Ted wrote, but no longer true with z/OS 1.10.

http://www-01.ibm.com/common/ssi/cgi-bin/ssialias?subtype=cainfotype=anappname=iSourcesupplier=897letternum=ENUS208-186

From the announcement:

Scalability improvements for z/OS V1.10 include:

Up to 64 processors per logical partition, and up to 60 LPARs
per server are supported for z/OS V1.10 and System z10. With
up to 64 processors per logical partition and as many as 32
z/OS logical partitions able to be configured in a Parallel
Sysplex cluster, up to 2,048 engines' worth of processing
capacity is available to application workloads. This support
is also available on z/OS V1.9. In addition, z/OS V1.10 adds
support to allow you to add a new processor to an LPAR running
a z/OS image without an IPL.

--
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Sr. Software and Systems Architect - z/OS Team Lead
Zurich North America / Farmers Insurance Group - ZFUS G-ITO
mailto:mark.zel...@zurichna.com
z/OS Systems Programming expert at http://expertanswercenter.techtarget.com/
Mark's MVS Utilities: http://home.flash.net/~mzelden/mvsutil.html

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Re: Adding CPU engines without IPL

PArt 2:  Depends (of course).  Software that only cares about the serial will 
be fine (but you still may be violating a contract if you don't notify the 
vendor).  Software that cares about the model number or capacity could have a 
problem.

Always contact the vendor and ask the terms.
Some will say no problem.
Some will send you new keys.
Some will expect some post-upgrade work to be done -- SYNCSORT, for example, 
require a job to be run on all affected LPAR's, and the output mailed to them.

We even had an admin product that didn't run on the upgraded processor, but had 
licence issues because it was billed based on the size of the shop being 
administered.
We replaced it when the upgrade fee became 200K USD.

So, ask each ISV you have what to do, and document it for the next time.

We kept a spread-sheet/table with the following information:
Vendor, product release/version, contact name, e-mail address, telephone #, 
yes/no keys required, before/after upgrade, other relevent information.
-
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Re: Adding CPU engines without IPL

It was true as Al and Ted wrote,  but no longer true with z/OS 1.10.  

Don't you still have to have the CP's RSVD in the LPAR profile?
That is a hardware issue rather than a software one.
-
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Re: Adding CPU engines without IPL

2009-05-12 Thread Michael Wickman

Another possibility is the software has a grace period and then stops
working.  We have one vender that if we use On/Off CoD for more than 7
days, the product stops working.


Mike Wickman
Technical Services

-Original Message-
From: IBM Mainframe Discussion List [mailto:ibm-m...@bama.ua.edu] On
Behalf Of Mark Zelden
Sent: Tuesday, May 12, 2009 2:23 PM
To: IBM-MAIN@bama.ua.edu
Subject: Re: [IBM-MAIN] Adding CPU engines without IPL

On Tue, 12 May 2009 13:09:21 -0400, Horne, Jim - James S
jim.s.ho...@lowes.com wrote:

Hi all,

We are planning to upgrade one of our 2094s dynamically from a 712 to a
714.  IBM assures us that their stuff will work.  Since we have the two
engines in reserve our understanding is that we can simply configure
them
online without an IPL or Activate.  My question is in two parts.  Has
anyone
done this and were there any issues with third party products?

Thanks,

Part 1:  Yes, many times... upgrades and downgrades

PArt 2:  Depends (of course).  Software that only cares about the serial

will be fine (but you still may be violating a contract if you don't
notify the
vendor).  Software that cares about the model number or capacity could
have a problem.   An ENF signal is sent when the upgrade happens so
anyone
who cares and is listening will know about it.  SYSEVENT QVS will tell 
the software what the capacity is.  I do know of some software that does

this sort of thing.  One example is Compuware LMS.

Mark
--
Mark Zelden
Sr. Software and Systems Architect - z/OS Team Lead
Zurich North America / Farmers Insurance Group - ZFUS G-ITO
mailto:mark.zel...@zurichna.com
z/OS Systems Programming expert at
http://expertanswercenter.techtarget.com/
Mark's MVS Utilities: http://home.flash.net/~mzelden/mvsutil.html

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Re: MULTACC and MULTSDN rule of thumb

2009-05-12 Thread Kirk Wolf

Thanks.   The book seems to also suggest MULTACC=3,MULTSDN=6  ( the
same as my SWAG ).
Of course, any QSAM considerations aren't mentioned in the old red
book, since MULTACC/MULTSDN for QSAM is new.   If I understand it, the
same considerations should apply as for BSAM, right?

Kirk Wolf
Dovetailed Technologies

On Tue, May 12, 2009 at 12:03 PM, Martin Packer
martin_pac...@uk.ibm.com wrote:
 Hi Kirk!

 It's probable we documented this in SG24-2557 Parallel Sysplex Batch
 Performance in 1995. We talked A LOT about QSAM performance. (This is
 where Dave Betten of DFSORT Development REALLY went to town. :-) NOT my
 chapters.)



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Re: Slightly off topic power limits

2009-05-12 Thread Guy Gardoit

Still a lot less than rack after rack of Windows servers, so who cares?!

Guy Gardoit
z/OS Systems Programming

On Thu, Apr 30, 2009 at 3:10 AM, R.S. r.skoru...@bremultibank.com.plwrote:

 Hal Merritt pisze:

 I seem to recall a variable is the ambient temperature. That is, the z/10
 blowers may consume more power in a warm room than an equivalent z/9.
 Could this be a factor?


 No, it couldn't My observation was done when two machines were in the same
 room, very close one to other.


 Current ratings:
 z9
 Total System power consumption: 3.283 kW (KVA), 11202 BTU/hr
 Air input temperature: 18.2 °C, 64.8 °F

 z10
 Total System power consumption: 5.918 kW (kVA); 20193 BTU/hr
 Air input temperature: 25.3 °C; 77.5 °F


 As you can see the difference is even bigger. However air temp is lower for
 z9 (now it's in another location).
 z9 powered up, LPARs are activated, but no OS is IPLed, however this should
 not affect power consumption at all. AFAIR I've checked it in the past.

 Of course the tube at the front of z10 is still much greener vbg

 --
 Radoslaw Skorupka
 Lodz, Poland


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Re: NOT off topic power limits (was: Slightly off topic power limits)

Still a lot less than rack after rack of Windows servers, so who cares?!

Anybody who is at/near the limit of the capacity of the shop, local grid, 
MG-set, or battery power.

It doesn't matter what the technology is you are running off of if you are 
running out of power capacity.
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Re: Licensing software

Assuming, you're talking about a product that runs on the general 
purpose CP engines, mainframe licensing is typically based on either 
total processor capacity (MSU's), or, now becoming more common, 
Sub-Capacity pricing based on monthly max 4-hour-average MSU usage or 
MSU capped capacity of all LPARs running the product.


Licensing per CPU is impractical because within z9 and z10 families 
increasing the MSU capacity can either increase or decrease number of 
CP's depending on the speed setting of the CP's.


Licensing to a specific LPAR would also be undesirable for most 
installations.  New versions of vendor software are not just dropped 
into a production system, but first tested and validated in a test LPAR 
environment.  Any aspect of the software that runs differently in a test 
LPAR environment would mean some branches of the software used in 
production would not get completely tested.  And yes, vendors do tend to 
occasionally ship bugs in their license verification code or ship 
license keys that don't work.

  JC Ewing

ftr0...@gmail.com wrote:

My company sells encoding software to large users across the world.
Recently the question came up as to whether we can license per LPAR vs
CPU.
Can anyone tell me what they feel is a standard, or what normal
practices are?

Thanks,
Fraser


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Re: Adding CPU engines without IPL

2009-05-12 Thread Ed Finnell

 
In a message dated 5/12/2009 12:09:36 P.M. Central Daylight Time,  
jim.s.ho...@lowes.com writes:

My question is in two parts.  Has anyone done this and were there  any 
issues with third party products?



Absolutely, especially the CA stuff. Need to  pay your upgrade fee(s) ahead 
of time.





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Re: Licensing software

Licensing to a specific LPAR would also be undesirable for most installations.
New versions of vendor software are not just dropped. into a production 
system, but first tested and validated in a test LPAR 
environment.

That's too strong of a statement!
SAS, COBOL, and other compilers sometimes only need to be licensed to a single 
LPAR.

Also, negotiate an arrangement where, when needed, your test requirements are 
'free'.

I've done that with many products.



-
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Re: Adding CPU engines without IPL

Absolutely, especially the CA stuff.
Need to  pay your upgrade fee(s) ahead of time.

Not always.
We just promised to pay, and still got the keys.

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Re: Adding CPU engines without IPL

Both (as is often the case).  It's a z10 (and future) hardware feature 
exploited by z/OS 1.10 or above.

Okay.
I read the 1.10 announcement, and the software aspect was clear; the H/W wasn't.

I've been supporting partitioning since MDF was beta, and the whole reserved 
CPU thing has always been a pain!

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Re: Adding CPU engines without IPL

2009-05-12 Thread Edward Jaffe


Mark Zelden wrote:

On Tue, 12 May 2009 19:42:37 +, Ted MacNEIL eamacn...@yahoo.ca wrote:

  

It was true as Al and Ted wrote,  but no longer true with z/OS 1.10.
  

Don't you still have to have the CP's RSVD in the LPAR profile?



No. 

  

That is a hardware issue rather than a software one.
-



Both (as is often the case).  It's a z10 (and future) hardware feature
exploited by z/OS 1.10 or above.
  


What they don't tell you is that this feature provides a strong 
rationale for specifying the following in DIAGxx:


CbLoc Virtual31(IHALCCA,IHAPCCA)

z/OS now allocates (at IPL) control blocks to represent the maximum 
number of CPs, zAAPs, and zIIPs that could possibly exist for your 
processor type. For z10, that's 64--even if you run it only as a 
uniprocessor!


--
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Phoenix Software International, Inc
5200 W Century Blvd, Suite 800
Los Angeles, CA 90045
310-338-0400 x318
edja...@phoenixsoftware.com
http://www.phoenixsoftware.com/

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Re: ADRDSSU protection [was:RE: Using FTP to send loadlib]


O'Brien, David W. [C] , NIH/CIT wrote:

Why not use HSM ABAR Backups which include migrated datasets?


Try figuring out how to recall a single dataset from an ABARS backup and 
it becomes clear ABARS is really designed with recovery in mind, not 
with providing easy access to archives of specific datasets.

  JC Ewing


Dave O'Brien
NIH Contractor

From: IBM Mainframe Discussion List [ibm-m...@bama.ua.edu] On Behalf Of Mark 
Jacobs [mark.jac...@custserv.com]
Sent: Tuesday, May 12, 2009 11:37 AM
To: IBM-MAIN@bama.ua.edu
Subject: Re: ADRDSSU protection [was:RE: Using FTP to send loadlib]

R.S. wrote:

Roach, Dennis (N-GHG) pisze:

As a sysprog, I agree.
For the applprog, verify what happens when a data set is on ML1 or ML2
and a masked include is used. DSS used to skip these and still have a
zero return code. This caused the application source to be left off of
their DR tapes.

This is well-know and documented behavior. We shouldn't assume, that
applprog is less intelligent than sysprog.
And this gotcha is no justification to for denying ADRDSSU at all.
Applprogs (everyone) can make mistake without ADRDSSU as well.
Applprogs are probably  allowed to use many tools which they don't
know well.



Jobstep 1 - HRECALL with wait option
Jobstep 2 - DFDSS processing.

It's not rocket science.


A simpler and more fool-proof method:
Instead of a separate step, hang an unreferenced DD statement on the 
actual DFDSS step for all datasets that must be dumped and which have 
any possibility of being migrated.  Step allocation will cause all 
DD-referenced datasets to be recalled before step execution proceeds, 
and there is no possibility of migration occurring before the dump 
(which could happen if a separate recall step occurs just before DFHSM 
interval migration, since the dataset is not opened to reset the 
last-referenced date).  If a dataset is migrated because it has not been 
referenced as recently as the others in the backup step, it might also 
make sense to question if it is appropriate for that dataset to be in 
the same backup collection.

  JC Ewing


--
Mark Jacobs
Time Customer Service
Tampa, FL



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Re: Adding CPU engines without IPL

2009-05-12 Thread Jim Mulder

IBM Mainframe Discussion List IBM-MAIN@bama.ua.edu wrote on 05/12/2009 
05:22:03 PM:

 Mark Zelden wrote:
  On Tue, 12 May 2009 19:42:37 +, Ted MacNEIL eamacn...@yahoo.ca 
wrote:
 
  
  It was true as Al and Ted wrote,  but no longer true with z/OS 1.10.
  
  Don't you still have to have the CP's RSVD in the LPAR profile?
  
 
  No. 
 
  
  That is a hardware issue rather than a software one.
  -
  
 
  Both (as is often the case).  It's a z10 (and future) hardware feature
  exploited by z/OS 1.10 or above.
  
 
 What they don't tell you is that this feature provides a strong 
 rationale for specifying the following in DIAGxx:
 
 CbLoc Virtual31(IHALCCA,IHAPCCA)
 
 z/OS now allocates (at IPL) control blocks to represent the maximum 
 number of CPs, zAAPs, and zIIPs that could possibly exist for your 
 processor type. For z10, that's 64--even if you run it only as a 
 uniprocessor!

  LCCAs and PCCAs continue to be allocated only for online 
processors.  The LCCA and PCCA vector tables are allocated
for the maximum size, but they are only 4 bytes per processor. 

 
Jim Mulder   z/OS System Test   IBM Corp.  Poughkeepsie,  NY

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Re: Adding CPU engines without IPL

2009-05-12 Thread Edward Jaffe


Jim Mulder wrote:
  LCCAs and PCCAs continue to be allocated only for online 
processors.  The LCCA and PCCA vector tables are allocated

for the maximum size, but they are only 4 bytes per processor.
  


Thanks for the clarification. So, the CBLOC VIRTUAL31 is really only 
valuable for LPARs with many online engines.


--
Edward E Jaffe
Phoenix Software International, Inc
5200 W Century Blvd, Suite 800
Los Angeles, CA 90045
310-338-0400 x318
edja...@phoenixsoftware.com
http://www.phoenixsoftware.com/

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Re: Adding CPU engines without IPL

2009-05-12 Thread Carson, Brad

Jim,

That's correct.  Here for our DR system it normally runs as a two-way 
(2098-N02), but when we kick on the CBU it goes to a full power five-way 
(2098-Z05 with an extra zIIP).  Since we have the lpar defined with the proper 
reserved CP's all we do is just the CF CPU(xx),ONLINE.  No fuss, no muss, just 
config and go.  We also do this with our Unisys systems too.


Brad S. Carson
Manager Mainframe Technical Support
Laboratory Corporation of America
Phone: 336-436-8294
Fax: 336-436-1033
email: cars...@labcorp.com

-Original Message-
From: IBM Mainframe Discussion List [mailto:ibm-m...@bama.ua.edu] On Behalf Of 
Horne, Jim - James S
Sent: Tuesday, May 12, 2009 1:38 PM
To: IBM-MAIN@bama.ua.edu
Subject: Re: Adding CPU engines without IPL

Thanks, Alan.  If I understand you right you're going with the old systems 
programmer Standard Reply #1, It depends.

Which is pretty much what we thought .

Jim Horne 
Systems Programmer 
Large Systems Engineering  Messaging NC4IT 
Lowe's Companies, Inc. 
1000 Lowe's Boulevard
Mooresville, NC 
704-758-5354 
jim.ho...@lowes.com

-Original Message-
From: IBM Mainframe Discussion List [mailto:ibm-m...@bama.ua.edu] On Behalf Of 
Field, Alan C.
Sent: Tuesday, May 12, 2009 1:32 PM
To: IBM-MAIN@bama.ua.edu
Subject: Re: Adding CPU engines without IPL

Jim, we just turned a 706 into a 707. IBM's stuff works great. No
issues. 
We also turned a 703 into a 603, no issues.

Are your HMC IMAGE profiles defined with reserved engines? That's a
requirement. 

After they get done just CF CPU(xx),ONLINE.

As to the ISVs, we notified them. Some products care about the
MSUs/MIPS, some care about model numbers, some only care about serial
numbers.

Some vendors thanked us and updated their records, some sent us new
product keys. 

Alan  



-Original Message-
From: IBM Mainframe Discussion List [mailto:ibm-m...@bama.ua.edu] On
Behalf Of Horne, Jim - James S
Sent: Tuesday, May 12, 2009 12:09 
To: IBM-MAIN@bama.ua.edu
Subject: Adding CPU engines without IPL

Hi all,

We are planning to upgrade one of our 2094s dynamically from a 712 to a
714.  IBM assures us that their stuff will work.  Since we have the two
engines in reserve our understanding is that we can simply configure
them online without an IPL or Activate.  My question is in two parts.
Has anyone done this and were there any issues with third party
products?

Thanks,

Jim Horne
Systems Programmer
Large Systems Engineering  Messaging NC4IT
Lowe's Companies, Inc.
1000 Lowe's Boulevard
Mooresville, NC
704-758-5354
jim.ho...@lowes.commailto:jim.ho...@lowes.com

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Re: ADRDSSU protection [was:RE: Using FTP to send loadlib]

2009-05-12 Thread O'Brien, David W. (NIH/CIT) [C]

For that you need an add-on product like Mainstar's ABARs Manager. At least 
that's what it was called a few years ago.

Dave O'Brien
NIH Contractor

From: IBM Mainframe Discussion List [ibm-m...@bama.ua.edu] On Behalf Of Joel C 
Ewing [jcew...@acm.org]
Sent: Tuesday, May 12, 2009 5:22 PM
To: IBM-MAIN@bama.ua.edu
Subject: Re: ADRDSSU protection [was:RE: Using FTP to send loadlib]

O'Brien, David W. [C] , NIH/CIT wrote:
 Why not use HSM ABAR Backups which include migrated datasets?

Try figuring out how to recall a single dataset from an ABARS backup and
it becomes clear ABARS is really designed with recovery in mind, not
with providing easy access to archives of specific datasets.
   JC Ewing

 Dave O'Brien
 NIH Contractor

 From: IBM Mainframe Discussion List [ibm-m...@bama.ua.edu] On Behalf Of Mark 
 Jacobs [mark.jac...@custserv.com]
 Sent: Tuesday, May 12, 2009 11:37 AM
 To: IBM-MAIN@bama.ua.edu
 Subject: Re: ADRDSSU protection [was:RE: Using FTP to send loadlib]

 R.S. wrote:
 Roach, Dennis (N-GHG) pisze:
 As a sysprog, I agree.
 For the applprog, verify what happens when a data set is on ML1 or ML2
 and a masked include is used. DSS used to skip these and still have a
 zero return code. This caused the application source to be left off of
 their DR tapes.
 This is well-know and documented behavior. We shouldn't assume, that
 applprog is less intelligent than sysprog.
 And this gotcha is no justification to for denying ADRDSSU at all.
 Applprogs (everyone) can make mistake without ADRDSSU as well.
 Applprogs are probably  allowed to use many tools which they don't
 know well.

 Jobstep 1 - HRECALL with wait option
 Jobstep 2 - DFDSS processing.

 It's not rocket science.

A simpler and more fool-proof method:
Instead of a separate step, hang an unreferenced DD statement on the
actual DFDSS step for all datasets that must be dumped and which have
any possibility of being migrated.  Step allocation will cause all
DD-referenced datasets to be recalled before step execution proceeds,
and there is no possibility of migration occurring before the dump
(which could happen if a separate recall step occurs just before DFHSM
interval migration, since the dataset is not opened to reset the
last-referenced date).  If a dataset is migrated because it has not been
referenced as recently as the others in the backup step, it might also
make sense to question if it is appropriate for that dataset to be in
the same backup collection.
   JC Ewing

 --
 Mark Jacobs
 Time Customer Service
 Tampa, FL

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Re: ADRDSSU protection [was:RE: Using FTP to send loadlib]

2009-05-12 Thread Scott T. Harder

I did not see this hit the list, so if it did, I apologize for the dup...

Joel (and Radislaw)  sp?

You have both moved me far more towards the center of this issue.
Excellent points, both.  It's just that I was brought up in a
CENTRALIZED/MANAGED environment and that is hard to shake.  How do you
coordinate recovery from multiple groups, both in and outside the data
center.  Obviously, it can be done, but much harder IMO.

There are products such as ABARS (ok... I know) and other 3rd party
products that wrap up application backups on a point in time; then
allow for recovery TO that point in time.  Of course, that costs
money, so I can see where you model, Joel, works and makes sense.

All the best,
Scott T. Harder

On 5/12/09, O'Brien, David W. (NIH/CIT) [C] obrie...@mail.nih.gov wrote:
 For that you need an add-on product like Mainstar's ABARs Manager. At least
 that's what it was called a few years ago.

 Dave O'Brien
 NIH Contractor
 
 From: IBM Mainframe Discussion List [ibm-m...@bama.ua.edu] On Behalf Of Joel
 C Ewing [jcew...@acm.org]
 Sent: Tuesday, May 12, 2009 5:22 PM
 To: IBM-MAIN@bama.ua.edu
 Subject: Re: ADRDSSU protection [was:RE: Using FTP to send loadlib]

 O'Brien, David W. [C] , NIH/CIT wrote:
 Why not use HSM ABAR Backups which include migrated datasets?

 Try figuring out how to recall a single dataset from an ABARS backup and
 it becomes clear ABARS is really designed with recovery in mind, not
 with providing easy access to archives of specific datasets.
JC Ewing

 Dave O'Brien
 NIH Contractor
 
 From: IBM Mainframe Discussion List [ibm-m...@bama.ua.edu] On Behalf Of
 Mark Jacobs [mark.jac...@custserv.com]
 Sent: Tuesday, May 12, 2009 11:37 AM
 To: IBM-MAIN@bama.ua.edu
 Subject: Re: ADRDSSU protection [was:RE: Using FTP to send loadlib]

 R.S. wrote:
 Roach, Dennis (N-GHG) pisze:
 As a sysprog, I agree.
 For the applprog, verify what happens when a data set is on ML1 or ML2
 and a masked include is used. DSS used to skip these and still have a
 zero return code. This caused the application source to be left off of
 their DR tapes.
 This is well-know and documented behavior. We shouldn't assume, that
 applprog is less intelligent than sysprog.
 And this gotcha is no justification to for denying ADRDSSU at all.
 Applprogs (everyone) can make mistake without ADRDSSU as well.
 Applprogs are probably  allowed to use many tools which they don't
 know well.


 Jobstep 1 - HRECALL with wait option
 Jobstep 2 - DFDSS processing.

 It's not rocket science.

 A simpler and more fool-proof method:
 Instead of a separate step, hang an unreferenced DD statement on the
 actual DFDSS step for all datasets that must be dumped and which have
 any possibility of being migrated.  Step allocation will cause all
 DD-referenced datasets to be recalled before step execution proceeds,
 and there is no possibility of migration occurring before the dump
 (which could happen if a separate recall step occurs just before DFHSM
 interval migration, since the dataset is not opened to reset the
 last-referenced date).  If a dataset is migrated because it has not been
 referenced as recently as the others in the backup step, it might also
 make sense to question if it is appropriate for that dataset to be in
 the same backup collection.
JC Ewing

 --
 Mark Jacobs
 Time Customer Service
 Tampa, FL
 

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-- 
All the best,
Scott T. Harder

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Re: ADRDSSU protection [was:RE: Using FTP to send loadlib]