Re: [Intel-gfx] [PATCH] drm/i915/cnl: Avoid ioremap_wc on Cannonlake as well.

[Rodrigo Vivi]

On Fri, Aug 11, 2017 at 4:39 PM, Rodrigo Vivi  wrote:
> WC is apparently not an option for CNL+ on GTT here.
> Trying to use it we get hard hangs.
>
> Credits-to: Ben Widawsky 

forgot to CC relavant people for possible reviews:
Cc: Joonas
Cc: Imre
Cc: Ben

> Signed-off-by: Rodrigo Vivi 
> ---
>  drivers/gpu/drm/i915/i915_gem_gtt.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c 
> b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index 10aa7762d9a6..3019bf509e3d 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -2717,7 +2717,7 @@ static int ggtt_probe_common(struct i915_ggtt *ggtt, 
> u64 size)
>  * resort to an uncached mapping. The WC issue is easily caught by the
>  * readback check when writing GTT PTE entries.
>  */
> -   if (IS_GEN9_LP(dev_priv))
> +   if (IS_GEN9_LP(dev_priv) || INTEL_GEN(dev_priv) >= 10)
> ggtt->gsm = ioremap_nocache(phys_addr, size);
> else
> ggtt->gsm = ioremap_wc(phys_addr, size);
> --
> 2.13.2
>
> ___
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx



-- 
Rodrigo Vivi
Blog: http://blog.vivi.eng.br
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[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/cnl: Avoid ioremap_wc on Cannonlake as well.

[Patchwork]

== Series Details ==

Series: drm/i915/cnl: Avoid ioremap_wc on Cannonlake as well.
URL   : https://patchwork.freedesktop.org/series/28702/
State : success

== Summary ==

Series 28702v1 drm/i915/cnl: Avoid ioremap_wc on Cannonlake as well.
https://patchwork.freedesktop.org/api/1.0/series/28702/revisions/1/mbox/

Test kms_flip:
Subgroup basic-flip-vs-modeset:
skip   -> PASS   (fi-skl-x1585l) fdo#101781
Test kms_pipe_crc_basic:
Subgroup suspend-read-crc-pipe-b:
pass   -> DMESG-WARN (fi-byt-n2820) fdo#101705

fdo#101781 https://bugs.freedesktop.org/show_bug.cgi?id=101781
fdo#101705 https://bugs.freedesktop.org/show_bug.cgi?id=101705

fi-bdw-5557u total:279  pass:268  dwarn:0   dfail:0   fail:0   skip:11  
time:446s
fi-bdw-gvtdvmtotal:279  pass:265  dwarn:0   dfail:0   fail:0   skip:14  
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fi-byt-j1900 total:279  pass:254  dwarn:1   dfail:0   fail:0   skip:24  
time:521s
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fi-glk-2atotal:279  pass:260  dwarn:0   dfail:0   fail:0   skip:19  
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fi-kbl-7560u total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  
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fi-kbl-r total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
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fi-pnv-d510  total:279  pass:223  dwarn:1   dfail:0   fail:0   skip:55  
time:542s
fi-skl-6260u total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  
time:464s
fi-skl-6700k total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
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fi-skl-6770hqtotal:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  
time:483s
fi-skl-gvtdvmtotal:279  pass:266  dwarn:0   dfail:0   fail:0   skip:13  
time:441s
fi-skl-x1585ltotal:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  
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fi-snb-2520m total:279  pass:251  dwarn:0   dfail:0   fail:0   skip:28  
time:555s
fi-snb-2600  total:279  pass:250  dwarn:0   dfail:0   fail:0   skip:29  
time:408s

0689b6b1aa3edec5d99f35902c9b38c0e6b701b9 drm-tip: 2017y-08m-11d-18h-55m-01s UTC 
integration manifest
910245f5e595 drm/i915/cnl: Avoid ioremap_wc on Cannonlake as well.

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_5387/
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[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/6] drm/i915/gen10+: use the SKL code for reading WM latencies (rev2)

[Patchwork]

== Series Details ==

Series: series starting with [1/6] drm/i915/gen10+: use the SKL code for 
reading WM latencies (rev2)
URL   : https://patchwork.freedesktop.org/series/28586/
State : success

== Summary ==

Series 28586v2 Series without cover letter
https://patchwork.freedesktop.org/api/1.0/series/28586/revisions/2/mbox/

fi-bdw-5557u total:279  pass:268  dwarn:0   dfail:0   fail:0   skip:11  
time:446s
fi-bdw-gvtdvmtotal:279  pass:265  dwarn:0   dfail:0   fail:0   skip:14  
time:436s
fi-blb-e6850 total:279  pass:224  dwarn:1   dfail:0   fail:0   skip:54  
time:356s
fi-bsw-n3050 total:279  pass:243  dwarn:0   dfail:0   fail:0   skip:36  
time:553s
fi-bxt-j4205 total:279  pass:260  dwarn:0   dfail:0   fail:0   skip:19  
time:514s
fi-byt-j1900 total:279  pass:254  dwarn:1   dfail:0   fail:0   skip:24  
time:531s
fi-byt-n2820 total:279  pass:251  dwarn:0   dfail:0   fail:0   skip:28  
time:517s
fi-glk-2atotal:279  pass:260  dwarn:0   dfail:0   fail:0   skip:19  
time:606s
fi-hsw-4770  total:279  pass:263  dwarn:0   dfail:0   fail:0   skip:16  
time:445s
fi-hsw-4770r total:279  pass:263  dwarn:0   dfail:0   fail:0   skip:16  
time:416s
fi-ilk-650   total:279  pass:229  dwarn:0   dfail:0   fail:0   skip:50  
time:427s
fi-ivb-3520m total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:512s
fi-ivb-3770  total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
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fi-kbl-7500u total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:479s
fi-kbl-7560u total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  
time:587s
fi-kbl-r total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:587s
fi-pnv-d510  total:279  pass:223  dwarn:1   dfail:0   fail:0   skip:55  
time:527s
fi-skl-6260u total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  
time:464s
fi-skl-6700k total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:470s
fi-skl-6770hqtotal:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  
time:490s
fi-skl-gvtdvmtotal:279  pass:266  dwarn:0   dfail:0   fail:0   skip:13  
time:442s
fi-skl-x1585ltotal:279  pass:268  dwarn:0   dfail:0   fail:0   skip:11  
time:493s
fi-snb-2520m total:279  pass:251  dwarn:0   dfail:0   fail:0   skip:28  
time:559s
fi-snb-2600  total:279  pass:250  dwarn:0   dfail:0   fail:0   skip:29  
time:409s

0689b6b1aa3edec5d99f35902c9b38c0e6b701b9 drm-tip: 2017y-08m-11d-18h-55m-01s UTC 
integration manifest
5474fccc3fc2 drm/i915/cnl: Reuse skl_wm_get_hw_state on Cannonlake.
5dec0693273c drm/i915/gen10: implement gen 10 watermarks calculations

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_5386/
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[Intel-gfx] [PATCH] drm/i915/cnl: Avoid ioremap_wc on Cannonlake as well.

[Rodrigo Vivi]

WC is apparently not an option for CNL+ on GTT here.
Trying to use it we get hard hangs.

Credits-to: Ben Widawsky 
Signed-off-by: Rodrigo Vivi 
---
 drivers/gpu/drm/i915/i915_gem_gtt.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c 
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 10aa7762d9a6..3019bf509e3d 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -2717,7 +2717,7 @@ static int ggtt_probe_common(struct i915_ggtt *ggtt, u64 
size)
 * resort to an uncached mapping. The WC issue is easily caught by the
 * readback check when writing GTT PTE entries.
 */
-   if (IS_GEN9_LP(dev_priv))
+   if (IS_GEN9_LP(dev_priv) || INTEL_GEN(dev_priv) >= 10)
ggtt->gsm = ioremap_nocache(phys_addr, size);
else
ggtt->gsm = ioremap_wc(phys_addr, size);
-- 
2.13.2

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Re: [Intel-gfx] [PATCH 2/8] drm: Don't update property values for atomic drivers

[Laurent Pinchart]

Hi Daniel,

On Tuesday 25 Jul 2017 10:01:16 Daniel Vetter wrote:
> Atomic drivers only use the property value store for immutable (i.e.
> can't be set by userspace, but the kernel can still adjust it)
> properties. The only tricky part is the removal of the update in
> drm_atomic_helper_update_legacy_modeset_state().
> 
> This was added in
> 
> commit 8c10342cb48f3140d9abeadcfd2fa6625d447282 (tag:
> topic/drm-misc-2015-07-28) Author: Maarten Lankhorst
> 
> Date:   Mon Jul 27 13:24:29 2015 +0200
> 
> drm/atomic: Update legacy DPMS state during modesets, v3.
> 
> by copying it from the i915 code, where it was originally added in
> 
> commit 68d3472047a572936551f8ff0b6f4016c5a1fdef
> Author: Daniel Vetter 
> Date:   Thu Sep 6 22:08:35 2012 +0200
> 
> drm/i915: update dpms property in set_mode
> 
> for the legacy modeset code. The reason we needed this hack was that
> i915 didn't yet set DRIVER_ATOMIC, and we checked for that instead of
> the newer-ish drm_drv_uses_atomic_modeset(), which avoids such
> troubles. With the correct feature checks this isn't needed anymore at
> all.
> 
> Also make sure that drivers don't accidentally get this wrong by
> making the exported version of drm_object_property_get_value() only
> work for legacy drivers. Only gma500 uses it anyway.
> 
> Cc: Maarten Lankhorst 
> Signed-off-by: Daniel Vetter 
> ---
>  drivers/gpu/drm/drm_atomic_helper.c |  4 ---
>  drivers/gpu/drm/drm_connector.c |  3 +--
>  drivers/gpu/drm/drm_crtc.c  |  2 +-
>  drivers/gpu/drm/drm_mode_object.c   | 49 --
>  drivers/gpu/drm/drm_plane.c |  2 +-
>  5 files changed, 33 insertions(+), 27 deletions(-)
> 
> diff --git a/drivers/gpu/drm/drm_atomic_helper.c
> b/drivers/gpu/drm/drm_atomic_helper.c index 7582bbc5decc..4a960c741e35
> 100644
> --- a/drivers/gpu/drm/drm_atomic_helper.c
> +++ b/drivers/gpu/drm/drm_atomic_helper.c
> @@ -921,16 +921,12 @@ drm_atomic_helper_update_legacy_modeset_state(struct
> drm_device *dev, crtc = new_conn_state->crtc;
>   if ((!crtc && old_conn_state->crtc) ||
>   (crtc && drm_atomic_crtc_needs_modeset(crtc->state))) {
> - struct drm_property *dpms_prop =
> - dev->mode_config.dpms_property;
>   int mode = DRM_MODE_DPMS_OFF;
> 
>   if (crtc && crtc->state->active)
>   mode = DRM_MODE_DPMS_ON;
> 
>   connector->dpms = mode;
> - drm_object_property_set_value(>base,
> -   dpms_prop, mode);
>   }
>   }
> 
> diff --git a/drivers/gpu/drm/drm_connector.c
> b/drivers/gpu/drm/drm_connector.c index 8072e6e4c62c..349104eadefe 100644
> --- a/drivers/gpu/drm/drm_connector.c
> +++ b/drivers/gpu/drm/drm_connector.c
> @@ -1225,8 +1225,7 @@ int drm_mode_connector_set_obj_prop(struct
> drm_mode_object *obj, } else if (connector->funcs->set_property)
>   ret = connector->funcs->set_property(connector, property, 
value);
> 
> - /* store the property value if successful */
> - if (!ret)
> + if (!ret && drm_drv_uses_atomic_modeset(property->dev))
>   drm_object_property_set_value(>base, property, 
value);
>   return ret;
>  }
> diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
> index 5af25ce5bf7c..7d4fcdd34342 100644
> --- a/drivers/gpu/drm/drm_crtc.c
> +++ b/drivers/gpu/drm/drm_crtc.c
> @@ -736,7 +736,7 @@ int drm_mode_crtc_set_obj_prop(struct drm_mode_object
> *obj,
> 
>   if (crtc->funcs->set_property)
>   ret = crtc->funcs->set_property(crtc, property, value);
> - if (!ret)
> + if (!ret && drm_drv_uses_atomic_modeset(property->dev))
>   drm_object_property_set_value(obj, property, value);
> 
>   return ret;
> diff --git a/drivers/gpu/drm/drm_mode_object.c
> b/drivers/gpu/drm/drm_mode_object.c index da9a9adbcc98..92743a796bf0 100644
> --- a/drivers/gpu/drm/drm_mode_object.c
> +++ b/drivers/gpu/drm/drm_mode_object.c
> @@ -233,6 +233,9 @@ int drm_object_property_set_value(struct drm_mode_object
> *obj, {
>   int i;
> 
> + WARN_ON(drm_drv_uses_atomic_modeset(property->dev) &&
> + !(property->flags & DRM_MODE_PROP_IMMUTABLE));

It would have been nice to remove the calls to drm_object_property_set_value() 
for the dpms property from drivers before adding this :-/ Three drivers (rcar-
du, shmobile and fsl-dcu) initialize the connector's DPMS property to OFF 
using this call (the default being ON).

Following the DPMS code paths always give me a headache, so if you know by 
heart how I should replace the set property call, I'm all ears :-)

>   for (i = 0; i < obj->properties->count; i++) {
>   if (obj->properties->properties[i] == property) {
>  

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Introduce intel_hpd_pin function.

[Rodrigo Vivi]

merged to dinq. thanks for the reviews and ideas

On Fri, Aug 11, 2017 at 11:26 AM, Rodrigo Vivi  wrote:
> The idea is to have an unique place to decide the pin-port
> per platform.
>
> So let's create this function now without any functional
> change. Just adding together code from hdmi and dp together.
>
> v2: Add missing pin for port A.
> v3: Fix typo on subject.
> Avoid behaviour change so add WARN_ON and return
> if port A on HDMI. (by DK).
>
> Cc: Dhinakaran Pandiyan 
> Cc: Ville Syrjälä 
> Signed-off-by: Rodrigo Vivi 
> Reviewed-by: Dhinakaran Pandiyan 
> ---
>  drivers/gpu/drm/i915/i915_drv.h  |  1 +
>  drivers/gpu/drm/i915/intel_dp.c  |  8 ++--
>  drivers/gpu/drm/i915/intel_hdmi.c| 18 ++
>  drivers/gpu/drm/i915/intel_hotplug.c | 26 ++
>  4 files changed, 31 insertions(+), 22 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 68ec47b378ac..ba59e64eb378 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -3195,6 +3195,7 @@ void intel_hpd_init(struct drm_i915_private *dev_priv);
>  void intel_hpd_init_work(struct drm_i915_private *dev_priv);
>  void intel_hpd_cancel_work(struct drm_i915_private *dev_priv);
>  enum port intel_hpd_pin_to_port(enum hpd_pin pin);
> +enum hpd_pin intel_hpd_pin(enum port port);
>  bool intel_hpd_disable(struct drm_i915_private *dev_priv, enum hpd_pin pin);
>  void intel_hpd_enable(struct drm_i915_private *dev_priv, enum hpd_pin pin);
>
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index eeede2037931..0e4b40663067 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -5904,26 +5904,22 @@ intel_dp_init_connector_port_info(struct 
> intel_digital_port *intel_dig_port)
> struct intel_encoder *encoder = _dig_port->base;
> struct intel_dp *intel_dp = _dig_port->dp;
>
> +   encoder->hpd_pin = intel_hpd_pin(intel_dig_port->port);
> +
> switch (intel_dig_port->port) {
> case PORT_A:
> -   encoder->hpd_pin = HPD_PORT_A;
> intel_dp->aux_power_domain = POWER_DOMAIN_AUX_A;
> break;
> case PORT_B:
> -   encoder->hpd_pin = HPD_PORT_B;
> intel_dp->aux_power_domain = POWER_DOMAIN_AUX_B;
> break;
> case PORT_C:
> -   encoder->hpd_pin = HPD_PORT_C;
> intel_dp->aux_power_domain = POWER_DOMAIN_AUX_C;
> break;
> case PORT_D:
> -   encoder->hpd_pin = HPD_PORT_D;
> intel_dp->aux_power_domain = POWER_DOMAIN_AUX_D;
> break;
> case PORT_E:
> -   encoder->hpd_pin = HPD_PORT_E;
> -
> /* FIXME: Check VBT for actual wiring of PORT E */
> intel_dp->aux_power_domain = POWER_DOMAIN_AUX_D;
> break;
> diff --git a/drivers/gpu/drm/i915/intel_hdmi.c 
> b/drivers/gpu/drm/i915/intel_hdmi.c
> index 2ef1ee85129d..e30c27acb94f 100644
> --- a/drivers/gpu/drm/i915/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/intel_hdmi.c
> @@ -1920,23 +1920,9 @@ void intel_hdmi_init_connector(struct 
> intel_digital_port *intel_dig_port,
>
> intel_hdmi->ddc_bus = intel_hdmi_ddc_pin(dev_priv, port);
>
> -   switch (port) {
> -   case PORT_B:
> -   intel_encoder->hpd_pin = HPD_PORT_B;
> -   break;
> -   case PORT_C:
> -   intel_encoder->hpd_pin = HPD_PORT_C;
> -   break;
> -   case PORT_D:
> -   intel_encoder->hpd_pin = HPD_PORT_D;
> -   break;
> -   case PORT_E:
> -   intel_encoder->hpd_pin = HPD_PORT_E;
> -   break;
> -   default:
> -   MISSING_CASE(port);
> +   if (WARN_ON(port == PORT_A))
> return;
> -   }
> +   intel_encoder->hpd_pin = intel_hpd_pin(port);
>
> if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
> intel_hdmi->write_infoframe = vlv_write_infoframe;
> diff --git a/drivers/gpu/drm/i915/intel_hotplug.c 
> b/drivers/gpu/drm/i915/intel_hotplug.c
> index d442d9f012d6..875d5d218d5c 100644
> --- a/drivers/gpu/drm/i915/intel_hotplug.c
> +++ b/drivers/gpu/drm/i915/intel_hotplug.c
> @@ -101,6 +101,32 @@ enum port intel_hpd_pin_to_port(enum hpd_pin pin)
> }
>  }
>
> +/**
> + * intel_hpd_pin - return pin hard associated with certain port.
> + * @port: the hpd port to get associated pin
> + *
> + * Return pin that is associatade with @port and HDP_NONE if no pin is
> + * hard associated with that @port.
> + */
> +enum hpd_pin intel_hpd_pin(enum port port)
> +{
> +   switch (port) {
> +   case PORT_A:
> +   return HPD_PORT_A;
> +   case 

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Simplify hpd pin to port (rev4)

[Patchwork]

== Series Details ==

Series: series starting with [1/2] drm/i915: Simplify hpd pin to port (rev4)
URL   : https://patchwork.freedesktop.org/series/28261/
State : success

== Summary ==

Series 28261v4 Series without cover letter
https://patchwork.freedesktop.org/api/1.0/series/28261/revisions/4/mbox/

Test kms_flip:
Subgroup basic-flip-vs-modeset:
pass   -> SKIP   (fi-skl-x1585l) fdo#101781
Test kms_pipe_crc_basic:
Subgroup suspend-read-crc-pipe-b:
dmesg-warn -> PASS   (fi-byt-n2820) fdo#101705

fdo#101781 https://bugs.freedesktop.org/show_bug.cgi?id=101781
fdo#101705 https://bugs.freedesktop.org/show_bug.cgi?id=101705

fi-bdw-5557u total:279  pass:268  dwarn:0   dfail:0   fail:0   skip:11  
time:444s
fi-bdw-gvtdvmtotal:279  pass:265  dwarn:0   dfail:0   fail:0   skip:14  
time:430s
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time:356s
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time:544s
fi-bxt-j4205 total:279  pass:260  dwarn:0   dfail:0   fail:0   skip:19  
time:522s
fi-byt-j1900 total:279  pass:254  dwarn:1   dfail:0   fail:0   skip:24  
time:520s
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time:515s
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time:417s
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time:507s
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time:483s
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time:466s
fi-kbl-7560u total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  
time:582s
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time:598s
fi-pnv-d510  total:279  pass:223  dwarn:1   dfail:0   fail:0   skip:55  
time:522s
fi-skl-6260u total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  
time:466s
fi-skl-6700k total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:471s
fi-skl-6770hqtotal:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  
time:472s
fi-skl-gvtdvmtotal:279  pass:266  dwarn:0   dfail:0   fail:0   skip:13  
time:437s
fi-skl-x1585ltotal:279  pass:268  dwarn:0   dfail:0   fail:0   skip:11  
time:479s
fi-snb-2520m total:279  pass:251  dwarn:0   dfail:0   fail:0   skip:28  
time:549s
fi-snb-2600  total:279  pass:249  dwarn:0   dfail:0   fail:1   skip:29  
time:409s

354550367a457f96f0ac550bd70d71da373495f2 drm-tip: 2017y-08m-11d-16h-07m-01s UTC 
integration manifest
864dcd95517e drm/i915: Simplify hpd pin to port

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_5385/
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Re: [Intel-gfx] [PATCH] drm/i915/cnl: Dump the right pll registers when dumping pipe config.

[Rodrigo Vivi]

merged to dinq.
thanks for the review.

On Thu, Aug 10, 2017 at 3:45 PM, Rodrigo Vivi  wrote:
> Different from SKL we don't need ctrl1 and cfgcr2, but
> we need to dump cfgcr0 and cfgcr1 instead.
>
> v2: rebase and commit message
>
> Cc: Clint Taylor 
> Cc: Mika Kahola 
> Signed-off-by: Rodrigo Vivi 
> Reviewed-by: Mika Kahola 
> ---
>  drivers/gpu/drm/i915/intel_dpll_mgr.c | 11 ++-
>  1 file changed, 10 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c 
> b/drivers/gpu/drm/i915/intel_dpll_mgr.c
> index 2f7b0e64f628..a2a3d93d67bd 100644
> --- a/drivers/gpu/drm/i915/intel_dpll_mgr.c
> +++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c
> @@ -2379,6 +2379,15 @@ cnl_get_dpll(struct intel_crtc *crtc, struct 
> intel_crtc_state *crtc_state,
> return pll;
>  }
>
> +static void cnl_dump_hw_state(struct drm_i915_private *dev_priv,
> + struct intel_dpll_hw_state *hw_state)
> +{
> +   DRM_DEBUG_KMS("dpll_hw_state: "
> + "cfgcr0: 0x%x, cfgcr1: 0x%x\n",
> + hw_state->cfgcr0,
> + hw_state->cfgcr1);
> +}
> +
>  static const struct intel_shared_dpll_funcs cnl_ddi_pll_funcs = {
> .enable = cnl_ddi_pll_enable,
> .disable = cnl_ddi_pll_disable,
> @@ -2395,7 +2404,7 @@ static const struct dpll_info cnl_plls[] = {
>  static const struct intel_dpll_mgr cnl_pll_mgr = {
> .dpll_info = cnl_plls,
> .get_dpll = cnl_get_dpll,
> -   .dump_hw_state = skl_dump_hw_state,
> +   .dump_hw_state = cnl_dump_hw_state,
>  };
>
>  /**
> --
> 2.13.2
>
> ___
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-- 
Rodrigo Vivi
Blog: http://blog.vivi.eng.br
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[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,1/2] drm/dp: Bit definition for D3 power state that keeps AUX fully powered (rev2)

[Patchwork]

== Series Details ==

Series: series starting with [v2,1/2] drm/dp: Bit definition for D3 power state 
that keeps AUX fully powered (rev2)
URL   : https://patchwork.freedesktop.org/series/28667/
State : success

== Summary ==

Series 28667v2 Series without cover letter
https://patchwork.freedesktop.org/api/1.0/series/28667/revisions/2/mbox/

Test gem_exec_flush:
Subgroup basic-batch-kernel-default-uc:
fail   -> PASS   (fi-snb-2600) fdo#17
Test kms_flip:
Subgroup basic-flip-vs-modeset:
pass   -> SKIP   (fi-skl-x1585l) fdo#101781

fdo#17 https://bugs.freedesktop.org/show_bug.cgi?id=17
fdo#101781 https://bugs.freedesktop.org/show_bug.cgi?id=101781

fi-bdw-5557u total:279  pass:268  dwarn:0   dfail:0   fail:0   skip:11  
time:444s
fi-bdw-gvtdvmtotal:279  pass:265  dwarn:0   dfail:0   fail:0   skip:14  
time:432s
fi-blb-e6850 total:279  pass:224  dwarn:1   dfail:0   fail:0   skip:54  
time:356s
fi-bsw-n3050 total:279  pass:243  dwarn:0   dfail:0   fail:0   skip:36  
time:550s
fi-bxt-j4205 total:279  pass:260  dwarn:0   dfail:0   fail:0   skip:19  
time:514s
fi-byt-j1900 total:279  pass:254  dwarn:1   dfail:0   fail:0   skip:24  
time:520s
fi-byt-n2820 total:279  pass:250  dwarn:1   dfail:0   fail:0   skip:28  
time:512s
fi-glk-2atotal:279  pass:260  dwarn:0   dfail:0   fail:0   skip:19  
time:603s
fi-hsw-4770  total:279  pass:263  dwarn:0   dfail:0   fail:0   skip:16  
time:449s
fi-hsw-4770r total:279  pass:263  dwarn:0   dfail:0   fail:0   skip:16  
time:413s
fi-ilk-650   total:279  pass:229  dwarn:0   dfail:0   fail:0   skip:50  
time:414s
fi-ivb-3520m total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:509s
fi-ivb-3770  total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:479s
fi-kbl-7500u total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:470s
fi-kbl-7560u total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  
time:579s
fi-kbl-r total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:590s
fi-pnv-d510  total:279  pass:223  dwarn:1   dfail:0   fail:0   skip:55  
time:527s
fi-skl-6260u total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  
time:468s
fi-skl-6700k total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:481s
fi-skl-6770hqtotal:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  
time:482s
fi-skl-gvtdvmtotal:279  pass:266  dwarn:0   dfail:0   fail:0   skip:13  
time:433s
fi-skl-x1585ltotal:279  pass:268  dwarn:0   dfail:0   fail:0   skip:11  
time:476s
fi-snb-2520m total:279  pass:251  dwarn:0   dfail:0   fail:0   skip:28  
time:550s
fi-snb-2600  total:279  pass:250  dwarn:0   dfail:0   fail:0   skip:29  
time:415s

354550367a457f96f0ac550bd70d71da373495f2 drm-tip: 2017y-08m-11d-16h-07m-01s UTC 
integration manifest
c6a56394c5f6 drm/i915/dp: Leave the AUX block powered on for MST
ab2c0e76f16e drm/dp: Bit definition for D3 power state that keeps AUX fully 
powered

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_5384/
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[Intel-gfx] [PATCH 2/2] drm/i915: Introduce intel_hpd_pin function.

[Rodrigo Vivi]

The idea is to have an unique place to decide the pin-port
per platform.

So let's create this function now without any functional
change. Just adding together code from hdmi and dp together.

v2: Add missing pin for port A.
v3: Fix typo on subject.
Avoid behaviour change so add WARN_ON and return
if port A on HDMI. (by DK).

Cc: Dhinakaran Pandiyan 
Cc: Ville Syrjälä 
Signed-off-by: Rodrigo Vivi 
Reviewed-by: Dhinakaran Pandiyan 
---
 drivers/gpu/drm/i915/i915_drv.h  |  1 +
 drivers/gpu/drm/i915/intel_dp.c  |  8 ++--
 drivers/gpu/drm/i915/intel_hdmi.c| 18 ++
 drivers/gpu/drm/i915/intel_hotplug.c | 26 ++
 4 files changed, 31 insertions(+), 22 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 68ec47b378ac..ba59e64eb378 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -3195,6 +3195,7 @@ void intel_hpd_init(struct drm_i915_private *dev_priv);
 void intel_hpd_init_work(struct drm_i915_private *dev_priv);
 void intel_hpd_cancel_work(struct drm_i915_private *dev_priv);
 enum port intel_hpd_pin_to_port(enum hpd_pin pin);
+enum hpd_pin intel_hpd_pin(enum port port);
 bool intel_hpd_disable(struct drm_i915_private *dev_priv, enum hpd_pin pin);
 void intel_hpd_enable(struct drm_i915_private *dev_priv, enum hpd_pin pin);
 
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index eeede2037931..0e4b40663067 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -5904,26 +5904,22 @@ intel_dp_init_connector_port_info(struct 
intel_digital_port *intel_dig_port)
struct intel_encoder *encoder = _dig_port->base;
struct intel_dp *intel_dp = _dig_port->dp;
 
+   encoder->hpd_pin = intel_hpd_pin(intel_dig_port->port);
+
switch (intel_dig_port->port) {
case PORT_A:
-   encoder->hpd_pin = HPD_PORT_A;
intel_dp->aux_power_domain = POWER_DOMAIN_AUX_A;
break;
case PORT_B:
-   encoder->hpd_pin = HPD_PORT_B;
intel_dp->aux_power_domain = POWER_DOMAIN_AUX_B;
break;
case PORT_C:
-   encoder->hpd_pin = HPD_PORT_C;
intel_dp->aux_power_domain = POWER_DOMAIN_AUX_C;
break;
case PORT_D:
-   encoder->hpd_pin = HPD_PORT_D;
intel_dp->aux_power_domain = POWER_DOMAIN_AUX_D;
break;
case PORT_E:
-   encoder->hpd_pin = HPD_PORT_E;
-
/* FIXME: Check VBT for actual wiring of PORT E */
intel_dp->aux_power_domain = POWER_DOMAIN_AUX_D;
break;
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c 
b/drivers/gpu/drm/i915/intel_hdmi.c
index 2ef1ee85129d..e30c27acb94f 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -1920,23 +1920,9 @@ void intel_hdmi_init_connector(struct intel_digital_port 
*intel_dig_port,
 
intel_hdmi->ddc_bus = intel_hdmi_ddc_pin(dev_priv, port);
 
-   switch (port) {
-   case PORT_B:
-   intel_encoder->hpd_pin = HPD_PORT_B;
-   break;
-   case PORT_C:
-   intel_encoder->hpd_pin = HPD_PORT_C;
-   break;
-   case PORT_D:
-   intel_encoder->hpd_pin = HPD_PORT_D;
-   break;
-   case PORT_E:
-   intel_encoder->hpd_pin = HPD_PORT_E;
-   break;
-   default:
-   MISSING_CASE(port);
+   if (WARN_ON(port == PORT_A))
return;
-   }
+   intel_encoder->hpd_pin = intel_hpd_pin(port);
 
if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
intel_hdmi->write_infoframe = vlv_write_infoframe;
diff --git a/drivers/gpu/drm/i915/intel_hotplug.c 
b/drivers/gpu/drm/i915/intel_hotplug.c
index d442d9f012d6..875d5d218d5c 100644
--- a/drivers/gpu/drm/i915/intel_hotplug.c
+++ b/drivers/gpu/drm/i915/intel_hotplug.c
@@ -101,6 +101,32 @@ enum port intel_hpd_pin_to_port(enum hpd_pin pin)
}
 }
 
+/**
+ * intel_hpd_pin - return pin hard associated with certain port.
+ * @port: the hpd port to get associated pin
+ *
+ * Return pin that is associatade with @port and HDP_NONE if no pin is
+ * hard associated with that @port.
+ */
+enum hpd_pin intel_hpd_pin(enum port port)
+{
+   switch (port) {
+   case PORT_A:
+   return HPD_PORT_A;
+   case PORT_B:
+   return HPD_PORT_B;
+   case PORT_C:
+   return HPD_PORT_C;
+   case PORT_D:
+   return HPD_PORT_D;
+   case PORT_E:
+   return HPD_PORT_E;
+   default:
+   MISSING_CASE(port);
+   return HPD_NONE;
+   }
+}
+
 #define HPD_STORM_DETECT_PERIOD

[Intel-gfx] [PATCH 1/2] drm/i915: Simplify hpd pin to port

[Rodrigo Vivi]

We will soon need to make that pin port association per
platform, so let's try to simplify it beforehand.

Also we are moving the backwards port to pin
here as well so let's use a standardized way.

One extra possibility here would be to add a
MISSING_CASE along with PORT_NONE, but I don't want
to change this behaviour for now.

Cc: Ville Syrjälä 
Signed-off-by: Rodrigo Vivi 
Reviewed-by: Dhinakaran Pandiyan 
---
 drivers/gpu/drm/i915/i915_drv.h  |  2 +-
 drivers/gpu/drm/i915/i915_irq.c  |  3 ++-
 drivers/gpu/drm/i915/intel_dp.c  |  2 +-
 drivers/gpu/drm/i915/intel_hotplug.c | 31 +--
 4 files changed, 21 insertions(+), 17 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 907603cba447..68ec47b378ac 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -3194,7 +3194,7 @@ void intel_hpd_irq_handler(struct drm_i915_private 
*dev_priv,
 void intel_hpd_init(struct drm_i915_private *dev_priv);
 void intel_hpd_init_work(struct drm_i915_private *dev_priv);
 void intel_hpd_cancel_work(struct drm_i915_private *dev_priv);
-bool intel_hpd_pin_to_port(enum hpd_pin pin, enum port *port);
+enum port intel_hpd_pin_to_port(enum hpd_pin pin);
 bool intel_hpd_disable(struct drm_i915_private *dev_priv, enum hpd_pin pin);
 void intel_hpd_enable(struct drm_i915_private *dev_priv, enum hpd_pin pin);
 
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 196caa463edf..58262380dcb8 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -1501,7 +1501,8 @@ static void intel_get_hpd_pins(u32 *pin_mask, u32 
*long_mask,
 
*pin_mask |= BIT(i);
 
-   if (!intel_hpd_pin_to_port(i, ))
+   port = intel_hpd_pin_to_port(i);
+   if (port == PORT_NONE)
continue;
 
if (long_pulse_detect(port, dig_hotplug_reg))
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 76c8a0bd17f9..eeede2037931 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -4566,7 +4566,7 @@ static bool bxt_digital_port_connected(struct 
drm_i915_private *dev_priv,
enum port port;
u32 bit;
 
-   intel_hpd_pin_to_port(intel_encoder->hpd_pin, );
+   port = intel_hpd_pin_to_port(intel_encoder->hpd_pin);
switch (port) {
case PORT_A:
bit = BXT_DE_PORT_HP_DDIA;
diff --git a/drivers/gpu/drm/i915/intel_hotplug.c 
b/drivers/gpu/drm/i915/intel_hotplug.c
index f1200272a699..d442d9f012d6 100644
--- a/drivers/gpu/drm/i915/intel_hotplug.c
+++ b/drivers/gpu/drm/i915/intel_hotplug.c
@@ -76,26 +76,28 @@
  * it will use i915_hotplug_work_func where this logic is handled.
  */
 
-bool intel_hpd_pin_to_port(enum hpd_pin pin, enum port *port)
+/**
+ * intel_hpd_port - return port hard associated with certain pin.
+ * @pin: the hpd pin to get associated port
+ *
+ * Return port that is associatade with @pin and PORT_NONE if no port is
+ * hard associated with that @pin.
+ */
+enum port intel_hpd_pin_to_port(enum hpd_pin pin)
 {
switch (pin) {
case HPD_PORT_A:
-   *port = PORT_A;
-   return true;
+   return PORT_A;
case HPD_PORT_B:
-   *port = PORT_B;
-   return true;
+   return PORT_B;
case HPD_PORT_C:
-   *port = PORT_C;
-   return true;
+   return PORT_C;
case HPD_PORT_D:
-   *port = PORT_D;
-   return true;
+   return PORT_D;
case HPD_PORT_E:
-   *port = PORT_E;
-   return true;
+   return PORT_E;
default:
-   return false;   /* no hpd */
+   return PORT_NONE; /* no port for this pin */
}
 }
 
@@ -389,8 +391,9 @@ void intel_hpd_irq_handler(struct drm_i915_private 
*dev_priv,
if (!(BIT(i) & pin_mask))
continue;
 
-   is_dig_port = intel_hpd_pin_to_port(i, ) &&
- dev_priv->hotplug.irq_port[port];
+   port = intel_hpd_pin_to_port(i);
+   is_dig_port = port != PORT_NONE &&
+   dev_priv->hotplug.irq_port[port];
 
if (is_dig_port) {
bool long_hpd = long_mask & BIT(i);
-- 
2.13.2

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[Intel-gfx] [PATCH v2 1/2] drm/dp: Bit definition for D3 power state that keeps AUX fully powered

[Dhinakaran Pandiyan]

DPCD 600h - SET_POWER & SET_DP_PWR_VOLTAGE defines power state

101 = Set Main-Link for local Sink device and all downstream Sink
devices to D3 (power-down mode), keep AUX block fully powered, ready to
reply within a Response Timeout period of 300us.

This state is useful in a MST dock + MST monitor configuration that
doesn't wake up from D3 state.

v2: Use spaces instead of tabs (Jani)

Signed-off-by: Dhinakaran Pandiyan 
---
 include/drm/drm_dp_helper.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index b17476a..47a6cdb 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -618,6 +618,7 @@
 # define DP_SET_POWER_D00x1
 # define DP_SET_POWER_D30x2
 # define DP_SET_POWER_MASK  0x3
+# define DP_SET_POWER_D3_AUX_ON 0x5
 
 #define DP_EDP_DPCD_REV0x700/* eDP 1.2 */
 # define DP_EDP_11 0x00
-- 
2.7.4

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Re: [Intel-gfx] [maintainer-tools PATCH 3/4] dim: remove af and anf aliases

[Rodrigo Vivi]

On Fri, Aug 11, 2017 at 06:03:24PM +0300, Jani Nikula wrote:
> We don't generally apply patches to the drm-intel-fixes or
> drm-intel-next-fixes trees, we cherry-pick instead, so the aliases are
> unnecessary.

great! this always confused me honestly, but I thought you were
the one using this somehow.

Reviewed-by: Rodrigo Vivi 

> 
> And, of course, anyone really needing them can add them as personal
> aliases in their dimrc.
> 
> Signed-off-by: Jani Nikula 
> ---
>  dim | 2 --
>  1 file changed, 2 deletions(-)
> 
> diff --git a/dim b/dim
> index 2f8da975c36a..d9820ac87358 100755
> --- a/dim
> +++ b/dim
> @@ -921,13 +921,11 @@ function dim_apply_queued
>   dim_apply_branch drm-intel-next-queued "$@"
>  }
>  
> -dim_alias_af=apply-fixes
>  function dim_apply_fixes
>  {
>   dim_apply_branch drm-intel-fixes "$@"
>  }
>  
> -dim_alias_anf=apply-next-fixes
>  function dim_apply_next_fixes
>  {
>   dim_apply_branch drm-intel-next-fixes "$@"
> -- 
> 2.11.0
> 
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Re: [Intel-gfx] [maintainer-tools PATCH 4/4] dim: fix list-aliases to not include itself

[Rodrigo Vivi]

On Fri, Aug 11, 2017 at 06:03:25PM +0300, Jani Nikula wrote:
> dim list-aliases lists "list-aliases" as being an alias of
> "list-aliases". This is because the temporary subcmd variable reference
> is erroneously included in the list. Unset it.

I got confused with to many list-aliases list-aliases, so I run dim list-aliases
and understood what you meant... ;)


Reviewed-by: Rodrigo Vivi 

> 
> Signed-off-by: Jani Nikula 
> ---
>  dim | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/dim b/dim
> index d9820ac87358..011cedbd3b6a 100755
> --- a/dim
> +++ b/dim
> @@ -2053,4 +2053,7 @@ if ! declare -f $subcmd_func >/dev/null; then
>   exit 1
>  fi
>  
> +# throw away to not confuse list-aliases
> +unset subcmd
> +
>  $subcmd_func "$@"
> -- 
> 2.11.0
> 
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Re: [Intel-gfx] [maintainer-tools PATCH 2/4] dim: remove dim cherry-pick-branch subcommand

[Rodrigo Vivi]

Reviewed-by: Rodrigo Vivi 


On Fri, Aug 11, 2017 at 06:03:23PM +0300, Jani Nikula wrote:
> Demote dim_cherry_pick_branch to an internal function. It's too
> specialized (at least for now) to be useful for anything other than as a
> helper for the cherry-pick-fixes and cherry-pick-next-fixes subcommands.
> 
> As a side effect, fixes mancheck for missing documentation for the
> subcommand.
> 
> Signed-off-by: Jani Nikula 
> ---
>  dim | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/dim b/dim
> index 2b377cb3a3f3..2f8da975c36a 100755
> --- a/dim
> +++ b/dim
> @@ -987,7 +987,7 @@ function git_list_fixes
>   "$@"
>  }
>  
> -function dim_cherry_pick_branch
> +function cherry_pick_branch
>  {
>   local branch log fail_log needed have_fixes
>  
> @@ -1057,13 +1057,13 @@ function dim_cherry_pick_branch
>  function dim_cherry_pick_fixes
>  {
>   assert_branch drm-intel-fixes
> - dim_cherry_pick_branch drm-intel-fixes "$@"
> + cherry_pick_branch drm-intel-fixes "$@"
>  }
>  
>  function dim_cherry_pick_next_fixes
>  {
>   assert_branch drm-intel-next-fixes
> - dim_cherry_pick_branch drm-intel-next-fixes "$@"
> + cherry_pick_branch drm-intel-next-fixes "$@"
>  }
>  
>  dim_alias_ar=apply-resolved
> -- 
> 2.11.0
> 
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Re: [Intel-gfx] [maintainer-tools PATCH 1/4] doc: add documentation for dim commit-add-tag

[Rodrigo Vivi]

Reviewed-by: Rodrigo Vivi 

On Fri, Aug 11, 2017 at 06:03:22PM +0300, Jani Nikula wrote:
> Reported by 'make mancheck'.
> 
> Signed-off-by: Jani Nikula 
> ---
>  dim.rst | 4 
>  1 file changed, 4 insertions(+)
> 
> diff --git a/dim.rst b/dim.rst
> index 8b4653aacbda..802c776e03f9 100644
> --- a/dim.rst
> +++ b/dim.rst
> @@ -204,6 +204,10 @@ apply [*git am arguments*]
>  --
>  **apply-branch** shorthand for the current branch.
>  
> +commit-add-tag *string* [...]
> +-
> +Append each argument at the end of the commit message of HEAD.
> +
>  extract-tags *branch* [*git-rangeish*]
>  --
>  This extracts various tags (e.g. Reviewed-by:) from emails and applies them 
> to the
> -- 
> 2.11.0
> 
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Re: [Intel-gfx] [PATCH v4 i-g-t] tests/kms: increase max threshold time for edid read

[Clint Taylor]

On 08/11/2017 12:49 AM, Lofstedt, Marta wrote:



-Original Message-
From: Taylor, Clinton A
Sent: Thursday, August 10, 2017 8:50 PM
To: intel-gfx@lists.freedesktop.org
Cc: Taylor, Clinton A ; Vetter, Daniel
; Lofstedt, Marta 
Subject: [PATCH v4 i-g-t] tests/kms: increase max threshold time for edid
read

From: Clint Taylor 

Current 50ms max threshold timing for an EDID read is very close to the
actual time for a 2 block HDMI EDID read. Adjust the timings base on
connector type as DP reads are at 1 MBit and HDMI at 100K bit. If an LSPcon is
connected to device under test the -l option should be passed to update the
threshold timing to allow the LSPcon to read the EDID at the HDMI timing.
The -l option should be used when LSPcon is on the motherboard or if a
USB_C->HDMI converter is present

V2: Adjust timings based on connector type, EDID size, and Add an option to
specify if an LSPcon is present.
V3: Add bugzilla to commit message
V4: remove edid_size check from HDMI multiplier. Fixes DVI on HDMI.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100047

Cc: Daniel Vetter 
Cc: Marta Lofstedt 
Signed-off-by: Clint Taylor 
---
  tests/kms_sysfs_edid_timing.c | 74
+++
  1 file changed, 60 insertions(+), 14 deletions(-)

diff --git a/tests/kms_sysfs_edid_timing.c b/tests/kms_sysfs_edid_timing.c
index 1201388..0382610 100644
--- a/tests/kms_sysfs_edid_timing.c
+++ b/tests/kms_sysfs_edid_timing.c
@@ -26,21 +26,46 @@
  #include 
  #include 

-#define THRESHOLD_PER_CONNECTOR10
-#define THRESHOLD_TOTAL50
-#define CHECK_TIMES15
+#define THRESHOLD_FOR_EMPTY_CONNECTOR  10
+#define THRESHOLD_PER_EDID_BLOCK   5
+#define HDMI_THRESHOLD_MULTIPLIER  10
+#define CHECK_TIMES10

  IGT_TEST_DESCRIPTION("This check the time we take to read the content of
all "
 "the possible connectors. Without the edid -
ENXIO patch "

"(http://permalink.gmane.org/gmane.comp.video.dri.devel/62083),"
-"we sometimes take a *really* long time. "
-"So let's just check for some reasonable
timing here");
+"we sometimes take a *really* long time. So
let's check "
+"an approximate time per edid block based on
connector "
+"type. The -l option adjusts DP timing to
reflect HDMI read "
+"timings from LSPcon.");
+
+/* The -l option has been added to correctly handle timings when an
+LSPcon is
+ * present. This could be on the platform itself or in a USB_C->HDMI
converter.
+ * With LSPCon EDID read timing will need to change from the 1 Mbit AUX
+ * bus speed to the 100 Kbit HDMI DDC bus speed  */ bool
+lspcon_present;

+static int opt_handler(int opt, int opt_index, void *data) {
+   if (opt == 'l') {
+   lspcon_present = true;
+   igt_info("set LSPcon present on DP ports\n");
+   }

-igt_simple_main
+   return 0;
+}
+
+int main(int argc, char **argv)
  {
DIR *dirp;
struct dirent *de;
+   lspcon_present = false;
+
+   igt_simple_init_parse_opts(, argv, "l", NULL, NULL,
+ opt_handler,
NULL);

We can't have this lspcon as an argument to the test, it will not work with 
automated testing using piglit as we do for CI.
Theoretically we could add a "has_lspcon" to debugfs, but I believe that this 
test has started to be over complicated.
The test would need to know if an LSPcon is connected on a port by port 
basis. This is easy if the LSPcon driver is loaded but in the case of 
USB_C->HDMI is gets a little more complicated (not impossible) to figure 
out. Even if we know exactly what device is connected failures can still 
occur if the TCON/Monitor clock stretches the EDID read.



The intention of the test is to do a sanity check so that we don't drift off 
here, so I actually prefer the V1.
Unfortunately with the timing differences (3ms to 96ms) based on the 
monitor type connected and EDID size there is no way for a one size fits 
all sanity check to be reliable. If the original point of this test was 
to figure out if probe caused more than 1 EDID read, maybe we should 
actually count EDID reads and not infer it by measuring time.


-Clint


Your detailed work could however be used in a benchmark, where the result would 
be the actually timing, I am sure there is a performance team who would like 
that.

/Marta


+
+   igt_skip_on_simulation();

dirp = opendir("/sys/class/drm");
igt_assert(dirp != NULL);
@@ -49,17 +74,34 @@ igt_simple_main
struct igt_mean mean = {};
struct stat st;
char path[PATH_MAX];
-   int i;
+  

Re: [Intel-gfx] [PATCH v3 00/28] DRM API Conversions

[Cihangir Akturk]

On Fri, Aug 11, 2017 at 02:24:19PM +, Deucher, Alexander wrote:
> > -Original Message-
> > From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> > Of Cihangir Akturk
> > Sent: Friday, August 11, 2017 8:33 AM
> > Cc: de...@driverdev.osuosl.org; linux-arm-...@vger.kernel.org; intel-
> > g...@lists.freedesktop.org; linux-ker...@vger.kernel.org; dri-
> > de...@lists.freedesktop.org; etna...@lists.freedesktop.org; Cihangir Akturk;
> > amd-...@lists.freedesktop.org; dan...@ffwll.ch;
> > nouv...@lists.freedesktop.org; linux-te...@vger.kernel.org;
> > virtualizat...@lists.linux-foundation.org; freedr...@lists.freedesktop.org
> > Subject: [PATCH v3 00/28] DRM API Conversions
> > 
> > Changes since v2:
> > 
> > - Patch series is based on *drm-misc-next* as suggested by Sean Paul.
> > 
> > - Dropped patch 05 (drm/atmel-hlcdc) and patch 25 (drm/vc4) from v2,
> >   since they were already pulled in the drm-misc-next
> > 
> > Changes since v1:
> > 
> > - This time patches were generated with coccinelle instead of my own
> >   script, as suggested by Daniel Vetter.
> > 
> > - Fixed the typo in commit messages. s/adn/and
> > 
> 
> FWIW, I already picked up v1 of these patches for radeon and amdgpu.

I think you can skip these patches of v3 for amdgpu and radeon, as
they have remained unchanged since v1.

> 
> Alex
> 
> > Note: I've included r-b, a-b tags, as these patches are identical to v1
> > except for the file: drivers/gpu/drm/i915/i915_gem_object.h
> > 
> > This patch set replaces the occurrences of drm_*_reference() and
> > drm_*_unreference() with the new drm_*_get() and drm_*_put()
> > functions.
> > All patches in the series do the same thing, converting to the new APIs.
> > I created patches per DRM driver as suggested by Daniel Vetter.
> > 
> > This patch set was generated by scripts/coccinelle/api/drm-get-put.cocci
> > 
> > Previous thread can be reached at:
> > https://marc.info/?l=dri-devel=150178288816047
> > 
> > Background:
> > 
> > In the kernel, reference counting APIs use *_get(), *_put() style naming
> > to reference-count the objects. But DRM subsystem uses a different
> > naming for them such as *_reference(), *_unreference() which is
> > inconsistent with the other reference counting APIs in the kernel. To
> > solve this consistency issue, Thierry Reding introduced a couple of
> > functions and compatibility aliases in the following commits for them.
> > 
> > commit 020a218f95bd3ceff7dd1022ff7ebc0497bc7bf9
> > Author: Thierry Reding 
> > Date:   Tue Feb 28 15:46:38 2017 +0100
> > 
> > drm: Introduce drm_mode_object_{get,put}()
> > 
> > commit ad09360750afa18a0a0ce0253d6ea6033abc22e7
> > Author: Thierry Reding 
> > Date:   Tue Feb 28 15:46:39 2017 +0100
> > 
> > drm: Introduce drm_connector_{get,put}()
> > 
> > commit a4a69da06bc11a937a6e417938b1bb698ee1fa46
> > Author: Thierry Reding 
> > Date:   Tue Feb 28 15:46:40 2017 +0100
> > 
> > drm: Introduce drm_framebuffer_{get,put}()
> > 
> > commit e6b62714e87c8811d5564b6a0738dcde63a51774
> > Author: Thierry Reding 
> > Date:   Tue Feb 28 15:46:41 2017 +0100
> > 
> > drm: Introduce drm_gem_object_{get,put}()
> > 
> > commit 6472e5090be7c78749a3c279b4faae87ab835c40
> > Author: Thierry Reding 
> > Date:   Tue Feb 28 15:46:42 2017 +0100
> > 
> > drm: Introduce drm_property_blob_{get,put}()
> > 
> > Cihangir Akturk (28):
> >   drm/amdgpu: switch to drm_*_get(), drm_*_put() helpers
> >   drm: mali-dp: switch to drm_*_get(), drm_*_put() helpers
> >   drm/armada: switch to drm_*_get(), drm_*_put() helpers
> >   drm/ast: switch to drm_*_get(), drm_*_put() helpers
> >   drm/bochs: switch to drm_*_get(), drm_*_put() helpers
> >   drm/cirrus: switch to drm_*_get(), drm_*_put() helpers
> >   drm/etnaviv: switch to drm_*_get(), drm_*_put() helpers
> >   drm/exynos: switch to drm_*_get(), drm_*_put() helpers
> >   drm/gma500: switch to drm_*_get(), drm_*_put() helpers
> >   drm/hisilicon: switch to drm_*_get(), drm_*_put() helpers
> >   drm/i915: switch to drm_*_get(), drm_*_put() helpers
> >   drm/imx: switch to drm_*_get(), drm_*_put() helpers
> >   drm/mediatek: switch to drm_*_get(), drm_*_put() helpers
> >   drm/mgag200: switch to drm_*_get(), drm_*_put() helpers
> >   drm/msm: switch to drm_*_get(), drm_*_put() helpers
> >   drm/nouveau: switch to drm_*_get(), drm_*_put() helpers
> >   drm/omapdrm: switch to drm_*_get(), drm_*_put() helpers
> >   drm/qxl: switch to drm_*_get(), drm_*_put() helpers
> >   drm/radeon: switch to drm_*_get(), drm_*_put() helpers
> >   drm/rockchip: switch to drm_*_get(), drm_*_put() helpers
> >   drm/tegra: switch to drm_*_get(), drm_*_put() helpers
> >   drm/tilcdc: switch to drm_*_get(), drm_*_put() helpers
> >   drm/udl: switch to drm_*_get(), drm_*_put() helpers
> >   drm/vc4: switch to drm_*_get(), drm_*_put() helpers
> >   drm/vgem: switch to drm_*_get(), drm_*_put() helpers
> 

[Intel-gfx] [maintainer-tools PATCH 4/4] dim: fix list-aliases to not include itself

[Jani Nikula]

dim list-aliases lists "list-aliases" as being an alias of
"list-aliases". This is because the temporary subcmd variable reference
is erroneously included in the list. Unset it.

Signed-off-by: Jani Nikula 
---
 dim | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/dim b/dim
index d9820ac87358..011cedbd3b6a 100755
--- a/dim
+++ b/dim
@@ -2053,4 +2053,7 @@ if ! declare -f $subcmd_func >/dev/null; then
exit 1
 fi
 
+# throw away to not confuse list-aliases
+unset subcmd
+
 $subcmd_func "$@"
-- 
2.11.0

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[Intel-gfx] [maintainer-tools PATCH 2/4] dim: remove dim cherry-pick-branch subcommand

[Jani Nikula]

Demote dim_cherry_pick_branch to an internal function. It's too
specialized (at least for now) to be useful for anything other than as a
helper for the cherry-pick-fixes and cherry-pick-next-fixes subcommands.

As a side effect, fixes mancheck for missing documentation for the
subcommand.

Signed-off-by: Jani Nikula 
---
 dim | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/dim b/dim
index 2b377cb3a3f3..2f8da975c36a 100755
--- a/dim
+++ b/dim
@@ -987,7 +987,7 @@ function git_list_fixes
"$@"
 }
 
-function dim_cherry_pick_branch
+function cherry_pick_branch
 {
local branch log fail_log needed have_fixes
 
@@ -1057,13 +1057,13 @@ function dim_cherry_pick_branch
 function dim_cherry_pick_fixes
 {
assert_branch drm-intel-fixes
-   dim_cherry_pick_branch drm-intel-fixes "$@"
+   cherry_pick_branch drm-intel-fixes "$@"
 }
 
 function dim_cherry_pick_next_fixes
 {
assert_branch drm-intel-next-fixes
-   dim_cherry_pick_branch drm-intel-next-fixes "$@"
+   cherry_pick_branch drm-intel-next-fixes "$@"
 }
 
 dim_alias_ar=apply-resolved
-- 
2.11.0

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[Intel-gfx] [maintainer-tools PATCH 1/4] doc: add documentation for dim commit-add-tag

[Jani Nikula]

Reported by 'make mancheck'.

Signed-off-by: Jani Nikula 
---
 dim.rst | 4 
 1 file changed, 4 insertions(+)

diff --git a/dim.rst b/dim.rst
index 8b4653aacbda..802c776e03f9 100644
--- a/dim.rst
+++ b/dim.rst
@@ -204,6 +204,10 @@ apply [*git am arguments*]
 --
 **apply-branch** shorthand for the current branch.
 
+commit-add-tag *string* [...]
+-
+Append each argument at the end of the commit message of HEAD.
+
 extract-tags *branch* [*git-rangeish*]
 --
 This extracts various tags (e.g. Reviewed-by:) from emails and applies them to 
the
-- 
2.11.0

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Re: [Intel-gfx] [PATCH] drm/i915/fbc: only update no_fbc_reason when active

[Daniel Vetter]

On Fri, Aug 11, 2017 at 11:36:15AM +0100, Chris Wilson wrote:
> Quoting Daniel Vetter (2017-08-11 09:04:18)
> > On Fri, Aug 11, 2017 at 09:23:27AM +0200, Daniel Vetter wrote:
> > > In our snb farm in CI we have plenty of underruns, but not enough
> > > stolen memory to enable fbc. Which means every time there's an
> > > underrun the no_fbc_reason swichtes to something that makes
> > > kms_frontbuffer_tracking fail instead of skip, adding massive amounts
> > > of additional noise to igt test runs.
> > > 
> > > Make sure we don't try to disable fbc when it's off already.
> > > 
> > > Cc: Paulo Zanoni 
> > > Signed-off-by: Daniel Vetter 
> > 
> > Note this seems to be the real bug that's causing all the spurious noise
> > on snb CI in the full run. So pretty important to land this fast.
> 
> Yup, this is more than just silencing CI, this looks to be a
> precondition for intel_fbc_deactivate() -- all other callers check for
> fbc->enabled before calling deactivate. I would even suggest we add a
> 
> diff --git a/drivers/gpu/drm/i915/intel_fbc.c 
> b/drivers/gpu/drm/i915/intel_fbc.c
> index 122d6372f58d..0c6e66f8a0f1 100644
> --- a/drivers/gpu/drm/i915/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/intel_fbc.c
> @@ -485,6 +485,9 @@ static void intel_fbc_deactivate(struct drm_i915_private 
> *dev_priv)
>  
> WARN_ON(!mutex_is_locked(>lock));
>  
> +   if (WARN_ON(!fbc->enabled))
> +   return;
> +

Good idea, squashed in and applied.
-Daniel

> 
> Either way,
> Reviewed-by: Chris Wilson 
> -Chris

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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Re: [Intel-gfx] [PATCH] dim: Jari as QA lead

[Tahvanainen, Jari]

>On Fri, 11 Aug 2017, Daniel Vetter  wrote:
> > Cc: "Tahvanainen, Jari" 
> > Signed-off-by: Daniel Vetter 
> > ---
> >  dim | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/dim b/dim
> > index 2b377cb3a3f3..4a4c1adb2c68 100755
> > --- a/dim
> > +++ b/dim
> > @@ -89,7 +89,7 @@ addr_intel_gfx_maintainer1="Daniel Vetter 
> > "
> >  addr_intel_gfx_maintainer2="Jani Nikula "
> >  addr_intel_gfx="intel-gfx@lists.freedesktop.org"
> >  addr_dri_devel="dri-de...@lists.freedesktop.org"
> > -addr_intel_qa="\"Christophe Prigent\" "
> > +addr_intel_qa="\"Tahvanainen, Jari\" "

> Please just make it Jari Tahvanainen. The comma might cause issues.
> With that, Acked-by: Jani Nikula 

Acked-by: Jari Tahvanainen 

> BR,
> Jani.

> >  
> >  # integration configuration
> >  integration_config=nightly.conf

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Re: [Intel-gfx] [PATCH] dim: Jari as QA lead

[Jani Nikula]

On Fri, 11 Aug 2017, Daniel Vetter  wrote:
> Cc: "Tahvanainen, Jari" 
> Signed-off-by: Daniel Vetter 
> ---
>  dim | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/dim b/dim
> index 2b377cb3a3f3..4a4c1adb2c68 100755
> --- a/dim
> +++ b/dim
> @@ -89,7 +89,7 @@ addr_intel_gfx_maintainer1="Daniel Vetter 
> "
>  addr_intel_gfx_maintainer2="Jani Nikula "
>  addr_intel_gfx="intel-gfx@lists.freedesktop.org"
>  addr_dri_devel="dri-de...@lists.freedesktop.org"
> -addr_intel_qa="\"Christophe Prigent\" "
> +addr_intel_qa="\"Tahvanainen, Jari\" "

Please just make it Jari Tahvanainen. The comma might cause issues.

With that, Acked-by: Jani Nikula 


BR,
Jani.

>  
>  # integration configuration
>  integration_config=nightly.conf

-- 
Jani Nikula, Intel Open Source Technology Center
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Re: [Intel-gfx] [PATCH v3 00/28] DRM API Conversions

[Deucher, Alexander]

> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Cihangir Akturk
> Sent: Friday, August 11, 2017 8:33 AM
> Cc: de...@driverdev.osuosl.org; linux-arm-...@vger.kernel.org; intel-
> g...@lists.freedesktop.org; linux-ker...@vger.kernel.org; dri-
> de...@lists.freedesktop.org; etna...@lists.freedesktop.org; Cihangir Akturk;
> amd-...@lists.freedesktop.org; dan...@ffwll.ch;
> nouv...@lists.freedesktop.org; linux-te...@vger.kernel.org;
> virtualizat...@lists.linux-foundation.org; freedr...@lists.freedesktop.org
> Subject: [PATCH v3 00/28] DRM API Conversions
> 
> Changes since v2:
> 
> - Patch series is based on *drm-misc-next* as suggested by Sean Paul.
> 
> - Dropped patch 05 (drm/atmel-hlcdc) and patch 25 (drm/vc4) from v2,
>   since they were already pulled in the drm-misc-next
> 
> Changes since v1:
> 
> - This time patches were generated with coccinelle instead of my own
>   script, as suggested by Daniel Vetter.
> 
> - Fixed the typo in commit messages. s/adn/and
> 

FWIW, I already picked up v1 of these patches for radeon and amdgpu.

Alex

> Note: I've included r-b, a-b tags, as these patches are identical to v1
> except for the file: drivers/gpu/drm/i915/i915_gem_object.h
> 
> This patch set replaces the occurrences of drm_*_reference() and
> drm_*_unreference() with the new drm_*_get() and drm_*_put()
> functions.
> All patches in the series do the same thing, converting to the new APIs.
> I created patches per DRM driver as suggested by Daniel Vetter.
> 
> This patch set was generated by scripts/coccinelle/api/drm-get-put.cocci
> 
> Previous thread can be reached at:
> https://marc.info/?l=dri-devel=150178288816047
> 
> Background:
> 
> In the kernel, reference counting APIs use *_get(), *_put() style naming
> to reference-count the objects. But DRM subsystem uses a different
> naming for them such as *_reference(), *_unreference() which is
> inconsistent with the other reference counting APIs in the kernel. To
> solve this consistency issue, Thierry Reding introduced a couple of
> functions and compatibility aliases in the following commits for them.
> 
> commit 020a218f95bd3ceff7dd1022ff7ebc0497bc7bf9
> Author: Thierry Reding 
> Date:   Tue Feb 28 15:46:38 2017 +0100
> 
> drm: Introduce drm_mode_object_{get,put}()
> 
> commit ad09360750afa18a0a0ce0253d6ea6033abc22e7
> Author: Thierry Reding 
> Date:   Tue Feb 28 15:46:39 2017 +0100
> 
> drm: Introduce drm_connector_{get,put}()
> 
> commit a4a69da06bc11a937a6e417938b1bb698ee1fa46
> Author: Thierry Reding 
> Date:   Tue Feb 28 15:46:40 2017 +0100
> 
> drm: Introduce drm_framebuffer_{get,put}()
> 
> commit e6b62714e87c8811d5564b6a0738dcde63a51774
> Author: Thierry Reding 
> Date:   Tue Feb 28 15:46:41 2017 +0100
> 
> drm: Introduce drm_gem_object_{get,put}()
> 
> commit 6472e5090be7c78749a3c279b4faae87ab835c40
> Author: Thierry Reding 
> Date:   Tue Feb 28 15:46:42 2017 +0100
> 
> drm: Introduce drm_property_blob_{get,put}()
> 
> Cihangir Akturk (28):
>   drm/amdgpu: switch to drm_*_get(), drm_*_put() helpers
>   drm: mali-dp: switch to drm_*_get(), drm_*_put() helpers
>   drm/armada: switch to drm_*_get(), drm_*_put() helpers
>   drm/ast: switch to drm_*_get(), drm_*_put() helpers
>   drm/bochs: switch to drm_*_get(), drm_*_put() helpers
>   drm/cirrus: switch to drm_*_get(), drm_*_put() helpers
>   drm/etnaviv: switch to drm_*_get(), drm_*_put() helpers
>   drm/exynos: switch to drm_*_get(), drm_*_put() helpers
>   drm/gma500: switch to drm_*_get(), drm_*_put() helpers
>   drm/hisilicon: switch to drm_*_get(), drm_*_put() helpers
>   drm/i915: switch to drm_*_get(), drm_*_put() helpers
>   drm/imx: switch to drm_*_get(), drm_*_put() helpers
>   drm/mediatek: switch to drm_*_get(), drm_*_put() helpers
>   drm/mgag200: switch to drm_*_get(), drm_*_put() helpers
>   drm/msm: switch to drm_*_get(), drm_*_put() helpers
>   drm/nouveau: switch to drm_*_get(), drm_*_put() helpers
>   drm/omapdrm: switch to drm_*_get(), drm_*_put() helpers
>   drm/qxl: switch to drm_*_get(), drm_*_put() helpers
>   drm/radeon: switch to drm_*_get(), drm_*_put() helpers
>   drm/rockchip: switch to drm_*_get(), drm_*_put() helpers
>   drm/tegra: switch to drm_*_get(), drm_*_put() helpers
>   drm/tilcdc: switch to drm_*_get(), drm_*_put() helpers
>   drm/udl: switch to drm_*_get(), drm_*_put() helpers
>   drm/vc4: switch to drm_*_get(), drm_*_put() helpers
>   drm/vgem: switch to drm_*_get(), drm_*_put() helpers
>   drm/virtio: switch to drm_*_get(), drm_*_put() helpers
>   drm/vmwgfx: switch to drm_*_get(), drm_*_put() helpers
>   drm: vboxvideo: switch to drm_*_get(), drm_*_put() helpers
> 
>  drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c   |  2 +-
>  drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c|  2 +-
>  drivers/gpu/drm/amd/amdgpu/amdgpu_display.c   |  6 ++---
>  

[Intel-gfx] [PATCH] dim: Jari as QA lead

[Daniel Vetter]

Cc: "Tahvanainen, Jari" 
Signed-off-by: Daniel Vetter 
---
 dim | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/dim b/dim
index 2b377cb3a3f3..4a4c1adb2c68 100755
--- a/dim
+++ b/dim
@@ -89,7 +89,7 @@ addr_intel_gfx_maintainer1="Daniel Vetter 
"
 addr_intel_gfx_maintainer2="Jani Nikula "
 addr_intel_gfx="intel-gfx@lists.freedesktop.org"
 addr_dri_devel="dri-de...@lists.freedesktop.org"
-addr_intel_qa="\"Christophe Prigent\" "
+addr_intel_qa="\"Tahvanainen, Jari\" "
 
 # integration configuration
 integration_config=nightly.conf
-- 
2.13.3

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[Intel-gfx] [PATCH][drm-next] drm/i915: make structure intel_sprite_plane_funcs static

[Colin King]

From: Colin Ian King 

The structure intel_sprite_plane_funcs is local to the source
and does not need to be in global scope, so make it static.

Cleans up sparse warning:
symbol 'intel_sprite_plane_funcs' was not declared. Should it be static?

Signed-off-by: Colin Ian King 
---
 drivers/gpu/drm/i915/intel_sprite.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_sprite.c 
b/drivers/gpu/drm/i915/intel_sprite.c
index e11f8782c9eb..524933b01483 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -1184,7 +1184,7 @@ static bool 
intel_sprite_plane_format_mod_supported(struct drm_plane *plane,
unreachable();
 }
 
-const struct drm_plane_funcs intel_sprite_plane_funcs = {
+static const struct drm_plane_funcs intel_sprite_plane_funcs = {
 .update_plane = drm_atomic_helper_update_plane,
 .disable_plane = drm_atomic_helper_disable_plane,
 .destroy = intel_plane_destroy,
-- 
2.11.0

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[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm: add retries for lspcon status check

[Patchwork]

== Series Details ==

Series: series starting with [1/2] drm: add retries for lspcon status check
URL   : https://patchwork.freedesktop.org/series/28684/
State : success

== Summary ==

Series 28684v1 Series without cover letter
https://patchwork.freedesktop.org/api/1.0/series/28684/revisions/1/mbox/

fi-bdw-5557u total:279  pass:268  dwarn:0   dfail:0   fail:0   skip:11  
time:450s
fi-bdw-gvtdvmtotal:279  pass:265  dwarn:0   dfail:0   fail:0   skip:14  
time:440s
fi-blb-e6850 total:279  pass:224  dwarn:1   dfail:0   fail:0   skip:54  
time:357s
fi-bsw-n3050 total:279  pass:243  dwarn:0   dfail:0   fail:0   skip:36  
time:541s
fi-bxt-j4205 total:279  pass:260  dwarn:0   dfail:0   fail:0   skip:19  
time:526s
fi-byt-j1900 total:279  pass:254  dwarn:1   dfail:0   fail:0   skip:24  
time:520s
fi-byt-n2820 total:279  pass:250  dwarn:1   dfail:0   fail:0   skip:28  
time:515s
fi-glk-2atotal:279  pass:260  dwarn:0   dfail:0   fail:0   skip:19  
time:608s
fi-hsw-4770  total:279  pass:263  dwarn:0   dfail:0   fail:0   skip:16  
time:444s
fi-hsw-4770r total:279  pass:263  dwarn:0   dfail:0   fail:0   skip:16  
time:423s
fi-ilk-650   total:279  pass:229  dwarn:0   dfail:0   fail:0   skip:50  
time:421s
fi-ivb-3520m total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:508s
fi-ivb-3770  total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:476s
fi-kbl-7500u total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:471s
fi-kbl-7560u total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  
time:580s
fi-kbl-r total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:596s
fi-pnv-d510  total:279  pass:223  dwarn:1   dfail:0   fail:0   skip:55  
time:526s
fi-skl-6260u total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  
time:463s
fi-skl-6700k total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:475s
fi-skl-6770hqtotal:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  
time:482s
fi-skl-gvtdvmtotal:279  pass:266  dwarn:0   dfail:0   fail:0   skip:13  
time:434s
fi-skl-x1585ltotal:279  pass:268  dwarn:0   dfail:0   fail:0   skip:11  
time:477s
fi-snb-2520m total:279  pass:251  dwarn:0   dfail:0   fail:0   skip:28  
time:551s
fi-snb-2600  total:279  pass:250  dwarn:0   dfail:0   fail:0   skip:29  
time:414s

fbb8288699ef622bbfc6e10bdca6773a16f93fac drm-tip: 2017y-08m-11d-09h-03m-47s UTC 
integration manifest
0462ff55be8c drm/i915: Don't give up waiting on INVALID_MODE
1965948a4bdd drm: add retries for lspcon status check

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_5382/
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Re: [Intel-gfx] [PATCH i-g-t] tests/kms_mmap_write_crc: Add drmModeDirtyFB after dirtying fb

[Lofstedt, Marta]

Acked-by: Marta Lofstedt 

> -Original Message-
> From: Maarten Lankhorst [mailto:maarten.lankho...@linux.intel.com]
> Sent: Thursday, August 10, 2017 3:42 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Maarten Lankhorst ; Lofstedt,
> Marta 
> Subject: [PATCH i-g-t] tests/kms_mmap_write_crc: Add drmModeDirtyFB
> after dirtying fb
> 
> The test shows the need for coherency through the dma-buf sync ioctl's, but
> forgets to call dirtyfb, without this the FB Is never updated and we will fail
> anyway.
> 
> Solve this by adding a drmModeDirtyFB, I've confirmed by adding -n that the
> test will still faill without prime_sync_end anyway, so the test is still 
> useful.
> 
> Signed-off-by: Maarten Lankhorst 
> Cc: Marta Löfstedt 
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101109
> ---
>  tests/kms_mmap_write_crc.c | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/tests/kms_mmap_write_crc.c b/tests/kms_mmap_write_crc.c
> index e5f089f6b78f..dd44ce97238a 100644
> --- a/tests/kms_mmap_write_crc.c
> +++ b/tests/kms_mmap_write_crc.c
> @@ -156,6 +156,8 @@ static void test(data_t *data)
>   if (ioctl_sync)
>   prime_sync_end(dma_buf_fd, true);
> 
> + do_or_die(drmModeDirtyFB(data->drm_fd, fb->fb_id, NULL,
> 0));
> +
>   /* check that the crc is as expected, which requires that caches
> got flushed */
>   igt_pipe_crc_collect_crc(data->pipe_crc, );
>   igt_assert_crc_equal(, >ref_crc);
> --
> 2.11.0

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[Intel-gfx] [PATCH 2/2] drm/i915: Don't give up waiting on INVALID_MODE

[Shashank Sharma]

Our current logic to read LSPCON's current mode, stops retries and
breaks wait-loop, if it gets LSPCON_MODE_INVALID as return from the
core function. This doesn't allow us to try reading the mode again.

This patch removes this condition and allows retries reading
the currnt mode until timeout.

This also fixes/prevents some of the noise in form of debug messages
while running IGT CI test cases.

Cc: Imre Deak 
Cc: Daniel Vetter 
Signed-off-by: Shashank Sharma 
Signed-off-by: Mahesh Kumar 
---
 drivers/gpu/drm/i915/intel_lspcon.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_lspcon.c 
b/drivers/gpu/drm/i915/intel_lspcon.c
index 8413a4c..e64a336 100644
--- a/drivers/gpu/drm/i915/intel_lspcon.c
+++ b/drivers/gpu/drm/i915/intel_lspcon.c
@@ -118,14 +118,13 @@ static enum drm_lspcon_mode lspcon_wait_mode(struct 
intel_lspcon *lspcon,
enum drm_lspcon_mode current_mode;
 
current_mode = lspcon_get_current_mode(lspcon);
-   if (current_mode == mode || current_mode == DRM_LSPCON_MODE_INVALID)
+   if (current_mode == mode)
goto out;
 
DRM_DEBUG_KMS("Waiting for LSPCON mode %s to settle\n",
  lspcon_mode_name(mode));
 
-   wait_for((current_mode = lspcon_get_current_mode(lspcon)) == mode ||
-current_mode == DRM_LSPCON_MODE_INVALID, 100);
+   wait_for((current_mode = lspcon_get_current_mode(lspcon)) == mode, 100);
if (current_mode != mode)
DRM_DEBUG_KMS("LSPCON mode hasn't settled\n");
 
-- 
2.7.4

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[Intel-gfx] [PATCH 1/2] drm: add retries for lspcon status check

[Shashank Sharma]

It's an observation during some CI tests that few LSPCON chips
respond slow while system is under load, and need some delay
while reading current mode status using i2c-over-aux channel.

This patch:
- Adds few retries and delays before declaring a read
  failure from LSPCON hardware.
- Changes the debug level of the print from ERROR->DEBUG
  whereas another patch in I915 will add an ERROR message
  from the caller when we have timed out all our limits.

Cc: Ville Syrjala 
Cc: Imre Deak 
Signed-off-by: Shashank Sharma 
Signed-off-by: Mahesh Kumar 
---
 drivers/gpu/drm/drm_dp_dual_mode_helper.c | 14 +++---
 1 file changed, 11 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/drm_dp_dual_mode_helper.c 
b/drivers/gpu/drm/drm_dp_dual_mode_helper.c
index 80e62f6..c63eac8 100644
--- a/drivers/gpu/drm/drm_dp_dual_mode_helper.c
+++ b/drivers/gpu/drm/drm_dp_dual_mode_helper.c
@@ -409,6 +409,7 @@ int drm_lspcon_get_mode(struct i2c_adapter *adapter,
enum drm_lspcon_mode *mode)
 {
u8 data;
+   u8 retry = 5;
int ret = 0;
 
if (!mode) {
@@ -417,10 +418,17 @@ int drm_lspcon_get_mode(struct i2c_adapter *adapter,
}
 
/* Read Status: i2c over aux */
-   ret = drm_dp_dual_mode_read(adapter, DP_DUAL_MODE_LSPCON_CURRENT_MODE,
-   , sizeof(data));
+   do {
+   ret = drm_dp_dual_mode_read(adapter,
+   DP_DUAL_MODE_LSPCON_CURRENT_MODE,
+   , sizeof(data));
+   if (!ret || !retry--)
+   break;
+   usleep_range(500, 1000);
+   } while (1);
+
if (ret < 0) {
-   DRM_ERROR("LSPCON read(0x80, 0x41) failed\n");
+   DRM_DEBUG_KMS("LSPCON read(0x80, 0x41) failed\n");
return -EFAULT;
}
 
-- 
2.7.4

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Re: [Intel-gfx] [PATCH igt] igt: Add a test to precheck status of kernel taints

[Chris Wilson]

Quoting Jani Nikula (2017-08-11 14:15:50)
> On Fri, 11 Aug 2017, Chris Wilson  wrote:
> > Many times an error may occur before the start of igt, leaving the
> > system in a less-than-optimal debugging state (e.g. an oops turning off
> > lockdep). Flag such occasions by checking /proc/sys/kernel/tainted.
> 
> Hmm, which flag is set for unsafe module params?

That is

CHECK(6, "Tainted by user request", WARN);

I left it as WARN because imo we shouldn't be using those to drive
tests.
-Chris
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[Intel-gfx] ✓ Fi.CI.BAT: success for igt: Add a test to precheck status of kernel taints

[Patchwork]

== Series Details ==

Series: igt: Add a test to precheck status of kernel taints
URL   : https://patchwork.freedesktop.org/series/28683/
State : success

== Summary ==

IGT patchset tested on top of latest successful build
1385b31d9371fae02af2fd8adb0d9ea86a5bb0f2 tests/igt_command_line: Ignore subtest 
list for kms_ccs

with latest DRM-Tip kernel build CI_DRM_2948
fbb8288699ef drm-tip: 2017y-08m-11d-09h-03m-47s UTC integration manifest

Test kms_cursor_legacy:
Subgroup basic-busy-flip-before-cursor-atomic:
pass   -> FAIL   (fi-snb-2600) fdo#100215

fdo#100215 https://bugs.freedesktop.org/show_bug.cgi?id=100215

fi-bdw-5557u total:279  pass:268  dwarn:0   dfail:0   fail:0   skip:11  
time:445s
fi-bdw-gvtdvmtotal:279  pass:265  dwarn:0   dfail:0   fail:0   skip:14  
time:435s
fi-blb-e6850 total:279  pass:224  dwarn:1   dfail:0   fail:0   skip:54  
time:367s
fi-bsw-n3050 total:279  pass:243  dwarn:0   dfail:0   fail:0   skip:36  
time:557s
fi-bxt-j4205 total:279  pass:260  dwarn:0   dfail:0   fail:0   skip:19  
time:510s
fi-byt-j1900 total:279  pass:254  dwarn:1   dfail:0   fail:0   skip:24  
time:517s
fi-byt-n2820 total:279  pass:250  dwarn:1   dfail:0   fail:0   skip:28  
time:507s
fi-glk-2atotal:279  pass:260  dwarn:0   dfail:0   fail:0   skip:19  
time:606s
fi-hsw-4770  total:279  pass:263  dwarn:0   dfail:0   fail:0   skip:16  
time:442s
fi-hsw-4770r total:279  pass:263  dwarn:0   dfail:0   fail:0   skip:16  
time:414s
fi-ilk-650   total:279  pass:229  dwarn:0   dfail:0   fail:0   skip:50  
time:422s
fi-ivb-3520m total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:508s
fi-ivb-3770  total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:483s
fi-kbl-7500u total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:468s
fi-kbl-7560u total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  
time:582s
fi-kbl-r total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:591s
fi-pnv-d510  total:279  pass:223  dwarn:1   dfail:0   fail:0   skip:55  
time:529s
fi-skl-6260u total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  
time:466s
fi-skl-6700k total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:482s
fi-skl-6770hqtotal:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  
time:490s
fi-skl-gvtdvmtotal:279  pass:266  dwarn:0   dfail:0   fail:0   skip:13  
time:441s
fi-skl-x1585ltotal:279  pass:268  dwarn:0   dfail:0   fail:0   skip:11  
time:476s
fi-snb-2520m total:279  pass:251  dwarn:0   dfail:0   fail:0   skip:28  
time:554s
fi-snb-2600  total:279  pass:249  dwarn:0   dfail:0   fail:1   skip:29  
time:406s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_58/
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Re: [Intel-gfx] [PATCH igt] igt: Add a test to precheck status of kernel taints

[Jani Nikula]

On Fri, 11 Aug 2017, Chris Wilson  wrote:
> Many times an error may occur before the start of igt, leaving the
> system in a less-than-optimal debugging state (e.g. an oops turning off
> lockdep). Flag such occasions by checking /proc/sys/kernel/tainted.

Hmm, which flag is set for unsafe module params?

BR,
Jani.


>
> Signed-off-by: Chris Wilson 
> ---
>  tests/Makefile.sources |  1 +
>  tests/kernel_taint.c   | 74 
> ++
>  2 files changed, 75 insertions(+)
>  create mode 100644 tests/kernel_taint.c
>
> diff --git a/tests/Makefile.sources b/tests/Makefile.sources
> index 3352aad4..4dc89517 100644
> --- a/tests/Makefile.sources
> +++ b/tests/Makefile.sources
> @@ -168,6 +168,7 @@ TESTS_progs = \
>   gen3_render_tiledy_blits \
>   gen7_forcewake_mt \
>   gvt_basic \
> + kernel_taint \
>   kms_3d \
>   kms_addfb_basic \
>   kms_atomic \
> diff --git a/tests/kernel_taint.c b/tests/kernel_taint.c
> new file mode 100644
> index ..7fd1f07a
> --- /dev/null
> +++ b/tests/kernel_taint.c
> @@ -0,0 +1,74 @@
> +/*
> + * Copyright 2017 Intel Corporation
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the "Software"),
> + * to deal in the Software without restriction, including without limitation
> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> + * and/or sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice (including the next
> + * paragraph) shall be included in all copies or substantial portions of the
> + * Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 
> DEALINGS
> + * IN THE SOFTWARE.
> + */
> +
> +#include 
> +#include 
> +
> +#include "igt.h"
> +#include "igt_sysfs.h"
> +
> +#define BIT(x) (1ul << (x))
> +
> +igt_simple_main
> +{
> + unsigned long taint;
> + unsigned int errors = 0;
> + int dir;
> +
> + dir = open("/proc/sys/kernel", O_RDONLY);
> + igt_require_f(dir != -1, "No /proc/sys/kernel found");
> + igt_require(igt_sysfs_scanf(dir, "tainted", "%lu", ) == 1);
> + close(dir);
> +
> +#define CHECK(bit, message, flags) do { \
> + if (taint & BIT(bit)) { \
> + if (flags & (WARN | ERROR)) { \
> + igt_warn("\t%08lx - " message "\n", BIT(bit)); \
> + errors += !!(flags & ERROR); \
> + } else { \
> + igt_info("\t%08lx - " message "\n", BIT(bit)); \
> + } \
> + } \
> +} while (0)
> +#define WARN BIT(0)
> +#define ERROR BIT(1)
> +
> + igt_info("Kernel taint: %08lx\n", taint);
> + CHECK(0, "Non-GPL module loaded", 0);
> + CHECK(1, "Forced module load", 0);
> + CHECK(2, "Unsafe SMP processor", 0);
> + CHECK(3, "Forced module unload", 0);
> + CHECK(4, "Machine Check Exception", WARN);
> + CHECK(5, "Bad page detected", ERROR);
> + CHECK(6, "Tained by user request", WARN);
> + CHECK(7, "System is on fire", ERROR);
> + CHECK(8, "ACPI DSDT has been overriden by user", 0);
> + CHECK(9, "OOPS", ERROR);
> + CHECK(10, "Staging driver loaded; are you mad?", 0);
> + CHECK(11, "Severe firmware bug workaround active", WARN);
> + CHECK(12, "Out-of-tree module loaded", 0);
> + CHECK(13, "Unsigned module loaded", 0);
> + CHECK(14, "Soft-lockup detected", WARN);
> + CHECK(15, "Kernel has been live patched", 0);
> + igt_assert_eq(errors, 0);
> +}

-- 
Jani Nikula, Intel Open Source Technology Center
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[Intel-gfx] [PATCH igt] igt: Add a test to precheck status of kernel taints

[Chris Wilson]

Many times an error may occur before the start of igt, leaving the
system in a less-than-optimal debugging state (e.g. an oops turning off
lockdep). Flag such occasions by checking /proc/sys/kernel/tainted.

Signed-off-by: Chris Wilson 
---
 tests/Makefile.sources |  1 +
 tests/kernel_taint.c   | 74 ++
 2 files changed, 75 insertions(+)
 create mode 100644 tests/kernel_taint.c

diff --git a/tests/Makefile.sources b/tests/Makefile.sources
index 3352aad4..4dc89517 100644
--- a/tests/Makefile.sources
+++ b/tests/Makefile.sources
@@ -168,6 +168,7 @@ TESTS_progs = \
gen3_render_tiledy_blits \
gen7_forcewake_mt \
gvt_basic \
+   kernel_taint \
kms_3d \
kms_addfb_basic \
kms_atomic \
diff --git a/tests/kernel_taint.c b/tests/kernel_taint.c
new file mode 100644
index ..7fd1f07a
--- /dev/null
+++ b/tests/kernel_taint.c
@@ -0,0 +1,74 @@
+/*
+ * Copyright 2017 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+#include 
+#include 
+
+#include "igt.h"
+#include "igt_sysfs.h"
+
+#define BIT(x) (1ul << (x))
+
+igt_simple_main
+{
+   unsigned long taint;
+   unsigned int errors = 0;
+   int dir;
+
+   dir = open("/proc/sys/kernel", O_RDONLY);
+   igt_require_f(dir != -1, "No /proc/sys/kernel found");
+   igt_require(igt_sysfs_scanf(dir, "tainted", "%lu", ) == 1);
+   close(dir);
+
+#define CHECK(bit, message, flags) do { \
+   if (taint & BIT(bit)) { \
+   if (flags & (WARN | ERROR)) { \
+   igt_warn("\t%08lx - " message "\n", BIT(bit)); \
+   errors += !!(flags & ERROR); \
+   } else { \
+   igt_info("\t%08lx - " message "\n", BIT(bit)); \
+   } \
+   } \
+} while (0)
+#define WARN BIT(0)
+#define ERROR BIT(1)
+
+   igt_info("Kernel taint: %08lx\n", taint);
+   CHECK(0, "Non-GPL module loaded", 0);
+   CHECK(1, "Forced module load", 0);
+   CHECK(2, "Unsafe SMP processor", 0);
+   CHECK(3, "Forced module unload", 0);
+   CHECK(4, "Machine Check Exception", WARN);
+   CHECK(5, "Bad page detected", ERROR);
+   CHECK(6, "Tained by user request", WARN);
+   CHECK(7, "System is on fire", ERROR);
+   CHECK(8, "ACPI DSDT has been overriden by user", 0);
+   CHECK(9, "OOPS", ERROR);
+   CHECK(10, "Staging driver loaded; are you mad?", 0);
+   CHECK(11, "Severe firmware bug workaround active", WARN);
+   CHECK(12, "Out-of-tree module loaded", 0);
+   CHECK(13, "Unsigned module loaded", 0);
+   CHECK(14, "Soft-lockup detected", WARN);
+   CHECK(15, "Kernel has been live patched", 0);
+   igt_assert_eq(errors, 0);
+}
-- 
2.13.3

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[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/4] lib: Add some syncobj helpers

[Patchwork]

== Series Details ==

Series: series starting with [1/4] lib: Add some syncobj helpers
URL   : https://patchwork.freedesktop.org/series/28666/
State : success

== Summary ==

IGT patchset tested on top of latest successful build
1385b31d9371fae02af2fd8adb0d9ea86a5bb0f2 tests/igt_command_line: Ignore subtest 
list for kms_ccs

with latest DRM-Tip kernel build CI_DRM_2948
fbb8288699ef drm-tip: 2017y-08m-11d-09h-03m-47s UTC integration manifest

Test kms_flip:
Subgroup basic-flip-vs-modeset:
skip   -> PASS   (fi-skl-x1585l) fdo#101781
Test kms_pipe_crc_basic:
Subgroup suspend-read-crc-pipe-b:
dmesg-warn -> PASS   (fi-byt-n2820) fdo#101705

fdo#101781 https://bugs.freedesktop.org/show_bug.cgi?id=101781
fdo#101705 https://bugs.freedesktop.org/show_bug.cgi?id=101705

fi-bdw-5557u total:279  pass:268  dwarn:0   dfail:0   fail:0   skip:11  
time:449s
fi-bdw-gvtdvmtotal:279  pass:265  dwarn:0   dfail:0   fail:0   skip:14  
time:433s
fi-blb-e6850 total:279  pass:224  dwarn:1   dfail:0   fail:0   skip:54  
time:358s
fi-bsw-n3050 total:279  pass:243  dwarn:0   dfail:0   fail:0   skip:36  
time:544s
fi-bxt-j4205 total:279  pass:260  dwarn:0   dfail:0   fail:0   skip:19  
time:512s
fi-byt-j1900 total:279  pass:254  dwarn:1   dfail:0   fail:0   skip:24  
time:521s
fi-byt-n2820 total:279  pass:251  dwarn:0   dfail:0   fail:0   skip:28  
time:511s
fi-glk-2atotal:279  pass:260  dwarn:0   dfail:0   fail:0   skip:19  
time:604s
fi-hsw-4770  total:279  pass:263  dwarn:0   dfail:0   fail:0   skip:16  
time:449s
fi-hsw-4770r total:279  pass:263  dwarn:0   dfail:0   fail:0   skip:16  
time:415s
fi-ilk-650   total:279  pass:229  dwarn:0   dfail:0   fail:0   skip:50  
time:422s
fi-ivb-3520m total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:511s
fi-ivb-3770  total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:478s
fi-kbl-7500u total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:473s
fi-kbl-7560u total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  
time:587s
fi-kbl-r total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:591s
fi-pnv-d510  total:279  pass:223  dwarn:1   dfail:0   fail:0   skip:55  
time:518s
fi-skl-6260u total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  
time:465s
fi-skl-6700k total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:473s
fi-skl-6770hqtotal:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  
time:483s
fi-skl-gvtdvmtotal:279  pass:266  dwarn:0   dfail:0   fail:0   skip:13  
time:439s
fi-skl-x1585ltotal:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  
time:495s
fi-snb-2520m total:279  pass:251  dwarn:0   dfail:0   fail:0   skip:28  
time:548s
fi-snb-2600  total:279  pass:250  dwarn:0   dfail:0   fail:0   skip:29  
time:409s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_57/
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[Intel-gfx] [PATCH v3 11/28] drm/i915: switch to drm_*_get(), drm_*_put() helpers

[Cihangir Akturk]

Use drm_*_get() and drm_*_put() helpers instead of drm_*_reference()
and drm_*_unreference() helpers.

drm_*_reference() and drm_*_unreference() functions are just
compatibility alias for drm_*_get() and drm_*_put() and should not be
used by new code. So convert all users of compatibility functions to
use the new APIs.

Generated by: scripts/coccinelle/api/drm-get-put.cocci

Signed-off-by: Cihangir Akturk 
---
 drivers/gpu/drm/i915/i915_gem_object.h |  4 ++--
 drivers/gpu/drm/i915/intel_display.c   | 24 
 drivers/gpu/drm/i915/intel_dp_mst.c|  2 +-
 drivers/gpu/drm/i915/intel_fbdev.c |  4 ++--
 4 files changed, 17 insertions(+), 17 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_object.h 
b/drivers/gpu/drm/i915/i915_gem_object.h
index 5b19a49..95cfb64 100644
--- a/drivers/gpu/drm/i915/i915_gem_object.h
+++ b/drivers/gpu/drm/i915/i915_gem_object.h
@@ -257,7 +257,7 @@ __attribute__((nonnull))
 static inline struct drm_i915_gem_object *
 i915_gem_object_get(struct drm_i915_gem_object *obj)
 {
-   drm_gem_object_reference(>base);
+   drm_gem_object_get(>base);
return obj;
 }
 
@@ -268,7 +268,7 @@ __attribute__((nonnull))
 static inline void
 i915_gem_object_put(struct drm_i915_gem_object *obj)
 {
-   __drm_gem_object_unreference(>base);
+   __drm_gem_object_put(>base);
 }
 
 __deprecated
diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index 684d653..70ebc19 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -2672,10 +2672,10 @@ update_state_fb(struct drm_plane *plane)
return;
 
if (plane->state->fb)
-   drm_framebuffer_unreference(plane->state->fb);
+   drm_framebuffer_put(plane->state->fb);
plane->state->fb = plane->fb;
if (plane->state->fb)
-   drm_framebuffer_reference(plane->state->fb);
+   drm_framebuffer_get(plane->state->fb);
 }
 
 static void
@@ -2746,7 +2746,7 @@ intel_find_initial_plane_obj(struct intel_crtc 
*intel_crtc,
 
if (intel_plane_ggtt_offset(state) == plane_config->base) {
fb = c->primary->fb;
-   drm_framebuffer_reference(fb);
+   drm_framebuffer_get(fb);
goto valid_fb;
}
}
@@ -2777,7 +2777,7 @@ intel_find_initial_plane_obj(struct intel_crtc 
*intel_crtc,
  intel_crtc->pipe, PTR_ERR(intel_state->vma));
 
intel_state->vma = NULL;
-   drm_framebuffer_unreference(fb);
+   drm_framebuffer_put(fb);
return;
}
 
@@ -2798,7 +2798,7 @@ intel_find_initial_plane_obj(struct intel_crtc 
*intel_crtc,
if (i915_gem_object_is_tiled(obj))
dev_priv->preserve_bios_swizzle = true;
 
-   drm_framebuffer_reference(fb);
+   drm_framebuffer_get(fb);
primary->fb = primary->state->fb = fb;
primary->crtc = primary->state->crtc = _crtc->base;
 
@@ -9683,7 +9683,7 @@ mode_fits_in_fbdev(struct drm_device *dev,
if (obj->base.size < mode->vdisplay * fb->pitches[0])
return NULL;
 
-   drm_framebuffer_reference(fb);
+   drm_framebuffer_get(fb);
return fb;
 #else
return NULL;
@@ -9864,7 +9864,7 @@ int intel_get_load_detect_pipe(struct drm_connector 
*connector,
if (ret)
goto fail;
 
-   drm_framebuffer_unreference(fb);
+   drm_framebuffer_put(fb);
 
ret = drm_atomic_set_mode_for_crtc(_state->base, mode);
if (ret)
@@ -10174,7 +10174,7 @@ static void intel_unpin_work_fn(struct work_struct 
*__work)
intel_frontbuffer_flip_complete(to_i915(dev),

to_intel_plane(primary)->frontbuffer_bit);
intel_fbc_post_update(crtc);
-   drm_framebuffer_unreference(work->old_fb);
+   drm_framebuffer_put(work->old_fb);
 
BUG_ON(atomic_read(>unpin_work_count) == 0);
atomic_dec(>unpin_work_count);
@@ -10814,7 +10814,7 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
flush_workqueue(dev_priv->wq);
 
/* Reference the objects for the scheduled work. */
-   drm_framebuffer_reference(work->old_fb);
+   drm_framebuffer_get(work->old_fb);
 
crtc->primary->fb = fb;
update_state_fb(crtc->primary);
@@ -10928,7 +10928,7 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
update_state_fb(crtc->primary);
 
i915_gem_object_put(obj);
-   drm_framebuffer_unreference(work->old_fb);
+   drm_framebuffer_put(work->old_fb);
 
spin_lock_irq(>event_lock);
intel_crtc->flip_work = NULL;
@@ -11252,7 +11252,7 @@ static void 
intel_modeset_update_connector_atomic_state(struct drm_device *dev)
drm_connector_list_iter_begin(dev, _iter);

[Intel-gfx] [PATCH v3 00/28] DRM API Conversions

[Cihangir Akturk]

Changes since v2:

- Patch series is based on *drm-misc-next* as suggested by Sean Paul.

- Dropped patch 05 (drm/atmel-hlcdc) and patch 25 (drm/vc4) from v2,
  since they were already pulled in the drm-misc-next

Changes since v1:

- This time patches were generated with coccinelle instead of my own
  script, as suggested by Daniel Vetter.

- Fixed the typo in commit messages. s/adn/and

Note: I've included r-b, a-b tags, as these patches are identical to v1
except for the file: drivers/gpu/drm/i915/i915_gem_object.h

This patch set replaces the occurrences of drm_*_reference() and
drm_*_unreference() with the new drm_*_get() and drm_*_put() functions.
All patches in the series do the same thing, converting to the new APIs.
I created patches per DRM driver as suggested by Daniel Vetter.

This patch set was generated by scripts/coccinelle/api/drm-get-put.cocci

Previous thread can be reached at:
https://marc.info/?l=dri-devel=150178288816047

Background:

In the kernel, reference counting APIs use *_get(), *_put() style naming
to reference-count the objects. But DRM subsystem uses a different
naming for them such as *_reference(), *_unreference() which is
inconsistent with the other reference counting APIs in the kernel. To
solve this consistency issue, Thierry Reding introduced a couple of
functions and compatibility aliases in the following commits for them.

commit 020a218f95bd3ceff7dd1022ff7ebc0497bc7bf9
Author: Thierry Reding 
Date:   Tue Feb 28 15:46:38 2017 +0100

drm: Introduce drm_mode_object_{get,put}()

commit ad09360750afa18a0a0ce0253d6ea6033abc22e7
Author: Thierry Reding 
Date:   Tue Feb 28 15:46:39 2017 +0100

drm: Introduce drm_connector_{get,put}()

commit a4a69da06bc11a937a6e417938b1bb698ee1fa46
Author: Thierry Reding 
Date:   Tue Feb 28 15:46:40 2017 +0100

drm: Introduce drm_framebuffer_{get,put}()

commit e6b62714e87c8811d5564b6a0738dcde63a51774
Author: Thierry Reding 
Date:   Tue Feb 28 15:46:41 2017 +0100

drm: Introduce drm_gem_object_{get,put}()

commit 6472e5090be7c78749a3c279b4faae87ab835c40
Author: Thierry Reding 
Date:   Tue Feb 28 15:46:42 2017 +0100

drm: Introduce drm_property_blob_{get,put}()

Cihangir Akturk (28):
  drm/amdgpu: switch to drm_*_get(), drm_*_put() helpers
  drm: mali-dp: switch to drm_*_get(), drm_*_put() helpers
  drm/armada: switch to drm_*_get(), drm_*_put() helpers
  drm/ast: switch to drm_*_get(), drm_*_put() helpers
  drm/bochs: switch to drm_*_get(), drm_*_put() helpers
  drm/cirrus: switch to drm_*_get(), drm_*_put() helpers
  drm/etnaviv: switch to drm_*_get(), drm_*_put() helpers
  drm/exynos: switch to drm_*_get(), drm_*_put() helpers
  drm/gma500: switch to drm_*_get(), drm_*_put() helpers
  drm/hisilicon: switch to drm_*_get(), drm_*_put() helpers
  drm/i915: switch to drm_*_get(), drm_*_put() helpers
  drm/imx: switch to drm_*_get(), drm_*_put() helpers
  drm/mediatek: switch to drm_*_get(), drm_*_put() helpers
  drm/mgag200: switch to drm_*_get(), drm_*_put() helpers
  drm/msm: switch to drm_*_get(), drm_*_put() helpers
  drm/nouveau: switch to drm_*_get(), drm_*_put() helpers
  drm/omapdrm: switch to drm_*_get(), drm_*_put() helpers
  drm/qxl: switch to drm_*_get(), drm_*_put() helpers
  drm/radeon: switch to drm_*_get(), drm_*_put() helpers
  drm/rockchip: switch to drm_*_get(), drm_*_put() helpers
  drm/tegra: switch to drm_*_get(), drm_*_put() helpers
  drm/tilcdc: switch to drm_*_get(), drm_*_put() helpers
  drm/udl: switch to drm_*_get(), drm_*_put() helpers
  drm/vc4: switch to drm_*_get(), drm_*_put() helpers
  drm/vgem: switch to drm_*_get(), drm_*_put() helpers
  drm/virtio: switch to drm_*_get(), drm_*_put() helpers
  drm/vmwgfx: switch to drm_*_get(), drm_*_put() helpers
  drm: vboxvideo: switch to drm_*_get(), drm_*_put() helpers

 drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c   |  2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c|  2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c   |  6 ++---
 drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c|  4 +--
 drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c   | 22 -
 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c|  6 ++---
 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c|  6 ++---
 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c |  6 ++---
 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c |  6 ++---
 drivers/gpu/drm/arm/malidp_planes.c   |  2 +-
 drivers/gpu/drm/armada/armada_crtc.c  | 22 -
 drivers/gpu/drm/armada/armada_drv.c   |  2 +-
 drivers/gpu/drm/armada/armada_fb.c|  8 +++---
 drivers/gpu/drm/armada/armada_fbdev.c |  6 ++---
 drivers/gpu/drm/armada/armada_gem.c   | 14 +--
 drivers/gpu/drm/armada/armada_overlay.c   |  4 +--
 drivers/gpu/drm/ast/ast_fb.c  |  2 +-
 drivers/gpu/drm/ast/ast_main.c   

[Intel-gfx] ✓ Fi.CI.BAT: success for tests/kms: increase max threshold time for edid read (rev5)

[Patchwork]

== Series Details ==

Series: tests/kms: increase max threshold time for edid read (rev5)
URL   : https://patchwork.freedesktop.org/series/28399/
State : success

== Summary ==

IGT patchset tested on top of latest successful build
1385b31d9371fae02af2fd8adb0d9ea86a5bb0f2 tests/igt_command_line: Ignore subtest 
list for kms_ccs

with latest DRM-Tip kernel build CI_DRM_2948
fbb8288699ef drm-tip: 2017y-08m-11d-09h-03m-47s UTC integration manifest

fi-bdw-5557u total:279  pass:268  dwarn:0   dfail:0   fail:0   skip:11  
time:452s
fi-bdw-gvtdvmtotal:279  pass:265  dwarn:0   dfail:0   fail:0   skip:14  
time:429s
fi-blb-e6850 total:279  pass:224  dwarn:1   dfail:0   fail:0   skip:54  
time:361s
fi-bsw-n3050 total:279  pass:243  dwarn:0   dfail:0   fail:0   skip:36  
time:541s
fi-bxt-j4205 total:279  pass:260  dwarn:0   dfail:0   fail:0   skip:19  
time:520s
fi-byt-j1900 total:279  pass:254  dwarn:1   dfail:0   fail:0   skip:24  
time:517s
fi-byt-n2820 total:279  pass:250  dwarn:1   dfail:0   fail:0   skip:28  
time:509s
fi-glk-2atotal:279  pass:260  dwarn:0   dfail:0   fail:0   skip:19  
time:600s
fi-hsw-4770  total:279  pass:263  dwarn:0   dfail:0   fail:0   skip:16  
time:444s
fi-hsw-4770r total:279  pass:263  dwarn:0   dfail:0   fail:0   skip:16  
time:423s
fi-ilk-650   total:279  pass:229  dwarn:0   dfail:0   fail:0   skip:50  
time:421s
fi-ivb-3520m total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:512s
fi-ivb-3770  total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:481s
fi-kbl-7500u total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:473s
fi-kbl-7560u total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  
time:579s
fi-kbl-r total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:594s
fi-pnv-d510  total:279  pass:223  dwarn:1   dfail:0   fail:0   skip:55  
time:530s
fi-skl-6260u total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  
time:460s
fi-skl-6700k total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:474s
fi-skl-6770hqtotal:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  
time:481s
fi-skl-gvtdvmtotal:279  pass:266  dwarn:0   dfail:0   fail:0   skip:13  
time:435s
fi-skl-x1585ltotal:279  pass:268  dwarn:0   dfail:0   fail:0   skip:11  
time:476s
fi-snb-2520m total:279  pass:251  dwarn:0   dfail:0   fail:0   skip:28  
time:549s
fi-snb-2600  total:279  pass:250  dwarn:0   dfail:0   fail:0   skip:29  
time:406s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_56/
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Re: [Intel-gfx] [PATCH 1/3] drm/i915/perf: Initialise dynamic sysfs group before creation

[Lionel Landwerlin]

On 10/08/17 18:57, Chris Wilson wrote:

Another case where we need to call sysfs_attr_init() to setup the
internal lockdep class prior to use:

[9.325229] BUG: key 880168bc7bb0 not in .data!
[9.325240] DEBUG_LOCKS_WARN_ON(1)
[9.325250] [ cut here ]
[9.325280] WARNING: CPU: 1 PID: 275 at kernel/locking/lockdep.c:3156 
lockdep_init_map+0x1b2/0x1c0
[9.325301] Modules linked in: intel_powerclamp(+) coretemp crct10dif_pclmul 
crc32_pclmul ghash_clmulni_intel i915(+) snd_hda_intel snd_hda_codec snd_hwdep 
r8169 mii snd_hda_core snd_pcm prime_numbers i2c_hid pinctrl_geminilake 
pinctrl_intel
[9.325375] CPU: 1 PID: 275 Comm: modprobe Not tainted 
4.13.0-rc4-CI-Trybot_1040+ #1
[9.325395] Hardware name: Intel Corp. Geminilake/GLK RVP2 LP4SD (07), BIOS 
GELKRVPA.X64.0045.B51.1704281422 04/28/2017
[9.325422] task: 8801721a4ec0 task.stack: c91dc000
[9.325440] RIP: 0010:lockdep_init_map+0x1b2/0x1c0
[9.325456] RSP: 0018:c91dfa10 EFLAGS: 00010282
[9.325473] RAX: 0016 RBX: 880168d54b80 RCX: 
[9.325488] RDX: 8001 RSI: 0001 RDI: 810f0800
[9.325505] RBP: c91dfa30 R08: 0001 R09: 
[9.325521] R10:  R11:  R12: 880168bc7bb0
[9.325537] R13:  R14: 880168bc7b98 R15: 81a263a0
[9.325554] FS:  7fb60c3fd700() GS:88017fc8() 
knlGS:
[9.325574] CS:  0010 DS:  ES:  CR0: 80050033
[9.325588] CR2: 006582777d80 CR3: 00016d818000 CR4: 003406e0
[9.325604] Call Trace:
[9.325618]  __kernfs_create_file+0x76/0xe0
[9.325632]  sysfs_add_file_mode_ns+0x8a/0x1a0
[9.325646]  internal_create_group+0xea/0x2c0
[9.325660]  sysfs_create_group+0x13/0x20
[9.325737]  i915_perf_register+0xde/0x220 [i915]
[9.325800]  i915_driver_load+0xa77/0x16c0 [i915]
[9.325863]  i915_pci_probe+0x37/0x90 [i915]
[9.325880]  pci_device_probe+0xa8/0x130
[9.325894]  driver_probe_device+0x29c/0x450
[9.325908]  __driver_attach+0xe3/0xf0
[9.325922]  ? driver_probe_device+0x450/0x450
[9.325935]  bus_for_each_dev+0x62/0xa0
[9.325948]  driver_attach+0x1e/0x20
[9.325960]  bus_add_driver+0x173/0x270
[9.325974]  driver_register+0x60/0xe0
[9.325986]  __pci_register_driver+0x60/0x70
[9.326044]  i915_init+0x6f/0x78 [i915]
[9.326066]  ? 0xa024e000
[9.326079]  do_one_initcall+0x43/0x170
[9.326094]  ? rcu_read_lock_sched_held+0x7a/0x90
[9.326109]  ? kmem_cache_alloc_trace+0x261/0x2d0
[9.326124]  do_init_module+0x5f/0x206
[9.326137]  load_module+0x2561/0x2da0
[9.326150]  ? show_coresize+0x30/0x30
[9.326165]  ? kernel_read_file+0x105/0x190
[9.326180]  SyS_finit_module+0xc1/0x100
[9.326192]  ? SyS_finit_module+0xc1/0x100
[9.326210]  entry_SYSCALL_64_fastpath+0x1c/0xb1
[9.326223] RIP: 0033:0x7fb60bf359f9
[9.326234] RSP: 002b:7fff92b47c48 EFLAGS: 0246 ORIG_RAX: 
0139
[9.326255] RAX: ffda RBX: 814898a3 RCX: 7fb60bf359f9
[9.326271] RDX:  RSI: 0028a9ceef8b RDI: 
[9.326287] RBP: c91dff88 R08:  R09: 
[9.326303] R10:  R11: 0246 R12: 0004
[9.326319] R13: 0028aaef2a70 R14:  R15: 0028aaeee5d0
[9.326339]  ? __this_cpu_preempt_check+0x13/0x20
[9.326353] Code: f1 39 00 85 c0 0f 84 38 ff ff ff 83 3d 9f 44 ce 01 00 0f 85 2b 
ff ff ff 48 c7 c6 b2 a2 c7 81 48 c7 c7 53 40 c5 81 e8 3f 82 01 00 <0f> ff e9 11 
ff ff ff 0f 1f 80 00 00 00 00 55 31 c9 31 d2 31 f6

Fixes: 701f8231a2fe ("drm/i915/perf: prune OA configs")
Signed-off-by: Chris Wilson 
Cc: Lionel Landwerlin 
Cc: Matthew Auld 
---
  drivers/gpu/drm/i915/i915_perf.c | 3 +--
  1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
index e3e2663117e9..1be355d14e8a 100644
--- a/drivers/gpu/drm/i915/i915_perf.c
+++ b/drivers/gpu/drm/i915/i915_perf.c
@@ -2908,8 +2908,7 @@ void i915_perf_register(struct drm_i915_private *dev_priv)
if (!dev_priv->perf.metrics_kobj)
goto exit;
  
-	memset(_priv->perf.oa.test_config, 0,

-  sizeof(dev_priv->perf.oa.test_config));
+   sysfs_attr_init(_priv->perf.oa.test_config.sysfs_metric_id.attr);
  
  	if (IS_HASWELL(dev_priv)) {

i915_perf_load_test_config_hsw(dev_priv);



Reviewed-by: Lionel Landwerlin 

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[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/vbt: ignore extraneous child devices for a port

[Patchwork]

== Series Details ==

Series: drm/i915/vbt: ignore extraneous child devices for a port
URL   : https://patchwork.freedesktop.org/series/28681/
State : success

== Summary ==

Series 28681v1 drm/i915/vbt: ignore extraneous child devices for a port
https://patchwork.freedesktop.org/api/1.0/series/28681/revisions/1/mbox/

Test kms_flip:
Subgroup basic-flip-vs-modeset:
skip   -> PASS   (fi-skl-x1585l) fdo#101781
Test kms_pipe_crc_basic:
Subgroup suspend-read-crc-pipe-b:
dmesg-warn -> PASS   (fi-byt-n2820) fdo#101705

fdo#101781 https://bugs.freedesktop.org/show_bug.cgi?id=101781
fdo#101705 https://bugs.freedesktop.org/show_bug.cgi?id=101705

fi-bdw-5557u total:279  pass:268  dwarn:0   dfail:0   fail:0   skip:11  
time:451s
fi-bdw-gvtdvmtotal:279  pass:265  dwarn:0   dfail:0   fail:0   skip:14  
time:440s
fi-blb-e6850 total:279  pass:224  dwarn:1   dfail:0   fail:0   skip:54  
time:355s
fi-bsw-n3050 total:279  pass:243  dwarn:0   dfail:0   fail:0   skip:36  
time:550s
fi-bxt-j4205 total:279  pass:260  dwarn:0   dfail:0   fail:0   skip:19  
time:515s
fi-byt-j1900 total:279  pass:254  dwarn:1   dfail:0   fail:0   skip:24  
time:520s
fi-byt-n2820 total:279  pass:251  dwarn:0   dfail:0   fail:0   skip:28  
time:509s
fi-glk-2atotal:279  pass:260  dwarn:0   dfail:0   fail:0   skip:19  
time:604s
fi-hsw-4770  total:279  pass:263  dwarn:0   dfail:0   fail:0   skip:16  
time:444s
fi-hsw-4770r total:279  pass:263  dwarn:0   dfail:0   fail:0   skip:16  
time:414s
fi-ilk-650   total:279  pass:229  dwarn:0   dfail:0   fail:0   skip:50  
time:420s
fi-ivb-3520m total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:518s
fi-ivb-3770  total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:480s
fi-kbl-7500u total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:477s
fi-kbl-7560u total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  
time:586s
fi-kbl-r total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:588s
fi-pnv-d510  total:279  pass:223  dwarn:1   dfail:0   fail:0   skip:55  
time:525s
fi-skl-6260u total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  
time:461s
fi-skl-6700k total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:473s
fi-skl-6770hqtotal:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  
time:486s
fi-skl-gvtdvmtotal:279  pass:266  dwarn:0   dfail:0   fail:0   skip:13  
time:441s
fi-skl-x1585ltotal:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  
time:501s
fi-snb-2520m total:279  pass:251  dwarn:0   dfail:0   fail:0   skip:28  
time:546s
fi-snb-2600  total:279  pass:250  dwarn:0   dfail:0   fail:0   skip:29  
time:415s

fbb8288699ef622bbfc6e10bdca6773a16f93fac drm-tip: 2017y-08m-11d-09h-03m-47s UTC 
integration manifest
848d790e03a8 drm/i915/vbt: ignore extraneous child devices for a port

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_5381/
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Re: [Intel-gfx] [PATCH 01/16] drm/i915: Keep a small stash of preallocated WC pages

[Chris Wilson]

Quoting Joonas Lahtinen (2017-08-11 08:34:02)
> On ke, 2017-07-26 at 14:25 +0100, Chris Wilson wrote:
> > - if (vm->pt_kmap_wc)
> > - set_pages_array_wb(vm->free_pages.pages,
> > -    pagevec_count(>free_pages));
> > + /* When we use WC, first fill up the global stash and then
> > +  * only if full immediately free the overflow.
> > +  */
> > +
> > + lockdep_assert_held(>i915->drm.struct_mutex);
> 
> I'd again lift this up to the beginning.

I placed it here to show that only this path required the extra lock
with a plan that we would take a more specialised lock at this point.

> 
> > @@ -447,12 +493,31 @@ static void fill_page_dma_32(struct 
> > i915_address_space *vm,
> >  static int
> >  setup_scratch_page(struct i915_address_space *vm, gfp_t gfp)
> >  {
> > - return __setup_page_dma(vm, >scratch_page, gfp | __GFP_ZERO);
> > + struct page *page;
> > + dma_addr_t addr;
> > +
> > + page = alloc_page(gfp | __GFP_ZERO);
> > + if (unlikely(!page))
> > + return -ENOMEM;
> > +
> > + addr = dma_map_page(vm->dma, page, 0, PAGE_SIZE,
> > + PCI_DMA_BIDIRECTIONAL);
> > + if (unlikely(dma_mapping_error(vm->dma, addr))) {
> > + __free_page(page);
> > + return -ENOMEM;
> > + }
> > +
> > + vm->scratch_page.page = page;
> > + vm->scratch_page.daddr = addr;
> > + return 0;
> 
> Unrelated hunk, please split.
> 
> >  }
> >  
> >  static void cleanup_scratch_page(struct i915_address_space *vm)
> >  {
> > - cleanup_page_dma(vm, >scratch_page);
> > + struct i915_page_dma *p = >scratch_page;
> > +
> > + dma_unmap_page(vm->dma, p->daddr, PAGE_SIZE, PCI_DMA_BIDIRECTIONAL);
> > + __free_page(p->page);
> 
> Ditto.
> 
> >  }
> >  
> >  static struct i915_page_table *alloc_pt(struct i915_address_space *vm)
> > @@ -1332,18 +1397,18 @@ static int gen8_ppgtt_init(struct i915_hw_ppgtt 
> > *ppgtt)
> >   1ULL << 48 :
> >   1ULL << 32;
> >  
> > - ret = gen8_init_scratch(>base);
> > - if (ret) {
> > - ppgtt->base.total = 0;
> > - return ret;
> > - }
> > -
> >   /* There are only few exceptions for gen >=6. chv and bxt.
> >    * And we are not sure about the latter so play safe for now.
> >    */
> >   if (IS_CHERRYVIEW(dev_priv) || IS_BROXTON(dev_priv))
> >   ppgtt->base.pt_kmap_wc = true;
> >  
> > + ret = gen8_init_scratch(>base);
> > + if (ret) {
> > + ppgtt->base.total = 0;
> > + return ret;
> > + }
> > +
> 
> More unrelated hunks.

Ah, but they weren't.
-Chris
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[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Split obj->cache_coherent to track r/w (rev4)

[Patchwork]

== Series Details ==

Series: drm/i915: Split obj->cache_coherent to track r/w (rev4)
URL   : https://patchwork.freedesktop.org/series/28641/
State : success

== Summary ==

Series 28641v4 drm/i915: Split obj->cache_coherent to track r/w
https://patchwork.freedesktop.org/api/1.0/series/28641/revisions/4/mbox/

fi-bdw-5557u total:279  pass:268  dwarn:0   dfail:0   fail:0   skip:11  
time:456s
fi-bdw-gvtdvmtotal:279  pass:265  dwarn:0   dfail:0   fail:0   skip:14  
time:433s
fi-blb-e6850 total:279  pass:224  dwarn:1   dfail:0   fail:0   skip:54  
time:354s
fi-bsw-n3050 total:279  pass:243  dwarn:0   dfail:0   fail:0   skip:36  
time:542s
fi-bxt-j4205 total:279  pass:260  dwarn:0   dfail:0   fail:0   skip:19  
time:517s
fi-byt-j1900 total:279  pass:254  dwarn:1   dfail:0   fail:0   skip:24  
time:525s
fi-byt-n2820 total:279  pass:250  dwarn:1   dfail:0   fail:0   skip:28  
time:509s
fi-glk-2atotal:279  pass:260  dwarn:0   dfail:0   fail:0   skip:19  
time:612s
fi-hsw-4770  total:279  pass:263  dwarn:0   dfail:0   fail:0   skip:16  
time:445s
fi-hsw-4770r total:279  pass:263  dwarn:0   dfail:0   fail:0   skip:16  
time:418s
fi-ilk-650   total:279  pass:229  dwarn:0   dfail:0   fail:0   skip:50  
time:425s
fi-ivb-3520m total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:506s
fi-ivb-3770  total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:487s
fi-kbl-7500u total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:473s
fi-kbl-7560u total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  
time:590s
fi-kbl-r total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:592s
fi-pnv-d510  total:279  pass:223  dwarn:1   dfail:0   fail:0   skip:55  
time:526s
fi-skl-6260u total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  
time:455s
fi-skl-6700k total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:472s
fi-skl-6770hqtotal:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  
time:480s
fi-skl-gvtdvmtotal:279  pass:266  dwarn:0   dfail:0   fail:0   skip:13  
time:438s
fi-skl-x1585ltotal:279  pass:268  dwarn:0   dfail:0   fail:0   skip:11  
time:481s
fi-snb-2520m total:279  pass:251  dwarn:0   dfail:0   fail:0   skip:28  
time:550s
fi-snb-2600  total:279  pass:250  dwarn:0   dfail:0   fail:0   skip:29  
time:408s

fbb8288699ef622bbfc6e10bdca6773a16f93fac drm-tip: 2017y-08m-11d-09h-03m-47s UTC 
integration manifest
4c222cfa814d drm/i915: Split obj->cache_coherent to track r/w

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_5380/
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[Intel-gfx] [PATCH] drm/i915/vbt: ignore extraneous child devices for a port

[Jani Nikula]

Ever since we've parsed VBT child devices, starting from 6acab15a7b0d
("drm/i915: use the HDMI DDI buffer translations from VBT"), we've
ignored the child device information if more than one child device
references the same port. The rationale for this seems lost in time.

Since commit 311a20949f04 ("drm/i915: don't init DP or HDMI when not
supported by DDI port") we started using this information more to skip
HDMI/DP init if the port wasn't there per VBT child devices. However, at
the same time it added port defaults without further explanation.

Thus, if the child device info was skipped due to multiple child devices
referencing the same port, the device info would be retrieved from the
somewhat arbitrary defaults.

Finally, when commit bb1d132935c2 ("drm/i915/vbt: split out defaults
that are set when there is no VBT") stopped initializing the defaults
whenever VBT is present, thus trusting the VBT more, we stopped
initializing ports which were referenced by more than one child device.

Apparently at least Asus UX305UA, UX305U, and UX306U laptops have VBT
child device blocks which cause this behaviour. Arguably they were
shipped with a broken VBT.

Relax the rules for multiple references to the same port, and use the
first child device info to reference a port. Retain the logic to debug
log about this, though.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101745
Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=196233
Fixes: bb1d132935c2 ("drm/i915/vbt: split out defaults that are set when there 
is no VBT")
Tested-by: Oliver Weißbarth 
Reported-by: Oliver Weißbarth 
Reported-by: Didier G 
Reported-by: Giles Anderson 
Cc: Manasi Navare 
Cc: Ville Syrjälä 
Cc: Paulo Zanoni 
Cc:  # v4.12+
Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/i915/intel_bios.c | 15 +--
 1 file changed, 9 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_bios.c 
b/drivers/gpu/drm/i915/intel_bios.c
index 82b144cdfa1d..183e87e8ea31 100644
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -1120,8 +1120,8 @@ static void parse_ddi_port(struct drm_i915_private 
*dev_priv, enum port port,
bool is_dvi, is_hdmi, is_dp, is_edp, is_crt;
uint8_t aux_channel, ddc_pin;
/* Each DDI port can have more than one value on the "DVO Port" field,
-* so look for all the possible values for each port and abort if more
-* than one is found. */
+* so look for all the possible values for each port.
+*/
int dvo_ports[][3] = {
{DVO_PORT_HDMIA, DVO_PORT_DPA, -1},
{DVO_PORT_HDMIB, DVO_PORT_DPB, -1},
@@ -1130,7 +1130,10 @@ static void parse_ddi_port(struct drm_i915_private 
*dev_priv, enum port port,
{DVO_PORT_CRT, DVO_PORT_HDMIE, DVO_PORT_DPE},
};
 
-   /* Find the child device to use, abort if more than one found. */
+   /*
+* Find the first child device to reference the port, report if more
+* than one found.
+*/
for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
it = dev_priv->vbt.child_dev + i;
 
@@ -1140,11 +1143,11 @@ static void parse_ddi_port(struct drm_i915_private 
*dev_priv, enum port port,
 
if (it->common.dvo_port == dvo_ports[port][j]) {
if (child) {
-   DRM_DEBUG_KMS("More than one child 
device for port %c in VBT.\n",
+   DRM_DEBUG_KMS("More than one child 
device for port %c in VBT, using the first.\n",
  port_name(port));
-   return;
+   } else {
+   child = it;
}
-   child = it;
}
}
}
-- 
2.11.0

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[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Handle full s64 precision for wait-ioctl (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915: Handle full s64 precision for wait-ioctl (rev2)
URL   : https://patchwork.freedesktop.org/series/28420/
State : success

== Summary ==

Series 28420v2 drm/i915: Handle full s64 precision for wait-ioctl
https://patchwork.freedesktop.org/api/1.0/series/28420/revisions/2/mbox/

Test gem_exec_flush:
Subgroup basic-batch-kernel-default-uc:
pass   -> FAIL   (fi-snb-2600) fdo#17
Test kms_flip:
Subgroup basic-flip-vs-modeset:
skip   -> PASS   (fi-skl-x1585l) fdo#101781
Test kms_pipe_crc_basic:
Subgroup suspend-read-crc-pipe-b:
dmesg-warn -> PASS   (fi-byt-n2820) fdo#101705

fdo#17 https://bugs.freedesktop.org/show_bug.cgi?id=17
fdo#101781 https://bugs.freedesktop.org/show_bug.cgi?id=101781
fdo#101705 https://bugs.freedesktop.org/show_bug.cgi?id=101705

fi-bdw-5557u total:279  pass:268  dwarn:0   dfail:0   fail:0   skip:11  
time:444s
fi-bdw-gvtdvmtotal:279  pass:265  dwarn:0   dfail:0   fail:0   skip:14  
time:431s
fi-blb-e6850 total:279  pass:224  dwarn:1   dfail:0   fail:0   skip:54  
time:355s
fi-bsw-n3050 total:279  pass:243  dwarn:0   dfail:0   fail:0   skip:36  
time:546s
fi-bxt-j4205 total:279  pass:260  dwarn:0   dfail:0   fail:0   skip:19  
time:523s
fi-byt-j1900 total:279  pass:254  dwarn:1   dfail:0   fail:0   skip:24  
time:522s
fi-byt-n2820 total:279  pass:251  dwarn:0   dfail:0   fail:0   skip:28  
time:508s
fi-glk-2atotal:279  pass:260  dwarn:0   dfail:0   fail:0   skip:19  
time:602s
fi-hsw-4770  total:279  pass:263  dwarn:0   dfail:0   fail:0   skip:16  
time:445s
fi-hsw-4770r total:279  pass:263  dwarn:0   dfail:0   fail:0   skip:16  
time:419s
fi-ilk-650   total:279  pass:229  dwarn:0   dfail:0   fail:0   skip:50  
time:421s
fi-ivb-3520m total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:497s
fi-ivb-3770  total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:474s
fi-kbl-7500u total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:467s
fi-kbl-7560u total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  
time:586s
fi-kbl-r total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:592s
fi-pnv-d510  total:279  pass:223  dwarn:1   dfail:0   fail:0   skip:55  
time:529s
fi-skl-6260u total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  
time:461s
fi-skl-6700k total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:475s
fi-skl-6770hqtotal:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  
time:477s
fi-skl-gvtdvmtotal:279  pass:266  dwarn:0   dfail:0   fail:0   skip:13  
time:438s
fi-skl-x1585ltotal:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  
time:499s
fi-snb-2520m total:279  pass:251  dwarn:0   dfail:0   fail:0   skip:28  
time:547s
fi-snb-2600  total:279  pass:249  dwarn:0   dfail:0   fail:1   skip:29  
time:405s

fbb8288699ef622bbfc6e10bdca6773a16f93fac drm-tip: 2017y-08m-11d-09h-03m-47s UTC 
integration manifest
b87953debf0e drm/i915: Handle full s64 precision for wait-ioctl

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_5379/
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Re: [Intel-gfx] [PATCH v2] drm/i915: Split obj->cache_coherent to track r/w

[Chris Wilson]

Quoting Chris Wilson (2017-08-11 11:11:31)
> diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c 
> b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> index 5fa44767c29e..9d808838a1ba 100644
> --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> @@ -1842,7 +1842,13 @@ static int eb_move_to_gpu(struct i915_execbuffer *eb)
> eb->request->capture_list = capture;
> }
>  
> -   if (unlikely(obj->cache_dirty && !obj->cache_coherent)) {
> +   /*
> +* If the GPU is not _reading_ through the CPU cache, we need
> +* to make sure that any writes (both previous GPU writes from
> +* before a change in snooping levels and normal CPU writes)
> +* caught in that cache are flushed to main memory.
> +*/
> +   if (unlikely(obj->cache_coherent & obj->cache_dirty)) {

Failure in caffeination.
-Chris
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[Intel-gfx] [PATCH v4] drm/i915: Split obj->cache_coherent to track r/w

[Chris Wilson]

Another month, another story in the cache coherency saga. This time, we
come to the realisation that i915_gem_object_is_coherent() has been
reporting whether we can read from the target without requiring a cache
invalidate; but we were using it in places for testing whether we could
write into the object without requiring a cache flush. So split the
tracking into two, one to decide before reads, one after writes.

See commit e27ab73d17ef ("drm/i915: Mark CPU cache as dirty on every
transition for CPU writes") for the previous entry in this saga.

v2: Be verbose
v3: Remove unused function (i915_gem_object_is_coherent)
v4: Fix inverted coherency check prior to execbuf (from v2)

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101109
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101555
Testcase: igt/kms_mmap_write_crc
Testcase: igt/kms_pwrite_crc
Signed-off-by: Chris Wilson 
Cc: Maarten Lankhorst 
Cc: Dongwon Kim 
Cc: Matt Roper 
Cc: Joonas Lahtinen 
Cc: Mika Kuoppala 
Tested-by: Maarten Lankhorst 
Acked-by: Maarten Lankhorst 
---
 drivers/gpu/drm/i915/Makefile|  1 +
 drivers/gpu/drm/i915/i915_drv.h  |  6 ---
 drivers/gpu/drm/i915/i915_gem.c  | 25 ++--
 drivers/gpu/drm/i915/i915_gem_clflush.c  |  3 +-
 drivers/gpu/drm/i915/i915_gem_execbuffer.c   |  8 +++-
 drivers/gpu/drm/i915/i915_gem_internal.c |  7 ++--
 drivers/gpu/drm/i915/i915_gem_object.c   | 48 
 drivers/gpu/drm/i915/i915_gem_object.h   |  9 -
 drivers/gpu/drm/i915/i915_gem_stolen.c   |  5 ++-
 drivers/gpu/drm/i915/i915_gem_userptr.c  |  4 +-
 drivers/gpu/drm/i915/selftests/huge_gem_object.c |  6 +--
 11 files changed, 90 insertions(+), 32 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/i915_gem_object.c

diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index f8227318dcaf..892f52b53060 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -39,6 +39,7 @@ i915-y += i915_cmd_parser.o \
  i915_gem_gtt.o \
  i915_gem_internal.o \
  i915_gem.o \
+ i915_gem_object.o \
  i915_gem_render_state.o \
  i915_gem_request.o \
  i915_gem_shrinker.o \
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 4f9f7b6ac276..85fdb884ef02 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -4322,10 +4322,4 @@ int remap_io_mapping(struct vm_area_struct *vma,
 unsigned long addr, unsigned long pfn, unsigned long size,
 struct io_mapping *iomap);
 
-static inline bool i915_gem_object_is_coherent(struct drm_i915_gem_object *obj)
-{
-   return (obj->cache_level != I915_CACHE_NONE ||
-   HAS_LLC(to_i915(obj->base.dev)));
-}
-
 #endif
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index dbda7d078245..5a3f3bb3f21d 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -52,7 +52,7 @@ static bool cpu_write_needs_clflush(struct 
drm_i915_gem_object *obj)
if (obj->cache_dirty)
return false;
 
-   if (!obj->cache_coherent)
+   if (!(obj->cache_coherent & I915_BO_CACHE_COHERENT_FOR_WRITE))
return true;
 
return obj->pin_display;
@@ -253,7 +253,7 @@ __i915_gem_object_release_shmem(struct drm_i915_gem_object 
*obj,
 
if (needs_clflush &&
(obj->base.read_domains & I915_GEM_DOMAIN_CPU) == 0 &&
-   !obj->cache_coherent)
+   !(obj->cache_coherent & I915_BO_CACHE_COHERENT_FOR_READ))
drm_clflush_sg(pages);
 
__start_cpu_write(obj);
@@ -800,7 +800,8 @@ int i915_gem_obj_prepare_shmem_read(struct 
drm_i915_gem_object *obj,
if (ret)
return ret;
 
-   if (obj->cache_coherent || !static_cpu_has(X86_FEATURE_CLFLUSH)) {
+   if (obj->cache_coherent & I915_BO_CACHE_COHERENT_FOR_READ ||
+   !static_cpu_has(X86_FEATURE_CLFLUSH)) {
ret = i915_gem_object_set_to_cpu_domain(obj, false);
if (ret)
goto err_unpin;
@@ -852,7 +853,8 @@ int i915_gem_obj_prepare_shmem_write(struct 
drm_i915_gem_object *obj,
if (ret)
return ret;
 
-   if (obj->cache_coherent || !static_cpu_has(X86_FEATURE_CLFLUSH)) {
+   if (obj->cache_coherent & I915_BO_CACHE_COHERENT_FOR_WRITE ||
+   !static_cpu_has(X86_FEATURE_CLFLUSH)) {
ret = i915_gem_object_set_to_cpu_domain(obj, true);
if (ret)
goto err_unpin;
@@ -3677,8 +3679,7 @@ int 

[Intel-gfx] [PATCH v2] drm/i915: Handle full s64 precision for wait-ioctl

[Chris Wilson]

The wait-ioctl is optionally supplied a timeout with nanosecond
precision in a s64 field. We use nsecs_to_jiffies64() to convert that
into the jiffies consumed by the scheduler, but internally
nsecs_to_jiffies64() does not guard against overflow (as it's purpose is
for use by the scheduler and not drivers!). So we must guard against the
overflow ourselves, and in the process note that we may then return
much earlier than the timeout selected by the user, so don't report
ETIME unless we do hit the timeout. (Woe betold us though if the user
waits for a year (32bit) and the request is still not complete!)

v2: Refine overflow detection (to not include an overffow itself)

Reported-by: Jason Ekstrand 
Signed-off-by: Chris Wilson 
Cc: Joonas Lahtinen 
Cc: Daniel Vetter 
---
 drivers/gpu/drm/i915/i915_drv.h | 5 +
 drivers/gpu/drm/i915/i915_gem.c | 6 +-
 2 files changed, 10 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 907603cba447..4f9f7b6ac276 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -4171,6 +4171,11 @@ static inline unsigned long 
msecs_to_jiffies_timeout(const unsigned int m)
 
 static inline unsigned long nsecs_to_jiffies_timeout(const u64 n)
 {
+   /* nsecs_to_jiffies64() does not guard against overflow */
+   if (NSEC_PER_SEC % HZ &&
+   div_u64(n, NSEC_PER_SEC) >= MAX_JIFFY_OFFSET / HZ)
+   return MAX_JIFFY_OFFSET;
+
 return min_t(u64, MAX_JIFFY_OFFSET, nsecs_to_jiffies64(n) + 1);
 }
 
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 000a764ee8d9..dbda7d078245 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -3284,7 +3284,7 @@ static unsigned long to_wait_timeout(s64 timeout_ns)
  *  -ERESTARTSYS: signal interrupted the wait
  *  -ENONENT: object doesn't exist
  * Also possible, but rare:
- *  -EAGAIN: GPU wedged
+ *  -EAGAIN: incomplete, restart syscall
  *  -ENOMEM: damn
  *  -ENODEV: Internal IRQ fail
  *  -E?: The add request failed
@@ -3332,6 +3332,10 @@ i915_gem_wait_ioctl(struct drm_device *dev, void *data, 
struct drm_file *file)
 */
if (ret == -ETIME && !nsecs_to_jiffies(args->timeout_ns))
args->timeout_ns = 0;
+
+   /* Asked to wait beyond the jiffie/scheduler precision? */
+   if (ret == -ETIME && args->timeout_ns)
+   ret = -EAGAIN;
}
 
i915_gem_object_put(obj);
-- 
2.13.3

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[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Split obj->cache_coherent to track r/w (rev3)

[Patchwork]

== Series Details ==

Series: drm/i915: Split obj->cache_coherent to track r/w (rev3)
URL   : https://patchwork.freedesktop.org/series/28641/
State : failure

== Summary ==

Series 28641v3 drm/i915: Split obj->cache_coherent to track r/w
https://patchwork.freedesktop.org/api/1.0/series/28641/revisions/3/mbox/

Test core_auth:
Subgroup basic-auth:
pass   -> INCOMPLETE (fi-bxt-j4205)
Test drv_getparams_basic:
Subgroup basic-eu-total:
pass   -> INCOMPLETE (fi-pnv-d510)
Test drv_hangman:
Subgroup error-state-basic:
pass   -> FAIL   (fi-blb-e6850)
Test gem_busy:
Subgroup basic-busy-default:
pass   -> FAIL   (fi-ilk-650)
pass   -> FAIL   (fi-byt-n2820)
pass   -> FAIL   (fi-bsw-n3050)
pass   -> SKIP   (fi-glk-2a)
Subgroup basic-hang-default:
pass   -> SKIP   (fi-glk-2a)
Test gem_close_race:
Subgroup basic-threads:
pass   -> DMESG-WARN (fi-blb-e6850)
Test gem_cpu_reloc:
Subgroup basic:
pass   -> INCOMPLETE (fi-ilk-650)
pass   -> FAIL   (fi-byt-n2820)
pass   -> INCOMPLETE (fi-bsw-n3050)
Test gem_cs_tlb:
Subgroup basic-default:
pass   -> INCOMPLETE (fi-glk-2a)
Test gem_ctx_switch:
Subgroup basic-default-heavy:
pass   -> FAIL   (fi-byt-n2820)
Test gem_exec_create:
Subgroup basic:
pass   -> FAIL   (fi-blb-e6850)
pass   -> FAIL   (fi-byt-n2820)
Test gem_exec_fence:
Subgroup basic-busy-default:
pass   -> FAIL   (fi-byt-n2820)
Subgroup basic-wait-default:
pass   -> FAIL   (fi-byt-n2820)
Subgroup basic-await-default:
pass   -> FAIL   (fi-blb-e6850)
Subgroup nb-await-default:
pass   -> FAIL   (fi-blb-e6850)
Test gem_exec_flush:
Subgroup basic-batch-kernel-default-cmd:
pass   -> FAIL   (fi-byt-n2820)
Subgroup basic-batch-kernel-default-uc:
pass   -> FAIL   (fi-blb-e6850)
pass   -> FAIL   (fi-snb-2600) fdo#17
pass   -> FAIL   (fi-byt-n2820)
Subgroup basic-batch-kernel-default-wb:
pass   -> FAIL   (fi-blb-e6850)
pass   -> FAIL   (fi-byt-n2820)
Subgroup basic-uc-pro-default:
pass   -> FAIL   (fi-blb-e6850)
Subgroup basic-uc-prw-default:
pass   -> FAIL   (fi-byt-n2820)
Subgroup basic-uc-set-default:
pass   -> FAIL   (fi-byt-n2820)
Subgroup basic-wb-pro-default:
pass   -> FAIL   (fi-blb-e6850)
pass   -> FAIL   (fi-byt-n2820)
Subgroup basic-wb-ro-before-default:
pass   -> FAIL   (fi-blb-e6850)
Subgroup basic-wb-rw-before-default:
pass   -> FAIL   (fi-blb-e6850)
pass   -> FAIL   (fi-byt-n2820)
Subgroup basic-wb-rw-default:
pass   -> FAIL   (fi-blb-e6850)
Subgroup basic-wb-set-default:
pass   -> FAIL   (fi-byt-n2820)
Test gem_exec_gttfill:
Subgroup basic:
pass   -> FAIL   (fi-blb-e6850)
pass   -> FAIL   (fi-byt-n2820)
Test gem_exec_nop:
Subgroup basic-parallel:
pass   -> FAIL   (fi-blb-e6850)
Subgroup basic-series:
pass   -> FAIL   (fi-blb-e6850)
pass   -> FAIL   (fi-byt-n2820)
Test gem_exec_parallel:
Subgroup basic:
pass   -> FAIL   (fi-blb-e6850)
pass   -> FAIL   (fi-byt-n2820)
Test gem_exec_parse:
Subgroup basic-allowed:
pass   -> FAIL   (fi-byt-n2820)
Test gem_exec_reloc:
Subgroup basic-cpu-gtt:
pass   -> FAIL   (fi-blb-e6850)
pass   -> FAIL   (fi-byt-n2820)
Subgroup basic-write-gtt:
pass   -> FAIL   (fi-blb-e6850)
pass   -> FAIL   (fi-byt-n2820)
Subgroup basic-cpu-gtt-noreloc:
WARNING: Long output truncated

fbb8288699ef622bbfc6e10bdca6773a16f93fac drm-tip: 2017y-08m-11d-09h-03m-47s UTC 
integration manifest
cd60f3a64b03 drm/i915: Split obj->cache_coherent to track r/w

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_5378/
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Re: [Intel-gfx] [PATCH] drm/i915/fbc: only update no_fbc_reason when active

[Chris Wilson]

Quoting Daniel Vetter (2017-08-11 09:04:18)
> On Fri, Aug 11, 2017 at 09:23:27AM +0200, Daniel Vetter wrote:
> > In our snb farm in CI we have plenty of underruns, but not enough
> > stolen memory to enable fbc. Which means every time there's an
> > underrun the no_fbc_reason swichtes to something that makes
> > kms_frontbuffer_tracking fail instead of skip, adding massive amounts
> > of additional noise to igt test runs.
> > 
> > Make sure we don't try to disable fbc when it's off already.
> > 
> > Cc: Paulo Zanoni 
> > Signed-off-by: Daniel Vetter 
> 
> Note this seems to be the real bug that's causing all the spurious noise
> on snb CI in the full run. So pretty important to land this fast.

Yup, this is more than just silencing CI, this looks to be a
precondition for intel_fbc_deactivate() -- all other callers check for
fbc->enabled before calling deactivate. I would even suggest we add a

diff --git a/drivers/gpu/drm/i915/intel_fbc.c b/drivers/gpu/drm/i915/intel_fbc.c
index 122d6372f58d..0c6e66f8a0f1 100644
--- a/drivers/gpu/drm/i915/intel_fbc.c
+++ b/drivers/gpu/drm/i915/intel_fbc.c
@@ -485,6 +485,9 @@ static void intel_fbc_deactivate(struct drm_i915_private 
*dev_priv)
 
WARN_ON(!mutex_is_locked(>lock));
 
+   if (WARN_ON(!fbc->enabled))
+   return;
+

Either way,
Reviewed-by: Chris Wilson 
-Chris
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Re: [Intel-gfx] [PATCH] drm/i915: Disconnect 32 and 48 bit ppGTT support

[Chris Wilson]

Quoting Joonas Lahtinen (2017-08-11 10:51:26)
> Configurations like virtualized environments may support only 48 bit
> ppGTT without supporting 32 bit ppGTT. Support this by disconnecting
> the relationship of the two feature bits.

Did the gvt patches land in dinq? After that, I say we just kill the
module parameter, and so make the choice of GTT mode much easier to follow.

Have we ever asked a user to debug a problem by changing GTT modes in
the last 5 years?
-Chris
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[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Disconnect 32 and 48 bit ppGTT support

[Patchwork]

== Series Details ==

Series: drm/i915: Disconnect 32 and 48 bit ppGTT support
URL   : https://patchwork.freedesktop.org/series/28676/
State : success

== Summary ==

Series 28676v1 drm/i915: Disconnect 32 and 48 bit ppGTT support
https://patchwork.freedesktop.org/api/1.0/series/28676/revisions/1/mbox/

Test kms_flip:
Subgroup basic-flip-vs-modeset:
skip   -> PASS   (fi-skl-x1585l) fdo#101781

fdo#101781 https://bugs.freedesktop.org/show_bug.cgi?id=101781

fi-bdw-5557u total:279  pass:268  dwarn:0   dfail:0   fail:0   skip:11  
time:448s
fi-bdw-gvtdvmtotal:279  pass:265  dwarn:0   dfail:0   fail:0   skip:14  
time:434s
fi-blb-e6850 total:279  pass:224  dwarn:1   dfail:0   fail:0   skip:54  
time:358s
fi-bsw-n3050 total:279  pass:243  dwarn:0   dfail:0   fail:0   skip:36  
time:557s
fi-bxt-j4205 total:279  pass:260  dwarn:0   dfail:0   fail:0   skip:19  
time:512s
fi-byt-j1900 total:279  pass:254  dwarn:1   dfail:0   fail:0   skip:24  
time:534s
fi-byt-n2820 total:279  pass:250  dwarn:1   dfail:0   fail:0   skip:28  
time:510s
fi-glk-2atotal:279  pass:260  dwarn:0   dfail:0   fail:0   skip:19  
time:607s
fi-hsw-4770  total:279  pass:263  dwarn:0   dfail:0   fail:0   skip:16  
time:447s
fi-hsw-4770r total:279  pass:263  dwarn:0   dfail:0   fail:0   skip:16  
time:419s
fi-ilk-650   total:279  pass:229  dwarn:0   dfail:0   fail:0   skip:50  
time:423s
fi-ivb-3520m total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:506s
fi-ivb-3770  total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:481s
fi-kbl-7500u total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:468s
fi-kbl-7560u total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  
time:585s
fi-kbl-r total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:590s
fi-pnv-d510  total:279  pass:223  dwarn:1   dfail:0   fail:0   skip:55  
time:526s
fi-skl-6260u total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  
time:459s
fi-skl-6700k total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:474s
fi-skl-6770hqtotal:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  
time:485s
fi-skl-gvtdvmtotal:279  pass:266  dwarn:0   dfail:0   fail:0   skip:13  
time:439s
fi-skl-x1585ltotal:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  
time:504s
fi-snb-2520m total:279  pass:251  dwarn:0   dfail:0   fail:0   skip:28  
time:548s
fi-snb-2600  total:279  pass:250  dwarn:0   dfail:0   fail:0   skip:29  
time:407s

fbb8288699ef622bbfc6e10bdca6773a16f93fac drm-tip: 2017y-08m-11d-09h-03m-47s UTC 
integration manifest
aa663dacd1d7 drm/i915: Disconnect 32 and 48 bit ppGTT support

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_5377/
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH v3] drm/i915: Split obj->cache_coherent to track r/w

[Chris Wilson]

Another month, another story in the cache coherency saga. This time, we
come to the realisation that i915_gem_object_is_coherent() has been
reporting whether we can read from the target without requiring a cache
invalidate; but we were using it in places for testing whether we could
write into the object without requiring a cache flush. So split the
tracking into two, one to decide before reads, one after writes.

See commit e27ab73d17ef ("drm/i915: Mark CPU cache as dirty on every
transition for CPU writes") for the previous entry in this saga.

v2: Be verbose
v3: Remove unused function (i915_gem_object_is_coherent)

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101109
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101555
Testcase: igt/kms_mmap_write_crc
Testcase: igt/kms_pwrite_crc
Signed-off-by: Chris Wilson 
Cc: Maarten Lankhorst 
Cc: Dongwon Kim 
Cc: Matt Roper 
Cc: Joonas Lahtinen 
Cc: Mika Kuoppala 
Tested-by: Maarten Lankhorst 
Acked-by: Maarten Lankhorst 
---
 drivers/gpu/drm/i915/Makefile|  1 +
 drivers/gpu/drm/i915/i915_drv.h  |  6 ---
 drivers/gpu/drm/i915/i915_gem.c  | 25 ++--
 drivers/gpu/drm/i915/i915_gem_clflush.c  |  3 +-
 drivers/gpu/drm/i915/i915_gem_execbuffer.c   |  8 +++-
 drivers/gpu/drm/i915/i915_gem_internal.c |  7 ++--
 drivers/gpu/drm/i915/i915_gem_object.c   | 48 
 drivers/gpu/drm/i915/i915_gem_object.h   |  9 -
 drivers/gpu/drm/i915/i915_gem_stolen.c   |  5 ++-
 drivers/gpu/drm/i915/i915_gem_userptr.c  |  4 +-
 drivers/gpu/drm/i915/selftests/huge_gem_object.c |  6 +--
 11 files changed, 90 insertions(+), 32 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/i915_gem_object.c

diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index f8227318dcaf..892f52b53060 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -39,6 +39,7 @@ i915-y += i915_cmd_parser.o \
  i915_gem_gtt.o \
  i915_gem_internal.o \
  i915_gem.o \
+ i915_gem_object.o \
  i915_gem_render_state.o \
  i915_gem_request.o \
  i915_gem_shrinker.o \
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 907603cba447..6698c706118a 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -4317,10 +4317,4 @@ int remap_io_mapping(struct vm_area_struct *vma,
 unsigned long addr, unsigned long pfn, unsigned long size,
 struct io_mapping *iomap);
 
-static inline bool i915_gem_object_is_coherent(struct drm_i915_gem_object *obj)
-{
-   return (obj->cache_level != I915_CACHE_NONE ||
-   HAS_LLC(to_i915(obj->base.dev)));
-}
-
 #endif
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 000a764ee8d9..887fff281f4e 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -52,7 +52,7 @@ static bool cpu_write_needs_clflush(struct 
drm_i915_gem_object *obj)
if (obj->cache_dirty)
return false;
 
-   if (!obj->cache_coherent)
+   if (!(obj->cache_coherent & I915_BO_CACHE_COHERENT_FOR_WRITE))
return true;
 
return obj->pin_display;
@@ -253,7 +253,7 @@ __i915_gem_object_release_shmem(struct drm_i915_gem_object 
*obj,
 
if (needs_clflush &&
(obj->base.read_domains & I915_GEM_DOMAIN_CPU) == 0 &&
-   !obj->cache_coherent)
+   !(obj->cache_coherent & I915_BO_CACHE_COHERENT_FOR_READ))
drm_clflush_sg(pages);
 
__start_cpu_write(obj);
@@ -800,7 +800,8 @@ int i915_gem_obj_prepare_shmem_read(struct 
drm_i915_gem_object *obj,
if (ret)
return ret;
 
-   if (obj->cache_coherent || !static_cpu_has(X86_FEATURE_CLFLUSH)) {
+   if (obj->cache_coherent & I915_BO_CACHE_COHERENT_FOR_READ ||
+   !static_cpu_has(X86_FEATURE_CLFLUSH)) {
ret = i915_gem_object_set_to_cpu_domain(obj, false);
if (ret)
goto err_unpin;
@@ -852,7 +853,8 @@ int i915_gem_obj_prepare_shmem_write(struct 
drm_i915_gem_object *obj,
if (ret)
return ret;
 
-   if (obj->cache_coherent || !static_cpu_has(X86_FEATURE_CLFLUSH)) {
+   if (obj->cache_coherent & I915_BO_CACHE_COHERENT_FOR_WRITE ||
+   !static_cpu_has(X86_FEATURE_CLFLUSH)) {
ret = i915_gem_object_set_to_cpu_domain(obj, true);
if (ret)
goto err_unpin;
@@ -3673,8 +3675,7 @@ int i915_gem_object_set_cache_level(struct 
drm_i915_gem_object *obj,
 

Re: [Intel-gfx] [PATCH i-g-t] tests/kms_frontbuffer_tracking: increase FBC wait timeout to 5s

[Lofstedt, Marta]

Paulo, my currently conclusion in 
https://bugs.freedesktop.org/show_bug.cgi?id=101623 is that the more than 2 
second wait for enable_fbs only occurs when changing between draw domains, 
typically between blt and mmap_cpu. 
To me this appear to be way too long time, but I am no expert here.
 I don't think that the objective of this test is performance of domain 
changes, but if we have no other way to explore that issue, I guess we should 
not change the timeout. 

/Marta

> -Original Message-
> From: Lofstedt, Marta
> Sent: Tuesday, August 8, 2017 2:15 PM
> To: Zanoni, Paulo R ; intel-
> g...@lists.freedesktop.org
> Cc: Latvala, Petri 
> Subject: RE: [PATCH i-g-t] tests/kms_frontbuffer_tracking: increase FBC wait
> timeout to 5s
> 
> 
> 
> > -Original Message-
> > From: Zanoni, Paulo R
> > Sent: Monday, August 7, 2017 5:54 PM
> > To: Lofstedt, Marta ; intel-
> > g...@lists.freedesktop.org
> > Cc: Latvala, Petri 
> > Subject: Re: [PATCH i-g-t] tests/kms_frontbuffer_tracking: increase
> > FBC wait timeout to 5s
> >
> > Em Seg, 2017-08-07 às 06:51 +, Lofstedt, Marta escreveu:
> > > > -Original Message-
> > > > From: Zanoni, Paulo R
> > > > Sent: Friday, August 4, 2017 9:56 PM
> > > > To: Lofstedt, Marta ; intel-
> > > > g...@lists.freedesktop.org
> > > > Cc: Latvala, Petri 
> > > > Subject: Re: [PATCH i-g-t] tests/kms_frontbuffer_tracking:
> > > > increase FBC wait timeout to 5s
> > > >
> > > > Em Sex, 2017-08-04 às 09:47 +, Lofstedt, Marta escreveu:
> > > > > +Paolo
> > > > >
> > > > > > -Original Message-
> > > > > > From: Lofstedt, Marta
> > > > > > Sent: Wednesday, June 28, 2017 2:17 PM
> > > > > > To: intel-gfx@lists.freedesktop.org
> > > > > > Cc: Latvala, Petri ; Lofstedt, Marta
> > > > > > 
> > > > > > Subject: [PATCH i-g-t] tests/kms_frontbuffer_tracking:
> > > > > > increase FBC wait timeout to 5s
> > > > > >
> > > > > > The subtests: igt@kms_frontbuffer_tracking@fbc-*draw*
> > > > > > has non-consistent results, pending between fail and pass.
> > > > > > The fails are always due to "FBC disabled".
> > > > > > With this increase in timeout the flip-flop behavior is no
> > > > > > longer reproducible.
> > > >
> > > > This is a partial revert of:
> > > >
> > > > 64590c7b768dc8d8dd962f812d5ff5a39e7e8b54
> > > > kms_frontbuffer_tracking: reduce the FBC wait timeout to 2s
> > > >
> > > > (but there's no need to make it a full revert if you don't need)
> > > >
> > > > It would be nice to investigate why we're needing 5 seconds
> > > > instead of
> > > > 2 now, the document it in the commit message. Also document that
> > > > this is a partial revert.
> > >
> > > Paulo, do you have data backing up that 2 seconds was ever OK, I
> > > fail
> > > ~1/10 on various fbc subtests.
> >
> > All the data I have is the commit message of 64590c7b and the testing
> > I did. I would imagine something changed in the upstream tree since
> > then, causing this to need a longer timeout, that's why I suggested
> investigating.
> >
> If I run current IGT with Kernel 4.2.0, which was released 30 august 2015, 
> that
> should be around the time when the  64590c7b was done, all
> kms_frontbuffer_tracking tests fail. If I reset IGT to 64590c7b half of the 
> flip-
> flopping tests consistently fail the rest consistently pass over 10 runs. If 
> I run
> IGT@64590c7b on 4.13-rc3+ all kms_fronbuffer_tracking fail. So, indeed
> some of these tests appear to actually have passed 2 years ago, but it also
> seem that both the tests and the i915 have change a lot during 2 years.
> Anyways, I will do some timing analyze to investigate what is really going on
> here.
> 
> /Marta
> 
> > >
> > > /Marta
> > > >
> > > > Acked-by: Paulo Zanoni 
> > > >
> > >
> > > Thanks,
> > >
> > > > > >
> > > > > > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101623
> > > > > > Signed-off-by: Marta Lofstedt 
> > > > > > ---
> > > > > >  tests/kms_frontbuffer_tracking.c | 2 +-
> > > > > >  1 file changed, 1 insertion(+), 1 deletion(-)
> > > > > >
> > > > > > diff --git a/tests/kms_frontbuffer_tracking.c
> > > > > > b/tests/kms_frontbuffer_tracking.c
> > > > > > index c24e4a81..8bec5d5a 100644
> > > > > > --- a/tests/kms_frontbuffer_tracking.c
> > > > > > +++ b/tests/kms_frontbuffer_tracking.c
> > > > > > @@ -923,7 +923,7 @@ static bool fbc_stride_not_supported(void)
> > > > > >
> > > > > >  static bool fbc_wait_until_enabled(void)  {
> > > > > > -   return igt_wait(fbc_is_enabled(), 2000, 1);
> > > > > > +   return igt_wait(fbc_is_enabled(), 5000, 1);
> > > > > >  }
> > > > > >
> > > > > >  static bool psr_wait_until_enabled(void)
> > > > > > --
> > > > > > 2.11.0
> > > > >
> > > > >
___
Intel-gfx mailing 

[Intel-gfx] [PATCH v2] drm/i915: Split obj->cache_coherent to track r/w

[Chris Wilson]

Another month, another story in the cache coherency saga. This time, we
come to the realisation that i915_gem_object_is_coherent() has been
reporting whether we can read from the target without requiring a cache
invalidate; but we were using it in places for testing whether we could
write into the object without requiring a cache flush. So split the
tracking into two, one to decide before reads, one after writes.

See commit e27ab73d17ef ("drm/i915: Mark CPU cache as dirty on every
transition for CPU writes") for the previous entry in this saga.

v2: Be verbose

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101109
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101555
Testcase: igt/kms_mmap_write_crc
Testcase: igt/kms_pwrite_crc
Signed-off-by: Chris Wilson 
Cc: Maarten Lankhorst 
Cc: Dongwon Kim 
Cc: Matt Roper 
Cc: Joonas Lahtinen 
Cc: Mika Kuoppala 
Tested-by: Maarten Lankhorst 
Acked-by: Maarten Lankhorst 
---
 drivers/gpu/drm/i915/Makefile|  1 +
 drivers/gpu/drm/i915/i915_drv.h  |  6 ---
 drivers/gpu/drm/i915/i915_gem.c  | 25 +-
 drivers/gpu/drm/i915/i915_gem_clflush.c  |  3 +-
 drivers/gpu/drm/i915/i915_gem_execbuffer.c   |  8 +++-
 drivers/gpu/drm/i915/i915_gem_internal.c |  7 +--
 drivers/gpu/drm/i915/i915_gem_object.c   | 58 
 drivers/gpu/drm/i915/i915_gem_object.h   |  9 +++-
 drivers/gpu/drm/i915/i915_gem_stolen.c   |  5 +-
 drivers/gpu/drm/i915/i915_gem_userptr.c  |  4 +-
 drivers/gpu/drm/i915/selftests/huge_gem_object.c |  6 +--
 11 files changed, 100 insertions(+), 32 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/i915_gem_object.c

diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index f8227318dcaf..892f52b53060 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -39,6 +39,7 @@ i915-y += i915_cmd_parser.o \
  i915_gem_gtt.o \
  i915_gem_internal.o \
  i915_gem.o \
+ i915_gem_object.o \
  i915_gem_render_state.o \
  i915_gem_request.o \
  i915_gem_shrinker.o \
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 907603cba447..6698c706118a 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -4317,10 +4317,4 @@ int remap_io_mapping(struct vm_area_struct *vma,
 unsigned long addr, unsigned long pfn, unsigned long size,
 struct io_mapping *iomap);
 
-static inline bool i915_gem_object_is_coherent(struct drm_i915_gem_object *obj)
-{
-   return (obj->cache_level != I915_CACHE_NONE ||
-   HAS_LLC(to_i915(obj->base.dev)));
-}
-
 #endif
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 000a764ee8d9..887fff281f4e 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -52,7 +52,7 @@ static bool cpu_write_needs_clflush(struct 
drm_i915_gem_object *obj)
if (obj->cache_dirty)
return false;
 
-   if (!obj->cache_coherent)
+   if (!(obj->cache_coherent & I915_BO_CACHE_COHERENT_FOR_WRITE))
return true;
 
return obj->pin_display;
@@ -253,7 +253,7 @@ __i915_gem_object_release_shmem(struct drm_i915_gem_object 
*obj,
 
if (needs_clflush &&
(obj->base.read_domains & I915_GEM_DOMAIN_CPU) == 0 &&
-   !obj->cache_coherent)
+   !(obj->cache_coherent & I915_BO_CACHE_COHERENT_FOR_READ))
drm_clflush_sg(pages);
 
__start_cpu_write(obj);
@@ -800,7 +800,8 @@ int i915_gem_obj_prepare_shmem_read(struct 
drm_i915_gem_object *obj,
if (ret)
return ret;
 
-   if (obj->cache_coherent || !static_cpu_has(X86_FEATURE_CLFLUSH)) {
+   if (obj->cache_coherent & I915_BO_CACHE_COHERENT_FOR_READ ||
+   !static_cpu_has(X86_FEATURE_CLFLUSH)) {
ret = i915_gem_object_set_to_cpu_domain(obj, false);
if (ret)
goto err_unpin;
@@ -852,7 +853,8 @@ int i915_gem_obj_prepare_shmem_write(struct 
drm_i915_gem_object *obj,
if (ret)
return ret;
 
-   if (obj->cache_coherent || !static_cpu_has(X86_FEATURE_CLFLUSH)) {
+   if (obj->cache_coherent & I915_BO_CACHE_COHERENT_FOR_WRITE ||
+   !static_cpu_has(X86_FEATURE_CLFLUSH)) {
ret = i915_gem_object_set_to_cpu_domain(obj, true);
if (ret)
goto err_unpin;
@@ -3673,8 +3675,7 @@ int i915_gem_object_set_cache_level(struct 
drm_i915_gem_object *obj,
 
list_for_each_entry(vma, >vma_list, obj_link)

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/fbc: only update no_fbc_reason when active

[Patchwork]

== Series Details ==

Series: drm/i915/fbc: only update no_fbc_reason when active
URL   : https://patchwork.freedesktop.org/series/28674/
State : success

== Summary ==

Series 28674v1 drm/i915/fbc: only update no_fbc_reason when active
https://patchwork.freedesktop.org/api/1.0/series/28674/revisions/1/mbox/

Test gem_exec_flush:
Subgroup basic-batch-kernel-default-uc:
pass   -> FAIL   (fi-snb-2600) fdo#17

fdo#17 https://bugs.freedesktop.org/show_bug.cgi?id=17

fi-bdw-5557u total:279  pass:268  dwarn:0   dfail:0   fail:0   skip:11  
time:448s
fi-bdw-gvtdvmtotal:279  pass:265  dwarn:0   dfail:0   fail:0   skip:14  
time:430s
fi-blb-e6850 total:279  pass:224  dwarn:1   dfail:0   fail:0   skip:54  
time:359s
fi-bsw-n3050 total:279  pass:243  dwarn:0   dfail:0   fail:0   skip:36  
time:543s
fi-bxt-j4205 total:279  pass:260  dwarn:0   dfail:0   fail:0   skip:19  
time:516s
fi-byt-j1900 total:279  pass:254  dwarn:1   dfail:0   fail:0   skip:24  
time:521s
fi-byt-n2820 total:279  pass:250  dwarn:1   dfail:0   fail:0   skip:28  
time:504s
fi-glk-2atotal:279  pass:260  dwarn:0   dfail:0   fail:0   skip:19  
time:601s
fi-hsw-4770  total:279  pass:263  dwarn:0   dfail:0   fail:0   skip:16  
time:443s
fi-hsw-4770r total:279  pass:263  dwarn:0   dfail:0   fail:0   skip:16  
time:419s
fi-ilk-650   total:279  pass:229  dwarn:0   dfail:0   fail:0   skip:50  
time:417s
fi-ivb-3520m total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:492s
fi-ivb-3770  total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:474s
fi-kbl-7500u total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:471s
fi-kbl-7560u total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  
time:580s
fi-kbl-r total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:589s
fi-pnv-d510  total:279  pass:223  dwarn:1   dfail:0   fail:0   skip:55  
time:526s
fi-skl-6260u total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  
time:460s
fi-skl-6700k total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:477s
fi-skl-6770hqtotal:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  
time:487s
fi-skl-gvtdvmtotal:279  pass:266  dwarn:0   dfail:0   fail:0   skip:13  
time:433s
fi-skl-x1585ltotal:279  pass:268  dwarn:0   dfail:0   fail:0   skip:11  
time:477s
fi-snb-2520m total:279  pass:251  dwarn:0   dfail:0   fail:0   skip:28  
time:557s
fi-snb-2600  total:279  pass:249  dwarn:0   dfail:0   fail:1   skip:29  
time:412s

fbb8288699ef622bbfc6e10bdca6773a16f93fac drm-tip: 2017y-08m-11d-09h-03m-47s UTC 
integration manifest
294ecc59b60f drm/i915/fbc: only update no_fbc_reason when active

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_5376/
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/dp: Bit definition for D3 power state that keeps AUX fully powered

[Patchwork]

== Series Details ==

Series: series starting with [1/2] drm/dp: Bit definition for D3 power state 
that keeps AUX fully powered
URL   : https://patchwork.freedesktop.org/series/28667/
State : success

== Summary ==

Series 28667v1 Series without cover letter
https://patchwork.freedesktop.org/api/1.0/series/28667/revisions/1/mbox/

fi-bdw-5557u total:279  pass:268  dwarn:0   dfail:0   fail:0   skip:11  
time:446s
fi-bdw-gvtdvmtotal:279  pass:265  dwarn:0   dfail:0   fail:0   skip:14  
time:440s
fi-blb-e6850 total:279  pass:224  dwarn:1   dfail:0   fail:0   skip:54  
time:359s
fi-bsw-n3050 total:279  pass:243  dwarn:0   dfail:0   fail:0   skip:36  
time:546s
fi-bxt-j4205 total:279  pass:260  dwarn:0   dfail:0   fail:0   skip:19  
time:513s
fi-byt-j1900 total:279  pass:254  dwarn:1   dfail:0   fail:0   skip:24  
time:527s
fi-byt-n2820 total:279  pass:250  dwarn:1   dfail:0   fail:0   skip:28  
time:516s
fi-glk-2atotal:279  pass:260  dwarn:0   dfail:0   fail:0   skip:19  
time:600s
fi-hsw-4770  total:279  pass:263  dwarn:0   dfail:0   fail:0   skip:16  
time:451s
fi-hsw-4770r total:279  pass:263  dwarn:0   dfail:0   fail:0   skip:16  
time:420s
fi-ilk-650   total:279  pass:229  dwarn:0   dfail:0   fail:0   skip:50  
time:423s
fi-ivb-3520m total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:511s
fi-ivb-3770  total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:475s
fi-kbl-7500u total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:482s
fi-kbl-7560u total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  
time:580s
fi-kbl-r total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:598s
fi-pnv-d510  total:279  pass:223  dwarn:1   dfail:0   fail:0   skip:55  
time:531s
fi-skl-6260u total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  
time:465s
fi-skl-6700k total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:476s
fi-skl-6770hqtotal:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  
time:492s
fi-skl-gvtdvmtotal:279  pass:266  dwarn:0   dfail:0   fail:0   skip:13  
time:438s
fi-skl-x1585ltotal:279  pass:268  dwarn:0   dfail:0   fail:0   skip:11  
time:482s
fi-snb-2520m total:279  pass:251  dwarn:0   dfail:0   fail:0   skip:28  
time:549s
fi-snb-2600  total:279  pass:250  dwarn:0   dfail:0   fail:0   skip:29  
time:405s

fbb8288699ef622bbfc6e10bdca6773a16f93fac drm-tip: 2017y-08m-11d-09h-03m-47s UTC 
integration manifest
5e3cbf874cd1 drm/i915/dp: Leave the AUX block powered on for MST
fca0babc8d86 drm/dp: Bit definition for D3 power state that keeps AUX fully 
powered

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_5375/
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[Intel-gfx] [PATCH] drm/i915: Disconnect 32 and 48 bit ppGTT support

[Joonas Lahtinen]

Configurations like virtualized environments may support only 48 bit
ppGTT without supporting 32 bit ppGTT. Support this by disconnecting
the relationship of the two feature bits.

Cc: Tina Zhang 
Cc: Chris Wilson 
Cc: Zhi Wang 
Signed-off-by: Joonas Lahtinen 
---
 drivers/gpu/drm/i915/i915_gem_gtt.c | 13 +
 1 file changed, 9 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c 
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 10aa776..a5eada1 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -180,10 +180,15 @@ int intel_sanitize_enable_ppgtt(struct drm_i915_private 
*dev_priv,
return 0;
}
 
-   if (INTEL_GEN(dev_priv) >= 8 && i915.enable_execlists && has_full_ppgtt)
-   return has_full_48bit_ppgtt ? 3 : 2;
-   else
-   return has_aliasing_ppgtt ? 1 : 0;
+   if (INTEL_GEN(dev_priv) >= 8 && i915.enable_execlists) {
+   if (has_full_48bit_ppgtt)
+   return 3;
+
+   if (has_full_ppgtt)
+   return 2;
+   }
+
+   return has_aliasing_ppgtt ? 1 : 0;
 }
 
 static int ppgtt_bind_vma(struct i915_vma *vma,
-- 
2.7.5

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Re: [Intel-gfx] [PATCH v9 2/3] drm/i915: Enable guest i915 full ppgtt functionality

[Joonas Lahtinen]

On to, 2017-08-10 at 07:41 +0800, Tina Zhang wrote:
> Enable the guest i915 full ppgtt functionality when host can provide this
> capability. vgt_caps is introduced to guest i915 driver to get the vgpu
> capabilities from the device model. VGT_CPAS_FULL_PPGTT is one of the
> capabilities type to let guest i915 dirver know that the guest i915 full
> ppgtt is supported by device model.
> 
> Notice that the minor version of pvinfo isn't bumped because of this
> vgt_caps introduction, due to older guest would be broken by simply
> increasing the pvinfo version. Although the pvinfo minor version doesn't
> increase, the compatibility won't be blocked. The compatibility is ensured
> by checking the value of caps field in pvinfo. Zero means no full ppgtt
> support and BIT(2) means this feature is provided.
> 
> Changes since v1:
> - Use u32 instead of uint32_t (Joonas)
> - Move VGT_CAPS_FULL_PPGTT introduction to this patch and use #define
>   instead of enum (Joonas)
> - Rewrite the vgpu full ppgtt capability checking logic. (Joonas)
> - Some coding style refine. (Joonas)
> 
> Changes since v2:
> - Divide the whole patch set into two separate patch series, with one
>   patch in i915 side to check guest i915 full ppgtt capability and enable
>   it when this capability is supported by the device model, and the other
>   one in gvt side which fixs the blocking issue and enables the device
>   model to provide the capability to guest. And this patch focuses on guest
>   i915 side. (Joonas)
> - Change the title from "introduce vgt_caps to pvinfo" to
>   "Enable guest i915 full ppgtt functionality". (Tina)
> 
> Change since v3:
> - Add some comments about pvinfo caps and version. (Joonas)
> 
> Change since v4:
> - Tested by Tina Zhang.
> 
> Change since v5:
> - Add limitation about supporting 32bit full ppgtt.
> 
> Change since v6:
> - Change the fallback to 48bit full ppgtt if i915.ppgtt_enable=2. (Zhenyu)
> 
> Change in v9:
> - Remove the fixme comment due to no plan for 32bit full ppgtt
>   support. (Zhenyu)
> - Reorder the patch-set to fix compiling issue with git-bisect. (Zhenyu)
> - Add print log when forcing guest 48bit full ppgtt. (Zhenyu)
> 
> Reviewed-by: Joonas Lahtinen  in v2
> Signed-off-by: Tina Zhang 



> @@ -141,14 +141,19 @@ int intel_sanitize_enable_ppgtt(struct drm_i915_private 
> *dev_priv,
>  
>   has_aliasing_ppgtt = dev_priv->info.has_aliasing_ppgtt;
>   has_full_ppgtt = dev_priv->info.has_full_ppgtt;
> - has_full_48bit_ppgtt = dev_priv->info.has_full_48bit_ppgtt;

Leave above line.

>  
>   if (intel_vgpu_active(dev_priv)) {
> - /* emulation is too hard */
> - has_full_ppgtt = false;
> - has_full_48bit_ppgtt = false;

has_full_ppgtt = false;
has_full_48bit_ppgtt =
intel_vgpu_has_full_48bit_ppgtt(dev_priv);

> + has_full_ppgtt = intel_vgpu_has_full_ppgtt(dev_priv);
> + /* GVT-g has no support for 32bit ppgtt */
> + if (enable_ppgtt == 2 && has_full_ppgtt) {
> + DRM_DEBUG_DRIVER("Force 48bit ppgtt for vGPU\n");
> + enable_ppgtt = 3;

Lets not do an upgrade for the user if they explicitly requested lower
level. I'd just leave the option to be and it'll get downgraded to
aliasing ppgtt.

> + }
>   }
>  
> + has_full_48bit_ppgtt = has_full_ppgtt &&
> + dev_priv->info.has_full_48bit_ppgtt;
> +

This can then be dropped too.

I'll send a patch to disconnect the has_full_ppgtt and
has_full_48bit_ppgtt flags.


>   if (!has_aliasing_ppgtt)
>   return 0;
>  
> @@ -49,12 +49,18 @@ enum vgt_g2v_type {
> >     VGT_G2V_MAX,
>  };
>  
> +/*
> + * VGT capabilities type
> + */
> +#define VGT_CAPS_FULL_PPGTT_48BITBIT(2)

VGT_CAPS_FULL_48BIT_PPGTT for consistency

> @@ -75,10 +75,17 @@ void i915_check_vgpu(struct drm_i915_private *dev_priv)
>   return;
>   }
>  
> + dev_priv->vgpu.caps = __raw_i915_read32(dev_priv, vgtif_reg(vgt_caps));
> +
>   dev_priv->vgpu.active = true;
>   DRM_INFO("Virtual GPU for Intel GVT-g detected.\n");
>  }
>  
> +bool intel_vgpu_has_full_ppgtt(struct drm_i915_private *dev_priv)

This should really be has_full_48bit_ppgtt() too.

Regards, Joonas
-- 
Joonas Lahtinen
Open Source Technology Center
Intel Corporation
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Re: [Intel-gfx] [PATCH 01/16] drm/i915: Keep a small stash of preallocated WC pages

[Jani Nikula]

On Wed, 26 Jul 2017, Chris Wilson  wrote:
> We use WC pages for coherent writes into the ppGTT on !llc
> architectuures. However, to create a WC page requires a stop_machine(),
> i.e. is very slow. To compensate we currently keep a per-vm cache of
> recently freed pages, but we still see the slow startup of new contexts.
> We can amoritize that cost slightly by allocating WC pages in small
> batches (PAGEVEC_SIZE == 14) and since creating a WC page implies a
> stop_machine() there is no penalty for keeping that stash global.
>
> Signed-off-by: Chris Wilson 
> ---
>  drivers/gpu/drm/i915/i915_drv.h |   3 +
>  drivers/gpu/drm/i915/i915_gem_gtt.c | 121 
> +---
>  2 files changed, 100 insertions(+), 24 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 2c7456f4ed38..fd62be74a422 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1464,6 +1464,9 @@ struct i915_gem_mm {
>   struct llist_head free_list;
>   struct work_struct free_work;
>  
> + /** Small stash of WC pages */
> + struct pagevec wc_stash;
> +
>   /** Usable portion of the GTT for GEM */

These are not proper kernel-doc comments.

BR,
Jani.

>   dma_addr_t stolen_base; /* limited to low memory (32-bit) */
>  
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c 
> b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index 10aa7762d9a6..ad4e48435853 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -351,39 +351,85 @@ static gen6_pte_t iris_pte_encode(dma_addr_t addr,
>  
>  static struct page *vm_alloc_page(struct i915_address_space *vm, gfp_t gfp)
>  {
> - struct page *page;
> + struct pagevec *pvec = >free_pages;
>  
>   if (I915_SELFTEST_ONLY(should_fail(>fault_attr, 1)))
>   i915_gem_shrink_all(vm->i915);
>  
> - if (vm->free_pages.nr)
> - return vm->free_pages.pages[--vm->free_pages.nr];
> + if (likely(pvec->nr))
> + return pvec->pages[--pvec->nr];
> +
> + if (!vm->pt_kmap_wc)
> + return alloc_page(gfp);
> +
> + lockdep_assert_held(>i915->drm.struct_mutex);
> +
> + /* Look in our global stash of WC pages... */
> + pvec = >i915->mm.wc_stash;
> + if (likely(pvec->nr))
> + return pvec->pages[--pvec->nr];
>  
> - page = alloc_page(gfp);
> - if (!page)
> + /* Otherwise batch allocate pages to amoritize cost of set_pages_wc. */
> + do {
> + struct page *page;
> +
> + page = alloc_page(gfp);
> + if (unlikely(!page))
> + break;
> +
> + pvec->pages[pvec->nr++] = page;
> + } while (pagevec_space(pvec));
> +
> + if (unlikely(!pvec->nr))
>   return NULL;
>  
> - if (vm->pt_kmap_wc)
> - set_pages_array_wc(, 1);
> + set_pages_array_wc(pvec->pages, pvec->nr);
>  
> - return page;
> + return pvec->pages[--pvec->nr];
>  }
>  
> -static void vm_free_pages_release(struct i915_address_space *vm)
> +static void vm_free_pages_release(struct i915_address_space *vm,
> +   bool immediate)
>  {
> - GEM_BUG_ON(!pagevec_count(>free_pages));
> + struct pagevec *pvec = >free_pages;
> +
> + GEM_BUG_ON(!pagevec_count(pvec));
> +
> + if (vm->pt_kmap_wc) {
> + struct pagevec *stash = >i915->mm.wc_stash;
>  
> - if (vm->pt_kmap_wc)
> - set_pages_array_wb(vm->free_pages.pages,
> -pagevec_count(>free_pages));
> + /* When we use WC, first fill up the global stash and then
> +  * only if full immediately free the overflow.
> +  */
> +
> + lockdep_assert_held(>i915->drm.struct_mutex);
> + if (pagevec_space(stash)) {
> + do {
> + stash->pages[stash->nr++] =
> + pvec->pages[--pvec->nr];
> + if (!pvec->nr)
> + return;
> + } while (pagevec_space(stash));
> +
> + /* As we have made some room in the VM's free_pages,
> +  * we can wait for it to fill again. Unless we are
> +  * inside i915_address_space_fini() and must
> +  * immediately release the pages!
> +  */
> + if (!immediate)
> + return;
> + }
> +
> + set_pages_array_wb(pvec->pages, pvec->nr);
> + }
>  
> - __pagevec_release(>free_pages);
> + __pagevec_release(pvec);
>  }
>  
>  static void vm_free_page(struct i915_address_space *vm, struct page *page)
>  {
>   if (!pagevec_add(>free_pages, page))
> - vm_free_pages_release(vm);
> + 

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/cnl: Dump the right pll registers when dumping pipe config.

[Patchwork]

== Series Details ==

Series: drm/i915/cnl: Dump the right pll registers when dumping pipe config.
URL   : https://patchwork.freedesktop.org/series/28665/
State : success

== Summary ==

Series 28665v1 drm/i915/cnl: Dump the right pll registers when dumping pipe 
config.
https://patchwork.freedesktop.org/api/1.0/series/28665/revisions/1/mbox/

Test kms_flip:
Subgroup basic-flip-vs-modeset:
skip   -> PASS   (fi-skl-x1585l) fdo#101781
Test kms_pipe_crc_basic:
Subgroup suspend-read-crc-pipe-b:
dmesg-warn -> PASS   (fi-byt-n2820) fdo#101705

fdo#101781 https://bugs.freedesktop.org/show_bug.cgi?id=101781
fdo#101705 https://bugs.freedesktop.org/show_bug.cgi?id=101705

fi-bdw-5557u total:279  pass:268  dwarn:0   dfail:0   fail:0   skip:11  
time:445s
fi-bdw-gvtdvmtotal:279  pass:265  dwarn:0   dfail:0   fail:0   skip:14  
time:437s
fi-blb-e6850 total:279  pass:224  dwarn:1   dfail:0   fail:0   skip:54  
time:356s
fi-bsw-n3050 total:279  pass:243  dwarn:0   dfail:0   fail:0   skip:36  
time:560s
fi-bxt-j4205 total:279  pass:260  dwarn:0   dfail:0   fail:0   skip:19  
time:518s
fi-byt-j1900 total:279  pass:254  dwarn:1   dfail:0   fail:0   skip:24  
time:521s
fi-byt-n2820 total:279  pass:251  dwarn:0   dfail:0   fail:0   skip:28  
time:520s
fi-glk-2atotal:279  pass:260  dwarn:0   dfail:0   fail:0   skip:19  
time:602s
fi-hsw-4770  total:279  pass:263  dwarn:0   dfail:0   fail:0   skip:16  
time:438s
fi-hsw-4770r total:279  pass:263  dwarn:0   dfail:0   fail:0   skip:16  
time:415s
fi-ilk-650   total:279  pass:229  dwarn:0   dfail:0   fail:0   skip:50  
time:417s
fi-ivb-3520m total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:510s
fi-ivb-3770  total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:477s
fi-kbl-7500u total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:474s
fi-kbl-7560u total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  
time:581s
fi-kbl-r total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:589s
fi-pnv-d510  total:279  pass:223  dwarn:1   dfail:0   fail:0   skip:55  
time:530s
fi-skl-6260u total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  
time:465s
fi-skl-6700k total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:471s
fi-skl-6770hqtotal:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  
time:480s
fi-skl-gvtdvmtotal:279  pass:266  dwarn:0   dfail:0   fail:0   skip:13  
time:440s
fi-skl-x1585ltotal:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  
time:498s
fi-snb-2520m total:279  pass:251  dwarn:0   dfail:0   fail:0   skip:28  
time:542s
fi-snb-2600  total:279  pass:250  dwarn:0   dfail:0   fail:0   skip:29  
time:407s

fbb8288699ef622bbfc6e10bdca6773a16f93fac drm-tip: 2017y-08m-11d-09h-03m-47s UTC 
integration manifest
e976ad1b0a89 drm/i915/cnl: Dump the right pll registers when dumping pipe 
config.

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_5374/
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Re: [Intel-gfx] [PATCH 3/4] drm: Only lastclose on unload for legacy drivers

[Daniel Vetter]

On Thu, Aug 03, 2017 at 01:52:55PM -0400, Alex Deucher wrote:
> On Thu, Aug 3, 2017 at 9:54 AM, Daniel Vetter  wrote:
> > On Thu, Aug 3, 2017 at 1:17 AM, Daniel Vetter  
> > wrote:
> >> On Wed, Aug 2, 2017 at 10:50 PM, Alex Deucher  
> >> wrote:
> >>> On Wed, Aug 2, 2017 at 7:56 AM, Daniel Vetter  
> >>> wrote:
>  The only thing modern drivers are supposed to do in lastclose is
>  restore the fb emulation state. Which is entirely optional, and
>  there's really no reason to do that. So restrict it to legacy drivers
>  (where the driver cleanup essentially happens in lastclose).
> >>>
> >>> vga_switcheroo_process_delayed_switch() gets called in lastclose.
> >>> Won't that need to get moved elsewhere for this to work?
> >>
> >> Hm right, I forgot the lazy way to do runtime pm by keeping the device
> >> alive as long as anyone has an open fd for it ... This shouldn't be a
> >> problem, since you need to unregister from vgaswitcheroo anyway on
> >> unload. Maybe that blows up, I'll check the code and augment the patch
> >> as needed.
> >
> > So I think there's 3 cases:
> > - Trying to unload the module. You can't do that while anyone has the
> > fd still open, so lastclose is guaranteeed to run.
> > - Forcefully unbinding the driver through sysfs. Not any better, since
> > the can_switch stuff checks for the open count, and so will delay the
> > delayed switch no matter what.
> > - Actual hotremoval: a) not implemented since none of the drivers
> > taking part in vgaswitcheroo correctly unplug the drm device and b)
> > you can't hotremove a chip from a laptop.
> >
> > So I think I'm not breaking this anymore than it probably already is :-)

Added the above to the commit message ...
> 
> Thanks.  This series is:
> Reviewed-by: Alex Deucher 

... and pulled the entire series in.

Thanks for your review.
-Daniel
-- 
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Software Engineer, Intel Corporation
http://blog.ffwll.ch
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[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with drm/i915/cnl: Add allowed DP rates for Cannonlake. (rev2)

[Patchwork]

== Series Details ==

Series: series starting with drm/i915/cnl: Add allowed DP rates for Cannonlake. 
(rev2)
URL   : https://patchwork.freedesktop.org/series/26952/
State : success

== Summary ==

Series 26952v2 Series without cover letter
https://patchwork.freedesktop.org/api/1.0/series/26952/revisions/2/mbox/

Test kms_cursor_legacy:
Subgroup basic-busy-flip-before-cursor-legacy:
fail   -> PASS   (fi-snb-2600) fdo#100215

fdo#100215 https://bugs.freedesktop.org/show_bug.cgi?id=100215

fi-bdw-5557u total:279  pass:268  dwarn:0   dfail:0   fail:0   skip:11  
time:448s
fi-bdw-gvtdvmtotal:279  pass:265  dwarn:0   dfail:0   fail:0   skip:14  
time:433s
fi-blb-e6850 total:279  pass:224  dwarn:1   dfail:0   fail:0   skip:54  
time:358s
fi-bsw-n3050 total:279  pass:243  dwarn:0   dfail:0   fail:0   skip:36  
time:552s
fi-bxt-j4205 total:279  pass:260  dwarn:0   dfail:0   fail:0   skip:19  
time:518s
fi-byt-j1900 total:279  pass:254  dwarn:1   dfail:0   fail:0   skip:24  
time:526s
fi-glk-2atotal:279  pass:260  dwarn:0   dfail:0   fail:0   skip:19  
time:604s
fi-hsw-4770  total:279  pass:263  dwarn:0   dfail:0   fail:0   skip:16  
time:439s
fi-hsw-4770r total:279  pass:263  dwarn:0   dfail:0   fail:0   skip:16  
time:420s
fi-ilk-650   total:279  pass:229  dwarn:0   dfail:0   fail:0   skip:50  
time:414s
fi-ivb-3520m total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:508s
fi-ivb-3770  total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:479s
fi-kbl-7500u total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:474s
fi-kbl-7560u total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  
time:589s
fi-kbl-r total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:595s
fi-pnv-d510  total:279  pass:223  dwarn:1   dfail:0   fail:0   skip:55  
time:529s
fi-skl-6260u total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  
time:464s
fi-skl-6700k total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:470s
fi-skl-6770hqtotal:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  
time:476s
fi-skl-gvtdvmtotal:279  pass:266  dwarn:0   dfail:0   fail:0   skip:13  
time:446s
fi-skl-x1585ltotal:279  pass:268  dwarn:0   dfail:0   fail:0   skip:11  
time:485s
fi-snb-2520m total:279  pass:251  dwarn:0   dfail:0   fail:0   skip:28  
time:549s
fi-snb-2600  total:279  pass:250  dwarn:0   dfail:0   fail:0   skip:29  
time:409s

a8f0812284aa77e62aba1e4b430ac3bc090f43d0 drm-tip: 2017y-08m-11d-07h-22m-37s UTC 
integration manifest
9cda511c78ee drm/i915/cnl: Avoid old DDI translation functions on Cannonlake.
54daadd97d88 drm/i915/cnl: Dump the right pll registers when dumping pipe 
config.
75362f1ff342 drm/i915/cnl: Add allowed DP rates for Cannonlake.

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_5373/
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[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Split pin mapping into per platform functions (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915: Split pin mapping into per platform functions (rev2)
URL   : https://patchwork.freedesktop.org/series/27965/
State : success

== Summary ==

Series 27965v2 drm/i915: Split pin mapping into per platform functions
https://patchwork.freedesktop.org/api/1.0/series/27965/revisions/2/mbox/

Test kms_cursor_legacy:
Subgroup basic-busy-flip-before-cursor-legacy:
fail   -> PASS   (fi-snb-2600) fdo#100215
Test kms_flip:
Subgroup basic-flip-vs-modeset:
skip   -> PASS   (fi-skl-x1585l) fdo#101781
Test kms_pipe_crc_basic:
Subgroup suspend-read-crc-pipe-b:
dmesg-warn -> PASS   (fi-byt-n2820) fdo#101705

fdo#100215 https://bugs.freedesktop.org/show_bug.cgi?id=100215
fdo#101781 https://bugs.freedesktop.org/show_bug.cgi?id=101781
fdo#101705 https://bugs.freedesktop.org/show_bug.cgi?id=101705

fi-bdw-5557u total:279  pass:268  dwarn:0   dfail:0   fail:0   skip:11  
time:446s
fi-bdw-gvtdvmtotal:279  pass:265  dwarn:0   dfail:0   fail:0   skip:14  
time:430s
fi-blb-e6850 total:279  pass:224  dwarn:1   dfail:0   fail:0   skip:54  
time:360s
fi-bsw-n3050 total:279  pass:243  dwarn:0   dfail:0   fail:0   skip:36  
time:542s
fi-bxt-j4205 total:279  pass:260  dwarn:0   dfail:0   fail:0   skip:19  
time:515s
fi-byt-j1900 total:279  pass:254  dwarn:1   dfail:0   fail:0   skip:24  
time:523s
fi-byt-n2820 total:279  pass:251  dwarn:0   dfail:0   fail:0   skip:28  
time:511s
fi-glk-2atotal:279  pass:260  dwarn:0   dfail:0   fail:0   skip:19  
time:603s
fi-hsw-4770  total:279  pass:263  dwarn:0   dfail:0   fail:0   skip:16  
time:442s
fi-hsw-4770r total:279  pass:263  dwarn:0   dfail:0   fail:0   skip:16  
time:421s
fi-ilk-650   total:279  pass:229  dwarn:0   dfail:0   fail:0   skip:50  
time:413s
fi-ivb-3520m total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:512s
fi-ivb-3770  total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:478s
fi-kbl-7500u total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:471s
fi-kbl-7560u total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  
time:587s
fi-kbl-r total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:593s
fi-pnv-d510  total:279  pass:223  dwarn:1   dfail:0   fail:0   skip:55  
time:529s
fi-skl-6260u total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  
time:464s
fi-skl-6700k total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:467s
fi-skl-6770hqtotal:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  
time:481s
fi-skl-gvtdvmtotal:279  pass:266  dwarn:0   dfail:0   fail:0   skip:13  
time:436s
fi-skl-x1585ltotal:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  
time:496s
fi-snb-2520m total:279  pass:251  dwarn:0   dfail:0   fail:0   skip:28  
time:544s
fi-snb-2600  total:279  pass:250  dwarn:0   dfail:0   fail:0   skip:29  
time:409s

a8f0812284aa77e62aba1e4b430ac3bc090f43d0 drm-tip: 2017y-08m-11d-07h-22m-37s UTC 
integration manifest
48bcdd1ade9d drm/i915: Split pin mapping into per platform functions

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_5371/
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Re: [Intel-gfx] [maintainer-tools PATCH 0/4] dim: shellcheck fixes

[Jani Nikula]

On Fri, 11 Aug 2017, Daniel Vetter  wrote:
> On Thu, Aug 10, 2017 at 05:08:12PM +0300, Jani Nikula wrote:
>> Thou shalt not push dim patches before passing 'make check'.
>
> On the series:
>
> Reviewed-by: Daniel Vetter 

Thanks, pushed.

BR,
Jani.

>
>> 
>> Cc: Daniel Vetter 
>> Cc: Maarten Lankhorst 
>> Cc: Benjamin Gaignard 
>> 
>> 
>> Jani Nikula (4):
>>   dim: Fix shellcheck SC1083
>>   dim: Fix shellcheck SC2162 and SC2166
>>   dim: Fix shellcheck SC2153
>>   dim: Fix shellcheck SC2053
>> 
>>  dim | 16 +---
>>  1 file changed, 9 insertions(+), 7 deletions(-)
>> 
>> -- 
>> 2.11.0
>> 

-- 
Jani Nikula, Intel Open Source Technology Center
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Re: [Intel-gfx] [PATCH i-g-t 1/5] Add support for subtest-specific documentation

[Daniel Vetter]

On Thu, Aug 10, 2017 at 01:26:47PM +0300, Petri Latvala wrote:
> The current documentation for tests is limited to a single string per
> test binary. This patch adds support for documenting individual
> subtests.
> 
> The syntax for subtest documentation is:
> 
>igt_document_subtest("Frob knobs to see if one of the "
> "crossbeams will go out of skew on the "
> "treadle.\n");
>igt_subtest("knob-frobbing-askew")
>  test_frob();
> 
> or with a format string:
> 
>   for_example_loop(e) {
> igt_document_subtest_f("Frob %s to see if one of the "
>"crossbeams will go out of skew on the "
>"treadle.\n", e->readable_name);
> igt_subtest_f("%s-frob-askew", e->name)
>   test_frob(e);
>   }

I'm not sold on this layout at all. Everywhere else where we do in-line
code documentation it is through specially formatted comments. That gives
you a lot of freedom for plain-text layout, in combination with some mild
markup (gtk-doc for igt and rst for kernel) that result in docs which both
look good in the code and look good rendered.

This here essentially restricts you to one-liners, and a one-liner can't
really explain what a more complext test does.

If we imagine what e.g. Paulo's test documentation in
kms_frontbuffer_tracking.c looks like, it'll be bad.

I thought the test documentation that Thomas Wood worked on (no idea about
status) would give us the full power and expressiveness of gtkdoc, but for
binaries. I think that's what we want.

Then for testcases I think we again want to follow the inline
documentation style, perhaps with something like the below:


/**
 * IGT-Subtest: tests some stuff
 *
 * Longer explanation of test approach and result evalution.
 *
 * Maybe over multiple paragraphs with headlines like CAVEATS, or
 * explaining hw bugs and stuff
 */
igt_subtest("bla-bla-subtest")


There's also the question of how to associate a given doc entry with more
the multiple subtest names that igt_subtest_f can generate, but I guess
that should be solveable.

Any, in my opinion documentation has to look pleasing, both in code and
rendered, otherwise people will not look at it, not write it and not
update it. Or worse, they stick to writing full comments, because that's
the only thing that allows them to express what they want to document.

We need something much better imo than this patch series from that pov.

Thanks, Daniel

> The documentation cannot be extracted from just comments, because
> associating them with the correct subtest name will then require doing
> pattern matching in the documentation generator, for subtests where
> the name is generated at runtime using igt_subtest_f.
> 
> v2: Rebase, change function name in commit message to match code
> 
> v3: Fix current documentation string tracking, add missing va_end (Vinay)
> 
> v4: Fix brainfart in __igt_run_subtest
> 
> Signed-off-by: Petri Latvala 
> Acked-by: Leo Li 
> Acked-by: Arkadiusz Hiler 
> ---
>  lib/igt_aux.c  |   8 ++--
>  lib/igt_core.c | 149 
> +
>  lib/igt_core.h |   6 ++-
>  3 files changed, 128 insertions(+), 35 deletions(-)
> 
> diff --git a/lib/igt_aux.c b/lib/igt_aux.c
> index f428f15..d56f41f 100644
> --- a/lib/igt_aux.c
> +++ b/lib/igt_aux.c
> @@ -311,7 +311,7 @@ static void sig_handler(int i)
>   */
>  void igt_fork_signal_helper(void)
>  {
> - if (igt_only_list_subtests())
> + if (igt_only_collect_data())
>   return;
>  
>   /* We pick SIGCONT as it is a "safe" signal - if we send SIGCONT to
> @@ -344,7 +344,7 @@ void igt_fork_signal_helper(void)
>   */
>  void igt_stop_signal_helper(void)
>  {
> - if (igt_only_list_subtests())
> + if (igt_only_collect_data())
>   return;
>  
>   igt_stop_helper(_helper);
> @@ -375,7 +375,7 @@ static void __attribute__((noreturn)) 
> shrink_helper_process(int fd, pid_t pid)
>   */
>  void igt_fork_shrink_helper(int drm_fd)
>  {
> - assert(!igt_only_list_subtests());
> + assert(!igt_only_collect_data());
>   igt_require(igt_drop_caches_has(drm_fd, DROP_SHRINK_ALL));
>   igt_fork_helper(_helper)
>   shrink_helper_process(drm_fd, getppid());
> @@ -473,7 +473,7 @@ void igt_stop_hang_detector(void)
>  #else
>  void igt_fork_hang_detector(int fd)
>  {
> - if (igt_only_list_subtests())
> + if (igt_only_collect_data())
>   return;
>  }
>  
> diff --git a/lib/igt_core.c b/lib/igt_core.c
> index c0488e9..f126ef8 100644
> --- a/lib/igt_core.c
> +++ b/lib/igt_core.c
> @@ -99,7 +99,7 @@
>   *
>   * To allow this i-g-t provides #igt_fixture code blocks for setup code 
> outside
>   * of subtests and automatically skips the subtest code blocks themselves. 
> For
> - * special cases 

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Enable FBC for non X-tiled FBs (rev6)

[Patchwork]

== Series Details ==

Series: drm/i915: Enable FBC for non X-tiled FBs (rev6)
URL   : https://patchwork.freedesktop.org/series/21264/
State : success

== Summary ==

Series 21264v6 drm/i915: Enable FBC for non X-tiled FBs
https://patchwork.freedesktop.org/api/1.0/series/21264/revisions/6/mbox/

Test kms_cursor_legacy:
Subgroup basic-busy-flip-before-cursor-legacy:
fail   -> PASS   (fi-snb-2600) fdo#100215

fdo#100215 https://bugs.freedesktop.org/show_bug.cgi?id=100215

fi-bdw-5557u total:279  pass:268  dwarn:0   dfail:0   fail:0   skip:11  
time:448s
fi-bdw-gvtdvmtotal:279  pass:265  dwarn:0   dfail:0   fail:0   skip:14  
time:429s
fi-blb-e6850 total:279  pass:224  dwarn:1   dfail:0   fail:0   skip:54  
time:358s
fi-bsw-n3050 total:279  pass:243  dwarn:0   dfail:0   fail:0   skip:36  
time:546s
fi-bxt-j4205 total:279  pass:260  dwarn:0   dfail:0   fail:0   skip:19  
time:515s
fi-byt-j1900 total:279  pass:254  dwarn:1   dfail:0   fail:0   skip:24  
time:528s
fi-byt-n2820 total:279  pass:250  dwarn:1   dfail:0   fail:0   skip:28  
time:506s
fi-glk-2atotal:279  pass:260  dwarn:0   dfail:0   fail:0   skip:19  
time:602s
fi-hsw-4770  total:279  pass:263  dwarn:0   dfail:0   fail:0   skip:16  
time:448s
fi-hsw-4770r total:279  pass:263  dwarn:0   dfail:0   fail:0   skip:16  
time:424s
fi-ilk-650   total:279  pass:229  dwarn:0   dfail:0   fail:0   skip:50  
time:420s
fi-ivb-3520m total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:507s
fi-ivb-3770  total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:482s
fi-kbl-7500u total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:476s
fi-kbl-7560u total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  
time:586s
fi-kbl-r total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:590s
fi-pnv-d510  total:279  pass:223  dwarn:1   dfail:0   fail:0   skip:55  
time:524s
fi-skl-6260u total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  
time:463s
fi-skl-6700k total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  
time:473s
fi-skl-6770hqtotal:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  
time:483s
fi-skl-gvtdvmtotal:279  pass:266  dwarn:0   dfail:0   fail:0   skip:13  
time:438s
fi-skl-x1585ltotal:279  pass:268  dwarn:0   dfail:0   fail:0   skip:11  
time:479s
fi-snb-2520m total:279  pass:251  dwarn:0   dfail:0   fail:0   skip:28  
time:549s
fi-snb-2600  total:279  pass:250  dwarn:0   dfail:0   fail:0   skip:29  
time:403s

a8f0812284aa77e62aba1e4b430ac3bc090f43d0 drm-tip: 2017y-08m-11d-07h-22m-37s UTC 
integration manifest
c08d90cbd2c0 drm/i915: Fix FBC cfb stride programming for non X-tiled FB

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_5370/
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Re: [Intel-gfx] [PATCH] drm/i915: Split obj->cache_coherent to track r/w

[Joonas Lahtinen]

On to, 2017-08-10 at 17:20 +0100, Chris Wilson wrote:
> Another month, another story in the cache coherency saga. This time, we
> come to the realisation that i915_gem_object_is_coherent() has been
> reporting whether we can read from the target without requiring a cache
> invalidate; but we were using it in places for testing whether we could
> write into the object without requiring a cache flush. So split the
> tracking into two, one to decide before reads, one after writes.
> 
> See commit e27ab73d17ef ("drm/i915: Mark CPU cache as dirty on every
> transition for CPU writes") for the previous step in this saga.
> 
> Testcase: igt/kms_mmap_write_crc
> Testcase: igt/kms_pwrite_crc
> Signed-off-by: Chris Wilson 
> Cc: Maarten Lankhorst 
> Cc: Dongwon Kim 
> Cc: Matt Roper 
> Cc: Joonas Lahtinen 
> Cc: Mika Kuoppala 



> +++ b/drivers/gpu/drm/i915/i915_gem_object.c
> @@ -0,0 +1,44 @@
> +/*
> + * Copyright © 2017 Intel Corporation
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the "Software"),
> + * to deal in the Software without restriction, including without limitation
> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> + * and/or sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice (including the next
> + * paragraph) shall be included in all copies or substantial portions of the
> + * Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 
> DEALINGS
> + * IN THE SOFTWARE.
> + *
> + */
> +
> +#include "i915_drv.h"
> +#include "i915_gem_object.h"
> +

Kerneldoc for the two following functions needed.

> +static inline bool
> +i915_gem_object_is_coherent(struct drm_i915_gem_object *obj, bool write)
> +{
> + if (obj->cache_level != I915_CACHE_NONE)
> + return true;
> +
> + return !write && HAS_LLC(to_i915(obj->base.dev));
> +}
> +
> +void i915_gem_object_set_cache_coherency(struct drm_i915_gem_object *obj,
> +  unsigned int cache_level)
> +{
> + obj->cache_level = cache_level;
> + obj->cache_coherent_r = i915_gem_object_is_coherent(obj, false);
> + obj->cache_coherent_w = i915_gem_object_is_coherent(obj, true);
> + obj->cache_dirty = !obj->cache_coherent_w;
> +}
> 

Other than that, it seems OK. Although READ / WRITE might be more
explicit than true / false.

Regards, Joonas
-- 
Joonas Lahtinen
Open Source Technology Center
Intel Corporation
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Re: [Intel-gfx] [PATCH] drm/i915/fbc: only update no_fbc_reason when active

[Daniel Vetter]

On Fri, Aug 11, 2017 at 09:23:27AM +0200, Daniel Vetter wrote:
> In our snb farm in CI we have plenty of underruns, but not enough
> stolen memory to enable fbc. Which means every time there's an
> underrun the no_fbc_reason swichtes to something that makes
> kms_frontbuffer_tracking fail instead of skip, adding massive amounts
> of additional noise to igt test runs.
> 
> Make sure we don't try to disable fbc when it's off already.
> 
> Cc: Paulo Zanoni 
> Signed-off-by: Daniel Vetter 

Note this seems to be the real bug that's causing all the spurious noise
on snb CI in the full run. So pretty important to land this fast.
-Daniel

> ---
>  drivers/gpu/drm/i915/intel_fbc.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_fbc.c 
> b/drivers/gpu/drm/i915/intel_fbc.c
> index 860b8c26d29b..4015b1e716e5 100644
> --- a/drivers/gpu/drm/i915/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/intel_fbc.c
> @@ -1216,7 +1216,7 @@ static void intel_fbc_underrun_work_fn(struct 
> work_struct *work)
>   mutex_lock(>lock);
>  
>   /* Maybe we were scheduled twice. */
> - if (fbc->underrun_detected)
> + if (fbc->underrun_detected || !fbc->enabled)
>   goto out;
>  
>   DRM_DEBUG_KMS("Disabling FBC due to FIFO underrun.\n");
> -- 
> 2.13.3
> 

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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Re: [Intel-gfx] [maintainer-tools PATCH 0/4] dim: shellcheck fixes

[Daniel Vetter]

On Thu, Aug 10, 2017 at 05:08:12PM +0300, Jani Nikula wrote:
> Thou shalt not push dim patches before passing 'make check'.

On the series:

Reviewed-by: Daniel Vetter 

> 
> Cc: Daniel Vetter 
> Cc: Maarten Lankhorst 
> Cc: Benjamin Gaignard 
> 
> 
> Jani Nikula (4):
>   dim: Fix shellcheck SC1083
>   dim: Fix shellcheck SC2162 and SC2166
>   dim: Fix shellcheck SC2153
>   dim: Fix shellcheck SC2053
> 
>  dim | 16 +---
>  1 file changed, 9 insertions(+), 7 deletions(-)
> 
> -- 
> 2.11.0
> 

-- 
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Software Engineer, Intel Corporation
http://blog.ffwll.ch
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Re: [Intel-gfx] [PATCH i-g-t] pm_rps: Extended testcases with checking PMINTRMSK register value

[Daniel Vetter]

On Thu, Aug 10, 2017 at 02:20:27PM +0100, Chris Wilson wrote:
> Quoting Katarzyna Dec (2017-08-10 14:06:15)
> > In addition to checking whether the frequency is in correct range
> > for certain scenario, we can also verify whether PM interrupts are
> > masked correctly.
> 
> What does correctly mean? It was a recommendation not a requirement.
> 
> You are checking internal kernel implementation details, just add the
> check to our runtime suspend that we have applied the mask (which is a
> reasonable check as the rps idling is decoupled from the rps suspend).

Yes, igt testcase cannot (well, only under very specific exceptions) make
assumptions about the kernel implementations. Doing so unecessarily ties
the test to a given implementation/platform, which destroy all the value
it provides for regression testing from one platform to the next.

But while you look into this, the testcase itself does sometimes fail in
our CI:

https://intel-gfx-ci.01.org/tree/drm-tip/shards.html

Both pm_rps@reset and pm_rps@waitboost seem to randomly fail on all
platforms we're currently testing.

Please take a look at these failures and try to fix them (either test or
kerenl), that would be an actual substantial improvement of igt.

Thanks, Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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[Intel-gfx] [bug report] drm/i915/gvt: Update MMIO handle policy to compatible KBL platform.

[Dan Carpenter]

Hello Xu Han,

The patch 5cf5fe8f729b: "drm/i915/gvt: Update MMIO handle policy to
compatible KBL platform." from Mar 29, 2017, leads to the following
static checker warning:

drivers/gpu/drm/i915/gvt/handlers.c:2855 init_skl_mmio_info()
'0x6 | 0x4' has '0x4' set on both sides

drivers/gpu/drm/i915/gvt/handlers.c
  2848  MMIO_D(0x44500, D_SKL_PLUS);
  2849  MMIO_DFH(GEN9_CSFE_CHICKEN1_RCS, D_SKL_PLUS, F_CMD_ACCESS, 
NULL, NULL);
  2850  MMIO_DFH(GEN8_HDC_CHICKEN1, D_SKL | D_KBL, F_MODE_MASK | 
F_CMD_ACCESS,
  2851  NULL, NULL);
  2852  
  2853  MMIO_D(0x4ab8, D_KBL);
  2854  MMIO_D(0x940c, D_SKL_PLUS);
  2855  MMIO_D(0x2248, D_SKL_PLUS | D_KBL);

D_SKL_PLUS is the same as D_SKL | D_KBL so the D_KBL is redundant.  Also
why don't we just use D_SKL_PLUS on the lines below as well?

  2856  MMIO_D(0x4ab0, D_SKL | D_KBL);
  2857  MMIO_D(0x20d4, D_SKL | D_KBL);
  2858  
  2859  return 0;
  2860  }

regards,
dan carpenter
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Re: [Intel-gfx] [PATCH v4 i-g-t] tests/kms: increase max threshold time for edid read

[Lofstedt, Marta]

> -Original Message-
> From: Taylor, Clinton A
> Sent: Thursday, August 10, 2017 8:50 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Taylor, Clinton A ; Vetter, Daniel
> ; Lofstedt, Marta 
> Subject: [PATCH v4 i-g-t] tests/kms: increase max threshold time for edid
> read
> 
> From: Clint Taylor 
> 
> Current 50ms max threshold timing for an EDID read is very close to the
> actual time for a 2 block HDMI EDID read. Adjust the timings base on
> connector type as DP reads are at 1 MBit and HDMI at 100K bit. If an LSPcon is
> connected to device under test the -l option should be passed to update the
> threshold timing to allow the LSPcon to read the EDID at the HDMI timing.
> The -l option should be used when LSPcon is on the motherboard or if a
> USB_C->HDMI converter is present
> 
> V2: Adjust timings based on connector type, EDID size, and Add an option to
> specify if an LSPcon is present.
> V3: Add bugzilla to commit message
> V4: remove edid_size check from HDMI multiplier. Fixes DVI on HDMI.
> 
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100047
> 
> Cc: Daniel Vetter 
> Cc: Marta Lofstedt 
> Signed-off-by: Clint Taylor 
> ---
>  tests/kms_sysfs_edid_timing.c | 74
> +++
>  1 file changed, 60 insertions(+), 14 deletions(-)
> 
> diff --git a/tests/kms_sysfs_edid_timing.c b/tests/kms_sysfs_edid_timing.c
> index 1201388..0382610 100644
> --- a/tests/kms_sysfs_edid_timing.c
> +++ b/tests/kms_sysfs_edid_timing.c
> @@ -26,21 +26,46 @@
>  #include 
>  #include 
> 
> -#define THRESHOLD_PER_CONNECTOR  10
> -#define THRESHOLD_TOTAL  50
> -#define CHECK_TIMES  15
> +#define THRESHOLD_FOR_EMPTY_CONNECTOR10
> +#define THRESHOLD_PER_EDID_BLOCK 5
> +#define HDMI_THRESHOLD_MULTIPLIER10
> +#define CHECK_TIMES  10
> 
>  IGT_TEST_DESCRIPTION("This check the time we take to read the content of
> all "
>"the possible connectors. Without the edid -
> ENXIO patch "
> 
> "(http://permalink.gmane.org/gmane.comp.video.dri.devel/62083), "
> -  "we sometimes take a *really* long time. "
> -  "So let's just check for some reasonable
> timing here");
> +  "we sometimes take a *really* long time. So
> let's check "
> +  "an approximate time per edid block based on
> connector "
> +  "type. The -l option adjusts DP timing to
> reflect HDMI read "
> +  "timings from LSPcon.");
> +
> +/* The -l option has been added to correctly handle timings when an
> +LSPcon is
> + * present. This could be on the platform itself or in a USB_C->HDMI
> converter.
> + * With LSPCon EDID read timing will need to change from the 1 Mbit AUX
> + * bus speed to the 100 Kbit HDMI DDC bus speed  */ bool
> +lspcon_present;
> 
> +static int opt_handler(int opt, int opt_index, void *data) {
> + if (opt == 'l') {
> + lspcon_present = true;
> + igt_info("set LSPcon present on DP ports\n");
> + }
> 
> -igt_simple_main
> + return 0;
> +}
> +
> +int main(int argc, char **argv)
>  {
>   DIR *dirp;
>   struct dirent *de;
> + lspcon_present = false;
> +
> + igt_simple_init_parse_opts(, argv, "l", NULL, NULL,
> +   opt_handler,
> NULL);

We can't have this lspcon as an argument to the test, it will not work with 
automated testing using piglit as we do for CI. 
Theoretically we could add a "has_lspcon" to debugfs, but I believe that this 
test has started to be over complicated.
The intention of the test is to do a sanity check so that we don't drift off 
here, so I actually prefer the V1.
Your detailed work could however be used in a benchmark, where the result would 
be the actually timing, I am sure there is a performance team who would like 
that.

/Marta

> +
> + igt_skip_on_simulation();
> 
>   dirp = opendir("/sys/class/drm");
>   igt_assert(dirp != NULL);
> @@ -49,17 +74,34 @@ igt_simple_main
>   struct igt_mean mean = {};
>   struct stat st;
>   char path[PATH_MAX];
> - int i;
> + char edid_path[PATH_MAX];
> + char edid[512]; /* enough for 4 block edid */
> + unsigned long edid_size = 0;
> + int i, fd_edid;
> + unsigned int threshold = 0;
> 
>   if (*de->d_name == '.')
>   continue;;
> 
>   snprintf(path, sizeof(path),
> "/sys/class/drm/%s/status",
>   de->d_name);
> + snprintf(edid_path, sizeof(edid_path),
> "/sys/class/drm/%s/edid",
> + de->d_name);
> 
>   if (stat(path, ))
>   

Re: [Intel-gfx] [PATCH 07/16] drm/i915: Trim struct_mutex hold duration for i915_gem_free_objects

[Joonas Lahtinen]

On ke, 2017-07-26 at 14:26 +0100, Chris Wilson wrote:
> We free objects in bulk after they wait for their RCU grace period.
> Currently, we take struct_mutex and unbind all the objects. This can lead
> to a long lock duration during which time those objects have their pages
> unfreeable (i.e. the shrinker is prevented from reaping those pages). If
> we only process a single object under the struct_mutex and then free the
> pages, the number of objects locked away from the shrinker is minimal
> and we allow regular clients better access to struct_mutex if they need
> it.
> 
> Signed-off-by: Chris Wilson 

Reviewed-by: Joonas Lahtinen 

Regards, Joonas
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Re: [Intel-gfx] [PATCH 01/16] drm/i915: Keep a small stash of preallocated WC pages

[Joonas Lahtinen]

On ke, 2017-07-26 at 14:25 +0100, Chris Wilson wrote:
> We use WC pages for coherent writes into the ppGTT on !llc
> architectuures. However, to create a WC page requires a stop_machine(),
> i.e. is very slow. To compensate we currently keep a per-vm cache of
> recently freed pages, but we still see the slow startup of new contexts.
> We can amoritize that cost slightly by allocating WC pages in small
> batches (PAGEVEC_SIZE == 14) and since creating a WC page implies a
> stop_machine() there is no penalty for keeping that stash global.
> 
> Signed-off-by: Chris Wilson 



> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1464,6 +1464,9 @@ struct i915_gem_mm {
>   struct llist_head free_list;
>   struct work_struct free_work;
>  
> + /** Small stash of WC pages */

Please briefly add the "why".

> + struct pagevec wc_stash;
> +
>   /** Usable portion of the GTT for GEM */
>   dma_addr_t stolen_base; /* limited to low memory (32-bit) */
>  
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c 
> b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index 10aa7762d9a6..ad4e48435853 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -351,39 +351,85 @@ static gen6_pte_t iris_pte_encode(dma_addr_t addr,
>  
>  static struct page *vm_alloc_page(struct i915_address_space *vm, gfp_t gfp)
>  {
> - struct page *page;
> + struct pagevec *pvec = >free_pages;
>  
>   if (I915_SELFTEST_ONLY(should_fail(>fault_attr, 1)))
>   i915_gem_shrink_all(vm->i915);
>  
> - if (vm->free_pages.nr)
> - return vm->free_pages.pages[--vm->free_pages.nr];
> + if (likely(pvec->nr))
> + return pvec->pages[--pvec->nr];
> +
> + if (!vm->pt_kmap_wc)
> + return alloc_page(gfp);
> +
> + lockdep_assert_held(>i915->drm.struct_mutex);

Lift this to the beginning of the func, should trigger easier.
 
> -static void vm_free_pages_release(struct i915_address_space *vm)
> +static void vm_free_pages_release(struct i915_address_space *vm,
> +   bool immediate)
>  {
> - GEM_BUG_ON(!pagevec_count(>free_pages));
> + struct pagevec *pvec = >free_pages;
> +
> + GEM_BUG_ON(!pagevec_count(pvec));
> +
> + if (vm->pt_kmap_wc) {
> + struct pagevec *stash = >i915->mm.wc_stash;
>  
> - if (vm->pt_kmap_wc)
> - set_pages_array_wb(vm->free_pages.pages,
> -    pagevec_count(>free_pages));
> + /* When we use WC, first fill up the global stash and then
> +  * only if full immediately free the overflow.
> +  */
> +
> + lockdep_assert_held(>i915->drm.struct_mutex);

I'd again lift this up to the beginning.

> @@ -447,12 +493,31 @@ static void fill_page_dma_32(struct i915_address_space 
> *vm,
>  static int
>  setup_scratch_page(struct i915_address_space *vm, gfp_t gfp)
>  {
> - return __setup_page_dma(vm, >scratch_page, gfp | __GFP_ZERO);
> + struct page *page;
> + dma_addr_t addr;
> +
> + page = alloc_page(gfp | __GFP_ZERO);
> + if (unlikely(!page))
> + return -ENOMEM;
> +
> + addr = dma_map_page(vm->dma, page, 0, PAGE_SIZE,
> + PCI_DMA_BIDIRECTIONAL);
> + if (unlikely(dma_mapping_error(vm->dma, addr))) {
> + __free_page(page);
> + return -ENOMEM;
> + }
> +
> + vm->scratch_page.page = page;
> + vm->scratch_page.daddr = addr;
> + return 0;

Unrelated hunk, please split.

>  }
>  
>  static void cleanup_scratch_page(struct i915_address_space *vm)
>  {
> - cleanup_page_dma(vm, >scratch_page);
> + struct i915_page_dma *p = >scratch_page;
> +
> + dma_unmap_page(vm->dma, p->daddr, PAGE_SIZE, PCI_DMA_BIDIRECTIONAL);
> + __free_page(p->page);

Ditto.

>  }
>  
>  static struct i915_page_table *alloc_pt(struct i915_address_space *vm)
> @@ -1332,18 +1397,18 @@ static int gen8_ppgtt_init(struct i915_hw_ppgtt 
> *ppgtt)
>   1ULL << 48 :
>   1ULL << 32;
>  
> - ret = gen8_init_scratch(>base);
> - if (ret) {
> - ppgtt->base.total = 0;
> - return ret;
> - }
> -
>   /* There are only few exceptions for gen >=6. chv and bxt.
>    * And we are not sure about the latter so play safe for now.
>    */
>   if (IS_CHERRYVIEW(dev_priv) || IS_BROXTON(dev_priv))
>   ppgtt->base.pt_kmap_wc = true;
>  
> + ret = gen8_init_scratch(>base);
> + if (ret) {
> + ppgtt->base.total = 0;
> + return ret;
> + }
> +

More unrelated hunks.

Regards, Joonas
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Re: [Intel-gfx] [PATCH] drm/i915: Split obj->cache_coherent to track r/w

[Maarten Lankhorst]

Op 10-08-17 om 18:20 schreef Chris Wilson:
> Another month, another story in the cache coherency saga. This time, we
> come to the realisation that i915_gem_object_is_coherent() has been
> reporting whether we can read from the target without requiring a cache
> invalidate; but we were using it in places for testing whether we could
> write into the object without requiring a cache flush. So split the
> tracking into two, one to decide before reads, one after writes.
>
> See commit e27ab73d17ef ("drm/i915: Mark CPU cache as dirty on every
> transition for CPU writes") for the previous step in this saga.
>
> Testcase: igt/kms_mmap_write_crc
> Testcase: igt/kms_pwrite_crc
> Signed-off-by: Chris Wilson 
> Cc: Maarten Lankhorst 
> Cc: Dongwon Kim 
> Cc: Matt Roper 
> Cc: Joonas Lahtinen 
> Cc: Mika Kuoppala 
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101109
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101555

Tested-by: Maarten Lankhorst 
Acked-by: Maarten Lankhorst 

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[Intel-gfx] [PATCH] drm/i915/fbc: only update no_fbc_reason when active

[Daniel Vetter]

In our snb farm in CI we have plenty of underruns, but not enough
stolen memory to enable fbc. Which means every time there's an
underrun the no_fbc_reason swichtes to something that makes
kms_frontbuffer_tracking fail instead of skip, adding massive amounts
of additional noise to igt test runs.

Make sure we don't try to disable fbc when it's off already.

Cc: Paulo Zanoni 
Signed-off-by: Daniel Vetter 
---
 drivers/gpu/drm/i915/intel_fbc.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_fbc.c b/drivers/gpu/drm/i915/intel_fbc.c
index 860b8c26d29b..4015b1e716e5 100644
--- a/drivers/gpu/drm/i915/intel_fbc.c
+++ b/drivers/gpu/drm/i915/intel_fbc.c
@@ -1216,7 +1216,7 @@ static void intel_fbc_underrun_work_fn(struct work_struct 
*work)
mutex_lock(>lock);
 
/* Maybe we were scheduled twice. */
-   if (fbc->underrun_detected)
+   if (fbc->underrun_detected || !fbc->enabled)
goto out;
 
DRM_DEBUG_KMS("Disabling FBC due to FIFO underrun.\n");
-- 
2.13.3

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Re: [Intel-gfx] [PATCH] drm/i915: Handle full s64 precision for wait-ioctl

[Joonas Lahtinen]

On la, 2017-08-05 at 20:47 +0100, Chris Wilson wrote:
> Quoting Chris Wilson (2017-08-05 20:19:24)



> > +++ b/drivers/gpu/drm/i915/i915_drv.h
> > @@ -4144,6 +4144,12 @@ static inline unsigned long 
> > msecs_to_jiffies_timeout(const unsigned int m)
> >  
> >  static inline unsigned long nsecs_to_jiffies_timeout(const u64 n)
> >  {
> > +#if NSEC_PER_SEC % HZ
> > +   /* nsecs_to_jiffies64() does not guard against overflow */
> > +   if (n >= (u64)MAX_JIFFY_OFFSET * NSEC_PER_SEC / HZ)
> > +   return MAX_JIFFY_OFFSET;
> 
> This still overflows, we need n / NSEC_PER_SEC >= MAX_JIFFY_OFFSET / HZ
> as MAX_JIFFY_OFFSET is ~LONG_MAX/2
> 
> Hmm, so div_u64(n, NSEC_PER_SEC) >= MAX_JIFFY_OFFSET / HZ ?

This reflects the original test best.

Regards, Joonas
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Re: [Intel-gfx] [PATCH] drm/i915: Handle full s64 precision for wait-ioctl

[Joonas Lahtinen]

On la, 2017-08-05 at 20:19 +0100, Chris Wilson wrote:
> The wait-ioctl is optionally supplied a timeout with nanosecond
> precision in a s64 field. We use nsecs_to_jiffies64() to convert that
> into the jiffies consumed by the scheduler, but internally
> nsecs_to_jiffies64() does not guard against overflow (as it's purpose is
> for use by the scheduler and not drivers!). So we must guard against the
> overflow ourselves, and in the process note that we may then return
> much earlier than the timeout selected by the user, so don't report
> ETIME unless we do hit the timeout. (Woe betold us though if the user
> waits for a year (32bit) and the request is still not complete!)
> 
> Reported-by: Jason Ekstrand 
> Signed-off-by: Chris Wilson 
> Cc: Joonas Lahtinen 
> Cc: Daniel Vetter 



> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 44df7dc3f880..b5794add4a3a 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -3543,6 +3543,10 @@ i915_gem_wait_ioctl(struct file *filp,
>    */
>   if (ret == -ETIME && !nsecs_to_jiffies(arg.timeout_ns))
>   arg.timeout_ns = 0;
> +
> + /* Asked to wait beyond the jiffie/scheduler precision */
> + if (ret == -ETIME && arg.timeout_ns)
> + ret = -EAGAIN;

-EAGAIN is documented as "GPU wedged" in the ioctl documentation. So
better update that documentation.

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Re: [Intel-gfx] [PATCH 5/6] drm/i915/gen10: implement gen 10 watermarks calculations

[Mahesh Kumar]

Hi,


On Thursday 10 August 2017 02:22 AM, Rodrigo Vivi wrote:

From: Paulo Zanoni 

They're slightly different than the gen 9 calculations.

v2: Remove TODO comment. Code matches recent spec.

Cc: Mahesh Kumar 
Cc: Maarten Lankhorst 
Signed-off-by: Paulo Zanoni 
Signed-off-by: Rodrigo Vivi 
---
  drivers/gpu/drm/i915/intel_pm.c | 21 +++--
  1 file changed, 15 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 1622e6f3c6b6..857e2f0a4b15 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4274,8 +4274,9 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
   * should allow pixel_rate up to ~2 GHz which seems sufficient since max
   * 2xcdclk is 1350 MHz and the pixel rate should never exceed that.
  */
-static uint_fixed_16_16_t skl_wm_method1(uint32_t pixel_rate, uint8_t cpp,
-uint32_t latency)
+static uint_fixed_16_16_t
+skl_wm_method1(const struct drm_i915_private *dev_priv, uint32_t pixel_rate,
+  uint8_t cpp, uint32_t latency)
  {
uint32_t wm_intermediate_val;
uint_fixed_16_16_t ret;
@@ -4285,6 +4286,10 @@ static uint_fixed_16_16_t skl_wm_method1(uint32_t 
pixel_rate, uint8_t cpp,
  
  	wm_intermediate_val = latency * pixel_rate * cpp;

ret = div_fixed16(wm_intermediate_val, 1000 * 512);
+
+   if (INTEL_GEN(dev_priv) >= 10)
+   ret.val += 1 << 16;

Please use available fp16.16 wrapper to add
   ret = add_fixed16_u32(ret, 1);

+
return ret;
  }
  
@@ -4436,11 +4441,15 @@ static int skl_compute_plane_wm(const struct drm_i915_private *dev_priv,
  
  	plane_bytes_per_line = width * cpp;

if (y_tiled) {
-   interm_pbpl = DIV_ROUND_UP(plane_bytes_per_line *
-  y_min_scanlines, 512);
+   interm_pbpl = plane_bytes_per_line * y_min_scanlines;
+
+   if (INTEL_GEN(dev_priv) >= 10)
+   interm_pbpl++;
+
+   interm_pbpl = DIV_ROUND_UP(interm_pbpl, 512);

It looks wrong, my interpretation of Bspec is:
interm_pbpl = DIV_ROUND_UP(plane_bytes_per_line * 
y_min_scanlines, 512);

 if (INTEL_GEN(dev_priv) >= 10)
interm_pbpl++;

-Mahesh

plane_blocks_per_line = div_fixed16(interm_pbpl,
y_min_scanlines);
-   } else if (x_tiled) {
+   } else if (x_tiled && INTEL_GEN(dev_priv) == 9) {
interm_pbpl = DIV_ROUND_UP(plane_bytes_per_line, 512);
plane_blocks_per_line = u32_to_fixed16(interm_pbpl);
} else {
@@ -4448,7 +4457,7 @@ static int skl_compute_plane_wm(const struct 
drm_i915_private *dev_priv,
plane_blocks_per_line = u32_to_fixed16(interm_pbpl);
}
  
-	method1 = skl_wm_method1(plane_pixel_rate, cpp, latency);

+   method1 = skl_wm_method1(dev_priv, plane_pixel_rate, cpp, latency);
method2 = skl_wm_method2(plane_pixel_rate,
 cstate->base.adjusted_mode.crtc_htotal,
 latency,


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