Re: Mersenne: Celerons vs. Pentium II/III at large FFT lengths?
Ackk! That was rather inexact wording. Let me try again...my Celeron 400 based systems crunch exponents in the 384K FFT range at about the same speed as George's PII-400 machine. However, at the 448K FFT size, George's machine appears to be 20% or more faster than my Celeron 400s. Could the 128K L2 cache of the Celeron chips (vs. the 512K L2 cache of the PIIs) be the culprit? I think it is much more the bus speed/multipliers- tek = 4.5*100 cas = 5.5*83. | tek Celeron (Mendocino) 451.031641/451.031641 MHz 448.92/450.56 bms| | uptime 6:00pm up 8 days, 17:41, 0 users, load average: 2.00, 2.00, 2.00| | Iteration: 3850100 / 5515217 [69%]. Clocks: 81008907 = 0.180 sec. | | Iteration: 2357600 / 5511949 [42%]. Clocks: 81235328 = 0.181 sec. | | cas Celeron (Mendocino) 456.510316/456.510316 MHz 455.48/455.48 bms| | uptime 6:00pm up 17 days, 20:15, 0 users, load average: 2.00, 2.00, 2.0| | Iteration: 4084700 / 5505959 [74%]. Clocks: 9645 = 0.217 sec. | | Iteration: 239600 / 5505919 [4%]. Clocks: 97636893 = 0.217 sec.| By the way is o/c frowned upon when running these tests? I got two errors back in early august (a sumout and a ERROR: ROUND OFF (0.5) 0.40), two weeks after starting gimps, I adjusted the cooling and since then no reported errors. But overall am I wasting my time (an perhaps others) by running o/c'ed? _ Unsubscribe list info -- http://www.scruz.net/~luke/signup.htm Mersenne Prime FAQ -- http://www.tasam.com/~lrwiman/FAQ-mers
Re: Mersenne: Celerons vs. Pentium II/III at large FFT lengths?
Ackk! That was rather inexact wording. Let me try again...my Celeron 400 based systems crunch exponents in the 384K FFT range at about the same speed as George's PII-400 machine. However, at the 448K FFT size, George's machine appears to be 20% or more faster than my Celeron 400s. Could the 128K L2 cache of the Celeron chips (vs. the 512K L2 cache of the PIIs) be the culprit? I'm sorry if my last message hit the list, both messages should just be ignored, this is just to correct the last one.. 448k, 100MHz bus cel 450 = 2.57 sec p3 = 2.49 sec less than 20% _ Unsubscribe list info -- http://www.scruz.net/~luke/signup.htm Mersenne Prime FAQ -- http://www.tasam.com/~lrwiman/FAQ-mers
Re: Mersenne: Celerons vs. Pentium II/III at large FFT lengths?
On Fri, 17 Sep 1999, Brian J. Beesley wrote: On 16 Sep 99, at 18:35, Lucas Wiman wrote: This brings us to an interesting point. Should the primenet server start default assigning celeron's 384K FFT mersennes, and save the larger ones for PII's/PIII's? No. Whatever the problem was (I _did_ manage to duplicate it on my Celeron 366 laptop using v18 - a 448K FFT was actually _slower_ than a 512K FFT on the same system!) v19 does not suffer from it. And the PrimeNet server doesn't recognise a Celeron unless v19 is running - in v18, all P6 architecture chips are identified as Pentium Pros. So I guess I should have my Celery's test larger exponents, at least until I upgrade to V19...;-) Kel _ Unsubscribe list info -- http://www.scruz.net/~luke/signup.htm Mersenne Prime FAQ -- http://www.tasam.com/~lrwiman/FAQ-mers
Mersenne: Celerons vs. Pentium II/III at large FFT lengths?
Does anyone else notice that their Celeron based machines seem to take a relatively bigger performance hit when moving from testing exponents in the 384K FFT size to the 448K FFT size (under V18.1, at least)? I have a couple of non-overclocked Celeron 400 machines and, at the 384K FFT size, they report timings nearly identical to those George sent out in his email message of a couple of days ago, timings generated by his PII-400. However, when the machines test exponents with the 448K FFT size, they are more than 20% slower! Is the Celeron's relatively small L2 cache finally causing it to lose ground to the PII/PIIIs as the FFT sizes get larger and larger? Kel _ Unsubscribe list info -- http://www.scruz.net/~luke/signup.htm Mersenne Prime FAQ -- http://www.tasam.com/~lrwiman/FAQ-mers
Re: Mersenne: Celerons vs. Pentium II/III at large FFT lengths?
At 11:28 AM 9/16/1999 -0400, St. Dee wrote: Does anyone else notice that their Celeron based machines seem to take a relatively bigger performance hit when moving from testing exponents in the 384K FFT size to the 448K FFT size (under V18.1, at least)? I have a couple of non-overclocked Celeron 400 machines and, at the 384K FFT size, they report timings nearly identical to those George sent out in his email message of a couple of days ago, timings generated by his PII-400. However, when the machines test exponents with the 448K FFT size, they are more than 20% slower! Is the Celeron's relatively small L2 cache finally causing it to lose ground to the PII/PIIIs as the FFT sizes get larger and larger? Ackk! That was rather inexact wording. Let me try again...my Celeron 400 based systems crunch exponents in the 384K FFT range at about the same speed as George's PII-400 machine. However, at the 448K FFT size, George's machine appears to be 20% or more faster than my Celeron 400s. Could the 128K L2 cache of the Celeron chips (vs. the 512K L2 cache of the PIIs) be the culprit? Thanks, Kel _ Unsubscribe list info -- http://www.scruz.net/~luke/signup.htm Mersenne Prime FAQ -- http://www.tasam.com/~lrwiman/FAQ-mers
Re: Mersenne: Celerons vs. Pentium II/III at large FFT lengths?
Ackk! That was rather inexact wording. Let me try again...my Celeron 400 based systems crunch exponents in the 384K FFT range at about the same speed as George's PII-400 machine. However, at the 448K FFT size, George's machine appears to be 20% or more faster than my Celeron 400s. Could the 128K L2 cache of the Celeron chips (vs. the 512K L2 cache of the PIIs) be the culprit? I think so. Yves Gallot mentioned something similar on the Primes-L list a while ago. This brings us to an interesting point. Should the primenet server start default assigning celeron's 384K FFT mersennes, and save the larger ones for PII's/PIII's? -Lucas _ Unsubscribe list info -- http://www.scruz.net/~luke/signup.htm Mersenne Prime FAQ -- http://www.tasam.com/~lrwiman/FAQ-mers
Re: Mersenne: Celerons
?? Can you fit dual Celerons in a decent BX/GX M/B "designed" for dual PIIs? (In other words does the Celeron support SMP) the celeron's have the SMB disabled. Rumor has it you can hack them by cutting and jumping traces, but, uhh. also, the smaller cache size would be a larger disadvantage when multiple CPU's have to contend for main memory. -jrp
Re: Mersenne: Celerons
But Prime95 (or variants) is not typical in that it stresses CPU and L2 cache performance. It isn't clear to me how the trade-off between the Celeron 333A with its 128K L2 running at CPU speed compares to the PII-333 with the 512K L2 running at 1/2 the CPU speed when doing LL tests on exponents in the 600+ range. If Prime95 can shuffle info into and out of the 512K L2 of the PII but can't fit it all into the 128K L2 of the Celeron, and consequently has to read and write frequently to the slower SDRAM with the Celeron, then couldn't the PII be significantly faster for Prime95? I think real world tests are needed to determine the outcome. Of course, my understanding of how Prime95 operates is rudimentary and what I said above might be hogwash. No it isn't hogwash. But, if you're LL testing using a 256K FFT size, your work vectors come to 4 MBytes. I reckon, the way the program is structured, you don't actually save many L2 cache misses as a result of having only 128K L2 cache instead of 512K L2 cache. Many people are now running 384K FFTs... which makes the inadequacy of even 512K L2 cache even more marked... The fact that the Mendocino chip (Celeron 300A, Celeron 333) runs its L2 cache at core speed, instead of half core speed, like PIIs, suggests that transplanting a C300A into a PII-300 system, or a C333 into a PII-333, making NO other changes, might actually *improve* the performance of Prime95, though other applications may benchmark a few percent slower. I'd be VERY interested to hear of anyone running Prime95 on a Xeon - the Xeon has 512K, 1M or 2M of L2 cache running at core speed (at painful, extortionate and positively obscene prices, respectively) - benchmark comparisons with PII systems at the same processor/bus speed would be interesting! Regards Brian Beesley
Re: Mersenne: Celerons
FYI, Jan 5 saw the launch of the 400MHz Celeron both in the Slot One (SEPP) and PPGA Pin Grid Array Versions (sorta like socket 7 but not). Although the celeron has its 'own' chipset - the EX, all the Celerons that we have built have used a BX motherboard. All decent BX motherboards support the Celeron in Slot One versions. The PPGA motherboard uses a ZX chipset if I remember rightly. How this compares to the BX as far as performance is not aparent at this time. I have several friends who are using Slot One Celerons for heavy gaming (Quake, Unreal etc) and I have to say the 333 I saw (actually built) had FPS rates comparable with a P2 +/- a few %. The 300s and 333s can be overclocked simply by upping the bus speed and it is VERY common to see 300s running at 450. The 333 requires a little more cooling to run at 500. I would steer clear of the old cacheless 266. I think It was the first Intel CPU EVER to have an IComp2.0 rating LOWER than its clock speed and I read several web reviews comparing it to a lowly 200 P55C. If anyone would like us to build a GIMPS cruncher, let me know. Steve Gardner [EMAIL PROTECTED] www.pcavenue.com 1) Does anyone know the preformance of a 266 Celeron, VS a 266 MMX P1 vs a 266 P2 The Celeron 266 [and all slower, and Celeron 300's that aren't 300A] have NO level 2 cache, so I suspect would get severely NAILED on Mersenne performance. The Celeron 300A and all 333 and above have 128K of level 2 cache thats full core speed, so perform quite comparably to the similar clock speed Pentium-II systems (which have 512k of level 2 cache which is 1/2 the core speed). retail Celeron systems however often use the severely deficient 440EX chipset instead of the 440BX, this can impact performance (plus they have very few expansion slots). 2) I am buying a new PC, does the Celeron hurt preformance so badly to not be effective? If you get a celery 300A on a decent 440BX motherboard, not at all. Performance is excellent. In fact, if you populate said 440BX with 100MHz capable PC100 SDRAM, there's a very good chance you can get it working reliably at speeds upwards of 450MHz. The various system wide benchmarks I've seen floating around the net indicate this combination will run just as fast as a pentium-II at the same clockspeed. -jrp
Re: Mersenne: Celerons
On Thu, 7 Jan 1999 04:16:00 -0500, you wrote: ? Does the c400 use 100 MHz FSB? Nope, runs at a lowly 66 AFAIK. Overclockable? Maybe - 600MHz . I'd like to see it, but I have strong doubts about it. Maybe with a really expensive cooling system, but it would probably be more cost effective to get 2 systems and run them in parallel. ?? Can you fit dual Celerons in a decent BX/GX M/B "designed" for dual PIIs? (In other words does the Celeron support SMP) I am not a programmer and correct me if I am wrong, but isn't SMP more dependant on the O.S? My guess is that since the Celeron runs correctly on a BX, I would put money on a dual CPU config running an SMP OS like NT working real well. After all I have built dual machines with P2s, PPros, and P55Cs so why not the Celeron? Intel has crippled the Celerons so they won't run (out of the box) in an MP configuration. If you have access to some decent tools, you can modify them --- http://www.cpu-central.com/dualceleron/index-dc.html. I'd really like to try this with a pair of 300As and overclock them to 450... -- Kevin Jaget (or an FDA approved generic equivalent) kcjaget at mindspring.com
Mersenne: Celerons
1) Does anyone know the preformance of a 266 Celeron, VS a 266 MMX P1 vs a 266 P2 2) I am buying a new PC, does the Celeron hurt preformance so badly to not be effective?
Re: Mersenne: Celerons
On Tue, Jan 05, 1999 at 05:40:41PM -0500, Bryan Fullerton wrote: On Mon, Jan 04, 1999 at 08:59:43AM -0500, Bradford Brown [EMAIL PROTECTED] wrote: 1) Does anyone know the preformance of a 266 Celeron, VS a 266 MMX P1 vs a 266 P2 Hmm, unfortunately no - the GIMPS comparison page doesn't have any Celeron stuff on it yet. I'm sure there must be benchmarks *somewhere* on the 'net, though. There are some benchmarks on www.specbench.org, submitted by Intel themselves. I can summarize to the list if people think that would be useful. Quick summary is that I don't see any reason at all to buy a regular Pentium II, unless you're absolutely CPU-bound (and in that case, what are you doing on x86?). The Celeron's price/performance at 333 and 400 MHz just blows the PII out of the water. 2) I am buying a new PC, does the Celeron hurt preformance so badly to not be effective? As long as you make sure you get a 300A or faster, the performance impact is negligible. The 300 (no A) and slower Celeron have no L2 cache, and thus have significantly slower performance. -andy -- Andy Isaacson [EMAIL PROTECTED] [EMAIL PROTECTED]Fight Spam, join CAUCE: http://www.csl.mtu.edu/~adisaacs/ http://www.cauce.org/
Re: Mersenne: Celerons
CPUmark for my Pentium 200 MMX is 10.4 and that is with several other programs up and doing at least something. http://intel.com/procs/perf/basicpc/cpumark99.htm shows Celeron scores 12.9 for the 266 Mhz, to 30.8 for the 400 Mhz. Other Celeron benchmarks are available from http://intel.com/procs/perf/basicpc/index.htm . Leo ~~~ Bradford Brown wrote: 1) Does anyone know the preformance of a 266 Celeron, VS a 266 MMX P1 vs a 266 P2 2) I am buying a new PC, does the Celeron hurt preformance so badly to not be effective?
Re: Mersenne: Celerons
At 07:22 PM 1/5/99 -0500, Andrew Isaacson wrote: Quick summary is that I don't see any reason at all to buy a regular Pentium II, unless you're absolutely CPU-bound (and in that case, what are you doing on x86?). The Celeron's price/performance at 333 and 400 MHz just blows the PII out of the water. But Prime95 (or variants) is not typical in that it stresses CPU and L2 cache performance. It isn't clear to me how the trade-off between the Celeron 333A with its 128K L2 running at CPU speed compares to the PII-333 with the 512K L2 running at 1/2 the CPU speed when doing LL tests on exponents in the 600+ range. If Prime95 can shuffle info into and out of the 512K L2 of the PII but can't fit it all into the 128K L2 of the Celeron, and consequently has to read and write frequently to the slower SDRAM with the Celeron, then couldn't the PII be significantly faster for Prime95? I think real world tests are needed to determine the outcome. Of course, my understanding of how Prime95 operates is rudimentary and what I said above might be hogwash. Kel