Re: [OpenWrt-Devel] [LEDE-DEV] [PATCH] busybox: sysntpd - Support for NTP servers received via DHCP(v6)
On 20/05/16 14:43, Hans Dedecker wrote: On Fri, May 20, 2016 at 3:18 PM, David Langwrote: On Fri, 20 May 2016, Jo-Philipp Wich wrote: Hi Hans, I wanted to preserve the ntp server behavior and only change the behavior when configured in order to keep backwards compatibility. You favour enabling DHCP ntp server config without explicit config ? Personally I do because thats likely what most users expect, but then trusting foreign NTP server advertisements might be a security sensitive topic - on the other hand one trusts the default gateway and DNS advertisements too, so I don't know. NTP isn't signed. If I can control your DNS, I can probably control your NTP by giving you the wrong IP for the NTP server If I can control your gateway, I can redirect all your NTP queries to someone else (NAT, redirects, etc) so why not trust the NTP server being provided? OK let's make the concensus to enable use_dhcp by default If there are none from dhcp, it'll fall back to the configured list? Servers from dhcp are extra? or replacing the configured? ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] [PATCH] Atheros AR8035-A support
On 29/10/15 11:52, Philippe DUCHEIN wrote: This patch Atheros phy AR8035-A switch support Signed-off-by: Philippe DUCHEIN— diff -Nru a/target/linux/ar71xx/config-4.1 b/target/linux/ar71xx/config-4.1 --- a/target/linux/ar71xx/config-4.12015-10-27 18:57:41.379735223 +0100 +++ b/target/linux/ar71xx/config-4.12015-10-28 14:13:31.611494701 +0100 @@ -18,6 +18,7 @@ CONFIG_ARCH_SUSPEND_POSSIBLE=y CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y CONFIG_AT803X_PHY=y +CONFIG_AR8035A_PHY=y I believe this is already in the at803x code. #define ATH8035_PHY_ID 0x004dd072 ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] [PATCH] Atheros AR8035-A support
On 30/10/15 14:25, Philippe DUCHEIN wrote: Hi Conor, yes, but at803x code, there is 20% of lost packets… clock delay is incorrect into at803x file That clock delay is generally dependent on the board. It is passed as platform data for the driver. See "struct at803x_platform_data" in the ath79 mach files. Conor ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] WAN dhcp client doesnt recognize unplugged cable and doesnt request new IP on replugged
On 15/05/15 10:48, Jakub Jančo wrote: Hello, After I unplug cable: ifconfig eth0 Link encap:Ethernet HWaddr 14:CC:20:4D:3D:B5 inet addr:10.1.5.246 Bcast:10.1.5.255 Mask:255.255.255.0 inet6 addr: fe80::16cc:20ff:fe4d:3db5/64 Scope:Link UP BROADCAST RUNNING MULTICAST MTU:1500 Metric:1 RX packets:747 errors:0 dropped:0 overruns:0 frame:0 TX packets:896 errors:0 dropped:0 overruns:0 carrier:0 collisions:0 txqueuelen:1000 RX bytes:84708 (82.7 KiB) TX bytes:487679 (476.2 KiB) Interrupt:4 ip link 2: eth0: BROADCAST,MULTICAST,UP,LOWER_UP mtu 1500 qdisc fq_codel state UP mode DEFAULT group default qlen 1000 link/ether 14:cc:20:4d:3d:b5 brd ff:ff:ff:ff:ff:ff After plug in cable, no change, no logs. ModelTP-Link TL-WR1043N/ND v2 Firmware Version OpenWrt Barrier Breaker 14.07 / LuCI Trunk (svn-r10472) Kernel Version3.10.49 Do you have the switch configured correctly? You can use swconfig to check the physical port status. http://wiki.openwrt.org/toh/tp-link/tl-wr1043nd ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] WAN dhcp client doesnt recognize unplugged cable and doesnt request new IP on replugged
On 12/05/15 17:57, Jakub Jančo wrote: Hello, I have tplink 1043nd with BB Problem is that I have dhcp client on WAN and if I unplug cable from WAN, it doesnt change status, give up dhcp address. Even worse is that if I plug cable with another end point with another network, WAN dhcp client doesnt pull new IP, I must click on Connect to refresh dhcp client, then new ip is assigned and internet works. Or restart device. Have a look at ifpugd. But maybe netifd should/could/might do something for this scenario? Conor ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] ag71xx unstable link problems on AR7241r1
On 11/04/15 11:25, Daniel Golle wrote: On Fri, Apr 10, 2015 at 07:06:24PM +0200, Daniel Golle wrote: On Fri, Apr 10, 2015 at 05:58:04PM +0200, Sven Eckelmann wrote: I had problems in the past with some optimization by from Felix which caused situations like that. For some reason the device was not correctly reseted on errors. This looked like it was caused by his reset optimizations. When this device uses the ag71xx driver, is a ar724x device and you suspect that this is a partial reset problem then you may try something like this I flashed the affected device (turns out to be a non-XW nanostation) with your testing patch applied. I'll see how it goes, I'll let you know in the next days if the ethernet link is more stable now. Result: the problem persists also with your patch applied... I am seeing trouble like this on an OM2P. I suspect it is due to pause frames. ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] OpenWrt release name
On 06/04/15 16:50, Imre Kaloz wrote: On Mon, 06 Apr 2015 12:54:53 +0200, bkil bk.il.hu+ibla_q...@gmail.com wrote: +1 on Designated Driver. Migrating or upgrading to OpenWrt is the sober choice. I didn't find the other two meaningful or relevant. I think community polls should be organized in two phases. The first one should gather ideas, while the second one should gather votes. I agree with all of the above. Felix, could we make a new poll which allows adding new suggestions? We could let it run for a week, then the top 3 could make it into the finals. Careful now. You don't want it turning into the Eurovision. ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] 回复: How to Custom admin page on openwrt ?
default hostname is OpenWrt from system config. default domain is lan from dhcp config. Hence OpenWrt.lan should work. ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] reply: System halted on bcm4708 series board when booting openwrt trunk(kernel 3.14)
On 10/03/15 06:34, Tymon wrote: On 10 March 2015 at 04:43, Tymon banglang.hu...@foxmail.com wrote: my cpu is BCM958522ER which is the same series with 4708 as well, 32MB ###boot log: (I updated the xxx-squashfs.trx to the flash) Hit any key to stop autoboot: 0 Checking TRX Image at addr 1e20 ... Uncompressing ... Primary TRX image OK kernel args : console=ttyS0,115200 ubi.mtd=5 root=ubi0:rootfs ro rootflags=sync rootfstype=ubifs user_debug=31 Booting from Primary Partition kernel_args console=ttyS0,115200 ubi.mtd=5 root=ubi0:rootfs ro rootflags=sync rootfstype=ubifs user_debug=31 Start addr 8000 machid 127f Parmameter addr 0010 ... Starting kernel ... Uncompressing Linux... XZ-compressed data is corrupt -- System halted I want to know why this error arise, any hints will be appreciated. but the XZ-compressed data is corrupt is the message of openwrt-trunk kernel that under linux-3.14.xx/lib/compress_unxz.c +371 Did uboot load all of the image into memory? Where did it load the image? Where will the kernel decompress to? Is there room for it to be decompressed? ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] MI424WR Rev I Hynix NAND Error
On 04/03/15 18:14, James Hilliard wrote: We tried changing the chip-delay parameter in the openwrt dtsi file to match the GPL source https://github.com/jameshilliard/actiontec_opensrc_mi424wr-rev-i_fw-40-21-18/blob/34b1f338344ebd36543c9fbcb4870bb6f6914cb8/rg/vendor/marvell/feroceon/linux-2.6/arch/arm/mach-feroceon-kw2/nand.c#L211 but that didn't seem to resolve the issue. There does seem to be a lot of errors, but then a good few correctable, in your boot log, as if there is a timing problem. I'm not familiar with that hardware, but if uboot is able to read and write correctly, then at least the hardware controller part should be configured right, for timings. If the kernel avoids changing any hardware registers for the nand access, that side should be ok. If you have some idea where the nand controller lives, you can examine it's setup in uboot console and then after the kernel boots. Conor ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] MI424WR Rev I Hynix NAND Error
On 04/03/15 18:14, James Hilliard wrote: I wrote the image to flash using tftp from uboot, I'm having trouble isolating the cause of the ECC errors, what I'm not sure of is if there's a quirk with the Hynix NAND that the Eon NAND doesn't have. It would appear that the Hynix and Eon NAND chips are used interchangeably for this router model(this was tested on 2 of the same model where that appears to be the only difference), the odd part is that the Eon NAND works without issue so I would assume that the Hynix NAND is sensitive to a particular setting that the Eon is not as the stock firmware does not appear to differentiate any settings between the two NAND chips from what I could tell by looking at the stock source code. We tried changing the chip-delay parameter in the openwrt dtsi file to match the GPL source https://github.com/jameshilliard/actiontec_opensrc_mi424wr-rev-i_fw-40-21-18/blob/34b1f338344ebd36543c9fbcb4870bb6f6914cb8/rg/vendor/marvell/feroceon/linux-2.6/arch/arm/mach-feroceon-kw2/nand.c#L211 but that didn't seem to resolve the issue. Would you have any suggestions on what I should try next or how to debug this further? Are there any non-standard settings in the GPL source that stand out as needing to be configured in openwrt for this NAND chip to function correctly? Uboot has commands to examine nand flash, in particular it can dump the ECC data. It might be useful to check it for the different chips, and also for stock router, and after you store the new image. Conor ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] MI424WR Rev I Hynix NAND Error
On 22/02/15 01:36, James Hilliard wrote: I've been trying to install OpenWRT on an Actiontec MI424WR Rev I, however some variants of this router use a Hynix NAND chip that OpenWRT doesn't seem to be able to access. There are other versions of this router that use a Eon NAND chip that works fine. I've attached the full boot-log. The stock firmware is the same for both NAND Chips. You have nand ECC errors. The flash detection looks reasonable. You need to check the ECC handling mode ie. software, hardware, etc. And you may want to check how you wrote the image to flash. Conor ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] Ethernet problem with R8000
On 04/03/15 05:29, Ian Kent wrote: On Sat, 2015-02-28 at 23:07 +0800, Ian Kent wrote: The only things I can say for sure are, packets sent are seen by the bgmac driver and the driver gets a transmit completion interrupt which it processes. However, no packets is seen coming from the router switch port. Similarly no interrupts are seen by the driver for incoming packets at all. Can you access switch chip registers? There may be counters in there, that will indicate if packets are making it that far, in or out. You may see counters indicating errors. You might be able to work out the arangement of ports from that info. You may have to configure some of the switch registers to get the correct arrangement of the ports and/or vlan settings. Conor ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] uboot-lantiq cgu settings for ramboot image
On 19/01/15 10:46, Ben Mulvihill wrote: Hello, I am trying to build uboot-lantiq for the BT Home Hub 3A (lantiq ar9), and am wondering where to initialise the cgu, in the case of a ramboot image for uart booting. Normally the cgu is initialised in lowlevel_init, but that code is bypassed in ramboot images. The result is that the board boots with the wrong cgu settings, which sends the console haywire. So far I have tried two solutions: Another option is to try and not change anything. The console is already configured and running. The ram does need config. I was used to seeing the ramboot version running at half clock speed, at least on danube, previous to ar9. Conor ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] [PATCH] comgt: add ncm proto support
On 09/10/14 13:25, John Crispin wrote: personally i have been using mbim since i wrote umbim and it just works :) Ah, nice. I have some similar code, but in lua, from the json files. It's only a management protocol. Note that MBIM uses the NCM code for the bulk packet data, so it's packetising is still in play. Conor ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] [PATCH] comgt: add ncm proto support
On 08/10/14 11:00, John Crispin wrote: the e3267 that sami sent me works with this proto, but i am failing to get a DHCP addr. could someone with a ncm dongle please try this patch on top of latest trunk please and tell me if they are getting a dhcp addr ? I had a similar problem with a Huawei device. It worked after removing some zero padding in the ncm driver. In cdc_ncm.c, cdc_ncm_fill_tx_frame(), towards the end there is handling for Zero Length Packets (ZLP) and padding short packets. I removed the padding, and it worked. Are you testing 3.10 or 3.14? It's changed ever so slightly between them. I am somewhat confused by the comment. It won't pad out short packets, but does make shortish packets long. FYI: /* * If collected data size is less or equal CDC_NCM_MIN_TX_PKT bytes, * we send buffers as it is. If we get more data, it would be more * efficient for USB HS mobile device with DMA engine to receive a full * size NTB, than canceling DMA transfer and receiving a short packet. */ if (skb_out-len CDC_NCM_MIN_TX_PKT) /* final zero padding */ Conor ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel
[OpenWrt-Devel] bridge operation without physical port, 'bridge_empty'
Hi, I'm trying to get a 'virtual' bridge up to support vlan tagging. But I am having great difficulty in making this work. I tried trunk for the 'bridge_empty' setting, but it's not doing it for me. Problem is with 'br-lan' not wanting to change to up state: config interface 'lan' option type 'bridge' option bridge_empty '1' option proto 'none' option auto '1' config interface 'vlan10' option type 'bridge' option ifname 'wlan0 br-lan.10' option proto 'none' option auto '1' config interface 'vlan20' option type 'bridge' option ifname 'wlan0-1 br-lan.20' option proto 'none' option auto '1' The vlan bridges work and do the tagging. If eth0 is added into br-lan, that works as a trigger to bring it up. Am I missing something in the config? Can I use some other sort of dummy interface to force it up? Thanks, Conor ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] bridge operation without physical port, 'bridge_empty'
On 12/03/14 12:54, Conor O'Gorman wrote: I'm trying to get a 'virtual' bridge up to support vlan tagging. But I am having great difficulty in making this work. I tried trunk for the 'bridge_empty' setting, but it's not doing it for me. Can I use some other sort of dummy interface to force it up? Kernel veth module is working in this setup. But it seems like a hack. Thanks, Conor ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] Multiple virtual wireless interfaces - mix adhoc and ap mode?
On Tue, 2013-06-25 at 00:20 -0400, jonsm...@gmail.com wrote: Can this be made to work on Ralink? When I have the adhoc0 interface up bringing up ap0 says interface busy. Ralink is not good for supporting this type of setup. I had tried AP and client mode, and after some hacking it sort-of worked. From my notes: ifconfig: SIOCSIFFLAGS: Device or resource busy. Looking at the output of 'iw list' the valid interface combinations only listed AP and mesh mode, not Station/Managed mode. On further investigation, none of the Ralink chips are fully supporting AP+Sta mode. After forcing the driver to report that it can support the combination, I was able to configure both interfaces as desired. The hack gives the following combination output: Pre: valid interface combinations: * #{ AP, mesh point } = 8, total = 8, #channels = 1 Post: valid interface combinations: * #{ managed, AP, mesh point } = 8, total = 8, #channels = 1 You may wish to force add 'adhoc' (P2P?) mode, and see how far it gets you. This was on an RT28xx USB device, so you may have more success on others. Hack (for test) looked like: --- a/drivers/net/wireless/rt2x00/rt2x00dev.c +++ b/drivers/net/wireless/rt2x00/rt2x00dev.c @@ -1264,7 +1264,7 @@ static inline void rt2x00lib_set_if_comb */ if_limit = rt2x00dev-if_limits_ap; if_limit-max = rt2x00dev-ops-max_ap_intf; - if_limit-types = BIT(NL80211_IFTYPE_AP); + if_limit-types = BIT(NL80211_IFTYPE_STATION) | BIT(NL80211_IFTYPE_AP); #ifdef CONFIG_MAC80211_MESH if_limit-types |= BIT(NL80211_IFTYPE_MESH_POINT); #endif A nice Atheros (AR9330) shows good support for combinations: valid interface combinations: * #{ managed, WDS, P2P-client } = 2048, #{ IBSS, AP, mesh point, P2P-GO } = 8, total = 2048, #channels = 1 Conor ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] [PATCH] [lantiq] ltq-atm: add rx tasklet
On Sun, 2013-04-28 at 16:09 +0200, Luca dariz wrote: Il 28/04/2013 13:45, Luca dariz ha scritto: Il 26/04/2013 22:00, Luca dariz ha scritto: Il 26/04/2013 16:35, Conor O'Gorman ha scritto: On Fri, 2013-04-26 at 14:13 +0200, Luca dariz wrote: Use a tasklet to handle incoming packets. Fix #12917. Incoming packets are now processes in a tasklet instead of in the irq handler; this should improve latency. This patch is based on a previous version of ltq-atm driver, which did implement a tasklet. It has been tested on a arv4518pw with a Lantiq Danube for about a month and it seems to work well. And how much 'better' is it? I did't measure latency with this patch and without it, so i can't tell exactly. Luca A quick test with cyclictest (https://rt.wiki.kernel.org/index.php/Cyclictest): without the patch: cmdline: ./cyclictest -n # /dev/cpu_dma_latency set to 0us policy: other/other: loadavg: 0.51 0.33 0.27 1/43 3241 T: 0 ( 3241) P: 0 I:1000 C: 144288 Min: 40 Act: 93 Avg: 163 Max: 4456 with the patch: cmdline: ./cyclictest -n # /dev/cpu_dma_latency set to 0us policy: other/other: loadavg: 0.78 0.44 0.22 1/44 4981 T: 0 ( 3452) P: 0 I:1000 C: 82427 Min: 39 Act: 199 Avg: 252 Max: 18179 All latencies are measures in microseconds. Luca I forgot: during the test, a big download was in progress, to stress the rx path a bit. Thank you for providing more information. I'll first say that I am not a gatekeeper on this code, but a user, so I try to review Lantiq specific changes and make hopefully relevant comments. As I understand the results, the average and maximum latency statistics have increased, with a small decrease to minimum? Looking at the system as a whole, it is a router whose primary function will be to move packets from the adsl (atm) interface to ethernet or pci-wifi. Given that under load the ethernet/wifi will most likely use napi interrupt moderation, the vast majority of interrupts firing will be the adsl/atm. Which latencies, therefore, are you concerned about? Ideally the adsl/atm driver on lantiq would use napi method, but I haven't investigated it's structure. I have looked at the bug report you reference, but feel you have side stepped the original problem with an alternative structure. Again, just my thoughts. Conor ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] [PATCH] [lantiq] ltq-atm: add rx tasklet
On Fri, 2013-04-26 at 14:13 +0200, Luca dariz wrote: Use a tasklet to handle incoming packets. Fix #12917. Incoming packets are now processes in a tasklet instead of in the irq handler; this should improve latency. This patch is based on a previous version of ltq-atm driver, which did implement a tasklet. It has been tested on a arv4518pw with a Lantiq Danube for about a month and it seems to work well. And how much 'better' is it? Thanks, Conor ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] LTS Kernel
On 03/04/13 17:36, Jonathan Bither wrote: May be the completely wrong idea, but what if there was an OpenWRT-Kernel GIT repository holding the branches and modifications required for each arch. Would allow easy updates and backports from a Trunk branch to an LTS one. Anyone is entitled to setup a git (or other) repo and provide an LTS/ maintained/arch specific branch. There is already a wide selection[1] on github. [1] https://github.com/mirrors/openwrt/network/members Conor ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] Compile linux with tracing support
On Sat, 2013-03-02 at 15:55 +0100, Luca Dariz wrote: Hi, i'm trying to build the kernel with tracing support for a lantiq target on svn r35820. I enabled tracing options in menuconfig (Global build settings) and it's ok, but if i enable some additional tracers in kernel_menuconfig (Kernel hacking - Tracers) it fails with errors like: CC init/main.o init/main.c:1:0: warning: -ffunction-sections disabled; it makes profiling impossible [enabled by default] Am i missing some config option? Thanks, Luca There was discussion recently on MIPS kernel list about a problem with 32 bit function tracing. I had made a mental note to follow it up, but haven't got there yet. [PATCH] mips: function tracer: Fix broken function tracing http://thread.gmane.org/gmane.linux.kernel/1420616 ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] [PATCH] [lantiq] No XIP for flash
On Tue, 2013-02-12 at 10:51 +0200, malaa...@elisanet.fi wrote: On 11.02.2013 20:19, Conor O'Gorman wrote: On Mon, 2013-02-11 at 17:50 +0100, Matti Laakso wrote: This patch disables the execute-in-place (XIP) support for flash on lantiq. This has to be disabled since the bus which flash is connected to does not support unaligned accesses. Resolves data bus errors on Lantiq routers with Intel command set flash. Interesting, but does lead to a couple of questions. I would have expected instruction fetches to be well aligned? And secondly what sort of code are you running directly from flash? Thanks, Conor The problem is that XIP is (ab)used by jffs2, among others, to do reads with plain memcpy directly from flash. As far as I understand, memcpy on MIPS is allowed to do unaligned accesses but the underlying bus doesn't support it, so problems occur. Proper XIP should work, isn't that how U-Boot stored in flash, for example, works? Best regards, Matti Yes, I later thought of two scenarios myself, uboot, but you were talking kernel, and pieces of static data in code space. The flashes are usually 8 or 16 bit, so the bus restricting things to 32 bit alignment is still peculiar. The EBU does have byte control/select lines. Conor ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] Packets from eth0.0 (VLAN tagged) ignored? (was: How does OpenWRT start network?)
On Mon, 2013-02-11 at 21:53 +0100, Rafał Miłecki wrote: Router want to ping 192.168.1.2, so it's sending ARP request: FF FF FF FF FF FF (dest) C8 3A 35 40 C1 A8 (src) 81 00 00 00 (vlan0) 08 06 (arp) My PC replies to the request: C8 3A 35 40 C1 A8 (dest) 00 1D BA 19 9E DB (src) 81 00 00 01 (vlan1) 08 06 (arp) Response is arriving on a different VLAN. Check the switch VLAN config. Conor ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] [PATCH][Lantiq] Add ath9k eeprom and pci fixup support
On Thu, 2013-01-17 at 13:59 +0100, Álvaro Fernández Rojas wrote: On linux 3.3, the fixup forced the regdomain to 0x67, causing low TX power. This patch only corrects checksum, the rest of the EEPROM isn't changed. Looks like patches hadn't been refreshed on this platform. Would it be appropriate to split that into the refreshes and the change itself? Can't see the wood for the trees. Thanks, Conor ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] [lantiq] kernel 3.7 update
On Sat, 2012-12-15 at 11:56 +0100, John Crispin wrote: Hi, i pushed the lantiq 3.7 kernel support last night. Very nice! Just browsing through the changes. I'll get something running during the week on danube and possibly ase. I like the tidy-up of the ifxhcd module definition, it was starting to frustrate me on Friday. I also note with interest the new version of this driver. AA will continue on 3.3? http://www.saleae.com/logic16 http://dangerousprototypes.com/docs/Open_Bench_Logic_Sniffer - 200Msps captures up to 100MHz waveforms on 16 channels Only missing the apple-style box. But I heaven't used either. Thanks, Conor ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
[OpenWrt-Devel] [PATCH] [lantiq] ltq-hcd usb fix high speed hub mode
Simple update for USB api changes. Signed-off-by: Conor O'Gorman i...@conorogorman.net --- Tested on danube with a 3G module, and using SLUB debug. Previous version of the driver showed SLUB errors. Not this one, and it's interrupt rate seems moderate, which was a nice addition in the previous. package/platform/lantiq/ltq-hcd/src/ifxhcd.c |8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/package/platform/lantiq/ltq-hcd/src/ifxhcd.c b/package/platform/lantiq/ltq-hcd/src/ifxhcd.c index 6d1551f..be0a91d 100644 --- a/package/platform/lantiq/ltq-hcd/src/ifxhcd.c +++ b/package/platform/lantiq/ltq-hcd/src/ifxhcd.c @@ -1349,10 +1349,10 @@ int ifxhcd_hub_control( struct usb_hcd *_syshcd, port_status |= (1 USB_PORT_FEAT_RESET); if (hprt0.b.prtpwr) port_status |= (1 USB_PORT_FEAT_POWER); -/* if (hprt0.b.prtspd == IFXUSB_HPRT0_PRTSPD_HIGH_SPEED) - port_status |= (1 USB_PORT_FEAT_HIGHSPEED); - else*/ if (hprt0.b.prtspd == IFXUSB_HPRT0_PRTSPD_LOW_SPEED) - port_status |= (1 USB_PORT_FEAT_LOWSPEED); + if (hprt0.b.prtspd == IFXUSB_HPRT0_PRTSPD_HIGH_SPEED) + port_status |= USB_PORT_STAT_HIGH_SPEED; + else if (hprt0.b.prtspd == IFXUSB_HPRT0_PRTSPD_LOW_SPEED) + port_status |= USB_PORT_STAT_LOW_SPEED; if (hprt0.b.prttstctl) port_status |= (1 USB_PORT_FEAT_TEST); /* USB_PORT_FEAT_INDICATOR unsupported always 0 */ -- 1.7.9.5 ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] [PATCH] lantiq and Netgear fixes/enhancements
On Wed, 2012-11-28 at 17:24 -0800, Daniel Gimpelevich wrote: The config option is already in place, as I said above. The sensible default _is_ the increment, which is what the vast majority of DSL routers do. In most of the AR7 ones, however, this incremented MAC is already a separate boot environment variable. I'm not seeing that on lantiq so far, but I still may. I don't want to drag this out longer than necessary. You used the phrase 'hack'. What do you think is the preferred solution? I see macdsl is the var on ar7. I failed to find info on non-openwrt lantiq systems. As you point out current openwrt lantiq goes with a poor choice. I am on a custom board and can adjust to suit. Thanks, Conor ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] [PATCH] lantiq and Netgear fixes/enhancements
On Wed, 2012-11-28 at 06:18 -0800, Daniel Gimpelevich wrote: On Wed, 2012-11-28 at 10:09 +, Conor O'Gorman wrote: This will affect all lantiq atm boards? I specify an ethernet MAC via the command line, but I don't necessarily want it in the atm. The existing code leaves the MAC at all zeros. Do you require that instead of the MAC you specify for Ethernet? The latinq ATM driver provides no way to have it be anything other than zeros at the driver level. None. At least on the Netgear, the stock firmware increments the Ethernet address to get the ATM one, and it receives the Ethernet address and no other address on the kernel command line. I will soon be looking at the Gigaset for comparison, but I expect it likely does the same thing. It's perfectly reasonable not to want an increment of the supplied Ethernet address in the ATM, but that implies you have some other MAC you'd like it to have instead. If you can reveal where this MAC comes from and how you'd like to supply it to the driver, that would be a first step to de-uglifying this dirty hack. It really boggles my mind that this has never been discussed before. Hi Daniel, Thank you for consider my comments. There are a couple of points I'd make. AFAIK this is only needed for ethernet bridging over atm. I am not familiar with an ethernet style mac being used in straight atm connections. As far as I can see the field you are setting is only pulled out by the br2684 driver, which is providing the ethernet veneer. I do see that one or two atm drivers get a serial number from their hardware, and a few more pull up an eeprom value. Would some adjustment in br2684 be more appropriate? I have no problem with a hack, if it is recognised as such, with some intention to improve it later. Concerning what MAC to apply, yes some variation on the serial number is appropriate. I have in the past used the top bits of the available space, rather than a simple increment, as it avoids bumping into a similar unit. Conor ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] AR7XX LED timer trigger bug
On Fri, 2012-10-19 at 19:53 +0100, Conor O'Gorman wrote: On Fri, 2012-10-19 at 21:47 +0400, Roman A. aka BasicXP wrote: Confirmed. 19.10.2012 21:22, Nuno Gonçalves ?: LED timer trigger is disabled if you overwrite delay_on with the current value. Also on lantiq platform. Seen to break for both delay_on and delay_off same value write. Fixed upstream. http://git.kernel.org/?p=linux/kernel/git/ralf/linux.git;a=commit;h=3fbd8716da4c69ddbb76c022f3f4a0d50723c68f ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] AR7XX LED timer trigger bug
On Fri, 2012-10-19 at 21:47 +0400, Roman A. aka BasicXP wrote: Confirmed. 19.10.2012 21:22, Nuno Gonçalves ?: LED timer trigger is disabled if you overwrite delay_on with the current value. Also on lantiq platform. Seen to break for both delay_on and delay_off same value write. Possibly here where the timer is deleted: void led_blink_set(struct led_classdev *led_cdev, unsigned long *delay_on, unsigned long *delay_off) { del_timer_sync(led_cdev-blink_timer); and may not be re-instated with early exit from: static void led_set_software_blink(struct led_classdev *led_cdev, unsigned long delay_on, unsigned long delay_off) { int current_brightness; current_brightness = led_get_brightness(led_cdev); if (current_brightness) led_cdev-blink_brightness = current_brightness; if (!led_cdev-blink_brightness) led_cdev-blink_brightness = led_cdev-max_brightness; if (led_get_trigger_data(led_cdev) delay_on == led_cdev-blink_delay_on delay_off == led_cdev-blink_delay_off) return; Conor ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
[OpenWrt-Devel] [PATCH] lantiq: dsl: fix status polling loop
doesn't need to do it 20 times all the time, missing loop condition check Signed-off-by: Conor O'Gorman i...@conorogorman.net --- .../patches/110-fix_status_polling_loop.patch | 11 +++ 1 file changed, 11 insertions(+) create mode 100644 package/ltq-dsl/patches/110-fix_status_polling_loop.patch diff --git a/package/ltq-dsl/patches/110-fix_status_polling_loop.patch b/package/ltq-dsl/patches/110-fix_status_polling_loop.patch new file mode 100644 index 000..870943d --- /dev/null +++ b/package/ltq-dsl/patches/110-fix_status_polling_loop.patch @@ -0,0 +1,11 @@ +--- a/src/device/drv_dsl_cpe_device_danube.c b/src/device/drv_dsl_cpe_device_danube.c +@@ -4069,7 +4069,7 @@ static DSL_Error_t DSL_DRV_DANUBE_XTUSys + +DSL_CTX_WRITE(pContext, nErrCode, xtseCurr, xtseCurr); + +- for (nRetry = 0; nRetry 20; nRetry++) ++ for (nRetry = 0; nRetry 20 bStatusUpdated == DSL_FALSE; nRetry++) +{ + /* Get STAT1 info*/ + nErrCode = DSL_DRV_DANUBE_CmvRead(pContext, DSL_CMV_GROUP_STAT, -- 1.7.9.5 ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
[OpenWrt-Devel] uci vlan configuration
I'm just looking through hotplug/10-net and network/config.sh and I see that the following uci settings produce a vlan interface. network.v100=interface network.v100.proto=dhcp network.v100.ifname=eth0.100 network.v100.device=eth0.100 Is this a side-effect or a valid config? There seems to be no mention of it in any docs on the wiki? Thanks, Conor ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] ubnt rocket gps supported?
On Wed, 2012-06-06 at 09:09 -0400, Dave Taht wrote: I am thinking through a prototype deployment of a bunch of outdoor radios, gps and sensors, with fq_codel, and its successors, for location, environmental sensing and precision time. Does the on-board gps on the ubiquity rocket-m gps work in openwrt? (any details on it so as I can make it work would be helpful) Are there any other openwrt supported devices with an integral gps supported? Are there any outdoor radios with a usb port? (yes, I'm aware I can build or buy a case for something like a routerstation pro or routerboard, I was looking for something more or less like a nanostation M5 with a USB port) A number of Ericsson 3G modules have GPS. Conor ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
[OpenWrt-Devel] overriding base-files, not platform specific
Prompted by the recent mail about UBIFS, but not wanting to soil that thread, I have a query about overriding the base-files package. I am adding more security to the basic system, which is a somewhat conflicting requirement to current design. I need to modify files that are part of the base-files package. Some other packages do this, modifying files in the rootfs. But this seems haphazard as build order is not strict. This would also be a package that is not platform specific, so the base-files extension mechanism per platform/target is not applicable. It seems to me that the current design is that a package owns it's files, and it is not expected that other packages should change those files. This is in the majority true, except for base-files and similar. Should I just replace base-files with a custom one? I'd prefer not to, it's a bit much. Adding a config option to base-files is also a possibility. But I'd like to just add a package. To add some specifics, adding a default (rather than blank) password hits base-files/passwd, and always requiring a login hits base-files/preinit/99_10_failsafe_login. inittab needs adjusting, and the busybox utils getty and login are config'd. Thanks, Conor ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] LANTIQ- EASY5072- xDSL interface problems
On Wed, 2012-05-23 at 20:26 +0200, John Crispin wrote: On 23/05/12 20:07, John Crispin wrote: i think we should change this to not use xtu bits unless explicitly set can you try with this patch applied ? Success. That patch didn't work. The -i is necessary. It's also a critical param, as the first setting seems to stick till reboot. Which is annoying, as all subsequent tests are pointless. Anyway, going back to the bare -i works. The xtu value is perhaps wrong for annex a2p? network.adsl.fwannex=a network.adsl.annex=a2p annex_a2p=00_00_00_00_00_01_00_00 Patch: diff --git a/package/ltq-dsl-app/files/dsl_control b/package/ltq-dsl-app/files/dsl_control index e833854..4dc1738 100644 --- a/package/ltq-dsl-app/files/dsl_control +++ b/package/ltq-dsl-app/files/dsl_control @@ -296,7 +296,7 @@ start() { echo invalid fwannex: $fwannex # start CPE dsl daemon in the background - service_start /sbin/dsl_cpe_control -i${xtu} \ + service_start /sbin/dsl_cpe_control -i \ -n /sbin/dsl_notify.sh \ -f /lib/firmware/dsl-fw-${fwannex}.bin } Status: root@OpenWrt:~# /etc/init.d/dsl_control status Chipset:Ifx-Danube 1.5 Line State: DOWN [0x300: handshake] DSL[00]: ERROR - Function is only available in the SHOWTIME! [ 54.468000] DSL[00]: ERROR - Function is only available in the SHOWTIME! Data Rate: 0 b/s / 0 b/s [ 54.54] DSL[00]: ERROR - Function is only available in the SHOWTIME! [ 54.612000] DSL[00]: ERROR - Function is only available in the SHOWTIME! Line Attenuation: 0.0dB / 0.0dB Noise Margin: 0.0dB / 0.0dB Line Uptime:down root@OpenWrt:~# /etc/init.d/dsl_control status Chipset:Ifx-Danube 1.5 Line State: DOWN [0x380: full_init] [ 60.02] DSL[00]: ERROR - Function is only available in the SHOWTIME! [ 60.08] DSL[00]: ERROR - Function is only available in the SHOWTIME! Data Rate: 0 b/s / 0 b/s [ 60.152000] DSL[00]: ERROR - Function is only available in the SHOWTIME! [ 60.224000] DSL[00]: ERROR - Function is only available in the SHOWTIME! Line Attenuation: 0.0dB / 0.0dB Noise Margin: 0.0dB / 0.0dB Line Uptime:down root@OpenWrt:~# /etc/init.d/dsl_control status Chipset:Ifx-Danube 1.5 Line State: DOWN [0x380: full_init] [ 63.184000] DSL[00]: ERROR - Function is only available in the SHOWTIME! [ 63.244000] DSL[00]: ERROR - Function is only available in the SHOWTIME! Data Rate: 0 b/s / 0 b/s [ 63.316000] DSL[00]: ERROR - Function is only available in the SHOWTIME! [ 63.392000] DSL[00]: ERROR - Function is only available in the SHOWTIME! Line Attenuation: 0.0dB / 0.0dB Noise Margin: 0.0dB / 0.0dB Line Uptime:down root@OpenWrt:~# [ 64.372000] [DSL_BSP_Showtime 916]: Datarate US intl = 256000, fast = 0 root@OpenWrt:~# /etc/init.d/dsl_control status Chipset:Ifx-Danube 1.5 Line State: UP [0x801: showtime_tc_sync] Data Rate: 1.024 Mb/s / 256 Kb/s Line Attenuation: 30.3dB / 14.5dB Noise Margin: 36.9dB / 31.0dB Line Uptime:2s ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] LANTIQ- EASY5072- xDSL interface problems
On Thu, 2012-05-24 at 13:43 +0200, John Crispin wrote: On 24/05/12 13:41, Conor O'Gorman wrote: That patch didn't work. The -i is necessary. It's also a critical param, as the first setting seems to stick till reboot. Which is annoying, as all subsequent tests are pointless. Anyway, going back to the bare -i works. The xtu value is perhaps wrong for annex a2p? network.adsl.fwannex=a network.adsl.annex=a2p annex_a2p=00_00_00_00_00_01_00_00 It works with just the default changed. Or user config change to 'a'. uci set network.adsl.annex=a The default a2p (adsl2+) is perhaps too strict? The 'a' option includes all 'a' variations: annex_a=04_01_04_00_00_01_00_00 annex_at1=01_00_00_00_00_00_00_00 annex_alite=00_01_00_00_00_00_00_00 annex_admt=04_00_00_00_00_00_00_00 annex_a2=00_00_04_00_00_00_00_00 annex_a2p=00_00_00_00_00_01_00_00 Conor ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] Bricked WR1043ND
On Fri, 2012-05-25 at 00:08 +0200, Michael Markstaller wrote: [0.00] Kernel command line: board=TL-WR1043ND console=ttyS0,115200 rootfstype=squashfs,jffs2 noinitrd [0.10] MIPS: machine is Generic AR71XX/AR724X/AR913X based board It appears that the kernel cannot correctly determine your board. It therefore doesn't load the SPI flash driver, and there is no rootfs. This trace is the expected https://forum.openwrt.org/viewtopic.php?id=35537 I'm not completely familiar with the ar71xx builds. You either didn't select the exact target in the menus, or the kernel command line param is being ignored. Conor ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] LANTIQ- EASY5072- xDSL interface problems
On Tue, 2012-05-22 at 14:01 +0200, John Crispin wrote: On 21/05/12 22:14, Spyridon Tompros wrote: On 21/05/2012 18:16, John Crispin wrote: On 21/05/12 17:48, Spyridon Tompros wrote: Hi all, currently we test our last left-for-testing xDSL interface. The Danube tries to synchronise but without result. Might be a SW problem of the OpenWRT trunk version we use. Our HW is totally identical to that of Lantiq's RDK. We've also used the add-on front-end of Lantiq's RDK in the place of ours with the same results. So you mean that you plug a cable into the AFE and you get no link resulting in no showtime ? Did you try the same image on a easy50712 ? Exactly (periodically reports leaving showtime). We've checked it on an easy RDK. It works but marginally. (Takes too much time to get connected) while Danube gets very hot. Ok, so it works but the experience is its slow. Hmm, I've tried it here on a custom board. A backfire based old image gets to showtime. Recent trunk build does not. Some logs: Old Backfire working [ 19.072000] IFX MEI Version 5.00.00 [ 19.308000] [ 19.308000] Infineon CPE API Driver version: DSL CPE API V3.24.4.4 [ 19.36] Infineon Technologies ATM driver version 1.0.8 [ 19.36] Infineon Technologies ATM (A1) firmware version 0.1 [ 19.368000] ifxmips_atm: ATM init succeed [ 19.636000] dwc_otg: version 2.60a 22-NOV-2006 root@OpenWrt:/tmp# dsl_cpe_control -f /lib/firmware/ModemHWE.bin -m -c DSL_CPE: Using message dump (debug level: 0x80) DSL_CPE: Device /dev/dsl_cpe_api opened successfully DSL_CPE: Welcome to the CLI interface of DSL CPE API DSL_CPE: Enter 'help all' for a list of built-in commands. DSL_CPE: failed to set message dump debug level for device 0! sEventType=DSL_EVENT_S_LINE_STATE nLineState= sEventType=DSL_EVENT_S_AUTOBOOT_STATUS nStatus=3 nFirmwareRequestType=1 sEventType=DSL_EVENT_S_LINE_STATE nLineState=00FF sEventType=DSL_EVENT_S_FIRMWARE_DOWNLOAD_STATUS nError=0 nFwType=1 sEventType=DSL_EVENT_S_AUTOBOOT_STATUS nStatus=2 nFirmwareRequestType=0 sEventType=DSL_EVENT_S_LINE_POWERMANAGEMENT_STATE nPowerManagementStatus=DSL_G997_PMS_L3 sEventType=DSL_EVENT_S_LINE_STATE nLineState=0100 DSL_CPE#sEventType=DSL_EVENT_S_LINE_STATE nLineState=0200 sEventType=DSL_EVENT_S_LINE_STATE nLineState=0300 sEventType=DSL_EVENT_S_LINE_STATE nLineState=0380 sEventType=DSL_EVENT_S_LINE_STATE nLineState=0800 sEventType=DSL_EVE[ 722.068000] [DSL_BSP_Showtime 916]: Datarate US intl = 256000, fast = 0 NT_S_LINE_POWERMANAGEMENT_STATE nPowerManagementStatus=DSL_G997_PMS_L0 sEventType=DSL_EVENT_S_LINE_STATE nLineState=0801 Sep 8 16:06:54 OpenWrt user.err kernel: [ 722.068000] [DSL_BSP_Showtime 916]: Datarate US intl = 256000, fast = 0 Sep 8 16:06:55 OpenWrt daemon.warn pppd[1016]: Timeout waiting for PADO packets Sep 8 16:06:55 OpenWrt daemon.err pppd[1016]: Unable to complete PPPoE Discovery Trunk not working [8.848000] IFX MEI Version 5.00.00 [8.888000] [8.888000] Infineon CPE API Driver version: DSL CPE API V3.24.4.4 [8.928000] ATM (A1) firmware version 1.0.19 [8.932000] ifxmips_atm: ATM init succeed [8.964000] IFXUSB: ifxusb_hcd: version 3.0alpha B100312 root@OpenWrt:/tmp# dsl_cpe_control -f /lib/firmware/ModemHWE.bin -m -c DSL_CPE: Using message dump (debug level: 0x80) DSL_CPE: Device /dev/dsl_cpe_api opened successfully DSL_CPE: Welcome to the CLI interface of DSL CPE API DSL_CPE: Enter 'help all' for a list of built-in commands. DSL_CPE: failed to set message dump debug level for device 0! sEventType=DSL_EVENT_S_LINE_STATE nLineState= sEventType=DSL_EVENT_S_AUTOBOOT_STATUS nStatus=3 nFirmwareRequestType=1 sEventType=DSL_EVENT_S_LINE_STATE nLineState=00FF sEventType=DSL_EVENT_S_FIRMWARE_DOWNLOAD_STATUS nError=0 nFwType=1 sEventType=DSL_EVENT_S_AUTOBOOT_STATUS nStatus=2 nFirmwareRequestType=0 sEventType=DSL_EVENT_S_LINE_STATE nLineState=0100 DSL_CPE#sEventType=DSL_EVENT_S_LINE_STATE nLineState=0200 sEventType=DSL_EVENT_S_LINE_STATE nLineState=0300 sEventType=DSL_EVENT_S_LINE_STATE nLineState=0001 sEventType=DSL_EVENT_S_LINE_STATE nLineState= sEventType=DSL_EVENT_S_AUTOBOOT_STATUS nStatus=3 nFirmwareRequestType=1 sEventType=DSL_EVENT_S_FIRMWARE_REQUEST nFirmwareRequestType=DSL_FW_REQUEST_ADSL sEventType=DSL_EVENT_S_LINE_STATE nLineState=00FF sEventType=DSL_EVENT_S_FIRMWARE_DOWNLOAD_STATUS nError=0 nFwType=1 sEventType=DSL_EVENT_S_AUTOBOOT_STATUS nStatus=2 nFirmwareRequestType=0 sEventType=DSL_EVENT_S_LINE_STATE nLineState=0100 sEventType=DSL_EVENT_S_LINE_STATE nLineState=0200 sEventType=DSL_EVENT_S_LINE_STATE nLineState=0300
Re: [OpenWrt-Devel] LANTIQ- EASY5072- xDSL interface problems
On Wed, 2012-05-23 at 18:25 +0100, Conor O'Gorman wrote: On Tue, 2012-05-22 at 14:01 +0200, John Crispin wrote: On 21/05/12 22:14, Spyridon Tompros wrote: On 21/05/2012 18:16, John Crispin wrote: On 21/05/12 17:48, Spyridon Tompros wrote: Hi all, currently we test our last left-for-testing xDSL interface. The Danube tries to synchronise but without result. Might be a SW problem of the OpenWRT trunk version we use. Our HW is totally identical to that of Lantiq's RDK. We've also used the add-on front-end of Lantiq's RDK in the place of ours with the same results. So you mean that you plug a cable into the AFE and you get no link resulting in no showtime ? Did you try the same image on a easy50712 ? Exactly (periodically reports leaving showtime). We've checked it on an easy RDK. It works but marginally. (Takes too much time to get connected) while Danube gets very hot. Ok, so it works but the experience is its slow. Hmm, I've tried it here on a custom board. A backfire based old image gets to showtime. Recent trunk build does not. The firmware reports identical: DSL_CPE#vig nReturn=0 DSL_DriverVersionApi=3.24.4.4 DSL_ChipSetFWVersion=2.4.4.0.0.1 DSL_ChipSetHWVersion=1.5 DSL_ChipSetType=Ifx-Danube DSL_DriverVersionMeiBsp=5.0.0 nReturn=0 DSL_DriverVersionApi=3.24.4.4 DSL_ChipSetFWVersion=2.4.4.0.0.1 DSL_ChipSetHWVersion=1.5 DSL_ChipSetType=Ifx-Danube DSL_DriverVersionMeiBsp=5.0.0 The control app behaves rather differently, spawning a number of processes on backfire, but only one on trunk. Plus the changes to the params. Backfire 1021 root 1204 S/sbin/dsl_cpe_control -i -f /lib/firmware/ModemHWE.bi 1027 root 1204 S/sbin/dsl_cpe_control -i -f /lib/firmware/ModemHWE.bi 1028 root 1204 S/sbin/dsl_cpe_control -i -f /lib/firmware/ModemHWE.bi 1029 root 1204 S/sbin/dsl_cpe_control -i -f /lib/firmware/ModemHWE.bi 1030 root 1204 S/sbin/dsl_cpe_control -i -f /lib/firmware/ModemHWE.bi Trunk 1304 root 7408 S/sbin/dsl_cpe_control -i00_00_00_00_00_01_00_00 -n / Apologies if this is just noise. ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] [PATCH] lantiq - fix p2601hnfx leds
On Wed, 2012-05-23 at 01:10 +0200, Luka Perkov wrote: Leds gpio values have changed since initial patch was contributed. I have double checked and this are correct values. This also enables uboot_env partition. And moves the linux partition, and removes the config partition, and the buttons settings have small adjustments. I would suggest a better title and description covering all changes. Only mentioning the leds in the title is insufficient. Conor ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] LANTIQ- EASY5072- xDSL interface problems
On Mon, 2012-05-21 at 17:48 +0200, Spyridon Tompros wrote: Hi all, currently we test our last left-for-testing xDSL interface. The Danube tries to synchronise but without result. Might be a SW problem of the OpenWRT trunk version we use. Our HW is totally identical to that of Lantiq's RDK. We've also used the add-on front-end of Lantiq's RDK in the place of ours with the same results. Annex A or B? ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
[OpenWrt-Devel] lantiq: failsafe mode not sound
There is mod in the target/lantiq/base-files.mk to remove the standard /etc/config/network. There is then a runtime script to determine defaults. This does not seem to work for failsafe mode, where /etc/config/network cannot be created. At least that's what I see on a test. No eth0/lan interface defined. +define Package/base-files/install-target + rm -f $(1)/etc/config/network +endef I'll look at making a change to this. Are there any suggestions for a preferred method? Thanks, Conor O'Gorman ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] lantiq: failsafe mode not sound
On Thu, 2012-05-17 at 15:57 +0100, Conor O'Gorman wrote: This does not seem to work for failsafe mode, where /etc/config/network cannot be created. At least that's what I see on a test. No eth0/lan interface defined. OK, this is rubbish because /etc/init.d/network doesn't run during in failsafe? Conor ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
[OpenWrt-Devel] ethernet carrier, udhcpc, hotplug
I don't seem to get udhcpc renewing a lease after plugging out/in the ethernet cable. I've checked that the carrier state is being signaled correctly via 'ip link'. I imagined that either udhcpc directly, or hotplug indirectly, would make the magic happen, ie. an attempted renewal. Am I missing something? I would think this useful, as it may have been plugged into a different network. Thanks, Conor ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] ethernet carrier, udhcpc, hotplug
On Mon, 2012-05-14 at 18:56 +0200, Jo-Philipp Wich wrote: Am I missing something? I would think this useful, as it may have been plugged into a different network. Yes. This might work for units that have their wan at a dedicated interface, but it will fail through bridges or switches which are always up from the system pov. Yes, I understand. Bridges, I believe, do a suitable AND operation of the carriers for encompassed ports. Switches are more difficult and depend on driver behaviour. It would be appropriate for switch drivers to also do a logical AND of relevant physical port's carriers. But those are the details. I was enquiring about the basic principle in the first instance. There is no current mechanism for dhcpc (or other) activity on carrier down/up? I saw a patch for uevent to handle interface carrier events, but it doesn't seem to have stuck? Thanks, Conor ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] Fixes for D-Link DVA-G3810BN/TL
On Wed, 2012-04-11 at 21:00 +0200, jbem...@zonnet.nl wrote: Hi Salander, Yes, I studied that, but my problem is that my changes to board_bcm63xx.c are under build_dir. I'm not sure where the original file lives in SVN, it could be in some tar ball? There's several similar patches (e.g. https://dev.openwrt.org/browser/trunk/target/linux/brcm63xx/patches-3.3/512-board_BTV2110.patch), but I don't see against which directory those were made? You need to use the quilt patch management tool. It's covered here http://wiki.openwrt.org/doc/devel/patches. In particular you are looking at a kernel patch. The patch you mention above is to be applied to the linux brcm63xx 3.3 kernel tree under build_dir. The birds-eye-view is that these patches are applied in the build_dir tree. With the help of quilt you will make an edit in the build_dir tree and it will become a patch in the target tree. Conor ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] [PATCH 1/6] lantiq: stp, fix for ase, add get, clock disabled
On Tue, 2012-04-10 at 16:09 +0200, John Crispin wrote: Hi Connor, i will merge this series via my linux tree so it becomes part of the 3.3 series in openwrt (i will include the ase phy patch as is, but we need to see if it works with mdelay) Ok, I'll check it by end of today. Thanks, Conor ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
[OpenWrt-Devel] [PATCH 2/6 v2] lantiq: fix etop for ase internal phy
v2, use mdelay not for loop Lantiq ethernet and builtin phy on amazon se (ase) fix CFG, IGPLEN register addresses add extra CFG settings enable etop - ephy connection reset ephy some delays seemed to help. Signed-off-by: Conor O'Gorman i...@conorogorman.net --- .../patches-3.2/301-fix-etop-for-ase-ephy.patch| 61 1 files changed, 61 insertions(+), 0 deletions(-) create mode 100644 target/linux/lantiq/patches-3.2/301-fix-etop-for-ase-ephy.patch diff --git a/target/linux/lantiq/patches-3.2/301-fix-etop-for-ase-ephy.patch b/target/linux/lantiq/patches-3.2/301-fix-etop-for-ase-ephy.patch new file mode 100644 index 000..ed59d2c --- /dev/null +++ b/target/linux/lantiq/patches-3.2/301-fix-etop-for-ase-ephy.patch @@ -0,0 +1,61 @@ +--- a/drivers/net/ethernet/lantiq_etop.c b/drivers/net/ethernet/lantiq_etop.c +@@ -59,8 +59,8 @@ + #define LTQ_ETOP_ENETS0 0x11850 + #define LTQ_ETOP_MAC_DA0 0x1186C + #define LTQ_ETOP_MAC_DA1 0x11870 +-#define LTQ_ETOP_CFG 0x16020 +-#define LTQ_ETOP_IGPLEN 0x16080 ++#define LTQ_ETOP_CFG 0x11808 ++#define LTQ_ETOP_IGPLEN 0x11820 + + #define MAX_DMA_CHAN 0x8 + #define MAX_DMA_CRC_LEN 0x4 +@@ -73,7 +73,9 @@ + #define ETOP_PLEN_UNDER 0x40 + #define ETOP_CGEN 0x800 + #define ETOP_CFG_MII0 0x01 +- ++#define ETOP_CFG_EPHY 0x4000 ++#define ETOP_CFG_FEN 0x100 ++#define ETOP_CFG_SEN 0x40 + #define LTQ_GBIT_MDIO_CTL 0xCC + #define LTQ_GBIT_MDIO_DATA0xd0 + #define LTQ_GBIT_GCTL00x68 +@@ -148,6 +150,7 @@ struct ltq_etop_priv { + + static int ltq_etop_mdio_wr(struct mii_bus *bus, int phy_addr, + int phy_reg, u16 phy_data); ++static int ltq_etop_mdio_rd(struct mii_bus *bus, int phy_addr, int phy_reg); + + static int + ltq_etop_alloc_skb(struct ltq_etop_chan *ch) +@@ -348,11 +351,25 @@ ltq_etop_hw_init(struct net_device *dev) + + default: + if (ltq_is_ase()) { ++ int i; ++ /* disconnect */ ++ ltq_etop_w32(ETOP_CFG_MII0, LTQ_ETOP_CFG); ++ ++ /* enable clk/pwr to ephy */ + clk_enable(priv-clk_ephy); +- /* disable external MII */ +- ltq_etop_w32_mask(0, ETOP_CFG_MII0, LTQ_ETOP_CFG); +- /* enable clock for internal PHY */ + clk_enable(priv-clk_ephycgu); ++ mdelay(10); ++ ++ /* enable ephy connection, fen and sen, only */ ++ ltq_etop_w32( ++ ETOP_CFG_EPHY | ETOP_CFG_FEN | ETOP_CFG_SEN, ++ LTQ_ETOP_CFG); ++ mdelay(10); ++ ++ /* reset */ ++ ltq_etop_mdio_wr(NULL, 8, 0, 0x80); ++ mdelay(10); ++ + /* we need to write this magic to the internal phy to + make it work */ + ltq_etop_mdio_wr(NULL, 0x8, 0x12, 0xC020); -- 1.7.4.1 ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
[OpenWrt-Devel] [PATCH 3/6 v2] lantiq: fix dwc_otg usb for ase
v2, more explicit with irq changed irq number and pmu settings. some fiddling to get the now variable irq into resources. Signed-off-by: Conor O'Gorman i...@conorogorman.net --- .../patches-3.2/303-fix-dwc-otg-usb-for-ase.patch | 54 1 files changed, 54 insertions(+), 0 deletions(-) create mode 100644 target/linux/lantiq/patches-3.2/303-fix-dwc-otg-usb-for-ase.patch diff --git a/target/linux/lantiq/patches-3.2/303-fix-dwc-otg-usb-for-ase.patch b/target/linux/lantiq/patches-3.2/303-fix-dwc-otg-usb-for-ase.patch new file mode 100644 index 000..8d2ab51 --- /dev/null +++ b/target/linux/lantiq/patches-3.2/303-fix-dwc-otg-usb-for-ase.patch @@ -0,0 +1,54 @@ +--- a/arch/mips/include/asm/mach-lantiq/xway/lantiq_irq.h b/arch/mips/include/asm/mach-lantiq/xway/lantiq_irq.h +@@ -40,6 +40,7 @@ + + #define LTQ_TIMER6_INT(INT_NUM_IM1_IRL0 + 23) + #define LTQ_USB_INT (INT_NUM_IM1_IRL0 + 22) ++#define LTQ_USB_ASE_INT (INT_NUM_IM0_IRL0 + 31) + #define LTQ_USB_OC_INT(INT_NUM_IM4_IRL0 + 23) + + #define MIPS_CPU_TIMER_IRQ7 +--- a/drivers/usb/dwc_otg/dwc_otg_driver.c b/drivers/usb/dwc_otg/dwc_otg_driver.c +@@ -860,6 +860,9 @@ static int __init dwc_otg_init(void) + + printk(KERN_INFO %s: version %s\n, dwc_driver_name, DWC_DRIVER_VERSION); + ++if (ltq_is_ase()) ++dwc_irq = LTQ_USB_ASE_INT; ++ + // ifxmips setup + retval = ifx_usb_hc_init(dwc_iomem_base, dwc_irq); + if (retval 0) +--- a/drivers/usb/dwc_otg/dwc_otg_ifx.c b/drivers/usb/dwc_otg/dwc_otg_ifx.c +@@ -61,7 +61,10 @@ void dwc_otg_power_on (void) + // clear power + writel(readl(DANUBE_PMU_PWDCR) | 0x41, DANUBE_PMU_PWDCR); + // set clock gating +- writel(readl(DANUBE_CGU_IFCCR) | 0x30, DANUBE_CGU_IFCCR); ++ if (ltq_is_ase()) ++ writel(readl(DANUBE_CGU_IFCCR) ~0x20, DANUBE_CGU_IFCCR); ++ else ++ writel(readl(DANUBE_CGU_IFCCR) | 0x30, DANUBE_CGU_IFCCR); + // set power + writel(readl(DANUBE_PMU_PWDCR) ~0x1, DANUBE_PMU_PWDCR); + writel(readl(DANUBE_PMU_PWDCR) ~0x40, DANUBE_PMU_PWDCR); +--- a/arch/mips/lantiq/xway/dev-dwc_otg.c b/arch/mips/lantiq/xway/dev-dwc_otg.c +@@ -43,7 +43,6 @@ static struct resource resources[] = + }, + [1] = { + .name= dwc_otg_irq, +- .start = LTQ_USB_INT, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -63,6 +62,7 @@ int __init + xway_register_dwc(int pin) + { + struct irq_data d; ++ resources[1].start = ltq_is_ase() ? LTQ_USB_ASE_INT : LTQ_USB_INT; + d.irq = resources[1].start; + ltq_enable_irq(d); + platform_dev.dev.platform_data = (void*) pin; -- 1.7.4.1 ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
[OpenWrt-Devel] [PATCH 3/6] lantiq: fix dwc_otg usb for ase
changed irq number and pmu settings. little bit of fiddling to get the now variable irq into resources. Signed-off-by: Conor O'Gorman i...@conorogorman.net --- .../patches-3.2/303-fix-dwc-otg-usb-for-ase.patch | 65 1 files changed, 65 insertions(+), 0 deletions(-) create mode 100644 target/linux/lantiq/patches-3.2/303-fix-dwc-otg-usb-for-ase.patch diff --git a/target/linux/lantiq/patches-3.2/303-fix-dwc-otg-usb-for-ase.patch b/target/linux/lantiq/patches-3.2/303-fix-dwc-otg-usb-for-ase.patch new file mode 100644 index 000..5d146f4 --- /dev/null +++ b/target/linux/lantiq/patches-3.2/303-fix-dwc-otg-usb-for-ase.patch @@ -0,0 +1,65 @@ +--- a/arch/mips/include/asm/mach-lantiq/xway/lantiq_irq.h b/arch/mips/include/asm/mach-lantiq/xway/lantiq_irq.h +@@ -39,7 +39,8 @@ + #define LTQ_MEI_INT (INT_NUM_IM1_IRL0 + 23) + + #define LTQ_TIMER6_INT(INT_NUM_IM1_IRL0 + 23) +-#define LTQ_USB_INT (INT_NUM_IM1_IRL0 + 22) ++#define LTQ_USB_INT ((ltq_is_ase()) ? (INT_NUM_IM0_IRL0 + 31) :\ ++(INT_NUM_IM1_IRL0 + 22)) + #define LTQ_USB_OC_INT(INT_NUM_IM4_IRL0 + 23) + + #define MIPS_CPU_TIMER_IRQ7 +--- a/drivers/usb/dwc_otg/dwc_otg_driver.c b/drivers/usb/dwc_otg/dwc_otg_driver.c +@@ -80,7 +80,7 @@ + const char dwc_driver_name[] = dwc_otg; + + static unsigned long dwc_iomem_base = IFX_USB_IOMEM_BASE; +-int dwc_irq = LTQ_USB_INT; ++int dwc_irq = -1; + //int dwc_irq = 54; + //int dwc_irq = IFXMIPS_USB_OC_INT; + +@@ -860,6 +860,9 @@ static int __init dwc_otg_init(void) + + printk(KERN_INFO %s: version %s\n, dwc_driver_name, DWC_DRIVER_VERSION); + ++if (dwc_irq == -1) ++dwc_irq = LTQ_USB_INT; ++ + // ifxmips setup + retval = ifx_usb_hc_init(dwc_iomem_base, dwc_irq); + if (retval 0) +--- a/drivers/usb/dwc_otg/dwc_otg_ifx.c b/drivers/usb/dwc_otg/dwc_otg_ifx.c +@@ -61,7 +61,10 @@ void dwc_otg_power_on (void) + // clear power + writel(readl(DANUBE_PMU_PWDCR) | 0x41, DANUBE_PMU_PWDCR); + // set clock gating +- writel(readl(DANUBE_CGU_IFCCR) | 0x30, DANUBE_CGU_IFCCR); ++ if (ltq_is_ase()) ++ writel(readl(DANUBE_CGU_IFCCR) ~0x20, DANUBE_CGU_IFCCR); ++ else ++ writel(readl(DANUBE_CGU_IFCCR) | 0x30, DANUBE_CGU_IFCCR); + // set power + writel(readl(DANUBE_PMU_PWDCR) ~0x1, DANUBE_PMU_PWDCR); + writel(readl(DANUBE_PMU_PWDCR) ~0x40, DANUBE_PMU_PWDCR); +--- a/arch/mips/lantiq/xway/dev-dwc_otg.c b/arch/mips/lantiq/xway/dev-dwc_otg.c +@@ -43,7 +43,6 @@ static struct resource resources[] = + }, + [1] = { + .name= dwc_otg_irq, +- .start = LTQ_USB_INT, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -63,6 +62,7 @@ int __init + xway_register_dwc(int pin) + { + struct irq_data d; ++ resources[1].start = LTQ_USB_INT; + d.irq = resources[1].start; + ltq_enable_irq(d); + platform_dev.dev.platform_data = (void*) pin; -- 1.7.4.1 ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
[OpenWrt-Devel] [PATCH 5/6] lantiq: fix spi for ase, update for clkdev and platform driver
irqs, gpios, chipselects updated to use module_platform_driver() clkdev is a bit hacky, using ltq_spi.0, as specifying no device numbering led to the mtd driver not hooking up to an spi flash. Signed-off-by: Conor O'Gorman i...@conorogorman.net --- .../lantiq/patches-3.2/302-fix-spi-for-ase.patch | 205 1 files changed, 205 insertions(+), 0 deletions(-) create mode 100644 target/linux/lantiq/patches-3.2/302-fix-spi-for-ase.patch diff --git a/target/linux/lantiq/patches-3.2/302-fix-spi-for-ase.patch b/target/linux/lantiq/patches-3.2/302-fix-spi-for-ase.patch new file mode 100644 index 000..052b596 --- /dev/null +++ b/target/linux/lantiq/patches-3.2/302-fix-spi-for-ase.patch @@ -0,0 +1,205 @@ +--- a/arch/mips/include/asm/mach-lantiq/xway/lantiq_irq.h b/arch/mips/include/asm/mach-lantiq/xway/lantiq_irq.h +@@ -30,6 +30,10 @@ + #define LTQ_SSC_TIR_AR9 (INT_NUM_IM0_IRL0 + 14) + #define LTQ_SSC_RIR_AR9 (INT_NUM_IM0_IRL0 + 15) + #define LTQ_SSC_EIR (INT_NUM_IM0_IRL0 + 16) ++#define LTQ_SSC_RIR_ASE (INT_NUM_IM0_IRL0 + 16) ++#define LTQ_SSC_TIR_ASE (INT_NUM_IM0_IRL0 + 17) ++#define LTQ_SSC_EIR_ASE (INT_NUM_IM0_IRL0 + 18) ++#define LTQ_SSC_FIR_ASE (INT_NUM_IM0_IRL0 + 19) + + #define LTQ_MEI_DYING_GASP_INT(INT_NUM_IM1_IRL0 + 21) + #define LTQ_MEI_INT (INT_NUM_IM1_IRL0 + 23) +--- a/arch/mips/lantiq/xway/devices.c b/arch/mips/lantiq/xway/devices.c +@@ -186,8 +186,19 @@ static struct resource ltq_spi_resources + IRQ_RES(spi_err, LTQ_SSC_EIR), + }; + ++static struct resource ltq_spi_resources_ase[] = { ++ { ++ .start = LTQ_SSC_BASE_ADDR, ++ .end= LTQ_SSC_BASE_ADDR + LTQ_SSC_SIZE - 1, ++ .flags = IORESOURCE_MEM, ++ }, ++ IRQ_RES(spi_tx, LTQ_SSC_TIR_ASE), ++ IRQ_RES(spi_rx, LTQ_SSC_RIR_ASE), ++ IRQ_RES(spi_err, LTQ_SSC_EIR_ASE), ++}; ++ + static struct platform_device ltq_spi = { +- .name = ltq-spi, ++ .name = ltq_spi, + .resource = ltq_spi_resources, + .num_resources = ARRAY_SIZE(ltq_spi_resources), + }; +@@ -195,8 +206,10 @@ static struct platform_device ltq_spi = + void __init ltq_register_spi(struct ltq_spi_platform_data *pdata, + struct spi_board_info const *info, unsigned n) + { +- if(ltq_is_ar9()) ++ if (ltq_is_ar9()) + ltq_spi.resource = ltq_spi_resources_ar9; ++ else if (ltq_is_ase()) ++ ltq_spi.resource = ltq_spi_resources_ase; + spi_register_board_info(info, n); + ltq_spi.dev.platform_data = pdata; + platform_device_register(ltq_spi); +--- a/drivers/spi/spi-xway.c b/drivers/spi/spi-xway.c +@@ -143,9 +143,9 @@ + #define LTQ_SPI_IRNEN_ALL 0xF + + /* Hard-wired GPIOs used by SPI controller */ +-#define LTQ_SPI_GPIO_DI 16 +-#define LTQ_SPI_GPIO_DO 17 +-#define LTQ_SPI_GPIO_CLK 18 ++#define LTQ_SPI_GPIO_DI (ltq_is_ase()? 8 : 16) ++#define LTQ_SPI_GPIO_DO (ltq_is_ase()? 9 : 17) ++#define LTQ_SPI_GPIO_CLK (ltq_is_ase()? 10 : 18) + + struct ltq_spi { + struct spi_bitbang bitbang; +@@ -229,7 +229,7 @@ static void ltq_spi_hw_enable(struct ltq + u32 clc; + + /* Power-up mdule */ +-clk_enable(hw-spiclk); ++ clk_enable(hw-spiclk); + + /* +* Set clock divider for run mode to 1 to +@@ -245,7 +245,7 @@ static void ltq_spi_hw_disable(struct lt + ltq_spi_reg_write(hw, LTQ_SPI_CLC_DISS, LTQ_SPI_CLC); + + /* Power-down mdule */ +-clk_disable(hw-spiclk); ++ clk_disable(hw-spiclk); + } + + static void ltq_spi_reset_fifos(struct ltq_spi *hw) +@@ -284,7 +284,7 @@ static inline int ltq_spi_wait_ready(str + cond_resched(); + } while (!time_after_eq(jiffies, timeout)); + +- dev_err(hw-dev, SPI wait ready timed out\n); ++ dev_err(hw-dev, SPI wait ready timed out stat: %x\n, stat); + + return -ETIMEDOUT; + } +@@ -556,6 +556,12 @@ static const struct ltq_spi_cs_gpio_map + { 11, 3 }, + }; + ++static const struct ltq_spi_cs_gpio_map ltq_spi_cs_ase[] = { ++ { 7, 2 }, ++ { 15, 1 }, ++ { 14, 1 }, ++}; ++ + static int ltq_spi_setup(struct spi_device *spi) + { + struct ltq_spi *hw = ltq_spi_to_hw(spi); +@@ -600,8 +606,10 @@ static int ltq_spi_setup(struct spi_devi + cstate-cs_activate = ltq_spi_gpio_cs_activate; + cstate-cs_deactivate = ltq_spi_gpio_cs_deactivate; + } else { +- ret = ltq_gpio_request(spi-dev, ltq_spi_cs[spi-chip_select].gpio, +- ltq_spi_cs[spi-chip_select].mux, ++ struct ltq_spi_cs_gpio_map *cs_map = ++ ltq_is_ase() ? ltq_spi_cs_ase : ltq_spi_cs; ++ ret = ltq_gpio_request(spi-dev, cs_map[spi-chip_select].gpio, ++ cs_map[spi
[OpenWrt-Devel] [PATCH 2/6] lantiq: fix etop for ase internal phy
Lantiq ethernet and builtin phy on amazon se (ase) fix CFG, IGPLEN register addresses add extra CFG settings enable etop - ephy connection reset ephy some delays seemed to help. Signed-off-by: Conor O'Gorman i...@conorogorman.net --- .../patches-3.2/301-fix-etop-for-ase-ephy.patch| 61 1 files changed, 61 insertions(+), 0 deletions(-) create mode 100644 target/linux/lantiq/patches-3.2/301-fix-etop-for-ase-ephy.patch diff --git a/target/linux/lantiq/patches-3.2/301-fix-etop-for-ase-ephy.patch b/target/linux/lantiq/patches-3.2/301-fix-etop-for-ase-ephy.patch new file mode 100644 index 000..00830eb --- /dev/null +++ b/target/linux/lantiq/patches-3.2/301-fix-etop-for-ase-ephy.patch @@ -0,0 +1,61 @@ +--- a/drivers/net/ethernet/lantiq_etop.c b/drivers/net/ethernet/lantiq_etop.c +@@ -59,8 +59,8 @@ + #define LTQ_ETOP_ENETS0 0x11850 + #define LTQ_ETOP_MAC_DA0 0x1186C + #define LTQ_ETOP_MAC_DA1 0x11870 +-#define LTQ_ETOP_CFG 0x16020 +-#define LTQ_ETOP_IGPLEN 0x16080 ++#define LTQ_ETOP_CFG 0x11808 ++#define LTQ_ETOP_IGPLEN 0x11820 + + #define MAX_DMA_CHAN 0x8 + #define MAX_DMA_CRC_LEN 0x4 +@@ -73,7 +73,9 @@ + #define ETOP_PLEN_UNDER 0x40 + #define ETOP_CGEN 0x800 + #define ETOP_CFG_MII0 0x01 +- ++#define ETOP_CFG_EPHY 0x4000 ++#define ETOP_CFG_FEN 0x100 ++#define ETOP_CFG_SEN 0x40 + #define LTQ_GBIT_MDIO_CTL 0xCC + #define LTQ_GBIT_MDIO_DATA0xd0 + #define LTQ_GBIT_GCTL00x68 +@@ -148,6 +150,7 @@ struct ltq_etop_priv { + + static int ltq_etop_mdio_wr(struct mii_bus *bus, int phy_addr, + int phy_reg, u16 phy_data); ++static int ltq_etop_mdio_rd(struct mii_bus *bus, int phy_addr, int phy_reg); + + static int + ltq_etop_alloc_skb(struct ltq_etop_chan *ch) +@@ -348,11 +351,25 @@ ltq_etop_hw_init(struct net_device *dev) + + default: + if (ltq_is_ase()) { ++ int i; ++ /* disconnect */ ++ ltq_etop_w32(ETOP_CFG_MII0, LTQ_ETOP_CFG); ++ ++ /* enable clk/pwr to ephy */ + clk_enable(priv-clk_ephy); +- /* disable external MII */ +- ltq_etop_w32_mask(0, ETOP_CFG_MII0, LTQ_ETOP_CFG); +- /* enable clock for internal PHY */ + clk_enable(priv-clk_ephycgu); ++ for (i = 0; i 0x5; i++); ++ ++ /* enable ephy connection, fen and sen, only */ ++ ltq_etop_w32( ++ ETOP_CFG_EPHY | ETOP_CFG_FEN | ETOP_CFG_SEN, ++ LTQ_ETOP_CFG); ++ for (i = 0; i 0x5; i++); ++ ++ /* reset */ ++ ltq_etop_mdio_wr(NULL, 8, 0, 0x80); ++ for (i = 0; i 0x5; i++); ++ + /* we need to write this magic to the internal phy to + make it work */ + ltq_etop_mdio_wr(NULL, 0x8, 0x12, 0xC020); -- 1.7.4.1 ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
[OpenWrt-Devel] [PATCH 6/6] lantiq: fix spi-xway wait ready timed out
Seen on ase platform. Fifos should be flushed if there is data, otherwise it hangs. Root cause was then seen to be rx overflow, so reduced max rxreq. Fifos on ase are smaller and perhaps are the cause, so it's open to review whether this should be specific to ase or all xway. Signed-off-by: Conor O'Gorman i...@conorogorman.net --- .../304-fix-spi-xway-wait-ready-timed-out.patch| 51 1 files changed, 51 insertions(+), 0 deletions(-) create mode 100644 target/linux/lantiq/patches-3.2/304-fix-spi-xway-wait-ready-timed-out.patch diff --git a/target/linux/lantiq/patches-3.2/304-fix-spi-xway-wait-ready-timed-out.patch b/target/linux/lantiq/patches-3.2/304-fix-spi-xway-wait-ready-timed-out.patch new file mode 100644 index 000..2fc4b9b --- /dev/null +++ b/target/linux/lantiq/patches-3.2/304-fix-spi-xway-wait-ready-timed-out.patch @@ -0,0 +1,51 @@ +--- a/drivers/spi/spi-xway.c b/drivers/spi/spi-xway.c +@@ -272,6 +272,7 @@ static void ltq_spi_reset_fifos(struct l + static inline int ltq_spi_wait_ready(struct ltq_spi *hw) + { + u32 stat; ++ u32 fill; + unsigned long timeout; + + timeout = jiffies + msecs_to_jiffies(200); +@@ -281,10 +282,16 @@ static inline int ltq_spi_wait_ready(str + if (!(stat LTQ_SPI_STAT_BSY)) + return 0; + ++ fill = ltq_spi_reg_read(hw, LTQ_SPI_FSTAT); ++ if (fill) { ++ /* help it along with a flush */ ++ ltq_spi_reg_setbit(hw, LTQ_SPI_RXFCON_RXFLU, LTQ_SPI_RXFCON); ++ ltq_spi_reg_setbit(hw, LTQ_SPI_TXFCON_TXFLU, LTQ_SPI_TXFCON); ++ } + cond_resched(); + } while (!time_after_eq(jiffies, timeout)); + +- dev_err(hw-dev, SPI wait ready timed out stat: %x\n, stat); ++ dev_err(hw-dev, SPI wait ready timed out %x\n, stat); + + return -ETIMEDOUT; + } +@@ -729,11 +736,11 @@ static void ltq_spi_rxreq_set(struct ltq +* In RX-only mode the serial clock is activated only after writing +* the expected amount of RX bytes into RXREQ register. +* To avoid receive overflows at high clocks it is better to request +- * only the amount of bytes that fits into all FIFOs. This value ++ * less than the amount of bytes that fits into all FIFOs. This value +* depends on the FIFO size implemented in hardware. +*/ + rxreq = hw-len - hw-rx_cnt; +- rxreq_max = hw-rxfs 2; ++ rxreq_max = (hw-rxfs-1) 2; + rxreq = min(rxreq_max, rxreq); + + if (!rxtodo rxreq) +@@ -805,6 +812,8 @@ irqreturn_t ltq_spi_err_irq(int irq, voi + /* Disable all interrupts */ + ltq_spi_reg_clearbit(hw, LTQ_SPI_IRNEN_ALL, LTQ_SPI_IRNEN); + ++ dev_err(hw-dev, error %x\n, ltq_spi_reg_read(hw, LTQ_SPI_STAT)); ++ + /* Clear all error flags */ + ltq_spi_reg_write(hw, LTQ_SPI_WHBSTATE_CLR_ERRORS, LTQ_SPI_WHBSTATE); + -- 1.7.4.1 ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
[OpenWrt-Devel] [PATCH 1/6] lantiq: stp, fix for ase, add get, clock disabled
Lantiq serial-to-parallel hardware gpio module Added gpio pins as used for amazon se (ase) Added get to enable reporting of gpio status Changed to use software update, as hw clock was not running on ase. Clock really only needed if hw flashing was implemented. Signed-off-by: Conor O'Gorman i...@conorogorman.net --- .../lantiq/patches-3.2/300-fix-stp-for-ase.patch | 66 1 files changed, 66 insertions(+), 0 deletions(-) create mode 100644 target/linux/lantiq/patches-3.2/300-fix-stp-for-ase.patch diff --git a/target/linux/lantiq/patches-3.2/300-fix-stp-for-ase.patch b/target/linux/lantiq/patches-3.2/300-fix-stp-for-ase.patch new file mode 100644 index 000..42be5c8 --- /dev/null +++ b/target/linux/lantiq/patches-3.2/300-fix-stp-for-ase.patch @@ -0,0 +1,66 @@ +--- a/arch/mips/lantiq/xway/gpio_stp.c b/arch/mips/lantiq/xway/gpio_stp.c +@@ -27,6 +27,7 @@ + #define LTQ_STP_AR0x10 + + #define LTQ_STP_CON_SWU (1 31) ++#define LTQ_STP_SWU_MASK (1 31) + #define LTQ_STP_2HZ 0 + #define LTQ_STP_4HZ (1 23) + #define LTQ_STP_8HZ (2 23) +@@ -60,6 +61,12 @@ static void ltq_stp_set(struct gpio_chip + else + ltq_stp_shadow = ~(1 offset); + ltq_stp_w32(ltq_stp_shadow, LTQ_STP_CPU0); ++ ltq_stp_w32_mask(LTQ_STP_SWU_MASK, LTQ_STP_CON_SWU, LTQ_STP_CON0); ++} ++ ++static int ltq_stp_get(struct gpio_chip *chip, unsigned offset) ++{ ++ return !!(ltq_stp_r32(LTQ_STP_CPU0) (1offset)); + } + + static int ltq_stp_direction_output(struct gpio_chip *chip, unsigned offset, +@@ -74,6 +81,7 @@ static struct gpio_chip ltq_stp_chip = { + .label = ltq_stp, + .direction_output = ltq_stp_direction_output, + .set = ltq_stp_set, ++ .get = ltq_stp_get, + .base = 200, + .ngpio = 24, + .owner = THIS_MODULE, +@@ -97,12 +105,6 @@ static int ltq_stp_hw_init(struct device + ltq_stp_w32_mask(0, LTQ_STP_GROUP0 | LTQ_STP_GROUP1 | LTQ_STP_GROUP2, + LTQ_STP_CON1); + +- /* stp are update periodically by the FPI bus */ +- ltq_stp_w32_mask(LTQ_STP_UPD_MASK, LTQ_STP_UPD_FPI, LTQ_STP_CON1); +- +- /* set stp update speed */ +- ltq_stp_w32_mask(LTQ_STP_SPEED_MASK, LTQ_STP_8HZ, LTQ_STP_CON1); +- + /* tell the hardware that pin (led) 0 and 1 are controlled +* by the dsl arc +*/ +@@ -118,6 +120,7 @@ static int __devinit ltq_stp_probe(struc + { + struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + int ret = 0; ++ int pin; + + if (!res) + return -ENOENT; +@@ -135,9 +138,10 @@ static int __devinit ltq_stp_probe(struc + } + + /* the 3 pins used to control the external stp */ +- if (ltq_gpio_request(pdev-dev, 4, 2, 1, stp-st) || +- ltq_gpio_request(pdev-dev, 5, 2, 1, stp-d) || +- ltq_gpio_request(pdev-dev, 6, 2, 1, stp-sh)) { ++ pin = ltq_is_ase() ? 1 : 4; ++ if (ltq_gpio_request(pdev-dev, pin, 2, 1, stp-st) || ++ ltq_gpio_request(pdev-dev, pin+1, 2, 1, stp-d) || ++ ltq_gpio_request(pdev-dev, pin+2, 2, 1, stp-sh)) { + dev_err(pdev-dev, failed to request needed gpios\n); + return -EBUSY; + } -- 1.7.4.1 ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
[OpenWrt-Devel] [PATCH 4/6] lantiq: fix owrt mtd split build error when not enabled
Signed-off-by: Conor O'Gorman i...@conorogorman.net --- .../patches-3.2/306-fix-owrt-mtd-split.patch | 11 +++ 1 files changed, 11 insertions(+), 0 deletions(-) create mode 100644 target/linux/lantiq/patches-3.2/306-fix-owrt-mtd-split.patch diff --git a/target/linux/lantiq/patches-3.2/306-fix-owrt-mtd-split.patch b/target/linux/lantiq/patches-3.2/306-fix-owrt-mtd-split.patch new file mode 100644 index 000..c000274 --- /dev/null +++ b/target/linux/lantiq/patches-3.2/306-fix-owrt-mtd-split.patch @@ -0,0 +1,11 @@ +--- a/drivers/mtd/mtdpart.c b/drivers/mtd/mtdpart.c +@@ -1053,7 +1053,7 @@ int add_mtd_partitions(struct mtd_info * + struct mtd_part *slave; + uint64_t cur_offset = 0; + int i; +-#ifdef CONFIG_MTD_ROOTFS_SPLIT ++#if defined(CONFIG_MTD_ROOTFS_SPLIT) || defined(CONFIG_MTD_UIMAGE_SPLIT) + int ret; + #endif + -- 1.7.4.1 ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] [PATCH 3/6] lantiq: fix dwc_otg usb for ase
On Fri, 2012-04-06 at 15:35 +0200, John Crispin wrote: thx for all the patches On 06/04/12 14:37, Conor O'Gorman wrote: +--- a/arch/mips/lantiq/xway/dev-dwc_otg.c b/arch/mips/lantiq/xway/dev-dwc_otg.c +@@ -43,7 +43,6 @@ static struct resource resources[] = + }, + [1] = { + .name= dwc_otg_irq, +- .start = LTQ_USB_INT, + .flags = IORESOURCE_IRQ, + }, + }; +@@ -63,6 +62,7 @@ int __init + xway_register_dwc(int pin) + { + struct irq_data d; ++ resources[1].start = LTQ_USB_INT; + d.irq = resources[1].start; + ltq_enable_irq(d); + platform_dev.dev.platform_data = (void*) pin; is there a technical reason for this bit that i fail to understand or is it more a style preference fixup ? I copied the style of the other drivers in the first instance, but a compile error happens, as we are trying to initialise a struct with a variable that only resolves at runtime (ltq_is_ase()) #define LTQ_USB_INT ((ltq_is_ase()) ? (INT_NUM_IM0_IRL0 + 31) :\ (INT_NUM_IM1_IRL0 + 22)) I think it's reasonable to have runtime behaviour, as the same code could run on either platform. An option would be to have the irq number passed as a platform-data-type thing. Conor ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] [PATCH 2/6] lantiq: fix etop for ase internal phy
On Fri, 2012-04-06 at 16:12 +0200, John Crispin wrote: On 06/04/12 14:37, Conor O'Gorman wrote: ltq_etop_w32_mask(0, ETOP_CFG_MII0, LTQ_ETOP_CFG); +- /* enable clock for internal PHY */ + clk_enable(priv-clk_ephycgu); ++ for (i = 0; i 0x5; i++); ++ ++ /* enable ephy connection, fen and sen, only */ ++ ltq_etop_w32( ++ ETOP_CFG_EPHY | ETOP_CFG_FEN | ETOP_CFG_SEN, ++ LTQ_ETOP_CFG); ++ for (i = 0; i 0x5; i++); Hi, assuming a loop needs 8 op codes and you are running at 333mhz we get roughly 8 miliseconds can you try with a mdelay(5 or 10) ? I'll retest when I get a chance, it was a bit rushed. This works, but may be excessive. Conor ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] [PATCH v2] upgrade and improve uboot-envtools
On Fri, 2012-02-17 at 00:50 +0100, Luka Perkov wrote: This patch makes several changes with uboot-envtools package: * bumps to version 2011.12 * adds md5sum * creates a menu so it will look better in 'make menuconfig' * adds /etc/fw_env.config to conffile * refresh patches * removes init script because we should be using uci-defaults instead -board=$(lantiq_board_name) - -case $board in -GIGASX76X) - uboot_environment_configuration /dev/mtd1 0x0 0x1 0x1 1 - ;; Why not go for a more general mechanism, you will have a lot of board specific options here. Is there a convention (or majority) for naming the env partition? such as 'uboot_env': root@OpenWrt:/# cat /proc/mtd dev:size erasesize name mtd0: 0001 0001 uboot mtd1: 003e 0001 spare mtd2: 0001 0001 uboot_env mtd3: 00c0 0001 linux mtd4: 00105026 0001 kernel mtd5: 00afafda 0001 rootfs mtd6: 0099 0001 rootfs_data Conor ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] LANTIQ- EASY5072- UART0 problem
On Thu, 2012-03-22 at 18:44 +0100, John Crispin wrote: On 22/03/12 17:48, Spyridon Tompros wrote: As a workaround We've tried to implement another USB port by using an external Vinculum VNC1L Chip. It works connected to a serial port. The problem we encounter now is that the UART0 port of the Danube seems dead We discovered that even if we write the respective register (MCON), it remains incactive. Moreover we've tried to include the UART0 as console from the make menuconfig util and the result was the same. Has anybody activated the second serial port of Danube? Hi, It has worked in the past, but i have not tried it in a while, i have a twinpass baord with 2 serial ports and will add this on my todo list for tomorrow Might be a problem in (not) setting the PMU_PWDSR (Power Down Register). UART0 appears to default to off. Might be some CGU actions needed also. Conor ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] lantiq: usb_support flag in .config and amazon se
On Fri, 2012-03-23 at 07:23 +0100, John Crispin wrote: On 22/03/12 21:52, Conor O'Gorman wrote: On Thu, 2012-03-22 at 21:39 +0100, Luca Olivetti wrote: Al 22/03/12 21:08, En/na Conor O'Gorman ha escrit: Dear Wise People, How do I get USB_SUPPORT config symbol into tmp/.config-target.in for amazon ala danube? I've gone through the files in target/lantiq and I just cannot see how to make amazon se (ase) support usb, and enable the USB support menu. I don't know if that's enough, but CONFIG_USB_SUPPORT is defined in danube/config-default, so you could try to put in in ase/config-default. Bye I have explored that path, without result. I especially noted a recent comment on the mailing list mentioning kernel_menuconfig as the correct way to adjust. I also hand-modded them. I may try it again. Try make kernel_menuconfig CONFIG_TARGET=subtarget. CONFIG_TARGET allows you to select which config you want to edit. possible options: target, subtarget, env. USB_ARCH_HAS_HCD seems to play a role, but it's behaviour is also confusing me. Conor after making changes to target/linux/lantiq/* make sure to rm -rf tmp/. also i am about to push an update for 3.2 kernel http://dev.phrozen.org/gitweb/?p=openwrt.git;a=shortlog;h=refs/heads/owrt-3.2 i will make sure ase usb works in the patch series. this patch series also changes from dwc_otg - ifxhcd, which is a new usb driver from lantiq. Great! I'll pull that code a bit later today and test. I did kill the tmp dir, but I'll try again in a more patient manner. Thanks, Conor ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] lantiq: usb_support flag in .config and amazon se
On Fri, 2012-03-23 at 11:29 +0100, John Crispin wrote: Do you want to get HOST or DEVICE working ? Host. ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] lantiq: usb_support flag in .config and amazon se
On Fri, 2012-03-23 at 15:09 +0100, John Crispin wrote: On 23/03/12 15:06, John Crispin wrote: found the bug http://dev.phrozen.org/gitweb/?p=openwrt.git;a=blob;f=target/linux/lantiq/patches-3.2/0068-MIPS-lantiq-adds-USB_ARCH_HAS_HCD-to-CONFIG_LANTIQ.patch;h=b9d3caee16e5b362a27ce35f1dd9b36db0a81b18;hb=2593b9a15f468af059b515646adf2c18483992cb git://dev.phrozen.org/openwrt.git (owrt-3.2 branch) John also please note, we will be switching to the ifxhcd usb driver... i have so far only tested it on ar9/vr9 Thank you! I'll be giving it a spin on ase and danube. Conor ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] LANTIQ- EASY5072- UART0 problem
On Fri, 2012-03-23 at 15:41 +0100, Spyridon Tompros wrote: Hi, We tested the code on our board. Now the USB host controller functionality works almost perfect, with some losses at very high rates (921600), while it does not crash any more nor with use-to-serial USB or other media devices. Thanks a lot, Spyros Good to hear, I spent a couple of days tracing the behaviour, and was happy to find it to be a one line fix. That in-appropriate halt_channel() call was causing cross-connecting references as I recall. I also still see some errors, but it seems to recover from them. I assumed they are due to random glitches/errors on the hardware lines. Conor ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] LANTIQ- EASY5072- UART0 problem
On Fri, 2012-03-23 at 17:24 +0100, Spyridon Tompros wrote: Some additional info: Do you have a proprietary board or an EASY50712 evaluation board? We have both and on the EASY board we do not see any errors any more. On the proprietary board we encounter some at high rates, that's why I believe it is a matter of traces routing. Eventually the USB I/F is the most high bit rate of all, therefore routing of its differential signals must be done very carefully. Proprietary board also. If you build the driver in debug mode I think it reports these error stats. The error reported for us, is Transaction Error (XactErr). Of all the errors this looks like a bit/data/crc type error. I intended to do an eye-diagram test, but it hasn't been done yet. As you say, high speed usb is the highest speed signal. I did turn on the option to operate at 12 Mbps. But after the fix, I didn't see much difference, and we need the higher speed for newest 3G modems. Conor ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
[OpenWrt-Devel] lantiq: usb_support flag in .config and amazon se
Dear Wise People, How do I get USB_SUPPORT config symbol into tmp/.config-target.in for amazon ala danube? I've gone through the files in target/lantiq and I just cannot see how to make amazon se (ase) support usb, and enable the USB support menu. I see that the crucial piece ends up in tmp/.config-target.in, but I cannot find the source. config TARGET_lantiq_danube bool Danube select LINUX_2_6 select LINUX_2_6_32 depends TARGET_lantiq select mips select GPIO_SUPPORT select USES_JFFS2 select PCI_SUPPORT select USES_SQUASHFS select USB_SUPPORT help Lantiq Danube/Twinpass config TARGET_lantiq_ase bool Amazon-SE select LINUX_2_6 select LINUX_2_6_32 depends TARGET_lantiq select mips select GPIO_SUPPORT select USES_JFFS2 select USES_SQUASHFS help Lantiq ASE Thanks for your assistance, Conor ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] lantiq: usb_support flag in .config and amazon se
On Thu, 2012-03-22 at 21:39 +0100, Luca Olivetti wrote: Al 22/03/12 21:08, En/na Conor O'Gorman ha escrit: Dear Wise People, How do I get USB_SUPPORT config symbol into tmp/.config-target.in for amazon ala danube? I've gone through the files in target/lantiq and I just cannot see how to make amazon se (ase) support usb, and enable the USB support menu. I don't know if that's enough, but CONFIG_USB_SUPPORT is defined in danube/config-default, so you could try to put in in ase/config-default. Bye I have explored that path, without result. I especially noted a recent comment on the mailing list mentioning kernel_menuconfig as the correct way to adjust. I also hand-modded them. I may try it again. Try make kernel_menuconfig CONFIG_TARGET=subtarget. CONFIG_TARGET allows you to select which config you want to edit. possible options: target, subtarget, env. USB_ARCH_HAS_HCD seems to play a role, but it's behaviour is also confusing me. Conor ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] patch to enable building of uuencode applet for busybox
On Sun, 2012-03-18 at 19:57 -0400, i iordanov wrote: Hi Philip, On Sun, Mar 18, 2012 at 5:46 PM, Philip Prindeville philipp_s...@redfish-solutions.com wrote: Why is voicemail encoding using uuencode and not base64??? Well, it can be either. I use uuencode with the -m option which makes it output base64 encoding: -m, --base64use base64 encoding as of RFC1521 If you prefer base64 instead of uuencode, I could alter the script which crafts the email with the voicemail attachment to use base64 and provide a patch to enable the base64 applet to be built by default instead of uuencode. Please advise. If you are willing to adjust the script, can I suggest you convert it to lua. It's not a very large script and you can then use the nixio.bin.b64encode() function. Also you can tidy up the uci access using the lua uci library. http://luci.subsignal.org/api/nixio/modules/nixio.bin.html I thought that the uuencode option on busybox was not exposed, but it is a config variable. There should be some suitable syntax you can use in your package makefile to enable it? I am only familiar with the dependency option, but that is for a whole package. Conor ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] patch to enable building of uuencode applet for busybox
On Mon, 2012-03-19 at 10:19 +, Conor O'Gorman wrote: I thought that the uuencode option on busybox was not exposed, but it is a config variable. There should be some suitable syntax you can use in your package makefile to enable it? I am only familiar with the dependency option, but that is for a whole package. That is, of course, no use if you want your package to be installed onto an existing system. Sorry. Conor ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] Driver(s) for Synopsys' DesignWare USB OTG
I would suggest gathering all the available versions into a repository. Not merged, just gathered together, organised by version and source. That would be a step towards comparing versions, and also gaining the attention of the relevant people. So this would be a possible the directory structure: 2.40a - octeon 2.60a - ppp4xx 1.05 - ipmate 2.70 2.72a - dd-wrt - fonosfera Those versions found with a google for define DWC_DRIVER_VERSION This discussion is one of the more extensive I have seen. And the people involved appear to have experience with the driver: http://patchwork.ozlabs.org/patch/57332/ Conor On Fri, 2012-01-20 at 13:01 +0400, Alexander Gordeev wrote: Hi Nikolai, В Thu, 19 Jan 2012 22:39:54 +0400 Nikolai Zhubr n-a-zh...@yandex.ru пишет: ... Anyway, it would be nice to eventually combine all those various versions floating around (targeted for different architectures and revisions of controller) into a single unified version. IMO a separate repository (or adoption into staging) would be better because there are too many interested parties and also the main dwc-otg development happens not in openwrt. ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] Backfire (toolchain) debug advice needed: firmware built with Ubuntu 11.10 crashes, but works if built with 11.04
We had some build problems on different platforms recently. This seemed to resolve them: gcc pr 41818 build errors where the host and target libraries get mixed up, during bootstrap see http://gcc.gnu.org/bugzilla/show_bug.cgi?id=41818 Conor On Wed, 2012-01-11 at 00:21 +0200, Roman Yeryomin wrote: On 29 December 2011 10:32, crow c...@linux.org.ba wrote: I am also facing these image compile error on Archlinux [1]. Also there is on Archlinux topic discussion [2] about same issue. Can someone help us. I've heard from archlinux users with gcc 4.6.2 that they have problems but don't know if they resolved them. So, probably, there is an issue with gcc 4.6.2. Regards, Roman ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
[OpenWrt-Devel] ar71xx possible bricking with latest trunk and snapshots
Hi, I just want to draw attention to a problem with the current trunk and snapshot. I have a wr703n and it's not responding on ethernet normally or with failsafe mode. A number of other people have reported the same problem, see tickets and forum. It may be related to changeset 29103, and 29102, where the ethernet setup was tidied. Thanks, Conor ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] [PATCH] replace CONFIG_PREEMPT_NONE with CONFIG_PREEMPT
On Mon, 2011-09-05 at 13:25 +, Michael Büsch wrote: On Sun, 4 Sep 2011 22:44:08 +0200 Luka Perkov open...@lukaperkov.net wrote: Unhandled kernel unaligned access[#1]: Cpu 0 $ 0 : 0006 0011 $ 4 : d5bf9da3 80dbb548 0006 c010 $ 8 : c578 6e617332 6e617332 $12 : $16 : 6fbb5ff7 80d05618 8028fab0 $20 : 8028fa28 80cba248 8028fabc 8028fabe $24 : 80d85a50 $28 : 8028e000 8028f9f0 81043d14 80cb8708 Hi: 0235 Lo: 02922c00 epc : 80cb8968 nf_nat_setup_info+0x2e0/0x6e8 [nf_nat] Tainted: P ra: 80cb8708 nf_nat_setup_info+0x80/0x6e8 [nf_nat] Status: 1100fc03KERNEL EXL IE Cause : 00800010 BadVA : 6fbb600f PrId : 00019641 (MIPS 24Kc) Modules linked in: gpio_keys_polled dwc_otg ath_pci ath_hal(P) lantiq_atm drv_dsl_cpe_api lantiq_mei ipt_MASQUERADE iptable_nat nf_nat xt_conntrack xt_NOTRACK iptable_raw xt_state nf_conntrack_ipv4 nf_defrag_ipv4 nf_conntrack pppoe pppox ipt_REJECT xt_TCPMSS ipt_LOG xt_comment xt_multiport xt_mac xt_limit iptable_mangle iptable_filter ip_tables xt_tcpudp x_tables ppp_async ppp_generic slhc br2684 atm drv_vmmc usbcore drv_tapi crc_ccitt drv_ifxos arc4 aes_generic crypto_algapi thanks. I am still wondering how enabling preempt could possibly workaround/hide an alignment bug. sounds strange to me. Does somebody have an idea? I didn't look too closely at the function yet, though. This is on the Lantiq danube/xway platform, which has a second mips processor and a packet accelerator. Both of these units run proprietary code accessing main memory as they see fit. Also the Atheros binary hal is in there. The test running is a heavy stress test of the netfilter code. It's spending most of it's time in there. I would not be surprised if one of the other elements in the picture is doing something bad, ie. not the netfilter code itself. The preemption option is merely hiding something else. Conor ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] How to enable inter access points communication?
It would appear to be an Atheros device -http://wiki.openwrt.org/toh/buffalo/wzr-hp-g300h I would suggest starting here - http://wiki.openwrt.org/doc/recipes/atheroswds On Mon, 2011-09-05 at 21:57 +0900, 马进 wrote: Hi all, I am using wzr-hp-g300nh right now. The firmware is openwrt. How to setup the inter AP communication? I want to let one AP know the existence of another AP which is in the range of network contention. Do you have any ideas about it? Thank you. Regards. ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] [PATCH] replace CONFIG_PREEMPT_NONE with CONFIG_PREEMPT
On Mon, 2011-09-05 at 13:25 +, Michael Büsch wrote: On Sun, 4 Sep 2011 22:44:08 +0200 Luka Perkov open...@lukaperkov.net wrote: Unhandled kernel unaligned access[#1]: Cpu 0 $ 0 : 0006 0011 $ 4 : d5bf9da3 80dbb548 0006 c010 $ 8 : c578 6e617332 6e617332 $12 : $16 : 6fbb5ff7 80d05618 8028fab0 $20 : 8028fa28 80cba248 8028fabc 8028fabe $24 : 80d85a50 $28 : 8028e000 8028f9f0 81043d14 80cb8708 Hi: 0235 Lo: 02922c00 epc : 80cb8968 nf_nat_setup_info+0x2e0/0x6e8 [nf_nat] Tainted: P ra: 80cb8708 nf_nat_setup_info+0x80/0x6e8 [nf_nat] Status: 1100fc03KERNEL EXL IE Cause : 00800010 BadVA : 6fbb600f PrId : 00019641 (MIPS 24Kc) Modules linked in: gpio_keys_polled dwc_otg ath_pci ath_hal(P) lantiq_atm drv_dsl_cpe_api lantiq_mei ipt_MASQUERADE iptable_nat nf_nat xt_conntrack xt_NOTRACK iptable_raw xt_state nf_conntrack_ipv4 nf_defrag_ipv4 nf_conntrack pppoe pppox ipt_REJECT xt_TCPMSS ipt_LOG xt_comment xt_multiport xt_mac xt_limit iptable_mangle iptable_filter ip_tables xt_tcpudp x_tables ppp_async ppp_generic slhc br2684 atm drv_vmmc usbcore drv_tapi crc_ccitt drv_ifxos arc4 aes_generic crypto_algapi Process swapper (pid: 0, threadinfo=8028e000, task=80291bc0, tls=) Stack : 81722280 8019bfa0 801c686c 80f4f800 c0a801c7 c5780002 6ea9cbd9 a6a90600 d5bf9da3 6ea9cbd9 a6a90002 c0a801c7 c5780601 80cb9fd0 80cb8b0c 0001 d5bf9da3 c0a801c7 8028fae4 80fd8840 80d05618 8028fae8 d8263338 813ca98c 80fd8840 ... Call Trace: [80cb8968] nf_nat_setup_info+0x2e0/0x6e8 [nf_nat] [80d1e158] masquerade_tg+0xc0/0xe8 [ipt_MASQUERADE] [80c646a8] ipt_do_table+0x3e0/0x484 [ip_tables] [80dee0c0] nf_nat_rule_find+0x28/0x9c [iptable_nat] [80dee290] nf_nat_fn+0x120/0x1a0 [iptable_nat] [801baa34] nf_iterate+0x8c/0xfc [801bab34] nf_hook_slow+0x90/0x17c [801c76c8] ip_output+0xd8/0x104 [8019a224] __netif_receive_skb+0x4d4/0x578 [80210128] br_handle_frame+0x280/0x2b8 [80199f9c] __netif_receive_skb+0x24c/0x578 [8019a370] process_backlog+0xa8/0x188 [8019a778] net_rx_action+0x8c/0x1b8 [800215f0] __do_softirq+0xa8/0x154 [800217f0] do_softirq+0x48/0x68 [800031c0] plat_irq_dispatch+0xf4/0x164 [800059ec] ret_from_irq+0x0/0x4 [80005be0] r4k_wait+0x20/0x40 [80007690] cpu_idle+0x28/0x4c [802a58d0] start_kernel+0x35c/0x378 thanks. I am still wondering how enabling preempt could possibly workaround/hide an alignment bug. sounds strange to me. Does somebody have an idea? I didn't look too closely at the function yet, though. What is the exact opcode that is causing the problem and how bad is the bad address? (Yes, I could look up those things myself, and I might do it later if I have time.) Conor ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] [PATCH] Add support for a noname router from DX
Who does the MAC address resolve to? On 17/08/2011 14:09, Raphaël HUCK wrote: This patch adds full support for this router: http://www.dealextreme.com/p/portable-wireless-n-3g-router-cdma2000-evdo-td-scdma-hspa-wcdma-45639 This is a resubmit of my previous patch against current trunk. I have adjusted mtd partitioning so that built-in dwc_otgusb would fit in and cleaned up some unneeded stuff. Patch attached. The patch looks good. However 'Unbranded-3G' is not a descriptive name, and the router has a model number: WS-WR512N1. See the label on the back of the device: http://www.dealextreme.com/photogallery.dx/sku.45639~seQ.2 Please replace the 'unbranded' stuff with something according to the model number, and resubmit the patch. It appears to be a Winstars WS-WN512N1 (http://www.win-star.com/eshop/goods.php?id=120). This is good news, a 3G router for 30€ :) Thanks! -Raphaël ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] [PATCH] Add support for a noname router from DX
I note that it doesn't include the 3G modem. On 17/08/2011 14:09, Raphaël HUCK wrote: It appears to be a Winstars WS-WN512N1 (http://www.win-star.com/eshop/goods.php?id=120). This is good news, a 3G router for 30€ :) Thanks! -Raphaël ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel