Re: [OpenWrt-Devel] Using JTAG on a new Ralink board
On Fri, Apr 12, 2013 at 7:09 PM, Drasko DRASKOVIC drasko.drasko...@gmail.com wrote: Hi Jon, On Fri, Apr 12, 2013 at 8:42 PM, jonsm...@gmail.com jonsm...@gmail.com wrote: On Tue, Apr 9, 2013 at 6:42 PM, jonsm...@gmail.com jonsm...@gmail.com wrote: I put two and two together and figured out that those are the names from the Ralink reference design, not the datasheet. So based on that observation Toplink has confirmed this to be the correct pin out. I've ordered 20 boards as samples. 8MB flash/ 32MB RAM / chip antenna. I'll let everyone know how they perform when they get here. Thanks a lot for your effort ! I am in the process of ordering these boards, so we will work on this one also. They are coming with Ralink SDK, and I am interested to see how this can be integrated into OpenWRT. Also, U-Boot is not delivered, so I guess it would be interesting to see if 8th devices U-Boot will work with these boards. I have confirmed that these boards will ship with empty flash unless you buy a Ralink license. There is a single Ralink license for everything, they don't break it out. Uboot is GPL and Ralink is using uboot. So there should be GPL source to their uboot somewhere. Has anyone tried getting the uboot source out of Ralink/Mediatek? It might be sitting on a server somewhere. So first problem is getting some kind of uboot into the flash. I also think you need to order these with the L7/U5 population option, that will make the 1.8V for the Ethernet transformer CT. In any case, most interesting low-cost board I could find, and it would be really beneficial to have OpenWRT support for these. Best regards, Drasko ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel -- Jon Smirl jonsm...@gmail.com ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] Using JTAG on a new Ralink board
Hi Jon, I guess that you can push Ralink for this, but I have bot seen these sources on the web. The closest I got is 8Devices' Carambola u-boot, as they have probably demanded sources from Ralink : https://github.com/8devices/u-boot I can see in the code rt2880_config, but Carambola has RT3050 and uses this U-Boot, so there is a goot chacnce that it can work on RT5350 also. BR, Drasko On Tue, Apr 16, 2013 at 5:41 PM, jonsm...@gmail.com jonsm...@gmail.com wrote: On Fri, Apr 12, 2013 at 7:09 PM, Drasko DRASKOVIC drasko.drasko...@gmail.com wrote: Hi Jon, On Fri, Apr 12, 2013 at 8:42 PM, jonsm...@gmail.com jonsm...@gmail.com wrote: On Tue, Apr 9, 2013 at 6:42 PM, jonsm...@gmail.com jonsm...@gmail.com wrote: I put two and two together and figured out that those are the names from the Ralink reference design, not the datasheet. So based on that observation Toplink has confirmed this to be the correct pin out. I've ordered 20 boards as samples. 8MB flash/ 32MB RAM / chip antenna. I'll let everyone know how they perform when they get here. Thanks a lot for your effort ! I am in the process of ordering these boards, so we will work on this one also. They are coming with Ralink SDK, and I am interested to see how this can be integrated into OpenWRT. Also, U-Boot is not delivered, so I guess it would be interesting to see if 8th devices U-Boot will work with these boards. I have confirmed that these boards will ship with empty flash unless you buy a Ralink license. There is a single Ralink license for everything, they don't break it out. Uboot is GPL and Ralink is using uboot. So there should be GPL source to their uboot somewhere. Has anyone tried getting the uboot source out of Ralink/Mediatek? It might be sitting on a server somewhere. So first problem is getting some kind of uboot into the flash. I also think you need to order these with the L7/U5 population option, that will make the 1.8V for the Ethernet transformer CT. In any case, most interesting low-cost board I could find, and it would be really beneficial to have OpenWRT support for these. Best regards, Drasko ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel -- Jon Smirl jonsm...@gmail.com ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] Using JTAG on a new Ralink board
On 04/16/2013 06:54 PM, Drasko DRASKOVIC wrote: The closest I got is 8Devices' Carambola u-boot, as they have probably demanded sources from Ralink : https://github.com/8devices/u-boot I can see in the code rt2880_config, but Carambola has RT3050 and uses this U-Boot, so there is a goot chacnce that it can work on RT5350 also. 8devices/u-boot are the complete U-Boot sources taken from Ralink SDK, I checked it and it got support for all Ralink SoCs up to Rt5350. Compiling it with OpenWrt's toolchain works. It comes with a menuconfig script which allows you to comfortably setup SoC type, flash type, flash size and switch-port-configuration which is apparently all you need to get it working. Have fun! ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] Using JTAG on a new Ralink board
On Tue, Apr 9, 2013 at 6:42 PM, jonsm...@gmail.com jonsm...@gmail.comwrote: I put two and two together and figured out that those are the names from the Ralink reference design, not the datasheet. So based on that observation Toplink has confirmed this to be the correct pin out. I've ordered 20 boards as samples. 8MB flash/ 32MB RAM / chip antenna. I'll let everyone know how they perform when they get here. TopLink RT5350 Function Group 1 WLAN_LED K1 WLANK_LED_N 3 LINK1 L1 EPHY1 GPIO23 5 LINK3 M1 EPHY3 GPIO25 7 SPI_CLK N1 SPI 9 UART_TX N2 UART-lite 11 I2SCLK P2 UART RTS_N, GPIO7 13 RST_PBC N3 UART RXD 15 GPIO11 N4 UART DTR_N, GPIO11 17 TXOM0 L5 Ethernet 19 TXOP0 M5 Ethernet 21 RXIP0 P5 Ethernet 23 RXiM0 N5 Ethernet 25 TXOP4 P9 Ethernet 27 TXOM4 N9 Ethernet 29 RXIP4 L9 Ethernet 31 RXIM4 M9 Ethernet 33 GND 35 UPHY_PADM N12 USB 37 UPHY_PADP P12 USB 39 GND 41 SDRAM_CS1N C14 SDRAM REFCLK0_OUT 43 I2C_SCLK B14 I2C 45 GPIO18 A14 JTAG TDI 47 WPS_PBC B12 GPIO0 49 GPIO17 A15 JTAG TDO 51 CPURST_N C10 PORST_N 2 TXD K2 UART TXD 4 SPI_CS1 L2 SPI 6 SPI_MISO M2 SPI 8 SPI_MISI J3 SPI 10 GPIO12 J4 UART DCD_N 12 LINK0 K3 EPHY0 GPIO22 14 PWR_LED K4 UART CTS_N 16 SECU_LED L3 UART DSR_N 18 GND 20 GND 22 3.3V 24 3.3V 26 GND 28 GND 30 3.3V 32 3.3V 34 LINK2 L4 EPHY2 GPIO24 36 WPS_LED M3 UART RIN 38 3.3V 40 UART_RX P3 UART-lite 42 LINK4 M4 EPHY4 GPIO26 44 I2C_SD B13 I2C 46 GPIO19 A13 JTAG TMS 48 GPIO20 A12 JTAG TCLK 50 GPIO21 A11 JTAG TRST_N 52 1.8V Looks like they have exposed all of the important pins. -- Jon Smirl jonsm...@gmail.com -- Jon Smirl jonsm...@gmail.com ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] Using JTAG on a new Ralink board
Hi Jon, On Fri, Apr 12, 2013 at 8:42 PM, jonsm...@gmail.com jonsm...@gmail.com wrote: On Tue, Apr 9, 2013 at 6:42 PM, jonsm...@gmail.com jonsm...@gmail.com wrote: I put two and two together and figured out that those are the names from the Ralink reference design, not the datasheet. So based on that observation Toplink has confirmed this to be the correct pin out. I've ordered 20 boards as samples. 8MB flash/ 32MB RAM / chip antenna. I'll let everyone know how they perform when they get here. Thanks a lot for your effort ! I am in the process of ordering these boards, so we will work on this one also. They are coming with Ralink SDK, and I am interested to see how this can be integrated into OpenWRT. Also, U-Boot is not delivered, so I guess it would be interesting to see if 8th devices U-Boot will work with these boards. In any case, most interesting low-cost board I could find, and it would be really beneficial to have OpenWRT support for these. Best regards, Drasko ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] Using JTAG on a new Ralink board
On Tue, Apr 9, 2013 at 1:55 AM, Daniel Golle dgo...@allnet.de wrote: On 04/09/2013 01:24 AM, Drasko DRASKOVIC wrote: I am missing some more flash though. 8MB is just enough, but it seems like RT5350 chipset does not support more. NACK. We got Rt5350 boards with 32MB NOR (ALL5003, Art.Nr.92763). That makes sense. Any sized standard serial flash should work. The ROM is just going to read the first few sectors. Then the bootloader has to deal with it after it is up. Shouldn't parallel NOR flash work too? There is a second RAM chip select. Nobody uses it because it is more expensive. ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel -- Jon Smirl jonsm...@gmail.com ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] Using JTAG on a new Ralink board
Shouldn't parallel NOR flash work too? There is a second RAM chip select. Nobody uses it because it is more expensive. Yes, it should. But rt5350 can boot only from spi flash. Best regards. ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] Using JTAG on a new Ralink board
Hi John, Le 09/04/2013 21:13, jonsm...@gmail.com a écrit : Does any one actually have one of the TopLink minPCIe boards? Their datasheet doesn't clearly identify the pins. They have pins called LINK1, LINK2, LINK3, LINK4. It is not clear what those pins do. They only expose two of the Ethernet ports so there is no need for four link status pins. Not yet, but asked for their datasheet and comparing it to the RT5350 Preliminary datasheet, trying to sort things out like you do! Yes, LINK0-4 are the 5 link status LED pins, but these can also be used for bootstrapping configuration and as standard GPIO #22-26, respectively, see table 1-4 in RT5350 datasheet. Regarding the remainging pins, according to same table: - GPIO #17-21 also correspond to the JTAG pins - UART_TX and UART_RX are probably GPIO #15-16, respectively - GPIO #11-12 are clearly identified as such in the pinout - I2SCLK can only be GPIO #7, according to table 1-5 - SPI_CS1 is GPIO #27, and SP_CLK, SPI_MOSI and SPI_MISO are GPIO #4-6, respectively (GPIO #3 is SPI_CS0 and is probably used onboard for selecting the SPI Flash chip) - I2C_SD and I2C_SCLK are GPIO #1-2, respectively CPURST_N is probably PORST_N and WLAN_LED is WLAN_LED_N. This leaves GPIO #0, GPIO #8-10 and GPIO #13-14 to implement TopLink pins PWR_LED, SECU_LED, RST_PBC, WPS_LED and WPS_PBC. These can probably be guessed by probing using /sys/class/gpio. -Michel On Mon, Apr 8, 2013 at 6:24 PM, Drasko DRASKOVIC drasko.drasko...@gmail.com wrote: Yes, I have seen these boards and contacted suppliers. they seem really responsive. I am missing some more flash though. 8MB is just enough, but it seems like RT5350 chipset does not support more. John, do you know what would be the best way to augment flash on these? Some cheap NAND? SD Card? What would be the best solution? BR, Drasko On Tue, Apr 9, 2013 at 12:21 AM, jonsm...@gmail.com jonsm...@gmail.com wrote: It will be a while for the boards to arrive from China. But they look really good. 8MB flash, 32MB RAM for less than the $7.50 quotes on Aliaba. Chip antenna or IPEX. JTAG on connector The one with pins supports one Ethernet. The pseudo-miniPCIe one supports two Ethernet. On Mon, Apr 8, 2013 at 6:12 PM, Wojciech Kromer wojciech.kro...@dgt.com.pl wrote: If so, then I can load it into RAM via JTAG, jump to it and get flash commands? That will let me initialize an empty flash. This scenario works fine with rt3352, just try... Doesn't look like MIPS has the small SRAM region like ARM does. Is there a write up around somewhere on how to get going with a JTAG on these chips? I'm not very familiar with rt5350, but DDRAM setup should be done with bootstrap pins like on rt3352, so you can just try to use whole DDRAM. Best regards. ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel -- Jon Smirl jonsm...@gmail.com ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] Using JTAG on a new Ralink board
On Tue, Apr 9, 2013 at 4:08 PM, Michel Stempin michel.stem...@wanadoo.fr wrote: Hi John, Le 09/04/2013 21:13, jonsm...@gmail.com a écrit : Does any one actually have one of the TopLink minPCIe boards? Their datasheet doesn't clearly identify the pins. They have pins called LINK1, LINK2, LINK3, LINK4. It is not clear what those pins do. They only expose two of the Ethernet ports so there is no need for four link status pins. Not yet, but asked for their datasheet and comparing it to the RT5350 Preliminary datasheet, trying to sort things out like you do! Yes, LINK0-4 are the 5 link status LED pins, but these can also be used for bootstrapping configuration and as standard GPIO #22-26, respectively, see table 1-4 in RT5350 datasheet. Regarding the remainging pins, according to same table: - GPIO #17-21 also correspond to the JTAG pins - UART_TX and UART_RX are probably GPIO #15-16, respectively - GPIO #11-12 are clearly identified as such in the pinout - I2SCLK can only be GPIO #7, according to table 1-5 - SPI_CS1 is GPIO #27, and SP_CLK, SPI_MOSI and SPI_MISO are GPIO #4-6, respectively (GPIO #3 is SPI_CS0 and is probably used onboard for selecting the SPI Flash chip) - I2C_SD and I2C_SCLK are GPIO #1-2, respectively CPURST_N is probably PORST_N and WLAN_LED is WLAN_LED_N. This leaves GPIO #0, GPIO #8-10 and GPIO #13-14 to implement TopLink pins PWR_LED, SECU_LED, RST_PBC, WPS_LED and WPS_PBC. These can probably be guessed by probing using /sys/class/gpio. I put two and two together and figured out that those are the names from the Ralink reference design, not the datasheet. So based on that observation TopLink RT5350 Function Group 1 WLAN_LED K1 WLANK_LED_N 3 LINK1 L1 EPHY1 GPIO23 5 LINK3 M1 EPHY3 GPIO25 7 SPI_CLK N1 SPI 9 UART_TX N2 UART-lite 11 I2SCLK P2 UART RTS_N, GPIO7 13 RST_PBC N3 UART RXD 15 GPIO11 N4 UART DTR_N, GPIO11 17 TXOM0 L5 Ethernet 19 TXOP0 M5 Ethernet 21 RXIP0 P5 Ethernet 23 RXiM0 N5 Ethernet 25 TXOP4 P9 Ethernet 27 TXOM4 N9 Ethernet 29 RXIP4 L9 Ethernet 31 RXIM4 M9 Ethernet 33 GND 35 UPHY_PADM N12 USB 37 UPHY_PADP P12 USB 39 GND 41 SDRAM_CS1N C14 SDRAM REFCLK0_OUT 43 I2C_SCLK B14 I2C 45 GPIO18 A14 JTAG TDI 47 WPS_PBC B12 GPIO0 49 GPIO17 A15 JTAG TDO 51 CPURST_N C10 PORST_N 2 TXD K2 UART TXD 4 SPI_CS1 L2 SPI 6 SPI_MISO M2 SPI 8 SPI_MISI J3 SPI 10 GPIO12 J4 UART DCD_N 12 LINK0 K3 EPHY0 GPIO22 14 PWR_LED K4 UART CTS_N 16 SECU_LED L3 UART DSR_N 18 GND 20 GND 22 3.3V 24 3.3V 26 GND 28 GND 30 3.3V 32 3.3V 34 LINK2 L4 EPHY2 GPIO24 36 WPS_LED M3 UART RIN 38 3.3V 40 UART_RX P3 UART-lite 42 LINK4 M4 EPHY4 GPIO26 44 I2C_SD B13 I2C 46 GPIO19 A13 JTAG TMS 48 GPIO20 A12 JTAG TCLK 50 GPIO21 A11 JTAG TRST_N 52 1.8V Looks like they have exposed all of the important pins. -- Jon Smirl jonsm...@gmail.com ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
[OpenWrt-Devel] Using JTAG on a new Ralink board
I'm ordering some of those Toplink RT5350 modules from Alibaba. I need to get something initially loaded into the SPI flash. Does the MIPS u-boot in the OpenWRT tree run on the RT5350? If so, then I can load it into RAM via JTAG, jump to it and get flash commands? That will let me initialize an empty flash. Doesn't look like MIPS has the small SRAM region like ARM does. Is there a write up around somewhere on how to get going with a JTAG on these chips? -- Jon Smirl jonsm...@gmail.com ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] Using JTAG on a new Ralink board
If so, then I can load it into RAM via JTAG, jump to it and get flash commands? That will let me initialize an empty flash. This scenario works fine with rt3352, just try... Doesn't look like MIPS has the small SRAM region like ARM does. Is there a write up around somewhere on how to get going with a JTAG on these chips? I'm not very familiar with rt5350, but DDRAM setup should be done with bootstrap pins like on rt3352, so you can just try to use whole DDRAM. Best regards. ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] Using JTAG on a new Ralink board
Hi! On 04/09/2013 12:38 AM, jonsm...@gmail.com wrote: Does the MIPS u-boot in the OpenWRT tree run on the RT5350? If so, U-Boot for Ralink chips is not (yet) part of OpenWrt, however, you can compile it from the sources on https://github.com/8devices/u-boot Flashing the boards via JTAG will require you to initialize some registers of the SoC (at least SDRAM configuration, so you can load U-Boot into the ram and flash using U-Boot). OpenOCD contains code for some Atheros SoCs, that should be useful to get an impression of what needs to be done to support other type of MIPS SoCs. Good luck! Daniel ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] Using JTAG on a new Ralink board
Hi John, You will have to know RAM controller config to prepare RAM before writing into it. This usually goes to OpenOCD script and is executed via MIPS EJTAG. But is often just a question of writing several registers (sometimes in the right order) You can look in U-Boot code from Carambola (8th devices), and see if you can find something useful there. Does not Toplink provide U-Boot and Linux? If yes, then U-Boot will set-up RAM, and from there on you can put stuff there. BR, Drasko On Tue, Apr 9, 2013 at 12:10 AM, Daniel Golle dgo...@allnet.de wrote: Hi! On 04/09/2013 12:38 AM, jonsm...@gmail.com wrote: Does the MIPS u-boot in the OpenWRT tree run on the RT5350? If so, U-Boot for Ralink chips is not (yet) part of OpenWrt, however, you can compile it from the sources on https://github.com/8devices/u-boot Flashing the boards via JTAG will require you to initialize some registers of the SoC (at least SDRAM configuration, so you can load U-Boot into the ram and flash using U-Boot). OpenOCD contains code for some Atheros SoCs, that should be useful to get an impression of what needs to be done to support other type of MIPS SoCs. Good luck! Daniel ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] Using JTAG on a new Ralink board
It will be a while for the boards to arrive from China. But they look really good. 8MB flash, 32MB RAM for less than the $7.50 quotes on Aliaba. Chip antenna or IPEX. JTAG on connector The one with pins supports one Ethernet. The pseudo-miniPCIe one supports two Ethernet. On Mon, Apr 8, 2013 at 6:12 PM, Wojciech Kromer wojciech.kro...@dgt.com.pl wrote: If so, then I can load it into RAM via JTAG, jump to it and get flash commands? That will let me initialize an empty flash. This scenario works fine with rt3352, just try... Doesn't look like MIPS has the small SRAM region like ARM does. Is there a write up around somewhere on how to get going with a JTAG on these chips? I'm not very familiar with rt5350, but DDRAM setup should be done with bootstrap pins like on rt3352, so you can just try to use whole DDRAM. Best regards. ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel -- Jon Smirl jonsm...@gmail.com ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] Using JTAG on a new Ralink board
On Mon, Apr 8, 2013 at 6:20 PM, Drasko DRASKOVIC drasko.drasko...@gmail.com wrote: Hi John, You will have to know RAM controller config to prepare RAM before writing into it. This usually goes to OpenOCD script and is executed via MIPS EJTAG. But is often just a question of writing several registers (sometimes in the right order) You can look in U-Boot code from Carambola (8th devices), and see if you can find something useful there. Does not Toplink provide U-Boot and Linux? If yes, then U-Boot will set-up RAM, and from there on you can put stuff there. Not sure yet how the board will be set up when they come. English is not their strong suit so it is hard asking questions. I definitely want to get all of the source and rebuild everything before shipping anything off to customers. I'm not a fan of blindly trusting binary blobs. BR, Drasko On Tue, Apr 9, 2013 at 12:10 AM, Daniel Golle dgo...@allnet.de wrote: Hi! On 04/09/2013 12:38 AM, jonsm...@gmail.com wrote: Does the MIPS u-boot in the OpenWRT tree run on the RT5350? If so, U-Boot for Ralink chips is not (yet) part of OpenWrt, however, you can compile it from the sources on https://github.com/8devices/u-boot Flashing the boards via JTAG will require you to initialize some registers of the SoC (at least SDRAM configuration, so you can load U-Boot into the ram and flash using U-Boot). OpenOCD contains code for some Atheros SoCs, that should be useful to get an impression of what needs to be done to support other type of MIPS SoCs. Good luck! Daniel ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel -- Jon Smirl jonsm...@gmail.com ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] Using JTAG on a new Ralink board
Yes, I have seen these boards and contacted suppliers. they seem really responsive. I am missing some more flash though. 8MB is just enough, but it seems like RT5350 chipset does not support more. John, do you know what would be the best way to augment flash on these? Some cheap NAND? SD Card? What would be the best solution? BR, Drasko On Tue, Apr 9, 2013 at 12:21 AM, jonsm...@gmail.com jonsm...@gmail.com wrote: It will be a while for the boards to arrive from China. But they look really good. 8MB flash, 32MB RAM for less than the $7.50 quotes on Aliaba. Chip antenna or IPEX. JTAG on connector The one with pins supports one Ethernet. The pseudo-miniPCIe one supports two Ethernet. On Mon, Apr 8, 2013 at 6:12 PM, Wojciech Kromer wojciech.kro...@dgt.com.pl wrote: If so, then I can load it into RAM via JTAG, jump to it and get flash commands? That will let me initialize an empty flash. This scenario works fine with rt3352, just try... Doesn't look like MIPS has the small SRAM region like ARM does. Is there a write up around somewhere on how to get going with a JTAG on these chips? I'm not very familiar with rt5350, but DDRAM setup should be done with bootstrap pins like on rt3352, so you can just try to use whole DDRAM. Best regards. ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel -- Jon Smirl jonsm...@gmail.com ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] Using JTAG on a new Ralink board
On Mon, Apr 8, 2013 at 6:24 PM, Drasko DRASKOVIC drasko.drasko...@gmail.com wrote: Yes, I have seen these boards and contacted suppliers. they seem really responsive. I am missing some more flash though. 8MB is just enough, but it seems like RT5350 chipset does not support more. John, do you know what would be the best way to augment flash on these? Some cheap NAND? SD Card? What would be the best solution? We believe The miniPCI version has enough on the connector to attach a SD Card using SPI. BR, Drasko On Tue, Apr 9, 2013 at 12:21 AM, jonsm...@gmail.com jonsm...@gmail.com wrote: It will be a while for the boards to arrive from China. But they look really good. 8MB flash, 32MB RAM for less than the $7.50 quotes on Aliaba. Chip antenna or IPEX. JTAG on connector The one with pins supports one Ethernet. The pseudo-miniPCIe one supports two Ethernet. On Mon, Apr 8, 2013 at 6:12 PM, Wojciech Kromer wojciech.kro...@dgt.com.pl wrote: If so, then I can load it into RAM via JTAG, jump to it and get flash commands? That will let me initialize an empty flash. This scenario works fine with rt3352, just try... Doesn't look like MIPS has the small SRAM region like ARM does. Is there a write up around somewhere on how to get going with a JTAG on these chips? I'm not very familiar with rt5350, but DDRAM setup should be done with bootstrap pins like on rt3352, so you can just try to use whole DDRAM. Best regards. ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel -- Jon Smirl jonsm...@gmail.com ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel -- Jon Smirl jonsm...@gmail.com ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] Using JTAG on a new Ralink board
On Mon, Apr 8, 2013 at 6:27 PM, Drasko DRASKOVIC drasko.drasko...@gmail.com wrote: BTW, have you seen this one : http://www.alibaba.com/product-gs/815002442/RT5350_wifi_module_oem.html I think I found out those were 88Y ($14.19). That is twice the price of Toplink. Looks even more interesting to me, as it seem to be better described. This company haowever have not been so responsive in my case, still waiting on some contacts. I can see that they go up to 64MB RAM, but I do not trust these Alibaba adds too much... BR, Drasko On Tue, Apr 9, 2013 at 12:24 AM, jonsm...@gmail.com jonsm...@gmail.com wrote: On Mon, Apr 8, 2013 at 6:20 PM, Drasko DRASKOVIC drasko.drasko...@gmail.com wrote: Hi John, You will have to know RAM controller config to prepare RAM before writing into it. This usually goes to OpenOCD script and is executed via MIPS EJTAG. But is often just a question of writing several registers (sometimes in the right order) You can look in U-Boot code from Carambola (8th devices), and see if you can find something useful there. Does not Toplink provide U-Boot and Linux? If yes, then U-Boot will set-up RAM, and from there on you can put stuff there. Not sure yet how the board will be set up when they come. English is not their strong suit so it is hard asking questions. I definitely want to get all of the source and rebuild everything before shipping anything off to customers. I'm not a fan of blindly trusting binary blobs. BR, Drasko On Tue, Apr 9, 2013 at 12:10 AM, Daniel Golle dgo...@allnet.de wrote: Hi! On 04/09/2013 12:38 AM, jonsm...@gmail.com wrote: Does the MIPS u-boot in the OpenWRT tree run on the RT5350? If so, U-Boot for Ralink chips is not (yet) part of OpenWrt, however, you can compile it from the sources on https://github.com/8devices/u-boot Flashing the boards via JTAG will require you to initialize some registers of the SoC (at least SDRAM configuration, so you can load U-Boot into the ram and flash using U-Boot). OpenOCD contains code for some Atheros SoCs, that should be useful to get an impression of what needs to be done to support other type of MIPS SoCs. Good luck! Daniel ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel -- Jon Smirl jonsm...@gmail.com ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel -- Jon Smirl jonsm...@gmail.com ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] Using JTAG on a new Ralink board
On Mon, Apr 8, 2013 at 6:28 PM, jonsm...@gmail.com jonsm...@gmail.com wrote: On Mon, Apr 8, 2013 at 6:24 PM, Drasko DRASKOVIC drasko.drasko...@gmail.com wrote: Yes, I have seen these boards and contacted suppliers. they seem really responsive. I am missing some more flash though. 8MB is just enough, but it seems like RT5350 chipset does not support more. John, do you know what would be the best way to augment flash on these? Some cheap NAND? SD Card? What would be the best solution? We believe The miniPCI version has enough on the connector to attach a SD Card using SPI. miniPCI version brings out all of the SPI lines and the unused CS1. That should work to interface to a SD Card. Linux kernel has support for SD cards attached over SPI. BR, Drasko On Tue, Apr 9, 2013 at 12:21 AM, jonsm...@gmail.com jonsm...@gmail.com wrote: It will be a while for the boards to arrive from China. But they look really good. 8MB flash, 32MB RAM for less than the $7.50 quotes on Aliaba. Chip antenna or IPEX. JTAG on connector The one with pins supports one Ethernet. The pseudo-miniPCIe one supports two Ethernet. On Mon, Apr 8, 2013 at 6:12 PM, Wojciech Kromer wojciech.kro...@dgt.com.pl wrote: If so, then I can load it into RAM via JTAG, jump to it and get flash commands? That will let me initialize an empty flash. This scenario works fine with rt3352, just try... Doesn't look like MIPS has the small SRAM region like ARM does. Is there a write up around somewhere on how to get going with a JTAG on these chips? I'm not very familiar with rt5350, but DDRAM setup should be done with bootstrap pins like on rt3352, so you can just try to use whole DDRAM. Best regards. ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel -- Jon Smirl jonsm...@gmail.com ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel -- Jon Smirl jonsm...@gmail.com -- Jon Smirl jonsm...@gmail.com ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] Using JTAG on a new Ralink board
Great, thanks a lot John. I has just a little trouble with their miniPCI card, as it has only one hole in the middle, and will not fit into the standard miniPCI connector, which demand two holes on the top. How do you plan to fix this card? BR, Drasko On Tue, Apr 9, 2013 at 12:59 AM, jonsm...@gmail.com jonsm...@gmail.com wrote: On Mon, Apr 8, 2013 at 6:28 PM, jonsm...@gmail.com jonsm...@gmail.com wrote: On Mon, Apr 8, 2013 at 6:24 PM, Drasko DRASKOVIC drasko.drasko...@gmail.com wrote: Yes, I have seen these boards and contacted suppliers. they seem really responsive. I am missing some more flash though. 8MB is just enough, but it seems like RT5350 chipset does not support more. John, do you know what would be the best way to augment flash on these? Some cheap NAND? SD Card? What would be the best solution? We believe The miniPCI version has enough on the connector to attach a SD Card using SPI. miniPCI version brings out all of the SPI lines and the unused CS1. That should work to interface to a SD Card. Linux kernel has support for SD cards attached over SPI. BR, Drasko On Tue, Apr 9, 2013 at 12:21 AM, jonsm...@gmail.com jonsm...@gmail.com wrote: It will be a while for the boards to arrive from China. But they look really good. 8MB flash, 32MB RAM for less than the $7.50 quotes on Aliaba. Chip antenna or IPEX. JTAG on connector The one with pins supports one Ethernet. The pseudo-miniPCIe one supports two Ethernet. On Mon, Apr 8, 2013 at 6:12 PM, Wojciech Kromer wojciech.kro...@dgt.com.pl wrote: If so, then I can load it into RAM via JTAG, jump to it and get flash commands? That will let me initialize an empty flash. This scenario works fine with rt3352, just try... Doesn't look like MIPS has the small SRAM region like ARM does. Is there a write up around somewhere on how to get going with a JTAG on these chips? I'm not very familiar with rt5350, but DDRAM setup should be done with bootstrap pins like on rt3352, so you can just try to use whole DDRAM. Best regards. ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel -- Jon Smirl jonsm...@gmail.com ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel -- Jon Smirl jonsm...@gmail.com -- Jon Smirl jonsm...@gmail.com ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] Using JTAG on a new Ralink board
On Mon, Apr 8, 2013 at 7:04 PM, Drasko DRASKOVIC drasko.drasko...@gmail.com wrote: Great, thanks a lot John. I has just a little trouble with their miniPCI card, as it has only one hole in the middle, and will not fit into the standard miniPCI connector, which demand two holes on the top. It is not a miniPCI card. They just used the miniPCI connector. It is in no-way compatible with miniPCI. They bring out the Ethernet, USB, I2C, SPI from the rt5350 to the miniPCI connector pins. How do you plan to fix this card? BR, Drasko On Tue, Apr 9, 2013 at 12:59 AM, jonsm...@gmail.com jonsm...@gmail.com wrote: On Mon, Apr 8, 2013 at 6:28 PM, jonsm...@gmail.com jonsm...@gmail.com wrote: On Mon, Apr 8, 2013 at 6:24 PM, Drasko DRASKOVIC drasko.drasko...@gmail.com wrote: Yes, I have seen these boards and contacted suppliers. they seem really responsive. I am missing some more flash though. 8MB is just enough, but it seems like RT5350 chipset does not support more. John, do you know what would be the best way to augment flash on these? Some cheap NAND? SD Card? What would be the best solution? We believe The miniPCI version has enough on the connector to attach a SD Card using SPI. miniPCI version brings out all of the SPI lines and the unused CS1. That should work to interface to a SD Card. Linux kernel has support for SD cards attached over SPI. BR, Drasko On Tue, Apr 9, 2013 at 12:21 AM, jonsm...@gmail.com jonsm...@gmail.com wrote: It will be a while for the boards to arrive from China. But they look really good. 8MB flash, 32MB RAM for less than the $7.50 quotes on Aliaba. Chip antenna or IPEX. JTAG on connector The one with pins supports one Ethernet. The pseudo-miniPCIe one supports two Ethernet. On Mon, Apr 8, 2013 at 6:12 PM, Wojciech Kromer wojciech.kro...@dgt.com.pl wrote: If so, then I can load it into RAM via JTAG, jump to it and get flash commands? That will let me initialize an empty flash. This scenario works fine with rt3352, just try... Doesn't look like MIPS has the small SRAM region like ARM does. Is there a write up around somewhere on how to get going with a JTAG on these chips? I'm not very familiar with rt5350, but DDRAM setup should be done with bootstrap pins like on rt3352, so you can just try to use whole DDRAM. Best regards. ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel -- Jon Smirl jonsm...@gmail.com ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel -- Jon Smirl jonsm...@gmail.com -- Jon Smirl jonsm...@gmail.com ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel -- Jon Smirl jonsm...@gmail.com ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] Using JTAG on a new Ralink board
On Mon, Apr 8, 2013 at 7:09 PM, jonsm...@gmail.com jonsm...@gmail.com wrote: On Mon, Apr 8, 2013 at 7:04 PM, Drasko DRASKOVIC drasko.drasko...@gmail.com wrote: Great, thanks a lot John. I has just a little trouble with their miniPCI card, as it has only one hole in the middle, and will not fit into the standard miniPCI connector, which demand two holes on the top. It is not a miniPCI card. They just used the miniPCI connector. It is in no-way compatible with miniPCI. They bring out the Ethernet, USB, I2C, SPI from the rt5350 to the miniPCI connector pins. How do you plan to fix this card? We did the same thing with this module. it reused the miniPCIe connector. http://www.redwirellc.com/store/node/6 We secure it with a couple of screws and small plastic stand offs. BR, Drasko On Tue, Apr 9, 2013 at 12:59 AM, jonsm...@gmail.com jonsm...@gmail.com wrote: On Mon, Apr 8, 2013 at 6:28 PM, jonsm...@gmail.com jonsm...@gmail.com wrote: On Mon, Apr 8, 2013 at 6:24 PM, Drasko DRASKOVIC drasko.drasko...@gmail.com wrote: Yes, I have seen these boards and contacted suppliers. they seem really responsive. I am missing some more flash though. 8MB is just enough, but it seems like RT5350 chipset does not support more. John, do you know what would be the best way to augment flash on these? Some cheap NAND? SD Card? What would be the best solution? We believe The miniPCI version has enough on the connector to attach a SD Card using SPI. miniPCI version brings out all of the SPI lines and the unused CS1. That should work to interface to a SD Card. Linux kernel has support for SD cards attached over SPI. BR, Drasko On Tue, Apr 9, 2013 at 12:21 AM, jonsm...@gmail.com jonsm...@gmail.com wrote: It will be a while for the boards to arrive from China. But they look really good. 8MB flash, 32MB RAM for less than the $7.50 quotes on Aliaba. Chip antenna or IPEX. JTAG on connector The one with pins supports one Ethernet. The pseudo-miniPCIe one supports two Ethernet. On Mon, Apr 8, 2013 at 6:12 PM, Wojciech Kromer wojciech.kro...@dgt.com.pl wrote: If so, then I can load it into RAM via JTAG, jump to it and get flash commands? That will let me initialize an empty flash. This scenario works fine with rt3352, just try... Doesn't look like MIPS has the small SRAM region like ARM does. Is there a write up around somewhere on how to get going with a JTAG on these chips? I'm not very familiar with rt5350, but DDRAM setup should be done with bootstrap pins like on rt3352, so you can just try to use whole DDRAM. Best regards. ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel -- Jon Smirl jonsm...@gmail.com ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel -- Jon Smirl jonsm...@gmail.com -- Jon Smirl jonsm...@gmail.com ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel -- Jon Smirl jonsm...@gmail.com -- Jon Smirl jonsm...@gmail.com ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
Re: [OpenWrt-Devel] Using JTAG on a new Ralink board
On 04/09/2013 01:24 AM, Drasko DRASKOVIC wrote: I am missing some more flash though. 8MB is just enough, but it seems like RT5350 chipset does not support more. NACK. We got Rt5350 boards with 32MB NOR (ALL5003, Art.Nr.92763). ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
