Re: [PEDA] Hole annular ring
Thanks for all the help on this question. I think the best solution for me is to create a special rule for these pads as some have suggested. I also appreciate the information on non-plated holes. Let me just add that the reason that I wanted a size 0 pad is because we only put non-zero size pads around holes that will be used for grounding. As for keeping things away from the hole, Protel has other ways I can keep things away from the hole without having to add a big pad -- again as some have suggested. Thanks again. Matt __ Do You Yahoo!? LAUNCH - Your Yahoo! Music Experience http://launch.yahoo.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
[PEDA] Adding extra tracks and vias.
I'm working on a layout with two quad flat packs. A substantial number of pins on each chip have no connection. Because of the difficulty of hand-soldering to fine pitch pins, I would like to add a track and a via to each unused pin for possible use later. I'm have two issues: 1. DRC flags these extra tracks and vias as violations. 2. I get no protection from the design rules that specify minimum clearances and such. I think this must be a common problem. Is there an easy way to fix this without changing the schematic? Protel 99 SE sp6. Thanks, Matt __ Do You Yahoo!? LAUNCH - Your Yahoo! Music Experience http://launch.yahoo.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
[PEDA] Hole annular ring
OK, I feel like an idiot for asking this question, but I'll use the excuse that I'm only an occasional PCB designer. I mainly write firmware. I have placed a few pads on my PCB with the following properties: X size: 0 Y size: 0 Round Hole size 147 mil Multi-layer Not plated These are supposed to be mounting holes. I get annular ring violations on these pads. Should I not be using pads for mounting holes? Protel 99 SE sp6. Thanks, Matt __ Do You Yahoo!? LAUNCH - Your Yahoo! Music Experience http://launch.yahoo.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Power plane questions
--- Harry Selfridge [EMAIL PROTECTED] [SNIP] 3. I have split the plane into multiple nets. The tracks that indicate the boundaries are 45 degree and 90 degree tracks. Recall I have an arc on my board edge. Because the 45/90 tracks and the arc are not compatible, the tracks extend outside of the arc to avoid tiny slivers of plane near the board edge. Is there a better way to do this? For example, can I define the regions with mostly 45/90 tracks but add an arc at the board edge to complete the region? Will the way I have done this likely confuse the board house? Your way will not confuse the board house. In the old days before the wonderful GUI EDA packages, we laid out plane segments with radials that extended beyond the edge of the board. The fab is going to physically cut that area off, so anything outside the board perimeter you tell them you want will be discarded during fab. As for another, perhaps better, way - Protel gives you the ability to place split planes, and to define to what net the copper in the split area belongs. Go to the Design menu in PCB and look for Split Planes. The menu item will allow you to add a split area with the width of boundary void you choose. I DID use the Protel split plane feature. I'm not trying to keep track of the Cu manually. I guess I should have said that in my original post, but it never occurred to me to do it manually. If you use something on the order of 20-30 mils for the split plane boundary, you can follow inside the 50 mil outline arc with line segments defining the outer edge ot the split plane. It looks tidy, and it works. The way the split plane boundary segments are laid down works just like laying a track - you can choose right angle, 45 degree, arc, or free form with a combination of space bar and shift key while laying down the boundary line. OK, I see what you mean. Sounds like a good idea, but since I won't confuse the board house with the 45/90 tracks that are run outside of the board I'll just leave it as it is. By the way, I did see in the help file that arcs can be used to define the split plane boundaries, however is seems impossible to make the arc the same radius as my board outline so it's not much use. Thanks for the help. Matt __ Do You Yahoo!? LAUNCH - Your Yahoo! Music Experience http://launch.yahoo.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Power plane questions
Brian, Let me ask first how you created the circular board with the segmented Planes. The procedure you outlined is pretty much exactly what I did. It's nice to get confirmation that I'm on the right track. Thanks for the warning about what not to do. I'll try to avoid angering Mother Protel. Matt __ Do You Yahoo!? LAUNCH - Your Yahoo! Music Experience http://launch.yahoo.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Power plane questions
Ian, I assume you are placing a split plane on the power plane layer. Is this correct? Yep. Split planes allow section of the power plane to be at different voltages - is this your intention? Yep. I understand what you mean about placing any-angle tracks to approximate the board outline. It would be nice if Protel would let me form the edge of the split plane with an arc the radius of which matched my board outline, but it looks like that isn't possible. Thanks for the answers. Matt __ Do You Yahoo!? LAUNCH - Your Yahoo! Music Experience http://launch.yahoo.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
[PEDA] Schematic Port questions
Two easy ones (I think): (1) I have a multi-page schematic with ports to connect nets between pages. Is there any way, besides adding a net label, to force Protel to give the net the port name in the netlist instead of something like R54_1? Why do I care about net names? Because descriptive names help me when I'm routing. Why don't I want to add a net label? Because then I have a wire with a net label and a port right next to each other -- it just looks silly. (2) I am using the Reports/Add Port References (Flat) feature which works pretty well except that it doesn't seem to generate a reference for ports of the same name on the same page. Is there any way to get the references for ports on the same page? Thanks, Matt __ Do You Yahoo!? LAUNCH - Your Yahoo! Music Experience http://launch.yahoo.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Schematic Port questions
--- Abd ulRahman Lomax [EMAIL PROTECTED] wrote: If you are using Net Labels and Ports Global scope, you must place a net label to force the assignment of a net name. With this scope, you don't need to use ports at all I don't? Great! But then how do I generate the little strings next to the net labels that tell me what page and grid reference the net goes to? I'll tell you how I've done it in the past -- by hand! It's time consuming and error prone, but necessary. My schematics are typically about 10 pages or so so I need an aid to help me find the other end of the wire. (When I'm debugging in the field, I'm using paper copies.) Ports allow me to automate the process but with two distinct disadvantages over my tedious manual method: 1. It seems impossible to generate references within the same page automatically (without 3rd party tools). 2. The automatically generated references sometimes appear on the wrong side of the port so that the text is placed directly over a wire. Sometimes I can fix this; sometimes I can't. Anybody have any clever ways they handle generating net cross references? I've seen schematics (not drawn in Protel) that include tables at the end with this kind of information. Although, in my opinion, that's not quite as convenient as having the information embedded on every page, if I could generate that kind of table automatically I'd adopt that method in a second. Thanks! Matt __ Do You Yahoo!? LAUNCH - Your Yahoo! Music Experience http://launch.yahoo.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
[PEDA] Power plane questions
I'm working on laying out my first board with power planes and I have a few questions. 1. I placed an arc on the plane (my board is circular) to form a circle all the way around the edge of the board. The idea is to keep the plane away from the edge of the board. The assigned net for the arc is No Net. Is this the correct procedure for keeping the plane away from the edge of the board? 2. The arc is 50 mils wide. Since I placed the arc directly on top of the board outline, I expect to get 25 mils of clearance from the board edge to the plane. In general, is that enough clearance? 3. I have split the plane into multiple nets. The tracks that indicate the boundaries are 45 degree and 90 degree tracks. Recall I have an arc on my board edge. Because the 45/90 tracks and the arc are not compatible, the tracks extend outside of the arc to avoid tiny slivers of plane near the board edge. Is there a better way to do this? For example, can I define the regions with mostly 45/90 tracks but add an arc at the board edge to complete the region? Will the way I have done this likely confuse the board house? I'm using Protel 99 SE sp6. Thank you, Matt __ Do You Yahoo!? LAUNCH - Your Yahoo! Music Experience http://launch.yahoo.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
[PEDA] BMP2PCB Question (slightly off topic)
Thanks to a tip from the FAQ for this mailing list, I got a copy of the BMP2PCB that I want to use to add my company logo to a PCB. I noticed that the tracks generated are 1 mil. Do board houses typically complain about these 1 mil tracks or do they, seeing the are just a logo, let them slide under the minimum track width rule? I normally use Advanced Circuits (4pcb.com) for my board house so if anyone has had any experience with them and logo 1 mil tracks, I'd appreciate hearing from you. Thanks, Matt __ Do You Yahoo!? Yahoo! Tax Center - online filing with TurboTax http://taxes.yahoo.com/ * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
