[PEDA] Components to Grid

2004-08-30 Thread John Girvan
99SE
Win2K

Components to Grid?

using 'Move selected components to grid', moves ALL components on the PCB to
the snap grid. Is there anyway to avoid this, cant i just move the selected
ones... is this a bug?

jjg.


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Re: [PEDA] SP6 not printing

2004-07-26 Thread John Girvan
all,

thanks for the help with this issue. it did print when logged in as admin.
in the end we have just reinstalled. corrupt cfg file i believe.

thanks again.

-Original Message-
From: Leo Potjewijd [mailto:[EMAIL PROTECTED]
Sent: Friday, 23 July 2004 7:05 PM
To: Protel EDA Forum
Cc: Protel EDA Forum
Subject: Re: [PEDA] SP6 not printing


Hi there.

I, too, had this issue and was stumped at first.
Re-installing the printer driver seemed to alleviate the problem, but it 
still popped up occasionally.
It became so bad, that I could no longer open design without getting an 
access violation.
That prompted me to re-install P99SE and SP6 (made a backup of ini, cfg and 
rcs files): the problem was gone.
But after putting back the ini, cfg and rcs files the problem was back, 
too.
Turned out to be a corrupt cfg file, after re-re-installing and leaving the 
cfg file alone (I *did* copy back teh rcs and ini files) the problem was 
gone completely.
If you have added button icons, be sure to backup those too.

Hope this helps.

Leo Potjewijd
hardware designer
Integrated Engineering B.V.

[EMAIL PROTECTED]
+31 20 4620700


At 23-7-2004 02:15, Harry Lemmens wrote:
G'Day All,

   I have a similar issue with Protel SP6 for 99SE coupled 
 with Win2k
SP4. installation of both caused my machine to become very unstable,
throwing
the access violation at many places with 99SE. (Mainly in the simulator 
though,
However, leaving the machine for a while was also popping the same 
problem.)   I
did discover that turning off the auto-backup facility in 99SE seemed to
virtually eliminate this issue. (Although ... the simulator will still 
fall over
at the slightest provocation!)

So, perhaps turning off Auto-backup will help resolve your current dilemma?

If someone else has a better suggestion, I certainly would like to know, 
as I do
occasionally find the simulator useful. (Even though it is a pig of a thing
to
use, especially regarding the addition of spice models)

Cheers
Harry


-Original Message-
From: John Girvan [mailto:[EMAIL PROTECTED]
Sent: Friday, July 23, 2004 9:53 AM
To: 'Protel EDA Forum'
Subject: [PEDA] SP6 not printing

Win2k Pro (SP2), 99SE, error when printing.

hey there,

we recently put SP6 on one of our machines here as we were\are running SP5.
was a new-ish machine and everything was running smoothly...

when printing a schematic we now get an 'access violation' error (ignore or
quit) and cannot print the schematic on this machine. after this u have to
close down protel and re-open and it gets ugly with access violation errors
in windows that will not go away unless u kill the client99se task.

got me stuffed!

any help appreciated.


thanks,


jjg.





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[PEDA] SP6 not printing

2004-07-22 Thread John Girvan
Win2k Pro (SP2), 99SE, error when printing.

hey there,

we recently put SP6 on one of our machines here as we were\are running SP5.
was a new-ish machine and everything was running smoothly...

when printing a schematic we now get an 'access violation' error (ignore or
quit) and cannot print the schematic on this machine. after this u have to
close down protel and re-open and it gets ugly with access violation errors
in windows that will not go away unless u kill the client99se task.

got me stuffed!

any help appreciated.


thanks,


jjg.


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Re: [PEDA] OT: Mentor PADS comparison

2004-05-18 Thread John Girvan
PH,

did u ever hear of, 'if u havent got anything nice to say, dont say anything
at all'.

this is a forum for discussion of protel, not bagging it. go away. if u dont
like it, use something else.


-Original Message-
From: Protel Hell [mailto:[EMAIL PROTECTED]
Sent: Tuesday, 18 May 2004 11:48 PM
To: [EMAIL PROTECTED]
Subject: Re: [PEDA] OT: Mentor PADS comparison


In every schematic capture program I have used once two nodes are connected 
the wire moves with the nodes. If the net has a name it stays with the net 
as well.

This CAD seems strange that all are independant, you can move one and the 
relationship is broken. While you guys are probably used to this quirck and 
see nothing wrong, it is very inefficient, and worse, it can cause errors.

just one of many things I find very Neandertholish about Protel, and one of 
many reasons I believe productivity in Protel is below other CAD

PH


From: Mira [EMAIL PROTECTED]
Reply-To: Protel EDA Forum [EMAIL PROTECTED]
To: Protel EDA Forum [EMAIL PROTECTED]
Subject: Re: [PEDA] OT: Mentor PADS comparison
Date: Mon, 17 May 2004 14:39:45 -0700 (PDT)

Abd,

I'll describe what I don't like later tonight.

Regarding the net names and breaking wires in
Protel... I read the other posts. I won't be looking
anymore for a feature, which is obviously not there.

Should I ask if there is a drag wire feature? When I
move the symbol it's no longer connected. Wires are
just lines and editing takes a little bit longer than
it should be. I have to either place another wire or
place a wire and net labels to connect them.

Later,
Mira

--- Abd ul-Rahman Lomax [EMAIL PROTECTED] wrote:
  At 06:41 PM 5/16/2004, Mira wrote:
  I don't like editing the manual routing in both
  PCAD
  and Protel. Orcad and Allegro are much better.
 
  I wonder if you could describe what you don't like.
  What is difficult, or
  tedious, or whatever about editing the manual
  routing in PCAD and Protel?
 
  As for placing a part on top of a wire and getting
  the
  wire disconnected... I don't see it in Protel99SE.
 
  Right. I think it's a DXP feature.
 
I
  don't see a wire name at all unless I place a net
  label.
 
  Protel does not display automatically-assigned wire
  names The actual
  name assigned will vary with how connectivity is
  specified. But I can't
  recall ever wanting to see these names In
  practice, one always knows a
  node in the net and the node is easy to find in
  Protel. I think DXP has
  made some advances in net analysis in Schematic, but
  I'm not sufficiently
  familiar
 
Even with a net label on the wire, I still see
  a diode's pins shorted. Yes, I have a junction but
  both pins are shorted.
  Am I missing any thing obvious here?
 
  Yes. I wrote that the autobreak facility was in DXP.
  Now, if I recall
  correctly -- I can't check on this notebook because
  my 99SE installation on
  it is broken -- you can drop a resistor on a wire
  and the wire *will* be
  broken, but the middle wire segment is not deleted.
  You have to manually
  delete it, one extra step. In practice, you might
  want to move it out of
  the way before deleting it But I'm not sure of
  my memory. It has become
  simpler in DXP.
 
 
 
 
 
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Re: [PEDA] 0 Gap Means Touch or Not?

2004-05-13 Thread John Girvan
Luo,

Were the track and via meant to be connected? If so, then the gerber files
must have been adjusted during the manufacturing. Im not sure if im reading
the problem right.

jjg


-Original Message-
From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED]
Sent: Thursday, 13 May 2004 1:12 PM
To: [EMAIL PROTECTED]
Subject: [PEDA] 0 Gap Means Touch or Not?


Dear Members,

P99SE, The gap between a track and a via is exact 0, DRC does not show this
issue, obviously, It consider the track and the via is connected. Verify the
gerber with IPC-D-356A netlist, also does not find this issue, But on the
finish board, the track and the via is broken. So I got a question as topic,
Does anyone have a good idea to find this problem, except much more
carefulness during design. Thanks.

Best Regards,
Luo.



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[PEDA] DRILL DRAWING INCONSISTENCY

2004-05-12 Thread John Girvan
g'day there!

Has anyone generated the drill drawing gerber and found there are
inconsistencies between that and the NC drill text files? my NC drill text
files are perfect, and even the drill drawing i produce in protel 99SE to
print out is fine, just that the gerber generated drill drawing has
non-plated holes listed as plated, and states there are 270 0mm holes on the
PCB?

any suggestions?


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Re: [PEDA] SLOTS?

2004-05-11 Thread John Girvan
thanks all for your help, problem solved.

jjg

-Original Message-
From: Jeff Condit [mailto:[EMAIL PROTECTED]
Sent: Wednesday, 12 May 2004 2:15 AM
To: Protel EDA Forum
Subject: Re: [PEDA] SLOTS?


Peter,

I like the idea of including unreasonably small holes to identify center
points of slots or cutouts because it serves as an additional reminder to
the fab house to read the notes.  Too often they are checking many things
under time pressure and this prevents missing a note.  I usually place one
at the center of each arc that makes up each shape (2 for a slot, 4 for a
rectangle, etc.

Jeff Condit

- Original Message -
From: Peter Bennett [EMAIL PROTECTED]
To: Protel EDA Forum [EMAIL PROTECTED]
Sent: Tuesday, May 11, 2004 7:55 AM
Subject: Re: [PEDA] SLOTS?


 John Girvan wrote:

  how does protel 99SE handle drilled slots?
 
  im placing a slot that is 12.5mm x 17.5mm on a PCB do i just draw
this
  in as a track on a mechanical layer as the size required and specify
this to
  be cut out on the gerber file?... it does not show up on the drill
drawing
  to be drilled, and 99SE hasnt got scope to add slots (holes have one
  dimension only), so there does not seem to be an alternate way..
 
  any ideas?

 Discuss the situation with your board shop to see how they want it
documented.
   Neither Gerber nor Excellon files have provision to show slots or other
 non-circular holes.

 You might place very small non-drillable holes (1 - 5 mil) as markers for
the
 corners or centers of the end radiuses - when the board shop sees these
tiny
 holes, they'll have to read your documentation, or contact you, to find
what
 you really want.

 --
 Peter Bennett
 TRIUMF
 4004 Wesbrook Mall, Vancouver, BC, Canada
 GPS and NMEA info and programs:
 http://vancouver-webpages.com/peter/index.html











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[PEDA] SLOTS?

2004-05-10 Thread John Girvan
how does protel 99SE handle drilled slots?

im placing a slot that is 12.5mm x 17.5mm on a PCB do i just draw this
in as a track on a mechanical layer as the size required and specify this to
be cut out on the gerber file?... it does not show up on the drill drawing
to be drilled, and 99SE hasnt got scope to add slots (holes have one
dimension only), so there does not seem to be an alternate way..

any ideas?


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[PEDA] COLOR each Net

2004-05-09 Thread John Girvan
hello there,

question:
in the toolspreferences dialog in the 'display' tab we have a 'use net
color for highlight'... i have that checked and would like to assign
specific colors to nets in my design. The protel99SE handbook says i can
change these in the 'change net' dialog but i cannot find where that is. any
suggestions?

jjg


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[PEDA] Export PCB combines Mechanical Layers

2004-05-05 Thread John Girvan
Anyone had this problem occur?

using 99SE, exported the jobname.PCB file to transfer to an external
machine.  exported only the .PCB file, as that is all that was req'd.  after
opening jobname.PCB, on external PC and the PC it was exported from, i found
that all mechanical layers except Mech1-3 were merged onto the top layer? So
the exported .PCB file had only Mech1-3 (all else did not appear) and all
else was considered Top Layer...

it didnt occur on the second export, but just concerned as to why it woulda
happened in the first place?

maybe this was just a one-off!

jjg


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