Hi Kian,
The Problem with the semaphore is it cause blocking when the port
is opened non blocking.
Please do PR so we can review it.
David
-Original Message-
From: Kian Karas (KK)
Sent: Friday, March 8, 2024 4:18 AM
To: dev@nuttx.apache.org
Subject: STM32H7 serial
Rolan,
Have a look in the imx8 manual you may be able to source the clock from that
MAC.
David
-Original Message-
From: Roland
Sent: Friday, March 1, 2024 9:55 AM
To: dev@nuttx.apache.org
Subject: Re: Ethernet direct RMII connection
Hi Alan,
Thanks for this reminder.
I am using RMII
What about adding it per [LP]U[S]ART in the Kconfig here
https://github.com/apache/nuttx/tree/master/drivers/serial
Then any arch can use it.
David
-Original Message-
From: Daniel Appiagyei
Sent: Monday, October 9, 2023 12:51 AM
To: dev@nuttx.apache.org
Subject: IMXRT: LPUART IDLE chara
Hi Marten ,
See https://github.com/apache/nuttx/pull/4784
Furthermore once all the caching was working, the USB driver had a bug
that the bulk endpoints was getting confused with the interrupt endpoints
and although sized to 512 where reporting a max size of 1024 causing more
fun memory overwrite
The way to fix it is to fully name the files that are *different* by
replacing the x with the part number’s digit E.G. stm32h7x3xx_irq.h ->
stm32h723xx_irq.h
The top level inclusion file will have the ifdef logic to include the
correct part based on chip selection: See
https://github.com/apach
Tim,
See https://github.com/apache/nuttx/issues/3927
David
-Original Message-
From: Alan C. Assis
Sent: Wednesday, August 9, 2023 3:47 PM
To: dev@nuttx.apache.org
Cc: Pavel Pisa
Subject: Re: CAN TX fail handling
Hi Tim,
Agree! This behavior could be implemented in the driver, for exa
Hi Radek Pesina,
This may be way off base but, have you tried reverting
https://github.com/apache/nuttx/commit/7312a553bbc40f3771c5d53ccded89bed7391f2a
It release the CPU but traded that for potentially quantized large delays
David
-Original Message-
From: Radek Pesina
Sent: Wednesday,
Close and reopen PR or rebase on master and force push the branch.
The latter is preferable if the CI fix was on master
-Original Message-
From: fft
Sent: Saturday, April 22, 2023 4:25 AM
To: dev
Subject: How ro re-trigger CI workflow?
Hello,
Two weeks ago, i created a PR #8999 to fi
-Original Message-
From: David Sidrane
Sent: Wednesday, April 12, 2023 2:49 AM
To: 'dev@nuttx.apache.org'
Subject: RE: Hardcoded Pin mux, pad control and Drive Strength (AKA
Slew-rate and Frequency) Settings #1570
Nathan, no worries. I ended up doing the STM32G families yesterd
@davids5, I saw the request on GitHub for help with the STM32G families but
unfortunately something has come up and I won't be able to work on it this
week. Hopefully someone else can volunteer, otherwise I'll try to help next
week...
Thanks,
Nathan
On Tue, Apr 11, 2023 at 7:58 AM Dav
, if LEGACY_PINMAP is set in user config, maybe we can add a
compile time warning in stm32h7/stm32_gpio.c that in the future, users
are required to update their board.h and once done, disable LEGACY_PINMAP ?
Sebastien
Le 07/04/2023 à 15:34, David Sidrane a écrit :
> Opening the discussion
-Original Message-
From: Frank-Christian Kruegel
Sent: Monday, April 10, 2023 9:01 AM
To: dev@nuttx.apache.org
Subject: Re: Hardcoded Pin mux, pad control and Drive Strength (AKA
Slew-rate and Frequency) Settings #1570
Am 10.04.2023 um 14:51 schrieb David Sidrane:
> If I attempt
We can do this with a message pragma, so as not to kill CI.
Sebastien
Le 07/04/2023 à 15:34, David Sidrane a écrit :
> Opening the discussion for this issue on the list. See
> https://github.com/apache/nuttx/issues/1570
>
>
>
> I would like to get feedback on the approach see if
Opening the discussion for this issue on the list. See
https://github.com/apache/nuttx/issues/1570
I would like to get feedback on the approach see if we can move forward on
this.
While some solutions were discussed in
- Revert "stm32h7 sdmmc: set SDMMC_CK pin to high speed (50 MHz) mod
reasons
simply by typing "git log" if they are in the commit message
What do you think ?
Thanks
Alin
-Original Message-----
From: David Sidrane
Sent: den 9 mars 2023 10:00
To: dev@nuttx.apache.org
Cc: Sebastien Lorquet
Subject: RE: DISCUSSION - Usage of mailing lists for apache p
I would add that all pull request must have a statement explaining the
reason or motivation for the change(s).
Just stating the "What" was done is not enough. There must be a "Why" the
change is needed.
David
-Original Message-
From: alin.jerpe...@sony.com
Sent: Thursday, March 9, 2023
Hi,
There has been a lot of good work and changes in system for mm, logging,
synchronization, and networking.
Do we have a current list of functions that can be called from interrupts?
Should we consider a documentation pass to mark these?
David
about TIOCSBRK.
Nathan
On Tue, Jan 31, 2023 at 2:27 AM David Sidrane
wrote:
> Hi Nathan,
>
> Have you seen
>
> https://github.com/apache/nuttx/blob/master/arch/arm/src/stm32f7/stm32
> _serial.c#L2657
> ?
>
> David
>
> -Original Message-
> From: Nathan Hartm
Hi Nathan,
Have you seen
https://github.com/apache/nuttx/blob/master/arch/arm/src/stm32f7/stm32_serial.c#L2657
?
David
-Original Message-
From: Nathan Hartman
Sent: Monday, January 30, 2023 7:16 PM
To: dev@nuttx.apache.org
Subject: Serial driver: No BREAK support?
Serial communications
Have you looked at uOrb?
-Original Message-
From: Roberto Bucher
Sent: Saturday, December 17, 2022 1:53 AM
To: dev@nuttx.apache.org
Subject: Intertask communication in NuttX
Hi
after successfully reached to recompile the microROS environment, I'd like
to build an intertask communication
gain tomorrow, any ideas, please share!
Thank you for your time and attention to this issue...
-James
On Thu, Dec 8, 2022 at 7:57 AM Gregory Nutt wrote:
> On 12/8/2022 5:55 AM, David Sidrane wrote:
> > Is the NVIC_VTABLE repointed to the RAM vectors?
>
> The RAM functions
Is the NVIC_VTABLE repointed to the RAM vectors?
-Original Message-
From: James Dougherty
Sent: Thursday, December 8, 2022 12:40 AM
To: dev@nuttx.apache.org
Subject: Re: SAM-E70 progmem - in system programming and RAMFUNCS
RAMFUNCS certainly works for this funcs with __ramfuncs__ attribu
> I vote for nuttx, nuttx-apps
+1
David
-Original Message-
From: James Dougherty
Sent: Friday, November 18, 2022 11:21 AM
To: dev@nuttx.apache.org
Subject: Re: New names of repositories
That’s right! and underscores are difficult to see when the file name is
displayed as an underlined
Hi Petro,
On the STM32 there are shadow registers that buffer the updated data to
ensure that outputs are updated synchronously with the end of the period.
There is a bit that can be set to force the update to the shadowed registers
to be immediate, which will change the count of the current perio
+1: Apache NuttX is ready to graduate to TLP
David
On 2022/10/21 12:46:47 Nathan Hartman wrote:
> Dear Apache NuttX Community,
>
> Following the [DISCUSS] thread which has gone 72 hours without any
> further issues raised [1]:
>
> This is a call to VOTE on Graduation of Apache NuttX from the
>
+1 - The time has come.
David
-Original Message-
From: Xiang Xiao
Sent: Wednesday, October 19, 2022 1:52 AM
To: dev@nuttx.apache.org
Subject: Re: [DISCUSS] Graduate NuttX as TLP
+1.
We are ready after two years of incubation!
On Wed, Oct 19, 2022 at 1:07 PM Alin Jerpelea wrote:
> +1
Hi Sebastien,
I think it is a stale artifact from before the DMA was fleshed out.
We are using DMA on the H7 SPI in PX4. The only caveat is that the default
drive strength may be too high and we reduced it with the macro:
https://github.com/PX4/PX4-Autopilot/blob/main/boards/px4/fmu-v6x/nuttx-co
HSI is not a good choice if there are external interfaces. It can vary too
much part to part and over temperature to meet the 2% across the system
boundary. They claim 1% @25c but that is 1/2 the budget to begin with,
https://www.st.com/resource/en/application_note/dm00425536-how-to-optimize-stm32
Hi Nicolas,
I have not tested a RT1020 lately. My board is pack becaue I am moving in a
fey days. It will be a several weeks before I can l look at it. Possibly
Dave Marples github @mubes can lend a hand.
David
-Original Message-
From: nicolas.silv...@ludo.tech
Sent: Monday, Augus
er returns 0x802000ff.
The stm32l5, which I based the stm32u5 code on, did not have an IO port I.
I must have missed a piece of logic during porting I guess.
Bye,
Michael
Am Fr., 25. März 2022 um 17:22 Uhr schrieb David Sidrane <
david.sidr...@nscdg.com>:
> Hi Michael,
>
> Odd. Did you c
Hi Michael,
Odd. Did you check the defines? How are you verifying it? Have you JTAG-ed
it, could it be bad SVD? Have you just printed the value to be set and the
result ?
David
-Original Message-
From: Michael Jung
Sent: Friday, March 25, 2022 9:07 AM
To: dev
Subject: STM32U585: Can't
Hi Michal,
> rather from board level section
Yes
Have a look at this example.
https://github.com/PX4/PX4-Autopilot/blob/master/boards/px4/fmu-v5x/src/init.cpp#L243-L247
-Original Message-
From: Michal Lenc
Sent: Sunday, March 6, 2022 2:38 PM
To: dev@nuttx.apache.org
Subject: Serial RX
On Self merge:
As Nathan pointed out, it is more about time zones then merge velocity.
However, using a backport only methodology requires an upstream merge before
the work can be backported with least effort and adds a serial delay. It
would be ideal to reduces the CI quantum delay this as much a
PR 5399 adds an Kconfig option for NDEBUG. The salient discussion begins at
[2] there are mixed positions and reasoning. xiaoxiang781216 asked me to
raise a discussion on this.
The reasoning for the Default state of to be NDEBUG (n) hence undefined so
that assert() enabled is the following:
1
I am opening this discussion to widen the audience for feedback on the
rules for merging. The original interexchange was in [1]
1 ) Given the geographical and time differences should we consider that
once a review with approval* has been done the PR’s author can merge it?
2) Should we conside
Hi Karel,
It depends on the level of intrusion. You are closer to the problem then I
am. So, I will share what I know and hopefully a clear path will emerge for
you. I do not know the history of the KL.
The Kinetis arch has a notion of IP versioning. See
https://github.com/apache/incubator-nuttx/
Yes. This has been discussed here:
https://github.com/apache/incubator-nuttx/issues/2405
-Original Message-
From: xyluo
Sent: Friday, January 21, 2022 9:05 PM
To: dev
Subject: kconfig-frontends-win32-3.12.1 for windows failed to support some
Kconfig syntax?
Hello,
Recently I need to bui
Hi Michael,
Of course you are much closer to the problem than I am. So here is just my
opinion based on the stm32, stm32f7, stm32h7 lessons.
Are the L5 and U5 the same with different marketing names or are there
underlying IP differences? What is the delta?
I would head the direction of splitti
Is this a dual bank part? Is so you can avoid the bus lock by operating on
the other bank.
-Original Message-
From: Nathan Hartman
Sent: Tuesday, November 30, 2021 5:35 AM
To: dev@nuttx.apache.org
Subject: Re: Kernel ticking and progmem writes
On Tue, Nov 30, 2021 at 8:05 AM Fotis Panagi
Hi Tim,
Emails are getting to the list.
David
-Original Message-
From: Tim
Sent: Monday, November 22, 2021 3:26 AM
To: dev@nuttx.apache.org
Subject: RE: Custom audio capabilities
I appreciate no one may have any comments or suggestions but since I have
had no replies to my last 2 or 3
Hi
If it is not all there then most likely you will have to port it.
David
-Original Message-
From: Frank-Christian Kruegel [mailto:nu...@istda.com]
Sent: Thursday, July 22, 2021 2:00 AM
To: dev@nuttx.apache.org
Subject: STM32F7/H7: DAC driver missing?
Hi.
I'm wondering where the drive
First, I would like to apologies to Matias for not being able to contribute
to the effort. We are working on the PX4 release, and a nuttx upgrade and I
just do not have the time to spare.
Ironically time is one of the things this discussion is all about. PR with
the current build system and CI t
Here is a working example.
https://github.com/apache/incubator-nuttx/blob/master/arch/arm/src/stm32h7/stm32_spi.c#L715-L716
https://github.com/apache/incubator-nuttx/blob/master/boards/arm/stm32h7/nucleo-h743zi/scripts/flash.ld#L179-L184
You can check it the arm-none-eabi-nm -C nuttx.elf | grep
Hi Sebastien,
Stack crashing into heap?
Have you upped the stack sizes across the board?
David
-Original Message-
From: Sebastien Lorquet [mailto:sebast...@lorquet.fr]
Sent: Wednesday, May 26, 2021 9:22 AM
To: dev@nuttx.apache.org
Subject: Re: Port of project from NuttX 7.30 to 10.1 RC
Yes you can,
Just call the app.
Create and app. Call it what you like. user_start etc.
Set
CONFIG_USERMAIN_STACKSIZE=1100
CONFIG_USER_ENTRYPOINT="user_start"
Int user_start(int argc, char *argv[])
{
return ...;
}
CONFIG_USERMAIN_STACKSIZE=1100
CONFIG_USER_ENTRYPOINT="pigs_can_fly "
Int
ection? Polling the phy, or something
> similar?
As I recall, David Sidrane submitted a PR to do just this but it was not
incoporated. I don't recall why. I recall having some concerns that
polling the PHY in maintenance mode would interfere with normal
operational mode, but I think David dem
hanks, Reto
On 2021/05/19 12:13:35, David Sidrane wrote:
> Hi Reto,
>
> What is the clock rate to the card and is multiblock enabled?
>
> David
>
> -Original Message-
> From: Reto Gähwiler [mailto:gret.hexa...@gmail.com]
> Sent: Wednesday, May 19, 2021 5:08 AM
>
clusters by statfs
Hi David,
It is running on an STM32h743zi version V or Y. The SD-card in use is a
SwissBit S-45u.
Reto
On 2021/05/19 11:11:22, David Sidrane wrote:
> hi Reto,
>
> What SoC is this on? What type of card are you using?
>
> David
>
> -Original Message
hi Reto,
What SoC is this on? What type of card are you using?
David
-Original Message-
From: Reto Gähwiler [mailto:gret.hexa...@gmail.com]
Sent: Wednesday, May 19, 2021 3:22 AM
To: dev@nuttx.apache.org
Subject: Re: Nuttx FAT32 issues - corrupted files, wrongly stated free
clusters by s
Please count me in.
-Original Message-
From: alin.jerpe...@sony.com [mailto:alin.jerpe...@sony.com]
Sent: Tuesday, May 18, 2021 1:54 AM
To: dev@nuttx.apache.org
Subject: NuttX (Online) Workshop 2021 (call for event team members)
Hi all,
Yesterday me and Alan were talking about the plans
Yes! I just lit the label (backport/10.1)
-Original Message-
From: Gustavo Henrique Nihei [mailto:ghni...@gmail.com]
Sent: Wednesday, April 28, 2021 5:58 AM
To: dev@nuttx.apache.org
Subject: Re: [VOTE] Apache NuttX 10.1.0 (incubating) RC0 release
Hi folks,
I believe we should consider ba
Hi Vadim ,
This sounds familiar.Please check if that code is a copy of the Kinetis
driver. If so, see the changes that were done to it in
https://github.com/apache/incubator-nuttx/pull/1273
David
-Original Message-
From: Вадим Ястребов [mailto:woody_haw...@mail.ru.INVALID]
Sent: Frid
Roberto
There is a DRAFT PR https://github.com/apache/incubator-nuttx/pull/2987
David
-Original Message-
From: Roberto Bucher [mailto:roberto.buc...@supsi.ch]
Sent: Wednesday, April 14, 2021 6:18 AM
To: dev@nuttx.apache.org
Subject: CAN on STM32H7 platforms under NuttX
Hi
For a bachelor
s to account for:
* Bootloaders
* Binary blops
* Firmware headers
* ROM files
* DMA buffers
* External memories
etc etc..
Do you believe that a tool can be made that can handle everything?
Στις Παρ, 26 Μαρ 2021 στις 6:37 μ.μ., ο/η David Sidrane <
david.sidr...@nscdg.com> έγραψε:
I am
I am just thinking out load...
I agree this has to come from one place. But I do think it is just the
linker file.
Currently we have
The arch memroymap h files have the base addresses, sizes - This is the
Reference manuals counterpart, it covers all the sub members of the chips)
The chip.h files
Hi Nathan,
I just ran into this, this week on all the H7 boards in PX4.
This was broken by
https://github.com/apache/incubator-nuttx/pull/459/files#diff-8e09d7a85a1cc6cc65e0bb43d7aa751e3caaec9f9d5e824f9b741a1487ec9199L117-L138
I did not catch the implication of that change at the time.
The orig
lieve NOPs are optimized away but it seems asm("") or something close
to that is not
It would be nice to incorporate a general solution for this problem to the
Nuttx toolbox
El mié, 24 mar 2021 a las 11:24, David Sidrane ()
escribió:
> What HW is this on?
>
> -Original Messa
What HW is this on?
-Original Message-
From: Grr [mailto:gebbe...@gmail.com]
Sent: Wednesday, March 24, 2021 10:09 AM
To: dev@nuttx.apache.org
Subject: Re: Sleep Resolution
Thank you very much for your response
What I'm trying to do is to generate hold and disable times for SPI CS,
which
Have a look at
https://github.com/PX4/PX4-Autopilot/blob/3ef93823f4b8f870b056549d321473a02fb69b1f/platforms/nuttx/src/px4/common/srgbled/srgbled.cpp#L112-L115
-Original Message-
From: Grr [mailto:gebbe...@gmail.com]
Sent: Wednesday, March 24, 2021 9:36 AM
To: dev@nuttx.apache.org
Subject
> For getopt() I see there's
even no standard getopt_r(), so we would have to provide our own, which
may not
be a bad idea.
Here is the one we have been using.
https://github.com/PX4/PX4-Autopilot/commit/eab32572f42f8e3e715b952512b6f5
df9041f848
https://github.com/PX4/PX4-Autopilot/blob/master/p
on the cache invalidation issue.
> I'll get your fix running on my board to verify the hard faults have
> been resolved.
>
> Thanks everyone for all of your input and help!
>
> - John
>
> On 3/5/21 9:11 AM, David Sidrane wrote:
> > PR is in. Ple
PR is in. Please have a look and test with the default
CONFIG_NET_ETH_PKTSIZE. All should be happy now. :)
https://github.com/apache/incubator-nuttx/pull/2985
-Original Message-
From: David Sidrane [mailto:david.sidr...@nscdg.com]
Sent: Friday, March 05, 2021 1:26 AM
To:
Hi,
Thank you all for sharing your Networking and dcache expertise!
The descriptors and buffers are all aligned and sized for the dcache line
size.
The problem is the following. (The value of number do not matter, but help
express the nature of the problem.)
If CONFIG_NET_ETH_PKTSIZE is the def
Hi John,
Jinx you owe me a soda! I am just debugging this same thing today.
This is happening on the F7 as well. It is a bug, in this line.
up_invalidate_dcache((uintptr_t)dev->d_buf,
(uintptr_t)dev->d_buf + dev->d_len);
It in performs cache inv
Do you have a writeable /tmp? It would have to be /fs/microsd/tmp
"interim output will be retained in a temporary file. Full path to a
directory where temporary files can be created is taken from
CONFIG_LIBC_TMPDIR and it defaults to /tmp if CONFIG_LIBC_TMPDIR is not
set."
David
-Original Me
Those are sources of generic information passed to the drivers. Not
intrinsic data of the SoC (like its memory map).
-Original Message-
From: Grr [mailto:gebbe...@gmail.com]
Sent: Saturday, February 06, 2021 7:12 AM
To: dev@nuttx.apache.org
Subject: Re: Proper handling of arch header files
You have to init the memory used for the stack:
Have a look in the normal tasking init , and you will see the call out to
init the stack, that you neeed to call.
Also Assuming ARM it has to be 8 byte aligned. So you need attributes on
your variable called stack to set the alignment.
David
-O
I totally agree, I was always concerned that commits to the Apache directly
would get missed. So I had it on.
I could not even unsubscribe
Hi! This is the ezmlm program. I'm managing the comm...@nuttx.apache.org
mailing list.
Acknowledgment: The address
david.sidr...@nscdg.com
was not on t
are now going to commits@ which you can filter
out or simply unsubscribe.
On Fri, Feb 5, 2021 at 11:40 AM David Sidrane
wrote:
>
> Anyone else getting repeated emails from the GitBox?
>
>
>
> -Original Message-
> From: GitBox [mailto:g...@apache.org]
> Sent: Friday
Anyone else getting repeated emails from the GitBox?
-Original Message-
From: GitBox [mailto:g...@apache.org]
Sent: Friday, February 05, 2021 2:29 AM
To: comm...@nuttx.apache.org
Subject: [GitHub] [incubator-nuttx] xiaoxiang781216 merged pull request
#2805: imxrt1060 iperf
xiaoxiang781
completes
We set it manually right?
I mean after reviewing we can set the PR to be merged when the CI
checks are done?
On Fri, Feb 5, 2021 at 10:53 AM David Sidrane
wrote:
>
> Hi,
>
> I saw a new option for merging in GH Auto merge when CI completes.
>
> What is the group's opinion
Hi,
I saw a new option for merging in GH Auto merge when CI completes.
What is the group's opinion on having this enabled?
David
My recollection is there is the standard interface common to all PHY (first
16 regs). The only setting needed is the base address.
Only once CONFIG_STM32H7_AUTONEG is enabled, one of the other 2 sets are
needed chosen by CONFIG_STM32H7_PHYSR_ALTCONFIG.
The issue you face is the mapping. You could
Hi Brennen,
I have not tested with vscode in a bit. But the issue for me before was the
edit ability of registers on IP blocks and CPU. Ben may be referring to the
hard fault debugging technique I presented at the NuttX conference 2 years
ago. It is a simple cut and paste from the LR to the IP reg
Hi Matais,
I use GNU ARM Eclipse http://gnuarmeclipse.github.io/ but it is now
https://eclipse-embed-cdt.github.io/
I value it for the Segger debugger integration and SVD support.
I use make file builds imported from git.
I use a lot of the PX4 boards the FMUv2 2.4.6 (Pixhawk2), FMUv4 (Pixracer
ed off all uart DMA just in case, but it didn't help.
вт, 24 нояб. 2020 г. в 21:45, David Sidrane :
> Hi Oleg,
>
> See inline [DBS]
>
> David
> -Original Message-
> From: Oleg Evseev [mailto:ev.m...@gmail.com]
> Sent: Tuesday, November 24, 2020 9:46 AM
>
m (but maybe it depends on delays and may appear again
once there will be more commands on boot for instance, I don't know).
Quite a strange behaviour for now.
вт, 24 нояб. 2020 г. в 17:12, David Sidrane :
> Oleg,
>
> Have you scoped the interface?
>
> For gins and giggles try
Oleg,
Have you scoped the interface?
For gins and giggles try reducing the SPI clock drive strength. Step it down
and retest.
David
-Original Message-
From: Oleg Evseev [mailto:ev.m...@gmail.com]
Sent: Tuesday, November 24, 2020 4:57 AM
To: dev@nuttx.apache.org
Subject: STM32F4 SPI DMA
/incubator-nuttx/issues/1494
The problem is making it work for nshocram configuration. I cannot seem to
understand what that linking error means.
Thank you.
Vadim
>Понедельник, 23 ноября 2020, 19:09 +03:00 от David Sidrane
>:
>
>Hi Vadim,
>
>I do not recall all the deltas fr
Hi Vadim,
I do not recall all the deltas from the 1062 to the 1064. But the 1064 may
have other IP changes, and memory map differences
You should create a board new directory imxrt1060-evk. And make the changes
there.
You will need to know what kind of memory is embedded. Hyper flash or QSPI
Al
;> https://os.mbed.com/blog/entry/Optimizing-memory-usage-in-mbed-OS-52/
>>
>> They went into 'rabbit's hole' to solve an issue that we don't have
>> yet, but if nobody keep an eye on it soon we will have.
>>
>> BR,
>>
>> Alan
>>
> Do you think this is due to the
I would say so.
I agree better debugging out of the box is a good way to go. We have to
weigh that against the past goal of: Minimum size image. It was a first
impression thing. This was why debug had to be tuned off in all Kconfig.
The first question to ask
To help filter the emails
Please add a subject to the PR titles
Fix compile break ---> readline:Fix compile break
Are you running any PX4IO drivers or RC input?
-Original Message-
From: Oleg Evseev [mailto:ev.m...@gmail.com]
Sent: Wednesday, November 11, 2020 3:09 AM
To: dev@nuttx.apache.org
Subject: Serial console strange behaviour
Hi,
Custom board stm32f7, PX4 based project - moved from NuttX 8.2
> But the priority difference doesn't imply that the nested interrupt
> happens
automatically, you have to enable the interrupt manually after the critical
CPU register and OS state is saved.
My recollection is it depends on the priority assigned to the interrupt and
the fence level used (NVIC_SYS
Nuttx does not support nested iteruups. In fact if you enable
prioritization, you will get random crashes due to the reentrace to the
common isr.
On Sun, Oct 25, 2020, 1:52 PM Matias N. wrote:
> Hi,
> while working on nRF52 BLE link-layer I experienced some problems due to
> delayed ISRs. This c
Thank you Brennan for all your efforts!
David
-Original Message-
From: Brennan Ashton [mailto:bash...@brennanashton.com]
Sent: Sunday, October 18, 2020 10:25 PM
To: dev@nuttx.apache.org
Subject: Re: [DISCUSS] NuttX 10.0.0 Release schedule
On Sat, Oct 17, 2020 at 6:37 AM Abdelatif Guettou
Hi Edi,
You would fork https://github.com/apache/incubator-nuttx and submit a PR
from your fork.
I will have a look at the PR on Monday when I back at the computer.
David
*From:* Eduard Niesner [mailto:niesneredu...@gmail.com]
*Sent:* Friday, October 16, 2020 10:28 AM
*To:* dev@nuttx.ap
Hi Fotis,
>NuttX is not able to boot at all with this option selected. I stepped
>through the code and it seems that nxsig_initialize actually causes a stack
>overflow that is detected by the above check.
>Is this a bug, or I should configure something in a different way?
Have you seen
https://c
Hi Johannes & Jukka,
Thank you for looking into this, I just wanted to mention something, so it
does not get over looked, if it is still appropriate:
In the past (9 or so years ago) there was an issue with floating point that
required the stack to be 8 byte aligned. It was too long ago, so I do n
time.
On Thu, Sep 17, 2020 at 4:02 PM Gregory Nutt wrote:
> On 9/17/2020 1:59 PM, David Sidrane wrote:
> > Is the only option for using the network monitor
> >
> > Hi,
> >
> > My goal is to have a run time option to use a static IP or DHCP.
> (Curretly
&
Hi Greg,
Thank you responding. Then I will I will test it.
-Original Message-
From: Gregory Nutt [mailto:spudan...@gmail.com]
Sent: Thursday, September 17, 2020 1:03 PM
To: dev@nuttx.apache.org
Subject: Re: Is the only option for using the network monitor
On 9/17/2020 1:59 PM, David
Is the only option for using the network monitor
Hi,
My goal is to have a run time option to use a static IP or DHCP. (Curretly
it is compile time)
If either are used I want to "auto up" the eth0. Once the interface comes up
, if configured for DHCP it should make start the DHCP request pro
PR's without adequate information
We are getting a slew of PR's without adequate information to consider
merging them. Some of the Titles are incomplete or misleading.
I am also concerned about bloat and the loss of one of NuttX major
advantages: Scalability.
I have no doubt, there is a great d
Hi Thomas,
If you structure the driver like any of the other ADC drivers in tree you
should be able to reference px4_arch_adc_init and px4_arch_adc_sample
from
https://github.com/PX4/Firmware/blob/master/platforms/nuttx/src/px4/nxp/im
xrt/adc/adc.cpp to get the required logic.
To fill in the mea
I was not suggesting the fix should be in the boot loader, I was just
commenting on what the right way to do a boot loader.
I am sure the F4/F7 serial drivers deal with the PE bits. It has many test
cases in the RC lib of PX4, it the low level stuff that most likely does not
work correctly
And sho
Nathan,
Sometimes the best results (on small systems) are obtained if boot loader
leaves the CPU as it found it out of reset.
If you think in terms of an OOD life cycle: The "Destructor" for each block
reset the HW to the reset state.
With this approach, the SoC out of reset, and executing at __
Some IP blocks need to be disabled to modify some registers.
David
On Thu, Sep 3, 2020, 3:45 PM Nathan Hartman
wrote:
> I ran into a strange issue with serial init for STM32. If the UART is
> already enabled/configured, our configuration does not seem to apply.
>
> I discovered this because I u
Hi Christian,
As long as there is a Knob in Kconfig to enable / disable each feature (that
defaults to disable) the impact is 0.
IIRC there is a history, and some fancy-ness that was added by Dave a while
ago. Good docs and an example defconfig would will keep it maintained (and
built). Once we h
+1 (I know it is not a vote, I am just agreeing)
-Original Message-
From: Brennan Ashton [mailto:bash...@brennanashton.com]
Sent: Wednesday, August 12, 2020 10:54 AM
To: dev@nuttx.apache.org
Subject: Re: Roadmap?
On Wed, Aug 12, 2020, 10:40 AM Adam Feuer wrote:
> Folks,
>
> I made a wik
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