https://bugs.freedesktop.org/show_bug.cgi?id=99349
Gert Wollny changed:
What|Removed |Added
Status|NEW |RESOLVED
Am Freitag, 8. September 2017, 09:23:09 CEST schrieb Mark yao:
> On 2017年09月07日 20:09, Heiko Stübner wrote:
> > Hi Mark,
> >
> > Am Donnerstag, 7. September 2017, 18:16:29 CEST schrieb Mark yao:
> >> Looks good for me, so:
> >> Reviewed-by: Mark Yao
> >>
> >> I'd like to
https://bugs.freedesktop.org/show_bug.cgi?id=100666
--- Comment #5 from Lucas Riutzel ---
$ ls /sys/class/drm/card*/device/hwmon/hwmon*/pwm*
/sys/class/drm/card0/device/hwmon/hwmon0/pwm1
/sys/class/drm/card0/device/hwmon/hwmon0/pwm1_enable
https://bugs.freedesktop.org/show_bug.cgi?id=100666
--- Comment #4 from Denis Denisov ---
$ ls /sys/class/drm/card*/device/hwmon/hwmon*/pwm*
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https://bugs.freedesktop.org/show_bug.cgi?id=100666
--- Comment #3 from Lucas Riutzel ---
I believe this is related. Might be a separate issue though.
I have an Asus RX550. With the amdgpu drive my fan is at what I believe is 100%
all the time. Though reporting doesn't work.
When binding the TCON, we were checking the reset control status and
asserting reset if it wasn't in reset. The check failed to account for
the reset control API returning error codes if the status callback was
not implemented.
Since we want the TCON to be reset in all cases, and re-asserting the
On 09/07/2017 08:27 PM, Marek Szyprowski wrote:
Hi Hoegeun,
On 2017-09-07 11:39, Hoegeun Kwon wrote:
Exynos 5250 and 5420 have different hardware rotation limits. However,
currently it uses only one compatible - "exynos5-gsc". Since we have
to distinguish between these two, we add different
On 09/07/2017 08:25 PM, Marek Szyprowski wrote:
Hi Hoegeun,
On 2017-09-07 07:16, Hoegeun Kwon wrote:
On 09/04/2017 03:19 PM, Hoegeun Kwon wrote:
On 09/01/2017 04:31 PM, Marek Szyprowski wrote:
Hi Hoegeun,
On 2017-09-01 03:47, Hoegeun Kwon wrote:
The gscaler has hardware rotation limits that
https://bugs.freedesktop.org/show_bug.cgi?id=102599
Michel Dänzer changed:
What|Removed |Added
Summary|Window decoration not being |[ShadowPrimary]
https://bugs.freedesktop.org/show_bug.cgi?id=102581
--- Comment #1 from Michel Dänzer ---
Please attach the corresponding glxinfo output.
FWIW, not seeing the problem on Kaveri with recent Git master.
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On 2017年09月07日 20:09, Heiko Stübner wrote:
Hi Mark,
Am Donnerstag, 7. September 2017, 18:16:29 CEST schrieb Mark yao:
Looks good for me, so:
Reviewed-by: Mark Yao
I'd like to apply these lvds patches tomorrow if there is no more doubts.
Rob had some minor comments
https://bugs.freedesktop.org/show_bug.cgi?id=102599
--- Comment #3 from Julian ---
Without the "ShadowPrimary" option the windows are rendered correctly :)
Thanks!
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https://bugs.freedesktop.org/show_bug.cgi?id=102595
--- Comment #3 from Benji Wiebe ---
Created attachment 134061
--> https://bugs.freedesktop.org/attachment.cgi?id=134061=edit
Better stack trace
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https://bugs.freedesktop.org/show_bug.cgi?id=102595
--- Comment #2 from Benji Wiebe ---
New backtrace with debugging turned on. It appears that the issue is a NULL
pointer dereference in r600_resource_copy_region (dst). In
compute_memory_promote_item, pool->bo is NULL
https://bugs.freedesktop.org/show_bug.cgi?id=102599
--- Comment #2 from Michel Dänzer ---
Does this happen without Option "ShadowPrimary"?
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https://bugs.freedesktop.org/show_bug.cgi?id=102599
--- Comment #1 from Julian ---
Created attachment 134060
--> https://bugs.freedesktop.org/attachment.cgi?id=134060=edit
White border instead of actual decoration
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https://bugs.freedesktop.org/show_bug.cgi?id=102599
Bug ID: 102599
Summary: Window decoration not being painted with DRI3 and
Compiz-Reloaded+Emerald
Product: DRI
Version: unspecified
Hardware: x86-64 (AMD64)
https://bugs.freedesktop.org/show_bug.cgi?id=102500
--- Comment #11 from Arek Ruśniak ---
on mesa side looks like this is it:
214b565bc28bc4419f3eec29ab7bbe34080459fe is the first bad commit
commit 214b565bc28bc4419f3eec29ab7bbe34080459fe
Author: Christian König
This makes use of the drm_simple_display_pipe_attach_bridge()
call and removes the two calls removing the bridge, which were
erroneous: they unregister the bridge which is not what
we want, we just want to unreference it and that is already
handled by the core.
Signed-off-by: Linus Walleij
On 8 September 2017 at 06:03, Rodrigo Vivi wrote:
> Hi Linus,
>
> Since Dave is on paternity leave we are sending drm/i915 fixes for
> v4.14-rc1 directly to you as he had asked us to do.
>
> The most critical ones are the GPU reset fix for gen2-4 and GVT fix
> for a
https://bugs.freedesktop.org/show_bug.cgi?id=99553
Jan Vesely changed:
What|Removed |Added
Depends on||102595
Referenced
https://bugs.freedesktop.org/show_bug.cgi?id=102595
Jan Vesely changed:
What|Removed |Added
Blocks||99553
Referenced
https://bugs.freedesktop.org/show_bug.cgi?id=100387
--- Comment #10 from aceman ---
I'd assume "AMD A8-7600 with onchip Radeon R7" uses the separate radeonSI mesa
driver and may not have this problem reported in this bug. Notice the bug is
against R600 driver.
I asked about
On Wed, Sep 06, 2017 at 04:53:06PM -0700, Eric Biggers wrote:
> From: Eric Biggers
>
> IDR only supports non-negative IDs. There used to be a
> 'WARN_ON_ONCE(id < 0)' in idr_replace(), but it was intentionally
> removed by commit 2e1c9b286765 ("idr: remove WARN_ON_ONCE() on
https://bugs.freedesktop.org/show_bug.cgi?id=97259
Chris Wilson changed:
What|Removed |Added
Status|NEW |RESOLVED
https://bugs.freedesktop.org/show_bug.cgi?id=102595
--- Comment #1 from Benji Wiebe ---
Created attachment 134057
--> https://bugs.freedesktop.org/attachment.cgi?id=134057=edit
Stack trace from coredump
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https://bugs.freedesktop.org/show_bug.cgi?id=102595
Bug ID: 102595
Summary: clpeak
Product: Mesa
Version: git
Hardware: x86-64 (AMD64)
OS: Linux (All)
Status: NEW
Severity: normal
Priority:
https://bugs.freedesktop.org/show_bug.cgi?id=102500
--- Comment #10 from Arek Ruśniak ---
additional info:
I try figure out why in my earlier test everything went ok and probably mesa is
the trigger,
Linux-amd-staging + Mesa-git + LLVM-svn - failure
Linux-amd-staging +
Hi Linus,
Since Dave is on paternity leave we are sending drm/i915 fixes for
v4.14-rc1 directly to you as he had asked us to do.
The most critical ones are the GPU reset fix for gen2-4 and GVT fix
for a regression that is blocking gvt init to work on your tree.
The rest is general fixes for
Quoting Gustavo Padovan (2017-09-07 20:02:46)
> From: Dominik Behr
>
> To avoid hanging userspace components that might have been waiting on the
> active fences of the destroyed timeline we need to signal with error all
> remaining fences on such timeline.
>
> This restore
Quoting Gustavo Padovan (2017-09-07 20:02:45)
> From: Emilio López
>
> If a sw_sync_timeline is destroyed the fences associated to it need
> to be signalled. This test checks that.
>
> Cc: Shuah Khan
> Cc: linux-kselft...@vger.kernel.org
>
From: Dominik Behr
To avoid hanging userspace components that might have been waiting on the
active fences of the destroyed timeline we need to signal with error all
remaining fences on such timeline.
This restore the default behaviour of the Android sw_sync framework, which
From: Emilio López
If a sw_sync_timeline is destroyed the fences associated to it need
to be signalled. This test checks that.
Cc: Shuah Khan
Cc: linux-kselft...@vger.kernel.org
Signed-off-by: Emilio López
On Thu, 2017-09-07 at 14:04 -0400, Lyude Paul wrote:
> Looks good to me.
>
> Reviewed-by: Lyude Paul
>
Thanks for the review.
-DK
> On Wed, 2017-09-06 at 17:14 -0700, Dhinakaran Pandiyan wrote:
> > The POWER_DOWN_PHY and POWER_UP_PHY sideband message transactions
> >
https://bugs.freedesktop.org/show_bug.cgi?id=102552
Pauk Denis changed:
What|Removed |Added
Attachment #133978|0 |1
is
On Tue, Sep 5, 2017 at 9:43 PM, Eric Anholt wrote:
> Daniel Vetter writes:
>
>> On Fri, Sep 01, 2017 at 11:46:29AM +0200, Linus Walleij wrote:
>>> If we cannot find a panel, assume that the output from the
>>> PL111 is connected directly to a "dumb" VGA
On Thu, Sep 7, 2017 at 6:12 PM, Noralf Trønnes wrote:
>
> Den 07.09.2017 14.59, skrev Linus Walleij:
>>
>> On Mon, Sep 4, 2017 at 9:43 AM, Daniel Vetter wrote:
>>>
>>> On Fri, Sep 01, 2017 at 11:46:29AM +0200, Linus Walleij wrote:
If we cannot find
https://bugs.freedesktop.org/show_bug.cgi?id=102417
Chris Wilson changed:
What|Removed |Added
Assignee|intel-gfx-bugs@lists.freede
https://bugzilla.kernel.org/show_bug.cgi?id=196615
--- Comment #15 from dolohow (dolo...@outlook.com) ---
Sure, it's a Linus tree
> Revert "drm/amdgpu: fix vblank_time when displays are off"
>
> This reverts commit 2dc1889.
>
> Fixes a suspend and resume regression.
>
> bug:
Looks good to me.
Reviewed-by: Lyude Paul
On Wed, 2017-09-06 at 17:14 -0700, Dhinakaran Pandiyan wrote:
> The POWER_DOWN_PHY and POWER_UP_PHY sideband message transactions
> allow
> the source to reqest any node in a mst path or a whole path to be
> powered down or up. This
https://bugzilla.kernel.org/show_bug.cgi?id=196615
Harry Wentland (harry.wentl...@amd.com) changed:
What|Removed |Added
CC|
https://bugzilla.kernel.org/show_bug.cgi?id=196615
dolohow (dolo...@outlook.com) changed:
What|Removed |Added
CC||dolo...@outlook.com
---
On Wed, Sep 06, 2017 at 04:36:01PM +0200, Nicolas Dechesne wrote:
> Hi,
>
> This pull request adds firmware for adreno a3xx GPU found for example
> on the APQ8016 chipset, used on the Dragonboard 410c.
>
> The following changes since commit 9d40a17beaf271e6ad47a5e714a296100eef4692:
>
>
Linus Walleij writes:
> This replaces the custom connector in the PL111 with the
> panel bridge helper.
>
> This works nicely for all standard panels, but since there
> are several PL11x-based systems that will need to use the dumb
> VGA connector bridge we use
https://bugs.freedesktop.org/show_bug.cgi?id=102543
--- Comment #5 from Chris Wilson ---
commit d7a133d886b45651e36e7065998b1413d379ac1f
Author: Chris Wilson
Date: Thu Sep 7 14:44:41 2017 +0100
drm/i915: Disable mmio debugging during
https://bugs.freedesktop.org/show_bug.cgi?id=97820
--- Comment #10 from Hector Velazquez
---
The following tests FAIL on SKL
Tests List:
igt@gem_reset_stats@reset-stats-bsd
igt@gem_reset_stats@reset-stats-default
Den 07.09.2017 14.59, skrev Linus Walleij:
On Mon, Sep 4, 2017 at 9:43 AM, Daniel Vetter wrote:
On Fri, Sep 01, 2017 at 11:46:29AM +0200, Linus Walleij wrote:
If we cannot find a panel, assume that the output from the
PL111 is connected directly to a "dumb" VGA connector,
so
https://bugs.freedesktop.org/show_bug.cgi?id=100596
--- Comment #18 from Hector Velazquez
---
Sorry, this test was not executed and is not part of this bug... :
igt@kms_sysfs_edid_timing
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https://bugs.freedesktop.org/show_bug.cgi?id=100596
Hector Velazquez changed:
What|Removed |Added
https://bugs.freedesktop.org/show_bug.cgi?id=100596
--- Comment #17 from Hector Velazquez
---
The following tests PASS on SKL
Tests List:
igt@kms_sysfs_edid_timing
igt@gem_userptr_blits@map-fixed-invalidate-busy-gup
https://bugs.freedesktop.org/show_bug.cgi?id=102358
--- Comment #19 from Thomas Hellström ---
What happens if you run in windowed mode + vsync?
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On Mon, Sep 4, 2017 at 11:51 AM, Laurent Pinchart
wrote:
> On Monday, 4 September 2017 10:43:55 EEST Daniel Vetter wrote:
>> On Fri, Sep 01, 2017 at 11:46:29AM +0200, Linus Walleij wrote:
>> Wrt the more general problem: They way we solve this in the i915
On Mon, Sep 4, 2017 at 9:43 AM, Daniel Vetter wrote:
> On Fri, Sep 01, 2017 at 11:46:29AM +0200, Linus Walleij wrote:
>> If we cannot find a panel, assume that the output from the
>> PL111 is connected directly to a "dumb" VGA connector,
>> so look up the connector from that
The ARM reference designs in the Versatile family: Integrator,
Versatile and RealView can make use of the new DRM driver as well.
We just need to create a bit of platform-specific code for them
that we isolate to its own file.
Reviewed-by: Eric Anholt
Signed-off-by: Linus
The old codebase has a delay between enabling and powering up the
PL11x.
According to the manual for PL110, ARM DDI 0161E page 1-5 and
the PL111 manual ARM DDI 0293C page 1-6, the power sequence should
be such that once Vdd is stable (which we assume it is at boot)
LCDEN is enabled first and then
The silcon and components around the PL111 may require some
variants to perform special set-up of the display. Add two
callbacks to manage this.
Reviewed-by: Eric Anholt
Signed-off-by: Linus Walleij
---
ChangeLog v2->v3:
- Rebase on DRM-TIP
ChangeLog
We detect and enable the use of the PL110 variant, an earlier
incarnation of PL111. The only real difference is that the
control and interrupt enable registers have swapped place.
The Versatile AB and Versatile PB have a variant inbetween
PL110 and PL111, it is PL110 but they have already swapped
This replaces the custom connector in the PL111 with the
panel bridge helper.
This works nicely for all standard panels, but since there
are several PL11x-based systems that will need to use the dumb
VGA connector bridge we use drm_of_find_panel_or_bridge()
and make some headroom for dealing with
This adds all the main control registers to the debugfs
register file. This was helpful for my debugging so it will
likely help others as well.
Reviewed-by: Eric Anholt
Signed-off-by: Linus Walleij
---
ChangeLog v2->v3:
- Rebase on DRM-TIP
ChangeLog
The header file contains prototypes for two nonexisting
functions. Get rid of them.
Reviewed-by: Eric Anholt
Signed-off-by: Linus Walleij
---
ChangeLog v2->v3:
- Rebase on DRM-TIP
ChangeLog v1->v2:
- Collect Eric's ACK.
---
On 09/07/2017 08:08 AM, Christian König wrote:
Am 06.09.2017 um 18:33 schrieb Leo Liu:
On 09/06/2017 11:51 AM, Christian König wrote:
From: Christian König
Use the VM instead of the BO list to find the BO for a virtual address.
This fixes UVD/VCE in physical
Hi Mark,
Am Donnerstag, 7. September 2017, 18:16:29 CEST schrieb Mark yao:
> Looks good for me, so:
> Reviewed-by: Mark Yao
>
> I'd like to apply these lvds patches tomorrow if there is no more doubts.
Rob had some minor comments on v7 of the dt-binding, so you may
Am 06.09.2017 um 18:33 schrieb Leo Liu:
On 09/06/2017 11:51 AM, Christian König wrote:
From: Christian König
Use the VM instead of the BO list to find the BO for a virtual address.
This fixes UVD/VCE in physical mode with VM local BOs.
The series is
Tested-by:
Hi Hoegeun,
On 2017-09-07 11:39, Hoegeun Kwon wrote:
The gscaler has hardware rotation limits that need to be hardcoded
into driver. Distinguish them and add them to the property list.
The hardware rotation limits are related to the cropped source size.
When swap occurs, use rot_max size
Hi Hoegeun,
On 2017-09-07 11:39, Hoegeun Kwon wrote:
Exynos 5250 and 5420 have different hardware rotation limits. However,
currently it uses only one compatible - "exynos5-gsc". Since we have
to distinguish between these two, we add different compatible.
Signed-off-by: Hoegeun Kwon
Hi Hoegeun,
On 2017-09-07 07:16, Hoegeun Kwon wrote:
On 09/04/2017 03:19 PM, Hoegeun Kwon wrote:
On 09/01/2017 04:31 PM, Marek Szyprowski wrote:
Hi Hoegeun,
On 2017-09-01 03:47, Hoegeun Kwon wrote:
The gscaler has hardware rotation limits that need to be imported from
dts. Parse them and
https://bugs.freedesktop.org/show_bug.cgi?id=102581
Bug ID: 102581
Summary: 3D texture mipmapping broken
Product: Mesa
Version: 17.1
Hardware: x86-64 (AMD64)
OS: Linux (All)
Status: NEW
Severity: normal
Op 07-09-17 om 12:05 schreef Daniel Vetter:
> On Mon, Sep 04, 2017 at 12:48:37PM +0200, Maarten Lankhorst wrote:
>> Currently we neatly track the crtc state, but forget to look at
>> plane/connector state.
>>
>> When doing a nonblocking modeset, immediately followed by a setprop
>> before the
https://bugs.freedesktop.org/show_bug.cgi?id=102358
--- Comment #18 from Thomas Hellström ---
FWIW, I got it running under dri3/vsync with the svga driver with no apparent
issue.
It also runs fine with modesetting/svga although there is no true vsync since
the kernel
Hi Sandy
Looks good for me, so:
Reviewed-by: Mark Yao
I'd like to apply these lvds patches tomorrow if there is no more doubts.
Best Regards
Mark
On 2017年09月02日 19:28, Sandy Huang wrote:
This adds support for Rockchip soc lvds found on rk3288
Based on the patches
On Mon, Sep 04, 2017 at 12:48:37PM +0200, Maarten Lankhorst wrote:
> Currently we neatly track the crtc state, but forget to look at
> plane/connector state.
>
> When doing a nonblocking modeset, immediately followed by a setprop
> before the modeset completes, the setprop will see the modesets
On Mon, Sep 04, 2017 at 12:48:36PM +0200, Maarten Lankhorst wrote:
> This will allow code to do x->commit = drm_crtc_commit_get(commit),
> making it clearer where references are used.
>
> Signed-off-by: Maarten Lankhorst
Reviewed-by: Daniel Vetter
On Mon, Sep 04, 2017 at 12:48:33PM +0200, Maarten Lankhorst wrote:
> The next commit removes the wait for flip_done in in
> drm_atomic_helper_commit_cleanup_done, but we need it for the tests
> to pass. Instead of using complicated vblank tracking which ends
> up being ignored anyway, call the
https://bugs.freedesktop.org/show_bug.cgi?id=102543
--- Comment #4 from Chris Wilson ---
E.g. https://patchwork.freedesktop.org/series/29935/
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Exynos 5250 and 5420 have different hardware rotation limits.
Since we have to distinguish between these two, we add different
compatible(samsung,exynos5250-gsc and samsung,exynos5420-gsc).
Signed-off-by: Hoegeun Kwon
---
Hello all,
The gscaler has hardware rotation limits. So this patch set support
the rotate hardware limits of gsc.
Changes for V2:
- Added the interface info in binding document.
- Added clean name of compatible in Exynos dts.
- Added maximum supported picture size hardcoded into driver.
Best
Exynos 5250 and 5420 have different hardware rotation limits. However,
currently it uses only one compatible - "exynos5-gsc". Since we have
to distinguish between these two, we add different compatible.
Signed-off-by: Hoegeun Kwon
---
arch/arm/boot/dts/exynos5250.dtsi
The gscaler has hardware rotation limits that need to be hardcoded
into driver. Distinguish them and add them to the property list.
The hardware rotation limits are related to the cropped source size.
When swap occurs, use rot_max size instead of crop_max size.
Also the scaling limits are
Hi,
On 08/31/2017 09:25 PM, Boris Brezillon wrote:
Add a driver for Cadence DPI -> DSI bridge.
This driver only support a subset of Cadence DSI bridge capabilities.
Here is a non-exhaustive list of missing features:
* burst mode
* dynamic configuration of the DPHY based on the
* support
https://bugs.freedesktop.org/show_bug.cgi?id=102543
--- Comment #3 from Chris Wilson ---
>From our pov, no. The highlighted commit was just the merge to 4.13. But the
failure does depend upon i915 doing something during the test, but the test
itself bypasses i915 for
On 2017年09月07日 15:13, Christian König wrote:
Ping? David can you take a look?
Alex is on vacation and that is a rather important bug fix.
Thanks,
Christian.
Am 04.09.2017 um 21:02 schrieb Christian König:
From: Christian König
Stop requiring that the src
https://bugs.freedesktop.org/show_bug.cgi?id=102543
--- Comment #2 from Martin Peres ---
The test has been passing recently. Has anything changed?
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Hi Laurent,
On 05.09.2017 17:05, Laurent Pinchart wrote:
> Hi Maciej,
>
> On Tuesday, 5 September 2017 16:01:54 EEST Maciej Purski wrote:
>> Hi Laurent,
>>
>> Thank you for your reply. The problem was already discussed when adding
>> sil8620 driver. It can be solved later. I'm CC-ing Andrzej
Acked-by: Chunming Zhou
On 2017年09月05日 03:02, Christian König wrote:
From: Christian König
With shared reservation objects __ttm_bo_reserve() can easily fail even on
destroyed BOs. This prevents correct handling when we need to individualize
https://bugs.freedesktop.org/show_bug.cgi?id=102242
Martin Peres changed:
What|Removed |Added
Status|RESOLVED|CLOSED
---
Ping? David can you take a look?
Alex is on vacation and that is a rather important bug fix.
Thanks,
Christian.
Am 04.09.2017 um 21:02 schrieb Christian König:
From: Christian König
Stop requiring that the src reservation object is locked for this operation.
https://bugs.freedesktop.org/show_bug.cgi?id=102574
Bug ID: 102574
Summary: glDrawBuffer crashes in case of surfaceless context
Product: Mesa
Version: 17.1
Hardware: x86-64 (AMD64)
OS: Linux (All)
Status: NEW
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