DP firmware uses fixed phy config values to do training, but some
boards need to adjust these values to fit for their unique hardware
design. So get phy config values from dts and use software link training
instead of relying on firmware, if software training fail, keep firmware
training as a
From: Lima Project Developers
Signed-off-by: Qiang Yu
Signed-off-by: Marek Vasut
Signed-off-by: Heiko Stuebner
---
drivers/gpu/drm/lima/lima_mmu.c | 154
the phy config values used to fix in dp firmware, but some boards
need change these values to do training and get the better eye diagram
result. So support that in phy driver.
Signed-off-by: Chris Zhong
Signed-off-by: Lin Huang
---
Changes in v2:
-
From: Chris Zhong
We may support training outside firmware, so we need support
dpcd read/write to get the message or do some setting with
display.
Signed-off-by: Chris Zhong
Signed-off-by: Lin Huang
Reviewed-by: Sean Paul
From: Lima Project Developers
Signed-off-by: Qiang Yu
Signed-off-by: Heiko Stuebner
Signed-off-by: Erico Nunes
---
drivers/gpu/drm/lima/lima_drv.c | 466
Hi Linus,
On 17/05/18 10:04, Linus Walleij wrote:
> On Wed, May 9, 2018 at 6:44 PM, Sudeep Holla wrote:
>
>> Please copy me and Lorenzo also in future.
>> Applied now(with typo in hierarchy fixed), thanks.
>
> Sure thing, sorry I didn't realize you were working actively
Sorry, I'm preparing RFC for lima driver, this mail is send by accident.
Will resend a formal one latter.
Regards,
Qiang
On Fri, May 18, 2018 at 11:16 AM, Qiang Yu wrote:
> From: Lima Project Developers
>
> Signed-off-by: Qiang Yu
On 2018-05-16 12:56, Andrzej Hajda wrote:
I suppose you wanted to respond on the list, so I have added back all
recipients.
On 16.05.2018 06:39, spa...@codeaurora.org wrote:
On 2018-05-15 19:23, Andrzej Hajda wrote:
On 15.05.2018 07:52, Sandeep Panda wrote:
Add support for TI's sn65dsi86
From: Lima Project Developers
PP is a processor used for OpenGL fragment shader
processing.
Signed-off-by: Qiang Yu
Signed-off-by: Heiko Stuebner
---
drivers/gpu/drm/lima/lima_pp.c | 418 +
On 17 May 2018 at 16:55, Peter Jones wrote:
> On Thu, May 17, 2018 at 09:22:23AM -0400, Sinan Kaya wrote:
>> A host bridge is allowed to remap BAR addresses using _TRA attribute in
>> _CRS windows.
>>
>> pci_bus :00: root bus resource [mem 0x8010010-0x8011fff
On Thu, May 17, 2018 at 02:15:40PM +0100, Daniel Stone wrote:
> Hi Russell,
>
> On 30 March 2018 at 15:11, Daniel Stone wrote:
> > Since drm_framebuffer can now store GEM objects directly, place them
> > there rather than in our own subclass. As this makes the framebuffer
Hi David,
I don't see this in what I presume is your tree yet - do you have some
concern about merging this series?
Thanks.
On Tue, Apr 24, 2018 at 10:54:56AM +0100, Russell King wrote:
> David,
>
> Please incorporate support for TDA998x I2C driver CEC, which can be
> found at:
>
>
On 2018-05-17 18:01, Rob Herring wrote:
On Thu, May 17, 2018 at 4:47 AM, wrote:
On 2018-05-08 15:55, kgu...@codeaurora.org wrote:
On 2018-05-07 21:50, Bjorn Andersson wrote:
On Thu 03 May 02:57 PDT 2018, Kiran Gunda wrote:
WLED4 peripheral is present on some PMICs
Hi All,
Good day!
I’ve been doing some PTN3460 programming under Linux using C/C++ and I have
some questions regarding on setting the brightness level to my display device.
The display device with PTN3460 is connected in DP (display port) to my
computer. Only needs a DisplayPort native AUX
We report the crash:
"KASAN: use-after-free Read in vgacon_invert_region"
This crash was found in v4.17-rc3. Specifically, memory access (read
operation) is invalid, and it is detected by KASAN.
C repro code:
https://kiwi.cs.purdue.edu/static/alexkkid-fuzzer/repro-ba6c1.c
kernel config:
If want to do training outside DP Firmware, need phy voltage swing
and pre_emphasis value.
Signed-off-by: Lin Huang
---
Changes in v2:
- None
Changes in v3:
- modify property description and add this property to Example
Change in v4:
- None
Change in v5:
- None
From: Lima Project Developers
Signed-off-by: Qiang Yu
Signed-off-by: Simon Shields
Signed-off-by: Heiko Stuebner
---
drivers/gpu/drm/lima/lima_device.c | 407 +
On 5/17/2018 6:17 AM, Robin Murphy wrote:
>> + }
>> +
>
> Is this not pretty much just pcibios_bus_to_resource()?
>
Agreed, let me convert the code to use pcibios_bus_to_resource() API.
I wasn't aware of its existence.
> Robin.
--
Sinan Kaya
Qualcomm Datacenter Technologies, Inc. as an
On Wed, May 16, 2018 at 08:55:06PM -0300, Rodrigo Siqueira wrote:
> This series of patches add a centralized initialization mechanism, a
> single CRTC with a plane, an encoder, and extra module information.
>
> Changes in v2:
> - Remove unused definitions
> - Improve file names
> - Improve
From: Lima Project Developers
Signed-off-by: Qiang Yu
Signed-off-by: Heiko Stuebner
---
drivers/gpu/drm/lima/lima_regs.h | 304 +++
1 file changed, 304 insertions(+)
create mode 100644
Hi,
As I already commented[1], I think that it is not proper in order to pass
the devfreq instance to power_domain driver by separate defined function
(rockchip_pm_register_dmcfreq_notifier()).
[1] https://patchwork.kernel.org/patch/10349571/
Maybe, you could check the 'OF graph[1]' or 'device
On 23.04.2018 09:57, Thierry Reding wrote:
> From: Thierry Reding
>
> The IOVA API uses a memory cache to allocate IOVA nodes from. To make
> sure that this cache is available, obtain a reference to it and release
> the reference when the cache is no longer needed.
>
> On
+ Kishon
On Thursday, May 17, 2018 09:51 PM, Sean Paul wrote:
On Thu, May 17, 2018 at 05:18:00PM +0800, Lin Huang wrote:
DP firmware uses fixed phy config values to do training, but some
boards need to adjust these values to fit for their unique hardware
design. So get phy config values from
On 2018-05-08 15:55, kgu...@codeaurora.org wrote:
On 2018-05-07 21:50, Bjorn Andersson wrote:
On Thu 03 May 02:57 PDT 2018, Kiran Gunda wrote:
WLED4 peripheral is present on some PMICs like pmi8998
and pm660l. It has a different register map and also
configurations are different. Add support
On Wed, May 16, 2018 at 11:59:32AM +0300, Sergei Shtylyov wrote:
> Hello!
>
> On 5/16/2018 10:54 AM, Simon Horman wrote:
>
> > > Add support for the R-Car D3 (R8A77995) SoC to the LVDS encoder driver.
> > >
> > > Signed-off-by: Ulrich Hecht
> > > ---
> > >
A host bridge is allowed to remap BAR addresses using _TRA attribute in
_CRS windows.
pci_bus :00: root bus resource [mem 0x8010010-0x8011fff window]
(bus address [0x0010-0x1fff])
pci :02:00.0: reg 0x10: [mem 0x8011e00-0x8011eff]
When a VGA device is behind such
From: Lima Project Developers
Signed-off-by: Qiang Yu
Signed-off-by: Heiko Stuebner
---
drivers/gpu/drm/lima/lima_pmu.c | 85 +
drivers/gpu/drm/lima/lima_pmu.h | 30
2 files
On Thu, 2018-05-17 at 16:55 +0200, Thierry Reding wrote:
> On Thu, May 17, 2018 at 09:58:19AM -0400, Sean Paul wrote:
> > On Fri, Mar 30, 2018 at 03:11:22PM +0100, Daniel Stone wrote:
> > > A FB with no object is something we should be shouting very loudly
> > > about, not quietly logging as
Mali-DP display processors are able to write the composition result to a
memory buffer via the SE.
Add entry points in the HAL for enabling/disabling this feature, and
implement support for it on DP650 and DP550. DP500 acts differently and
so is omitted from this change.
Changes since v3:
- Fix
Annotate the pixel format matrix for DP500 with the memory-write flag
for formats that are supported by the SE memwrite engine.
Signed-off-by: Liviu Dudau
---
drivers/gpu/drm/arm/malidp_hw.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git
Hi,
Updating the Mali DP memory writeback engine support series to match
the latest generic writeback connector support posted here [1]. As the
generic patches look ready to be merged into drm-misc-next, I'm sending
the updated Mali DP driver as well.
Changelog:
- v7: Added support for DP500
From: Brian Starkey
Mali-DP has a memory writeback engine which can be used to write the
composition result to a memory buffer. Expose this functionality as a
DRM writeback connector on supported hardware.
Changes since v1:
Daniel Vetter:
- Don't require a modeset when
Mali DP500 behaves differently from the rest of the Mali DP IP,
in that it does not have a one-shot mode and keeps writing the
content of the current frame to the provided memory area until
stopped. As a way of emulating the one-shot behaviour, we are
going to use the CVAL interrupt that is being
From: Brian Starkey
Add a layer bit for the SE memory-write, and add it to the pixel format
matrix for DP550/DP650.
Signed-off-by: Brian Starkey
[rebased and fixed conflicts]
Signed-off-by: Mihail Atanassov
Signed-off-by:
Am Freitag, 18. Mai 2018, 03:45:46 CEST schrieb Brian Norris:
> On Thu, May 17, 2018 at 6:41 PM, hl wrote:
> > On Thursday, May 17, 2018 09:51 PM, Sean Paul wrote:
> >> On Thu, May 17, 2018 at 05:18:00PM +0800, Lin Huang wrote:
> >>> DP firmware uses fixed phy config values
On Mon, May 14, 2018 at 10:36:08PM +0200, Paul Kocialkowski wrote:
> > > + backlight: backlight {
> > > + compatible = "pwm-backlight";
> > > + pwms = < 0 5 PWM_POLARITY_INVERTED>;
> > > + brightness-levels = < 0 1 1 1 1 2 2 2
> > > +
On 05/17/2018 11:40 PM, Daniel Vetter wrote:
On Thu, May 17, 2018 at 11:18 PM, Thomas Hellstrom wrote:
On 05/17/2018 09:20 PM, Daniel Vetter wrote:
On Thu, May 17, 2018 at 8:23 PM, Thomas Hellstrom
wrote:
Hi!
I'm currently working on a remoting KMS
https://bugs.freedesktop.org/show_bug.cgi?id=106561
Bug ID: 106561
Summary: ./libdrm_macros.h:26:5: error: 'HAVE_VISIBILITY' is
not defined, evaluates to 0 [-Werror,-Wundef]
Product: DRI
Version: DRI git
Hardware: x86-64
The v3d_fence_create() only returns error pointers on error. It never
returns NULL.
Fixes: 57692c94dcbe ("drm/v3d: Introduce a new DRM driver for Broadcom V3D
V3.x+")
Signed-off-by: Dan Carpenter
diff --git a/drivers/gpu/drm/v3d/v3d_sched.c
On Fri, 2018-03-30 at 22:11 +0800, Daniel Stone wrote:
> Now that mtk_drm_fb is an empty wrapper around drm_framebuffer, we can
> just delete it.
>
Reviewed-by: CK Hu
> Signed-off-by: Daniel Stone
> Cc: CK Hu
> Cc: Philipp Zabel
"id" needs to be signed for the error handling to work.
Fixes: 7a2d5c77c558 ("drm/exynos: fimc: Convert driver to IPP v2 core API")
Signed-off-by: Dan Carpenter
diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimc.c
b/drivers/gpu/drm/exynos/exynos_drm_fimc.c
index
On Fri, 2018-03-30 at 22:11 +0800, Daniel Stone wrote:
> Since drm_framebuffer can now store GEM objects directly, place them
> there rather than in our own subclass. As this makes the framebuffer
> create_handle and destroy functions the same as the GEM framebuffer
> helper, we can reuse those.
>
On 2018-05-17 09:05 PM, Andrey Grodzovsky wrote:
> On 05/17/2018 10:48 AM, Michel Dänzer wrote:
>> On 2018-05-17 01:18 PM, Andrey Grodzovsky wrote:
>>> Hi Michele and others, I am trying to implement the approach bellow to
>>> resolve AMDGPU's hang when commands are stuck in pipe during process
Quoting Chris Wilson (2018-05-13 10:50:09)
> To no surprise (since we've flip-flopped over the use of PIN_HIGH a few
> times), doing a search by address over a pathologically fragmented
> address space is exceeding slow. To protect ourselves from nearly
> unbounded latency (think searching a
Am 18.05.2018 um 11:17 schrieb Michel Dänzer:
From: Michel Dänzer
Signed-off-by: Michel Dänzer
Reviewed-by: Christian König
---
xf86drm.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git
On Thu, 17 May 2018, John Sledge wrote:
> I’ve been doing some PTN3460 programming under Linux using C/C++ and I
> have some questions regarding on setting the brightness level to my
> display device.
>
> The display device with PTN3460 is connected in DP (display port) to
On Fri, May 18, 2018 at 03:15:22PM +0530, Jagan Teki wrote:
> From: Jernej Skrabec
>
> Some SoCs with DW HDMI have multiple possible clock parents, like A64
> and R40.
>
> Expand HDMI PHY clock driver to support second clock parent.
>
> Signed-off-by: Jernej Skrabec
On Thu, Apr 19, 2018 at 11:20:03PM +0200, Stefan Agner wrote:
> All values in a struct struct timing_entry (every entry in
> struct display_timing) require an integer. Choose the closest
> safe integer of 32.
>
> This avoids a warning seen with clang:
>
On Wed, May 16, 2018 at 12:22:04PM +0200, Emil Goode wrote:
> The compiler is complaining with the following errors:
>
> drivers/gpu/host1x/cdma.c:94:48: error:
> passing argument 3 of ‘dma_alloc_wc’ from incompatible pointer type
> [-Werror=incompatible-pointer-types]
>
>
Anyway, the kernel can't rely on userspace using O_CLOEXEC. If the flush
callback being called from multiple processes is an issue, maybe the
flush callback isn't appropriate after all.
Userspace could also grab a reference just by opening /proc/$pid/fd/*.
The idea is just that when any
Quoting Chris Wilson (2018-05-13 10:50:10)
> If we can use an unmappable ring, try to pin it out of the mappable
> aperture. This simple layout preference is to try and keep the mappable
> aperture reserved and available to handle GGTT mmapping requests from
> userspace without causing evictions
Quoting Joonas Lahtinen (2018-05-18 11:05:36)
> Quoting Chris Wilson (2018-05-13 10:50:09)
> > To no surprise (since we've flip-flopped over the use of PIN_HIGH a few
> > times), doing a search by address over a pathologically fragmented
> > address space is exceeding slow. To protect ourselves
On Wed, Apr 11, 2018 at 05:27:41PM +0200, Lucas Stach wrote:
> The patch adding support for the AUO P320HVN03 panel was written against a
> preliminary datasheet, which specified JEIDA data ordering. Testing with
> real hardware has shown that the actually used data ordering is SPWG.
>
> Fixes:
On Fri, May 18, 2018 at 09:56:20AM +0100, Brian Starkey wrote:
> Hi Liviu,
>
> On Fri, May 18, 2018 at 09:24:21AM +0100, Liviu Dudau wrote:
> > Mali DP500 behaves differently from the rest of the Mali DP IP,
> > in that it does not have a one-shot mode and keeps writing the
> > content of the
Quoting Chris Wilson (2018-05-18 13:07:16)
> Quoting Joonas Lahtinen (2018-05-18 11:05:36)
> > Quoting Chris Wilson (2018-05-13 10:50:09)
> > > To no surprise (since we've flip-flopped over the use of PIN_HIGH a few
> > > times), doing a search by address over a pathologically fragmented
> > >
On 17/05/18 14:22, Sinan Kaya wrote:
A host bridge is allowed to remap BAR addresses using _TRA attribute in
_CRS windows.
pci_bus :00: root bus resource [mem 0x8010010-0x8011fff window]
(bus address [0x0010-0x1fff])
pci :02:00.0: reg 0x10: [mem
Quoting Chris Wilson (2018-05-13 10:50:07)
> As we keep an rbtree of available holes sorted by their size, we can
> very easily determine if there is any hole large enough that might
> satisfy the allocation request. This helps when dealing with a highly
> fragmented address space and a request
On 26.04.2018 10:07, Jyri Sarha wrote:
> Add device_link from panel device (supplier) to drm device (consumer)
> when drm_panel_attach() is called. This patch should protect the
> master drm driver if an attached panel driver unbinds while it is in
> use. The device_link should make sure the drm
Hi Liviu,
On Fri, May 18, 2018 at 09:24:21AM +0100, Liviu Dudau wrote:
Mali DP500 behaves differently from the rest of the Mali DP IP,
in that it does not have a one-shot mode and keeps writing the
content of the current frame to the provided memory area until
stopped. As a way of emulating the
From: Michel Dänzer
Signed-off-by: Michel Dänzer
---
xf86drm.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/xf86drm.c b/xf86drm.c
index 3a9d0ed2..c09437b0 100644
--- a/xf86drm.c
+++ b/xf86drm.c
@@ -405,7 +405,7 @@
On Fri, May 18, 2018 at 03:15:10PM +0530, Jagan Teki wrote:
> Allwinner A64 has display engine pipeline like other Allwinner SOC's
> A83T/H3/H5.
>
> A64 behaviour similar to Allwinner A83T where
> Mixer0 => TCON0 => LVDS/RGB/MIPI-DSI
> Mixer1 => TCON1 => HDMI
> as per Display System Block
Quoting Chris Wilson (2018-05-13 10:50:08)
> Searching for an available hole by address is slow, as there no
> guarantee that a hole will be available and so we must walk over all
> nodes in the rbtree before we determine the search was futile. In many
> cases, the caller doesn't strictly care for
>-Original Message-
>From: dri-devel [mailto:dri-devel-boun...@lists.freedesktop.org] On Behalf Of
>Ramalingam C
>Sent: Tuesday, April 3, 2018 7:28 PM
>To: intel-...@lists.freedesktop.org; dri-devel@lists.freedesktop.org;
>seanp...@chromium.org; dan...@ffwll.ch; ch...@chris-wilson.co.uk;
On 05/17/2018 06:34 PM, Thierry Reding wrote:
From: Thierry Reding
Userspace needs to know the version of the interface implemented by a
client so it can create the proper command streams. Allow individual
drivers to store this version along with the client so that it can
On Thu, May 17, 2018 at 10:10 AM, wrote:
> On 2018-05-17 18:01, Rob Herring wrote:
>>
>> On Thu, May 17, 2018 at 4:47 AM, wrote:
>>>
>>> On 2018-05-08 15:55, kgu...@codeaurora.org wrote:
On 2018-05-07 21:50, Bjorn Andersson wrote:
tree: git://people.freedesktop.org/~agd5f/linux.git drm-next-4.18-wip
head: 404af8e5236fe7eb64d91bf708bd7aa81815d14e
commit: a21ddec61c5ed30b58eea3268ad3e0c69452ebfe [80/108] drm/amd/display: fix
31_32_fixpt shift functions
config: i386-allmodconfig (attached as .config)
compiler: gcc-7
https://bugs.freedesktop.org/show_bug.cgi?id=106548
--- Comment #5 from Francesco Balestrieri ---
Additional comment from Kishore in the duplicate bug #106549:
"I have tried on default kernel version on ubuntu 18.04 is 4.15-rc20.
and also on the drm-tip, i can
https://bugs.freedesktop.org/show_bug.cgi?id=104817
--- Comment #5 from Justin Mitzel ---
I am also having this problem. Ryzen 2500u on kernel 4.16-DRM-next. Many hangs
that require a reboot to fix.
--
You are receiving this mail because:
You are the assignee for the
https://bugs.freedesktop.org/show_bug.cgi?id=104817
--- Comment #6 from Justin Mitzel ---
Although it also seems very likely that this is a Kernel driver issue.
--
You are receiving this mail because:
You are the assignee for the
On Fri, May 18, 2018 at 03:21:11PM +0300, Mikko Perttunen wrote:
> On 05/17/2018 06:34 PM, Thierry Reding wrote:
> > From: Thierry Reding
> >
> > Userspace needs to know the version of the interface implemented by a
> > client so it can create the proper command streams.
The EC can expose a CEC bus, this patch adds the CEC related definitions
needed by the cros-ec-cec driver.
Having a 16 byte mkbp event size makes it possible to send CEC
messages from the EC to the AP directly inside the mkbp event
instead of first doing a notification and then a read.
On Fri, May 18, 2018 at 03:05:01PM +0200, Neil Armstrong wrote:
> This patchs adds the cec_notifier feature to the intel_hdmi part
> of the i915 DRM driver. It uses the HDMI DRM connector name to differentiate
> between each HDMI ports.
> The changes will allow the i915 HDMI code to notify EDID
Am 18.05.2018 um 16:44 schrieb Michel Dänzer:
On 2018-05-18 11:42 AM, Christian König wrote:
Anyway, the kernel can't rely on userspace using O_CLOEXEC. If the flush
callback being called from multiple processes is an issue, maybe the
flush callback isn't appropriate after all.
Userspace could
On 05/18/2018 10:50 AM, Christian König wrote:
Am 18.05.2018 um 16:44 schrieb Michel Dänzer:
On 2018-05-18 11:42 AM, Christian König wrote:
Anyway, the kernel can't rely on userspace using O_CLOEXEC. If the
flush
callback being called from multiple processes is an issue, maybe the
flush
https://bugs.freedesktop.org/show_bug.cgi?id=106561
--- Comment #1 from Eric Engestrom ---
Hi Tomasz,
I found this file; is that what you used to configure and compile libdrm?
https://abf.io/openmandriva/libdrm/blob/master/libdrm.spec
You seem to be using autotools,
>-Original Message-
>From: dri-devel [mailto:dri-devel-boun...@lists.freedesktop.org] On Behalf Of
>Ramalingam C
>Sent: Tuesday, April 3, 2018 7:28 PM
>To: intel-...@lists.freedesktop.org; dri-devel@lists.freedesktop.org;
>seanp...@chromium.org; dan...@ffwll.ch; ch...@chris-wilson.co.uk;
Hi Neil,
2018-05-18 15:05 GMT+02:00 Neil Armstrong :
> The EC can expose a CEC bus, this patch adds the CEC related definitions
> needed by the cros-ec-cec driver.
> Having a 16 byte mkbp event size makes it possible to send CEC
> messages from the EC to the AP directly
>-Original Message-
>From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf Of
>Ramalingam C
>Sent: Tuesday, April 3, 2018 7:28 PM
>To: intel-...@lists.freedesktop.org; dri-devel@lists.freedesktop.org;
>seanp...@chromium.org; dan...@ffwll.ch; ch...@chris-wilson.co.uk;
On Friday 18 May 2018 06:03 PM, Shankar, Uma wrote:
-Original Message-
From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf Of
Ramalingam C
Sent: Tuesday, April 3, 2018 7:28 PM
To: intel-...@lists.freedesktop.org; dri-devel@lists.freedesktop.org;
>-Original Message-
>From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf Of
>Ramalingam C
>Sent: Tuesday, April 3, 2018 7:28 PM
>To: intel-...@lists.freedesktop.org; dri-devel@lists.freedesktop.org;
>seanp...@chromium.org; dan...@ffwll.ch; ch...@chris-wilson.co.uk;
From: kbuild test robot
Use drm_*_get() and drm_*_put() helpers instead of drm_*_reference() and
drm_*_unreference() helpers.
Generated by: scripts/coccinelle/api/drm-get-put.cocci
Fixes: 30ed49b55b6e ("drm/nouveau/kms/nv50-: move code underneath dispnv50/")
On Fri, May 18, 2018 at 04:46:41PM +0200, Jernej Škrabec wrote:
> > And this is a bit sloppy, since if phy_clk_num == 3, you won't try to
> > lookup pll-2 either.
>
> It is highly unlikely this will be higher than 2, at least for this HDMI PHY,
> since it has only 1 bit reserved for parent
On Thu, 2018-05-03 at 18:29 +0200, Jan Luebbe wrote:
> This series adds support to capture in RGB565 format on the parallel bus
> by using the bayer (generic) mode instead.
>
> It also contains a small cleanup patch to pass on error codes from
> mbus_code_to_bus_cfg in fill_csi_bus_cfg and
Hi,
Am Donnerstag, 17. Mai 2018, 11:17:59 CEST schrieb Lin Huang:
> the phy config values used to fix in dp firmware, but some boards
> need change these values to do training and get the better eye diagram
> result. So support that in phy driver.
>
> Signed-off-by: Chris Zhong
>-Original Message-
>From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf Of
>Ramalingam C
>Sent: Tuesday, April 3, 2018 7:28 PM
>To: intel-...@lists.freedesktop.org; dri-devel@lists.freedesktop.org;
>seanp...@chromium.org; dan...@ffwll.ch; ch...@chris-wilson.co.uk;
Close the file descriptors under lock as well.
v2: close fds after removing from hash table
Signed-off-by: Jan Vesely
---
amdgpu/amdgpu_device.c | 11 +++
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/amdgpu/amdgpu_device.c
Analogous to the mesa commit of the same name.
Signed-off-by: Jan Vesely
---
amdgpu/util_hash_table.c | 12
amdgpu/util_hash_table.h | 2 ++
2 files changed, 14 insertions(+)
diff --git a/amdgpu/util_hash_table.c b/amdgpu/util_hash_table.c
index
Fixes memory leak on module unload.
Analogous to mesa commit of the same name.
Signed-off-by: Jan Vesely
---
amdgpu/amdgpu_device.c | 4
1 file changed, 4 insertions(+)
diff --git a/amdgpu/amdgpu_device.c b/amdgpu/amdgpu_device.c
index e23dd3b3..34ac95b8 100644
---
From: Brian Starkey
Add the WRITEBACK_OUT_FENCE_PTR property to writeback connectors, to
enable userspace to get a fence which will signal once the writeback is
complete. It is not allowed to request an out-fence without a
framebuffer attached to the connector.
A timeline
On Fri, May 18, 2018 at 10:52:17AM +0200, Heiko Stuebner wrote:
> Am Freitag, 18. Mai 2018, 03:45:46 CEST schrieb Brian Norris:
> > On Thu, May 17, 2018 at 6:41 PM, hl wrote:
> > > On Thursday, May 17, 2018 09:51 PM, Sean Paul wrote:
> > >> On Thu, May 17, 2018 at 05:18:00PM
On Fri, May 18, 2018 at 03:05:00PM +0200, Neil Armstrong wrote:
> In non device-tree world, we can need to get the notifier by the driver
> name directly and eventually defer probe if not yet created.
>
> This patch adds a variant of the get function by using the device name
> instead and will
>-Original Message-
>From: dri-devel [mailto:dri-devel-boun...@lists.freedesktop.org] On Behalf Of
>Ramalingam C
>Sent: Tuesday, April 3, 2018 7:28 PM
>To: intel-...@lists.freedesktop.org; dri-devel@lists.freedesktop.org;
>seanp...@chromium.org; dan...@ffwll.ch; ch...@chris-wilson.co.uk;
On Wed, 2018-05-02 at 14:52 +0200, Michael Grzeschik wrote:
> The 24bit RGB format configuration is currently missing, we add
> it now.
>
> Signed-off-by: Michael Grzeschik
Applied to imx-drm/next.
regards
Philipp
___
Am Donnerstag, 17. Mai 2018, 11:17:58 CEST schrieb Lin Huang:
> If want to do training outside DP Firmware, need phy voltage swing
> and pre_emphasis value.
>
> Signed-off-by: Lin Huang
> ---
> Changes in v2:
> - None
> Changes in v3:
> - modify property description and add
Am Freitag, 18. Mai 2018, 17:36:56 CEST schrieb Sean Paul:
> On Fri, May 18, 2018 at 10:52:17AM +0200, Heiko Stuebner wrote:
> > Am Freitag, 18. Mai 2018, 03:45:46 CEST schrieb Brian Norris:
> > > On Thu, May 17, 2018 at 6:41 PM, hl wrote:
> > > > On Thursday, May 17, 2018
On Thu, May 17, 2018 at 05:17:58PM +0800, Lin Huang wrote:
> If want to do training outside DP Firmware, need phy voltage swing
> and pre_emphasis value.
"dt-bindings: phy: ..." for the subject please.
>
> Signed-off-by: Lin Huang
> ---
> Changes in v2:
> - None
> Changes
On 18/05/18 14:51, Andrzej Hajda wrote:
> On 26.04.2018 10:07, Jyri Sarha wrote:
>> Add device_link from panel device (supplier) to drm device (consumer)
>> when drm_panel_attach() is called. This patch should protect the
>> master drm driver if an attached panel driver unbinds while it is in
>>
Hi Neil,
2018-05-18 15:04 GMT+02:00 Neil Armstrong :
> Hi All,
>
> The new Google "Fizz" Intel-based ChromeOS device is gaining CEC support
> through it's Embedded Controller, to enable the Linux CEC Core to communicate
> with it and get the CEC Physical Address from the
>-Original Message-
>From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf Of
>Ramalingam C
>Sent: Tuesday, April 3, 2018 7:28 PM
>To: intel-...@lists.freedesktop.org; dri-devel@lists.freedesktop.org;
>seanp...@chromium.org; dan...@ffwll.ch; ch...@chris-wilson.co.uk;
>-Original Message-
>From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf Of
>Ramalingam C
>Sent: Tuesday, April 3, 2018 7:28 PM
>To: intel-...@lists.freedesktop.org; dri-devel@lists.freedesktop.org;
>seanp...@chromium.org; dan...@ffwll.ch; ch...@chris-wilson.co.uk;
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