> -Original Message-
> From: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] On Behalf Of Daniel Vetter
> Sent: Thursday, February 21, 2019 1:10 AM
> To: C, Ramalingam
> Cc: intel-...@lists.freedesktop.org; dri-devel@lists.freedesktop.org;
> daniel.vet...@ffwll.ch; Winkler, Tomas ; Shankar,
On Wed, 2019-02-20 at 19:23 +, Kuehling, Felix wrote:
> On 2019-02-20 1:41 a.m., Thomas Hellstrom wrote:
> > On Tue, 2019-02-19 at 17:06 +, Kuehling, Felix wrote:
> > > On 2019-02-18 3:39 p.m., Thomas Hellstrom wrote:
> > > > On Mon, 2019-02-18 at 18:07 +0100, Christian König wrote:
> > >
On Tue, Feb 19, 2019 at 12:56 AM Maxime Ripard
wrote:
>
> On Mon, Feb 18, 2019 at 11:33:05AM -0800, Vasily Khoruzhick wrote:
> > On Mon, Feb 18, 2019 at 10:26 AM Rob Herring wrote:
> > >
> > > On Thu, Feb 14, 2019 at 09:09:52PM -0800, Vasily Khoruzhick wrote:
> > > > Clock rate check that was
This patch introduces the dma-buf pools framework.
This framework allows for different pool implementations to be
created, which act as dma-buf exporters, allowing userland to
allocate specific types of memory for use in dma-buf sharing.
This resembles the Android ION framework in that it takes
This adds the page-pool logic to the dma-buf pools which allows
a pool to keep pre-allocated/flushed pages around which can
speed up allocation performance.
NOTE: The page-pools name is term preserved from ION, but it has
potential to be easily confused with dma-buf pools. Suggestions
for
This adds a CMA pool, which allows userspace to allocate
a dma-buf of contiguous memory out of a CMA region.
Cc: Laura Abbott
Cc: Benjamin Gaignard
Cc: Sumit Semwal
Cc: Liam Mark
Cc: Brian Starkey
Cc: Andrew F. Davis
Cc: Chenbo Feng
Cc: Alistair Strachan
Cc:
This patch adds system and system-contig pools to the dma-buf
pools framework.
This allows applications to get a page-allocator backed
dma-buf, of either non-contiguous or contiguous memory.
Cc: Laura Abbott
Cc: Benjamin Gaignard
Cc: Sumit Semwal
Cc: Liam Mark
Cc: Brian Starkey
Cc: Andrew
Here is a very early peek at my dmabuf pools patchset, which
tries to destage a fair chunk of ION functionality.
This build and boots, but I've not gotten to testing the actual
pool devices yet (need to write some kselftests)! I just wanted
some early feedback on the overall direction.
The
On Wed, Feb 20, 2019 at 2:33 AM Maxime Ripard wrote:
>
> On Tue, Feb 19, 2019 at 07:44:56AM -0800, Vasily Khoruzhick wrote:
> > On Tue, Feb 19, 2019 at 12:56 AM Maxime Ripard
> > Maxime, thanks for your patch but it doesn't work for me. Pinebook
> > needs 1% tolerance. Having it as a module
Add new iris driver, remove deprecated ilo driver.
Signed-off-by: Tapani Pälli
---
libkms/Android.mk | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/libkms/Android.mk b/libkms/Android.mk
index 0be72054..a8b9489f 100644
--- a/libkms/Android.mk
+++ b/libkms/Android.mk
@@ -1,6
Hi Sam,
On 20/02/2019 13.52, Sam Ravnborg wrote:
> Hi Peter.
>
> On Wed, Feb 20, 2019 at 12:39:11PM +0200, Peter Ujfalusi wrote:
>> Hi Sam,
>>
>> On 15/02/2019 20.07, Sam Ravnborg wrote:
+#include
+#include
+#include
+#include
+
+#include
>>> Please do not use
Problem: qxl switches from native mode back into vga compatibility mode
when it notices someone is accessing vga registers. And vgacon does
exactly that before fbcon takes over.
Before qxl switched to the generic fbdev emulation that didn't cause any
problems. With the generic fbdev emulation
Reviewed-by: Frank Binns
Thierry Reding writes:
> From: Thierry Reding
>
> The array subscription operator ([]) has higher precedence than the
> indirection operator (*), so we need to use parentheses to properly
> instruct the compiler to dereference the pointer to an array first,
> and then
Hi Peter.
Always good to see that feedback input is used.
> OK.
>
> >> +
> >> + return 0;
> >> +}
> >> +
> >> +static void osd101t2587_panel_shutdown(struct mipi_dsi_device *dsi)
> >> +{
> >> + struct osd101t2587_panel *osd101t2587 = mipi_dsi_get_drvdata(dsi);
> >> +
> > Maybe call
Hi,
On Wed, 2019-02-06 at 15:51 -0800, Eric Anholt wrote:
> Paul Kocialkowski writes:
>
> > When the pipeline is reconfigured with a different mode, changes take
> > effect immediately for the CRTC and encoder while the HVS takes some
> > time to switch the active display list. This results in
Hi,
Writing from non-standard mail composer, forgive formatting mistakes.
On Tue, Feb 19, 2019 at 5:22 PM Vinay Simha B N wrote:
> added the temperature alert irq handler in adv driver , in the irq
> calling schedule_work(>hpd_work); , initially in the
> adv7511_detect , if we set status =
https://bugs.freedesktop.org/show_bug.cgi?id=109607
--- Comment #5 from CI Bug Log ---
A CI Bug Log filter associated to this bug has been updated:
{- fi-icl-u2, fi-icl-u3: random tests - incomplete -}
{+ fi-icl-u2, fi-icl-u3: random tests - incomplete +}
New failures caught by the filter:
*
Hi Peter.
On Wed, Feb 20, 2019 at 12:39:11PM +0200, Peter Ujfalusi wrote:
> Hi Sam,
>
> On 15/02/2019 20.07, Sam Ravnborg wrote:
> >> +#include
> >> +#include
> >> +#include
> >> +#include
> >> +
> >> +#include
> > Please do not use drmP.h in new drivers - we try to get rid of this file.
>
Hi,
Here is a fourth iteration of the VC4 load tracking series, which was
initially developed by Boris Brezillon and that I have now taken over.
This new iteration takes in account comments from v3 and comes with a
new approach for avoiding underrun reports when reconfiguring the
pipeline. It is
From: Boris Brezillon
The HVS block is supposed to fill the pixelvalve FIFOs fast enough to
meet the requested framerate. The problem is, the HVS and memory bus
bandwidths are limited, and if we don't take these limitations into
account we might end up with HVS underflow errors.
This patch is
From: Boris Brezillon
Add a debugfs entry and helper for reporting HVS underrun errors as
well as helpers for masking and unmasking the underrun interrupts.
Add an IRQ handler and initial IRQ configuration.
Rework related register definitions to take the channel number.
Signed-off-by: Boris
In order to test whether the load tracker is working as expected, we
need the ability to compare the commit result with the underrun
indication. With the load tracker always enabled, commits that are
expected to trigger an underrun are always rejected, so userspace
cannot get the actual underrun
On Tue, Feb 19, 2019 at 01:47:36PM -0800, John Stultz wrote:
> On Tue, Feb 19, 2019 at 1:13 PM Laura Abbott wrote:
> >
> > On 2/15/19 12:24 PM, John Stultz wrote:
> > > The per-device heaps don't support HEAP_QUERY ioctl, since
> > > the name is provided in the devnode path and the heapid isn't
>
https://bugs.freedesktop.org/show_bug.cgi?id=109692
Bug ID: 109692
Summary: deadlock occurs during GPU reset
Product: DRI
Version: XOrg git
Hardware: Other
OS: All
Status: NEW
Severity: normal
Hi,
On Mon, Feb 18, 2019 at 04:01:09PM +0530, Jagan Teki wrote:
> On Mon, Feb 18, 2019 at 1:56 PM Paul Kocialkowski
> wrote:
> > On Fri, 2019-02-15 at 22:37 +0530, Jagan Teki wrote:
> > > On 15/02/19 8:10 PM, Jagan Teki wrote:
> > > >
> > > > On Fri, 15 Feb, 2019, 7:43 PM Maxime Ripard, > > >
On Wed, Feb 20, 2019 at 7:07 AM Brian Starkey wrote:
>
> On Tue, Feb 19, 2019 at 01:47:36PM -0800, John Stultz wrote:
> > On Tue, Feb 19, 2019 at 1:13 PM Laura Abbott wrote:
> > >
> > > On 2/15/19 12:24 PM, John Stultz wrote:
> > > > The per-device heaps don't support HEAP_QUERY ioctl, since
> >
https://bugs.freedesktop.org/show_bug.cgi?id=109693
Bug ID: 109693
Summary: Hang of the graphics driver and assertion on
si_upload_vertex_buffer_descriptors
Product: Mesa
Version: git
Hardware: x86-64 (AMD64)
Hi Dave and Daniel, one final fix for v5.0, cc: stable.
BR,
Jani.
The following changes since commit a3b22b9f11d9fbc48b0291ea92259a5a810e9438:
Linux 5.0-rc7 (2019-02-17 18:46:40 -0800)
are available in the Git repository at:
git://anongit.freedesktop.org/drm/drm-intel
Paul Kocialkowski writes:
> Hi,
>
> Here is a fourth iteration of the VC4 load tracking series, which was
> initially developed by Boris Brezillon and that I have now taken over.
>
> This new iteration takes in account comments from v3 and comes with a
> new approach for avoiding underrun
On 2019-02-20 1:41 a.m., Thomas Hellstrom wrote:
> On Tue, 2019-02-19 at 17:06 +, Kuehling, Felix wrote:
>> On 2019-02-18 3:39 p.m., Thomas Hellstrom wrote:
>>> On Mon, 2019-02-18 at 18:07 +0100, Christian König wrote:
Am 18.02.19 um 10:47 schrieb Thomas Hellstrom:
> On Mon,
https://bugs.freedesktop.org/show_bug.cgi?id=109692
--- Comment #1 from Andrey Grodzovsky ---
Thanks, I will try to find time sometime soon to investigate this new deadlock.
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On Sat, Feb 16, 2019 at 11:06:51PM +0530, Ramalingam C wrote:
> Defining the mei-i915 interface functions and initialization of
> the interface.
>
> v2:
> Adjust to the new interface changes. [Tomas]
> Added further debug logs for the failures at MEI i/f.
> port in hdcp_port data is
https://bugs.freedesktop.org/show_bug.cgi?id=109692
--- Comment #2 from Andrey Grodzovsky ---
Is this deadlock happens to you always now or only sometimes ?
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On Sat, Feb 16, 2019 at 11:07:03PM +0530, Ramalingam C wrote:
> HDCP transmitter is supposed to indicate the HDCP encryption status of
> the link through enc_en signals in a window of time called "window of
> opportunity" defined by HDCP HDMI spec.
>
> But on KBL this timing of signalling has an
On Wed, Feb 20, 2019 at 07:19:30AM -0800, Christoph Hellwig wrote:
> On Tue, Feb 19, 2019 at 09:30:33PM -0800, ira.we...@intel.com wrote:
> > From: Ira Weiny
> >
> > Resending these as I had only 1 minor comment which I believe we have
> > covered
> > in this series. I was anticipating these
Quoting wangyan wang (2019-02-19 18:53:54)
> From: chunhui dai
>
> Add MUX_GATE_FLAGS_2 for the clock which needs to set two falgs.
s/falgs/flags/
> Such as some mux need to set the flags of "CLK_MUX_ROUND_CLOSEST".
>
> Signed-off-by: chunhui dai
> Signed-off-by: wangyan wang
> ---
>
https://bugs.freedesktop.org/show_bug.cgi?id=109695
Bug ID: 109695
Summary: qemu using spice gl and sandbox resourcecontrol=deny
crashes with SIGSYS on radeonsi
Product: Mesa
Version: 18.3
Hardware: x86-64 (AMD64)
memdump_user usually gets fed unchecked userspace input. Blasting a
full backtrace into dmesg every time is a bit excessive - I'm not sure
on the kernel rule in general, but at least in drm we're trying not to
let unpriviledge userspace spam the logs freely. Definitely not entire
warning
https://bugs.freedesktop.org/show_bug.cgi?id=109692
--- Comment #4 from mikhail.v.gavri...@gmail.com ---
Created attachment 143423
--> https://bugs.freedesktop.org/attachment.cgi?id=143423=edit
yet another dmesg
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https://bugs.freedesktop.org/show_bug.cgi?id=109692
--- Comment #3 from mikhail.v.gavri...@gmail.com ---
Created attachment 143422
--> https://bugs.freedesktop.org/attachment.cgi?id=143422=edit
yet another dmesg
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https://bugs.freedesktop.org/show_bug.cgi?id=109692
--- Comment #6 from Andrey Grodzovsky ---
(In reply to Andrey Grodzovsky from comment #2)
> Is this deadlock happens to you always now or only sometimes ?
I think i see the problem but not sure yet how to fix it.
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https://bugs.freedesktop.org/show_bug.cgi?id=109206
--- Comment #17 from Harry Wentland ---
I don't have that laptop but this link mentions a method to "Update the BIOS
when Windows does not start": https://support.hp.com/ca-en/document/c00042629
I'd be more curious to know if the patch I
On Wed 20-02-19 21:40:58, Daniel Vetter wrote:
> memdump_user usually gets fed unchecked userspace input. Blasting a
> full backtrace into dmesg every time is a bit excessive - I'm not sure
> on the kernel rule in general, but at least in drm we're trying not to
> let unpriviledge userspace spam
This makes sure the vc4_reset doesn't hit an obscure race with the
GET_PARAM ioctl, fixes a decrement outside of the lock, and prevents
future code from making mistakes with the weird return value of
pm_runtime_get_sync().
Signed-off-by: Eric Anholt
---
drivers/gpu/drm/vc4/vc4_drv.c | 21
This removes a bunch of duplicated boilerplate for the debugfs vs
runtime printk debug dumping.
Signed-off-by: Eric Anholt
---
drivers/gpu/drm/vc4/vc4_crtc.c | 68 ++---
drivers/gpu/drm/vc4/vc4_dpi.c | 23 ++---
drivers/gpu/drm/vc4/vc4_drv.h | 7 ++
drivers/gpu/drm/vc4/vc4_dsi.c
The global list of all debugfs entries for the driver was painful: the
list couldn't see into the components' structs, so each component had
its own debugs show function to find the component, then find the
regset and dump it. The components also had to be careful to check
that they were actually
Otherwise, you sometimes decode the ident fields based on 0xdeadbeef
register reads.
Signed-off-by: Eric Anholt
---
drivers/gpu/drm/vc4/vc4_v3d.c | 29 +
1 file changed, 17 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/vc4/vc4_v3d.c
https://bugzilla.kernel.org/show_bug.cgi?id=202511
--- Comment #16 from Michael A. Leonetti (mikealeone...@gmail.com) ---
Created attachment 281247
--> https://bugzilla.kernel.org/attachment.cgi?id=281247=edit
dmesg 4.18.0 with debugs
Did I do this correctly? I see a lot more call track
The debugfs_regset32 is nice to use for reducing boilerplate in
dumping a bunch of regs in debugfs, but we also want to be able to
print to dmesg them at runtime for driver debugging. drm_printer lets
us format debugfs and the printk the same way.
Signed-off-by: Eric Anholt
---
One might want to use the VC4 display stack without using Mesa.
Similar to the debugfs fixes for not having all of the possible
display bits enabled, make sure you can't oops in vc4 if v3d isn't
enabled.
Signed-off-by: Eric Anholt
---
drivers/gpu/drm/vc4/vc4_drv.c | 11 +++
Now I can extend the stats without more copy and pasting between the
two.
Signed-off-by: Eric Anholt
---
drivers/gpu/drm/vc4/vc4_bo.c | 48 +++-
1 file changed, 14 insertions(+), 34 deletions(-)
diff --git a/drivers/gpu/drm/vc4/vc4_bo.c
https://bugs.freedesktop.org/show_bug.cgi?id=109692
--- Comment #5 from mikhail.v.gavri...@gmail.com ---
(In reply to Andrey Grodzovsky from comment #2)
> Is this deadlock happens to you always now or only sometimes ?
Looks like deadlock happens always.
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On Wed, Feb 20, 2019 at 12:41 PM Daniel Vetter wrote:
>
> memdump_user usually gets fed unchecked userspace input. Blasting a
> full backtrace into dmesg every time is a bit excessive - I'm not sure
> on the kernel rule in general, but at least in drm we're trying not to
> let unpriviledge
https://bugs.freedesktop.org/show_bug.cgi?id=109695
--- Comment #1 from Marek Olšák ---
Mesa needs a way to query that it can't set thread affinity.
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Quoting Brendan Higgins (2019-02-19 15:20:18)
> On Fri, Feb 15, 2019 at 12:54 PM Stephen Boyd wrote:
> >
> > Quoting Brendan Higgins (2019-02-14 13:37:22)
> > > +
> > > +static struct kunit_case kunit_resource_test_cases[] = {
> >
> > Can these arrays be const?
>
> There is some private mutable
NV12 framebuffers produced by the VPU shows distorted on RK3288
after win has been disabled when scaling is active.
This issue can be reproduced using a 1080p modeset by:
- Scale a 1280x720 NV12 framebuffer to 1920x1080 on win0
- Disable win0
- Display a 1920x1080 NV12 framebuffer without scaling
Hi Dave, Daniel,
A bit bigger than normal for this week due to fixes for some long
standing display issues that are bound for stable. These changes would
be going to stable anyway, so I figured it was better via 5.0 than 5.1.
- Several display fixes
- Fix PX systems due to core changes in
You'll get garbage measurements if the registers always read back
0xdeadbeef
Signed-off-by: Eric Anholt
---
drivers/gpu/drm/v3d/v3d_debugfs.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/v3d/v3d_debugfs.c
b/drivers/gpu/drm/v3d/v3d_debugfs.c
index
No compatible string for it yet, just the version-dependent changes.
They've now tied the hub and the core interrupt lines into a single
interrupt line coming out of the block. It also turns out I made a
mistake in modeling the V3D v3.3 and v4.1 bridge as a part of V3D
itself -- the bridge is
The old field is gone and the register now has a different field,
QRMAXCNT for how many TMU requests get serviced before thread switch.
We were accidentally reducing it from its default of 0x3 (4 requests)
to 0x0 (1).
v2: Skip setting the reg at all on 4.x, instead of trying to update
only
https://bugs.freedesktop.org/show_bug.cgi?id=102581
--- Comment #5 from Felix Potthast ---
Created attachment 143426
--> https://bugs.freedesktop.org/attachment.cgi?id=143426=edit
Test program
The bug is still present for me with mesa 18.3.4-1
I wrote a little test program which compares an
No implementation, no callers.
Cc: Brian Starkey
Cc: Liviu Dudau
Cc: Eric Anholt
Signed-off-by: Daniel Vetter
---
include/drm/drm_writeback.h | 2 --
1 file changed, 2 deletions(-)
diff --git a/include/drm/drm_writeback.h b/include/drm/drm_writeback.h
index 23df9d463003..f34895f7fcb1 100644
Some display controllers can be programmed to present non-black colors
for pixels not covered by any plane (or pixels covered by the
transparent regions of higher planes). Compositors that want a UI with
a solid color background can potentially save memory bandwidth by
setting the CRTC background
Gen9+ platforms allow CRTC's to be programmed with a background/canvas
color below the programmable planes. Let's expose this for use by
compositors.
v2:
- Split out bgcolor sanitization and programming of csc/gamma bits to a
separate patch that we can land before the ABI changes are ready
We should support readout and verification of crtc background color as
we do with other pipe state. Note that our hardware holds less bits of
precision than the CRTC state allows, so we need to take care to only
verify the most significant bits of the color after performing readout.
At boot time
This version is just a rebase of v5 onto the latest drm-tip, which was
posted here:
https://lists.freedesktop.org/archives/intel-gfx/2019-January/188352.html
There were some minor conflicts with Ville's csc/gamma disable series,
so the background color write has now moved to the new
From: chunhui dai
The parent rate of hdmi phy had set by DPI driver.
We should not set or change the parent rate of MT2701 hdmi phy,
as a result we should remove the flags of "CLK_SET_RATE_PARENT"
from the clock of MT2701 hdmi phy.
Signed-off-by: chunhui dai
Signed-off-by: wangyan wang
---
On Sat, Feb 16, 2019 at 2:00 PM Koenig, Christian
wrote:
>
> Am 15.02.19 um 22:29 schrieb Michael D Labriola:
> > This commit fixes DRM failures on Xen PV systems that were introduced in
> > v4.17 by the following commits:
> >
> > 82626363 drm: add func to get max iomem address v2
> > fd5fd480
On Tue, Feb 19, 2019 at 03:30:33PM -0500, Jerome Glisse wrote:
> On Tue, Feb 19, 2019 at 12:15:55PM -0800, Dan Williams wrote:
> > On Tue, Feb 19, 2019 at 12:04 PM wrote:
> > >
> > > From: Jérôme Glisse
> > >
> > > Since last version [4] i added the extra bits needed for the change_pte
> > >
On 2/19/19 10:34 PM, Brendan Higgins wrote:
> On Mon, Feb 18, 2019 at 12:02 PM Frank Rowand wrote:
>
>> I have not read through the patches in any detail. I have read some of
>> the code to try to understand the patches to the devicetree unit tests.
>> So that may limit how valid my comments
From: chunhui dai
The factor depends on the divider of DPI in MT2701, therefore,
we should fix this factor to the right and new one.
Signed-off-by: chunhui dai
Signed-off-by: wangyan wang
---
drivers/gpu/drm/mediatek/mtk_dpi.c | 8 +++-
1 file changed, 3 insertions(+), 5 deletions(-)
On Tue 19 Feb 10:48 PST 2019, Jordan Crouse wrote:
> Currently the IOMMU code calls pm_runtime_get/put on the GPU or display
> device before doing a IOMMU operation. This was because usually the
> IOMMU driver didn't do power control of its own and since the hardware
> used the same clocks and
From: chunhui dai
Add MUX_GATE_FLAGS_2 for the clock which needs to set two falgs.
Such as some mux need to set the flags of "CLK_MUX_ROUND_CLOSEST".
Signed-off-by: chunhui dai
Signed-off-by: wangyan wang
---
drivers/clk/mediatek/clk-mtk.c | 2 +-
drivers/clk/mediatek/clk-mtk.h | 20
On Wed, 2019-02-20 at 10:53 +0800, wangyan wang wrote:
> From: Wangyan Wang
>
> V4 adopt maintainer's suggestion.
> Here is the change list between V4 & V5
> 1. add Reviewed-by:CK Hu
> in " drm/mediatek: fix the rate ..." commit message.
>
> 2. describe the reason why mt7623 clock of hdmi
>
rob,
hpd works in kernel 5.0.0-rc6, i.e postboot if we connect hdmi display
comes(apq8016).
added the temperature alert_handler in adv7511_drv.c
in adv7511_detect , i had set status = connector_status_disconnected; ,
since display should not come initially,
but when irq calls
From: chunhui dai
move the setting of fixed divider from enable/disable
to the function of setting rate.
the patch is for hdmi pll divider, the divder should
be configured before clock calculation to ensure the
clock is right.
Signed-off-by: chunhui dai
Signed-off-by: wangyan wang
---
From: Wangyan Wang
V4 adopt maintainer's suggestion.
Here is the change list between V4 & V5
1. add Reviewed-by:CK Hu
in " drm/mediatek: fix the rate ..." commit message.
2. describe the reason why mt7623 clock of hdmi
is more stable than before.
the tvdpll should be stable in hdmi normal
Fixes gcc '-Wunused-but-set-variable' warning:
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c: In function
'update_gpuvm_pte':
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c:840:20: warning:
variable 'bo' set but not used [-Wunused-but-set-variable]
From: chunhui dai
Recalculate the rate of this clock, by querying hardware.
Signed-off-by: chunhui dai
Signed-off-by: wangyan wang
---
drivers/gpu/drm/mediatek/mtk_hdmi_phy.c| 7 ++
drivers/gpu/drm/mediatek/mtk_hdmi_phy.h| 3 +--
On Tuesday, February 19, 2019 10:08:13 AM PST Ville Syrjälä wrote:
> On Tue, Feb 19, 2019 at 09:36:14AM -0800, Rodrigo Vivi wrote:
> > On Mon, Feb 18, 2019 at 04:54:34PM +1100, Jonathan Gray wrote:
> > > Compared to linux and libdrm Mesa is missing a VLV and ICL id.
> > >
> > > 0x0f30
> > >
Fix adddress -> address typo.
Signed-off-by: Andy Shevchenko
---
drivers/gpu/drm/tinydrm/mipi-dbi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/tinydrm/mipi-dbi.c
b/drivers/gpu/drm/tinydrm/mipi-dbi.c
index 3a05e56f9b0d..2f8c2d1d09bc 100644
---
From: chunhui dai
The MUX clock of dpi1_sel should select the closet clock for itself.
We could add this flag to enable this function of MUX in CCF.
Signed-off-by: chunhui dai
Signed-off-by: wangyan wang
---
drivers/clk/mediatek/clk-mt2701.c | 4 ++--
1 file changed, 2 insertions(+), 2
The EDT ETM0430G0DH6 is 4.3" 480x272 panel, which can be
supported by the simple panel driver.
Signed-off-by: Marek Vasut
Cc: Philipp Zabel
Cc: Thierry Reding
---
drivers/gpu/drm/panel/panel-simple.c | 27 +++
1 file changed, 27 insertions(+)
diff --git
On 2/19/19 7:39 PM, Brendan Higgins wrote:
> On Mon, Feb 18, 2019 at 11:52 AM Frank Rowand wrote:
>>
>> On 2/14/19 1:37 PM, Brendan Higgins wrote:
>>> Add support for aborting/bailing out of test cases. Needed for
>>> implementing assertions.
>>>
>>> Signed-off-by: Brendan Higgins
>>> ---
>>>
From: chunhui dai
We should not change the rate of parent for hdmi phy when
doing round_rate for this clock. The parent clock of hdmi
phy must be the same as it. We change it when doing set_rate
only.
Signed-off-by: chunhui dai
Signed-off-by: wangyan wang
---
On 2/20/19 9:07 AM, Christian König wrote:
Am 20.02.19 um 07:41 schrieb Thomas Hellstrom:
On Tue, 2019-02-19 at 17:06 +, Kuehling, Felix wrote:
On 2019-02-18 3:39 p.m., Thomas Hellstrom wrote:
On Mon, 2019-02-18 at 18:07 +0100, Christian König wrote:
Am 18.02.19 um 10:47 schrieb Thomas
Am 20.02.19 um 09:10 schrieb zhoucm1:
On 2019年02月20日 15:59, Koenig, Christian wrote:
Am 20.02.19 um 05:53 schrieb zhoucm1:
On 2019年02月19日 19:32, Koenig, Christian wrote:
Hi David,
Could you have a look if it's reasonable?
Patch #1 is also something I already fixed on my local branch.
But
Hi, Jitao:
On Tue, 2019-02-19 at 17:14 +0800, Jitao Shi wrote:
> This patch add mt8183 mipi_tx driver.
> And also support other chips that use the same binding and driver.
>
> Signed-off-by: Jitao Shi
> ---
> drivers/gpu/drm/mediatek/mtk_mipi_tx.c| 2 +
>
On Wed, 2019-02-20 at 08:35 +, Koenig, Christian wrote:
> Am 20.02.19 um 09:14 schrieb Thomas Hellstrom:
> > On 2/20/19 9:07 AM, Christian König wrote:
> > > Am 20.02.19 um 07:41 schrieb Thomas Hellstrom:
> > > > On Tue, 2019-02-19 at 17:06 +, Kuehling, Felix wrote:
> > > > > On 2019-02-18
Am 20.02.19 um 07:41 schrieb Thomas Hellstrom:
On Tue, 2019-02-19 at 17:06 +, Kuehling, Felix wrote:
On 2019-02-18 3:39 p.m., Thomas Hellstrom wrote:
On Mon, 2019-02-18 at 18:07 +0100, Christian König wrote:
Am 18.02.19 um 10:47 schrieb Thomas Hellstrom:
On Mon, 2019-02-18 at 09:20
This commit fixes DRM failures on Xen PV systems that were introduced in
v4.17 by the following commits:
82626363 drm: add func to get max iomem address v2
fd5fd480 drm/amdgpu: only enable swiotlb alloc when need v2
1bc3d3cc drm/radeon: only enable swiotlb path when need v2
The introduction of
Document the Emerging Display Technology Corp. (EDT) ETM0430G0DH6
display, which is a 480x272 4.3" TFT display.
Signed-off-by: Marek Vasut
Cc: Rob Herring
Cc: Jan Tuerk
Cc: Thierry Reding
Cc: devicet...@vger.kernel.org
---
.../devicetree/bindings/display/panel/edt,et-series.txt | 8
From: chunhui dai
Due to a clerical error,there is one zero less for 1280.
Fix it for 12800.
Fixes: 0fc721b2968e ("drm/mediatek: add hdmi driver for MT2701 and MT7623")
Reviewed-by: CK Hu
Signed-off-by: chunhui dai
Signed-off-by: wangyan wang
---
On 2019年02月20日 15:59, Koenig, Christian wrote:
Am 20.02.19 um 05:53 schrieb zhoucm1:
On 2019年02月19日 19:32, Koenig, Christian wrote:
Hi David,
Could you have a look if it's reasonable?
Patch #1 is also something I already fixed on my local branch.
But patch #2 won't work like this.
The Ronbo RB070D30 panel is a 1024x600 MIPI-DSI panel.
Signed-off-by: Maxime Ripard
---
Documentation/devicetree/bindings/display/panel/ronbo,rb070d30.yaml | 52
1 file changed, 52 insertions(+)
create mode 100644
From: Konstantin Sudakov
The Ronbo RB070D30 panel is a MIPI-DSI panel based on a Fitipower EK79007
controller and a 1024x600 panel.
Reviewed-by: Paul Kocialkowski
Reviewed-by: Sam Ravnborg
Signed-off-by: Konstantin Sudakov
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/panel/Kconfig
Hi,
Here is a series adding a driver for the Ronbo RB070D30 panel. This was
previously integrated in the DSI burst series, but those parts have been
merged since.
It's been tested on an Allwinner A33 board.
Let me know what you think,
Maxime
Changes from v3:
- Added patches for the DT
From: Konstantin Sudakov
Ronbo Electronics manufactures display panels.
Signed-off-by: Konstantin Sudakov
Signed-off-by: Maxime Ripard
---
Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
1 file changed, 1 insertion(+)
diff --git
Am 20.02.19 um 09:14 schrieb Thomas Hellstrom:
> On 2/20/19 9:07 AM, Christian König wrote:
>> Am 20.02.19 um 07:41 schrieb Thomas Hellstrom:
>>> On Tue, 2019-02-19 at 17:06 +, Kuehling, Felix wrote:
On 2019-02-18 3:39 p.m., Thomas Hellstrom wrote:
> On Mon, 2019-02-18 at 18:07 +0100,
Quoting Daniel Vetter (2019-02-19 09:55:27)
> Hi all,
>
> topic/mei-hdcp-2019-02-19:
> Prep patches + headers for the mei-hdcp/i915 component interfaces
>
> Also contains the prep work in the component helpers plus adjustements
> for the snd-hda/i915 component interface.
>
> Plus one small
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