Hao Wu,
The comment block clearly describes that the condition is not
possible, so we would never expect this ASSERT() condition to
ever be triggered. Looking at the comment in this patch and
the ASSERT() statement, a developer in the future may be tempted
to remove this comment and ASSERT()
On 28/09/17 18:37, Konrad Rzeszutek Wilk wrote:
!!! X64 Exception Type - 0D(#GP - General Protection) CPU Apic ID -
ExceptionData -
RIP - BEC2949C, CS - 0038, RFLAGS - 00210216
>
Find image 808610ed.efidrv
Correct the help message to match that defined in Shell spec.
In 'DISCONNECT -r [-nc]' case, '-r' is not optional.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni
Cc: Jaben Carsey
---
Help message of "dh" gives an example to display all handles
with "Image" protocol but actually "LoadedImage" protocol should
be used.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni
Cc: Jaben Carsey
---
Ruiyu Ni (2):
ShellPkg/dh: Correct typo in help
ShellPkg/disconnect: '-r' is not optional when disconnecting all
.../UefiShellDriver1CommandsLib/UefiShellDriver1CommandsLib.uni | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
--
2.12.2.windows.2
On 09/28/17 20:04, Michael Brown wrote:
> On 28/09/17 18:37, Konrad Rzeszutek Wilk wrote:
>> !!! X64 Exception Type - 0D(#GP - General Protection) CPU Apic ID -
>>
>> ExceptionData -
>> RIP - BEC2949C, CS - 0038, RFLAGS -
>> 00210216
>>
Reviewed-by: Jaben Carsey
> -Original Message-
> From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of
> Ruiyu Ni
> Sent: Thursday, September 28, 2017 10:21 AM
> To: edk2-devel@lists.01.org
> Subject: [edk2] [PATCH 0/2] Correct typo in command
Ray,
This text is taken directly from the shell spec. Do we need to fix that also?
> -Original Message-
> From: Ni, Ruiyu
> Sent: Thursday, September 28, 2017 10:21 AM
> To: edk2-devel@lists.01.org
> Cc: Carsey, Jaben
> Subject: [PATCH 1/2] ShellPkg/dh: Correct
Hey,
I am hitting an interesting issue with the latest versions of iPXE,
edk2, and GRUB wherein I am trying to boot GRUB (via iPXE), and then
load Xen, I get this:
!!! X64 Exception Type - 0D(#GP - General Protection) CPU Apic ID -
ExceptionData -
RIP -
Hi, I've been trying to enable output from DebugLib in CorebootPayloadPkg
to the serial port at I/O address 0x3F8, but can't seem to get any results.
I know the prints are being included in the build since I can see them in
the binary, and the hardware is also good since coreboot uses it just
Mike,
Thanks for the feedbacks. I will refine the commit message and code
comments according to your suggestions.
Best Regards,
Hao Wu
> -Original Message-
> From: Kinney, Michael D
> Sent: Friday, September 29, 2017 12:49 AM
> To: Wu, Hao A; edk2-devel@lists.01.org; Kinney, Michael D
Update Makefile to support FFS file generation.
Cc: Liming Gao
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Yonghong Zhu
Signed-off-by: Yunhua Feng
---
BaseTools/Source/Python/AutoGen/AutoGen.py
Its usage is
"Trim --Vfr-Uni-Offset -o $(OUTPUT_DIR)(+)$(MODULE_NAME)VfrOffset.sec
--ModuleName=$(MODULE_NAME) --DebugDir=$(DEBUG_DIR)"
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao
Signed-off-by: Yonghong Zhu
---
Update GenFfs tool to get alignment value from SectionFile when use
the new option -n 0.
Cc: Liming Gao
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Yonghong Zhu
---
BaseTools/Source/C/GenFfs/GenFfs.c | 127
These patches enable multiple thread to generate ffs file by merge FFS file's
generation into Make phase.
Cc: Liming Gao
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Yonghong Zhu
Yonghong Zhu (3):
BaseTools: GenFfs
Reviewed-by: Ruiyu Ni
-Original Message-
From: Dong, Eric
Sent: Friday, September 29, 2017 8:27 AM
To: edk2-devel@lists.01.org
Cc: Yao, Jiewen ; Ni, Ruiyu
Subject: [Patch v2 1/2] UefiCpuPkg/PiSmmCpuDxeSmm: Combine
Reviewed-by: Ruiyu Ni
-Original Message-
From: Dong, Eric
Sent: Friday, September 29, 2017 8:27 AM
To: edk2-devel@lists.01.org
Cc: Yao, Jiewen ; Ni, Ruiyu
Subject: [Patch v2 2/2] UefiCpuPkg/PiSmmCpuDxeSmm: Refine code to
> -Original Message-
> From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of Udit
> Kumar
> Sent: Thursday, September 28, 2017 5:28 PM
> To: Wu, Hao A; edk2-devel@lists.01.org
> Cc: Kinney, Michael D; Yao, Jiewen; Zeng, Star
> Subject: Re: [edk2] [PATCH]
Commit 8932679df5be046feba30fae80776c5815232a08 adds an ASSERT for
checking NULL pointer dereference.
The ASSERT added here is for addressing a false positive NULL pointer
dereference issue raised from static analysis.
This commit adds comments to clarify the reason for using ASSERT as the
Reviewed-by: jiewen@intel.com
> -Original Message-
> From: Wu, Hao A
> Sent: Friday, September 29, 2017 9:28 AM
> To: edk2-devel@lists.01.org
> Cc: Wu, Hao A ; Zeng, Star ; Kinney,
> Michael D ; Yao, Jiewen
Thanks Laszlo.
Yes, I agree it is bug. Would you please help to file a bugzilar in EDKII?
For the fix, I think we have a way to resolve it without PCD. (I do not want to
bother a platform developer to set a new PCD.)
The only invalid case we need handle is: MOR is absent, but MORL is present.
In S3 resume path, current implementation do 2 separate INIT-SIPI-SIPI,
this is not necessary. This change combine these 2 INIT-SIPI-SIPI to 1
and add CpuPause between them.
Cc: Jiewen Yao
Cc: Ruiyu Ni
Contributed-under: TianoCore Contribution Agreement
V2:
Change function parameter to avoid touch global info in function.
Enhance function name, make it more user friendly
V1:
Refine code to avoid duplicate code to set processor register.
Cc: Jiewen Yao
Cc: Ruiyu Ni
Contributed-under: TianoCore
Combine INIT-SIPI-SIPI code and remove the duplicate code.
V2: Change patch 2 to includes:
Change function parameter to avoid touch global info in function.
Enhance function name, make it more user friendly
Eric Dong (2):
UefiCpuPkg/PiSmmCpuDxeSmm: Combine INIT-SIPI-SIPI.
Yes I think so.
Thanks/Ray
> -Original Message-
> From: Carsey, Jaben
> Sent: Friday, September 29, 2017 2:30 AM
> To: Ni, Ruiyu ; edk2-devel@lists.01.org
> Subject: RE: [PATCH 1/2] ShellPkg/dh: Correct typo in help
>
> Ray,
>
> This text is taken directly from the
This patch is to fix an assert issue during booting IA32 platforms
such as OvmfIa32 or Quark. This issue is caused by trying to access
page table on a platform without page table. A check is added to
avoid the assert.
Bug tracker: https://bugzilla.tianocore.org/show_bug.cgi?id=724
c: Star Zeng
From: Yunhua Feng
Per PI 1.6 we added an FV Extended Header entry that would contain the
size of the FV that was in use.
Cc: Liming Gao
Cc: Yonghong Zhu
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by:
From: Ming Huang
The Trusted Firmware binary was produced from the commit hash:
"14c7bdf"
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang
Signed-off-by: Heyi Guo
---
1. Replace SnpPV660Dxe with SnpPV600Dxe;
2. Add SnpPlatform:
Install protocol to enable nic port which are using.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang
Signed-off-by: Heyi Guo
---
From: Ming Huang
Update binary file for edk2 upgrade.
1. Replace UncachedMemoryAllocationLib with DmaLib;
2. Remove ArmCpuLib dependenc;
3. Remove ConvertToPhysicalAddress;
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang
1. Replace SnpPV660Dxe with SnpPV600Dxe;
2. Add SnpPlatform:
Install protocol to enable nic port which are using.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang
Signed-off-by: Heyi Guo
---
Install protocol to enable sas port which is using and
transmit base address info of sas port to SasDriverDxe.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang
Signed-off-by: Heyi Guo
---
Code can also be found in github:
https://github.com/hisilicon/OpenPlatformPkg.git
branch: rp-1710-osi-v5
Heyi Guo (5):
Hisilicon/D03/Net: Update Snp driver
Hisilicon/D03/Sas: Add SasPlatform
Hisilicon/D05/Net: Update Snp driver
Hisilicon/D05/Sas: Add SasPlatform
Hisilicon: Fix the
From: Ming Huang
Update binary file for edk2 upgrade.
1. Replace UncachedMemoryAllocationLib with DmaLib;
2. Remove ArmCpuLib dependenc;
3. Remove ConvertToPhysicalAddress;
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang
Install protocol to enable sas port which is using and
transmit base address info of sas port to SasDriverDxe.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang
Signed-off-by: Heyi Guo
---
The drivers build from separate sources, their GUID should
be different.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Heyi Guo
Reviewed-by: Leif Lindholm
---
Platform/Hisilicon/D02/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.inf
Io BAR should be based IoBase and Mem BAR should be based PciRegionBase.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang
Signed-off-by: Heyi Guo
Reviewed-by: Leif Lindholm
---
From: Ming Huang
1. Disable I2C0 device avoiding access conflict in OS, for it is used
by UEFI to access DS3231 RTC chip and provide time services;
2. Modify _HID of I2C2 for matching the string in OS driver;
Contributed-under: TianoCore Contribution Agreement 1.1
From: Ming Huang
Fix bug of PcieRegion size definition and IO size definition.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang
Signed-off-by: Heyi Guo
Reviewed-by: Leif Lindholm
From: Ming Huang
Value of the environment variable FIRMWARE_VER is GIT SHA by default,
and you can add the environment variable FIRMWARE_VER to EXTRA_OPTIONS
at build time to specify something else, eg. "16.12-".
Contributed-under: TianoCore Contribution Agreement 1.1
From: Ming Huang
There is no interface from SAS0 or SAS2 controller on D05,
so SAS0 and SAS2 can't be used.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang
Signed-off-by: Heyi Guo
---
From: Jason zhang
1. Because Hi161x chip doesn't support "ARI Forwarding Enable"
function, BIOS will enumerate 32 same devices (Device Number 0~31)
when a Non-ARI capable device attached in the RP. Hi161x chip will
not fix it, need BIOS patch.
2. Just enlarge
From: Ming Huang
On D05 PCIe now, 2p NA PCIe2 and 2p NB PCIe0's pci domain addresses are
0x2000 and 0x3000 based. These addresses overlap with the DDR
memory range 0-1G. In this situation, on the inbound direction, our pcie
will drop the DDR address access that
From: Chenhui Sun
The PerTuning function is not stable, it will cause the
LSI SAS 3008/3108 crash, disable this function first.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chenhui Sun
Signed-off-by: Heyi Guo
1. Add Drivers/SasPlatform;
2. Add Drivers/Net/SnpPlatform;
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang
Signed-off-by: Heyi Guo
---
Platform/Hisilicon/D03/D03.dsc | 5 -
Platform/Hisilicon/D03/D03.fdf | 4
The drivers build from separate sources, their GUID should
be different.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Heyi Guo
Reviewed-by: Leif Lindholm
---
Platform/Hisilicon/D02/EarlyConfigPeim/EarlyConfigPeim.inf
Code can also be found in github:
https://github.com/hisilicon/OpenPlatformPkg.git
branch: rp-1710-platforms-v5
Note:
1. There may be some minor issue (or even in SoC IP) that causes D05/3 into
exception,
which was just found when we updated edk2 and edk2-platforms. We will continue
to
1. Add Drivers/SasPlatform;
2. Add Drivers/Net/SnpPlatform;
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang
Signed-off-by: Heyi Guo
Reviewed-by: Leif Lindholm
---
From: Yan Zhang
Assign valid value to AddressTranslationOffset to support
address translation between domains of CPU and PCIe, which
is need by GOP to enable frame buffer.
This patch fix the bug:
Kernel (4.12, without the vga driver) boot hang with kernel panic
while
From: Ming Huang
The Trusted Firmware binary was produced from the commit hash:
"14c7bdf"
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang
Signed-off-by: Heyi Guo
---
From: Ming Huang
Fix bug 3061(https://bugs.linaro.org/show_bug.cgi?id=3061):
D05(before EC) boot hangs at "Need Reset";
If the D05 is before EC, then speed of i2c reduce to 100k.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang
Hi Chris,
Thanks to provide this change. I have confirmed no binary change after this
patch.
Pushed this patch:
SHA-1: 4c34a8ea191155f438901e635bd87810072b19a4
* UefiCpuPkg/SmmCpuFeaturesLib: replace hard-coded machine code
Replace hard-coded machine code with equivalent assembly source
The commit log is saying the "BootNext" *DELETED* (before
PlatformBootManagerLib) may be *LOST* if there is reset during
PlatformBootManagerLib. I realized it.
The comment is saying to avoid the "BootNext" "SET" by PlatformBootManagerLib.
Sorry I am not getting the point.
Thanks,
Star
I didn't change the position of code to cache "BootNext", because:
This could avoid the "BootNext" (set by PlatformBootManagerLib) be consumed in
*this* boot.
Maybe this time it's more clear.
Thanks/Ray
> -Original Message-
> From: Zeng, Star
> Sent: Thursday, September 28, 2017 2:13
Ok, got it, tks. The new comment is showing why cache "BootNext" logic is still
kept there, the commit log is showing the reason of the patch change. Make
sense. :)
Reviewed-by: Star Zeng
Thanks,
Star
-Original Message-
From: Ni, Ruiyu
Sent: Thursday, September
Cc: Liming Gao
Cc: Michael Kinney
Cc: Kevin W Shaw
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Yonghong Zhu
---
2_fdf_design_discussion/25_[fv]_sections.md | 2 +-
Huajing Li (2):
ShellPkg/dh: Add mapping of new UEFI/PI protocols
ShellPkg/UefiHandleParsingLib.c: Map SmmPciRootBridgeIo correctly
.../UefiHandleParsingLib/UefiHandleParsingLib.c| 58 +-
.../UefiHandleParsingLib/UefiHandleParsingLib.inf | 40 +++
From: Huajing Li
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Huajing Li
Reviewed-by: Ruiyu Ni
Cc: Jaben Carsey
---
.../UefiHandleParsingLib/UefiHandleParsingLib.c| 56
From: Huajing Li
The current implementation has a typo that maps SmmPciRootBridgeIo
to "PciRootBridgeIo".
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Huajing Li
Reviewed-by: Ruiyu Ni
Cc: Jaben Carsey
The change Looks good to me.
Also, Good to see you adding the comment about why we need to cache BootNext
before all the platform hook function calls. :)
Reviewed-by: Sunny Wang
Regards,
Sunny Wang
-Original Message-
From: edk2-devel
Yes, they are legacy version with old style alignment.
It's first try to address this return status change in this new API. We may
update some APIs depending on requirement and impacts evaluations later.
Best Regards & Thanks,
LONG, Qin
-Original Message-
From: Zhang, Chao B
Sent:
On 09/19/17 08:48, Yonghong Zhu wrote:
> V2:
> change the option name to --binary-destination and --binary-source.
>
> fixes:https://bugzilla.tianocore.org/show_bug.cgi?id=689
> Cc: Liming Gao
> Cc: Michael Kinney
> Cc: Kevin W Shaw
On 09/28/17 14:06, Laszlo Ersek wrote:
> So, how can I invalidate all the cached values? Is it enough to delete
> the *.hash files?
... I'm asking because I tried the --binary-destination option as well,
and in the bin cache directory, *.depex and *.inf files were stored as
well, not just *.hash
Combine INIT-SIPI-SIPI code and remove the duplicate code.
Eric Dong (2):
UefiCpuPkg/PiSmmCpuDxeSmm: Combine INIT-SIPI-SIPI.
UefiCpuPkg/PiSmmCpuDxeSmm: Refine code to avoid duplicated code.
UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c | 123 +-
1 file changed, 43
In S3 resume path, current implementation do 2 separate INIT-SIPI-SIPI,
this is not necessary. This change combine these 2 INIT-SIPI-SIPI to 1
and add CpuPause between them.
Cc: Jiewen Yao
Cc: Ruiyu Ni
Contributed-under: TianoCore Contribution Agreement
1. We could either use BOOLEAN flag to tell SetProcessorRegister() which
register table to use.
Or, pass both RegisterTableList and CpuNum into SetProcessorRegister().
I prefer the latter one.
VOID
SetProcessorRegister (
IN CPU_REGISTER_TABLE*RegisterTables,
IN UINTN
yes, i like the idea to use table as parameter.
thank you!
Yao, Jiewen
> 在 2017年9月28日,下午6:04,Ni, Ruiyu 写道:
>
> 1. We could either use BOOLEAN flag to tell SetProcessorRegister() which
> register table to use.
> Or, pass both RegisterTableList and CpuNum into
Just FYI, another idea is to declare SetProcessorRegister() like below, then
the caller of SetProcessorRegister() has no need to touch mAcpiCpuData.
VOID
SetProcessorRegister (
IN BOOLEAN PreSmmFlag
)
{
CPU_REGISTER_TABLE*RegisterTableList;
...
if (PreSmmFlag) {
I have two comments here.
1) GenFv: ExtHeader UsedSize can directly be updated. You don't need to
allocate new buffer for it. Besides, VtfFileFlag is not required to be listed
in GenFvInternalLib.h.
2) Genfds: self.ExtEntrySize), self.ExtEntryType and self.UsedSize are hard
value. You can
Hi All,
I see that InitializeCpuExceptionHandlers() is called from DxeMain to take over
exception handlers and later from ArmCpuDxe.
Is there any specific purpose to call it from two places during dxe phase?
Additionally we are setting TGE bit three times in hcr_el2 during PrePei
Hello Fu Siyuan,
I see that blocksize option with tftp command is introduced with commit
2be45bfe2779043bc3566e879e7ec279412012dc.
Could you please help me clarify with the timeout error behavior observed in
previous mail
Please note the behavior varies for different file type(Attached sheet)
Hello Fu Siyuan,
I see that blocksize option with tftp command is introduced with commit
2be45bfe2779043bc3566e879e7ec279412012dc.
Could you please help me clarify with the timeout error behavior observed in
previous mail
Please note the behavior varies for different file type(Attached sheet).
> -Original Message-
> From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of Hao
> Wu
> Sent: Thursday, September 28, 2017 12:31 PM
> To: edk2-devel@lists.01.org
> Cc: Hao Wu ; Michael D Kinney
> ; Jiewen Yao
On 09/28/17 11:02, Gao, Liming wrote:
> Laszlo:
> Hash way may improve the incremental build performance. If hash value is
> not changed, module AutoGen and Make will be skipped.
> Time stamp way bases on Makefile. This way will run AutoGen every time. If
> no change, Makefile will not be
Laszlo:
I would like more people use it. Thank you! If you find any issue, please
let me know.
When hash is enabled, AutoGen phase calculates hash value of every source
files, INF, DSC and FDF, but has no AutoGen header and source file generation.
So, AutoGen still takes some time.
Vabhav Sharma would like to recall the message, "MTFTP file transfer timeout
error".
___
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel
Refine code to avoid duplicate code to set processor register.
Cc: Jiewen Yao
Cc: Ruiyu Ni
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong
---
UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c | 78
Reviewed-by: Jaben Carsey
> -Original Message-
> From: Ni, Ruiyu
> Sent: Wednesday, September 27, 2017 10:57 PM
> To: Bi, Dandan ; edk2-devel@lists.01.org
> Cc: Carsey, Jaben
> Subject: RE: [patch] ShellPkg/Dh: Refine
Reviewed-by: Jaben Carsey
> -Original Message-
> From: Ni, Ruiyu
> Sent: Wednesday, September 27, 2017 11:37 PM
> To: edk2-devel@lists.01.org
> Cc: Li, Huajing ; Carsey, Jaben
>
> Subject: [PATCH 1/2] ShellPkg/dh: Add
Reviewed-by: Jaben Carsey
> -Original Message-
> From: Ni, Ruiyu
> Sent: Wednesday, September 27, 2017 11:37 PM
> To: edk2-devel@lists.01.org
> Cc: Li, Huajing ; Carsey, Jaben
>
> Subject: [PATCH 2/2]
> On Sep 28, 2017, at 4:23 AM, Vabhav Sharma wrote:
>
> Hi All,
>
> I see that InitializeCpuExceptionHandlers() is called from DxeMain to take
> over exception handlers and later from ArmCpuDxe.
> Is there any specific purpose to call it from two places during dxe
Hi Jiewen,
my colleague Ladi (CC'd) reported an issue about MORLock in OVMF (and
also analyzed it in great depth):
https://bugzilla.redhat.com/show_bug.cgi?id=1496170
Here's my understanding of the "MemoryOverwriteRequestControl" and
"MemoryOverwriteRequestControlLock" variables:
(1) The
Reviewed-by: Jaben Carsey
> -Original Message-
> From: Ni, Ruiyu
> Sent: Thursday, September 28, 2017 1:50 AM
> To: Wu, Hao A ; edk2-devel@lists.01.org
> Cc: Carsey, Jaben
> Subject: RE: [PATCH v2] ShellPkg/dh: Add the
I am ok with the code logic change, but a little confused by the new comment.
It seems not match with the commit log.
" This could avoid the "BootNext" set by PlatformBootManagerLib be consumed in
this boot. "
Thanks,
Star
-Original Message-
From: Ni, Ruiyu
Sent: Thursday, September
This could avoid the "BootNext" set by PlatformBootManagerLib be consumed in
*this* boot.
If I add "*" around "this", is it more clear?
Thanks/Ray
> -Original Message-
> From: Zeng, Star
> Sent: Thursday, September 28, 2017 2:00 PM
> To: Ni, Ruiyu ;
Qin:
What about other X509 related interface, such as X509GetTBSCert,
X509GetSubjectName. They all return TRUE/FALSE.
It looks inconsistent between these interfaces
-Original Message-
From: Long, Qin
Sent: Thursday, September 21, 2017 10:48 AM
To: ler...@redhat.com; Ye, Ting
Commit 8932679df5be046feba30fae80776c5815232a08 adds an ASSERT for
checking NULL pointer dereference.
This commit adds comments to clarify the reason for using ASSERT as the
check.
Cc: Star Zeng
Cc: Michael D Kinney
Cc: Jiewen Yao
Looks good to me.
Reviewed-by: Fu Siyuan
-Original Message-
From: Wu, Hao A
Sent: Thursday, September 28, 2017 12:32 PM
To: edk2-devel@lists.01.org
Cc: Wu, Hao A ; Shi, Steven ; Fu,
Siyuan ; Ye, Ting
Reviewed-by: Fu Siyuan
-Original Message-
From: Wu, Jiaxin
Sent: Thursday, September 28, 2017 1:42 PM
To: edk2-devel@lists.01.org
Cc: Ye, Ting ; Fu, Siyuan ; Wu, Jiaxin
Subject: [Patch 0/2] Clarify the
Reviewed-by: Ye Ting
-Original Message-
From: Wu, Jiaxin
Sent: Thursday, September 28, 2017 1:49 PM
To: edk2-devel@lists.01.org
Cc: Santhapur Naveen ; Ye, Ting ;
Fu, Siyuan ; Wu, Jiaxin
On 09/28/17 03:03, Jian J Wang wrote:
> QemuVideoDxe driver will link VBE SHIM into page 0. If NULL pointer
> detection is enabled, this driver will fail to load. NULL pointer detection
> bypassing code is added to prevent such problem during boot.
>
> Please note that Windows 7 will try to
Reviewed-by: Fu Siyuan
-Original Message-
From: Wu, Jiaxin
Sent: Thursday, September 28, 2017 1:49 PM
To: edk2-devel@lists.01.org
Cc: Santhapur Naveen ; Ye, Ting ;
Fu, Siyuan ; Wu, Jiaxin
Reviewed-by: Ye Ting
-Original Message-
From: Wu, Hao A
Sent: Thursday, September 28, 2017 12:32 PM
To: edk2-devel@lists.01.org
Cc: Wu, Hao A ; Shi, Steven ; Fu,
Siyuan ; Ye, Ting ;
Series Reviewed-by: Ye Ting
-Original Message-
From: Wu, Jiaxin
Sent: Thursday, September 28, 2017 1:42 PM
To: edk2-devel@lists.01.org
Cc: Ye, Ting ; Fu, Siyuan ; Wu, Jiaxin
Subject: [Patch 0/2] Clarify
On 09/19/17 08:48, Yonghong Zhu wrote:
> V2:
> change the option name to --binary-destination and --binary-source.
>
> fixes:https://bugzilla.tianocore.org/show_bug.cgi?id=689
What are the benefits of a hash-based incremental build over a
timestamp-based incremental build?
Thank you,
Laszlo
>
From: Yunhua Feng
Per PI 1.6 we added an FV Extended Header entry that would contain the
size of the FV that was in use.
Cc: Liming Gao
Cc: Yonghong Zhu
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by:
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=655
V2 change:
Put some strings into the UNI file for localization.
The dump information will include:
a. The type of the partition (Mbr, Gpt or Other);
b. Whether the partition is an EFI System Partition.
Cc: Ruiyu Ni
Cc:
In S3 resume path, current implementation do 2 separate INIT-SIPI-SIPI,
this is not necessary. This change combine these 2 INIT-SIPI-SIPI to 1
and add CpuPause between them.
Cc: Jiewen Yao
Cc: Ruiyu Ni
Contributed-under: TianoCore Contribution Agreement
Reviewed-by: Ruiyu Ni
Thanks/Ray
> -Original Message-
> From: Wu, Hao A
> Sent: Thursday, September 28, 2017 4:33 PM
> To: edk2-devel@lists.01.org
> Cc: Wu, Hao A ; Ni, Ruiyu ; Carsey,
> Jaben
>
Laszlo:
Hash way may improve the incremental build performance. If hash value is not
changed, module AutoGen and Make will be skipped.
Time stamp way bases on Makefile. This way will run AutoGen every time. If no
change, Makefile will not be updated.
Thanks
Liming
>-Original
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