One of the UEFI Self Certification tests (UEFI-SCT) need to read the
current exception level SCTLR Register.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: John Powell
Signed-off-by: Supreeth Venkatesh
---
One of the UEFI Self Certification tests (UEFI-SCT) need to read the
current exception level SCTLR Register.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: John Powell
Signed-off-by: Supreeth Venkatesh
---
Reviewed by Thomas Palmer
-Original Message-
From: Jiaxin Wu [mailto:jiaxin...@intel.com]
Sent: Thursday, July 7, 2016 1:39 AM
To: edk2-devel@lists.01.org
Cc: Palmer, Thomas ; Samer El-Haj-Mahmoud
; Long Qin
Reviewed by Thomas Palmer
-Original Message-
From: Jiaxin Wu [mailto:jiaxin...@intel.com]
Sent: Monday, July 11, 2016 12:43 AM
To: edk2-devel@lists.01.org
Cc: Palmer, Thomas ; Samer El-Haj-Mahmoud
; Long Qin
Reviewed by Thomas Palmer
-Original Message-
From: Jiaxin Wu [mailto:jiaxin...@intel.com]
Sent: Monday, July 11, 2016 12:43 AM
To: edk2-devel@lists.01.org
Cc: Palmer, Thomas ; Samer El-Haj-Mahmoud
; Long Qin
Reviewed by Thomas Palmer
-Original Message-
From: Jiaxin Wu [mailto:jiaxin...@intel.com]
Sent: Monday, July 4, 2016 8:41 PM
To: edk2-devel@lists.01.org
Cc: Palmer, Thomas ; Ye Ting ; Fu
Siyuan
Jiaxin,
UEFI's OpenSSL library does not support all the ciphers that were added
in your patch due to the UEFI configuration. We need to remove "no-idea" and
"no-dsa" from the process_files.sh and add "enable-weak-ssl-ciphers"
While we are modifying
Hi Leif,
On 07/29/2016 11:06 AM, Leif Lindholm wrote:
From: Jeff Brasen
Adds support for the EBC VM for AARCH64 platforms
Submitted on behalf of a third-party: The Linux Foundation
This contribution is licensed under the BSD license as found at
On 2016-07-28 23:09:15, Ard Biesheuvel wrote:
> On 29 July 2016 at 06:47, Gao, Liming wrote:
> > Ard:
> > Thanks for your update. I have some comments for them.
> > 1) It uses GCC as Link for GCC44-GCC49. Have you done verification on them?
> > I verify GCC49 in
On 29 July 2016 at 17:18, Gao, Liming wrote:
> Ard:
>
> My gcc version 5.3.0 20151204 (Ubuntu 5.3.0-3ubuntu1~14.04). I will try
> GCC54.
>
Could you check if the issue also occurs with the 'old' GCC49, i.e.,
the version that uses LD as the linker?
>
>
> Besides, for
Cc: Liming Gao
Cc: Michael Kinney
Cc: Feng Tian
Cc: Giri P Mudusuru
Cc: Laszlo Ersek
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan
Cc: Michael Kinney
Cc: Feng Tian
Cc: Giri P Mudusuru
Cc: Laszlo Ersek
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan
---
v4:
1. Keep GDT table setup to fix IA32 S3 boot issue.
Cc: Michael Kinney
Cc: Feng Tian
Cc: Giri P Mudusuru
Cc: Laszlo Ersek
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by:
Cc: Liming Gao
Cc: Michael Kinney
Cc: Feng Tian
Cc: Giri P Mudusuru
Cc: Laszlo Ersek
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan
Consume MP Initialize library to produce CPU MP Protocol services to simply the
code.
v4:
1. Update CpuDxe.c file header to mention it produces CPU Arch protocol.
2. Update BistData type from UINT32 to EFI_HEALTH_FLAG.
3. Move some header location from CpuMp.h to CpuDxe.h.
v3:
1. Move
Cc: Liming Gao
Cc: Michael Kinney
Cc: Feng Tian
Cc: Giri P Mudusuru
Cc: Laszlo Ersek
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan
Move the code in PeiMpServices.c & PeiMpServices.h to CpuMpPei.c & CpuMpPei.h.
v3:
1. Rename MpInitLibSwitchBSP to MpInitLibSwitchBSP
2. Add PeiMpInitLib.inf in DSC file
Cc: Michael Kinney
Cc: Feng Tian
Cc: Giri P Mudusuru
Register Exit Boot Service callback function MpInitExitBootServicesCallback() to
place AP one safe loop before hand-off to OS.
Allocated one reserved memory and copy the AsmRellocateApLoop() code into it. It
could avoid the CPU Dxe driver (located in Boot Service data range) crashed
after Exit
v4:
1. Simply the internal function MpInitLibEnableDisableAP()'s function
header due to it is duplicated with MpInitLibEnableDisableAP().
v3:
1. Use CamelCase for mCheckAllAPsEvent, mStopCheckAllApsStatus.
Cc: Michael Kinney
Cc: Feng Tian
Consume MP initialize library to produce CPU MP PPI, it could simply the code.
Add STATIC for some internal functions to avoid build issue with the same
functions name in PeiMpInit instance. They will be removed by the next patch.
v4:
1. Update BistData type from UINT32 to EFI_HEALTH_FLAGS.
Cc: Michael Kinney
Cc: Feng Tian
Cc: Giri P Mudusuru
Cc: Laszlo Ersek
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan
---
v3:
1. Use CamelCase for CheckAndUpdateApsStatus().
Cc: Michael Kinney
Cc: Feng Tian
Cc: Giri P Mudusuru
Cc: Laszlo Ersek
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by:
v4:
1. Simply the internal function StartupThisAPWorker()'s comment
header due to it is duplicated with MpInitLibStartupThisAP().
v3:
1. Use CamelCase for mStopCheckAllApsStatus and
CheckAndUpdateApsStatus().
Cc: Michael Kinney
Cc: Feng Tian
v4:
1. Update HealthData type from UINT32 to EFI_HEALTH_FLAGS
Cc: Michael Kinney
Cc: Feng Tian
Cc: Giri P Mudusuru
Cc: Laszlo Ersek
Contributed-under: TianoCore Contribution Agreement 1.0
This update is for CpuDxe consuming MP Initialize library.
Cc: Michael Kinney
Cc: Feng Tian
Cc: Kelly Steele
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan
---
This update is for CpuMpPei consuming MP Initialize library.
Cc: Michael Kinney
Cc: Feng Tian
Cc: Jordan Justen
Cc: Laszlo Ersek
Contributed-under: TianoCore Contribution Agreement 1.0
Cc: Michael Kinney
Cc: Feng Tian
Cc: Giri P Mudusuru
Cc: Laszlo Ersek
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan
---
v4:
1. Simply the internal function StartupAllAPsWorker()'s function
header due to it is duplicated with MpInitLibStartupAllAPs().
v3:
1. Use CamelCase for mStopCheckAllApsStatus and
CheckAndUpdateApsStatus()
Cc: Michael Kinney
Cc: Feng Tian
Cc: Michael Kinney
Cc: Feng Tian
Cc: Giri P Mudusuru
Cc: Laszlo Ersek
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan
---
v4:
1. Simply the internal function SwitchBSPWorker()'s comment header
due to it is duplicated with MpInitLibSwitchBSP().
v3:
1. Rename MpInitLibSwitchBsp to MpInitLibSwitchBSP.
Cc: Michael Kinney
Cc: Feng Tian
Cc: Giri P Mudusuru
In PeiMpInitLib, save CPU MP Data pointer into one local Guided HOB.
In DxeMpInitLib, save CPU MP Data pointer into one global variable.
Add helper functions GetCpuMpData()/SaveCpuMpData().
Cc: Michael Kinney
Cc: Feng Tian
Cc: Giri P Mudusuru
v4:
1. ProcessorSignature is updated to CPU_MICROCODE_PROCESSOR_SIGNATURE
instead of UINT32.
Cc: Michael Kinney
Cc: Feng Tian
Cc: Giri P Mudusuru
Cc: Laszlo Ersek
Contributed-under: TianoCore
If GUIDed HOB mCpuInitMpLibHobGuid exists, we could get the processor count and
processor APICID and Initial APICID from CPU_INFO_IN_HOB. We needn't to delay
for broadcast INIT-SIPI-SIPI results and could improve performance.
Cc: Michael Kinney
Cc: Feng Tian
FillExchangeInfoData() is used to fill MP_CPU_EXCHANGE_INFO date exchanged
between C code and assembly code of AP reset vector.
Cc: Michael Kinney
Cc: Feng Tian
Cc: Giri P Mudusuru
Cc: Laszlo Ersek
Cc: Michael Kinney
Cc: Feng Tian
Cc: Giri P Mudusuru
Cc: Laszlo Ersek
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan
---
Add CPU_VOLATILE_REGISTERS definitions for CRx and DRx required to be restored
after APs received INIT IPI.
Add worker functions SaveVolatileRegisters()/RestoreVolatileRegisters() used to
save/restore CRx and DRx. It also check if Debugging Extensions supported or
not.
Cc: Michael Kinney
ApCFunction() is the first C function executed from AP reset vector. When APs
waken up at the first time, it will sync BSP's MTRR setting and load microcode
on APs and collect APs' BIST information.
When AP tasked finished, it will place APs it one loop specified by ApLoopMode.
Cc: Michael
WakeUpAP() is used to wakeup APs per current ApLoopMode and make sure APs wake
up successfully.
Cc: Michael Kinney
Cc: Feng Tian
Cc: Giri P Mudusuru
Cc: Laszlo Ersek
Contributed-under: TianoCore
If x2APIC flag is set, enable x2APIC mode on all APs and BSP. Before we wakeup
APs to enable x2APIC mode, we should wait all APs have finished initialization.
Cc: Michael Kinney
Cc: Feng Tian
Cc: Giri P Mudusuru
Cc:
CollectProcessorCount() will send the 1st INIT-SIPI-SIPI to get processor count
in system.
Cc: Michael Kinney
Cc: Feng Tian
Cc: Giri P Mudusuru
Cc: Laszlo Ersek
Contributed-under: TianoCore
In PeiMpInitLib, register End of PEI callback function CpuMpEndOfPeiCallback().
Cc: Michael Kinney
Cc: Feng Tian
Cc: Giri P Mudusuru
Cc: Laszlo Ersek
Contributed-under: TianoCore Contribution
In DxeMpInitLib, register one period event callback function CheckAPsStatus()
used to check AP Status.
v3:
1. Use CamelCase for mCheckAllAPsEvent, mStopCheckAllApsStatus and
CheckAndUpdateApsStatus().
2. Move SetTimer() from Patch #17 to Patch 16.
Cc: Michael Kinney
In MpInitLibInitialize(), invoke AsmGetAddress() to get get assembly functions'
entry addresses and the sizes from returned MP_ASSEMBLY_ADDRESS_MAP structure.
v4:
1. Add AsmRelocateApLoop information return in AsmGetAddress().
v3:
1. Rename AsmRellocateApLoop to AsmRelocateApLoop.
Cc:
Initialize CPU_AP_DATA for CPU APs and add GetApState()/SetApState() helper
functions to get/set AP state.
Cc: Michael Kinney
Cc: Feng Tian
Cc: Giri P Mudusuru
Cc: Laszlo Ersek
Contributed-under:
Add two MP Initialize Library instances PeiMpInitLib.inf and DxeMpInitLib.inf
with NULL implementation.
One PeiMpInitLib.inf is consumed by PEI MP driver. Another DxeMpInitLib.inf is
consumed by DXE MP driver.
Place MpInitLibStartupAllAPs()/MpInitLibStartupThisAp()/MpInitLibSwitchBSP()/
EnableExecuteDisable in MP_CPU_EXCHANGE_INFO is used to tell AP reset vector if
enable execute disable feature on APs. This feature should be enabled before CR3
is written.
Cc: Michael Kinney
Cc: Feng Tian
Cc: Giri P Mudusuru
Cc: Michael Kinney
Cc: Feng Tian
Cc: Giri P Mudusuru
Cc: Laszlo Ersek
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan
---
1. Rename NumApsExecutingLoction to NumApsExecutingLocation
2. Update some comments in NASM files.
3. Remove PeiCpuMpData from MP_CPU_EXCHANGE_INFO.
Cc: Michael Kinney
Cc: Feng Tian
Cc: Giri P Mudusuru
Cc: Laszlo Ersek
Firstly, get ApLoopMode from PcdCpuApLoopMode. If MonitorMwait feature is not
supported, update ApLoopMode to ApHltLoop. If MonitorMwait feature is supported,
get MointorFilter size by CPUID.[EAX=05H]:EBX.BIT0-15.
Cc: Michael Kinney
Cc: Feng Tian
AsmRelocateApLoop() is used to place APs into MWAIT-loop if MonitorMwait
feature is supported before hand-off to OS, or place APs into HLT-loop if
MonitorMwait feature is not supported.
If the current mode is long mode, we will switch APs to protected mode
before placing APs in MWAIT-loop or
We add MP Initialize Library defined in UefiCpuPkg/Include/Library/MpInitLib.h.
It will provide basic functionalities of MP services and could be consumed by
CPU MP PEI and CPU MP DXE to produce CPU MP PPI and CPU MP Protocol. Then most
of code could be shared between PEI and DXE modules.
MP Initialize library provides basic functionalities to do APs initialization,
to manage MP information and to wakeup APs to execute AP task.
It could be consumed by CPU MP PEI or DXE drivers to provide CPU MP PPI/Protocol
services.
v4:
1. MpInitLibGetProcessorInfo():
Update HealthData
Add microcode definitions defined in Intel(R) 64 and IA-32 Architectures
Software Developer's Manual Volume 3A, Section 9.11.
v4:
1. ProcessorSignature type changed to CPU_MICROCODE_PROCESSOR_SIGNATURE
2. Add pack(1) for structure CPU_MICROCODE_HEADER and
CPU_MICROCODE_EXTENDED_TABLE.
Currently, we will allocate StartupVector buffer under 1MB at entry point
function. But some modules may allocate some hard code address under 1MB.
For example, LegacyBiosDxe driver tries to manage some legacy range under
640KB.
To avoid the conflicts, we move StartupVector buffer allocation to
#define MSR_IA32_APIC_BASE_ADDRESS is duplicated with #define MSR_IA32_APIC_BASE
defined in UefiCpuPkg/Include/Register/ArchitecturalMsr.h, so we could remove it
and update the modules to use MSR_IA32_APIC_BASE from ArchitecturalMsr.h.
Structure MSR_IA32_APIC_BASE conflicts with #define
Add assembly code for AP reset vector and the definition of MP_CPU_EXCHANGE_INFO
that are used to exchange the data between C code and assembly code when AP wake
up.
v4:
1. Copy MP_CPU_EXCHANGE_INFO from UefiCpuPkg/CpuMpPei/CpuMpPei.h
2. Copy MpEqu.inc and MpFuncs.nasm from
It appears that this file is not actually used. It is only referenced in the
[Rule.Common.UEFI_DRIVER.NATIVE_BINARY] rule in PlatformPkg.fdf. A little
further research shows that an alternate method was used for the actual GOP
binary (see below). A grep of the entire tree shows that no one uses
On Thu, Jul 07, 2016 at 05:03:13PM +0200, Laszlo Ersek wrote:
> On 07/07/16 16:24, Leif Lindholm wrote:
> > Git tends to see .depex files as text, causing hideous patches being
> > generated (and breaking PatchCheck.py).
> >
> > Add a .gitattributes file instructing git to treat them as binary.
>
Since we now have EBC support for AArch64, enable it by default
on the QEMU platform.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Leif Lindholm
---
ArmVirtPkg/ArmVirtQemu.dsc | 1 +
ArmVirtPkg/ArmVirtQemuFvMain.fdf.inc | 5 +
2
Import the AArch64 EBC implementation from
https://source.codeaurora.org/external/server/edk2-blue/
1/2 does not contain a "Contributed-under:" due to my interpretation
of section 4 of the Tianocore Contribution license.
Tested with MdeModulePkg/Application/HelloWorld built for EBC.
Would
From: Jeff Brasen
Adds support for the EBC VM for AARCH64 platforms
Submitted on behalf of a third-party: The Linux Foundation
This contribution is licensed under the BSD license as found at
http://opensource.org/licenses/bsd-license.php
[Taken from
Laszlo,
I have changed the global email setting for 'whinedays' to 0 to disable
that built-in Whine Event.
This means the only whine messages that should occur are Whine Events
added by individual users or administrators.
FYI...I had enabled that feature to make sure the cron jobs were
running
Ard:
My gcc version 5.3.0 20151204 (Ubuntu 5.3.0-3ubuntu1~14.04). I will try GCC54.
Besides, for new GCC5 tool chain, could you add one brief introduction in
tools_def.txt like GCC49? And, highlight it enable LTO by default.
# GCC49 -Linux,Windows- Requires:
#
On 07/29/16 11:25, Laszlo Ersek wrote:
> On 07/29/16 10:57, Fan, Jeff wrote:
>> Laszlo,
>>
>> I sent one evaluate patch for you by adding back GDT table load in CpuDxe.
>> Could you please help to verify if it could fix IA32 S3 issue?
>
> Yes, I'll try to look into it shortly. I'll have to
On Thu, Jul 28, 2016 at 09:41:57AM -0500, Jeremy Linton wrote:
> SMBIOS data is consumed by a wide range of enterprise applications.
>
> Fill in the basic requirements of the SMBIOS specification by hardcoding
> the minimum required structures and data using Juno information. Only the
> juno
According to PI spec,EndOfDxe Event should be signaled
before DxeSmmReadyToLock protocol installation.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: lushifex
---
Vlv2TbltDevicePkg/Library/PlatformBdsLib/BdsPlatform.c | 7 ++-
Thanks Laszlo!
I will follow it.
Shifei
-Original Message-
From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of Laszlo
Ersek
Sent: Friday, July 29, 2016 3:51 PM
To: Wei, David; Lu, ShifeiX A
Cc: edk2-devel@lists.01.org
Subject: Re: [edk2] [Patch]
On 07/29/16 10:57, Fan, Jeff wrote:
> Laszlo,
>
> I sent one evaluate patch for you by adding back GDT table load in CpuDxe.
> Could you please help to verify if it could fix IA32 S3 issue?
Yes, I'll try to look into it shortly. I'll have to retest the other
cases as well.
Thanks!
Laszlo
>
Laszlo,
I sent one evaluate patch for you by adding back GDT table load in CpuDxe.
Could you please help to verify if it could fix IA32 S3 issue?
Another solution is to remove hardcode from PiSmmCpuDxeSmm driver. But I do not
prefer to do it this time. :-)
Thanks!
Jeff
-Original
Thanks a lot for reply, guys. Bios form https://www.kraxel.org rly helped
and my keyboard working fine.
Thanks,
Eugene.
2016-07-26 4:36 GMT+03:00 Tian, Feng :
> If the renesas usb 3.0 host controller follows XHCI spec, then EDKII XHCI
> driver could be used to manage it.
>
On 07/29/16 04:31, Wei, David wrote:
> Reviewed-by: David Wei
>
>
>
> Thanks,
> David Wei
>
> Intel SSG BIOS Team
I recommend using the new EfiEventGroupSignal() function from UefiLib instead.
Please refer to the following commits:
On 07/29/16 06:07, Bruce Cran wrote:
> On 7/28/16 6:46 PM, Kinney, Michael D wrote:
>
>> Built-in archives for edk2-devel and edk2-bugs and now enabled.
>
> Thanks!
>
Thanks!
Laszlo
___
edk2-devel mailing list
edk2-devel@lists.01.org
On 07/29/16 05:25, Gary Lin wrote:
> We only enable "-Wno-unused-but-set-variable" for the release build
> and gcc would complain that the varible passed to ASSERT_EFI_ERROR
> wasn't used in the debug build. Just don't define MDEPKG_NDEBUG for
> the debug build to make gcc happy with
Hello Mike,
I got my first ever bugzilla whine today. It says "All of these bugs are
in the CONFIRMED state, and have not been touched in 7 days or more."
I'm not amused. :) I keep a very close eye on my BZs and I don't welcome
automated whines.
I checked the Bugzilla 5 documentation about
On 29 July 2016 at 08:09, Ard Biesheuvel wrote:
> On 29 July 2016 at 06:47, Gao, Liming wrote:
>> Ard:
>> Thanks for your update. I have some comments for them.
>> 1) It uses GCC as Link for GCC44-GCC49. Have you done verification on them?
>> I
When creating a UNI file if there is a name conflict, add an index from 0 to
the file name
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: hesschen
---
.../Source/Python/UPT/GenMetaFile/GenDecFile.py| 5 +++--
Reviewed-by: Yonghong Zhu
Best Regards,
Zhu Yonghong
-Original Message-
From: Gao, Liming
Sent: Thursday, July 28, 2016 4:46 PM
To: edk2-devel@lists.01.org
Cc: Zhu, Yonghong
Subject: [Patch 1/3] BaseTools: Correct ReadMe.txt file with
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