If user not set Structure overall value in Dsc,
Structure Pcd value would be incorrect.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Bob Feng
Cc: Liming Gao
---
BaseTools/Source/Python/Workspace/BuildClassObject.py | 9 ++---
1 file changed, 6 insertions(+), 3 dele
> v2:
>Roll back changes (just white spaces) caused by misoperation in git
This issue is introduced by a patch at
f32bfe6d061420a15bac6083063d227c567e6388
The above patch miss the case of 64-bit PEI, which will link
X64/MpFuncs.nasm instead of Ia32/MpFuncs.nasm. For X64/MpFuncs.nasm,
Exch
From: Star Zeng
Every processor's StartupApSignal is initialized in
MpInitLibInitialize() before calling CollectProcessorCount().
When SortApicId() is called from CollectProcessorCount(), AP Index
is re-assigned by APIC ID. But SortApicId() forgets to set the
correct StartupApSignal when sorting
This issue is introduced by a patch at
f32bfe6d061420a15bac6083063d227c567e6388
The above patch miss the case of 64-bit PEI, which will link
X64/MpFuncs.nasm instead of Ia32/MpFuncs.nasm. For X64/MpFuncs.nasm,
ExchangeInfo->ModeHighMemory should be always initialized no matter
if separate wake
Jiewen:
Thank you for the comment.
I agree with 1〜3. Will update patch accordingly
For 4. We verified short format Possible Interrupt with
PcdTpm2PossibleIrqNumBuf set to
{(UINT32) 0x01}Short formed resource buffer
{(UINT32)0x01, ~ (UINT32)0x0A} Sho
Reviewed-by: jiewen@intel.com
> -Original Message-
> From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of Ruiyu
> Ni
> Sent: Thursday, January 25, 2018 1:10 PM
> To: edk2-devel@lists.01.org
> Cc: Yao, Jiewen
> Subject: [edk2] [PATCH] UefiCpuPkg/CpuExceptionHandler: I
Disable xDCI and assign USB3 Port 0 (OTG port) to xHCI.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: zwei4
---
.../Common/PlatformSettings/PlatformSetupDxe/SouthClusterConfig.vfi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git
a/Platform/Broxton
Reviewed-by: jiewen@intel.com
> -Original Message-
> From: Zhang, Chao B
> Sent: Thursday, January 25, 2018 12:54 PM
> To: edk2-devel@lists.01.org
> Cc: Yao, Jiewen ; Chinnusamy, Rajkumar K
> ; Zhang, Chao B
> Subject: [PATCH] SecurityPkg:Tpm2DeviceLibDTpm: Support TPM command
> cance
Thanks Chao.
In general this patch is good.
Some minor suggestion for your consideration:
1) Can we rename PcdTpm2IrqNum to PcdTpm2CurrentIrqNum ? (To match
PcdTpm2PossibleIrqNumBuf)
2) I suggest we output debug message if below condition is NOT satisfied. As
such people know what happens.
Sile
1. Expose _CRS, _SRS, _PRS control method to support TPM interrupt
2. Provide 2 PCDs to configure _CRS and _PRS returned data
Cc: Yao Jiewen
Cc: Ronald Aigner
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chao Zhang
---
SecurityPkg/SecurityPkg.dec | 12 +-
Sec
On 2018/1/24 5:29, Jeremy Linton wrote:
> Hi,
>
>
> On 01/18/2018 09:01 AM, Ming Huang wrote:
>> From: Jason Zhang
>>
>> Contributed-under: TianoCore Contribution Agreement 1.1
>> Signed-off-by: Jason Zhang
>> Signed-off-by: Ming Huang
>> Signed-off-by: Heyi Guo
>> ---
>> Platform/Hisilic
Hi Star,
I am not sure. Since these definitions are still used in other packages such as
Intelframeworkmodulepkg. If we want to remove them, we must clean up all the
old perf related codes in Edk2 code base to avoid build block issues.
Thanks,
Dandan
-Original Message-
From: Zeng, Star
Hi Arthur,
Could you please give more details about your case that
HorizontalResolution * (BitsPerPixel / 8) and pFbInfo->BytesPerScanLine
don't match?
I did a brief search in Coreboot source and found following comments in
coreboot-4.6\src\lib\edid.c:
/* In the case of (e.g.) 24 framebuffe
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ruiyu Ni
Cc: Jiewen Yao
---
UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiDxeSmmCpuException.c | 6 +-
UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuException.c| 6 +-
2 files changed, 10 insertions(+), 2 dele
Could we also remove the related definitions in
MdeModulePkg\Include\Guid\Performance.h?
//
// The data structure for performance data in ACPI memory.
//
#define PERFORMANCE_SIGNATURE SIGNATURE_32 ('P', 'e', 'r', 'f')
#define PERF_TOKEN_SIZE 28
#define PERF_TOKEN_LENGTH (PERF_TOKE
Hi Laszlo,
Thank you for your comments.
Yes. The PERF_INMODULE_START_ID macro is from "ExtendedFirmwarePerformance.h"
which is added in the new performance infrastructure patches([ mail subject:
patch 0/8] Update EDKII Performance infrastructure based on ACPI FPDT table).
That is the dependenc
Sorry. Made a mistake. please skip the mail.
-Original Message-
From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of Zhang,
Chao B
Sent: Thursday, January 25, 2018 12:54 PM
To: edk2-devel@lists.01.org
Subject: [edk2] [PATCH] Enable RSA2048SHA256 to replace CCG SignedSe
On 1/24/2018 4:01 PM, Dandan Bi wrote:
Our new performance infrastructure can support to dump performance
date form ACPI table in OS. So we can remove the old pref code to
write performance data to OS.
Cc: Liming Gao
Cc: Ruiyu Ni
Cc: Star Zeng
Contributed-under: TianoCore Contribution Agreeme
---
KabylakePlatSamplePkg/PlatformPkg.dsc | 13 +--
KabylakePlatSamplePkg/PlatformPkg.fdf | 36 +++--
KabylakePlatSamplePkg/PlatformPkgConfig.dsc | 2 +-
3 files changed, 31 insertions(+), 20 deletions(-)
diff --git a/KabylakePlatSamplePkg/PlatformPkg.
On 1/24/2018 4:01 PM, Dandan Bi wrote:
Our new performance infrastructure can support to dump performance
date form ACPI table in OS. So we can remove the old pref code to
write performance data to OS.
Cc: Liming Gao
Cc: Ruiyu Ni
Cc: Star Zeng
Contributed-under: TianoCore Contribution Agreeme
According to TCG PP1.3 spec, error PCR bank allocation input should be rejected
by
Physical Presence. Firmware has to ensure that at least one PCR banks is active.
Cc: Long Qin
Cc: Yao Jiewen
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chao Zhang
---
.../DxeTcg2Phys
Support TPM Command cancel if executing command timeouts. Cancel could
happen in long running command case
Cc: Yao Jiewen
Cc: Chinnusamy Rajkumar K
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chao Zhang
---
MdePkg/Include/IndustryStandard/TpmTis.h| 8 +--
According to TCG PP1.3 spec, error PCR bank allocation input should be
rejected by Physical Presence. Firmware has to ensure that at least one
PCR banks is active.
Cc: Long Qin
Cc: Yao Jiewen
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chao Zhang
---
.../DxeTcg2Physi
Hi Laszlo,
The HttpDxe driver needs to install the Driver Binding Protocol so as to check
if a specific controller is supported by HttpDxe. HttpDxe can only be started
if the TcpServiceBindingProtocol existed. So, it has to follow the UEFI Driver
Model.
For the PCD usage, I think it should be
Reviewed-by: Yonghong Zhu
Best Regards,
Zhu Yonghong
-Original Message-
From: Gary Lin [mailto:g...@suse.com]
Sent: Wednesday, January 17, 2018 12:06 PM
To: edk2-devel@lists.01.org
Cc: Zhu, Yonghong ; Gao, Liming
Subject: [PATCH] BaseTools: Fix indentation
Mixing usage of spaces and
Reviewed-by: jiewen@intel.com
> -Original Message-
> From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of Star
> Zeng
> Sent: Thursday, January 25, 2018 11:23 AM
> To: edk2-devel@lists.01.org
> Cc: Yao, Jiewen ; Zeng, Star
> Subject: [edk2] [PATCH] MdeModulePkg PiSmm
"Entry->Link.ForwardLink = NULL;" is present in RemoveMemoryMapEntry()
for DxeCore, that is correct.
"Entry->Link.ForwardLink = NULL;" is absent in RemoveOldEntry()
for PiSmmCore, that is incorrect.
Without this fix, when FromStack in Entry is TRUE,
the "InsertTailList (&mMapStack[mMapDepth].Link,
Reviewed-by: Yonghong Zhu
Best Regards,
Zhu Yonghong
-Original Message-
From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of Liming
Gao
Sent: Thursday, January 25, 2018 9:42 AM
To: edk2-devel@lists.01.org
Subject: [edk2] [Patch] BaseTools: CommonLib Fix Crash to write
Refine the debug messages during the verification of microcode to make
them more clear.
Cc: Jiewen Yao
Cc: Star Zeng
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Hao Wu
---
.../Capsule/MicrocodeUpdateDxe/MicrocodeUpdate.c| 21 +++--
1 file changed,
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao
---
BaseTools/Source/C/Common/PcdValueCommon.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/BaseTools/Source/C/Common/PcdValueCommon.c
b/BaseTools/Source/C/Common/PcdValueCommon.c
index 32963
Considering that there's a similar assignment in "else" block
ExchangeInfo->ModeTransitionMemory = (UINT32)
(ExchangeInfo->BufferStart + CpuMpData->AddressMap.ModeTransitionOffset);
I would rather keep the assignment statement you mentioned inside "if" block.
Actually there's another i
On 2018/1/24 19:21, Ard Biesheuvel wrote:
> On 24 January 2018 at 11:10, Huangming (Mark) wrote:
>>
>>
>> On 2018/1/20 18:50, Ard Biesheuvel wrote:
>>> On 18 January 2018 at 15:01, Ming Huang wrote:
From: Jason Zhang
Contributed-under: TianoCore Contribution Agreement 1.1
S
From: Arthur Heymans
Fetch BytesPerScanLine from coreboot table to reflect how the actual
framebuffer is set up instead of guessing it from the horizontal
resolution.
This fixes a garbled display when HorizontalResolution * (BitsPerPixel
/ 8) and pFbInfo->BytesPerScanLine don't match.
Contribut
On 01/24/18 07:50, Wu, Jiaxin wrote:
> Hi Laszlo,
>
> After the discussion with team member, we still prefer to use the PCD
> solution. In HttpDxe driver, we don't want to locate/use a
> nonstandard protocol. We think It's not a general solution for the
> UEFI driver.
Ah, I totally missed that Net
small update to my review comments:
On 01/24/18 16:48, Laszlo Ersek wrote:
> On 01/24/18 09:01, Dandan Bi wrote:
>> Our new performance infrastructure can support to dump performance
>> date form ACPI table in OS. So we can remove the old pref code to
>> write performance data to OS.
Again, pleas
On 01/24/18 09:01, Dandan Bi wrote:
> Our new performance infrastructure can support to dump performance
> date form ACPI table in OS. So we can remove the old pref code to
> write performance data to OS.
>
> Cc: Eric Dong
> Cc: Laszlo Ersek
> Cc: Liming Gao
> Contributed-under: TianoCore Contr
On 01/24/18 08:59, Dandan Bi wrote:
> Add more perf entry to hook BootScriptDonePpi/EndOfPeiPpi/
> EndOfS3Resume.
>
> Notes: This patch depends on the new performance
> infrastructure.
Since this statement is going into the commit log, please be more
specific about the "new performance infrastruc
On 01/24/18 03:08, Jian J Wang wrote:
> To fix an issue in which enabling NX feature will mark the AP wakeup
> buffer as non-executable and fail the AP init, the buffer was split
> into two part: the lower part in memory within 1MB and the higher part
> within allocated executable memory (EfiBootSe
On Mon, Jan 22, 2018 at 01:53:18PM +, Leif Lindholm wrote:
> Detailed commit description, please.
>
> Graeme - any comments on ACPIness?
>
I think Jeremy probably gave it a much more in depth review than I can
below.
Once he is happy Ill be happy.
Graeme
> On Thu, Jan 18, 2018 at 11:01:30P
On Wed, Jan 24, 2018 at 08:31:38PM +0800, Huangming (Mark) wrote:
> On 2018/1/23 22:07, Leif Lindholm wrote:
> > On Thu, Jan 18, 2018 at 11:01:35PM +0800, Ming Huang wrote:
> >> From: Jason Zhang
> >>
> >> 1. Open driver source code.
> >
> > Please describe what this driver does.
> >
> >> 2. Thi
On 2018/1/23 22:07, Leif Lindholm wrote:
> On Thu, Jan 18, 2018 at 11:01:35PM +0800, Ming Huang wrote:
>> From: Jason Zhang
>>
>> 1. Open driver source code.
>
> Please describe what this driver does.
>
>> 2. This code includes network sequence correction
>>solution.
>
> Which correction?
On Wed, Jan 24, 2018 at 11:57:11AM +, Ard Biesheuvel wrote:
> The ASM1061 SATA controller integrated into the DeveloperBox board
> emits too much electromagnetic radiation, so it needs spread spectrum
> mode enabled.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by:
The ASM1061 SATA controller integrated into the DeveloperBox board
emits too much electromagnetic radiation, so it needs spread spectrum
mode enabled.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel
---
v2: - rename AsmediaXXX.c to Pci.c
- rename Register
On 2018/1/23 22:40, Leif Lindholm wrote:
> On Sat, Jan 20, 2018 at 09:50:40AM +, Ard Biesheuvel wrote:
>> On 20 January 2018 at 03:56, Heyi Guo wrote:
>>> Workarounds for CVE-2017-5715 on Cortex A57/A72/A73 and A75 #1214.
>>>
>>> Heyi Guo (2):
>>> Hisilicon/D03: Update binary of trusted-fi
On Wed, Jan 24, 2018 at 11:13:17AM +, Ard Biesheuvel wrote:
> >> +if (PciVidPid[1] == ASM1061_PID) {
> >> + //
> >> + // The ASM1061 SATA controller as integrated into the DeveloperBox
> >> design
> >> + // emits too much electromagnetic radiation. So enable spread
> >> spe
On 24 January 2018 at 11:27, Alexei Fedorov wrote:
> Hi Ard,
>
>
> You wrote:
>
>
>> > + Status = gDS->SetMemorySpaceAttributes (
>> > + *VramBaseAddress,
>> > + *VramSize,
>> > + EFI_MEMORY_WC
>>
>> Please add EFI_MEMORY_XP here
>>
>
>
> Setting
Hi Ard,
You wrote:
> > + Status = gDS->SetMemorySpaceAttributes (
> > + *VramBaseAddress,
> > + *VramSize,
> > + EFI_MEMORY_WC
>
> Please add EFI_MEMORY_XP here
>
Setting EFI_MEMORY_XP causes assertion because gDS->SetMemorySpaceAttributes(
On 24 January 2018 at 11:10, Huangming (Mark) wrote:
>
>
> On 2018/1/20 18:50, Ard Biesheuvel wrote:
>> On 18 January 2018 at 15:01, Ming Huang wrote:
>>> From: Jason Zhang
>>>
>>> Contributed-under: TianoCore Contribution Agreement 1.1
>>> Signed-off-by: Jason Zhang
>>> Signed-off-by: Ming Hua
On 24 January 2018 at 11:10, Leif Lindholm wrote:
> On Wed, Jan 24, 2018 at 10:40:52AM +, Ard Biesheuvel wrote:
>> The ASM1061 SATA controller integrated into the DeveloperBox board
>> emits too much electromagnetic radiation, so it needs spread spectrum
>> mode enabled.
>
> I presume the spec
On 2018/1/20 18:50, Ard Biesheuvel wrote:
> On 18 January 2018 at 15:01, Ming Huang wrote:
>> From: Jason Zhang
>>
>> Contributed-under: TianoCore Contribution Agreement 1.1
>> Signed-off-by: Jason Zhang
>> Signed-off-by: Ming Huang
>> Signed-off-by: Heyi Guo
>> ---
>>
>> Platform/Hisilico
On Wed, Jan 24, 2018 at 10:40:52AM +, Ard Biesheuvel wrote:
> The ASM1061 SATA controller integrated into the DeveloperBox board
> emits too much electromagnetic radiation, so it needs spread spectrum
> mode enabled.
I presume the spectrum mode is on the PCIe side rather than the SATA
side? Ca
The ASM1061 SATA controller integrated into the DeveloperBox board
emits too much electromagnetic radiation, so it needs spread spectrum
mode enabled.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel
---
Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/{Asmedi
Hi, Andrew:
Thanks a lot and I really appreciate your suggestion. But the assembly
language code is for getting started,
and I may have to write C language embedded with assembly language and compile
through EDK. That is why
I have to use assembly language to achieve the restart function.
Our new performance infrastructure can support to dump performance
date form ACPI table in OS. So we can remove the old pref code to
write performance data to OS.
Cc: Liming Gao
Cc: Ruiyu Ni
Cc: Star Zeng
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Dandan Bi
---
Mde
Our new performance infrastructure can support to dump performance
date form ACPI table in OS. So we can remove the old pref code to
write performance data to OS.
Cc: Eric Dong
Cc: Laszlo Ersek
Cc: Liming Gao
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Dandan Bi
---
Our new performance infrastructure can support to dump performance
date form ACPI table in OS. So we can remove the old pref code to
write performance data to OS.
Cc: Liming Gao
Cc: Ruiyu Ni
Cc: Star Zeng
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Dandan Bi
---
Mde
Our new performance infrastructure can support to dump performance
date form ACPI table in OS. So we can remove the old pref code to
write performance data to OS.
Cc: Eric Dong
Cc: Laszlo Ersek
Cc: Liming Gao
Cc: Ruiyu Ni
Cc: Star Zeng
Dandan Bi (3):
UefiCpuPkg/S3Resume: Remove useless pref
Add more perf entry to hook BootScriptDonePpi/EndOfPeiPpi/
EndOfS3Resume.
Notes: This patch depends on the new performance
infrastructure.
Cc: Eric Dong
Cc: Laszlo Ersek
Cc: Liming Gao
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Dandan Bi
---
UefiCpuPkg/Universal/A
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