ets
or board enables.
To me, this reeks of an unwillingness to deal with supporting slightly
older hw, or to deal with chipsets/superios/boards at a time where we
backslid into depending on BIOS hooks again.
Luc Verhaegen.
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ew years later. They never had
anything reliable before the hardware was totally obsolete.
Also, what does one gain from two versions? Are there not effectively
two version of flashrom already? The google one, and the formal one? Is
this not just a veiled attempt to christen the google branch as
emoving the
> subproject would force us to remove flashrom support from almost all
> the CI systems we test fwupd with.
Is meson unable to call `make` in a subdirectory?
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On Wed, Oct 28, 2020 at 03:10:47PM +0100, Luc Verhaegen wrote:
> On Wed, Oct 28, 2020 at 01:41:30PM +, Richard Hughes wrote:
> > On Wed, 28 Oct 2020 at 12:20, Nico Huber wrote:
> > > So we didn't need these things before. Why do we need them now?
> >
> > Me
f the project.
Sounds like you are making an fwupd problem into a flashrom problem.
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and will come back with
further questions or make small fixes as needed. Feel free to poke me
with any questions or anything, both on irc (libv@freenode) and on
email (hardware-devroom-mana...@fosdem.org).
That's about it. Hope to see you all at FOSDEM :)
Luc Verhaegen
On Wed, Mar 28, 2018 at 06:49:09PM +0200, Luc Verhaegen wrote:
> On Wed, Mar 28, 2018 at 04:24:25PM +0200, Idwer Vollering wrote:
> > I took the liberty to submit this change to gerrit;
> > https://review.coreboot.org/#/c/flashrom/+/25396/
>
> Please fix the author.
T
On Wed, Mar 28, 2018 at 04:24:25PM +0200, Idwer Vollering wrote:
> I took the liberty to submit this change to gerrit;
> https://review.coreboot.org/#/c/flashrom/+/25396/
Please fix the author.
Luc Verhaegen.
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fl
On Tue, Mar 20, 2018 at 02:27:54PM +0100, Luc Verhaegen wrote:
>
> What this board needs is a call to intel_ich_gpio20_raise();
>
> Will provide a patch later today.
Attached.
> I am a bit worried though that the lpc io BAR is empty in your lspci. I
> am not sure wheth
On Tue, Mar 20, 2018 at 12:22:02PM +0100, Björn Tantau wrote:
>
>
> Am 19. März 2018 18:21:36 MEZ schrieb Luc Verhaegen <l...@skynet.be>:
> >On Mon, Mar 19, 2018 at 05:01:06PM +0100, Björn Tantau wrote:
> >> Am 19.03.2018 um 00:08 schrieb Luc Verhaegen:
> >&
On Mon, Mar 19, 2018 at 05:01:06PM +0100, Björn Tantau wrote:
> Am 19.03.2018 um 00:08 schrieb Luc Verhaegen:
> >
> >My current hypothesis: smsc at 0x480
> >
> >Action required: 0x48E |= 0x10.
> Do you want to scan for Super I/O sensors? (YES/no): Probing for Supe
On Sun, Feb 25, 2018 at 11:49:40AM +0100, Luc Verhaegen wrote:
> On Thu, Feb 22, 2018 at 08:40:58PM +0100, Björn Tantau wrote:
> >
> > Reverse engineering seems to be the only option left. Unfortunately
> > I'm not well versed in these arcane arts. ;-)
>
> Your
org/~libv/flash_enable_bios_reverse_engineering_(FOSDEM2010_-_slides).pdf
Your BIOS is an award and should be trivial.
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On Sat, Mar 18, 2017 at 05:52:28PM +, Sam Kuper wrote:
> On 18/03/2017, Luc Verhaegen <l...@skynet.be> wrote:
> > On Sat, Mar 18, 2017 at 05:52:15PM +0100, Stefan Tauner wrote:
> >> On Sat, 18 Mar 2017 16:45:14 +
> >> Sam Kuper <sam.ku...@uclmail.net>
ource
> semi-automatically) should note the BBB and directly link to its page.
> Will be like that... sometimes in the future.
Add a programmer category, and have the categories listed on the
supported hardware page.
Also, Sam, it's a wiki.
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; Elmar
>
> P.S.: if my hint should not have been particularely helpful I would like to
> know about that as well ...
I recently had a quick look at something related, and noticed that there
is a well-defined ATAPI call to flash the firmware. It can be found in
the pub
motherboard.
If (using flashrom as the backend) the linux kernel supports your flash
chip, you could just use dd.
What does the community think of this idea?
Where would you stick the:
* chipset enables
* board enables
Luc Verhaegen.
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On Thu, Jan 30, 2014 at 02:56:59PM +, David Woodhouse wrote:
On Thu, 2014-01-30 at 15:22 +0100, Luc Verhaegen wrote:
Where would you stick the:
* chipset enables
* board enables
In drivers/mtd/maps/ alongside the existing ones?
I can see this working out for chipset enables
On Sat, Apr 28, 2012 at 12:50:19PM +0200, Stefan Tauner wrote:
On Sat, 28 Apr 2012 02:25:02 +0200
Luc Verhaegen l...@skynet.be wrote:
Surely a specific board name can still be provided on the command line
for horribly broken bioses like this?
yes, thanks for the suggestion. apparently i
signed-off-by statements.
Good luck.
Luc Verhaegen.
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.
Luc Verhaegen.
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On Sat, Apr 28, 2012 at 02:06:48AM +0200, Stefan Tauner wrote:
On Sat, 28 Apr 2012 01:42:37 +0200
Luc Verhaegen l...@skynet.be wrote:
On Sat, Apr 28, 2012 at 01:30:53AM +0200, Stefan Tauner wrote:
The PCI IDs are generic VIA IDs. Only Biostar IDs are those of the LOM
, as such a license change
entails getting permission from all individual contributors.
So, here is the deal, a deal that i think most people on this ml would
wholeheartedly agree with: if _you_ want LGPL, _you_ get to sollicite
all individual contributors.
Luc Verhaegen
that
* matches are unique.
*
* If PCI IDs are not sufficient for board matching, the match can be further
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this hardware since 2005, 2 years
before i created board_enable.c.
This is the email from that time where i also confirm the fx43g as
working.
http://www.mail-archive.com/linuxb...@linuxbios.org/msg05809.html
Luc Verhaegen.
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better things to do?
Luc Verhaegen.
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Verhaegen l...@skynet.be
Great work all on getting to commit 1000, that's a lot of work for a
program that is about 15kloc, which consists mostly of people filling in
unknowns and blanks.
Luc Verhaegen.
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ids.
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,986lcd-m,Kontron, 986LCD-M,
board_kontron_986lcd_m},
+ {0x8086, 0x27A0, 0, 0, 0x8086, 0x27b8, 0, 0,
kontron,986lcd-m,Kontron, 986LCD-M,
board_kontron_986lcd_m},
Luc Verhaegen
On Thu, Feb 04, 2010 at 03:32:34AM +0100, Luc Verhaegen wrote:
On Mon, Feb 01, 2010 at 02:53:30AM +0100, Luc Verhaegen wrote:
On Sun, Jan 31, 2010 at 10:27:35PM +0100, Luc Verhaegen wrote:
On Sun, Jan 31, 2010 at 09:13:07PM +0100, repository service wrote:
Author: uwe
Date: Sun Jan
string 4: P6PROA5
DMI string 5: Rev. 1.0
We need to add a DMI string, and luckily, today, we can :)
Please add ^P6PROA5$ in the dmi field to make this match unique.
Trivial change, please test, then you have:
Acked-by: Luc Verhaegen l...@skynet.be
Luc Verhaegen
-d.hailfinger.devel.2...@gmx.net
Regards,
Carl-Daniel
It probably should be an || there.
Luc Verhaegen.
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On Thu, Feb 04, 2010 at 04:44:16AM +0100, Carl-Daniel Hailfinger wrote:
On 04.02.2010 04:07, Luc Verhaegen wrote:
On Thu, Feb 04, 2010 at 01:58:53AM +0100, Carl-Daniel Hailfinger wrote:
On 29.01.2010 01:40, Michael Karcher wrote:
--- a/board_enable.c
+++ b/board_enable.c
.
Please provide the output of flashrom -V so we can identify a DMI match.
The above logic should give you some idea of the investigation required
to get a good match. It just takes a few minutes to do so too.
Luc Verhaegen.
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.
* If not, verify will fail... And... We can see the wrapping too, and
tell the user about it.
We can then provide information on bailout on how to execute a blockwise
restore (with blockwise erase -- do we have this for all parallel
chips?) of the original image.
Luc Verhaegen
, 0, 0, 0x8086, 0x27b8, 0, 0, NULL,
kontron,986lcd-m,Kontron, 986LCD-M,
0, board_kontron_986lcd_m},
--
And my piix4 code might finally get tested too :)
Luc Verhaegen.
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, this i had never expected.
There should be no issue with this board; the board enable is the
chipset enable. There was no issue with previous instances of this
board.
I am stumped myself, i think carldani had some ideas.
Can you send me, personally, the image that you read from the chip?
Luc
-Daniel Hailfinger - Flashrom.
* 18:00 : Luc Verhaegen - Flash Enable BIOS Reverse Engineering.
Hope to see tons of people there.
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No magic knocking sequence to enter extended/configuration mode?
Apart from that:
Acked-by: Luc Verhaegen l...@skynet.be
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On Wed, Jan 13, 2010 at 12:33:18PM +0100, Luc Verhaegen wrote:
On Wed, Jan 13, 2010 at 12:14:02PM +0100, Uwe Hermann wrote:
Hi,
On Sun, Jan 10, 2010 at 01:19:28PM +0100, Luc Verhaegen wrote:
From 357cbdbc7b3be6a6b685e73f723e6b5cf147bc19 Mon Sep 17 00:00:00 2001
From: Luc Verhaegen l
On Wed, Jan 20, 2010 at 02:56:28PM +0100, Luc Verhaegen wrote:
On Sun, Jan 10, 2010 at 01:18:50PM +0100, Luc Verhaegen wrote:
From 2b85d32a0cbd226cf1b40937e57bc44d53b14bc9 Mon Sep 17 00:00:00 2001
From: Luc Verhaegen l...@skynet.be
Date: Sat, 26 Dec 2009 20:04:32 +0100
Subject: [PATCH
,
w83627hf_gpio24_raise_2e},
Nice work, but stuck on administrativia.
Please provide the output of:
lspci -vvnnxxx
superiotool -deV
dmidecode
Then this board will be added.
Luc Verhaegen.
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On Wed, Jan 20, 2010 at 04:14:42PM +0100, Luc Verhaegen wrote:
Very untested and new. Sent in to show off what is being worked on and
to get first impressions.
Last i tried it worked fine on:
* Winbond W83627EHF on MSI Fuzzy CN700 (nothing needed, just detection).
* Winbond W83697HF
On Wed, Jan 13, 2010 at 12:41:30PM +0100, Michael Karcher wrote:
Am Mittwoch, den 13.01.2010, 12:33 +0100 schrieb Luc Verhaegen:
flashrom: Board enable and autodetection for BioStar P4M80-M4.
I rechecked the current BIOS board enable. It doesn't poke that bit. It
only sets 0x24, bit 2
Verhaegen l...@skynet.be
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(tmp); })
--
1.6.5
Acked-by: Luc Verhaegen l...@skynet.be
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From 2b85d32a0cbd226cf1b40937e57bc44d53b14bc9 Mon Sep 17 00:00:00 2001
From: Luc Verhaegen l...@skynet.be
Date: Sat, 26 Dec 2009 20:04:32 +0100
Subject: [PATCH] Boards: Add max_rom_decode_parallel entry to board enable table.
This is a quick fix for board specific parallel addressing limits
On Sun, Jan 10, 2010 at 03:07:27PM +0100, Carl-Daniel Hailfinger wrote:
On 10.01.2010 13:18, Luc Verhaegen wrote:
Chipset: Fix sis5x0 register write verification.
Also remove separate sis 5596 routine: superio code will be handled
separately, which then turns this routine into the sis
Karcher
Where is the superio and lspci output for this one?
Could it be that it's only on pastebin? If so, we might want to see it
fly past on the ml.
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); /* Raise output? */
+ OUTW(temp, base + 0x64);
+
+ w836xx_memw_enable(0x2E);
+
+ return 0;
+}
+
One or two more of these routines, and we might make a first stab at a
general sis gpio routine.
Luc Verhaegen.
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); /* Raise output? */
Acked-by: Luc Verhaegen l...@skynet.be
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On Thu, Jan 07, 2010 at 05:25:32PM +0100, Carl-Daniel Hailfinger wrote:
On 07.01.2010 16:46, Luc Verhaegen wrote:
I do not expect DMI many match policy changes.
* We've been relatively happy with pci subsystem ids for close to three
years.
Yes, but that isn't a match-any policy
On Thu, Jan 07, 2010 at 11:29:32AM +0100, Michael Karcher wrote:
Am Donnerstag, den 07.01.2010, 10:30 +0100 schrieb Luc Verhaegen:
I am just warning that dmi might not be as tight and enduring as many
people think it is, and that therefor it should be used with some care
On Thu, Jan 07, 2010 at 03:50:19PM +0100, Carl-Daniel Hailfinger wrote:
On 07.01.2010 15:43, Luc Verhaegen wrote:
The prefix is A Bad Thing. As shown before, a typo is easily made, and
we cannot check for it.
Have you seen the selfcheck() function which is called on startup? I
have
On Mon, Jan 04, 2010 at 06:10:51PM +0100, Michael Karcher wrote:
Am Montag, den 04.01.2010, 15:35 +0100 schrieb Luc Verhaegen:
Some extra info on dmi that not everyone is acutely aware of:
This is where the dmi standard came from:
http://www.dmtf.org/standards/dmi/
What you can
and an extra entry.
For now, i would like to see just the string matching, and the relevant
dmidecodes being collected so that possible future string selection can
be implemented with some googling.
Luc Verhaegen.
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:) Its impact for users will be higher than expanding
the ircbot, and the quality of information we get will improve.
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, pciid), to tighten up the board enable table. I never
seem to get round to doing these things any more. I should make time, as
it is rather important.
Luc Verhaegen.
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On Thu, Jan 07, 2010 at 11:16:14AM +0100, Michael Karcher wrote:
Am Donnerstag, den 07.01.2010, 10:25 +0100 schrieb Luc Verhaegen:
I'm not so happy about the static allocation here. Can't we use malloc()
for the read buffer and strdup() for filling in dmistrings?
Of course we can
On Thu, Jan 07, 2010 at 03:29:27PM +0100, Carl-Daniel Hailfinger wrote:
On 07.01.2010 11:13, Luc Verhaegen wrote:
On Fri, Jan 01, 2010 at 01:27:44AM +0100, Michael Karcher wrote:
I believe the substring match is suboptimal.
You got a point there.
I wouldn't use any
that i have seen at play more often
in these cases.
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On Thu, Jan 07, 2010 at 03:47:59PM +0100, Carl-Daniel Hailfinger wrote:
On 07.01.2010 12:22, Luc Verhaegen wrote:
Ok, then each of those 6 strings are only stored once, and are always
stored (if dmidecode is present), the never need to get used for other
purposes, they never need to get
On Thu, Jan 07, 2010 at 04:01:10PM +0100, Carl-Daniel Hailfinger wrote:
On 07.01.2010 15:47, Luc Verhaegen wrote:
On Thu, Jan 07, 2010 at 03:37:04PM +0100, Carl-Daniel Hailfinger wrote:
On 07.01.2010 11:16, Michael Karcher wrote:
That's what I expected, and that's why I
seems like safe bet.
Will try to provide a more complete answer to this email later.
Luc Verhaegen.
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On Mon, Dec 21, 2009 at 03:04:01PM +0100, Luc Verhaegen wrote:
On Wed, Dec 16, 2009 at 12:14:02PM +0100, Luc Verhaegen wrote:
We've had some changes pushed which breaks the previous patch. So here
is an update.
Luc Verhaegen.
No ACKs?
This code has been tested on several of my
thao_ho...@yahoo.com
when this works ok.
Luc Verhaegen.
From 7c33a83c47d8f097d210a49787816f9fbba008ac Mon Sep 17 00:00:00 2001
From: Luc Verhaegen l...@skynet.be
Date: Wed, 23 Dec 2009 03:46:21 +0100
Subject: [PATCH] Boards: Add iBase MB899.
Signed-off-by: Luc Verhaegen l...@skynet.be
On Sat, Dec 19, 2009 at 02:09:13AM +0100, Michael Karcher wrote:
Add board enable for Asus M2NBP-VM CSM
Signed-Off-By: Michael Karcher flash...@mkarcher.dialup.fu-berlin.de
Corey, this one is aimed for your board.
Luc Verhaegen.
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in the attachment.
Do you know how to solve
this problem ? Thanks for your help.
Eugene
We need at least:
- exact board make and model.
- lspci -vvnnxxx
before we can even try to investigate this.
Luc Verhaegen.
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On Mon, Dec 21, 2009 at 04:14:37PM +0100, Adam Jurkowski wrote:
No response since 2 weeks...
Does it mean nobody except us needs support for Intel Poulsbo (SCH) chipset?
Adam
Pushed.
Sorry for the delay.
Luc Verhaegen.
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From 66aeca8331e68d922277694c6905756df2a68cab Mon Sep 17 00:00:00 2001
From: Luc Verhaegen l...@skynet.be
Date: Mon, 21 Dec 2009 16:43:19 +0100
Subject: [PATCH] Boards: Fix several issues with nvidia_mcp_gpio_set.
- CK804, MCP04, MCP2 use the isa bridges..
- Newer nvidia mcp's do
On Wed, Dec 16, 2009 at 07:22:32AM -0800, Thao Hoang wrote:
http://www.ibase.com.tw/2009/MB899.html#features
No BIOS image available.
Please send me, personally, the output of:
dd if=/dev/mem of=/tmp/ibase_mb899.system.rom bs=64k count=1 skip=15
Luc Verhaegen
.
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On Tue, Dec 15, 2009 at 04:07:41PM +0100, Luc Verhaegen wrote:
On Fri, Nov 13, 2009 at 04:45:50PM +0100, Adrian Glaubitz wrote:
Hi,
I was just trying to flash the BIOS (version 1023) into an old ASUS
P4C-800E Deluxe on ArchLinux (current updates as of 13-11-2009) and
the latest version
On Sun, Dec 06, 2009 at 10:45:21PM +0100, Luc Verhaegen wrote:
Massive cleanup and more boards working out of the box.
Luc Verhaegen.
Deprecated. New patch sent.
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a short look
at it.
Luc Verhaegen did take a look, and rightfully suggested to reuse the
existing nvidia_mcp_gpio_set function. So a second iteration (hopefully
functional equivalent):
Board Enable for MS-7207 (K8N GM2-L)
I used two PCI IDs as it is convention. MSI uses the 4-digit
What do YOU think?
Regards,
Carl-Daniel
What about 4 space indents?
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information below
Although i think that this will be more a flashchip issue than
anything else, please give this patch a whirl.
Luc Verhaegen.
From 1279b579a377a638c7f9045519a1b9e0e8497828 Mon Sep 17 00:00:00 2001
From: Luc Verhaegen l...@skynet.be
Date: Tue, 15 Dec 2009 15:28:18 +0100
tried to write the bios.
My board is an MSI K8N Neo4 Platinum.
Output from my dump attempt and subsequent messing around follows.
Do I have your blessing to reboot my machine?
--Fraser
Give the attached patch a whirl.
Luc Verhaegen.
From 17d73eab11df1808bce46478bd3536509aa389b3 Mon Sep
skip=15
Luc Verhaegen.
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for the failed flash attempt.
Adrian
00:11.0 ISA bridge [0601]: VIA Technologies, Inc. VT8237 ISA bridge
[KT600/K8T800/K8T890 South] [1106:3227]
This one will magically start working once i get my VT823x all writes
to LPC patch in.
Will send an updated version of that to the list.
Luc
.
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AMI Bios.
Please provide me (personally) with the output of
dd if=/dev/mem of=/tmp/msi_k9a2.system.rom bs=64k count=1 skip=15
Please do not send this to the list.
Luc Verhaegen.
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On Tue, Dec 08, 2009 at 08:13:49AM -0800, Sean Nelson wrote:
Acked-by: Sean Nelson audiohac...@gmail.com
Thanks, - r795.
Now i can start working on making the board matching a lot tighter.
Luc Verhaegen.
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Please use the recent svn, and apply
http://patchwork.coreboot.org/patch/635/
first.
When this works, please send:
Acked-by: [realname here] spir...@eircom.net
Luc Verhaegen.
From 69cad603ad1aa71b32745b3610feb1d0454b3dc3 Mon Sep 17 00:00:00 2001
From: Luc Verhaegen l...@skynet.be
Date: Tue
the patch here to provide us with more general superio
infrastructure :)
We need this.
Luc Verhaegen.
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On Tue, Dec 08, 2009 at 03:45:19PM -0800, David Bartley wrote:
On Mon, Dec 7, 2009 at 7:02 AM, Luc Verhaegen l...@skynet.be wrote:
On Mon, Nov 30, 2009 at 01:19:23AM -0800, David Bartley wrote:
The way I figured this out was by picking the chip closest to the BIOS
(the VT8237A southbridge
On Wed, Dec 09, 2009 at 08:43:00AM +0100, Luc Verhaegen wrote:
Ok, applying your patch with the above id list.
Luc Verhaegen.
- r795.
Luc Verhaegen.
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, the trace is not
entirely clear, the following circumstances:
int15, ax=0xEBAC, bx=0xB000 (enable) bx=0xB001 (disable)
I will provide a possible board enable function soon.
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will become a lot more strict.
If there is any subsystem id present, all subsystem ids will be used.
If one of the four subsystem ids is not null, all nulls have to be
matched by the hardware too. So the second set of subsystem ids here
better be nulls for real :)
Luc Verhaegen
M2V-MX SE kills itself when a pci(e) card is inserted when the
original image is flashed to a non-original chip. So this might be the
reason.
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On Thu, Dec 03, 2009 at 01:18:54PM +0100, Carl-Daniel Hailfinger wrote:
On 03.12.2009 13:18, Luc Verhaegen wrote:
Boards: Add general nVidia MCP gpio routine.
Turns out that the AMD 8111 datasheet describes this bit of the MCP
perfectly.
Signed-off-by: Luc Verhaegen l...@skynet.be
On Thu, Dec 03, 2009 at 08:50:12AM +0100, Alessandro Polverini wrote:
Luc Verhaegen wrote:
On Wed, Oct 21, 2009 at 02:35:50PM +0200, Alessandro Polverini wrote:
Hello,
this is the output of flashrom:
flashrom v0.9.1-r706
No coreboot table found.
Found chipset NVIDIA MCP67, enabling
... OK.
No EEPROM/flash device found.
While the output of lspci is attached.
HTH,
Alessandro
Hi Alessandro,
Attached is a patch that might work for you.
Luc Verhaegen.
From 53007dfa950fd75d705280b7e07452f0d2caa200 Mon Sep 17 00:00:00 2001
From: Luc Verhaegen l...@quoth.site
Date: Thu, 3
filled up in the next month.
The page where fosdem info will be kept for coreboot is:
http://www.coreboot.org/FOSDEM_2010
Hope to see many of you there!
Luc Verhaegen.
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Hi Jonathan,
I've swapped both id blocks around, so it could actually work this time
:)
Luc Verhaegen.
From 518433bd67576fadce4f8f25399a61238dde5c7a Mon Sep 17 00:00:00 2001
From: Luc Verhaegen l...@quoth.site
Date: Sat, 28 Nov 2009 20:06:01 +0100
Subject: [PATCH] Board: Make Acorp 6A815EPD
On Thu, Oct 22, 2009 at 11:44:24PM +0200, Uwe Hermann wrote:
On Thu, Oct 22, 2009 at 03:16:16PM +0200, Luc Verhaegen wrote:
Ok, big change here which will require several of the people on the
list
below to test and Ack this patch. But one has to admit; the result is
worth
On Fri, Oct 23, 2009 at 01:46:52AM +0200, Carl-Daniel Hailfinger wrote:
On 22.10.2009 23:44, Uwe Hermann wrote:
On Thu, Oct 22, 2009 at 03:16:16PM +0200, Luc Verhaegen wrote:
I agree we should drop the totally useless 0x48 register index, 0x0c
offset, and 0xffc0 bitmask from the function
, 2009-09-23 at 10:26 -0300, Luc Verhaegen wrote:
On Wed, Sep 23, 2009 at 10:14:47AM -0300, Ulf Mehlig wrote:
Thanks for the patch, and many thanks again for helping me out
yesterday!
All the best, Ulf
Does it work? If so, reply with: Acked-by: Ulf Mehlig u...@ufpa.br
so
On Tue, Oct 06, 2009 at 01:30:56PM +0200, Luc Verhaegen wrote:
Give this one a whirl.
Luc Verhaegen.
Add chipset support for SiS963.
Just touches two bits, but no docs as per SiS usual.
Signed-off-by: Luc Verhaegen l...@skynet.be
Index: chipset_enable.c
set. If I find it, i'll try to send you the dumps
you need.
On Sat, Oct 17, 2009 at 2:58 PM, Luc Verhaegen l...@skynet.be wrote:
Hi Sean,
I have some questions about your kt4v/kt4ultra board enable:
1) I am about to move some code from many vt823x based board
enables to the chipset
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