[gem5-dev] Change in gem5/gem5[develop]: cpu: Fix style and add overrides to bas_dyn_inst.hh.
Gabe Black has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/34216 )
Change subject: cpu: Fix style and add overrides to bas_dyn_inst.hh.
..
cpu: Fix style and add overrides to bas_dyn_inst.hh.
Either return types, brackets and the function body should all be on
their own line, or the entire function should be on a single line.
Consistently place the * or & up against the variable name and not the
type name. There isn't an official rule for which to use, but the
majority of existing uses were this way.
Add overrides for overridden virtual methods.
These fixes get rid of compiler warnings which are breaking the build
for me.
Change-Id: Ifc6ace4794a66ffd031ee686f6b6ef888004d786
---
M src/cpu/base_dyn_inst.hh
1 file changed, 133 insertions(+), 75 deletions(-)
diff --git a/src/cpu/base_dyn_inst.hh b/src/cpu/base_dyn_inst.hh
index b0e9ef2..56b9114 100644
--- a/src/cpu/base_dyn_inst.hh
+++ b/src/cpu/base_dyn_inst.hh
@@ -291,30 +291,34 @@
//
-void demapPage(Addr vaddr, uint64_t asn)
+void
+demapPage(Addr vaddr, uint64_t asn) override
{
cpu->demapPage(vaddr, asn);
}
-void demapInstPage(Addr vaddr, uint64_t asn)
+void
+demapInstPage(Addr vaddr, uint64_t asn)
{
cpu->demapPage(vaddr, asn);
}
-void demapDataPage(Addr vaddr, uint64_t asn)
+void
+demapDataPage(Addr vaddr, uint64_t asn)
{
cpu->demapPage(vaddr, asn);
}
Fault initiateMemRead(Addr addr, unsigned size, Request::Flags flags,
-const std::vector& byte_enable = std::vector());
+const std::vector _enable=std::vector())
override;
Fault initiateHtmCmd(Request::Flags flags) override;
Fault writeMem(uint8_t *data, unsigned size, Addr addr,
Request::Flags flags, uint64_t *res,
- const std::vector& byte_enable =
std::vector());
+ const std::vector
_enable=std::vector())
+ override;
Fault initiateMemAMO(Addr addr, unsigned size, Request::Flags flags,
- AtomicOpFunctorPtr amo_op);
+ AtomicOpFunctorPtr amo_op) override;
/** True if the DTB address translation has started. */
bool translationStarted() const { return
instFlags[TranslationStarted]; }
@@ -329,8 +333,16 @@
* snoop invalidate modifies the line, in which case we need to squash.
* If nothing modified the line the order doesn't matter.
*/
-bool possibleLoadViolation() const { return
instFlags[PossibleLoadViolation]; }
-void possibleLoadViolation(bool f) { instFlags[PossibleLoadViolation]
= f; }
+bool
+possibleLoadViolation() const
+{
+return instFlags[PossibleLoadViolation];
+}
+void
+possibleLoadViolation(bool f)
+{
+instFlags[PossibleLoadViolation] = f;
+}
/** True if the address hit a external snoop while sitting in the LSQ.
* If this is true and a older instruction sees it, this instruction
must
@@ -343,7 +355,8 @@
* Returns true if the DTB address translation is being delayed due to
a hw
* page table walk.
*/
-bool isTranslationDelayed() const
+bool
+isTranslationDelayed() const
{
return (translationStarted() && !translationCompleted());
}
@@ -356,13 +369,15 @@
/** Returns the physical register index of the i'th destination
* register.
*/
-PhysRegIdPtr renamedDestRegIdx(int idx) const
+PhysRegIdPtr
+renamedDestRegIdx(int idx) const
{
return _destRegIdx[idx];
}
/** Returns the physical register index of the i'th source register. */
-PhysRegIdPtr renamedSrcRegIdx(int idx) const
+PhysRegIdPtr
+renamedSrcRegIdx(int idx) const
{
assert(TheISA::MaxInstSrcRegs > idx);
return _srcRegIdx[idx];
@@ -371,7 +386,8 @@
/** Returns the flattened register index of the i'th destination
* register.
*/
-const RegId& flattenedDestRegIdx(int idx) const
+const RegId &
+flattenedDestRegIdx(int idx) const
{
return _flatDestRegIdx[idx];
}
@@ -379,7 +395,8 @@
/** Returns the physical register index of the previous physical
register
* that remapped to the same logical register index.
*/
-PhysRegIdPtr prevDestRegIdx(int idx) const
+PhysRegIdPtr
+prevDestRegIdx(int idx) const
{
return _prevDestRegIdx[idx];
}
@@ -387,9 +404,9 @@
/** Renames a destination register to a physical register. Also
records
* the previous physical register that the logical register mapped to.
*/
-void renameDestReg(int idx,
- PhysRegIdPtr renamed_dest,
- PhysRegIdPtr previous_rename)
+void
+
[gem5-dev] Change in gem5/gem5[develop]: arch: Add a virtual destructor to BaseHTMCheckpoint.
Gabe Black has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/34215 )
Change subject: arch: Add a virtual destructor to BaseHTMCheckpoint.
..
arch: Add a virtual destructor to BaseHTMCheckpoint.
Since it has virtual methods, it should also have a virtual destructor.
My compiler complains otherwise, which breaks my build.
Change-Id: I44bba97b76931bab6e3511fcdee79831080c12d4
---
M src/arch/generic/htm.hh
1 file changed, 1 insertion(+), 0 deletions(-)
diff --git a/src/arch/generic/htm.hh b/src/arch/generic/htm.hh
index 74e2d44..5f45f5d 100644
--- a/src/arch/generic/htm.hh
+++ b/src/arch/generic/htm.hh
@@ -137,6 +137,7 @@
{
reset();
}
+virtual ~BaseHTMCheckpoint() {}
/**
* Every ISA implementing HTM support should override the
--
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Gerrit-Change-Id: I44bba97b76931bab6e3511fcdee79831080c12d4
Gerrit-Change-Number: 34215
Gerrit-PatchSet: 1
Gerrit-Owner: Gabe Black
Gerrit-MessageType: newchange
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[gem5-dev] Change in gem5/gem5[develop]: mem: Remove the unused nvm private member from NVMInterface::Rank.
Gabe Black has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/34217 )
Change subject: mem: Remove the unused nvm private member from
NVMInterface::Rank.
..
mem: Remove the unused nvm private member from NVMInterface::Rank.
This unused (and otherwise unusable) member caused a compiler warning
and broke the build for me. It can be reintroduced if used in the
future.
Change-Id: I48181f6bca60c059e74727290950adfb9a194680
---
M src/mem/mem_interface.cc
M src/mem/mem_interface.hh
2 files changed, 1 insertion(+), 9 deletions(-)
diff --git a/src/mem/mem_interface.cc b/src/mem/mem_interface.cc
index 7817c4a..307cf92 100644
--- a/src/mem/mem_interface.cc
+++ b/src/mem/mem_interface.cc
@@ -2043,8 +2043,7 @@
NVMInterface::Rank::Rank(const NVMInterfaceParams* _p,
int _rank, NVMInterface& _nvm)
-: EventManager(&_nvm), nvm(_nvm), rank(_rank),
- banks(_p->banks_per_rank)
+: EventManager(&_nvm), rank(_rank), banks(_p->banks_per_rank)
{
for (int b = 0; b < _p->banks_per_rank; b++) {
banks[b].bank = b;
diff --git a/src/mem/mem_interface.hh b/src/mem/mem_interface.hh
index 9844002..b67cdb0 100644
--- a/src/mem/mem_interface.hh
+++ b/src/mem/mem_interface.hh
@@ -1026,13 +1026,6 @@
*/
class Rank : public EventManager
{
- private:
-
-/**
- * A reference to the parent NVMInterface instance
- */
-NVMInterface& nvm;
-
public:
/**
--
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Gerrit-Branch: develop
Gerrit-Change-Id: I48181f6bca60c059e74727290950adfb9a194680
Gerrit-Change-Number: 34217
Gerrit-PatchSet: 1
Gerrit-Owner: Gabe Black
Gerrit-MessageType: newchange
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[gem5-dev] Change in gem5/gem5[develop]: cpu-minor: convert fetch2 to new style stats
Jason Lowe-Power has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/33975 )
Change subject: cpu-minor: convert fetch2 to new style stats
..
cpu-minor: convert fetch2 to new style stats
Change-Id: Idfe0f1f256c93209fe51140b9cab3b454153c597
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33975
Reviewed-by: Jason Lowe-Power
Maintainer: Jason Lowe-Power
Tested-by: kokoro
---
M src/cpu/minor/fetch2.cc
M src/cpu/minor/fetch2.hh
M src/cpu/minor/pipeline.cc
M src/cpu/minor/pipeline.hh
4 files changed, 44 insertions(+), 59 deletions(-)
Approvals:
Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/cpu/minor/fetch2.cc b/src/cpu/minor/fetch2.cc
index d090edd..c43b2f8 100644
--- a/src/cpu/minor/fetch2.cc
+++ b/src/cpu/minor/fetch2.cc
@@ -69,7 +69,7 @@
processMoreThanOneInput(params.fetch2CycleInput),
branchPredictor(*params.branchPred),
fetchInfo(params.numThreads),
-threadPriority(0)
+threadPriority(0), stats(_)
{
if (outputWidth < 1)
fatal("%s: decodeInputWidth must be >= 1 (%d)\n", name,
outputWidth);
@@ -413,17 +413,17 @@
// Collect some basic inst class stats
if (decoded_inst->isLoad())
-loadInstructions++;
+stats.loadInstructions++;
else if (decoded_inst->isStore())
-storeInstructions++;
+stats.storeInstructions++;
else if (decoded_inst->isAtomic())
-amoInstructions++;
+stats.amoInstructions++;
else if (decoded_inst->isVector())
-vecInstructions++;
+stats.vecInstructions++;
else if (decoded_inst->isFloating())
-fpInstructions++;
+stats.fpInstructions++;
else if (decoded_inst->isInteger())
-intInstructions++;
+stats.intInstructions++;
DPRINTF(Fetch, "Instruction extracted from line %s"
" lineWidth: %d output_index: %d inputIndex: %d"
@@ -602,40 +602,33 @@
(*predictionOut.inputWire).isBubble();
}
-void
-Fetch2::regStats()
+Fetch2::Fetch2Stats::Fetch2Stats(MinorCPU *cpu)
+ : Stats::Group(cpu, "fetch2"),
+ ADD_STAT(intInstructions,
+ "Number of integer instructions successfully decoded"),
+ ADD_STAT(fpInstructions,
+ "Number of floating point instructions successfully decoded"),
+ ADD_STAT(vecInstructions,
+ "Number of SIMD instructions successfully decoded"),
+ ADD_STAT(loadInstructions,
+ "Number of memory load instructions successfully decoded"),
+ ADD_STAT(storeInstructions,
+ "Number of memory store instructions successfully decoded"),
+ ADD_STAT(amoInstructions,
+ "Number of memory atomic instructions successfully decoded")
{
-using namespace Stats;
-
-intInstructions
-.name(name() + ".int_instructions")
-.desc("Number of integer instructions successfully decoded")
-.flags(total);
-
-fpInstructions
-.name(name() + ".fp_instructions")
-.desc("Number of floating point instructions successfully decoded")
-.flags(total);
-
-vecInstructions
-.name(name() + ".vec_instructions")
-.desc("Number of SIMD instructions successfully decoded")
-.flags(total);
-
-loadInstructions
-.name(name() + ".load_instructions")
-.desc("Number of memory load instructions successfully decoded")
-.flags(total);
-
-storeInstructions
-.name(name() + ".store_instructions")
-.desc("Number of memory store instructions successfully decoded")
-.flags(total);
-
-amoInstructions
-.name(name() + ".amo_instructions")
-.desc("Number of memory atomic instructions successfully decoded")
-.flags(total);
+intInstructions
+.flags(Stats::total);
+fpInstructions
+.flags(Stats::total);
+vecInstructions
+.flags(Stats::total);
+loadInstructions
+.flags(Stats::total);
+storeInstructions
+.flags(Stats::total);
+amoInstructions
+.flags(Stats::total);
}
void
diff --git a/src/cpu/minor/fetch2.hh b/src/cpu/minor/fetch2.hh
index d9726a9..3196e4e 100644
--- a/src/cpu/minor/fetch2.hh
+++ b/src/cpu/minor/fetch2.hh
@@ -163,13 +163,17 @@
std::vector fetchInfo;
ThreadID threadPriority;
-/** Stats */
-Stats::Scalar intInstructions;
-Stats::Scalar fpInstructions;
-Stats::Scalar vecInstructions;
-Stats::Scalar loadInstructions;
-Stats::Scalar storeInstructions;
[gem5-dev] Change in gem5/gem5[develop]: base,misc: Add group definitions for newly tagged API in src/base
Hoa Nguyen has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/33034 ) Change subject: base,misc: Add group definitions for newly tagged API in src/base .. base,misc: Add group definitions for newly tagged API in src/base Signed-off-by: Hoa Nguyen Change-Id: If2f5ce3bc4f5d0a8cc31def17702223a27e6970e Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33034 Reviewed-by: Jason Lowe-Power Maintainer: Jason Lowe-Power Tested-by: kokoro --- M src/doxygen/group_definitions.hh 1 file changed, 122 insertions(+), 0 deletions(-) Approvals: Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved kokoro: Regressions pass diff --git a/src/doxygen/group_definitions.hh b/src/doxygen/group_definitions.hh index 40069e0..c79e66c 100644 --- a/src/doxygen/group_definitions.hh +++ b/src/doxygen/group_definitions.hh @@ -27,3 +27,125 @@ * * These methods relate to the SimObject interface. */ + +/** + * @defgroup api_addr_range The AddrRange API. + * + * These methods relate to the AddrRange and AddrRangeMap interfaces. + */ + +/** + * @defgroup api_atomic_op The AtomicOpFunctor API. + * + * These methods relate to the AtomicOpFunctor and the related interfaces. + */ + +/** + * @defgroup api_bitfield The bit manipulating API. + * + * These are a collection of methods for bit manipulations. + */ + +/** + * @defgroup api_bitunion The BitUnion API. + * + * These are a collection of methods and macros of the BitUnion system of + * defining bitfields on top of an underlying class. + */ + +/** + * @defgroup api_base_utils The utility functions and constants API. + * + * These are a collection of utility functions and constants defined in + * src/base. + */ + +/** + * @defgroup api_callback The CallbackQueue API. + * + * These methods relate to the CallbackQueue interface. + */ + +/** + * @defgroup api_channel_addr The ChannelAddr and ChannelAddrRange API. + * + * These methods relate to the interface of ChannelAddr and ChannelAddrRange. + */ + +/** + * @defgroup api_chunk_generator The ChunkGenerator API. + * + * These methods relate to the ChunkGenerator interface. + */ + +/** + * @defgroup api_coroutine The Coroutine API. + * + * These methods relate to the Coroutine interface. + */ + +/** + * @defgroup api_fiber The Fiber API. + * + * These methods relate to the Fiber interface. + */ + +/** + * @defgroup api_flags The Flags API. + * + * These methods relate to the Flags interface. + */ + +/** + * @defgroup api_inet The inet API. + * + * These methods relate to EthAddr, IpAddress, TCP, UDP interfaces. + */ + +/** + * @defgroup api_logger The Logger API. + * + * These methods and macros provide access to gem5's logging system. + */ + +/** + * @defgroup api_poll_event The PollEvent API. + * + * These methods relate to the PollEvent interface. + */ + +/** + * @defgroup api_poll_queue The PollQueue API. + * + * These methods relate to the PollQueue interface. + */ + +/** + * @defgroup api_remote_gdb The RemoteGDB API. + * + * These methods relate to the BaseRemoteGDB and BaseGdbRegCache interfaces. + */ + +/** + * @defgroup api_sat_counter The SatCounter API. + * + * These methods relate to the SatCounter interface. + */ + +/** + * @defgroup api_socket The Socket API. + * + * These methods relate to the Socket interface. + */ + +/** + * @defgroup api_stl_helpers The C++ STL helpers API. + * + * These are methods providing additional functionality to C++ STL. + */ + +/** + * @defgroup api_trace The Trace API. + * + * These methods relate to the selective debugging trace facility. + */ -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/33034 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: develop Gerrit-Change-Id: If2f5ce3bc4f5d0a8cc31def17702223a27e6970e Gerrit-Change-Number: 33034 Gerrit-PatchSet: 18 Gerrit-Owner: Hoa Nguyen Gerrit-Reviewer: Bobby R. Bruce Gerrit-Reviewer: Hoa Nguyen Gerrit-Reviewer: Jason Lowe-Power Gerrit-Reviewer: kokoro Gerrit-MessageType: merged ___ gem5-dev mailing list -- gem5-dev@gem5.org To unsubscribe send an email to gem5-dev-le...@gem5.org %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s
[gem5-dev] Change in gem5/gem5[develop]: mem-ruby: Check number of vnets when creating links
Srikant Bharadwaj has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/32603 )
Change subject: mem-ruby: Check number of vnets when creating links
..
mem-ruby: Check number of vnets when creating links
Added error checking to ensure that the system has sufficient virtual
networks when setting latency and weight values.
Change-Id: I1b28144bbe9fefab0c0a6227f1fdf4ea10403061
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/32603
Tested-by: kokoro
Reviewed-by: Jason Lowe-Power
Maintainer: Jason Lowe-Power
---
M src/mem/ruby/network/Topology.cc
1 file changed, 2 insertions(+), 0 deletions(-)
Approvals:
Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/mem/ruby/network/Topology.cc
b/src/mem/ruby/network/Topology.cc
index 13219a5..c9a5811 100644
--- a/src/mem/ruby/network/Topology.cc
+++ b/src/mem/ruby/network/Topology.cc
@@ -163,6 +163,8 @@
} else {
for (int v = 0; v < link->mVnets.size(); v++) {
int vnet = link->mVnets[v];
+fatal_if(vnet >= m_vnets, "Not enough virtual
networks "
+ "(setting latency and weight for vnet %d)",
vnet);
// Two links connecting same src and destination
// cannot carry same vnets.
fatal_if(vnet_done[vnet], "Two links connecting same
src"
--
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Gerrit-Branch: develop
Gerrit-Change-Id: I1b28144bbe9fefab0c0a6227f1fdf4ea10403061
Gerrit-Change-Number: 32603
Gerrit-PatchSet: 10
Gerrit-Owner: Srikant Bharadwaj
Gerrit-Reviewer: Jason Lowe-Power
Gerrit-Reviewer: Srikant Bharadwaj
Gerrit-Reviewer: kokoro
Gerrit-CC: Bobby R. Bruce
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: dev,arm: Use the ArmSystem::PageBytes constant in the generic timer.
Gabe Black has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/34171 )
Change subject: dev,arm: Use the ArmSystem::PageBytes constant in the
generic timer.
..
dev,arm: Use the ArmSystem::PageBytes constant in the generic timer.
This component very specific to ARM, and so there's no reason to use
generic interfaces to get the page size.
Change-Id: Id757b5742c807c5f616a6dc8df94a7709932d071
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/34171
Reviewed-by: Andreas Sandberg
Maintainer: Andreas Sandberg
Tested-by: kokoro
---
M src/dev/arm/generic_timer.cc
1 file changed, 6 insertions(+), 6 deletions(-)
Approvals:
Andreas Sandberg: Looks good to me, approved; Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/dev/arm/generic_timer.cc b/src/dev/arm/generic_timer.cc
index 254175a..1b96257 100644
--- a/src/dev/arm/generic_timer.cc
+++ b/src/dev/arm/generic_timer.cc
@@ -873,7 +873,7 @@
GenericTimerFrame::GenericTimerFrame(GenericTimerFrameParams *const p)
: PioDevice(p),
- timerRange(RangeSize(p->cnt_base, sys->getPageBytes())),
+ timerRange(RangeSize(p->cnt_base, ArmSystem::PageBytes)),
addrRanges({timerRange}),
systemCounter(*p->counter),
physTimer(csprintf("%s.phys_timer", name()),
@@ -887,7 +887,7 @@
SystemCounter::validateCounterRef(p->counter);
// Expose optional CNTEL0Base register frame
if (p->cnt_el0_base != MaxAddr) {
-timerEl0Range = RangeSize(p->cnt_el0_base, sys->getPageBytes());
+timerEl0Range = RangeSize(p->cnt_el0_base, ArmSystem::PageBytes);
accessBitsEl0 = 0x303;
addrRanges.push_back(timerEl0Range);
}
@@ -1244,9 +1244,9 @@
GenericTimerMem::GenericTimerMem(GenericTimerMemParams *const p)
: PioDevice(p),
- counterCtrlRange(RangeSize(p->cnt_control_base,
sys->getPageBytes())),
- counterStatusRange(RangeSize(p->cnt_read_base, sys->getPageBytes())),
- timerCtrlRange(RangeSize(p->cnt_ctl_base, sys->getPageBytes())),
+ counterCtrlRange(RangeSize(p->cnt_control_base,
ArmSystem::PageBytes)),
+ counterStatusRange(RangeSize(p->cnt_read_base,
ArmSystem::PageBytes)),
+ timerCtrlRange(RangeSize(p->cnt_ctl_base, ArmSystem::PageBytes)),
cnttidr(0x0),
addrRanges{counterCtrlRange, counterStatusRange, timerCtrlRange},
systemCounter(*p->counter),
@@ -1273,7 +1273,7 @@
void
GenericTimerMem::validateFrameRange(const AddrRange )
{
-fatal_if(range.start() % ArmISA::PageBytes,
+fatal_if(range.start() % ArmSystem::PageBytes,
"GenericTimerMem::validateFrameRange: Architecture states
each "
"register frame should be in a separate memory page,
specified "
"range base address [0x%x] is not compliant\n");
--
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Gerrit-Change-Id: Id757b5742c807c5f616a6dc8df94a7709932d071
Gerrit-Change-Number: 34171
Gerrit-PatchSet: 2
Gerrit-Owner: Gabe Black
Gerrit-Reviewer: Andreas Sandberg
Gerrit-Reviewer: Gabe Black
Gerrit-Reviewer: Giacomo Travaglini
Gerrit-Reviewer: kokoro
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: arm: Replicate the PageBytes constant in the ArmSystem class.
Gabe Black has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/34170 ) Change subject: arm: Replicate the PageBytes constant in the ArmSystem class. .. arm: Replicate the PageBytes constant in the ArmSystem class. When isa_traits.hh hopefully goes away in the not too distant future, this constant will need somewhere to live so ARM components can find it. There are valid arguments that this should not be a constant in the first place, but that's outside the scope of this change. Change-Id: Ic5bd046dc1cc196b3cf6b6c36878fdbf5eb4c0bf Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/34170 Reviewed-by: Andreas Sandberg Maintainer: Andreas Sandberg Tested-by: kokoro --- M src/arch/arm/system.hh 1 file changed, 3 insertions(+), 0 deletions(-) Approvals: Andreas Sandberg: Looks good to me, approved; Looks good to me, approved kokoro: Regressions pass diff --git a/src/arch/arm/system.hh b/src/arch/arm/system.hh index cffc235..e76245e 100644 --- a/src/arch/arm/system.hh +++ b/src/arch/arm/system.hh @@ -137,6 +137,9 @@ ArmSemihosting *const semihosting; public: +static constexpr Addr PageBytes = ArmISA::PageBytes; +static constexpr Addr PageShift = ArmISA::PageShift; + typedef ArmSystemParams Params; const Params * params() const -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/34170 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: develop Gerrit-Change-Id: Ic5bd046dc1cc196b3cf6b6c36878fdbf5eb4c0bf Gerrit-Change-Number: 34170 Gerrit-PatchSet: 2 Gerrit-Owner: Gabe Black Gerrit-Reviewer: Andreas Sandberg Gerrit-Reviewer: Gabe Black Gerrit-Reviewer: Nikos Nikoleris Gerrit-Reviewer: kokoro Gerrit-MessageType: merged ___ gem5-dev mailing list -- gem5-dev@gem5.org To unsubscribe send an email to gem5-dev-le...@gem5.org %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s
[gem5-dev] Re: Use of page size and TLBs in the prefetchers
Ok, no problem, that makes sense. Prefetching pages which are only physically contiguous could be counterproductive, and you'd need to know where that boundary is. Would it make sense to add a page size parameter to the prefetcher? It would be a little less automatic, but would avoid the prefetcher either having to grab the page size from a big, universal bucket or having to search for another component which is already ISA specific like the TLB. Any other suggestions are of course welcome. Gabe On Mon, Sep 7, 2020 at 3:25 AM Nikos Nikoleris wrote: > Hi Gabe, > > I agree with Isaac, some prefetchers use the page size to avoid crossing > page boundaries. These are prefetchers operate on the PA space and have > no access to the TLB to avoid the extra complexity or because they are > far from the core (e.g., L3 prefetcher). > > Some other prefetchers operate on the VA space and once they determine > the VA of the block they will prefetch, they use the TLB to map it to a > PA. These prefetchers are always connected to a TLB. > > Unfortunately, we can't really assume that all prefetchers are connected > to a TLB. > > Nikos > > On 07/09/2020 10:03, Isaac Sánchez Barrera wrote: > > Hi, > > > > I'm not using Ruby, so just talking about classic. > > > > Before the code included support for the TLBs, the prefetchers used the > > page size to detect page-crossing prefetches in order to discard them. > > Now it uses that to decide if it can do a direct prefetch or it needs to > > check the TLB for a translation of the address *if it has a TLB*. See > > `Base::samePage` (`src/mem/cache/prefetch/base.cc`) and an example of > > its use at > > > https://gem5.googlesource.com/public/gem5/+/refs/heads/develop/src/mem/cache/prefetch/queued.cc#180 > > (`src/mem/cache/prefetch/queued.cc` line 180) > > > > Would there be any other option without having to include the TLB in all > > prefetchers? > > > > > > Cheers, > > > > Isaac > > > > > > El 7/9/20 a las 10:06, Gabe Black escribió: > >> Hi folks. I've *almost* eliminated use of the getPageBytes and > >> getPageShift functions in the System class, which in combination with > >> a change from Andreas will eliminate the need for the isa_traits.hh > >> switching header file. > >> > >> The only use left is in the Ruby and cache prefetchers: > >> > >> mem/cache/prefetch/base.cc: masterId(p->sys->getMasterId(this)), > >> pageBytes(p->sys->getPageBytes()), > >> mem/ruby/structures/RubyPrefetcher.cc: > >> m_page_shift(p->sys->getPageShift()) > >> > >> I see that the cache prefetcher has a list of TLBs, and one thing I've > >> done is add a method to the TLB class(es) that returns the current > >> page size. Is it safe to assume one of these prefetchers will > >> *necessarily* have a TLB assigned to it? That seems plausible since if > >> it doesn't, why does it care about page sizes? But I don't understand > >> that code well enough to determine that, especially if it's some > >> corner case. > >> > >> The Ruby prefetcher doesn't *seem* to have a TLB attached to it? > >> Although I don't really know how Ruby works. What's going on there? > >> Any idea why it needs to know the page size (I can guess, but don't > >> know for sure), and what plays the role of the TLB in that case? > >> > >> Gabe > > > IMPORTANT NOTICE: The contents of this email and any attachments are > confidential and may also be privileged. If you are not the intended > recipient, please notify the sender immediately and do not disclose the > contents to any other person, use it for any purpose, or store or copy the > information in any medium. Thank you. > ___ gem5-dev mailing list -- gem5-dev@gem5.org To unsubscribe send an email to gem5-dev-le...@gem5.org %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s
[gem5-dev] Re: ChunkGenerator granularity, interface
Yep, I agree. While the new thing can be inspired by the ChunkGenerator,
unless it shares a significant chunk of implementation (not likely, there
isn't a ton of code in ChunkGenerator), they don't have to actually be
related to each other. I think particularly since in cases like the TLB
example, the returned object will likely be a temporary and so the type is
mostly irrelevant anyway.
Gabe
On Tue, Sep 8, 2020 at 9:34 AM Steve Reinhardt wrote:
> Thanks for the effort, Gabe!
>
> I totally agree that making the interface support range-based for loops
> makes sense. That would be a nice improvement.
>
> Having TLBs (or page tables?) support some kind of variable-size chunk
> loop range object that deals with multiple page sizes, maybe automatically
> merges contiguous mappings, etc. also seems pretty reasonable.
>
> I'm less sure about the need to have those two classes be related to each
> other. They would have similar (maybe even the same) interface(s), and
> conceptually similar purposes, but that's about it; would there be a use
> case where you'd have (say) a function that takes one of these "iterators"
> as an argument, and would need to use the base class to accept either
> type? On the other hand, if they were separate, you could specialize the
> interface; for example, I can see integrating the translation with the
> chunking for the TLB version and having both vaddr() and paddr() members,
> making your example above being something like:
>
> for (const auto : tlb->translateRegionByChunks(vregion_start,
> vregion_end) {
> read(buffer, chunk.paddr(), chunk.size());
> }
>
> while the simple version (for iterating over things like cache blocks)
> would just have addr() as currently.
>
> Thoughts?
>
> Steve
>
>
> On Mon, Sep 7, 2020 at 1:20 AM Gabe Black wrote:
>
>> Hi folks. In gem5, there is a simple but useful utility class called the
>> ChunkGenerator which takes a region of memory and a size, and breaks the
>> region into chunks which are broken on that size aligned boundaries.
>>
>> So for instance, if you wanted to translate every page that some big
>> array was located in in memory, you would use a ChunkGenerator with the
>> page size as the chunk size.
>>
>>
>> The problem here is that this class assumes that there is "the" page
>> size, or "the" block size to put into it, known ahead of time by the
>> consumer. This may not be true for page sizes for example, since a region
>> may fall across pages with different sizes. Or it may be a waste of effort
>> if, for instance, a region was contiguously mapped. There may also be
>> reasons to chunk up a region which are also not based on pages or other
>> fixed size boundaries.
>>
>> I think it would be a fairly simple extension to make the ChunkGenerator
>> where it would be created by some other entity which knows how big any
>> given chunk can be. For instance, there might be a call like this:
>>
>> chunk_generator = tlb->chunkRegion(region_start, region_end);
>>
>> Then you could walk through the chunks basically as you do now, but the
>> TLB would be involved and would know what boundaries to stop you at. I
>> think the biggest change that would require would be to make the "next()"
>> function virtual. It might be a good idea to break the class up into a base
>> class with generic bits, and then make the current, fixed chunk size
>> version inherit from it. Fancy variable sized versions could inherit from
>> the base without breaking existing usage.
>>
>> Also, the chunk generator has a very iterator like design currently. I
>> think it would be fairly straightforward to go all the way and give it real
>> iterators so that it can be used in a range based for loop, something like
>> this:
>>
>> for (const auto : tlb->chunkRegion(region_start, region_end) {
>> Addr paddr = translate(chunk.addr());
>> read(buffer, paddr, chunk.size());
>> }
>>
>> I think with these two changes, this class could be both more correct,
>> and a little easier to use. What do you think?
>>
>> Gabe
>>
>
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[gem5-dev] Change in gem5/gem5[develop]: cpu: convert trace cpu to new style stats
Jason Lowe-Power has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/33875 )
Change subject: cpu: convert trace cpu to new style stats
..
cpu: convert trace cpu to new style stats
This required making minor changes to how the name was set for the
generators within the trace CPU to enable the stats to keep similar
names.
Change-Id: I9f97d4006a0edbd717fc34d0033b9548011d1631
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33875
Maintainer: Jason Lowe-Power
Tested-by: kokoro
Reviewed-by: Ayaz Akram
---
M src/cpu/trace/trace_cpu.cc
M src/cpu/trace/trace_cpu.hh
2 files changed, 110 insertions(+), 171 deletions(-)
Approvals:
Ayaz Akram: Looks good to me, approved
Jason Lowe-Power: Looks good to me, approved
kokoro: Regressions pass
Objections:
Andreas Sandberg: I would prefer this is not merged as is
diff --git a/src/cpu/trace/trace_cpu.cc b/src/cpu/trace/trace_cpu.cc
index 13f194c..80db94c 100644
--- a/src/cpu/trace/trace_cpu.cc
+++ b/src/cpu/trace/trace_cpu.cc
@@ -50,8 +50,8 @@
dataMasterID(params->system->getMasterId(this, "data")),
instTraceFile(params->instTraceFile),
dataTraceFile(params->dataTraceFile),
-icacheGen(*this, ".iside", icachePort, instMasterID,
instTraceFile),
-dcacheGen(*this, ".dside", dcachePort, dataMasterID, dataTraceFile,
+icacheGen(*this, "iside", icachePort, instMasterID, instTraceFile),
+dcacheGen(*this, "dside", dcachePort, dataMasterID, dataTraceFile,
params),
icacheNextEvent([this]{ schedIcacheNext(); }, name()),
dcacheNextEvent([this]{ schedDcacheNext(); }, name()),
@@ -60,7 +60,7 @@
execCompleteEvent(nullptr),
enableEarlyExit(params->enableEarlyExit),
progressMsgInterval(params->progressMsgInterval),
-progressMsgThreshold(params->progressMsgInterval)
+progressMsgThreshold(params->progressMsgInterval), traceStats(this)
{
// Increment static counter for number of Trace CPUs.
++TraceCPU::numTraceCPUs;
@@ -91,8 +91,9 @@
void
TraceCPU::updateNumOps(uint64_t rob_num)
{
-numOps = rob_num;
-if (progressMsgInterval != 0 && numOps.value() >=
progressMsgThreshold) {
+traceStats.numOps = rob_num;
+if (progressMsgInterval != 0 &&
+ traceStats.numOps.value() >= progressMsgThreshold) {
inform("%s: %i insts committed\n", name(), progressMsgThreshold);
progressMsgThreshold += progressMsgInterval;
}
@@ -161,7 +162,7 @@
DPRINTF(TraceCPUInst, "Scheduling next icacheGen event "
"at %d.\n", curTick() + icacheGen.tickDelta());
schedule(icacheNextEvent, curTick() + icacheGen.tickDelta());
-++numSchedIcacheEvent;
+++traceStats.numSchedIcacheEvent;
} else {
// check if traceComplete. If not, do nothing because sending
failed
// and next event will be scheduled via RecvRetry()
@@ -208,93 +209,33 @@
}
}
}
-
-void
-TraceCPU::regStats()
+ TraceCPU::TraceStats::TraceStats(TraceCPU *trace)
+: Stats::Group(trace),
+ADD_STAT(numSchedDcacheEvent,
+ "Number of events scheduled to trigger data request generator"),
+ADD_STAT(numSchedIcacheEvent,
+ "Number of events scheduled to trigger instruction request
generator"),
+ADD_STAT(numOps, "Number of micro-ops simulated by the Trace CPU"),
+ADD_STAT(cpi, "Cycles per micro-op used as a proxy for CPI",
+ trace->numCycles / numOps)
{
-
-BaseCPU::regStats();
-
-numSchedDcacheEvent
-.name(name() + ".numSchedDcacheEvent")
-.desc("Number of events scheduled to trigger data request generator")
-;
-
-numSchedIcacheEvent
-.name(name() + ".numSchedIcacheEvent")
-.desc("Number of events scheduled to trigger instruction request
generator")
-;
-
-numOps
-.name(name() + ".numOps")
-.desc("Number of micro-ops simulated by the Trace CPU")
-;
-
-cpi
-.name(name() + ".cpi")
-.desc("Cycles per micro-op used as a proxy for CPI")
-.precision(6)
-;
-cpi = numCycles/numOps;
-
-icacheGen.regStats();
-dcacheGen.regStats();
+cpi.precision(6);
}
-
-void
-TraceCPU::ElasticDataGen::regStats()
+TraceCPU::ElasticDataGen::
+ElasticDataGenStatGroup::ElasticDataGenStatGroup(Stats::Group *parent,
+ const std::string& _name)
+: Stats::Group(parent, _name.c_str()),
+ADD_STAT(maxDependents, "Max number of dependents observed on a node"),
+ADD_STAT(maxReadyListSize, "Max size of the ready list observed"),
+ADD_STAT(numSendAttempted, "Number of first attempts to send a
request"),
+ADD_STAT(numSendSucceeded, "Number of successful first attempts"),
+ADD_STAT(numSendFailed, "Number of failed first attempts"),
+ADD_STAT(numRetrySucceeded, "Number of successful retries"),
+
[gem5-dev] Change in gem5/gem5[develop]: ext: Add support for comma-separated inputs of testlib argparser
Hoa Nguyen has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/34198 )
Change subject: ext: Add support for comma-separated inputs of testlib
argparser
..
ext: Add support for comma-separated inputs of testlib argparser
Currently, the --isa, --variant and --length options of testlib
do not support comma-separated inputs. This commit adds the
support for such an input for those options.
Change-Id: I3c276a9b9d9c6b0b802ecf8e7f1f9a3dfafe45d1
Signed-off-by: Hoa Nguyen
---
M ext/testlib/configuration.py
1 file changed, 8 insertions(+), 6 deletions(-)
diff --git a/ext/testlib/configuration.py b/ext/testlib/configuration.py
index 1267c25..8533cc0 100644
--- a/ext/testlib/configuration.py
+++ b/ext/testlib/configuration.py
@@ -486,6 +486,8 @@
'''
global common_args
+parse_comma_separated_string = lambda st: st.split(',')
+
# A list of common arguments/flags used across cli parsers.
common_args = [
Argument(
@@ -503,20 +505,20 @@
help='A tag comparison used to select tests.'),
Argument(
'--isa',
-action='append',
-default=[],
+default='',
+type = parse_comma_separated_string,
help="Only tests that are valid with one of these ISAs. "
"Comma separated."),
Argument(
'--variant',
-action='append',
-default=[],
+default='',
+type = parse_comma_separated_string,
help="Only tests that are valid with one of these binary
variants"
"(e.g., opt, debug). Comma separated."),
Argument(
'--length',
-action='append',
-default=[],
+default='',
+type = parse_comma_separated_string,
help="Only tests that are one of these lengths. Comma
separated."),
Argument(
'--host',
--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/34198
To unsubscribe, or for help writing mail filters, visit
https://gem5-review.googlesource.com/settings
Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I3c276a9b9d9c6b0b802ecf8e7f1f9a3dfafe45d1
Gerrit-Change-Number: 34198
Gerrit-PatchSet: 1
Gerrit-Owner: Hoa Nguyen
Gerrit-MessageType: newchange
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[gem5-dev] Change in gem5/gem5[develop]: cpu-o3: convert elastic trace to new style stats
Jason Lowe-Power has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/33399 )
Change subject: cpu-o3: convert elastic trace to new style stats
..
cpu-o3: convert elastic trace to new style stats
Change-Id: If767f17b905a77e12058022a9e8bc65b854978a4
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33399
Reviewed-by: Andreas Sandberg
Maintainer: Andreas Sandberg
Tested-by: kokoro
---
M src/cpu/o3/probe/elastic_trace.cc
M src/cpu/o3/probe/elastic_trace.hh
2 files changed, 76 insertions(+), 106 deletions(-)
Approvals:
Andreas Sandberg: Looks good to me, approved; Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/cpu/o3/probe/elastic_trace.cc
b/src/cpu/o3/probe/elastic_trace.cc
index 8292c33..b40d281 100644
--- a/src/cpu/o3/probe/elastic_trace.cc
+++ b/src/cpu/o3/probe/elastic_trace.cc
@@ -54,7 +54,8 @@
instTraceStream(nullptr),
startTraceInst(params->startTraceInst),
allProbesReg(false),
- traceVirtAddr(params->traceVirtAddr)
+ traceVirtAddr(params->traceVirtAddr),
+ stats(this)
{
cpu = dynamic_cast*>(params->manager);
fatal_if(!cpu, "Manager of %s is not of type O3CPU and thus does not "\
@@ -193,8 +194,8 @@
}
exec_info_ptr->executeTick = curTick();
-maxTempStoreSize = std::max(tempStore.size(),
-(std::size_t)maxTempStoreSize.value());
+stats.maxTempStoreSize = std::max(tempStore.size(),
+
(std::size_t)stats.maxTempStoreSize.value());
}
void
@@ -282,8 +283,8 @@
physRegDepMap[phys_dest_reg->flatIndex()] = seq_num;
}
}
-maxPhysRegDepMapSize = std::max(physRegDepMap.size(),
-
(std::size_t)maxPhysRegDepMapSize.value());
+stats.maxPhysRegDepMapSize = std::max(physRegDepMap.size(),
+
(std::size_t)stats.maxPhysRegDepMapSize.value());
}
void
@@ -450,7 +451,7 @@
TraceInfo* reg_dep = trace_info_itr->second;
reg_dep->numDepts++;
compDelayPhysRegDep(reg_dep, new_record);
-++numRegDep;
+++stats.numRegDep;
} else {
// The instruction that this has a register dependency on was
// not added to the trace because of one of the following
@@ -533,7 +534,7 @@
if (hasLoadCompleted(past_record, execute_tick)) {
// Assign rob dependency and calculate the computational
delay
assignRobDep(past_record, new_record);
-++numOrderDepStores;
+++stats.numRegDep;
return;
}
} else {
@@ -542,7 +543,7 @@
if (hasStoreCommitted(past_record, execute_tick)) {
// Assign rob dependency and calculate the computational
delay
assignRobDep(past_record, new_record);
-++numOrderDepStores;
+++stats.numRegDep;
return;
}
}
@@ -567,15 +568,15 @@
if (new_record->isLoad()) {
// The execution time of a load is when a request is sent
execute_tick = new_record->executeTick;
-++numIssueOrderDepLoads;
+++stats.numIssueOrderDepLoads;
} else if (new_record->isStore()) {
// The execution time of a store is when it is sent, i.e. committed
execute_tick = curTick();
-++numIssueOrderDepStores;
+++stats.numIssueOrderDepStores;
} else {
// The execution time of a non load/store is when it completes
execute_tick = new_record->toCommitTick;
-++numIssueOrderDepOther;
+++stats.numIssueOrderDepOther;
}
// We search if this record has an issue order dependency on a past
record.
@@ -610,8 +611,8 @@
// Increment number of dependents of the past record
++(past_record->numDepts);
// Update stat to log max number of dependents
-maxNumDependents = std::max(past_record->numDepts,
-(uint32_t)maxNumDependents.value());
+stats.maxNumDependents = std::max(past_record->numDepts,
+(uint32_t)stats.maxNumDependents.value());
}
bool
@@ -863,7 +864,7 @@
} else {
// Don't write the node to the trace but note that we have
filtered
// out a node.
-++numFilteredNodes;
+++stats.numFilteredNodes;
++num_filtered_nodes;
}
dep_trace_itr++;
@@ -874,59 +875,27 @@
depTrace.erase(dep_trace_itr_start, dep_trace_itr);
}
-void
-ElasticTrace::regStats() {
-ProbeListenerObject::regStats();
-
-using namespace Stats;
-numRegDep
-.name(name() + ".numRegDep")
-.desc("Number of register dependencies recorded during tracing")
-;
-
-
[gem5-dev] Change in gem5/gem5[develop]: ext: Force testlib to only create one Log object
Hoa Nguyen has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/33715 ) Change subject: ext: Force testlib to only create one Log object .. ext: Force testlib to only create one Log object Log object should remain being a singleton throughout the program. The current code creates multiple Log objects, which at least causes the issues of missing outputs in stdout. E.g., "Logging call to command", which logs which command is being called in a subprocess, is missing from stdout. Change-Id: I96c5dd79c4f14e0a013c15d42d202397488d56b6 Signed-off-by: Hoa Nguyen Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33715 Tested-by: kokoro Reviewed-by: Bobby R. Bruce Reviewed-by: Jason Lowe-Power Maintainer: Jason Lowe-Power --- M ext/testlib/runner.py 1 file changed, 2 insertions(+), 1 deletion(-) Approvals: Jason Lowe-Power: Looks good to me, but someone else must approve; Looks good to me, approved Bobby R. Bruce: Looks good to me, approved kokoro: Regressions pass diff --git a/ext/testlib/runner.py b/ext/testlib/runner.py index 7425e79..a59aca3 100644 --- a/ext/testlib/runner.py +++ b/ext/testlib/runner.py @@ -77,7 +77,8 @@ def __init__(self, test, suite): self.test = test self.suite = suite -self.log = log.Log(test) +self.log = log.test_log +self.log.test = test @helper.cacheresult def _fixtures(self): -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/33715 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: develop Gerrit-Change-Id: I96c5dd79c4f14e0a013c15d42d202397488d56b6 Gerrit-Change-Number: 33715 Gerrit-PatchSet: 6 Gerrit-Owner: Hoa Nguyen Gerrit-Reviewer: Bobby R. Bruce Gerrit-Reviewer: Giacomo Travaglini Gerrit-Reviewer: Hoa Nguyen Gerrit-Reviewer: Jason Lowe-Power Gerrit-Reviewer: kokoro Gerrit-MessageType: merged ___ gem5-dev mailing list -- gem5-dev@gem5.org To unsubscribe send an email to gem5-dev-le...@gem5.org %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s
[gem5-dev] Change in gem5/gem5[develop]: ext: Add post_test_procedure to testlib runner
Hoa Nguyen has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/33997 ) Change subject: ext: Add post_test_procedure to testlib runner .. ext: Add post_test_procedure to testlib runner This procedure is trigger after a test has finished and before the tearing down process kicks in. Change-Id: I58ce10814fbc80d96f2f72565491b18de0ec290a Signed-off-by: Hoa Nguyen Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33997 Tested-by: kokoro Reviewed-by: Jason Lowe-Power Maintainer: Jason Lowe-Power --- M ext/testlib/fixture.py M ext/testlib/runner.py 2 files changed, 8 insertions(+), 0 deletions(-) Approvals: Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved kokoro: Regressions pass diff --git a/ext/testlib/fixture.py b/ext/testlib/fixture.py index 79b57c0..bcd22d9 100644 --- a/ext/testlib/fixture.py +++ b/ext/testlib/fixture.py @@ -70,6 +70,9 @@ def setup(self, testitem): pass +def post_test_procedure(self, testitem): +pass + def teardown(self, testitem): pass diff --git a/ext/testlib/runner.py b/ext/testlib/runner.py index a59aca3..ee658c9 100644 --- a/ext/testlib/runner.py +++ b/ext/testlib/runner.py @@ -128,6 +128,7 @@ self.testable.status = Status.Running self.test() finally: +self.builder.post_test_procedure(self.testable) self.testable.status = Status.TearingDown self.builder.teardown(self.testable) @@ -209,6 +210,10 @@ raise BrokenFixtureException(fixture, testitem, traceback.format_exc()) +def post_test_procedure(self, testitem): +for fixture in self.built_fixtures: +fixture.post_test_procedure(testitem) + def teardown(self, testitem): for fixture in self.built_fixtures: try: -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/33997 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: develop Gerrit-Change-Id: I58ce10814fbc80d96f2f72565491b18de0ec290a Gerrit-Change-Number: 33997 Gerrit-PatchSet: 3 Gerrit-Owner: Hoa Nguyen Gerrit-Reviewer: Bobby R. Bruce Gerrit-Reviewer: Hoa Nguyen Gerrit-Reviewer: Jason Lowe-Power Gerrit-Reviewer: kokoro Gerrit-MessageType: merged ___ gem5-dev mailing list -- gem5-dev@gem5.org To unsubscribe send an email to gem5-dev-le...@gem5.org %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s
[gem5-dev] Change in gem5/gem5[develop]: ext,tests: Copy test's output files from /tmp to testing-results
Hoa Nguyen has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/33998 ) Change subject: ext,tests: Copy test's output files from /tmp to testing-results .. ext,tests: Copy test's output files from /tmp to testing-results When a test is complete, the output files are in a random folder in /tmp. This commit adds a procedure copying those files to testing-results/SuiteUID/TestUID/ folder, where SuiteUID and TestUID are the corresponding uid's of the test. This procedure is triggered after a test is complete and before the folder in /tmp being removed. Change-Id: Id960e7f2f1629769008ae99aff4c8bfafa9ca849 Signed-off-by: Hoa Nguyen Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33998 Tested-by: kokoro Reviewed-by: Jason Lowe-Power Maintainer: Jason Lowe-Power --- M tests/gem5/fixture.py 1 file changed, 17 insertions(+), 0 deletions(-) Approvals: Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved kokoro: Regressions pass diff --git a/tests/gem5/fixture.py b/tests/gem5/fixture.py index 94f3581..bb911dd 100644 --- a/tests/gem5/fixture.py +++ b/tests/gem5/fixture.py @@ -67,6 +67,23 @@ def setup(self, testitem): self.path = tempfile.mkdtemp(prefix='gem5out') +def post_test_procedure(self, testitem): +suiteUID = testitem.metadata.uid.suite +testUID = testitem.metadata.name +testing_result_folder = os.path.join(config.result_path, + "SuiteUID:" + suiteUID, + "TestUID:" + testUID) + +# Copy the output files of the run from /tmp to testing-results +# We want to wipe the entire result folder for this test first. Why? +# If the result folder exists (probably from the previous run), if +# this run emits fewer files, there'll be files from the previous +# run in this folder, which would cause confusion if one does not +# check the timestamp of the file. +if os.path.exists(testing_result_folder): +shutil.rmtree(testing_result_folder) +shutil.copytree(self.path, testing_result_folder) + def teardown(self, testitem): if testitem.result == Result.Passed: shutil.rmtree(self.path) -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/33998 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: develop Gerrit-Change-Id: Id960e7f2f1629769008ae99aff4c8bfafa9ca849 Gerrit-Change-Number: 33998 Gerrit-PatchSet: 4 Gerrit-Owner: Hoa Nguyen Gerrit-Reviewer: Bobby R. Bruce Gerrit-Reviewer: Hoa Nguyen Gerrit-Reviewer: Jason Lowe-Power Gerrit-Reviewer: kokoro Gerrit-MessageType: merged ___ gem5-dev mailing list -- gem5-dev@gem5.org To unsubscribe send an email to gem5-dev-le...@gem5.org %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s
[gem5-dev] Change in gem5/gem5[develop]: cpu: convert memtest to new style stats
Jason Lowe-Power has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/34137 )
Change subject: cpu: convert memtest to new style stats
..
cpu: convert memtest to new style stats
Change-Id: I91b17dd46fd0f70816159ea14c1c8f498048c696
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/34137
Reviewed-by: Jason Lowe-Power
Maintainer: Jason Lowe-Power
Tested-by: kokoro
---
M src/cpu/testers/memtest/memtest.cc
M src/cpu/testers/memtest/memtest.hh
2 files changed, 14 insertions(+), 22 deletions(-)
Approvals:
Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/cpu/testers/memtest/memtest.cc
b/src/cpu/testers/memtest/memtest.cc
index 720b273..026a325 100644
--- a/src/cpu/testers/memtest/memtest.cc
+++ b/src/cpu/testers/memtest/memtest.cc
@@ -99,7 +99,7 @@
nextProgressMessage(p->progress_interval),
maxLoads(p->max_loads),
atomic(p->system->isAtomicMode()),
- suppressFuncErrors(p->suppress_func_errors)
+ suppressFuncErrors(p->suppress_func_errors), stats(this)
{
id = TESTER_ALLOCATOR++;
fatal_if(id >= blockSize, "Too many testers, only %d allowed\n",
@@ -160,7 +160,7 @@
}
numReads++;
-numReadsStat++;
+stats.numReads++;
if (numReads == (uint64_t)nextProgressMessage) {
ccprintf(cerr, "%s: completed %d read, %d write accesses
@%d\n",
@@ -176,7 +176,7 @@
// update the reference data
referenceData[req->getPaddr()] = pkt_data[0];
numWrites++;
-numWritesStat++;
+stats.numWrites++;
}
}
@@ -190,23 +190,12 @@
else if (noResponseEvent.scheduled())
deschedule(noResponseEvent);
}
-
-void
-MemTest::regStats()
+MemTest::MemTestStats::MemTestStats(Stats::Group *parent)
+ : Stats::Group(parent),
+ ADD_STAT(numReads, "number of read accesses completed"),
+ ADD_STAT(numWrites, "number of write accesses completed")
{
-ClockedObject::regStats();
-using namespace Stats;
-
-numReadsStat
-.name(name() + ".num_reads")
-.desc("number of read accesses completed")
-;
-
-numWritesStat
-.name(name() + ".num_writes")
-.desc("number of write accesses completed")
-;
}
void
diff --git a/src/cpu/testers/memtest/memtest.hh
b/src/cpu/testers/memtest/memtest.hh
index 86b27a4..5eb4e35 100644
--- a/src/cpu/testers/memtest/memtest.hh
+++ b/src/cpu/testers/memtest/memtest.hh
@@ -72,7 +72,6 @@
typedef MemTestParams Params;
MemTest(const Params *p);
-void regStats() override;
Port (const std::string _name,
PortID idx=InvalidPortID) override;
@@ -166,9 +165,13 @@
const bool atomic;
const bool suppressFuncErrors;
-
-Stats::Scalar numReadsStat;
-Stats::Scalar numWritesStat;
+ protected:
+struct MemTestStats : public Stats::Group
+{
+MemTestStats(Stats::Group *parent);
+Stats::Scalar numReads;
+Stats::Scalar numWrites;
+} stats;
/**
* Complete a request by checking the response.
--
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https://gem5-review.googlesource.com/settings
Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I91b17dd46fd0f70816159ea14c1c8f498048c696
Gerrit-Change-Number: 34137
Gerrit-PatchSet: 3
Gerrit-Owner: Eden Avivi
Gerrit-Reviewer: Bobby R. Bruce
Gerrit-Reviewer: Jason Lowe-Power
Gerrit-Reviewer: kokoro
Gerrit-MessageType: merged
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[gem5-dev] Re: ChunkGenerator granularity, interface
Thanks for the effort, Gabe!
I totally agree that making the interface support range-based for loops
makes sense. That would be a nice improvement.
Having TLBs (or page tables?) support some kind of variable-size chunk loop
range object that deals with multiple page sizes, maybe automatically
merges contiguous mappings, etc. also seems pretty reasonable.
I'm less sure about the need to have those two classes be related to each
other. They would have similar (maybe even the same) interface(s), and
conceptually similar purposes, but that's about it; would there be a use
case where you'd have (say) a function that takes one of these "iterators"
as an argument, and would need to use the base class to accept either
type? On the other hand, if they were separate, you could specialize the
interface; for example, I can see integrating the translation with the
chunking for the TLB version and having both vaddr() and paddr() members,
making your example above being something like:
for (const auto : tlb->translateRegionByChunks(vregion_start,
vregion_end) {
read(buffer, chunk.paddr(), chunk.size());
}
while the simple version (for iterating over things like cache blocks)
would just have addr() as currently.
Thoughts?
Steve
On Mon, Sep 7, 2020 at 1:20 AM Gabe Black wrote:
> Hi folks. In gem5, there is a simple but useful utility class called the
> ChunkGenerator which takes a region of memory and a size, and breaks the
> region into chunks which are broken on that size aligned boundaries.
>
> So for instance, if you wanted to translate every page that some big array
> was located in in memory, you would use a ChunkGenerator with the page size
> as the chunk size.
>
>
> The problem here is that this class assumes that there is "the" page size,
> or "the" block size to put into it, known ahead of time by the consumer.
> This may not be true for page sizes for example, since a region may fall
> across pages with different sizes. Or it may be a waste of effort if, for
> instance, a region was contiguously mapped. There may also be reasons to
> chunk up a region which are also not based on pages or other fixed size
> boundaries.
>
> I think it would be a fairly simple extension to make the ChunkGenerator
> where it would be created by some other entity which knows how big any
> given chunk can be. For instance, there might be a call like this:
>
> chunk_generator = tlb->chunkRegion(region_start, region_end);
>
> Then you could walk through the chunks basically as you do now, but the
> TLB would be involved and would know what boundaries to stop you at. I
> think the biggest change that would require would be to make the "next()"
> function virtual. It might be a good idea to break the class up into a base
> class with generic bits, and then make the current, fixed chunk size
> version inherit from it. Fancy variable sized versions could inherit from
> the base without breaking existing usage.
>
> Also, the chunk generator has a very iterator like design currently. I
> think it would be fairly straightforward to go all the way and give it real
> iterators so that it can be used in a range based for loop, something like
> this:
>
> for (const auto : tlb->chunkRegion(region_start, region_end) {
> Addr paddr = translate(chunk.addr());
> read(buffer, paddr, chunk.size());
> }
>
> I think with these two changes, this class could be both more correct, and
> a little easier to use. What do you think?
>
> Gabe
>
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[gem5-dev] Change in gem5/gem5[develop]: ext: Make the testing-results folder visible
Hoa Nguyen has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/34015 ) Change subject: ext: Make the testing-results folder visible .. ext: Make the testing-results folder visible Currently, testlib will write outputs to .testing-results, which is a hidden folder. However, the outputs in the folder are useful for debugging. This commit makes this folder visible on Linux systems. Change-Id: I158e1a4a62c7b494309a0a4bf6521fedd04cbe22 Signed-off-by: Hoa Nguyen Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/34015 Reviewed-by: Jason Lowe-Power Maintainer: Jason Lowe-Power Tested-by: kokoro --- M ext/testlib/configuration.py M tests/.gitignore 2 files changed, 2 insertions(+), 2 deletions(-) Approvals: Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved kokoro: Regressions pass diff --git a/ext/testlib/configuration.py b/ext/testlib/configuration.py index 48fd2a0..1267c25 100644 --- a/ext/testlib/configuration.py +++ b/ext/testlib/configuration.py @@ -213,7 +213,7 @@ defaults.base_dir = os.path.abspath(os.path.join(absdirpath(__file__), os.pardir, os.pardir)) -defaults.result_path = os.path.join(os.getcwd(), '.testing-results') +defaults.result_path = os.path.join(os.getcwd(), 'testing-results') defaults.resource_url = 'http://dist.gem5.org/dist/develop' defaults.resource_path = os.path.abspath(os.path.join(defaults.base_dir, 'tests', diff --git a/tests/.gitignore b/tests/.gitignore index 6e620f5..44c98e6 100644 --- a/tests/.gitignore +++ b/tests/.gitignore @@ -1,2 +1,2 @@ -.testing-results +testing-results gem5/resources -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/34015 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: develop Gerrit-Change-Id: I158e1a4a62c7b494309a0a4bf6521fedd04cbe22 Gerrit-Change-Number: 34015 Gerrit-PatchSet: 6 Gerrit-Owner: Hoa Nguyen Gerrit-Reviewer: Hoa Nguyen Gerrit-Reviewer: Jason Lowe-Power Gerrit-Reviewer: kokoro Gerrit-CC: Bobby R. Bruce Gerrit-MessageType: merged ___ gem5-dev mailing list -- gem5-dev@gem5.org To unsubscribe send an email to gem5-dev-le...@gem5.org %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s
[gem5-dev] Change in gem5/gem5[develop]: base: Tag API methods in crc.hh
Hoa Nguyen has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/32961 ) Change subject: base: Tag API methods in crc.hh .. base: Tag API methods in crc.hh Change-Id: I4fc8977dad705a6774f649479184cdfb15aa2be5 Signed-off-by: Hoa Nguyen Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/32961 Maintainer: Bobby R. Bruce Tested-by: kokoro Reviewed-by: Bobby R. Bruce Reviewed-by: Jason Lowe-Power --- M src/base/crc.hh 1 file changed, 2 insertions(+), 0 deletions(-) Approvals: Jason Lowe-Power: Looks good to me, approved Bobby R. Bruce: Looks good to me, approved; Looks good to me, approved kokoro: Regressions pass diff --git a/src/base/crc.hh b/src/base/crc.hh index 9c74a6b..b2b6c14 100644 --- a/src/base/crc.hh +++ b/src/base/crc.hh @@ -51,6 +51,8 @@ * @param size: Number of bytes * * @return 32-bit remainder of the checksum + * + * @ingroup api_base_utils */ template uint32_t -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/32961 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: develop Gerrit-Change-Id: I4fc8977dad705a6774f649479184cdfb15aa2be5 Gerrit-Change-Number: 32961 Gerrit-PatchSet: 5 Gerrit-Owner: Hoa Nguyen Gerrit-Reviewer: Bobby R. Bruce Gerrit-Reviewer: Hoa Nguyen Gerrit-Reviewer: Jason Lowe-Power Gerrit-Reviewer: Jason Lowe-Power Gerrit-Reviewer: kokoro Gerrit-MessageType: merged ___ gem5-dev mailing list -- gem5-dev@gem5.org To unsubscribe send an email to gem5-dev-le...@gem5.org %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s
[gem5-dev] Change in gem5/gem5[develop]: base: Tag API methods in inet.hh
Hoa Nguyen has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/33254 )
Change subject: base: Tag API methods in inet.hh
..
base: Tag API methods in inet.hh
Change-Id: Id53ab873c7de9de7ccb99ff8434827aeec676c30
Signed-off-by: Hoa Nguyen
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33254
Reviewed-by: Bobby R. Bruce
Reviewed-by: Jason Lowe-Power
Maintainer: Bobby R. Bruce
Tested-by: kokoro
---
M src/base/inet.hh
1 file changed, 148 insertions(+), 0 deletions(-)
Approvals:
Jason Lowe-Power: Looks good to me, but someone else must approve
Bobby R. Bruce: Looks good to me, approved; Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/base/inet.hh b/src/base/inet.hh
index 43523a1..8aa4475 100644
--- a/src/base/inet.hh
+++ b/src/base/inet.hh
@@ -75,18 +75,36 @@
void parse(const std::string );
public:
+/**
+ * @ingroup api_inet
+ * @{
+ */
EthAddr();
EthAddr(const uint8_t ea[ETH_ADDR_LEN]);
EthAddr(const eth_addr );
EthAddr(const std::string );
const EthAddr =(const eth_addr );
const EthAddr =(const std::string );
+/** @} */ // end of api_inet
+/**
+ * @ingroup api_inet
+ */
int size() const { return sizeof(eth_addr); }
+
+/**
+ * @ingroup api_inet
+ * @{
+ */
const uint8_t *bytes() const { return [0]; }
uint8_t *bytes() { return [0]; }
+/** @} */ // end of api_inet
+/**
+ * @ingroup api_inet
+ * @{
+ */
const uint8_t *addr() const { return [0]; }
bool unicast() const { return !(data[0] & 0x01); }
bool multicast() const { return !unicast() && !broadcast(); }
@@ -99,9 +117,16 @@
return isBroadcast;
}
+/** @} */ // end of api_inet
+/**
+ * @ingroup api_inet
+ */
std::string string() const;
+/**
+ * @ingroup api_inet
+ */
operator uint64_t() const
{
uint64_t reg = 0;
@@ -116,8 +141,13 @@
};
+/**
+ * @ingroup api_inet
+ * @{
+ */
std::ostream <<(std::ostream , const EthAddr );
bool operator==(const EthAddr , const EthAddr );
+/** @} */ // end of api_inet
struct EthHdr : public eth_hdr
{
@@ -161,8 +191,13 @@
EthPacketPtr p;
public:
+/**
+ * @ingroup api_inet
+ * @{
+ */
EthPtr() {}
EthPtr(const EthPacketPtr ) : p(ptr) { }
+/** @} */ // end of api_inet
EthHdr *operator->() { return (EthHdr *)p->data; }
EthHdr *() { return *(EthHdr *)p->data; }
@@ -172,14 +207,22 @@
const EthHdr *() const { return *(const EthHdr *)p->data; }
operator const EthHdr *() const { return (const EthHdr *)p->data; }
+/**
+ * @ingroup api_inet
+ */
const EthPtr =(const EthPacketPtr ) { p = ptr; return
*this; }
+/**
+ * @ingroup api_inet
+ * @{
+ */
const EthPacketPtr packet() const { return p; }
EthPacketPtr packet() { return p; }
bool operator!() const { return !p; }
operator bool() const { return (p != nullptr); }
int off() const { return 0; }
int pstart() const { return off() + ((const EthHdr*)p->data)->size(); }
+/** @} */ // end of api_inet
};
/*
@@ -191,18 +234,34 @@
uint32_t _ip;
public:
+/**
+ * @ingroup api_inet
+ * @{
+ */
IpAddress() : _ip(0)
{}
IpAddress(const uint32_t __ip) : _ip(__ip)
{}
+/** @} */ // end of api_net
+/**
+ * @ingroup api_inet
+ */
uint32_t ip() const { return _ip; }
+/**
+ * @ingroup api_inet
+ */
std::string string() const;
};
+/**
+ * @ingroup api_inet
+ * @{
+ */
std::ostream <<(std::ostream , const IpAddress );
bool operator==(const IpAddress , const IpAddress );
+/** @} */ // end of api_inet
struct IpNetmask : public IpAddress
{
@@ -216,13 +275,21 @@
IpAddress(__ip), _netmask(__netmask)
{}
+/**
+ * @ingroup api_inet
+ */
uint8_t netmask() const { return _netmask; }
std::string string() const;
};
+/**
+ * @ingroup api_inet
+ * @{
+ */
std::ostream <<(std::ostream , const IpNetmask );
bool operator==(const IpNetmask , const IpNetmask );
+/** @} */ // end of api_inet
struct IpWithPort : public IpAddress
{
@@ -236,13 +303,21 @@
IpAddress(__ip), _port(__port)
{}
+/**
+ * @ingroup api_inet
+ */
uint8_t port() const { return _port; }
std::string string() const;
};
+/**
+ * @ingroup api_inet
+ * @{
+ */
std::ostream <<(std::ostream , const IpWithPort );
bool operator==(const IpWithPort , const IpWithPort );
+/** @} */ // end of api_inet
struct IpOpt;
struct IpHdr : public ip_hdr
@@ -296,34 +371,52 @@
}
public:
+/**
+ * @ingroup api_inet
+ * @{
+ */
IpPtr() : p(0), eth_hdr_vlan(false) {}
IpPtr(const EthPacketPtr ) : p(0), eth_hdr_vlan(false) { set(ptr);
}
IpPtr(const EthPtr ) : p(0),
[gem5-dev] Change in gem5/gem5[develop]: base: Tag API methods to debug.hh
Hoa Nguyen has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/33257 )
Change subject: base: Tag API methods to debug.hh
..
base: Tag API methods to debug.hh
Change-Id: Ic4395f3594cbc156a2b678710a3ed4717ce87a81
Signed-off-by: Hoa Nguyen
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33257
Reviewed-by: Jason Lowe-Power
Maintainer: Jason Lowe-Power
Tested-by: kokoro
---
M src/base/debug.hh
1 file changed, 7 insertions(+), 0 deletions(-)
Approvals:
Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/base/debug.hh b/src/base/debug.hh
index a5dc43c..7cc7137 100644
--- a/src/base/debug.hh
+++ b/src/base/debug.hh
@@ -134,10 +134,17 @@
void dumpDebugFlags();
+/**
+ * \def DTRACE(x)
+ *
+ * @ingroup api_trace
+ * @{
+ */
#if TRACING_ON
# define DTRACE(x) (Debug::x)
#else // !TRACING_ON
# define DTRACE(x) (false)
#endif // TRACING_ON
+/** @} */ // end of api_trace
#endif // __BASE_DEBUG_HH__
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Ic4395f3594cbc156a2b678710a3ed4717ce87a81
Gerrit-Change-Number: 33257
Gerrit-PatchSet: 6
Gerrit-Owner: Hoa Nguyen
Gerrit-Reviewer: Andreas Sandberg
Gerrit-Reviewer: Bobby R. Bruce
Gerrit-Reviewer: Hoa Nguyen
Gerrit-Reviewer: Jason Lowe-Power
Gerrit-Reviewer: kokoro
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: base: Tag API variables in date.cc
Hoa Nguyen has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/32974 ) Change subject: base: Tag API variables in date.cc .. base: Tag API variables in date.cc Change-Id: I5a90f6496ef1e39b6135a14dfdf3f5febd22ece2 Signed-off-by: Hoa Nguyen Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/32974 Maintainer: Bobby R. Bruce Tested-by: kokoro Reviewed-by: Bobby R. Bruce Reviewed-by: Jason Lowe-Power --- M src/base/date.cc 1 file changed, 3 insertions(+), 0 deletions(-) Approvals: Jason Lowe-Power: Looks good to me, approved Bobby R. Bruce: Looks good to me, approved; Looks good to me, approved kokoro: Regressions pass diff --git a/src/base/date.cc b/src/base/date.cc index ba7698c..bec3490 100644 --- a/src/base/date.cc +++ b/src/base/date.cc @@ -26,4 +26,7 @@ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/** + * @ingroup api_base_utils + */ const char *compileDate = __DATE__ " " __TIME__; -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/32974 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: develop Gerrit-Change-Id: I5a90f6496ef1e39b6135a14dfdf3f5febd22ece2 Gerrit-Change-Number: 32974 Gerrit-PatchSet: 4 Gerrit-Owner: Hoa Nguyen Gerrit-Reviewer: Bobby R. Bruce Gerrit-Reviewer: Hoa Nguyen Gerrit-Reviewer: Jason Lowe-Power Gerrit-Reviewer: Jason Lowe-Power Gerrit-Reviewer: kokoro Gerrit-MessageType: merged ___ gem5-dev mailing list -- gem5-dev@gem5.org To unsubscribe send an email to gem5-dev-le...@gem5.org %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s
[gem5-dev] Change in gem5/gem5[develop]: base: Tag API methods in flags.hh
Hoa Nguyen has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/33035 )
Change subject: base: Tag API methods in flags.hh
..
base: Tag API methods in flags.hh
Change-Id: I12eb94b43e190ee46f82fba7d2a3ef6c29fdee80
Signed-off-by: Hoa Nguyen
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33035
Maintainer: Bobby R. Bruce
Tested-by: kokoro
Reviewed-by: Bobby R. Bruce
Reviewed-by: Jason Lowe-Power
---
M src/base/flags.hh
1 file changed, 20 insertions(+), 0 deletions(-)
Approvals:
Jason Lowe-Power: Looks good to me, approved
Bobby R. Bruce: Looks good to me, approved; Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/base/flags.hh b/src/base/flags.hh
index 0b0a803..c9525fa 100644
--- a/src/base/flags.hh
+++ b/src/base/flags.hh
@@ -37,11 +37,23 @@
public:
typedef T Type;
+
+/**
+ * @ingroup api_flags
+ * @{
+ */
Flags() : _flags(0) {}
Flags(Type flags) : _flags(flags) {}
+/** @} */ // end of api_flags
+/**
+ * @ingroup api_flags
+ */
operator const Type() const { return _flags; }
+/**
+ * @ingroup api_flags
+ */
template
const Flags &
operator=(const Flags )
@@ -50,6 +62,9 @@
return *this;
}
+/**
+ * @ingroup api_flags
+ */
const Flags &
operator=(T flags)
{
@@ -57,6 +72,10 @@
return *this;
}
+/**
+ * @ingroup api_flags
+ * @{
+ */
bool isSet() const { return _flags; }
bool isSet(Type flags) const { return (_flags & flags); }
bool allSet() const { return !(~_flags); }
@@ -72,6 +91,7 @@
{
_flags = (_flags & ~mask) | (flags & mask);
}
+/** @} */ // end of api_flags
};
#endif // __BASE_FLAGS_HH__
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I12eb94b43e190ee46f82fba7d2a3ef6c29fdee80
Gerrit-Change-Number: 33035
Gerrit-PatchSet: 2
Gerrit-Owner: Hoa Nguyen
Gerrit-Reviewer: Bobby R. Bruce
Gerrit-Reviewer: Ciro Santilli
Gerrit-Reviewer: Hoa Nguyen
Gerrit-Reviewer: Jason Lowe-Power
Gerrit-Reviewer: kokoro
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: base: Tag API variables in version.cc
Hoa Nguyen has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/33079 ) Change subject: base: Tag API variables in version.cc .. base: Tag API variables in version.cc Change-Id: I49438963a1cdb82b00fa6bea153d55b8cdbfcf33 Signed-off-by: Hoa Nguyen Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33079 Maintainer: Bobby R. Bruce Tested-by: kokoro Reviewed-by: Bobby R. Bruce Reviewed-by: Jason Lowe-Power --- M src/base/version.cc 1 file changed, 3 insertions(+), 0 deletions(-) Approvals: Jason Lowe-Power: Looks good to me, approved Bobby R. Bruce: Looks good to me, approved; Looks good to me, approved kokoro: Regressions pass diff --git a/src/base/version.cc b/src/base/version.cc index 4419aa5..ff58ad1 100644 --- a/src/base/version.cc +++ b/src/base/version.cc @@ -26,4 +26,7 @@ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/** + * @ingroup api_base_utils + */ const char *gem5Version = "[DEVELOP-FOR-V20.1]"; -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/33079 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: develop Gerrit-Change-Id: I49438963a1cdb82b00fa6bea153d55b8cdbfcf33 Gerrit-Change-Number: 33079 Gerrit-PatchSet: 2 Gerrit-Owner: Hoa Nguyen Gerrit-Reviewer: Bobby R. Bruce Gerrit-Reviewer: Hoa Nguyen Gerrit-Reviewer: Jason Lowe-Power Gerrit-Reviewer: Jason Lowe-Power Gerrit-Reviewer: kokoro Gerrit-MessageType: merged ___ gem5-dev mailing list -- gem5-dev@gem5.org To unsubscribe send an email to gem5-dev-le...@gem5.org %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s
[gem5-dev] Change in gem5/gem5[develop]: base: Tag API methods in intmath.hh
Hoa Nguyen has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/33075 )
Change subject: base: Tag API methods in intmath.hh
..
base: Tag API methods in intmath.hh
Change-Id: Ia50830c7620380ff2aba081f56f74822aff982bf
Signed-off-by: Hoa Nguyen
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33075
Maintainer: Bobby R. Bruce
Tested-by: kokoro
Reviewed-by: Bobby R. Bruce
Reviewed-by: Jason Lowe-Power
---
M src/base/intmath.hh
1 file changed, 21 insertions(+), 2 deletions(-)
Approvals:
Jason Lowe-Power: Looks good to me, approved
Bobby R. Bruce: Looks good to me, approved; Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/base/intmath.hh b/src/base/intmath.hh
index 3713ae6..daf5f5d 100644
--- a/src/base/intmath.hh
+++ b/src/base/intmath.hh
@@ -36,6 +36,9 @@
#include "base/logging.hh"
#include "base/types.hh"
+/**
+ * @ingroup api_base_utils
+ */
inline uint64_t
power(uint32_t n, uint32_t e)
{
@@ -52,6 +55,9 @@
return result;
}
+/**
+ * @ingroup api_base_utils
+ */
template
inline typename std::enable_if::value, int>::type
floorLog2(T x)
@@ -74,6 +80,9 @@
return y;
}
+/**
+ * @ingroup api_base_utils
+ */
template
inline int
ceilLog2(const T& n)
@@ -85,6 +94,9 @@
return floorLog2(n - (T)1) + 1;
}
+/**
+ * @ingroup api_base_utils
+ */
template
inline bool
isPowerOf2(const T& n)
@@ -94,6 +106,9 @@
return n && !(n & (n - 1));
}
+/**
+ * @ingroup api_base_utils
+ */
template
inline T
divCeil(const T& a, const U& b)
@@ -108,7 +123,9 @@
* @param align is the alignment. Can only be a power of 2.
* @return The aligned address. The smallest number divisible
* by @param align which is greater than or equal to @param val.
-*/
+ *
+ * @ingroup api_base_utils
+ */
template
inline T
roundUp(const T& val, const U& align)
@@ -125,7 +142,9 @@
* @param align is the alignment. Can only be a power of 2.
* @return The aligned address. The biggest number divisible
* by @param align which is less than or equal to @param val.
-*/
+ *
+ * @ingroup api_base_utils
+ */
template
inline T
roundDown(const T& val, const U& align)
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Ia50830c7620380ff2aba081f56f74822aff982bf
Gerrit-Change-Number: 33075
Gerrit-PatchSet: 2
Gerrit-Owner: Hoa Nguyen
Gerrit-Reviewer: Bobby R. Bruce
Gerrit-Reviewer: Hoa Nguyen
Gerrit-Reviewer: Jason Lowe-Power
Gerrit-Reviewer: kokoro
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: base: Tag API methods in sat_counter.hh
Hoa Nguyen has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/33117 )
Change subject: base: Tag API methods in sat_counter.hh
..
base: Tag API methods in sat_counter.hh
Change-Id: Id5da647f35cca30276bb34b745999f4571a47d89
Signed-off-by: Hoa Nguyen
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33117
Maintainer: Bobby R. Bruce
Tested-by: kokoro
Reviewed-by: Daniel Carvalho
Reviewed-by: Jason Lowe-Power
---
M src/base/sat_counter.hh
1 file changed, 77 insertions(+), 13 deletions(-)
Approvals:
Jason Lowe-Power: Looks good to me, approved
Daniel Carvalho: Looks good to me, approved
Bobby R. Bruce: Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/base/sat_counter.hh b/src/base/sat_counter.hh
index 40b55f6..d257cda 100644
--- a/src/base/sat_counter.hh
+++ b/src/base/sat_counter.hh
@@ -65,6 +65,8 @@
*
* @param bits How many bits the counter will have.
* @param initial_val Starting value for the counter.
+ *
+ * @ingroup api_sat_counter
*/
explicit SatCounter(unsigned bits, uint8_t initial_val = 0)
: initialVal(initial_val), maxVal((1 << bits) - 1),
@@ -76,14 +78,22 @@
"Saturating counter's Initial value exceeds max value.");
}
-/** Copy constructor. */
+/**
+ * Copy constructor.
+ *
+ * @ingroup api_sat_counter
+ */
SatCounter(const SatCounter& other)
: initialVal(other.initialVal), maxVal(other.maxVal),
counter(other.counter)
{
}
-/** Copy assignment. */
+/**
+ * Copy assignment.
+ *
+ * @ingroup api_sat_counter
+ */
SatCounter& operator=(const SatCounter& other) {
if (this != ) {
SatCounter temp(other);
@@ -92,7 +102,11 @@
return *this;
}
-/** Move constructor. */
+/**
+ * Move constructor.
+ *
+ * @ingroup api_sat_counter
+ */
SatCounter(SatCounter&& other)
{
initialVal = other.initialVal;
@@ -102,7 +116,11 @@
other.swap(temp);
}
-/** Move assignment. */
+/**
+ * Move assignment.
+ *
+ * @ingroup api_sat_counter
+ */
SatCounter& operator=(SatCounter&& other) {
if (this != ) {
initialVal = other.initialVal;
@@ -119,6 +137,8 @@
* copy-assignment created by the compiler.
*
* @param other The other object to swap contents with.
+ *
+ * @ingroup api_sat_counter
*/
void
swap(SatCounter& other)
@@ -128,7 +148,11 @@
std::swap(counter, other.counter);
}
-/** Pre-increment operator. */
+/**
+ * Pre-increment operator.
+ *
+ * @ingroup api_sat_counter
+ */
SatCounter&
operator++()
{
@@ -138,7 +162,11 @@
return *this;
}
-/** Post-increment operator. */
+/**
+ * Post-increment operator.
+ *
+ * @ingroup api_sat_counter
+ */
SatCounter
operator++(int)
{
@@ -147,7 +175,11 @@
return old_counter;
}
-/** Pre-decrement operator. */
+/**
+ * Pre-decrement operator.
+ *
+ * @ingroup api_sat_counter
+ */
SatCounter&
operator--()
{
@@ -157,7 +189,11 @@
return *this;
}
-/** Post-decrement operator. */
+/**
+ * Post-decrement operator.
+ *
+ * @ingroup api_sat_counter
+ */
SatCounter
operator--(int)
{
@@ -166,7 +202,11 @@
return old_counter;
}
-/** Shift-right-assignment. */
+/**
+ * Shift-right-assignment.
+ *
+ * @ingroup api_sat_counter
+ */
SatCounter&
operator>>=(const int& shift)
{
@@ -175,7 +215,11 @@
return *this;
}
-/** Shift-left-assignment. */
+/**
+ * Shift-left-assignment.
+ *
+ * @ingroup api_sat_counter
+ */
SatCounter&
operator<<=(const int& shift)
{
@@ -187,7 +231,11 @@
return *this;
}
-/** Add-assignment. */
+/**
+ * Add-assignment.
+ *
+ * @ingroup api_sat_counter
+ */
SatCounter&
operator+=(const int& value)
{
@@ -203,7 +251,11 @@
return *this;
}
-/** Subtract-assignment. */
+/**
+ * Subtract-assignment.
+ *
+ * @ingroup api_sat_counter
+ */
SatCounter&
operator-=(const int& value)
{
@@ -221,10 +273,16 @@
/**
* Read the counter's value.
+ *
+ * @ingroup api_sat_counter
*/
operator uint8_t() const { return counter; }
-/** Reset the counter to its initial value. */
+/**
+ * Reset the counter to its initial value.
+ *
+ * @ingroup api_sat_counter
+ */
void reset() { counter = initialVal; }
/**
@@ -233,6 +291,8 @@
*
* @return A value between 0.0 and 1.0 to indicate which percentile of
* the maximum value
[gem5-dev] Change in gem5/gem5[develop]: base: Tag API methods in remote_gdb.hh
Hoa Nguyen has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/33256 )
Change subject: base: Tag API methods in remote_gdb.hh
..
base: Tag API methods in remote_gdb.hh
Change-Id: I7d4d6ce8a2b18a365561ad88434fea7d6823d310
Signed-off-by: Hoa Nguyen
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33256
Reviewed-by: Bobby R. Bruce
Reviewed-by: Jason Lowe-Power
Maintainer: Bobby R. Bruce
Tested-by: kokoro
---
M src/base/remote_gdb.hh
1 file changed, 21 insertions(+), 1 deletion(-)
Approvals:
Jason Lowe-Power: Looks good to me, but someone else must approve
Bobby R. Bruce: Looks good to me, approved; Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/base/remote_gdb.hh b/src/base/remote_gdb.hh
index fc25990..3ab0feb 100644
--- a/src/base/remote_gdb.hh
+++ b/src/base/remote_gdb.hh
@@ -75,23 +75,31 @@
* Return the pointer to the raw bytes buffer containing the
* register values. Each byte of this buffer is literally
* encoded as two hex digits in the g or G RSP packet.
+ *
+ * @ingroup api_remote_gdb
*/
virtual char *data() const = 0;
/**
* Return the size of the raw buffer, in bytes
* (i.e., half of the number of digits in the g/G packet).
+ *
+ * @ingroup api_remote_gdb
*/
virtual size_t size() const = 0;
/**
* Fill the raw buffer from the registers in the ThreadContext.
+ *
+ * @ingroup api_remote_gdb
*/
virtual void getRegs(ThreadContext*) = 0;
/**
* Set the ThreadContext's registers from the values
* in the raw buffer.
+ *
+ * @ingroup api_remote_gdb
*/
virtual void setRegs(ThreadContext*) const = 0;
@@ -100,9 +108,14 @@
* Having each concrete superclass redefine this member
* is useful in situations where the class of the regCache
* can change on the fly.
+ *
+ * @ingroup api_remote_gdb
*/
virtual const std::string name() const = 0;
+/**
+ * @ingroup api_remote_gdb
+ */
BaseGdbRegCache(BaseRemoteGDB *g) : gdb(g)
{}
virtual ~BaseGdbRegCache()
@@ -117,7 +130,12 @@
friend class HardBreakpoint;
public:
-/*
+/**
+ * @ingroup api_remote_gdb
+ * @{
+ */
+
+/**
* Interface to other parts of the simulator.
*/
BaseRemoteGDB(System *system, ThreadContext *context, int _port);
@@ -139,6 +157,8 @@
bool trap(int type);
bool breakpoint() { return trap(SIGTRAP); }
+/** @} */ // end of api_remote_gdb
+
private:
/*
* Connection to the external GDB.
--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/33256
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I7d4d6ce8a2b18a365561ad88434fea7d6823d310
Gerrit-Change-Number: 33256
Gerrit-PatchSet: 3
Gerrit-Owner: Hoa Nguyen
Gerrit-Reviewer: Bobby R. Bruce
Gerrit-Reviewer: Gabe Black
Gerrit-Reviewer: Hoa Nguyen
Gerrit-Reviewer: Jason Lowe-Power
Gerrit-Reviewer: kokoro
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: base: Tag API methods in condcodes.hh
Hoa Nguyen has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/33074 ) Change subject: base: Tag API methods in condcodes.hh .. base: Tag API methods in condcodes.hh Change-Id: Ife6b5ed6ee684b65790c374ab6e709ce8eb708ad Signed-off-by: Hoa Nguyen Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33074 Reviewed-by: Bobby R. Bruce Reviewed-by: Jason Lowe-Power Maintainer: Bobby R. Bruce Tested-by: kokoro --- M src/base/condcodes.hh 1 file changed, 10 insertions(+), 0 deletions(-) Approvals: Jason Lowe-Power: Looks good to me, approved Bobby R. Bruce: Looks good to me, approved; Looks good to me, approved kokoro: Regressions pass diff --git a/src/base/condcodes.hh b/src/base/condcodes.hh index 5de2daa..b15fec0 100644 --- a/src/base/condcodes.hh +++ b/src/base/condcodes.hh @@ -74,6 +74,8 @@ * If we have a carry in, but no carry out: * src1 and src2 can neither be 1. So the overall result bit is 1. Hence: * ~1 + 0 + 0 => 0. We return false. + * + * @ingroup api_base_utils */ static inline bool findCarry(int width, uint64_t dest, uint64_t src1, uint64_t src2) @@ -86,6 +88,8 @@ /** * Calculate the overflow flag from an addition. + * + * @ingroup api_base_utils */ static inline bool findOverflow(int width, uint64_t dest, uint64_t src1, uint64_t src2) @@ -109,6 +113,8 @@ * If the intermediate is still one, then there is exactly one high bit * which does not have a corresponding high bit. Therefore, the value must * have odd parity, and we return 1 accordingly. Otherwise we return 0. + * + * @ingroup api_base_utils */ static inline bool findParity(int width, uint64_t dest) @@ -125,6 +131,8 @@ /** * Calculate the negative flag. + * + * @ingroup api_base_utils */ static inline bool findNegative(int width, uint64_t dest) @@ -134,6 +142,8 @@ /** * Calculate the zero flag. + * + * @ingroup api_base_utils */ static inline bool findZero(int width, uint64_t dest) -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/33074 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: develop Gerrit-Change-Id: Ife6b5ed6ee684b65790c374ab6e709ce8eb708ad Gerrit-Change-Number: 33074 Gerrit-PatchSet: 3 Gerrit-Owner: Hoa Nguyen Gerrit-Reviewer: Bobby R. Bruce Gerrit-Reviewer: Hoa Nguyen Gerrit-Reviewer: Jason Lowe-Power Gerrit-Reviewer: kokoro Gerrit-MessageType: merged ___ gem5-dev mailing list -- gem5-dev@gem5.org To unsubscribe send an email to gem5-dev-le...@gem5.org %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s
[gem5-dev] Change in gem5/gem5[develop]: base: Tag API methods to trace.hh
Hoa Nguyen has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/33255 )
Change subject: base: Tag API methods to trace.hh
..
base: Tag API methods to trace.hh
Change-Id: Ia2ad759b9bee4fd3413abd62cfa6b120616a14f9
Signed-off-by: Hoa Nguyen
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33255
Reviewed-by: Bobby R. Bruce
Reviewed-by: Jason Lowe-Power
Maintainer: Bobby R. Bruce
Tested-by: kokoro
---
M src/base/trace.hh
1 file changed, 23 insertions(+), 9 deletions(-)
Approvals:
Jason Lowe-Power: Looks good to me, approved
Bobby R. Bruce: Looks good to me, approved; Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/base/trace.hh b/src/base/trace.hh
index c3a499b..3d8752c 100644
--- a/src/base/trace.hh
+++ b/src/base/trace.hh
@@ -156,15 +156,27 @@
const std::string () const { return _name; }
};
-//
-// DPRINTF is a debugging trace facility that allows one to
-// selectively enable tracing statements. To use DPRINTF, there must
-// be a function or functor called name() that returns a const
-// std::string & in the current scope.
-//
-// If you desire that the automatic printing not occur, use DPRINTFR
-// (R for raw)
-//
+/**
+ * DPRINTF is a debugging trace facility that allows one to
+ * selectively enable tracing statements. To use DPRINTF, there must
+ * be a function or functor called name() that returns a const
+ * std::string & in the current scope.
+ *
+ * If you desire that the automatic printing not occur, use DPRINTFR
+ * (R for raw)
+ *
+ * \def DDUMP(x, data, count)
+ * \def DPRINTF(x, ...)
+ * \def DPRINTFS(x, s, ...)
+ * \def DPRINTFR(x, ...)
+ * \def DDUMPN(data, count)
+ * \def DPRINTFN(...)
+ * \def DPRINTFNR(...)
+ * \def DPRINTF_UNCONDITIONAL(x, ...)
+ *
+ * @ingroup api_trace
+ * @{
+ */
#if TRACING_ON
@@ -229,4 +241,6 @@
#endif // TRACING_ON
+/** @} */ // end of api_trace
+
#endif // __BASE_TRACE_HH__
--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/33255
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Gerrit-Branch: develop
Gerrit-Change-Id: Ia2ad759b9bee4fd3413abd62cfa6b120616a14f9
Gerrit-Change-Number: 33255
Gerrit-PatchSet: 5
Gerrit-Owner: Hoa Nguyen
Gerrit-Reviewer: Bobby R. Bruce
Gerrit-Reviewer: Hoa Nguyen
Gerrit-Reviewer: Jason Lowe-Power
Gerrit-Reviewer: kokoro
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: base: Tag API methods in pollevent.hh
Hoa Nguyen has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/33114 )
Change subject: base: Tag API methods in pollevent.hh
..
base: Tag API methods in pollevent.hh
Change-Id: Ic2eb596c873fc4917cf650c2e240310b1e025fa5
Signed-off-by: Hoa Nguyen
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33114
Reviewed-by: Bobby R. Bruce
Reviewed-by: Jason Lowe-Power
Maintainer: Bobby R. Bruce
Tested-by: kokoro
---
M src/base/pollevent.hh
1 file changed, 23 insertions(+), 0 deletions(-)
Approvals:
Jason Lowe-Power: Looks good to me, approved
Bobby R. Bruce: Looks good to me, approved; Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/base/pollevent.hh b/src/base/pollevent.hh
index 67dca68..28e16a6 100644
--- a/src/base/pollevent.hh
+++ b/src/base/pollevent.hh
@@ -49,13 +49,24 @@
bool enabled;
public:
+/**
+ * @ingroup api_poll_event
+ */
PollEvent(int fd, int event);
virtual ~PollEvent();
+/**
+ * @ingroup api_poll_event
+ * @{
+ */
void disable();
void enable();
virtual void process(int revent) = 0;
+/** @} */ // end of api_poll_event
+/**
+ * @ingroup api_poll_event
+ */
bool queued() { return queue != 0; }
void serialize(CheckpointOut ) const override;
@@ -73,18 +84,30 @@
int num_fds;
public:
+/**
+ * @ingroup api_poll_queue
+ */
PollQueue();
~PollQueue();
+/**
+ * @ingroup api_poll_queue
+ * @{
+ */
void copy();
void remove(PollEvent *event);
void schedule(PollEvent *event);
void service();
+/** @} */ // end of api_poll_queue
+
public:
static void setupAsyncIO(int fd, bool set);
};
+/**
+ * @ingroup api_poll_queue
+ */
extern PollQueue pollQueue;
#endif // __POLLEVENT_H__
--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/33114
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Gerrit-Branch: develop
Gerrit-Change-Id: Ic2eb596c873fc4917cf650c2e240310b1e025fa5
Gerrit-Change-Number: 33114
Gerrit-PatchSet: 4
Gerrit-Owner: Hoa Nguyen
Gerrit-Reviewer: Bobby R. Bruce
Gerrit-Reviewer: Hoa Nguyen
Gerrit-Reviewer: Jason Lowe-Power
Gerrit-Reviewer: Jason Lowe-Power
Gerrit-Reviewer: kokoro
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: base: Tag API methods in stl_helpers.hh
Hoa Nguyen has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/33118 )
Change subject: base: Tag API methods in stl_helpers.hh
..
base: Tag API methods in stl_helpers.hh
Change-Id: Ibc967febfd29444214094883121a66600d80cad8
Signed-off-by: Hoa Nguyen
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33118
Reviewed-by: Bobby R. Bruce
Reviewed-by: Jason Lowe-Power
Maintainer: Bobby R. Bruce
Tested-by: kokoro
---
M src/base/stl_helpers.hh
1 file changed, 12 insertions(+), 2 deletions(-)
Approvals:
Jason Lowe-Power: Looks good to me, approved
Bobby R. Bruce: Looks good to me, approved; Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/base/stl_helpers.hh b/src/base/stl_helpers.hh
index ef4f9ac..ae369b5 100644
--- a/src/base/stl_helpers.hh
+++ b/src/base/stl_helpers.hh
@@ -43,10 +43,16 @@
bool first;
public:
+/**
+ * @ingroup api_base_utils
+ */
ContainerPrint(std::ostream )
: out(out), first(true)
{}
+/**
+ * @ingroup api_base_utils
+ */
void
operator()(const T )
{
@@ -60,8 +66,12 @@
}
};
-// Write out all elements in an stl container as a space separated
-// list enclosed in square brackets
+/**
+ * Write out all elements in an stl container as a space separated
+ * list enclosed in square brackets
+ *
+ * @ingroup api_base_utils
+ */
template class C, typename T, typename
A>
std::ostream &
operator<<(std::ostream& out, const C )
--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/33118
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Ibc967febfd29444214094883121a66600d80cad8
Gerrit-Change-Number: 33118
Gerrit-PatchSet: 3
Gerrit-Owner: Hoa Nguyen
Gerrit-Reviewer: Bobby R. Bruce
Gerrit-Reviewer: Ciro Santilli
Gerrit-Reviewer: Hoa Nguyen
Gerrit-Reviewer: Jason Lowe-Power
Gerrit-Reviewer: kokoro
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: base: Tag API methods and variables in addr_range.hh
Hoa Nguyen has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/32955 )
Change subject: base: Tag API methods and variables in addr_range.hh
..
base: Tag API methods and variables in addr_range.hh
Change-Id: I4bff99ecf1e0eeab4a76574e99163303f7dec83b
Signed-off-by: Hoa Nguyen
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/32955
Maintainer: Bobby R. Bruce
Tested-by: kokoro
Reviewed-by: Jason Lowe-Power
Reviewed-by: Bobby R. Bruce
---
M src/base/addr_range.hh
1 file changed, 58 insertions(+), 0 deletions(-)
Approvals:
Jason Lowe-Power: Looks good to me, but someone else must approve
Bobby R. Bruce: Looks good to me, approved; Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/base/addr_range.hh b/src/base/addr_range.hh
index 42427d2..e333b32 100644
--- a/src/base/addr_range.hh
+++ b/src/base/addr_range.hh
@@ -88,6 +88,9 @@
public:
+/**
+ * @ingroup api_addr_range
+ */
AddrRange()
: _start(1), _end(0), intlvMatch(0)
{}
@@ -119,6 +122,8 @@
* @param _end The end address of this range (not included in the
range)
* @param _masks The input vector of masks
* @param intlv_match The matching value of the xor operations
+ *
+ * @ingroup api_addr_range
*/
AddrRange(Addr _start, Addr _end, const std::vector &_masks,
uint8_t _intlv_match)
@@ -154,6 +159,8 @@
* @param _xor_high_bit The MSB of the xor bit (disabled if 0)
* @param _intlv_bits the size, in bits, of the intlv and xor bits
* @param intlv_match The matching value of the xor operations
+ *
+ * @ingroup api_addr_range
*/
AddrRange(Addr _start, Addr _end, uint8_t _intlv_high_bit,
uint8_t _xor_high_bit, uint8_t _intlv_bits,
@@ -202,6 +209,8 @@
* ranges.
*
* @param ranges Interleaved ranges to be merged
+ *
+ * @ingroup api_addr_range
*/
AddrRange(const std::vector& ranges)
: _start(1), _end(0), intlvMatch(0)
@@ -242,6 +251,8 @@
* Determine if the range is interleaved or not.
*
* @return true if interleaved
+ *
+ * @ingroup api_addr_range
*/
bool interleaved() const { return masks.size() > 0; }
@@ -249,6 +260,8 @@
* Determing the interleaving granularity of the range.
*
* @return The size of the regions created by the interleaving bits
+ *
+ * @ingroup api_addr_range
*/
uint64_t granularity() const
{
@@ -269,6 +282,8 @@
* is part of.
*
* @return The number of stripes spanned by the interleaving bits
+ *
+ * @ingroup api_addr_range
*/
uint32_t stripes() const { return ULL(1) << masks.size(); }
@@ -276,6 +291,8 @@
* Get the size of the address range. For a case where
* interleaving is used we make the simplifying assumption that
* the size is a divisible by the size of the interleaving slice.
+ *
+ * @ingroup api_addr_range
*/
Addr size() const
{
@@ -284,16 +301,22 @@
/**
* Determine if the range is valid.
+ *
+ * @ingroup api_addr_range
*/
bool valid() const { return _start <= _end; }
/**
* Get the start address of the range.
+ *
+ * @ingroup api_addr_range
*/
Addr start() const { return _start; }
/**
* Get the end address of the range.
+ *
+ * @ingroup api_addr_range
*/
Addr end() const { return _end; }
@@ -301,6 +324,8 @@
* Get a string representation of the range. This could
* alternatively be implemented as a operator<<, but at the moment
* that seems like overkill.
+ *
+ * @ingroup api_addr_range
*/
std::string to_string() const
{
@@ -329,6 +354,8 @@
*
* @param r Range to evaluate merging with
* @return true if the two ranges would merge
+ *
+ * @ingroup api_addr_range
*/
bool mergesWith(const AddrRange& r) const
{
@@ -343,6 +370,8 @@
*
* @param r Range to intersect with
* @return true if the intersection of the two ranges is not empty
+ *
+ * @ingroup api_addr_range
*/
bool intersects(const AddrRange& r) const
{
@@ -375,6 +404,8 @@
*
* @param r Range to compare with
* @return true if the this range is a subset of the other one
+ *
+ * @ingroup api_addr_range
*/
bool isSubset(const AddrRange& r) const
{
@@ -398,6 +429,8 @@
*
* @param a Address to compare with
* @return true if the address is in the range
+ *
+ * @ingroup api_addr_range
*/
bool contains(const Addr& a) const
{
@@ -441,6 +474,8 @@
*
* @param a the input address
* @return the new address
+ *
+ * @ingroup api_addr_range
*/
inline Addr removeIntlvBits(Addr a) const
{
[gem5-dev] Change in gem5/gem5[develop]: base: Tag API methods and variables in callback.hh
Hoa Nguyen has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/32959 )
Change subject: base: Tag API methods and variables in callback.hh
..
base: Tag API methods and variables in callback.hh
Change-Id: I4ff6d9914e6edb4e8e7b033aec4b26482e950cc0
Signed-off-by: Hoa Nguyen
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/32959
Reviewed-by: Bobby R. Bruce
Reviewed-by: Jason Lowe-Power
Maintainer: Bobby R. Bruce
Tested-by: kokoro
---
M src/base/callback.hh
1 file changed, 3 insertions(+), 0 deletions(-)
Approvals:
Jason Lowe-Power: Looks good to me, approved
Bobby R. Bruce: Looks good to me, approved; Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/base/callback.hh b/src/base/callback.hh
index 1591f18..bedbba3 100644
--- a/src/base/callback.hh
+++ b/src/base/callback.hh
@@ -39,6 +39,9 @@
using Base::Base;
+/**
+ * @ingroup api_callback
+ */
void
process()
{
--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/32959
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I4ff6d9914e6edb4e8e7b033aec4b26482e950cc0
Gerrit-Change-Number: 32959
Gerrit-PatchSet: 5
Gerrit-Owner: Hoa Nguyen
Gerrit-Reviewer: Bobby R. Bruce
Gerrit-Reviewer: Hoa Nguyen
Gerrit-Reviewer: Jason Lowe-Power
Gerrit-Reviewer: kokoro
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: base: Tag API methods and variables in bitunion.hh
Hoa Nguyen has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/32958 )
Change subject: base: Tag API methods and variables in bitunion.hh
..
base: Tag API methods and variables in bitunion.hh
Change-Id: I322645801e9832014f54d4ed633796b082b06c6b
Signed-off-by: Hoa Nguyen
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/32958
Reviewed-by: Gabe Black
Maintainer: Gabe Black
Tested-by: kokoro
---
M src/base/bitunion.hh
1 file changed, 52 insertions(+), 17 deletions(-)
Approvals:
Gabe Black: Looks good to me, approved; Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/base/bitunion.hh b/src/base/bitunion.hh
index 7af053e..bf183ae 100644
--- a/src/base/bitunion.hh
+++ b/src/base/bitunion.hh
@@ -121,6 +121,7 @@
BitfieldType(const BitfieldType &) = default;
operator Type () const { return Impl::operator Type(); }
+
Type operator=(const Type val) { return Impl::operator=(val); }
Type
operator=(BitfieldType const & other)
@@ -321,10 +322,14 @@
union { \
type __storage;
-//This closes off the class and union started by the above macro. It is
-//followed by a typedef which makes "name" refer to a BitfieldOperator
-//class inheriting from the class and union just defined, which completes
-//building up the type for the user.
+/**
+ * This closes off the class and union started by the above macro. It is
+ * followed by a typedef which makes "name" refer to a BitfieldOperator
+ * class inheriting from the class and union just defined, which completes
+ * building up the type for the user.
+ *
+ * @ingroup api_bitunion
+ */
#define EndBitUnion(name) \
}; \
}; \
@@ -343,11 +348,15 @@
union { \
fieldType<__VA_ARGS__> __storage;
-//This closes off the union created above and gives it a name. Unlike the
top
-//level BitUnion, we're interested in creating an object instead of a type.
-//The operators are defined in the macro itself instead of a class for
-//technical reasons. If someone determines a way to move them to one,
please
-//do so.
+/**
+ * This closes off the union created above and gives it a name. Unlike the
top
+ * level BitUnion, we're interested in creating an object instead of a
type.
+ * The operators are defined in the macro itself instead of a class for
+ * technical reasons. If someone determines a way to move them to one,
please
+ * do so.
+ *
+ * @ingroup api_bitunion
+ */
#define EndSubBitUnion(name) \
}; \
inline operator __StorageType () const \
@@ -357,20 +366,36 @@
{ return __storage = _storage;} \
} name;
-//Regular bitfields
-//These define macros for read/write regular bitfield based subbitfields.
+/**
+ * Regular bitfields
+ * These define macros for read/write regular bitfield based subbitfields.
+ *
+ * @ingroup api_bitunion
+ */
#define SubBitUnion(name, first, last) \
__SubBitUnion(name, Bitfield, first, last)
-//Regular bitfields
-//These define macros for read/write regular bitfield based subbitfields.
+/**
+ * Regular bitfields
+ * These define macros for read/write regular bitfield based subbitfields.
+ *
+ * @ingroup api_bitunion
+ */
#define SignedSubBitUnion(name, first, last) \
__SubBitUnion(name, SignedBitfield, first, last)
-//Use this to define an arbitrary type overlayed with bitfields.
+/**
+ * Use this to define an arbitrary type overlayed with bitfields.
+ *
+ * @ingroup api_bitunion
+ */
#define BitUnion(type, name) __BitUnion(type, name)
-//Use this to define conveniently sized values overlayed with bitfields.
+/**
+ * Use this to define conveniently sized values overlayed with bitfields.
+ *
+ * @ingroup api_bitunion
+ */
#define BitUnion64(name) __BitUnion(uint64_t, name)
#define BitUnion32(name) __BitUnion(uint32_t, name)
#define BitUnion16(name) __BitUnion(uint16_t, name)
@@ -392,6 +417,9 @@
//Also, BitUnionBaseType can be used on a BitUnion type directly.
+/**
+ * @ingroup api_bitunion
+ */
template
using BitUnionType = BitfieldBackend::BitUnionOperators;
@@ -410,6 +438,9 @@
};
}
+/**
+ * @ingroup api_bitunion
+ */
template
using BitUnionBaseType = typename
BitfieldBackend::BitUnionBaseType::Type;
@@ -460,8 +491,12 @@
}
}
-//A default << operator which casts a bitunion to its underlying type and
-//passes it to BitfieldBackend::bitfieldBackendPrinter.
+/**
+ * A default << operator which casts a bitunion to its underlying type and
+ * passes it to BitfieldBackend::bitfieldBackendPrinter.
+ *
+ * @ingroup api_bitunion
+ */
template
std::ostream &
operator << (std::ostream , const BitUnionType )
--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/32958
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[gem5-dev] Change in gem5/gem5[develop]: base: Tag API methods in socket.hh
Hoa Nguyen has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/33078 )
Change subject: base: Tag API methods in socket.hh
..
base: Tag API methods in socket.hh
Change-Id: Ifdbe1d9367df602e45fa3d39c91de9e0f8f1d87e
Signed-off-by: Hoa Nguyen
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33078
Reviewed-by: Jason Lowe-Power
Maintainer: Jason Lowe-Power
Tested-by: kokoro
---
M src/base/socket.hh
1 file changed, 10 insertions(+), 0 deletions(-)
Approvals:
Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/base/socket.hh b/src/base/socket.hh
index 74a379b..4b42674 100644
--- a/src/base/socket.hh
+++ b/src/base/socket.hh
@@ -32,6 +32,10 @@
class ListenSocket
{
protected:
+/**
+ * The following variables are only used by socket unit tests:
+ * listeningDisabled, anyListening, bindToLoopback.
+ */
static bool listeningDisabled;
static bool anyListening;
@@ -54,14 +58,20 @@
public:
+/**
+ * @ingroup api_socket
+ * @{
+ */
ListenSocket();
virtual ~ListenSocket();
virtual int accept(bool nodelay = false);
+
virtual bool listen(int port, bool reuse = true);
int getfd() const { return fd; }
bool islistening() const { return listening; }
+/** @} */ // end of api_socket
};
#endif //__SOCKET_HH__
--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/33078
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Ifdbe1d9367df602e45fa3d39c91de9e0f8f1d87e
Gerrit-Change-Number: 33078
Gerrit-PatchSet: 4
Gerrit-Owner: Hoa Nguyen
Gerrit-Reviewer: Bobby R. Bruce
Gerrit-Reviewer: Gabe Black
Gerrit-Reviewer: Hoa Nguyen
Gerrit-Reviewer: Jason Lowe-Power
Gerrit-Reviewer: kokoro
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: base: Tag API methods and variables in trie.hh
Hoa Nguyen has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/33080 )
Change subject: base: Tag API methods and variables in trie.hh
..
base: Tag API methods and variables in trie.hh
Change-Id: I4492dbb997a3ece5cb2675b45bf37d7512449ab6
Signed-off-by: Hoa Nguyen
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33080
Reviewed-by: Daniel Carvalho
Maintainer: Bobby R. Bruce
Tested-by: kokoro
---
M src/base/trie.hh
1 file changed, 21 insertions(+), 0 deletions(-)
Approvals:
Daniel Carvalho: Looks good to me, approved
Bobby R. Bruce: Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/base/trie.hh b/src/base/trie.hh
index 71a14c5..9722c24 100644
--- a/src/base/trie.hh
+++ b/src/base/trie.hh
@@ -44,6 +44,8 @@
*
* @tparam Key Type of the key of the tree nodes. Must be an integral type.
* @tparam Value Type of the values associated to the keys.
+ *
+ * @ingroup api_base_utils
*/
template
class Trie
@@ -114,11 +116,20 @@
Node head;
public:
+/**
+ * @ingroup api_base_utils
+ */
typedef Node *Handle;
+/**
+ * @ingroup api_base_utils
+ */
Trie() : head(0, 0, NULL)
{}
+/**
+ * @ingroup api_base_utils
+ */
static const unsigned MaxBits = sizeof(Key) * 8;
private:
@@ -192,6 +203,8 @@
* @param width How many bits of the key (from msb) should be used.
* @param val A pointer to the value to store in the trie.
* @return A Handle corresponding to this value.
+ *
+ * @ingroup api_base_utils
*/
Handle
insert(Key key, unsigned width, Value *val)
@@ -278,6 +291,8 @@
* Method which looks up the Value corresponding to a particular key.
* @param key The key to look up.
* @return The first Value matching this key, or NULL if none was
found.
+ *
+ * @ingroup api_base_utils
*/
Value *
lookup(Key key)
@@ -293,6 +308,8 @@
* Method to delete a value from the trie.
* @param node A Handle to remove.
* @return The Value pointer from the removed entry.
+ *
+ * @ingroup api_base_utils
*/
Value *
remove(Handle handle)
@@ -337,6 +354,8 @@
* Method to lookup a value from the trie and then delete it.
* @param key The key to look up and then remove.
* @return The Value pointer from the removed entry, if any.
+ *
+ * @ingroup api_base_utils
*/
Value *
remove(Key key)
@@ -350,6 +369,8 @@
/**
* A method which removes all key/value pairs from the trie. This is
more
* efficient than trying to remove elements individually.
+ *
+ * @ingroup api_base_utils
*/
void
clear()
--
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Gerrit-Change-Id: I4492dbb997a3ece5cb2675b45bf37d7512449ab6
Gerrit-Change-Number: 33080
Gerrit-PatchSet: 4
Gerrit-Owner: Hoa Nguyen
Gerrit-Reviewer: Bobby R. Bruce
Gerrit-Reviewer: Daniel Carvalho
Gerrit-Reviewer: Gabe Black
Gerrit-Reviewer: Hoa Nguyen
Gerrit-Reviewer: kokoro
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: base: Tag API methods and variables in addr_range_map.hh
Hoa Nguyen has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/32956 )
Change subject: base: Tag API methods and variables in addr_range_map.hh
..
base: Tag API methods and variables in addr_range_map.hh
Change-Id: I9dc630e7c0d0826a20f032879346da6327b38a2d
Signed-off-by: Hoa Nguyen
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/32956
Reviewed-by: Bobby R. Bruce
Reviewed-by: Jason Lowe-Power
Maintainer: Bobby R. Bruce
Tested-by: kokoro
---
M src/base/addr_range_map.hh
1 file changed, 47 insertions(+), 0 deletions(-)
Approvals:
Jason Lowe-Power: Looks good to me, approved
Bobby R. Bruce: Looks good to me, approved; Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/base/addr_range_map.hh b/src/base/addr_range_map.hh
index d9a0981..57784b4 100644
--- a/src/base/addr_range_map.hh
+++ b/src/base/addr_range_map.hh
@@ -62,8 +62,13 @@
typedef std::map RangeMap;
public:
+/**
+ * @ingroup api_addr_range
+ * @{
+ */
typedef typename RangeMap::iterator iterator;
typedef typename RangeMap::const_iterator const_iterator;
+/** @} */ // end of api_addr_range
/**
* Find entry that contains the given address range
@@ -74,6 +79,9 @@
*
* @param r An input address range
* @return An iterator that contains the input address range
+ *
+ * @ingroup api_addr_range
+ * @{
*/
const_iterator
contains(const AddrRange ) const
@@ -85,6 +93,7 @@
{
return find(r, [r](const AddrRange r1) { return r.isSubset(r1); });
}
+/** @} */ // end of api_addr_range
/**
* Find entry that contains the given address
@@ -95,6 +104,9 @@
*
* @param r An input address
* @return An iterator that contains the input address
+ *
+ * @ingroup api_addr_range
+ * @{
*/
const_iterator
contains(Addr r) const
@@ -106,6 +118,7 @@
{
return contains(RangeSize(r, 1));
}
+/** @} */ // end of api_addr_range
/**
* Find entry that intersects with the given address range
@@ -116,6 +129,9 @@
*
* @param r An input address
* @return An iterator that intersects with the input address range
+ *
+ * @ingroup api_addr_range
+ * @{
*/
const_iterator
intersects(const AddrRange ) const
@@ -127,7 +143,11 @@
{
return find(r, [r](const AddrRange r1) { return r.intersects(r1);
});
}
+/** @} */ // end of api_addr_range
+/**
+ * @ingroup api_addr_range
+ */
iterator
insert(const AddrRange , const V& d)
{
@@ -137,6 +157,9 @@
return tree.insert(std::make_pair(r, d)).first;
}
+/**
+ * @ingroup api_addr_range
+ */
void
erase(iterator p)
{
@@ -144,6 +167,9 @@
tree.erase(p);
}
+/**
+ * @ingroup api_addr_range
+ */
void
erase(iterator p, iterator q)
{
@@ -153,6 +179,9 @@
tree.erase(p,q);
}
+/**
+ * @ingroup api_addr_range
+ */
void
clear()
{
@@ -160,36 +189,54 @@
tree.erase(tree.begin(), tree.end());
}
+/**
+ * @ingroup api_addr_range
+ */
const_iterator
begin() const
{
return tree.begin();
}
+/**
+ * @ingroup api_addr_range
+ */
iterator
begin()
{
return tree.begin();
}
+/**
+ * @ingroup api_addr_range
+ */
const_iterator
end() const
{
return tree.end();
}
+/**
+ * @ingroup api_addr_range
+ */
iterator
end()
{
return tree.end();
}
+/**
+ * @ingroup api_addr_range
+ */
std::size_t
size() const
{
return tree.size();
}
+/**
+ * @ingroup api_addr_range
+ */
bool
empty() const
{
--
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Gerrit-Change-Id: I9dc630e7c0d0826a20f032879346da6327b38a2d
Gerrit-Change-Number: 32956
Gerrit-PatchSet: 3
Gerrit-Owner: Hoa Nguyen
Gerrit-Reviewer: Bobby R. Bruce
Gerrit-Reviewer: Ciro Santilli
Gerrit-Reviewer: Gabe Black
Gerrit-Reviewer: Hoa Nguyen
Gerrit-Reviewer: Jason Lowe-Power
Gerrit-Reviewer: kokoro
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: base: Tag API methods and variables in channel_addr.hh
Hoa Nguyen has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/32960 )
Change subject: base: Tag API methods and variables in channel_addr.hh
..
base: Tag API methods and variables in channel_addr.hh
Change-Id: I91c806e88f035457f93dcfcee1833d6955a07807
Signed-off-by: Hoa Nguyen
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/32960
Reviewed-by: Bobby R. Bruce
Reviewed-by: Jason Lowe-Power
Maintainer: Bobby R. Bruce
Tested-by: kokoro
---
M src/base/channel_addr.hh
1 file changed, 17 insertions(+), 1 deletion(-)
Approvals:
Jason Lowe-Power: Looks good to me, approved
Bobby R. Bruce: Looks good to me, approved; Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/base/channel_addr.hh b/src/base/channel_addr.hh
index 06fae72..2cfe380 100644
--- a/src/base/channel_addr.hh
+++ b/src/base/channel_addr.hh
@@ -51,7 +51,12 @@
public:
using Type = Addr;
-/** Explicit constructor assigning a value. */
+/**
+ * Explicit constructor assigning a value.
+ *
+ * @ingroup api_channel_addr
+ * @{
+ */
explicit constexpr ChannelAddr(Type _a) : a(_a) { }
/** Converting back to the value type. */
@@ -131,6 +136,8 @@
constexpr bool operator==(const ChannelAddr ) const { return a ==
b.a; }
constexpr bool operator!=(const ChannelAddr ) const { return a !=
b.a; }
+/** @} */ // end of api_channel_addr
+
private:
/** Member holding the actual value. */
Type a;
@@ -143,6 +150,10 @@
class ChannelAddrRange
{
public:
+/**
+ * @ingroup api_channel_addr
+ * @{
+ */
constexpr ChannelAddrRange()
: ChannelAddrRange(ChannelAddr(1), ChannelAddr(0)) {}
@@ -165,6 +176,8 @@
return a >= _start && a <= _end;
}
+/** @} */ // end of api_channel_addr
+
protected:
ChannelAddr _start;
ChannelAddr _end;
@@ -186,6 +199,9 @@
};
}
+/**
+ * @ingroup api_channel_addr
+ */
std::ostream <<(std::ostream , const ChannelAddr );
#endif // __BASE_CHANNEL_ADDR_HH__
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I91c806e88f035457f93dcfcee1833d6955a07807
Gerrit-Change-Number: 32960
Gerrit-PatchSet: 5
Gerrit-Owner: Hoa Nguyen
Gerrit-Reviewer: Bobby R. Bruce
Gerrit-Reviewer: Hoa Nguyen
Gerrit-Reviewer: Jason Lowe-Power
Gerrit-Reviewer: kokoro
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: base: Tag API methods in amo.hh
Hoa Nguyen has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/33274 )
Change subject: base: Tag API methods in amo.hh
..
base: Tag API methods in amo.hh
Change-Id: I8014d729611721dd15ee27a974acbab2744c5e82
Signed-off-by: Hoa Nguyen
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33274
Reviewed-by: Bobby R. Bruce
Reviewed-by: Jason Lowe-Power
Maintainer: Bobby R. Bruce
Tested-by: kokoro
---
M src/base/amo.hh
1 file changed, 11 insertions(+), 0 deletions(-)
Approvals:
Jason Lowe-Power: Looks good to me, but someone else must approve
Bobby R. Bruce: Looks good to me, approved; Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/base/amo.hh b/src/base/amo.hh
index 44dec8b..23be57d 100644
--- a/src/base/amo.hh
+++ b/src/base/amo.hh
@@ -39,8 +39,13 @@
struct AtomicOpFunctor
{
+/**
+ * @ingroup api_atomic_op
+ * @{
+ */
virtual void operator()(uint8_t *p) = 0;
virtual AtomicOpFunctor* clone() = 0;
+/** @} */ // end of api_atomic_op
virtual ~AtomicOpFunctor() {}
};
@@ -49,6 +54,9 @@
{
void operator()(uint8_t *p) { execute((T *)p); }
virtual AtomicOpFunctor* clone() = 0;
+/**
+ * @ingroup api_atomic_op
+ */
virtual void execute(T * p) = 0;
};
@@ -225,6 +233,9 @@
AtomicOpFunctor* clone () { return new AtomicOpMin(a); }
};
+/**
+ * @ingroup api_atomic_op
+ */
typedef std::unique_ptr AtomicOpFunctorPtr;
#endif // __BASE_AMO_HH__
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I8014d729611721dd15ee27a974acbab2744c5e82
Gerrit-Change-Number: 33274
Gerrit-PatchSet: 2
Gerrit-Owner: Hoa Nguyen
Gerrit-Reviewer: Bobby R. Bruce
Gerrit-Reviewer: Giacomo Travaglini
Gerrit-Reviewer: Hoa Nguyen
Gerrit-Reviewer: Jason Lowe-Power
Gerrit-Reviewer: Matthew Poremba
Gerrit-Reviewer: kokoro
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: base: Tag API methods and variables in random.hh
Hoa Nguyen has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/33115 )
Change subject: base: Tag API methods and variables in random.hh
..
base: Tag API methods and variables in random.hh
Change-Id: I75f8843ee696055f156aa0d9e035094d8206f4b9
Signed-off-by: Hoa Nguyen
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33115
Reviewed-by: Bobby R. Bruce
Reviewed-by: Jason Lowe-Power
Maintainer: Bobby R. Bruce
Tested-by: kokoro
---
M src/base/random.hh
1 file changed, 16 insertions(+), 1 deletion(-)
Approvals:
Jason Lowe-Power: Looks good to me, approved
Bobby R. Bruce: Looks good to me, approved; Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/base/random.hh b/src/base/random.hh
index cc13446..f161d71 100644
--- a/src/base/random.hh
+++ b/src/base/random.hh
@@ -64,8 +64,13 @@
public:
+/**
+ * @ingroup api_base_utils
+ * @{
+ */
Random();
Random(uint32_t s);
+/** @} */ // end of api_base_utils
~Random();
void init(uint32_t s);
@@ -73,6 +78,8 @@
/**
* Use the SFINAE idiom to choose an implementation based on
* whether the type is integral or floating point.
+ *
+ * @ingroup api_base_utils
*/
template
typename std::enable_if::value, T>::type
@@ -83,6 +90,9 @@
return dist(gen);
}
+/**
+ * @ingroup api_base_utils
+ */
template
typename std::enable_if::value, T>::type
random()
@@ -91,7 +101,9 @@
std::uniform_real_distribution dist;
return dist(gen);
}
-
+/**
+ * @ingroup api_base_utils
+ */
template
typename std::enable_if::value, T>::type
random(T min, T max)
@@ -104,6 +116,9 @@
void unserialize(CheckpointIn ) override;
};
+/**
+ * @ingroup api_base_utils
+ */
extern Random random_mt;
#endif // __BASE_RANDOM_HH__
--
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Gerrit-Branch: develop
Gerrit-Change-Id: I75f8843ee696055f156aa0d9e035094d8206f4b9
Gerrit-Change-Number: 33115
Gerrit-PatchSet: 3
Gerrit-Owner: Hoa Nguyen
Gerrit-Reviewer: Bobby R. Bruce
Gerrit-Reviewer: Hoa Nguyen
Gerrit-Reviewer: Jason Lowe-Power
Gerrit-Reviewer: kokoro
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: base: Tag API methods and variables in chunk_generator.hh
Hoa Nguyen has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/32935 )
Change subject: base: Tag API methods and variables in chunk_generator.hh
..
base: Tag API methods and variables in chunk_generator.hh
Change-Id: I8dbcef360ec1c5539fc415781729fcb86112fdbc
Signed-off-by: Hoa Nguyen
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/32935
Reviewed-by: Jason Lowe-Power
Maintainer: Bobby R. Bruce
Tested-by: kokoro
---
M src/base/chunk_generator.hh
1 file changed, 23 insertions(+), 3 deletions(-)
Approvals:
Jason Lowe-Power: Looks good to me, approved
Bobby R. Bruce: Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/base/chunk_generator.hh b/src/base/chunk_generator.hh
index d1378aa..994d83a 100644
--- a/src/base/chunk_generator.hh
+++ b/src/base/chunk_generator.hh
@@ -75,6 +75,8 @@
* @param totalSize The total size of the region.
* @param _chunkSize The size/alignment of chunks into which
*the region should be decomposed.
+ *
+ * @ingroup api_chunk_generator
*/
ChunkGenerator(Addr _startAddr, unsigned totalSize, unsigned
_chunkSize)
: startAddr(_startAddr), chunkSize(_chunkSize)
@@ -105,24 +107,40 @@
sizeLeft = totalSize - curSize;
}
-/** Return starting address of current chunk. */
+/**
+ * Return starting address of current chunk.
+ *
+ * @ingroup api_chunk_generator
+ */
Addr addr() const { return curAddr; }
-/** Return size in bytes of current chunk. */
+/**
+ * Return size in bytes of current chunk.
+ *
+ * @ingroup api_chunk_generator
+ */
unsigned size() const { return curSize; }
-/** Number of bytes we have already chunked up. */
+/**
+ * Number of bytes we have already chunked up.
+ *
+ * @ingroup api_chunk_generator
+ */
unsigned complete() const { return curAddr - startAddr; }
/**
* Are we done? That is, did the last call to next() advance
* past the end of the region?
* @return True if yes, false if more to go.
+ *
+ * @ingroup api_chunk_generator
*/
bool done() const { return (curSize == 0); }
/**
* Is this the last chunk?
* @return True if yes, false if more to go.
+ *
+ * @ingroup api_chunk_generator
*/
bool last() const { return (sizeLeft == 0); }
@@ -130,6 +148,8 @@
* Advance generator to next chunk.
* @return True if successful, false if unsuccessful
* (because we were at the last chunk).
+ *
+ * @ingroup api_chunk_generator
*/
bool
next()
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I8dbcef360ec1c5539fc415781729fcb86112fdbc
Gerrit-Change-Number: 32935
Gerrit-PatchSet: 2
Gerrit-Owner: Hoa Nguyen
Gerrit-Reviewer: Bobby R. Bruce
Gerrit-Reviewer: Hoa Nguyen
Gerrit-Reviewer: Jason Lowe-Power
Gerrit-Reviewer: kokoro
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: base: Tag API methods and variables to circular_queue.hh
Hoa Nguyen has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/32962 )
Change subject: base: Tag API methods and variables to circular_queue.hh
..
base: Tag API methods and variables to circular_queue.hh
Change-Id: I0e6a89a3e3d14a6d269277e1ffeea1ed49d8e1e4
Signed-off-by: Hoa Nguyen
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/32962
Reviewed-by: Daniel Carvalho
Maintainer: Bobby R. Bruce
Tested-by: kokoro
---
M src/base/circular_queue.hh
1 file changed, 202 insertions(+), 27 deletions(-)
Approvals:
Daniel Carvalho: Looks good to me, approved
Bobby R. Bruce: Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/base/circular_queue.hh b/src/base/circular_queue.hh
index b2d4cb5..e7c8f62 100644
--- a/src/base/circular_queue.hh
+++ b/src/base/circular_queue.hh
@@ -77,6 +77,10 @@
*
* The Round number is only relevant for checking validity of indices,
* therefore it will be omitted or shown as '_'
+ *
+ * @tparam T Type of the elements in the queue
+ *
+ * @ingroup api_base_utils
*/
template
class CircularQueue : private std::vector
@@ -154,10 +158,18 @@
uint32_t _round;
public:
+/**
+ * @ingroup api_base_utils
+ */
iterator(CircularQueue* cq, uint32_t idx, uint32_t round)
: _cq(cq), _idx(idx), _round(round) {}
-/** Iterator Traits */
+/**
+ * Iterator Traits
+ *
+ * @ingroup api_base_utils
+ * @{
+ */
using value_type = T;
using difference_type = std::ptrdiff_t;
using reference = value_type&;
@@ -165,6 +177,7 @@
using pointer = value_type*;
using const_pointer = const value_type*;
using iterator_category = std::random_access_iterator_tag;
+/** @} */ // end of api_base_utils
/** Trait reference type
* iterator satisfies OutputIterator, therefore reference
@@ -172,11 +185,20 @@
static_assert(std::is_same::value,
"reference type is not assignable as required");
+/**
+ * @ingroup api_base_utils
+ */
iterator() : _cq(nullptr), _idx(0), _round(0) { }
+/**
+ * @ingroup api_base_utils
+ */
iterator(const iterator& it)
: _cq(it._cq), _idx(it._idx), _round(it._round) {}
+/**
+ * @ingroup api_base_utils
+ */
iterator&
operator=(const iterator& it)
{
@@ -186,9 +208,13 @@
return *this;
}
+/**
+ * @ingroup api_base_utils
+ */
~iterator() { _cq = nullptr; _idx = 0; _round = 0; }
-/** Test dereferenceability.
+/**
+ * Test dereferenceability.
* An iterator is dereferenceable if it is pointing to a non-null
* circular queue, it is not the past-the-end iterator and the
* index is a valid index to that queue. PTE test is required to
@@ -200,6 +226,8 @@
* Sometimes, though, users will get the PTE iterator and expect it
* to work after growing the buffer on the tail, so we have to
* check if the iterator is still PTE.
+ *
+ * @ingroup api_base_utils
*/
bool
dereferenceable() const
@@ -209,11 +237,14 @@
/** InputIterator. */
-/** Equality operator.
+/**
+ * Equality operator.
* Two iterators must point to the same, possibly null, circular
* queue and the same element on it, including PTE, to be equal.
* In case the clients the the PTE iterator and then grow on the
back
* and expect it to work, we have to check if the PTE is still PTE
+ *
+ * @ingroup api_base_utils
*/
bool operator==(const iterator& that) const
{
@@ -221,42 +252,62 @@
_round == that._round;
}
-/** Inequality operator.
+/**
+ * Inequality operator.
* Conversely, two iterators are different if they both point to
* different circular queues or they point to different elements.
+ *
+ * @ingroup api_base_utils
*/
bool operator!=(const iterator& that)
{
return !(*this == that);
}
-/** Dereference operator. */
+/**
+ * Dereference operator.
+ *
+ * @ingroup api_base_utils
+ */
reference operator*()
{
/* this has to be dereferenceable. */
return (*_cq)[_idx];
}
+/**
+ * @ingroup api_base_utils
+ */
const_reference operator*() const
{
/* this has to be dereferenceable. */
return (*_cq)[_idx];
}
-/** Dereference operator.
+/**
+
[gem5-dev] Change in gem5/gem5[develop]: base: Tag API methods and variables in fiber.hh
Hoa Nguyen has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/33054 )
Change subject: base: Tag API methods and variables in fiber.hh
..
base: Tag API methods and variables in fiber.hh
Change-Id: I586183426c8c56929a4640b0a985b4ddbf48c21f
Signed-off-by: Hoa Nguyen
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33054
Reviewed-by: Gabe Black
Maintainer: Bobby R. Bruce
Tested-by: kokoro
---
M src/base/fiber.hh
1 file changed, 49 insertions(+), 17 deletions(-)
Approvals:
Gabe Black: Looks good to me, approved
Bobby R. Bruce: Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/base/fiber.hh b/src/base/fiber.hh
index 513bf0e..dc7ef01 100644
--- a/src/base/fiber.hh
+++ b/src/base/fiber.hh
@@ -62,40 +62,72 @@
class Fiber
{
public:
+/**
+ * @ingroup api_fiber
+ */
const static size_t DefaultStackSize = 0x5;
-/// stack_size is the size of the stack available to this fiber.
-/// link points to another fiber which will start executing when this
-/// fiber's main function returns.
+/**
+ * @param Link points to another fiber which will start executing when
this
+ * fiber's main function returns.
+ * @param stack_size is the size of the stack available to this fiber.
+ *
+ * @ingroup api_fiber
+ * @{
+ */
Fiber(size_t stack_size=DefaultStackSize);
Fiber(Fiber *link, size_t stack_size=DefaultStackSize);
+/** @} */ // end of api_fiber
+/**
+ * @ingroup api_fiber
+ */
virtual ~Fiber();
-/// Start executing the fiber represented by this object. This function
-/// will "return" when the current fiber is switched back to later on.
+/**
+ * Start executing the fiber represented by this object. This function
+ * will "return" when the current fiber is switched back to later on.
+ *
+ * @ingroup api_fiber
+ */
void run();
-/// Returns whether the "main" function of this fiber has finished.
-///
+/**
+ * Returns whether the "main" function of this fiber has finished.
+ *
+ * @ingroup api_fiber
+ */
bool finished() const { return _finished; };
-/// Returns whether the "main" function of this fiber has started.
-///
+/**
+ * Returns whether the "main" function of this fiber has started.
+ *
+ * @ingroup api_fiber
+ */
bool started() const { return _started; };
-/// Get a pointer to the current running Fiber.
-///
+/**
+ * Get a pointer to the current running Fiber.
+ *
+ * @ingroup api_fiber
+ */
static Fiber *currentFiber();
-/// Get a pointer to the primary Fiber.
-/// This Fiber represents the thread of execution started by the OS,
and
-/// which has a Fiber attached to it after the fact.
+
+/**
+ * Get a pointer to the primary Fiber.
+ * This Fiber represents the thread of execution started by the OS, and
+ * which has a Fiber attached to it after the fact.
+ *
+ * @ingroup api_fiber
+ */
static Fiber *primaryFiber();
protected:
-/// This method is called when this fiber is first run. Override it to
-/// give your fiber something to do. When main returns, the fiber will
-/// mark itself as finished and switch to its link fiber.
+/**
+ * This method is called when this fiber is first run. Override it to
+ * give your fiber something to do. When main returns, the fiber will
+ * mark itself as finished and switch to its link fiber.
+ */
virtual void main() = 0;
void setStarted() { _started = true; }
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I586183426c8c56929a4640b0a985b4ddbf48c21f
Gerrit-Change-Number: 33054
Gerrit-PatchSet: 3
Gerrit-Owner: Hoa Nguyen
Gerrit-Reviewer: Bobby R. Bruce
Gerrit-Reviewer: Gabe Black
Gerrit-Reviewer: Giacomo Travaglini
Gerrit-Reviewer: Hoa Nguyen
Gerrit-Reviewer: Jason Lowe-Power
Gerrit-Reviewer: kokoro
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: base: Tag API methods in coroutine.hh
Hoa Nguyen has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/32963 )
Change subject: base: Tag API methods in coroutine.hh
..
base: Tag API methods in coroutine.hh
Change-Id: Ifd0aade13b0979d8f8433577be7f019d83406e6a
Signed-off-by: Hoa Nguyen
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/32963
Maintainer: Bobby R. Bruce
Maintainer: Giacomo Travaglini
Tested-by: kokoro
Reviewed-by: Giacomo Travaglini
---
M src/base/coroutine.hh
1 file changed, 27 insertions(+), 1 deletion(-)
Approvals:
Giacomo Travaglini: Looks good to me, approved; Looks good to me, approved
Bobby R. Bruce: Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/base/coroutine.hh b/src/base/coroutine.hh
index 4ac1a65..b4c3474 100644
--- a/src/base/coroutine.hh
+++ b/src/base/coroutine.hh
@@ -93,6 +93,8 @@
*
* This method is generated only if the coroutine returns
* a value (Ret != void)
+ *
+ * @ingroup api_coroutine
*/
template
CallerType&
@@ -109,6 +111,8 @@
*
* This method is generated only if the coroutine doesn't
* return a value (Ret = void)
+ *
+ * @ingroup api_coroutine
*/
template
typename std::enable_if::value,
@@ -128,6 +132,8 @@
* from the caller.
*
* @return arg coroutine argument
+ *
+ * @ingroup api_coroutine
*/
template
typename std::enable_if::value, T>::type
@@ -149,9 +155,14 @@
RetChannel retChannel;
};
+/**
+ * @ingroup api_coroutine
+ * @{
+ */
Coroutine() = delete;
Coroutine(const Coroutine& rhs) = delete;
Coroutine& operator=(const Coroutine& rhs) = delete;
+/** @} */ // end of api_coroutine
/**
* Coroutine constructor.
@@ -167,6 +178,8 @@
* @param f task run by the coroutine
* @param run_coroutine set to false to disable running the coroutine
* immediately after it is created
+ *
+ * @ingroup api_coroutine
*/
Coroutine(std::function f, bool run_coroutine =
true)
: Fiber(), task(f), caller(*this)
@@ -176,6 +189,9 @@
this->call();
}
+/**
+ * @ingroup api_coroutine
+ */
virtual ~Coroutine() {}
public:
@@ -187,6 +203,8 @@
*
* This method is generated only if the coroutine takes
* arguments (Arg != void)
+ *
+ * @ingroup api_coroutine
*/
template
Coroutine&
@@ -203,6 +221,8 @@
*
* This method is generated only if the coroutine takes
* no arguments. (Arg = void)
+ *
+ * @ingroup api_coroutine
*/
template
typename std::enable_if::value, Coroutine>::type&
@@ -221,6 +241,8 @@
* from the coroutine.
*
* @return ret yielded value
+ *
+ * @ingroup api_coroutine
*/
template
typename std::enable_if::value, T>::type
@@ -236,7 +258,11 @@
return ret;
}
-/** Check if coroutine is still running */
+/**
+ * Check if coroutine is still running
+ *
+ * @ingroup api_coroutine
+ */
operator bool() const { return !this->finished(); }
private:
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Ifd0aade13b0979d8f8433577be7f019d83406e6a
Gerrit-Change-Number: 32963
Gerrit-PatchSet: 3
Gerrit-Owner: Hoa Nguyen
Gerrit-Reviewer: Bobby R. Bruce
Gerrit-Reviewer: Ciro Santilli
Gerrit-Reviewer: Giacomo Travaglini
Gerrit-Reviewer: Hoa Nguyen
Gerrit-Reviewer: kokoro
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: base: Tag API methods and macros in logger.hh
Hoa Nguyen has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/33076 )
Change subject: base: Tag API methods and macros in logger.hh
..
base: Tag API methods and macros in logger.hh
Change-Id: I36c4d39eb26fc3af1683ec648df91d6055be97ba
Signed-off-by: Hoa Nguyen
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33076
Reviewed-by: Andreas Sandberg
Reviewed-by: Jason Lowe-Power
Maintainer: Jason Lowe-Power
Tested-by: kokoro
---
M src/base/logging.hh
1 file changed, 49 insertions(+), 4 deletions(-)
Approvals:
Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved
Andreas Sandberg: Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/base/logging.hh b/src/base/logging.hh
index 0c4265b..7113af8 100644
--- a/src/base/logging.hh
+++ b/src/base/logging.hh
@@ -52,7 +52,9 @@
{
public:
-// Get a Logger for the specified type of message.
+/**
+ * Get a Logger for the specified type of message.
+ */
static Logger ();
static Logger ();
static Logger ();
@@ -114,9 +116,11 @@
print(loc, format.c_str(), args...);
}
-// This helper is necessary since noreturn isn't inherited by virtual
-// functions, and gcc will get mad if a function calls panic and then
-// doesn't return.
+/**
+ * This helper is necessary since noreturn isn't inherited by virtual
+ * functions, and gcc will get mad if a function calls panic and then
+ * doesn't return.
+ */
void exit_helper() M5_ATTR_NORETURN { exit(); ::abort(); }
protected:
@@ -159,6 +163,10 @@
* be called when something happens that should never ever happen
* regardless of what the user does (i.e., an acutal m5 bug). panic()
* might call abort which can dump core or enter the debugger.
+ *
+ * \def panic(...)
+ *
+ * @ingroup api_logger
*/
#define panic(...) exit_message(::Logger::getPanic(), __VA_ARGS__)
@@ -167,6 +175,10 @@
* be called when the simulation cannot continue due to some condition
* that is the user's fault (bad configuration, invalid arguments,
* etc.) and not a simulator bug. fatal() might call exit, unlike panic().
+ *
+ * \def fatal(...)
+ *
+ * @ingroup api_logger
*/
#define fatal(...) exit_message(::Logger::getFatal(), __VA_ARGS__)
@@ -177,6 +189,10 @@
*
* @param cond Condition that is checked; if true -> panic
* @param ... Printf-based format string with arguments, extends printout.
+ *
+ * \def panic_if(...)
+ *
+ * @ingroup api_logger
*/
#define panic_if(cond, ...) \
do { \
@@ -195,6 +211,10 @@
*
* @param cond Condition that is checked; if true -> fatal
* @param ... Printf-based format string with arguments, extends printout.
+ *
+ * \def fatal_if(...)
+ *
+ * @ingroup api_logger
*/
#define fatal_if(cond, ...) \
do {\
@@ -205,6 +225,17 @@
} while (0)
+/**
+ * \def warn(...)
+ * \def inform(...)
+ * \def hack(...)
+ * \def warn_once(...)
+ * \def inform_once(...)
+ * \def hack_once(...)
+ *
+ * @ingroup api_logger
+ * @{
+ */
#define warn(...) base_message(::Logger::getWarn(), __VA_ARGS__)
#define inform(...) base_message(::Logger::getInfo(), __VA_ARGS__)
#define hack(...) base_message(::Logger::getHack(), __VA_ARGS__)
@@ -212,14 +243,22 @@
#define warn_once(...) base_message_once(::Logger::getWarn(), __VA_ARGS__)
#define inform_once(...) base_message_once(::Logger::getInfo(),
__VA_ARGS__)
#define hack_once(...) base_message_once(::Logger::getHack(), __VA_ARGS__)
+/** @} */ // end of api_logger
/**
+ *
* Conditional warning macro that checks the supplied condition and
* only prints a warning if the condition is true. Useful to replace
* if + warn.
*
* @param cond Condition that is checked; if true -> warn
* @param ... Printf-based format string with arguments, extends printout.
+ *
+ * \def warn_if(cond, ...)
+ * \def warn_if_once(cond, ...)
+ *
+ * @ingroup api_logger
+ * @{
*/
#define warn_if(cond, ...) \
do { \
@@ -232,6 +271,7 @@
if ((cond)) \
warn_once(__VA_ARGS__); \
} while (0)
+/** @} */ // end of api_logger
/**
* The chatty assert macro will function like a normal assert, but will
allow
@@ -241,6 +281,10 @@
*
* @param cond Condition that is checked; if false -> assert
* @param ... Printf-based format string with arguments, extends printout.
+ *
+ * \def chatty_assert(cond, ...)
+ *
+ * @ingroup api_logger
*/
#ifdef NDEBUG
#define chatty_assert(cond, ...)
@@ -251,4 +295,5 @@
panic("assert(" # cond ") failed: %s", csprintf(__VA_ARGS__));
\
} while (0)
#endif // NDEBUG
+/** @} */ // end of api_logger
#endif // __BASE_LOGGING_HH__
--
To view, visit
[gem5-dev] Change in gem5/gem5[develop]: base: Tag API methods and variables in bitfield.hh
Hoa Nguyen has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/32957 )
Change subject: base: Tag API methods and variables in bitfield.hh
..
base: Tag API methods and variables in bitfield.hh
Change-Id: Ifd7d1b6ba243fd70af6974fde8228fce8aeecb40
Signed-off-by: Hoa Nguyen
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/32957
Maintainer: Bobby R. Bruce
Tested-by: kokoro
Reviewed-by: Daniel Carvalho
Reviewed-by: Gabe Black
---
M src/base/bitfield.hh
1 file changed, 40 insertions(+), 1 deletion(-)
Approvals:
Gabe Black: Looks good to me, approved
Daniel Carvalho: Looks good to me, but someone else must approve
Bobby R. Bruce: Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/base/bitfield.hh b/src/base/bitfield.hh
index 5cde019..98a93d4 100644
--- a/src/base/bitfield.hh
+++ b/src/base/bitfield.hh
@@ -54,6 +54,8 @@
* greater than 64 is given, it is truncated to 64.
*
* @param nbits The number of bits set in the mask.
+ *
+ * @ingroup api_bitfield
*/
inline uint64_t
mask(int nbits)
@@ -64,6 +66,8 @@
/**
* Extract the bitfield from position 'first' to 'last' (inclusive)
* from 'val' and right justify it. MSB is numbered 63, LSB is 0.
+ *
+ * @ingroup api_bitfield
*/
template
inline
@@ -77,6 +81,8 @@
/**
* Extract the bit from this position from 'val' and right justify it.
+ *
+ * @ingroup api_bitfield
*/
template
inline
@@ -89,6 +95,8 @@
/**
* Mask off the given bits in place like bits() but without shifting.
* msb = 63, lsb = 0
+ *
+ * @ingroup api_bitfield
*/
template
inline
@@ -98,6 +106,9 @@
return val & (mask(first+1) & ~mask(last));
}
+/**
+ * @ingroup api_bitfield
+ */
inline uint64_t
mask(int first, int last)
{
@@ -106,6 +117,8 @@
/**
* Sign-extend an N-bit value to 64 bits.
+ *
+ * @ingroup api_bitfield
*/
template
inline
@@ -125,6 +138,8 @@
* val: 0x
* bit_val: 0x
* returned: 0xFF0F
+ *
+ * @ingroup api_bitfield
*/
template
inline
@@ -139,6 +154,8 @@
/**
* Overloaded for access to only one bit in value
+ *
+ * @ingroup api_bitfield
*/
template
inline
@@ -153,6 +170,8 @@
* in place. It is functionally equivalent to insertBits.
*
* \note "first" is the MSB and "last" is the LSB. "first" >= "last"
+ *
+ * @ingroup api_bitfield
*/
template
inline
@@ -162,7 +181,11 @@
val = insertBits(val, first, last, bit_val);
}
-/** Overloaded function to allow to access only 1 bit*/
+/**
+ * Overloaded function to allow to access only 1 bit
+ *
+ * @ingroup api_bitfield
+ */
template
inline
void
@@ -182,6 +205,8 @@
* @param val: variable lenght word
* @param size: number of bytes to mirror
* @return mirrored word
+ *
+ * @ingroup api_bitfield
*/
template
T
@@ -201,6 +226,8 @@
/**
* Returns the bit position of the MSB that is set in the input
+ *
+ * @ingroup api_bitfield
*/
inline
int
@@ -219,6 +246,8 @@
/**
* Returns the bit position of the LSB that is set in the input
+ *
+ * @ingroup api_bitfield
*/
inline int
findLsbSet(uint64_t val) {
@@ -236,6 +265,8 @@
/**
* Checks if a number is a power of two, or zero.
+ *
+ * @ingroup api_bitfield
*/
template
inline bool
@@ -247,6 +278,8 @@
* Returns the number of set ones in the provided value.
* PD algorithm from
* http://graphics.stanford.edu/~seander/bithacks.html#CountBitsSetParallel
+ *
+ * @ingroup api_bitfield
*/
inline int
popCount(uint64_t val) {
@@ -277,6 +310,8 @@
*
* This code has been modified from the following:
* http://graphics.stanford.edu/~seander/bithacks.html#RoundUpPowerOf2
+ *
+ * @ingroup api_bitfield
*/
inline uint64_t alignToPowerOfTwo(uint64_t val)
{
@@ -297,6 +332,8 @@
*
* @param An input value
* @return The number of trailing zeros or 32 if the value is zero.
+ *
+ * @ingroup api_bitfield
*/
inline int ctz32(uint32_t value)
{
@@ -308,6 +345,8 @@
*
* @param An input value
* @return The number of trailing zeros or 64 if the value is zero.
+ *
+ * @ingroup api_bitfield
*/
inline int ctz64(uint64_t value)
{
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Ifd7d1b6ba243fd70af6974fde8228fce8aeecb40
Gerrit-Change-Number: 32957
Gerrit-PatchSet: 2
Gerrit-Owner: Hoa Nguyen
Gerrit-Reviewer: Bobby R. Bruce
Gerrit-Reviewer: Daniel Carvalho
Gerrit-Reviewer: Gabe Black
Gerrit-Reviewer: Hoa Nguyen
Gerrit-Reviewer: kokoro
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: tests: Removed test-progs/insttest
Bobby R. Bruce has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/33140 ) Change subject: tests: Removed test-progs/insttest .. tests: Removed test-progs/insttest The insttests source is now found in gem5-resources: https://gem5.googlesource.com/public/gem5-resources/+/refs/heads/master/src/insttest/ The pre-compiled binaries are pulled from dist.gem5.org. There is no reason to keep these here. They are therefore being removed. Change-Id: I65d1237e275da4df6026090d8a064f47ada09687 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33140 Maintainer: Bobby R. Bruce Tested-by: kokoro Reviewed-by: Jason Lowe-Power --- 0 files changed, 0 insertions(+), 0 deletions(-) Approvals: Jason Lowe-Power: Looks good to me, approved Bobby R. Bruce: Looks good to me, approved kokoro: Regressions pass -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/33140 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: develop Gerrit-Change-Id: I65d1237e275da4df6026090d8a064f47ada09687 Gerrit-Change-Number: 33140 Gerrit-PatchSet: 5 Gerrit-Owner: Bobby R. Bruce Gerrit-Reviewer: Alec Roelke Gerrit-Reviewer: Bobby R. Bruce Gerrit-Reviewer: Hoa Nguyen Gerrit-Reviewer: Jason Lowe-Power Gerrit-Reviewer: kokoro Gerrit-MessageType: merged ___ gem5-dev mailing list -- gem5-dev@gem5.org To unsubscribe send an email to gem5-dev-le...@gem5.org %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s
[gem5-dev] Change in gem5/gem5[develop]: tests,arch-sparc: Move SPARC insttests to long
Bobby R. Bruce has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/34136 ) Change subject: tests,arch-sparc: Move SPARC insttests to long .. tests,arch-sparc: Move SPARC insttests to long We should not compile and run SPARC tests as part of the quick tests. The SPARC insttests have thefore been moved to be part of the long tests. Change-Id: I8e4263414af2d7a882715202124671dc0723d961 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/34136 Reviewed-by: Jason Lowe-Power Maintainer: Jason Lowe-Power Tested-by: kokoro --- M tests/gem5/insttest_se/test.py 1 file changed, 1 insertion(+), 0 deletions(-) Approvals: Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved kokoro: Regressions pass diff --git a/tests/gem5/insttest_se/test.py b/tests/gem5/insttest_se/test.py index 8f9fd58..c58a42b 100644 --- a/tests/gem5/insttest_se/test.py +++ b/tests/gem5/insttest_se/test.py @@ -72,4 +72,5 @@ config_args=['--cmd', joinpath(path, binary), '--cpu-type', cpu, '--caches'], valid_isas=(isa.upper(),), +length = constants.long_tag, ) -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/34136 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: develop Gerrit-Change-Id: I8e4263414af2d7a882715202124671dc0723d961 Gerrit-Change-Number: 34136 Gerrit-PatchSet: 3 Gerrit-Owner: Bobby R. Bruce Gerrit-Reviewer: Bobby R. Bruce Gerrit-Reviewer: Jason Lowe-Power Gerrit-Reviewer: kokoro Gerrit-CC: Giacomo Travaglini Gerrit-CC: Timothy Hayes Gerrit-MessageType: merged ___ gem5-dev mailing list -- gem5-dev@gem5.org To unsubscribe send an email to gem5-dev-le...@gem5.org %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s
[gem5-dev] Change in gem5/gem5[develop]: tests,configs: Updates to gpu protocol tester
Bradford Beckmann has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/34196 )
Change subject: tests,configs: Updates to gpu protocol tester
..
tests,configs: Updates to gpu protocol tester
This patch renames the VIPER protocol tester to a more generic
GPU protocol tester name and adds detailed descriptions to the
command line options.
Change-Id: Ia1a0c16302740d60bf2100c82f72c1acf1d39609
---
M configs/example/ruby_gpu_random_test.py
D configs/example/viper_ruby_test.py
2 files changed, 246 insertions(+), 437 deletions(-)
diff --git a/configs/example/ruby_gpu_random_test.py
b/configs/example/ruby_gpu_random_test.py
index d40a942..d32a201 100644
--- a/configs/example/ruby_gpu_random_test.py
+++ b/configs/example/ruby_gpu_random_test.py
@@ -1,4 +1,5 @@
-# Copyright (c) 2010-2015 Advanced Micro Devices, Inc.
+#
+# Copyright (c) 2018 Advanced Micro Devices, Inc.
# All rights reserved.
#
# For use for simulation and test purposes only
@@ -43,7 +44,7 @@
from common import Options
from ruby import Ruby
-# Get paths we might need.
+# Get paths we might need. It's expected this file is in
m5/configs/example.
config_path = os.path.dirname(os.path.abspath(__file__))
config_root = os.path.dirname(config_path)
m5_root = os.path.dirname(config_root)
@@ -51,25 +52,53 @@
parser = optparse.OptionParser()
Options.addNoISAOptions(parser)
-parser.add_option("--maxloads", metavar="N", default=100,
- help="Stop after N loads")
-parser.add_option("-f", "--wakeup_freq", metavar="N", default=10,
- help="Wakeup every N cycles")
-parser.add_option("-u", "--num-compute-units", type="int", default=1,
- help="number of compute units in the GPU")
-parser.add_option("--num-cp", type="int", default=0,
- help="Number of GPU Command Processors (CP)")
-# not super important now, but to avoid putting the number 4 everywhere,
make
-# it an option/knob
-parser.add_option("--cu-per-sqc", type="int", default=4, help="number of
CUs \
- sharing an SQC (icache, and thus icache TLB)")
-parser.add_option("--simds-per-cu", type="int", default=4, help="SIMD
units" \
- "per CU")
-parser.add_option("--wf-size", type="int", default=64,
- help="Wavefront size(in workitems)")
-parser.add_option("--wfs-per-simd", type="int", default=10, help="Number
of " \
- "WF slots per SIMD")
+# GPU Ruby tester options
+parser.add_option("--cache-size", type="int", default=0,
+ help="Cache sizes to use. Small encourages races between
\
+requests and writebacks. Large stresses
write-through \
+and/or write-back GPU caches. Range [0..1]")
+parser.add_option("--system-size", type="int", default=0,
+ help="This option defines how many CUs, CPUs and cache \
+components in the test system. Range[0..2]")
+parser.add_option("--address-range", type="int", default=0,
+ help="This option defines the number of atomic \
+locations that affects the working set's size. \
+A small number of atomic locations encourage more \
+races among threads. The large option stresses
cache \
+resources. Range [0..1]")
+parser.add_option("--episode-length", type="int", default=0,
+ help="This option defines the number of LDs and \
+STs in an episode. The small option encourages
races \
+between the start and end of an episode. The long \
+option encourages races between LDs and STs in the
\
+same episode. Range [0..2]")
+parser.add_option("--test-length", type="int", default=1,
+ help="The number of episodes to be executed by each \
+wavefront. This determines the maximum number,
i.e., \
+val X #WFs, of episodes to be executed in the
test.")
+parser.add_option("--debug-tester", action='store_true',
+ help="This option will turn on DRF checker")
+parser.add_option("--random-seed", type="int", default=0,
+ help="Random seed number. Default value (i.e., 0) means \
+using runtime-specific value")
+parser.add_option("--log-file", type="string", default="gpu-ruby-test.log")
+# GPU configurations
+parser.add_option("--wf-size", type="int", default=64, help="wavefront
size")
+
+parser.add_option("-w", "--wavefronts-per-cu", type="int", default=1,
+ help="Number of wavefronts per cu")
+
+parser.add_option("--cu-per-sqc", type="int", default=4,
+ help="number of CUs sharing an SQC")
+
+parser.add_option("--cu-per-scalar-cache",
[gem5-dev] Change in gem5/gem5[develop]: configs,mem-ruby: Remove old GPU ptls
Bradford Beckmann has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/34197 ) Change subject: configs,mem-ruby: Remove old GPU ptls .. configs,mem-ruby: Remove old GPU ptls These protocols are no longer supported, either because they are not representative of GPU protocols, or because the have not been updated to work with GCN3. Change-Id: I989eeb6826c69225766aaab209302fe638b22719 --- M configs/example/apu_se.py D configs/ruby/GPU_RfO.py D configs/ruby/GPU_VIPER_Baseline.py D configs/ruby/GPU_VIPER_Region.py D src/mem/ruby/protocol/GPU_RfO-SQC.sm D src/mem/ruby/protocol/GPU_RfO-TCC.sm D src/mem/ruby/protocol/GPU_RfO-TCCdir.sm D src/mem/ruby/protocol/GPU_RfO-TCP.sm D src/mem/ruby/protocol/GPU_RfO.slicc D src/mem/ruby/protocol/GPU_VIPER_Baseline.slicc D src/mem/ruby/protocol/GPU_VIPER_Region-TCC.sm D src/mem/ruby/protocol/GPU_VIPER_Region.slicc 12 files changed, 9 insertions(+), 8,541 deletions(-) -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/34197 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: develop Gerrit-Change-Id: I989eeb6826c69225766aaab209302fe638b22719 Gerrit-Change-Number: 34197 Gerrit-PatchSet: 1 Gerrit-Owner: Bradford Beckmann Gerrit-MessageType: newchange ___ gem5-dev mailing list -- gem5-dev@gem5.org To unsubscribe send an email to gem5-dev-le...@gem5.org %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s
[gem5-dev] Change in gem5/gem5[develop]: mem-ruby: fix integration issues between GCN3 and VIPER
Bradford Beckmann has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/34195 )
Change subject: mem-ruby: fix integration issues between GCN3 and VIPER
..
mem-ruby: fix integration issues between GCN3 and VIPER
Change-Id: I2f4ec4e08d8cdb3667f934b1a07c98ebcc8bdfe1
---
M src/cpu/testers/gpu_ruby_test/AddressManager.cc
M src/cpu/testers/gpu_ruby_test/GpuWavefront.cc
M src/cpu/testers/gpu_ruby_test/GpuWavefront.hh
M src/cpu/testers/gpu_ruby_test/ProtocolTester.cc
M src/cpu/testers/gpu_ruby_test/ProtocolTester.hh
M src/mem/ruby/protocol/GPU_VIPER-TCP.sm
M src/mem/ruby/protocol/GPU_VIPER-msg.sm
M src/mem/ruby/system/GPUCoalescer.cc
M src/mem/ruby/system/GPUCoalescer.hh
M src/mem/ruby/system/VIPERCoalescer.cc
M src/mem/ruby/system/VIPERCoalescer.hh
11 files changed, 106 insertions(+), 142 deletions(-)
diff --git a/src/cpu/testers/gpu_ruby_test/AddressManager.cc
b/src/cpu/testers/gpu_ruby_test/AddressManager.cc
index 0e60373..ee77e1b 100644
--- a/src/cpu/testers/gpu_ruby_test/AddressManager.cc
+++ b/src/cpu/testers/gpu_ruby_test/AddressManager.cc
@@ -36,6 +36,7 @@
#include
#include "base/intmath.hh"
+#include "base/logging.hh"
#include "base/random.hh"
#include "base/trace.hh"
@@ -312,8 +313,8 @@
// increment the location's number of owners
loc_prop.second++;
} else {
-panic("Location in loadStoreMap but wasn't picked "
-"in any action\n");
+panic("Location in loadStoreMap but wasn't picked in any"
+" action\n");
}
}
@@ -374,7 +375,14 @@
ExpectedValueSet::iterator it = expectedValues.find(val);
if (it == expectedValues.end()) {
- return false;
+std::stringstream exp_val_ss;
+for (auto& val : expectedValues) {
+exp_val_ss << " " << val;
+}
+
+warn("Expected return values are:\n\t%s\n", exp_val_ss.str());
+
+return false;
}
// erase this value b/c it's done
diff --git a/src/cpu/testers/gpu_ruby_test/GpuWavefront.cc
b/src/cpu/testers/gpu_ruby_test/GpuWavefront.cc
index 4b40345..8845613 100644
--- a/src/cpu/testers/gpu_ruby_test/GpuWavefront.cc
+++ b/src/cpu/testers/gpu_ruby_test/GpuWavefront.cc
@@ -79,14 +79,9 @@
// for now, assert address is 4-byte aligned
assert(address % load_size == 0);
-Request *req = new Request(0, // asid
- address, // virtual
addr
- load_size, // size in
bytes
- 0, // flags
- tester->masterId(), // port id
- 0, // pc
- threadId, // thread_id
- 0);
+auto req = std::make_shared(address, load_size,
+ 0, tester->masterId(),
+ 0, threadId, nullptr);
req->setPaddr(address);
req->setReqInstSeqNum(tester->getActionSeqNum());
// set protocol-specific flags
@@ -101,7 +96,7 @@
pendingLdStCount++;
if (!port->sendTimingReq(pkt)) {
-retryPkts.push_back(pkt);
+panic("Not expected failed sendTimingReq\n");
}
// insert an outstanding load
@@ -136,14 +131,9 @@
curEpisode->getEpisodeId(), printAddress(address),
new_value);
-Request *req = new Request(0, // asid
- address, // virtual
addr
- sizeof(Value), // size in
bytes
- 0, // flags
- tester->masterId(), // port id
- 0, // pc
- threadId, // thread_id
- 0);
+auto req = std::make_shared(address, sizeof(Value),
+ 0, tester->masterId(), 0,
+ threadId, nullptr);
req->setPaddr(address);
req->setReqInstSeqNum(tester->getActionSeqNum());
// set protocol-specific flags
@@ -161,7 +151,7 @@
pendingLdStCount++;
if (!port->sendTimingReq(pkt)) {
-retryPkts.push_back(pkt);
+panic("Not expecting a failed sendTimingReq\n");
}
// add an outstanding store
@@ -196,14 +186,11 @@
[gem5-dev] Change in gem5/gem5[develop]: cpu: HTM Implementation for O3CPU
Giacomo Travaglini has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/30328 )
Change subject: cpu: HTM Implementation for O3CPU
..
cpu: HTM Implementation for O3CPU
JIRA: https://gem5.atlassian.net/browse/GEM5-587
Change-Id: I83787f4594963a15d856b81ad283b4f032d1c007
Signed-off-by: Giacomo Travaglini
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/30328
Reviewed-by: Jason Lowe-Power
Maintainer: Jason Lowe-Power
Tested-by: kokoro
---
M src/cpu/base_dyn_inst.hh
M src/cpu/base_dyn_inst_impl.hh
M src/cpu/o3/commit.hh
M src/cpu/o3/commit_impl.hh
M src/cpu/o3/cpu.cc
M src/cpu/o3/cpu.hh
M src/cpu/o3/iew.hh
M src/cpu/o3/iew_impl.hh
M src/cpu/o3/lsq.hh
M src/cpu/o3/lsq_impl.hh
M src/cpu/o3/lsq_unit.hh
M src/cpu/o3/lsq_unit_impl.hh
M src/cpu/o3/mem_dep_unit_impl.hh
M src/cpu/o3/thread_context_impl.hh
M src/cpu/o3/thread_state.hh
15 files changed, 684 insertions(+), 32 deletions(-)
Approvals:
Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/cpu/base_dyn_inst.hh b/src/cpu/base_dyn_inst.hh
index 31dee6c..b0e9ef2 100644
--- a/src/cpu/base_dyn_inst.hh
+++ b/src/cpu/base_dyn_inst.hh
@@ -61,6 +61,7 @@
#include "cpu/op_class.hh"
#include "cpu/static_inst.hh"
#include "cpu/translation.hh"
+#include "debug/HtmCpu.hh"
#include "mem/packet.hh"
#include "mem/request.hh"
#include "sim/byteswap.hh"
@@ -140,6 +141,7 @@
IsStrictlyOrdered,
ReqMade,
MemOpDone,
+HtmFromTransaction,
MaxFlags
};
@@ -240,6 +242,11 @@
// Need a copy of main request pointer to verify on writes.
RequestPtr reqToVerify;
+ private:
+// hardware transactional memory
+uint64_t htmUid;
+uint64_t htmDepth;
+
protected:
/** Flattened register index of the destination registers of this
* instruction.
@@ -548,8 +555,8 @@
uint64_t getHtmTransactionUid() const override
{
-panic("Not yet implemented\n");
-return 0;
+assert(instFlags[HtmFromTransaction]);
+return this->htmUid;
}
uint64_t newHtmTransactionUid() const override
@@ -560,14 +567,35 @@
bool inHtmTransactionalState() const override
{
-panic("Not yet implemented\n");
-return false;
+return instFlags[HtmFromTransaction];
}
uint64_t getHtmTransactionalDepth() const override
{
-panic("Not yet implemented\n");
-return 0;
+if (inHtmTransactionalState())
+return this->htmDepth;
+else
+return 0;
+}
+
+void setHtmTransactionalState(uint64_t htm_uid, uint64_t htm_depth)
+{
+instFlags.set(HtmFromTransaction);
+htmUid = htm_uid;
+htmDepth = htm_depth;
+}
+
+void clearHtmTransactionalState()
+{
+if (inHtmTransactionalState()) {
+DPRINTF(HtmCpu,
+"clearing instuction's transactional state htmUid=%u\n",
+getHtmTransactionUid());
+
+instFlags.reset(HtmFromTransaction);
+htmUid = -1;
+htmDepth = 0;
+}
}
/** Temporarily sets this instruction as a serialize before
instruction. */
@@ -997,8 +1025,9 @@
Fault
BaseDynInst::initiateHtmCmd(Request::Flags flags)
{
-panic("Not yet implemented\n");
-return NoFault;
+return cpu->pushRequest(
+dynamic_cast(this),
+/* ld */ true, nullptr, 8, 0x0ul, flags, nullptr, nullptr);
}
template
diff --git a/src/cpu/base_dyn_inst_impl.hh b/src/cpu/base_dyn_inst_impl.hh
index 45b938d..bfe8ff5 100644
--- a/src/cpu/base_dyn_inst_impl.hh
+++ b/src/cpu/base_dyn_inst_impl.hh
@@ -95,6 +95,9 @@
physEffAddr = 0;
readyRegs = 0;
memReqFlags = 0;
+// hardware transactional memory
+htmUid = -1;
+htmDepth = 0;
status.reset();
diff --git a/src/cpu/o3/commit.hh b/src/cpu/o3/commit.hh
index 69d1c86..85d00a9 100644
--- a/src/cpu/o3/commit.hh
+++ b/src/cpu/o3/commit.hh
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2010-2012, 2014 ARM Limited
+ * Copyright (c) 2010-2012, 2014, 2019 ARM Limited
* All rights reserved.
*
* The license below extends only to copyright in the software and shall
@@ -205,6 +205,12 @@
/** Deschedules a thread from scheduling */
void deactivateThread(ThreadID tid);
+/** Is the CPU currently processing a HTM transaction? */
+bool executingHtmTransaction(ThreadID) const;
+
+/* Reset HTM tracking, e.g. after an abort */
+void resetHtmStartsStops(ThreadID);
+
/** Ticks the commit stage, which tries to commit instructions. */
void tick();
@@ -473,6 +479,11 @@
/** Updates commit stats based on this instruction. */
void updateComInstStats(const DynInstPtr );
+
+// HTM
+int htmStarts[Impl::MaxThreads];
+int htmStops[Impl::MaxThreads];
+
/** Stat for the total
[gem5-dev] Change in gem5/gem5[develop]: mem: Add HTM fields to the Packet object
Giacomo Travaglini has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/30318 )
Change subject: mem: Add HTM fields to the Packet object
..
mem: Add HTM fields to the Packet object
JIRA: https://gem5.atlassian.net/browse/GEM5-587
Change-Id: I39268825327f2387ca7e622093fdb42c24a6c82c
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/30318
Reviewed-by: Jason Lowe-Power
Maintainer: Jason Lowe-Power
Tested-by: kokoro
---
M src/mem/SConscript
M src/mem/packet.cc
M src/mem/packet.hh
3 files changed, 191 insertions(+), 5 deletions(-)
Approvals:
Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/mem/SConscript b/src/mem/SConscript
index 07e197b..2fe179d 100644
--- a/src/mem/SConscript
+++ b/src/mem/SConscript
@@ -114,6 +114,7 @@
DebugFlag('DRAMPower')
DebugFlag('DRAMState')
DebugFlag('ExternalPort')
+DebugFlag('HtmMem', 'Hardware Transactional Memory (Mem side)')
DebugFlag('LLSC')
DebugFlag('MMU')
DebugFlag('MemoryAccess')
diff --git a/src/mem/packet.cc b/src/mem/packet.cc
index b009cc5..0783e0f 100644
--- a/src/mem/packet.cc
+++ b/src/mem/packet.cc
@@ -230,7 +230,11 @@
InvalidateResp, "InvalidateReq" },
/* Invalidation Response */
{ SET2(IsInvalidate, IsResponse),
- InvalidCmd, "InvalidateResp" }
+ InvalidCmd, "InvalidateResp" },
+ // hardware transactional memory
+{ SET3(IsRead, IsRequest, NeedsResponse), HTMReqResp, "HTMReq" },
+{ SET2(IsRead, IsResponse), InvalidCmd, "HTMReqResp" },
+{ SET2(IsRead, IsRequest), InvalidCmd, "HTMAbort" },
};
AddrRange
@@ -489,3 +493,62 @@
printLabels();
obj->print(os, verbosity, curPrefix());
}
+
+void
+Packet::makeHtmTransactionalReqResponse(
+const HtmCacheFailure htm_return_code)
+{
+assert(needsResponse());
+assert(isRequest());
+
+cmd = cmd.responseCommand();
+
+setHtmTransactionFailedInCache(htm_return_code);
+
+// responses are never express, even if the snoop that
+// triggered them was
+flags.clear(EXPRESS_SNOOP);
+}
+
+void
+Packet::setHtmTransactionFailedInCache(
+const HtmCacheFailure htm_return_code)
+{
+if (htm_return_code != HtmCacheFailure::NO_FAIL)
+flags.set(FAILS_TRANSACTION);
+
+htmReturnReason = htm_return_code;
+}
+
+bool
+Packet::htmTransactionFailedInCache() const
+{
+return flags.isSet(FAILS_TRANSACTION);
+}
+
+HtmCacheFailure
+Packet::getHtmTransactionFailedInCacheRC() const
+{
+assert(htmTransactionFailedInCache());
+return htmReturnReason;
+}
+
+void
+Packet::setHtmTransactional(uint64_t htm_uid)
+{
+flags.set(FROM_TRANSACTION);
+htmTransactionUid = htm_uid;
+}
+
+bool
+Packet::isHtmTransactional() const
+{
+return flags.isSet(FROM_TRANSACTION);
+}
+
+uint64_t
+Packet::getHtmTransactionUid() const
+{
+assert(flags.isSet(FROM_TRANSACTION));
+return htmTransactionUid;
+}
diff --git a/src/mem/packet.hh b/src/mem/packet.hh
index 4af0d0b..4ded3b3 100644
--- a/src/mem/packet.hh
+++ b/src/mem/packet.hh
@@ -58,6 +58,7 @@
#include "base/logging.hh"
#include "base/printable.hh"
#include "base/types.hh"
+#include "mem/htm.hh"
#include "mem/request.hh"
#include "sim/core.hh"
@@ -131,6 +132,10 @@
FlushReq, //request for a cache flush
InvalidateReq, // request for address to be invalidated
InvalidateResp,
+// hardware transactional memory
+HTMReq,
+HTMReqResp,
+HTMAbort,
NUM_MEM_CMDS
};
@@ -259,7 +264,7 @@
enum : FlagsType {
// Flags to transfer across when copying a packet
-COPY_FLAGS = 0x003F,
+COPY_FLAGS = 0x00FF,
// Flags that are used to create reponse packets
RESPONDER_FLAGS= 0x0009,
@@ -289,6 +294,17 @@
// operations
SATISFIED = 0x0020,
+// hardware transactional memory
+
+// Indicates that this packet/request has returned from the
+// cache hierarchy in a failed transaction. The core is
+// notified like this.
+FAILS_TRANSACTION = 0x0040,
+
+// Indicates that this packet/request originates in the CPU
executing
+// in transactional mode, i.e. in a transaction.
+FROM_TRANSACTION = 0x0080,
+
/// Are the 'addr' and 'size' fields valid?
VALID_ADDR = 0x0100,
VALID_SIZE = 0x0200,
@@ -351,6 +367,21 @@
// Quality of Service priority value
uint8_t _qosValue;
+// hardware transactional memory
+
+/**
+ * Holds the return status of the transaction.
+ * The default case will be NO_FAIL, otherwise this will specify the
+ * reason for the transaction's failure in the memory subsystem.
+ */
+HtmCacheFailure htmReturnReason;
+
+/**
+ * A
[gem5-dev] Change in gem5/gem5[develop]: cpu: HTM Implementation for TimingCPU
Giacomo Travaglini has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/30327 )
Change subject: cpu: HTM Implementation for TimingCPU
..
cpu: HTM Implementation for TimingCPU
JIRA: https://gem5.atlassian.net/browse/GEM5-587
Change-Id: I3e1de639560ea5492e914470e31bacb321425f0a
Signed-off-by: Giacomo Travaglini
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/30327
Reviewed-by: Jason Lowe-Power
Maintainer: Jason Lowe-Power
Tested-by: kokoro
---
M src/cpu/simple/base.cc
M src/cpu/simple/exec_context.hh
M src/cpu/simple/timing.cc
M src/cpu/simple_thread.cc
M src/cpu/simple_thread.hh
5 files changed, 272 insertions(+), 20 deletions(-)
Approvals:
Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/cpu/simple/base.cc b/src/cpu/simple/base.cc
index a597f06..bf940ba 100644
--- a/src/cpu/simple/base.cc
+++ b/src/cpu/simple/base.cc
@@ -63,6 +63,7 @@
#include "debug/Decode.hh"
#include "debug/ExecFaulting.hh"
#include "debug/Fetch.hh"
+#include "debug/HtmCpu.hh"
#include "debug/Quiesce.hh"
#include "mem/packet.hh"
#include "mem/request.hh"
@@ -453,6 +454,17 @@
Fault interrupt = interrupts[curThread]->getInterrupt();
if (interrupt != NoFault) {
+// hardware transactional memory
+// Postpone taking interrupts while executing transactions.
+assert(!std::dynamic_pointer_cast(
+interrupt));
+if (t_info.inHtmTransactionalState()) {
+DPRINTF(HtmCpu, "Deferring pending interrupt - %s -"
+"due to transactional state\n",
+interrupt->name());
+return;
+}
+
t_info.fetchOffset = 0;
interrupts[curThread]->updateIntrInfo();
interrupt->invoke(tc);
diff --git a/src/cpu/simple/exec_context.hh b/src/cpu/simple/exec_context.hh
index 41e1d3d..2b2afd2 100644
--- a/src/cpu/simple/exec_context.hh
+++ b/src/cpu/simple/exec_context.hh
@@ -475,8 +475,7 @@
Fault initiateHtmCmd(Request::Flags flags) override
{
-panic("Not yet supported\n");
-return NoFault;
+return cpu->initiateHtmCmd(flags);
}
/**
@@ -536,29 +535,26 @@
uint64_t
getHtmTransactionUid() const override
{
-panic("Not yet supported\n");
-return 0;
+return tcBase()->getHtmCheckpointPtr()->getHtmUid();
}
uint64_t
newHtmTransactionUid() const override
{
-panic("Not yet supported\n");
-return 0;
+return tcBase()->getHtmCheckpointPtr()->newHtmUid();
}
bool
inHtmTransactionalState() const override
{
-panic("Not yet supported\n");
-return false;
+return (getHtmTransactionalDepth() > 0);
}
uint64_t
getHtmTransactionalDepth() const override
{
-panic("Not yet supported\n");
-return 0;
+assert(thread->htmTransactionStarts >=
thread->htmTransactionStops);
+return (thread->htmTransactionStarts -
thread->htmTransactionStops);
}
/**
diff --git a/src/cpu/simple/timing.cc b/src/cpu/simple/timing.cc
index d3adbcc..f22c58d 100644
--- a/src/cpu/simple/timing.cc
+++ b/src/cpu/simple/timing.cc
@@ -48,6 +48,7 @@
#include "debug/Config.hh"
#include "debug/Drain.hh"
#include "debug/ExecFaulting.hh"
+#include "debug/HtmCpu.hh"
#include "debug/Mwait.hh"
#include "debug/SimpleCPU.hh"
#include "mem/packet.hh"
@@ -173,6 +174,10 @@
SimpleExecContext& t_info = *threadInfo[curThread];
M5_VAR_USED SimpleThread* thread = t_info.thread;
+// hardware transactional memory
+// Cannot switch out the CPU in the middle of a transaction
+assert(!t_info.inHtmTransactionalState());
+
BaseSimpleCPU::switchOut();
assert(!fetchEvent.scheduled());
@@ -234,6 +239,10 @@
assert(thread_num < numThreads);
activeThreads.remove(thread_num);
+// hardware transactional memory
+// Cannot suspend context in the middle of a transaction.
+assert(!threadInfo[curThread]->inHtmTransactionalState());
+
if (_status == Idle)
return;
@@ -260,6 +269,12 @@
const RequestPtr = pkt->req;
+// hardware transactional memory
+// sanity check
+if (req->isHTMCmd()) {
+assert(!req->isLocalAccess());
+}
+
// We're about the issues a locked load, so tell the monitor
// to start caring about this address
if (pkt->isRead() && pkt->req->isLLSC()) {
@@ -291,6 +306,17 @@
PacketPtr pkt = buildPacket(req, read);
pkt->dataDynamic(data);
+// hardware transactional memory
+// If the core is in transactional mode or if the request is HtmCMD
+// to abort a transaction, the packet should reflect that it is
+// transactional and also contain a HtmUid for debugging.
+const bool
[gem5-dev] Change in gem5/gem5[develop]: cpu: Add HTM ThreadContext API
Giacomo Travaglini has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/30324 )
Change subject: cpu: Add HTM ThreadContext API
..
cpu: Add HTM ThreadContext API
JIRA: https://gem5.atlassian.net/browse/GEM5-587
Change-Id: I9d60f69592c8072e70cef18787b5a4f2fc737a9d
Signed-off-by: Giacomo Travaglini
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/30324
Reviewed-by: Jason Lowe-Power
Maintainer: Jason Lowe-Power
Tested-by: kokoro
---
M src/cpu/checker/thread_context.hh
M src/cpu/o3/thread_context.hh
M src/cpu/o3/thread_context_impl.hh
M src/cpu/simple_thread.cc
M src/cpu/simple_thread.hh
M src/cpu/thread_context.hh
6 files changed, 90 insertions(+), 6 deletions(-)
Approvals:
Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/cpu/checker/thread_context.hh
b/src/cpu/checker/thread_context.hh
index e98b3a2..b5a974b 100644
--- a/src/cpu/checker/thread_context.hh
+++ b/src/cpu/checker/thread_context.hh
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2011-2012, 2016-2018 ARM Limited
+ * Copyright (c) 2011-2012, 2016-2018, 2020 ARM Limited
* Copyright (c) 2013 Advanced Micro Devices, Inc.
* All rights reserved
*
@@ -554,6 +554,26 @@
{
actualTC->setCCRegFlat(idx, val);
}
+
+// hardware transactional memory
+void
+htmAbortTransaction(uint64_t htm_uid, HtmFailureFaultCause cause)
override
+{
+panic("function not implemented");
+}
+
+BaseHTMCheckpointPtr&
+getHtmCheckpointPtr() override
+{
+panic("function not implemented");
+}
+
+void
+setHtmCheckpointPtr(BaseHTMCheckpointPtr new_cpt) override
+{
+panic("function not implemented");
+}
+
};
#endif // __CPU_CHECKER_EXEC_CONTEXT_HH__
diff --git a/src/cpu/o3/thread_context.hh b/src/cpu/o3/thread_context.hh
index e3e11fe..b3eba13 100644
--- a/src/cpu/o3/thread_context.hh
+++ b/src/cpu/o3/thread_context.hh
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2011-2012, 2016-2018 ARM Limited
+ * Copyright (c) 2011-2012, 2016-2018, 2020 ARM Limited
* Copyright (c) 2013 Advanced Micro Devices, Inc.
* All rights reserved
*
@@ -479,6 +479,12 @@
RegVal readCCRegFlat(RegIndex idx) const override;
void setCCRegFlat(RegIndex idx, RegVal val) override;
+
+// hardware transactional memory
+void htmAbortTransaction(uint64_t htm_uid,
+ HtmFailureFaultCause cause) override;
+BaseHTMCheckpointPtr& getHtmCheckpointPtr() override;
+void setHtmCheckpointPtr(BaseHTMCheckpointPtr new_cpt) override;
};
#endif
diff --git a/src/cpu/o3/thread_context_impl.hh
b/src/cpu/o3/thread_context_impl.hh
index a5db764..014b0f5 100644
--- a/src/cpu/o3/thread_context_impl.hh
+++ b/src/cpu/o3/thread_context_impl.hh
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2010-2012, 2016-2017 ARM Limited
+ * Copyright (c) 2010-2012, 2016-2017, 2019 ARM Limited
* Copyright (c) 2013 Advanced Micro Devices, Inc.
* All rights reserved
*
@@ -325,4 +325,27 @@
conditionalSquash();
}
+// hardware transactional memory
+template
+void
+O3ThreadContext::htmAbortTransaction(uint64_t htmUid,
+ HtmFailureFaultCause cause)
+{
+panic("function not implemented\n");
+}
+
+template
+BaseHTMCheckpointPtr&
+O3ThreadContext::getHtmCheckpointPtr()
+{
+panic("function not implemented\n");
+}
+
+template
+void
+O3ThreadContext::setHtmCheckpointPtr(BaseHTMCheckpointPtr new_cpt)
+{
+panic("function not implemented\n");
+}
+
#endif //__CPU_O3_THREAD_CONTEXT_IMPL_HH__
diff --git a/src/cpu/simple_thread.cc b/src/cpu/simple_thread.cc
index 14551fb..b0ffc82 100644
--- a/src/cpu/simple_thread.cc
+++ b/src/cpu/simple_thread.cc
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2018 ARM Limited
+ * Copyright (c) 2018, 2020 ARM Limited
* All rights reserved
*
* The license below extends only to copyright in the software and shall
@@ -50,6 +50,7 @@
#include "base/trace.hh"
#include "config/the_isa.hh"
#include "cpu/base.hh"
+#include "cpu/simple/base.hh"
#include "cpu/thread_context.hh"
#include "mem/se_translating_port_proxy.hh"
#include "mem/translating_port_proxy.hh"
@@ -169,3 +170,22 @@
{
TheISA::copyRegs(src_tc, this);
}
+
+// hardware transactional memory
+void
+SimpleThread::htmAbortTransaction(uint64_t htm_uid, HtmFailureFaultCause
cause)
+{
+panic("function not implemented\n");
+}
+
+BaseHTMCheckpointPtr&
+SimpleThread::getHtmCheckpointPtr()
+{
+panic("function not implemented\n");
+}
+
+void
+SimpleThread::setHtmCheckpointPtr(BaseHTMCheckpointPtr new_cpt)
+{
+panic("function not implemented\n");
+}
diff --git a/src/cpu/simple_thread.hh b/src/cpu/simple_thread.hh
index 2c78573..eb88104 100644
--- a/src/cpu/simple_thread.hh
+++ b/src/cpu/simple_thread.hh
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2011-2012, 2016-2018 ARM Limited
+ *
[gem5-dev] Change in gem5/gem5[develop]: sim: Add HTM Generic Fault
Giacomo Travaglini has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/30325 )
Change subject: sim: Add HTM Generic Fault
..
sim: Add HTM Generic Fault
JIRA: https://gem5.atlassian.net/browse/GEM5-587
Change-Id: Iedbf06d25330a92790123805cff50d57b613a7a5
Signed-off-by: Giacomo Travaglini
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/30325
Reviewed-by: Jason Lowe-Power
Maintainer: Jason Lowe-Power
Tested-by: kokoro
---
M src/sim/faults.cc
M src/sim/faults.hh
2 files changed, 67 insertions(+), 1 deletion(-)
Approvals:
Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/sim/faults.cc b/src/sim/faults.cc
index b6468ea..d4d3c11 100644
--- a/src/sim/faults.cc
+++ b/src/sim/faults.cc
@@ -1,4 +1,16 @@
/*
+ * Copyright (c) 2020 ARM Limited
+ * All rights reserved
+ *
+ * The license below extends only to copyright in the software and shall
+ * not be construed as granting a license to any other intellectual
+ * property including but not limited to intellectual property relating
+ * to a hardware implementation of the functionality of the software
+ * licensed hereunder. You may use the software subject to the license
+ * terms below provided that you ensure that this notice is replicated
+ * unmodified and in its entirety in all distributions of the software,
+ * modified or unmodified, in source code or in binary form.
+ *
* Copyright (c) 2003-2005 The Regents of The University of Michigan
* All rights reserved.
*
@@ -28,6 +40,8 @@
#include "sim/faults.hh"
+#include "arch/decoder.hh"
+#include "arch/locked_mem.hh"
#include "base/logging.hh"
#include "cpu/base.hh"
#include "cpu/thread_context.hh"
@@ -90,3 +104,24 @@
{
panic("Alignment fault when accessing virtual address %#x\n", vaddr);
}
+
+void GenericHtmFailureFault::invoke(ThreadContext *tc,
+const StaticInstPtr )
+{
+// reset decoder
+TheISA::Decoder* dcdr = tc->getDecoderPtr();
+dcdr->reset();
+
+// restore transaction checkpoint
+const auto& checkpoint = tc->getHtmCheckpointPtr();
+assert(checkpoint);
+assert(checkpoint->valid());
+
+checkpoint->restore(tc, getHtmFailureFaultCause());
+
+// reset the global monitor
+TheISA::globalClearExclusive(tc);
+
+// send abort packet to ruby (in final breath)
+tc->htmAbortTransaction(htmUid, cause);
+}
diff --git a/src/sim/faults.hh b/src/sim/faults.hh
index 62817f0..2a96ce9 100644
--- a/src/sim/faults.hh
+++ b/src/sim/faults.hh
@@ -1,4 +1,16 @@
/*
+ * Copyright (c) 2020 ARM Limited
+ * All rights reserved
+ *
+ * The license below extends only to copyright in the software and shall
+ * not be construed as granting a license to any other intellectual
+ * property including but not limited to intellectual property relating
+ * to a hardware implementation of the functionality of the software
+ * licensed hereunder. You may use the software subject to the license
+ * terms below provided that you ensure that this notice is replicated
+ * unmodified and in its entirety in all distributions of the software,
+ * modified or unmodified, in source code or in binary form.
+ *
* Copyright (c) 2003-2005 The Regents of The University of Michigan
* All rights reserved.
*
@@ -31,6 +43,7 @@
#include "base/types.hh"
#include "cpu/static_inst.hh"
+#include "mem/htm.hh"
#include "sim/stats.hh"
class ThreadContext;
@@ -44,7 +57,6 @@
virtual FaultName name() const = 0;
virtual void invoke(ThreadContext * tc, const StaticInstPtr =
StaticInst::nullStaticInstPtr);
-
virtual ~FaultBase() {};
};
@@ -121,4 +133,23 @@
Addr getFaultVAddr() const { return vaddr; }
};
+class GenericHtmFailureFault : public FaultBase
+{
+ protected:
+uint64_t htmUid; // unique identifier used for debugging
+HtmFailureFaultCause cause;
+
+ public:
+GenericHtmFailureFault(uint64_t htm_uid, HtmFailureFaultCause _cause)
+ : htmUid(htm_uid), cause(_cause)
+{}
+
+FaultName name() const override { return "Generic HTM failure fault"; }
+
+uint64_t getHtmUid() const { return htmUid; }
+HtmFailureFaultCause getHtmFailureFaultCause() const { return cause; }
+void invoke(ThreadContext *tc, const StaticInstPtr =
+StaticInst::nullStaticInstPtr) override;
+};
+
#endif // __FAULTS_HH__
--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/30325
To unsubscribe, or for help writing mail filters, visit
https://gem5-review.googlesource.com/settings
Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Iedbf06d25330a92790123805cff50d57b613a7a5
Gerrit-Change-Number: 30325
Gerrit-PatchSet: 13
Gerrit-Owner: Giacomo Travaglini
Gerrit-Reviewer: Giacomo Travaglini
Gerrit-Reviewer: Jason Lowe-Power
Gerrit-Reviewer: Timothy Hayes
[gem5-dev] Change in gem5/gem5[develop]: cpu: Add HTM ExecContext API
Giacomo Travaglini has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/30323 )
Change subject: cpu: Add HTM ExecContext API
..
cpu: Add HTM ExecContext API
* initiateHtmCmd(Request::Flags flags)
* getHtmTransactionUid()
* newHtmTransactionUid()
* inHtmTransactionalState()
* getHtmTransactionalDepth()
JIRA: https://gem5.atlassian.net/browse/GEM5-587
Change-Id: I438832a3c47fff1d12d0123425985cfa2150ab40
Signed-off-by: Giacomo Travaglini
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/30323
Tested-by: kokoro
---
M src/cpu/base_dyn_inst.hh
M src/cpu/checker/cpu.hh
M src/cpu/exec_context.hh
M src/cpu/minor/exec_context.hh
M src/cpu/simple/exec_context.hh
5 files changed, 154 insertions(+), 0 deletions(-)
Approvals:
Giacomo Travaglini: Looks good to me, approved; Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/cpu/base_dyn_inst.hh b/src/cpu/base_dyn_inst.hh
index b98cbaa..bab8019 100644
--- a/src/cpu/base_dyn_inst.hh
+++ b/src/cpu/base_dyn_inst.hh
@@ -300,6 +300,8 @@
Fault initiateMemRead(Addr addr, unsigned size, Request::Flags flags,
const std::vector& byte_enable = std::vector());
+Fault initiateHtmCmd(Request::Flags flags) override;
+
Fault writeMem(uint8_t *data, unsigned size, Addr addr,
Request::Flags flags, uint64_t *res,
const std::vector& byte_enable =
std::vector());
@@ -539,6 +541,30 @@
bool isFirstMicroop() const { return staticInst->isFirstMicroop(); }
bool isMicroBranch() const { return staticInst->isMicroBranch(); }
+uint64_t getHtmTransactionUid() const override
+{
+panic("Not yet implemented\n");
+return 0;
+}
+
+uint64_t newHtmTransactionUid() const override
+{
+panic("Not yet implemented\n");
+return 0;
+}
+
+bool inHtmTransactionalState() const override
+{
+panic("Not yet implemented\n");
+return false;
+}
+
+uint64_t getHtmTransactionalDepth() const override
+{
+panic("Not yet implemented\n");
+return 0;
+}
+
/** Temporarily sets this instruction as a serialize before
instruction. */
void setSerializeBefore() { status.set(SerializeBefore); }
@@ -964,6 +990,14 @@
template
Fault
+BaseDynInst::initiateHtmCmd(Request::Flags flags)
+{
+panic("Not yet implemented\n");
+return NoFault;
+}
+
+template
+Fault
BaseDynInst::writeMem(uint8_t *data, unsigned size, Addr addr,
Request::Flags flags, uint64_t *res,
const std::vector& byte_enable)
diff --git a/src/cpu/checker/cpu.hh b/src/cpu/checker/cpu.hh
index 7d1807e..4530d4c 100644
--- a/src/cpu/checker/cpu.hh
+++ b/src/cpu/checker/cpu.hh
@@ -434,6 +434,41 @@
thread->setMemAccPredicate(val);
}
+uint64_t
+getHtmTransactionUid() const override
+{
+panic("not yet supported!");
+return 0;
+};
+
+uint64_t
+newHtmTransactionUid() const override
+{
+panic("not yet supported!");
+return 0;
+};
+
+Fault
+initiateHtmCmd(Request::Flags flags) override
+{
+panic("not yet supported!");
+return NoFault;
+}
+
+bool
+inHtmTransactionalState() const override
+{
+panic("not yet supported!");
+return false;
+}
+
+uint64_t
+getHtmTransactionalDepth() const override
+{
+panic("not yet supported!");
+return 0;
+}
+
TheISA::PCState pcState() const override { return thread->pcState(); }
void
pcState(const TheISA::PCState ) override
diff --git a/src/cpu/exec_context.hh b/src/cpu/exec_context.hh
index 4180191..cfef3c3 100644
--- a/src/cpu/exec_context.hh
+++ b/src/cpu/exec_context.hh
@@ -253,6 +253,11 @@
}
/**
+ * Initiate an HTM command,
+ * e.g. tell Ruby we're starting/stopping a transaction
+ */
+virtual Fault initiateHtmCmd(Request::Flags flags) = 0;
+/**
* For atomic-mode contexts, perform an atomic memory write operation.
* For timing-mode contexts, initiate a timing memory write operation.
*/
@@ -320,6 +325,12 @@
virtual bool readMemAccPredicate() const = 0;
virtual void setMemAccPredicate(bool val) = 0;
+// hardware transactional memory
+virtual uint64_t newHtmTransactionUid() const = 0;
+virtual uint64_t getHtmTransactionUid() const = 0;
+virtual bool inHtmTransactionalState() const = 0;
+virtual uint64_t getHtmTransactionalDepth() const = 0;
+
/** @} */
/**
diff --git a/src/cpu/minor/exec_context.hh b/src/cpu/minor/exec_context.hh
index e65fdfb..81675e6 100644
--- a/src/cpu/minor/exec_context.hh
+++ b/src/cpu/minor/exec_context.hh
@@ -114,6 +114,13 @@
}
Fault
+initiateHtmCmd(Request::Flags flags) override
+{
+
[gem5-dev] Change in gem5/gem5[develop]: cpu: Base dyn inst HTM flags getter
Giacomo Travaglini has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/30326 )
Change subject: cpu: Base dyn inst HTM flags getter
..
cpu: Base dyn inst HTM flags getter
JIRA: https://gem5.atlassian.net/browse/GEM5-587
Change-Id: Ie15d8849edcff34ee7d5c7dd5e6ee2e099f937fc
Signed-off-by: Giacomo Travaglini
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/30326
Tested-by: kokoro
Reviewed-by: Jason Lowe-Power
Maintainer: Jason Lowe-Power
---
M src/cpu/base_dyn_inst.hh
1 file changed, 5 insertions(+), 0 deletions(-)
Approvals:
Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/cpu/base_dyn_inst.hh b/src/cpu/base_dyn_inst.hh
index bab8019..31dee6c 100644
--- a/src/cpu/base_dyn_inst.hh
+++ b/src/cpu/base_dyn_inst.hh
@@ -540,6 +540,11 @@
bool isLastMicroop() const { return staticInst->isLastMicroop(); }
bool isFirstMicroop() const { return staticInst->isFirstMicroop(); }
bool isMicroBranch() const { return staticInst->isMicroBranch(); }
+// hardware transactional memory
+bool isHtmStart() const { return staticInst->isHtmStart(); }
+bool isHtmStop() const { return staticInst->isHtmStop(); }
+bool isHtmCancel() const { return staticInst->isHtmCancel(); }
+bool isHtmCmd() const { return staticInst->isHtmCmd(); }
uint64_t getHtmTransactionUid() const override
{
--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/30326
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Ie15d8849edcff34ee7d5c7dd5e6ee2e099f937fc
Gerrit-Change-Number: 30326
Gerrit-PatchSet: 13
Gerrit-Owner: Giacomo Travaglini
Gerrit-Reviewer: Giacomo Travaglini
Gerrit-Reviewer: Jason Lowe-Power
Gerrit-Reviewer: Timothy Hayes
Gerrit-Reviewer: kokoro
Gerrit-MessageType: merged
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