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om __future__ import print_function
-from __future__ import absolute_import
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quot;base/temperature.hh"
#include "sim/sim_object.hh"
struct ThermalNodeParams;
@@ -54,7 +55,7 @@
int id;
bool isref;
-double temp;
+Temperature temp;
};
#endif
--
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VISED OF THE POSSIBILITY OF SUCH DAMAGE.
-
-from __future__ import print_function
-from __future__ import absolute_import
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+def test_temperature(self):
+conv = convert.toTemperature
+
+self.assertEqual(conv("1.0K"), 1.0)
+self.assertEqual(conv("1.0mK"), 1.0e-3)
+
+self.assertEqual(conv("0C"), 273.15)
+self.assertEqual(conv("-1C"), 272.1
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nit")
+
+runner = unittest.runner.TextTestRunner(verbosity=2)
+runner.run(tests)
+
--
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G
, int_base=100, int_count=4)
@@ -1354,7 +1354,7 @@
its=NULL)
pci_host = GenericArmPciHost(
- conf_base=0x4000, conf_size='256MB', conf_device_bits=12,
+conf_base=0x4000, conf_size='256MiB', conf_device_bits=12,
pci_pio_base=0x5000,
embedded indexing
indexing_policy = NULL
--
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ret_data8=0, ret_data16=0, ret_data32=0,
ret_data64=0,
pio=default_bus.mem_side_ports)
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lbox@%x" % int(self.pio_addr))
node.appendCompatible(["arm,mhu", "arm,primecell"])
node.append(FdtPropertyWords("reg",
state.addrCells(self.pio_addr) +
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To u
e accesses to unclaimed IO ports.
-empty_isa = IsaFake(pio_addr=x86IOAddress(0), pio_size='64kB',
+empty_isa = IsaFake(pio_addr=x86IOAddress(0), pio_size='64KiB',
ret_data8=0, ret_data16=0, ret_data32=0,
ret_data64=0,
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n_tracked_cache_size = Param.MemorySize("128KiB", "Minimum cache
size"
+ " for which we track
statistics")
# This tag uses its own embedded indexing
indexing_policy = NULL
--
To view, visit https://gem5-review.g
olicy="ARM_PCI_INT_DEV", int_base=100, int_count=4)
@@ -1354,7 +1354,7 @@
its=NULL)
pci_host = GenericArmPciHost(
- conf_base=0x4000, conf_size='256MB', conf_device_bits=12,
+conf_base=0x4000, conf_size='256MiB', conf_device_bits=12,
: 3
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useArchPT = Param.Bool('false', 'maintain an in-memory version of the
page\
table in an architecture-specific format')
kvmInSE = Param.Bool('false', 'initialize the process for KvmCPU in
SE')
-maxStackSize = Param.MemorySize('64MB', 'maximum size of the stack')
+maxStackSi
-double temp;
+Temperature temp;
};
#endif
--
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)
+runner.run(tests)
+
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n *std::gmtime();
})
.def_readwrite("tm_sec", ::tm_sec)
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{
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;base/statistics.hh"
-extern Stats::Formula simSeconds;
-extern Stats::Value simTicks;
-extern Stats::Value simFreq;
-extern Stats::Value hostSeconds;
+extern Stats::Formula
+extern Stats::Value
+extern Stats::Value
+extern Stats::Value
#endif // __SIM_SIM_STATS_HH__
--
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0672bae66a5bc86bb042f13
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include "base/statistics.hh"
-extern Stats::Formula simSeconds;
-extern Stats::Value simTicks;
-extern Stats::Value simFreq;
-extern Stats::Value hostSeconds;
+extern Stats::Formula
+extern Stats::Value
+extern Stats::Value
+extern Stats::Value
#endif // __SIM_SIM_STATS_HH__
--
oject: public/gem5
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ebug/Loader.hh"
#include "debug/Quiesce.hh"
diff --git a/src/sim/system.hh b/src/sim/system.hh
index 7d77c48..fc93b85 100644
--- a/src/sim/system.hh
+++ b/src/sim/system.hh
@@ -52,7 +52,6 @@
#include "base/loader/symtab.hh"
#include "base/statistics.hh"
#inclu
hh
+++ b/src/sim/stats.hh
@@ -34,5 +34,6 @@
extern Stats::Formula simSeconds;
extern Stats::Value simTicks;
extern Stats::Value simFreq;
+extern Stats::Value hostSeconds;
#endif // __SIM_SIM_STATS_HH__
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6 @@
extern Stats::Formula simSeconds;
extern Stats::Value simTicks;
extern Stats::Value simFreq;
+extern Stats::Value hostSeconds;
#endif // __SIM_SIM_STATS_HH__
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/base.hh"
#include "cpu/pc_event.hh"
#include "enums/MemoryMode.hh"
#include "mem/mem_master.hh"
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;kids", ::CompoundFlag::kids)
+;
py::module m_trace = m_native.def_submodule("trace");
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ndFlag", c_flag)
+.def("kids", ::CompoundFlag::kids)
+;
py::module m_trace = m_native.def_submodule("trace");
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at_info(stat);
+ })
;
}
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{
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t name");
+
+ return cast_stat_info(stat);
+ })
;
}
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+ *
+ * Authors: Andreas Sandberg
*/
#ifndef _TEST_HELPER
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