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changeset d35d2b28df38 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=d35d2b28df38
description:
X86: Add a class to support 32 bit x86 linux process.
diffstat:
4 files changed, 364 insertions(+), 24 deletions(-)
src/arch/x86/linux/process.cc | 23 --
changeset f24733876990 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=f24733876990
description:
X86: Implement the int system call interface in the decoder.
diffstat:
1 file changed, 11 insertions(+)
src/arch/x86/isa/decoder/one_byte_opcodes.isa | 11 +++
changeset 1f14f6f5e613 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=1f14f6f5e613
description:
X86: Handle 32 bit system call arguments.
diffstat:
1 file changed, 13 insertions(+), 2 deletions(-)
src/arch/x86/process.cc | 15 +--
diffs (42 lines):
diff
changeset c9c465241d3b in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=c9c465241d3b
description:
X86: Install some 32 bit system calls.
diffstat:
3 files changed, 68 insertions(+), 4 deletions(-)
src/arch/x86/linux/linux.cc| 39
changeset 969fb3187eba in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=969fb3187eba
description:
X86: Compute shift instruction flags correctly.
diffstat:
1 file changed, 27 insertions(+), 27 deletions(-)
src/arch/x86/isa/insts/general_purpose/rotate_and_shift/shift.py
changeset f541a09c5916 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=f541a09c5916
description:
X86: Set an initial value for the LDT selector.
diffstat:
1 file changed, 3 insertions(+)
src/arch/x86/process.cc |3 +++
diffs (13 lines):
diff -r e831b4360cfe -r
changeset dc4162b805f7 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=dc4162b805f7
description:
X86: Implement the 32 bit set_thread_area system call.
diffstat:
1 file changed, 106 insertions(+), 1 deletion(-)
src/arch/x86/linux/syscalls.cc | 107
changeset 9c6391381323 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=9c6391381323
description:
X86: Add a 32 bit mmap2 system call.
diffstat:
2 files changed, 3 insertions(+), 1 deletion(-)
src/arch/x86/linux/linux.hh|2 ++
src/arch/x86/linux/syscalls.cc |
changeset 5a891c0193c6 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=5a891c0193c6
description:
X86: Install a 32 bit fstat64 system call.
diffstat:
1 file changed, 1 insertion(+), 1 deletion(-)
src/arch/x86/linux/syscalls.cc |2 +-
diffs (12 lines):
diff -r
changeset 63611864864f in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=63611864864f
description:
X86: Implement sysenter as a system call interface.
diffstat:
1 file changed, 4 insertions(+)
src/arch/x86/isa/decoder/two_byte_opcodes.isa |4
diffs (15 lines):
changeset 24c0a4639d17 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=24c0a4639d17
description:
X86: Don't treat the REX prefixes as prefixes in 32 bit modes. These
are inc/dec instructions.
diffstat:
1 file changed, 4 insertions(+), 1 deletion(-)
changeset 536125d85fa3 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=536125d85fa3
description:
X86: Add a structure to allow mapping between the host and guest fstat
formats.
diffstat:
1 file changed, 22 insertions(+)
src/arch/x86/linux/linux.hh | 22
changeset ff9203dd7608 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=ff9203dd7608
description:
X86: Fix a decoder bug and add in some missing instructions.
diffstat:
1 file changed, 16 insertions(+), 11 deletions(-)
src/arch/x86/isa/decoder/two_byte_opcodes.isa |
changeset 4270e0502e5e in /z/repo/encumbered
details: http://repo.m5sim.org/encumbered?cmd=changeset;node=4270e0502e5e
summary: CPU: Stop using the ArgumentReg array to get argument indexes.
diffstat:
1 file changed, 5 insertions(+), 5 deletions(-)
eio/alpha_exo.h | 10 +-
diffs (26
changeset 6f9f1438360a in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=6f9f1438360a
description:
X86: Make instructions that use intseg preserve all 8 bytes of their
addresses.
diffstat:
2 files changed, 6 insertions(+), 6 deletions(-)
Hey Gabe,
why did we make the switch from ArgumentReg array to argument names?
Just wondering.
On Fri, Feb 27, 2009 at 12:37 PM, Gabe Black gbl...@eecs.umich.edu wrote:
changeset 4270e0502e5e in /z/repo/encumbered
details: http://repo.m5sim.org/encumbered?cmd=changeset;node=4270e0502e5e
I got rid of the argument arrays because x86 doesn't always use the
same registers to get a particular argument depending on if you're in
a 32 bit or 64 bit binary. Since the array doesn't exist any more, I
put in a substitute in the few places it had been used directly.
Gabe
Quoting Korey
changeset 0ea37baabfb0 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=0ea37baabfb0
description:
quell gcc 4.3 warning
diffstat:
1 file changed, 4 insertions(+), 4 deletions(-)
src/arch/x86/tlb.cc |8
diffs (25 lines):
diff -r d4cb6394049b -r 0ea37baabfb0
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