[gem5-users] snoop_filter panic error

[Νικόλαος Ταμπουρατζής via gem5-users]

Dear gem5 community,
  
 I have used the latest gem5 version with the following command:  
./build/RISCV/gem5.fast  
./configs/example/gem5_library/riscvmatched-fs.py and I boot Ubuntu  
successfully. The problem is that after 10 hours of simulation I get  
the following error:

  
 build/RISCV/mem/snoop_filter.cc:144: panic: panic condition  
(sf_item.holder & req_port).none() occurred: requestor 

  
 which means that something goes wrong with the caches. However I  
have not changed anything in caches. May you help please how can I  
resolve the issue?

  
 Best regards,
 Nikos
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[gem5-users] Re: RISCV Power/Energy Estimation

[Νικόλαος Ταμπουρατζής via gem5-users]

 Dear Choi,

I have the same results with you except from Runtime Dynamic. As  
Andreas said, you may need to check the stats.txt file and the  
GEM5toMcPAT.py python script.



Best regards,
Nikos


Quoting Andreas Brokalakis via gem5-users :


Dear Choi,
    
   there seems to be a problem with your results. If you see the  
Runtime Dynamic results, it mentions that they are either inf or  
nan. This means that in the xml file that was produced from the  
python script, the runtime statistics have not been written properly.
   As such McPAT does not compute the dynamic power consumption  
based on the runtime statistics produced by the gem5 simulation. It  
only computes a maximum power draw (something like a TDP value  
instead of a power value related to the program that you are  
actually running).

    
   To correct this error you need to check the stats.txt file and  
the python script to see whether the version of gem5 that you are  
using somehow has modified the syntax or structure of the stats.txt  
file and therefore you need to account for these changes when you  
parse it with the python script.

    
   Best regards,
   Andreas
    
    

 On Tue, May 9, 2023 at 7:35 PM 최순원 via gem5-users  
 wrote:



Dear Νικόλαος Ταμπουρατζής,
  
 Your description is perfect. I was able to get  
"mcpatOutput.txt" without any problem like this.


  
 If you don't mind, can I ask you two more questions?
  
 1) How can I get the total power consumption of the processor  
from the output file information?


2) Can I see the your "mcpatOutput.txt" file? I want to compare  
with my output file.

  
 Thanks for your time.
  
 Best regards,
 Choi

 2023년 5월 10일 (수) 오전 12:56, Νικόλαος Ταμπουρατζής  
님이 작성:



_Dear Soonwon,_
   _ _
   _I had used McPAT v1.3. Specifically, you can do the following:_
   _ _
   _1) git clone https://github.com/H2020-COSSIM/cMcPAT.git
 _
   _2) cd cMcPAT/mcpat_

    
   _3) make all
 _
   _4) cd cMcPAT/Scripts (here you can see the GEM5ToMcPAT.py).
Usage: GEM5toMcPAT.py [options]  file (json)>  -o 

 _
   _Example GEM5ToMcPAT.py $GEM5/m5out/stats.txt  
$GEM5/m5out/config.json  
cMcPAT/mcpat/ProcessorDescriptionFiles/ARM_AtomicSimpleCPU_template.xml -o  
cMcPAT/mcpatNode.xml

 _
   _To be noticed to replace the correct of the above paths  
and the mcpatNode.xml will be produced._


    
   _5) Run McPAT using the mcpatNode.xml from step 4:  
cMcPAT/mcpat/mcpat -infile cMcPAT/mcpatNode.xml -print_level 1 >  
cMcPAT/mcpatOutput.txt_

   _ _
   _You may use print_level from 1 to 5 (more detailed output).

In the above example I have used a generic  
ARM_AtomicSimpleCPU_template.xml an I tested using the latest gem5  
version (v22.1). You may change it according your ARM processor._


   _Best regards,
Nikos

Quoting 최순원 via gem5-users :_


_Hello, I read your question, “RISCV Power/Energy Estimation”.

I’m sorry because It is not a answer to your question.

You said that “I got power/energy estimations of ARM and X86 ISAs  
through McPAT.”.

I want to measure a ARM core’s power consumption.
I got the gem5 simulations results, “stats.txt”, but I can’t see  
the power consumption of cpu.


Can you tell me how you got the CPU power consumption?

Best regards,
Soonwon Choi[1]_



 



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Links:
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[1]
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[gem5-users] Re: RISCV Power/Energy Estimation

[Νικόλαος Ταμπουρατζής via gem5-users]

 Dear Soonwon,
  
 I had used McPAT v1.3. Specifically, you can do the following:
  
 1) git clone https://github.com/H2020-COSSIM/cMcPAT.git
 
 2) cd cMcPAT/mcpat

 3) make all
 
 4) cd cMcPAT/Scripts (here you can see the GEM5ToMcPAT.py).
Usage: GEM5toMcPAT.py [options]  (json)>  -o 

 
 Example GEM5ToMcPAT.py $GEM5/m5out/stats.txt $GEM5/m5out/config.json  
cMcPAT/mcpat/ProcessorDescriptionFiles/ARM_AtomicSimpleCPU_template.xml -o  
cMcPAT/mcpatNode.xml

 
 To be noticed to replace the correct of the above paths and the  
mcpatNode.xml will be produced.


 5) Run McPAT using the mcpatNode.xml from step 4: cMcPAT/mcpat/mcpat  
-infile cMcPAT/mcpatNode.xml -print_level 1 > cMcPAT/mcpatOutput.txt

  
 You may use print_level from 1 to 5 (more detailed output).

In the above example I have used a generic  
ARM_AtomicSimpleCPU_template.xml an I tested using the latest gem5  
version (v22.1). You may change it according your ARM processor.


 Best regards,
Nikos

Quoting 최순원 via gem5-users :


Hello, I read your question, “RISCV Power/Energy Estimation”.

I’m sorry because It is not a answer to your question.

You said that “I got power/energy estimations of ARM and X86 ISAs  
through McPAT.”.

I want to measure a ARM core’s power consumption.
I got the gem5 simulations results, “stats.txt”, but I can’t see the  
power consumption of cpu.


Can you tell me how you got the CPU power consumption?

Best regards,
Soonwon Choi[1]




Links:
--
[1]
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[gem5-users] RISCV Power/Energy Estimation

[Νικόλαος Ταμπουρατζής via gem5-users]

Dear gem5 users,

In the past, I got power/energy estimations of ARM and X86 ISAs  
through McPAT. However, I would like to get power estimations using  
RISCV FS. I found the McPAT-Calib in which the authors describe that  
they use it in combination with the gem5. Has anyone used this or  
similar tool to obtain power estimations for RISCV ISA?


Best regards,
Nikos
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[gem5-users] RISCVMatchedBoard FS

[Νικόλαος Ταμπουρατζής via gem5-users]

Dear gem5 community,

I try to simulate RISCV FS using the RISCVMatchedBoard but after 2  
hours it does not get output in the terminal. Specifically, I use the  
following command (with latest gem5 version): ./build/RISCV/gem5.opt  
configs/example/gem5_library/riscvmatched-fs.py


To be noticed that it boots successfully FS with the generic RiscvBoard using:
./build/RISCV/gem5.opt configs/example/gem5_library/riscv-ubuntu-run.py

Best regards,
Nikos
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[gem5-users] Kernel Panic ARM Ubuntu

[Νικόλαος Ταμπουρατζής via gem5-users]

Dear gem5 community,

I have successfully simulated the HPCG benchmark using ARM Ubuntu in  
gem5 in 2 cores. However, when I try to simulate it using more cores  
(i.e. 8 cores) it takes more simulated time, and I get the following  
kernel panic after approximately 20 hours of simulation:


[8.580827] Kernel panic - not syncing: Attempted to kill init!  
exitcode=0x

[8.580827]
[8.580837] CPU: 0 PID: 1 Comm: login Not tainted 4.18.0+ #1
[8.580843] Hardware name: V2P-CA15 (DT)
[8.580849] Call trace:
[8.580856]  dump_backtrace+0x0/0x1c0
[8.580863]  show_stack+0x14/0x20
[8.580871]  dump_stack+0x8c/0xac
[8.580877]  panic+0x130/0x288
[8.580884]  complete_and_exit+0x0/0x20
[8.580891]  do_group_exit+0x38/0xa0
[8.580898]  __wake_up_parent+0x0/0x28
[8.580904]  el0_svc_naked+0x30/0x34
[8.580914] SMP: stopping secondary CPUs
[8.580921] Kernel Offset: disabled
[8.580926] CPU features: 0x21c06292
[8.580932] Memory Limit: 4096 MB
[8.580944] ---[ end Kernel panic - not syncing: Attempted to kill  
init! exitcode=0x

[8.580944]  ]---

I use the following cmd: $GEM5/build/ARM/gem5.fast --listener-mode=on  
-r -d $GEM5/node0 $GEM5/configs/example/arm/starter_fs.py  
--kernel=vmlinux.arm64 --num-cores=8 --disk-image=ubuntu-18.04-arm64.img


and I use the Latest Linux Kernel Image / Bootloader and Latest Linux  
Disk Images from here  
(https://www.gem5.org/documentation/general_docs/fullsystem/guest_binaries).


I really appreciate any help!

Best regards,
Nikos

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[gem5-users] Re: How to use different clock frequency in cpu and system

[Νικόλαος Ταμπουρατζής via gem5-users]

Dear Giacomo,

Thank you for your answer! I change the system clock from "1GHz" to  
"2GHz" and I get the same performance. Is it possible to change the  
clock on the PCI bus?


Best regards,
Nikos


Quoting Giacomo Travaglini via gem5-users :

Hi, there is no command-line option, but you just need to edit the  
system frequency in BaseSimpleSystem [1]


Kind Regards

Giacomo

[1]:  
https://github.com/gem5/gem5/blob/stable/configs/example/arm/devices.py#L274


From: Νικόλαος Ταμπουρατζής via gem5-users 
Date: Friday, 23 December 2022 at 13:19
To: gem5-users 
Cc: Νικόλαος Ταμπουρατζής 
Subject: [gem5-users] How to use different clock frequency in cpu and system

Dear gem5 community,

I am using configs/example/arm/starter_fs.py configuration in order to
simulate ARM FS. However, I would like to use different clock
frequencies in the CPU and different in the system clock. Is there
this option in the latest gem5 release?

Thank you!

Best regards,
Nikos
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[gem5-users] How to use different clock frequency in cpu and system

[Νικόλαος Ταμπουρατζής via gem5-users]

Dear gem5 community,

I am using configs/example/arm/starter_fs.py configuration in order to  
simulate ARM FS. However, I would like to use different clock  
frequencies in the CPU and different in the system clock. Is there  
this option in the latest gem5 release?


Thank you!

Best regards,
Nikos
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[gem5-users] Re: HPCG on RISCV

[Νικόλαος Ταμπουρατζής via gem5-users]

Dear Hoa, all,

Yes, the problem has been solved!! :)

I am able to execute HPCG benchmark without accuracy problems in RISCV  
FS mode!


Thank you!!

Best regards,
Nikos

Quoting Hoa Nguyen via gem5-users :


Hi Nikos,

The problem you ran into with the FS mode seems to be the same problem
described here [1] [2].
Can you try downloading the changes and let me know if it fixes the problem?

[1] https://gem5-review.googlesource.com/c/public/gem5/+/65272
[2] https://gem5-review.googlesource.com/c/public/gem5/+/65273

Regards,
Hoa Nguyen

On Tue, Nov 1, 2022 at 2:15 PM Hoa Nguyen  wrote:


Hi all,

I also ran into the same problem using another benchmark. I want to note
that this problem also appears when using the AtomicCPU.

Regards,
Hoa Nguyen

On Tue, Nov 1, 2022 at 3:02 AM Νικόλαος Ταμπουρατζής via gem5-users <
gem5-users@gem5.org> wrote:


Dear Boddy,

Thank you for the update! Please let me know when the accuracy issue
will be resolved because I cannot execute any benchmark in RISCV FS
mode (I am wondering if any other user faces the same problem).

Best regards,
Nikos


Quoting Bobby Bruce via gem5-users :

> You mean this bug? Unfortunately not, I've been very busy with the
upcoming
> gem5 release and haven't had time to investigate this further.
>
> --
> Dr. Bobby R. Bruce
> Room 3050,
> Kemper Hall, UC Davis
> Davis,
> CA, 95616
>
> web: https://www.bobbybruce.net
>
>
> On Mon, Oct 31, 2022 at 1:45 AM Νικόλαος Ταμπουρατζής via gem5-users <
> gem5-users@gem5.org> wrote:
>
>> Dear Bobby, Jason, all,
>>
>> Is there any update about the accuracy of RISC-V FS?
>>
>> Best regards,
>> Nikos
>>
>>
>> Quoting Bobby Bruce :
>>
>> > Jason and I had a theory that this may be due to the "Rounding Mode"
for
>> > floating pointing being set incorrectly in FS mode. That's set via a
>> macro
>> > here:
>> >
>>
https://gem5.googlesource.com/public/gem5/+/refs/tags/v22.0.0.2/src/arch/riscv/fp_inst.hh#36
>> >
>> > I manually expanded the macro here:
>> >
>>
https://gem5.googlesource.com/public/gem5/+/refs/tags/v22.0.0.2/src/arch/riscv/isa/decoder.isa#1495
>> ,
>> > inside the "fsqrt_d" definition then compiled "build/ALL/gem5.debug".
>> Then
>> > used gdb to add a breakpoint in the "Fsqrt_d::execute" function (in
the
>> > generated "build/ALL/arch/riscv/generated/exec-ns.cc.inc" file).
>> >
>> > ```
>> > gdb build/ALL/gem5.opt
>> > break Fsqrt_d::execute
>> > run bug-recreation/se-mode-run.py # or `run
>> bug-recreation/fs-mode-run.py`
>> > ```
>> >
>> > Stepping through with gdb I the rounding mode is `0` for SE mode and
`0`
>> > for FS mode as well. So, no luck with that theory.
>> >
>> > My new theory is that this bug has something to do with thread
context
>> > switching being implemented incorrectly in RISC-V somehow. I find it
>> > strange that the sqrt(1) works fine for a while (i.e. returns `1`)
then
>> > suddenly starts returning zero after a certain point in the
execution. In
>> > addition, it's odd that the loop is not returning the same value each
>> time
>> > despite executing the same code. It'd make sense to me that the
thread is
>> > being stored and then resumed with some corruption of the floating
point
>> > data. This would also explain why this bug only occurs in FS mode.
>> >
>> > I'll try to find time to figure out a good test for this. If anyone
has
>> any
>> > other theories or ideas then let me know.
>> >
>> > --
>> > Dr. Bobby R. Bruce
>> > Room 3050,
>> > Kemper Hall, UC Davis
>> > Davis,
>> > CA, 95616
>> >
>> > web: https://www.bobbybruce.net
>> >
>> >
>> > On Fri, Oct 7, 2022 at 12:50 PM Νικόλαος Ταμπουρατζής <
>> > ntampourat...@ece.auth.gr> wrote:
>> >>
>> >> Dear Jason & Boddy,
>> >>
>> >> Unfortunately, I have tried my simple example without the sqrt
>> >> function and the problem remains. Specifically, I have the following
>> >> simple code:
>> >>
>> >>
>> >> #include 
>> >> #include 
>> >>
>> >> int main(){
>> >>
>> >>  int dim = 1024;
>> >>
>> >>  double result;
>> >>
>> >>  for (int iter = 0; iter < 2; iter++){
>> >>  result = 0;
>> >>  for (int i = 0; i < dim; i++){
>> >>  

[gem5-users] Re: HPCG on RISCV

[Νικόλαος Ταμπουρατζής via gem5-users]

Dear Boddy,

Thank you for the update! Please let me know when the accuracy issue  
will be resolved because I cannot execute any benchmark in RISCV FS  
mode (I am wondering if any other user faces the same problem).


Best regards,
Nikos


Quoting Bobby Bruce via gem5-users :


You mean this bug? Unfortunately not, I've been very busy with the upcoming
gem5 release and haven't had time to investigate this further.

--
Dr. Bobby R. Bruce
Room 3050,
Kemper Hall, UC Davis
Davis,
CA, 95616

web: https://www.bobbybruce.net


On Mon, Oct 31, 2022 at 1:45 AM Νικόλαος Ταμπουρατζής via gem5-users <
gem5-users@gem5.org> wrote:


Dear Bobby, Jason, all,

Is there any update about the accuracy of RISC-V FS?

Best regards,
Nikos


Quoting Bobby Bruce :

> Jason and I had a theory that this may be due to the "Rounding Mode" for
> floating pointing being set incorrectly in FS mode. That's set via a
macro
> here:
>
https://gem5.googlesource.com/public/gem5/+/refs/tags/v22.0.0.2/src/arch/riscv/fp_inst.hh#36
>
> I manually expanded the macro here:
>
https://gem5.googlesource.com/public/gem5/+/refs/tags/v22.0.0.2/src/arch/riscv/isa/decoder.isa#1495
,
> inside the "fsqrt_d" definition then compiled "build/ALL/gem5.debug".
Then
> used gdb to add a breakpoint in the "Fsqrt_d::execute" function (in the
> generated "build/ALL/arch/riscv/generated/exec-ns.cc.inc" file).
>
> ```
> gdb build/ALL/gem5.opt
> break Fsqrt_d::execute
> run bug-recreation/se-mode-run.py # or `run
bug-recreation/fs-mode-run.py`
> ```
>
> Stepping through with gdb I the rounding mode is `0` for SE mode and `0`
> for FS mode as well. So, no luck with that theory.
>
> My new theory is that this bug has something to do with thread context
> switching being implemented incorrectly in RISC-V somehow. I find it
> strange that the sqrt(1) works fine for a while (i.e. returns `1`) then
> suddenly starts returning zero after a certain point in the execution. In
> addition, it's odd that the loop is not returning the same value each
time
> despite executing the same code. It'd make sense to me that the thread is
> being stored and then resumed with some corruption of the floating point
> data. This would also explain why this bug only occurs in FS mode.
>
> I'll try to find time to figure out a good test for this. If anyone has
any
> other theories or ideas then let me know.
>
> --
> Dr. Bobby R. Bruce
> Room 3050,
> Kemper Hall, UC Davis
> Davis,
> CA, 95616
>
> web: https://www.bobbybruce.net
>
>
> On Fri, Oct 7, 2022 at 12:50 PM Νικόλαος Ταμπουρατζής <
> ntampourat...@ece.auth.gr> wrote:
>>
>> Dear Jason & Boddy,
>>
>> Unfortunately, I have tried my simple example without the sqrt
>> function and the problem remains. Specifically, I have the following
>> simple code:
>>
>>
>> #include 
>> #include 
>>
>> int main(){
>>
>>  int dim = 1024;
>>
>>  double result;
>>
>>  for (int iter = 0; iter < 2; iter++){
>>  result = 0;
>>  for (int i = 0; i < dim; i++){
>>  for (int j = 0; j < dim; j++){
>>  result += i * j;
>>  }
>>  }
>>  printf("Final Result: %lf\n", result);
>>  }
>> }
>>
>>
>> In the above code, the correct result is 274341298176.00 (from
>> RISCV-SE mode and x86), while in FS mode I get sometimes the correct
>> result and other times a different number.
>>
>> Best regards,
>> Nikos
>>
>>
>> Quoting Jason Lowe-Power :
>>
>> > I have an idea...
>> >
>> > Have you put a breakpoint in the implementation of the fsqrt_d
> function? I
>> > would like to know if when running in SE mode and running in FS mode
we
> are
>> > using the same rounding mode. My hypothesis is that in FS mode the
> rounding
>> > mode is set differently.
>> >
>> > Cheers,
>> > Jason
>> >
>> > On Fri, Oct 7, 2022 at 12:15 AM Νικόλαος Ταμπουρατζής <
>> > ntampourat...@ece.auth.gr> wrote:
>> >
>> >> Dear Boddy,
>> >>
>> >> Thanks a lot for the effort! I looked in detail and I observe that
the
>> >> problem is created only using float and double variables (in the case
>> >> of int it is working properly in FS mode). Specifically, in the case
>> >> of float the variables are set to "nan", while in the case of double
>> >> the variables are set to 0.00 (in random time - probably from
some
>> >> instruction of simulated OS?)

[gem5-users] Re: HPCG on RISCV

[Νικόλαος Ταμπουρατζής via gem5-users]

Dear Bobby, Jason, all,

Is there any update about the accuracy of RISC-V FS?

Best regards,
Nikos


Quoting Bobby Bruce :


Jason and I had a theory that this may be due to the "Rounding Mode" for
floating pointing being set incorrectly in FS mode. That's set via a macro
here:
https://gem5.googlesource.com/public/gem5/+/refs/tags/v22.0.0.2/src/arch/riscv/fp_inst.hh#36

I manually expanded the macro here:
https://gem5.googlesource.com/public/gem5/+/refs/tags/v22.0.0.2/src/arch/riscv/isa/decoder.isa#1495,
inside the "fsqrt_d" definition then compiled "build/ALL/gem5.debug". Then
used gdb to add a breakpoint in the "Fsqrt_d::execute" function (in the
generated "build/ALL/arch/riscv/generated/exec-ns.cc.inc" file).

```
gdb build/ALL/gem5.opt
break Fsqrt_d::execute
run bug-recreation/se-mode-run.py # or `run bug-recreation/fs-mode-run.py`
```

Stepping through with gdb I the rounding mode is `0` for SE mode and `0`
for FS mode as well. So, no luck with that theory.

My new theory is that this bug has something to do with thread context
switching being implemented incorrectly in RISC-V somehow. I find it
strange that the sqrt(1) works fine for a while (i.e. returns `1`) then
suddenly starts returning zero after a certain point in the execution. In
addition, it's odd that the loop is not returning the same value each time
despite executing the same code. It'd make sense to me that the thread is
being stored and then resumed with some corruption of the floating point
data. This would also explain why this bug only occurs in FS mode.

I'll try to find time to figure out a good test for this. If anyone has any
other theories or ideas then let me know.

--
Dr. Bobby R. Bruce
Room 3050,
Kemper Hall, UC Davis
Davis,
CA, 95616

web: https://www.bobbybruce.net


On Fri, Oct 7, 2022 at 12:50 PM Νικόλαος Ταμπουρατζής <
ntampourat...@ece.auth.gr> wrote:


Dear Jason & Boddy,

Unfortunately, I have tried my simple example without the sqrt
function and the problem remains. Specifically, I have the following
simple code:


#include 
#include 

int main(){

 int dim = 1024;

 double result;

 for (int iter = 0; iter < 2; iter++){
 result = 0;
 for (int i = 0; i < dim; i++){
 for (int j = 0; j < dim; j++){
 result += i * j;
 }
 }
 printf("Final Result: %lf\n", result);
 }
}


In the above code, the correct result is 274341298176.00 (from
RISCV-SE mode and x86), while in FS mode I get sometimes the correct
result and other times a different number.

Best regards,
Nikos


Quoting Jason Lowe-Power :

> I have an idea...
>
> Have you put a breakpoint in the implementation of the fsqrt_d

function? I

> would like to know if when running in SE mode and running in FS mode we

are

> using the same rounding mode. My hypothesis is that in FS mode the

rounding

> mode is set differently.
>
> Cheers,
> Jason
>
> On Fri, Oct 7, 2022 at 12:15 AM Νικόλαος Ταμπουρατζής <
> ntampourat...@ece.auth.gr> wrote:
>
>> Dear Boddy,
>>
>> Thanks a lot for the effort! I looked in detail and I observe that the
>> problem is created only using float and double variables (in the case
>> of int it is working properly in FS mode). Specifically, in the case
>> of float the variables are set to "nan", while in the case of double
>> the variables are set to 0.00 (in random time - probably from some
>> instruction of simulated OS?). You may use a simple c/c++ example in
>> order to get some traces before going to HPCG...
>>
>> Thank you in advance!!
>> Best regards,
>> Nikos
>>
>>
>> Quoting Bobby Bruce :
>>
>> > Hey Niko,
>> >
>> > Thanks for this analysis. I jumped a little into this today but

didn't

>> get
>> > as far as you did. I wanted to find a quick way to recreate the
>> following:
>> > https://gem5-review.googlesource.com/c/public/gem5/+/64211.  Please

feel

>> > free to use this, if it helps any.
>> >
>> > It's very strange to me that this bug hasn't manifested itself

before but

>> > it's undeniably there. I'll try to spend more time looking at this
>> tomorrow
>> > with some traces and debug flags and see if I can narrow down the
>> problem.
>> >
>> > --
>> > Dr. Bobby R. Bruce
>> > Room 3050,
>> > Kemper Hall, UC Davis
>> > Davis,
>> > CA, 95616
>> >
>> > web: https://www.bobbybruce.net
>> >
>> >
>> > On Wed, Oct 5, 2022 at 2:26 PM Νικόλαος Ταμπουρατζής <
>> > ntampourat...@ece.auth.gr> wrote:
>> >
>> >> In my previous results, I had used double (not float

[gem5-users] Re: HPCG on RISCV

[Νικόλαος Ταμπουρατζής]

Dear Hoa, all

I have ported successfully HPCG and many simple examples using gem5  
ARM-FS and they are working properly. The problem is only in RISCV-FS  
using double and float variables. Which option of objdump to use?


Best regards,
Nikos


Quoting Hoa Nguyen :


Hi,

It's quite odd that both sqrt_i and result were zeroed out at the same
time. Does the problem appear in other ISA FS mode, e.g. x86 FS mode? Can
you show the objdump of the loop as well?

Regards,
Hoa Nguyen

On Thu, Oct 6, 2022, 04:06 Νικόλαος Ταμπουρατζής 
wrote:


Dear Jason, all,

I am trying to find the accuracy problem with RISCV-FS and I observe
that the problem is created (at least in my dummy example) because the
variables (double) are set to zero in random simulated time (for this
reason I get different results among executions of the same code).
Specifically for the following dummy code:


#include 
#include 

int main(){

 int dim = 10;

 float result;

 for (int iter = 0; iter < 2; iter++){
 result = 0;
 for (int i = 0; i < dim; i++){
 for (int j = 0; j < dim; j++){
 float sq_i = sqrt(i);
 float sq_j = sqrt(j);
 result += sq_i * sq_j;
 printf("ITER: %d | i: %d | j: %d Result(i: %f | j: %f
| i*j: %f): %f\n", iter, i , j, sq_i, sq_j, sq_i * sq_j, result);
 }
 }
 printf("Final Result: %lf\n", result);
 }
}


The correct Final Result in both iterations is 372.721656. However, I
get the following results in FS:

ITER: 0 | i: 0 | j: 0 Result(i: 0.00 | j: 0.00 | i*j:
0.00): 0.00
ITER: 0 | i: 0 | j: 1 Result(i: 0.00 | j: 1.00 | i*j:
0.00): 0.00
ITER: 0 | i: 0 | j: 2 Result(i: 0.00 | j: 1.414214 | i*j:
0.00): 0.00
ITER: 0 | i: 0 | j: 3 Result(i: 0.00 | j: 1.732051 | i*j:
0.00): 0.00
ITER: 0 | i: 0 | j: 4 Result(i: 0.00 | j: 2.00 | i*j:
0.00): 0.00
ITER: 0 | i: 0 | j: 5 Result(i: 0.00 | j: 2.236068 | i*j:
0.00): 0.00
ITER: 0 | i: 0 | j: 6 Result(i: 0.00 | j: 2.449490 | i*j:
0.00): 0.00
ITER: 0 | i: 0 | j: 7 Result(i: 0.00 | j: 2.645751 | i*j:
0.00): 0.00
ITER: 0 | i: 0 | j: 8 Result(i: 0.00 | j: 2.828427 | i*j:
0.00): 0.00
ITER: 0 | i: 0 | j: 9 Result(i: 0.00 | j: 3.00 | i*j:
0.00): 0.00
ITER: 0 | i: 1 | j: 0 Result(i: 1.00 | j: 0.00 | i*j:
0.00): 0.00
ITER: 0 | i: 1 | j: 1 Result(i: 1.00 | j: 1.00 | i*j:
1.00): 1.00
ITER: 0 | i: 1 | j: 2 Result(i: 1.00 | j: 1.414214 | i*j:
1.414214): 2.414214
ITER: 0 | i: 1 | j: 3 Result(i: 1.00 | j: 1.732051 | i*j:
1.732051): 4.146264
ITER: 0 | i: 1 | j: 4 Result(i: 0.00 | j: 2.00 | i*j:
0.00): 0.00
ITER: 0 | i: 1 | j: 5 Result(i: 0.00 | j: 2.236068 | i*j:
0.00): 0.00
ITER: 0 | i: 1 | j: 6 Result(i: 0.00 | j: 2.449490 | i*j:
0.00): 0.00
ITER: 0 | i: 1 | j: 7 Result(i: 0.00 | j: 2.645751 | i*j:
0.00): 0.00
ITER: 0 | i: 1 | j: 8 Result(i: 0.00 | j: 2.828427 | i*j:
0.00): 0.00
ITER: 0 | i: 1 | j: 9 Result(i: 0.00 | j: 3.00 | i*j:
0.00): 0.00
ITER: 0 | i: 2 | j: 0 Result(i: 1.414214 | j: 0.00 | i*j:
0.00): 0.00
ITER: 0 | i: 2 | j: 1 Result(i: 1.414214 | j: 1.00 | i*j:
1.414214): 1.414214
ITER: 0 | i: 2 | j: 2 Result(i: 1.414214 | j: 1.414214 | i*j:
2.00): 3.414214
ITER: 0 | i: 2 | j: 3 Result(i: 1.414214 | j: 1.732051 | i*j:
2.449490): 5.863703
ITER: 0 | i: 2 | j: 4 Result(i: 1.414214 | j: 2.00 | i*j:
2.828427): 8.692130
ITER: 0 | i: 2 | j: 5 Result(i: 1.414214 | j: 2.236068 | i*j:
3.162278): 11.854408
ITER: 0 | i: 2 | j: 6 Result(i: 1.414214 | j: 2.449490 | i*j:
3.464102): 15.318510
ITER: 0 | i: 2 | j: 7 Result(i: 1.414214 | j: 2.645751 | i*j:
3.741657): 19.060167
ITER: 0 | i: 2 | j: 8 Result(i: 1.414214 | j: 2.828427 | i*j:
4.00): 23.060167
ITER: 0 | i: 2 | j: 9 Result(i: 1.414214 | j: 3.00 | i*j:
4.242641): 27.302808
ITER: 0 | i: 3 | j: 0 Result(i: 1.732051 | j: 0.00 | i*j:
0.00): 27.302808
ITER: 0 | i: 3 | j: 1 Result(i: 1.732051 | j: 1.00 | i*j:
1.732051): 29.034859
ITER: 0 | i: 3 | j: 2 Result(i: 1.732051 | j: 1.414214 | i*j:
2.449490): 31.484348
ITER: 0 | i: 3 | j: 3 Result(i: 1.732051 | j: 1.732051 | i*j:
3.00): 34.484348
ITER: 0 | i: 3 | j: 4 Result(i: 1.732051 | j: 2.00 | i*j:
3.464102): 37.948450
ITER: 0 | i: 3 | j: 5 Result(i: 1.732051 | j: 2.236068 | i*j:
3.872983): 41.821433
ITER: 0 | i: 3 | j: 6 Result(i: 1.732051 | j: 2.449490 | i*j:
4.242641): 46.064074
ITER: 0 | i: 3 | j: 7 Result(i: 1.732051 | j: 2.645751 | i*j:
4.582576): 50.646650
ITER: 0 | i: 3 | j: 8 Result(i: 1.732051 | j: 2.828427 | i*j:
4.898979): 55.545629
ITER: 0 | i: 3 | j: 9 Result(i: 1.732051 | j: 3.00 | i*j:
5.196152): 60.741782
ITER: 0 | i: 4 | j: 0 Result(i: 2.00 | j: 0.00 | i*j:
0.00): 60.741782
ITER: 0 | i: 4 | j: 1 Result(i: 2.00 

[gem5-users] Re: HPCG on RISCV

[Νικόλαος Ταμπουρατζής]

Dear Jason & Boddy,

Unfortunately, I have tried my simple example without the sqrt  
function and the problem remains. Specifically, I have the following  
simple code:



#include 
#include 

int main(){

int dim = 1024;

double result;

for (int iter = 0; iter < 2; iter++){
result = 0;
for (int i = 0; i < dim; i++){
for (int j = 0; j < dim; j++){
result += i * j;
}
}
printf("Final Result: %lf\n", result);
}
}


In the above code, the correct result is 274341298176.00 (from  
RISCV-SE mode and x86), while in FS mode I get sometimes the correct  
result and other times a different number.


Best regards,
Nikos


Quoting Jason Lowe-Power :


I have an idea...

Have you put a breakpoint in the implementation of the fsqrt_d function? I
would like to know if when running in SE mode and running in FS mode we are
using the same rounding mode. My hypothesis is that in FS mode the rounding
mode is set differently.

Cheers,
Jason

On Fri, Oct 7, 2022 at 12:15 AM Νικόλαος Ταμπουρατζής <
ntampourat...@ece.auth.gr> wrote:


Dear Boddy,

Thanks a lot for the effort! I looked in detail and I observe that the
problem is created only using float and double variables (in the case
of int it is working properly in FS mode). Specifically, in the case
of float the variables are set to "nan", while in the case of double
the variables are set to 0.00 (in random time - probably from some
instruction of simulated OS?). You may use a simple c/c++ example in
order to get some traces before going to HPCG...

Thank you in advance!!
Best regards,
Nikos


Quoting Bobby Bruce :

> Hey Niko,
>
> Thanks for this analysis. I jumped a little into this today but didn't
get
> as far as you did. I wanted to find a quick way to recreate the
following:
> https://gem5-review.googlesource.com/c/public/gem5/+/64211.  Please feel
> free to use this, if it helps any.
>
> It's very strange to me that this bug hasn't manifested itself before but
> it's undeniably there. I'll try to spend more time looking at this
tomorrow
> with some traces and debug flags and see if I can narrow down the
problem.
>
> --
> Dr. Bobby R. Bruce
> Room 3050,
> Kemper Hall, UC Davis
> Davis,
> CA, 95616
>
> web: https://www.bobbybruce.net
>
>
> On Wed, Oct 5, 2022 at 2:26 PM Νικόλαος Ταμπουρατζής <
> ntampourat...@ece.auth.gr> wrote:
>
>> In my previous results, I had used double (not float) for the
>> following variables: result, sq_i and sq_j. In the case of float
>> instead of double I get "nan" and not 0.00.
>>
>> Quoting Νικόλαος Ταμπουρατζής :
>>
>> > Dear Jason, all,
>> >
>> > I am trying to find the accuracy problem with RISCV-FS and I observe
>> > that the problem is created (at least in my dummy example) because
>> > the variables (double) are set to zero in random simulated time (for
>> > this reason I get different results among executions of the same
>> > code). Specifically for the following dummy code:
>> >
>> >
>> > #include 
>> > #include 
>> >
>> > int main(){
>> >
>> > int dim = 10;
>> >
>> > float result;
>> >
>> > for (int iter = 0; iter < 2; iter++){
>> > result = 0;
>> > for (int i = 0; i < dim; i++){
>> > for (int j = 0; j < dim; j++){
>> > float sq_i = sqrt(i);
>> > float sq_j = sqrt(j);
>> > result += sq_i * sq_j;
>> > printf("ITER: %d | i: %d | j: %d Result(i: %f | j:
>> > %f | i*j: %f): %f\n", iter, i , j, sq_i, sq_j, sq_i * sq_j, result);
>> > }
>> > }
>> > printf("Final Result: %lf\n", result);
>> > }
>> > }
>> >
>> >
>> > The correct Final Result in both iterations is 372.721656. However,
>> > I get the following results in FS:
>> >
>> > ITER: 0 | i: 0 | j: 0 Result(i: 0.00 | j: 0.00 | i*j:
>> > 0.00): 0.00
>> > ITER: 0 | i: 0 | j: 1 Result(i: 0.00 | j: 1.00 | i*j:
>> > 0.00): 0.00
>> > ITER: 0 | i: 0 | j: 2 Result(i: 0.00 | j: 1.414214 | i*j:
>> > 0.00): 0.00
>> > ITER: 0 | i: 0 | j: 3 Result(i: 0.00 | j: 1.732051 | i*j:
>> > 0.00): 0.00
>> > ITER: 0 | i: 0 | j: 4 Result(i: 0.00 | j: 2.00 | i*j:
>> > 0.00): 0.00
>> > ITER: 0 | i: 0 | j: 5 Result(i: 0.00 | j: 2.236068 | i*j:
>> > 0.00): 0.00
>> &

[gem5-users] Re: HPCG on RISCV

[Νικόλαος Ταμπουρατζής]

Dear Boddy,

Thanks a lot for the effort! I looked in detail and I observe that the  
problem is created only using float and double variables (in the case  
of int it is working properly in FS mode). Specifically, in the case  
of float the variables are set to "nan", while in the case of double  
the variables are set to 0.00 (in random time - probably from some  
instruction of simulated OS?). You may use a simple c/c++ example in  
order to get some traces before going to HPCG...


Thank you in advance!!
Best regards,
Nikos


Quoting Bobby Bruce :


Hey Niko,

Thanks for this analysis. I jumped a little into this today but didn't get
as far as you did. I wanted to find a quick way to recreate the following:
https://gem5-review.googlesource.com/c/public/gem5/+/64211.  Please feel
free to use this, if it helps any.

It's very strange to me that this bug hasn't manifested itself before but
it's undeniably there. I'll try to spend more time looking at this tomorrow
with some traces and debug flags and see if I can narrow down the problem.

--
Dr. Bobby R. Bruce
Room 3050,
Kemper Hall, UC Davis
Davis,
CA, 95616

web: https://www.bobbybruce.net


On Wed, Oct 5, 2022 at 2:26 PM Νικόλαος Ταμπουρατζής <
ntampourat...@ece.auth.gr> wrote:


In my previous results, I had used double (not float) for the
following variables: result, sq_i and sq_j. In the case of float
instead of double I get "nan" and not 0.00.

Quoting Νικόλαος Ταμπουρατζής :

> Dear Jason, all,
>
> I am trying to find the accuracy problem with RISCV-FS and I observe
> that the problem is created (at least in my dummy example) because
> the variables (double) are set to zero in random simulated time (for
> this reason I get different results among executions of the same
> code). Specifically for the following dummy code:
>
>
> #include 
> #include 
>
> int main(){
>
> int dim = 10;
>
> float result;
>
> for (int iter = 0; iter < 2; iter++){
> result = 0;
> for (int i = 0; i < dim; i++){
> for (int j = 0; j < dim; j++){
> float sq_i = sqrt(i);
> float sq_j = sqrt(j);
> result += sq_i * sq_j;
> printf("ITER: %d | i: %d | j: %d Result(i: %f | j:
> %f | i*j: %f): %f\n", iter, i , j, sq_i, sq_j, sq_i * sq_j, result);
> }
> }
> printf("Final Result: %lf\n", result);
> }
> }
>
>
> The correct Final Result in both iterations is 372.721656. However,
> I get the following results in FS:
>
> ITER: 0 | i: 0 | j: 0 Result(i: 0.00 | j: 0.00 | i*j:
> 0.00): 0.00
> ITER: 0 | i: 0 | j: 1 Result(i: 0.00 | j: 1.00 | i*j:
> 0.00): 0.00
> ITER: 0 | i: 0 | j: 2 Result(i: 0.00 | j: 1.414214 | i*j:
> 0.00): 0.00
> ITER: 0 | i: 0 | j: 3 Result(i: 0.00 | j: 1.732051 | i*j:
> 0.00): 0.00
> ITER: 0 | i: 0 | j: 4 Result(i: 0.00 | j: 2.00 | i*j:
> 0.00): 0.00
> ITER: 0 | i: 0 | j: 5 Result(i: 0.00 | j: 2.236068 | i*j:
> 0.00): 0.00
> ITER: 0 | i: 0 | j: 6 Result(i: 0.00 | j: 2.449490 | i*j:
> 0.00): 0.00
> ITER: 0 | i: 0 | j: 7 Result(i: 0.00 | j: 2.645751 | i*j:
> 0.00): 0.00
> ITER: 0 | i: 0 | j: 8 Result(i: 0.00 | j: 2.828427 | i*j:
> 0.00): 0.00
> ITER: 0 | i: 0 | j: 9 Result(i: 0.00 | j: 3.00 | i*j:
> 0.00): 0.00
> ITER: 0 | i: 1 | j: 0 Result(i: 1.00 | j: 0.00 | i*j:
> 0.00): 0.00
> ITER: 0 | i: 1 | j: 1 Result(i: 1.00 | j: 1.00 | i*j:
> 1.00): 1.00
> ITER: 0 | i: 1 | j: 2 Result(i: 1.00 | j: 1.414214 | i*j:
> 1.414214): 2.414214
> ITER: 0 | i: 1 | j: 3 Result(i: 1.00 | j: 1.732051 | i*j:
> 1.732051): 4.146264
> ITER: 0 | i: 1 | j: 4 Result(i: 0.00 | j: 2.00 | i*j:
> 0.00): 0.00
> ITER: 0 | i: 1 | j: 5 Result(i: 0.00 | j: 2.236068 | i*j:
> 0.00): 0.00
> ITER: 0 | i: 1 | j: 6 Result(i: 0.00 | j: 2.449490 | i*j:
> 0.00): 0.00
> ITER: 0 | i: 1 | j: 7 Result(i: 0.00 | j: 2.645751 | i*j:
> 0.00): 0.00
> ITER: 0 | i: 1 | j: 8 Result(i: 0.00 | j: 2.828427 | i*j:
> 0.00): 0.00
> ITER: 0 | i: 1 | j: 9 Result(i: 0.00 | j: 3.00 | i*j:
> 0.00): 0.00
> ITER: 0 | i: 2 | j: 0 Result(i: 1.414214 | j: 0.00 | i*j:
> 0.00): 0.00
> ITER: 0 | i: 2 | j: 1 Result(i: 1.414214 | j: 1.00 | i*j:
> 1.414214): 1.414214
> ITER: 0 | i: 2 | j: 2 Result(i: 1.414214 | j: 1.414214 | i*j:
> 2.00): 3.414214
> ITER: 0 | i: 2 | j: 3 Result(i: 1.414214 | j: 1.732051 | i*j:
> 2.449490): 5.863703
> ITER: 0 | i: 2 | j: 4 Result(i: 1.414214 | j: 2.00 | i*j:
> 2.828427): 8.692130
> IT

[gem5-users] Re: HPCG on RISCV

[Νικόλαος Ταμπουρατζής]

In my previous results, I had used double (not float) for the  
following variables: result, sq_i and sq_j. In the case of float  
instead of double I get "nan" and not 0.00.


Quoting Νικόλαος Ταμπουρατζής :


Dear Jason, all,

I am trying to find the accuracy problem with RISCV-FS and I observe  
that the problem is created (at least in my dummy example) because  
the variables (double) are set to zero in random simulated time (for  
this reason I get different results among executions of the same  
code). Specifically for the following dummy code:



#include 
#include 

int main(){

int dim = 10;

float result;

for (int iter = 0; iter < 2; iter++){
result = 0;
for (int i = 0; i < dim; i++){
for (int j = 0; j < dim; j++){
float sq_i = sqrt(i);
float sq_j = sqrt(j);
result += sq_i * sq_j;
printf("ITER: %d | i: %d | j: %d Result(i: %f | j:  
%f | i*j: %f): %f\n", iter, i , j, sq_i, sq_j, sq_i * sq_j, result);

}
}
printf("Final Result: %lf\n", result);
}
}


The correct Final Result in both iterations is 372.721656. However,  
I get the following results in FS:


ITER: 0 | i: 0 | j: 0 Result(i: 0.00 | j: 0.00 | i*j:  
0.00): 0.00
ITER: 0 | i: 0 | j: 1 Result(i: 0.00 | j: 1.00 | i*j:  
0.00): 0.00
ITER: 0 | i: 0 | j: 2 Result(i: 0.00 | j: 1.414214 | i*j:  
0.00): 0.00
ITER: 0 | i: 0 | j: 3 Result(i: 0.00 | j: 1.732051 | i*j:  
0.00): 0.00
ITER: 0 | i: 0 | j: 4 Result(i: 0.00 | j: 2.00 | i*j:  
0.00): 0.00
ITER: 0 | i: 0 | j: 5 Result(i: 0.00 | j: 2.236068 | i*j:  
0.00): 0.00
ITER: 0 | i: 0 | j: 6 Result(i: 0.00 | j: 2.449490 | i*j:  
0.00): 0.00
ITER: 0 | i: 0 | j: 7 Result(i: 0.00 | j: 2.645751 | i*j:  
0.00): 0.00
ITER: 0 | i: 0 | j: 8 Result(i: 0.00 | j: 2.828427 | i*j:  
0.00): 0.00
ITER: 0 | i: 0 | j: 9 Result(i: 0.00 | j: 3.00 | i*j:  
0.00): 0.00
ITER: 0 | i: 1 | j: 0 Result(i: 1.00 | j: 0.00 | i*j:  
0.00): 0.00
ITER: 0 | i: 1 | j: 1 Result(i: 1.00 | j: 1.00 | i*j:  
1.00): 1.00
ITER: 0 | i: 1 | j: 2 Result(i: 1.00 | j: 1.414214 | i*j:  
1.414214): 2.414214
ITER: 0 | i: 1 | j: 3 Result(i: 1.00 | j: 1.732051 | i*j:  
1.732051): 4.146264
ITER: 0 | i: 1 | j: 4 Result(i: 0.00 | j: 2.00 | i*j:  
0.00): 0.00
ITER: 0 | i: 1 | j: 5 Result(i: 0.00 | j: 2.236068 | i*j:  
0.00): 0.00
ITER: 0 | i: 1 | j: 6 Result(i: 0.00 | j: 2.449490 | i*j:  
0.00): 0.00
ITER: 0 | i: 1 | j: 7 Result(i: 0.00 | j: 2.645751 | i*j:  
0.00): 0.00
ITER: 0 | i: 1 | j: 8 Result(i: 0.00 | j: 2.828427 | i*j:  
0.00): 0.00
ITER: 0 | i: 1 | j: 9 Result(i: 0.00 | j: 3.00 | i*j:  
0.00): 0.00
ITER: 0 | i: 2 | j: 0 Result(i: 1.414214 | j: 0.00 | i*j:  
0.00): 0.00
ITER: 0 | i: 2 | j: 1 Result(i: 1.414214 | j: 1.00 | i*j:  
1.414214): 1.414214
ITER: 0 | i: 2 | j: 2 Result(i: 1.414214 | j: 1.414214 | i*j:  
2.00): 3.414214
ITER: 0 | i: 2 | j: 3 Result(i: 1.414214 | j: 1.732051 | i*j:  
2.449490): 5.863703
ITER: 0 | i: 2 | j: 4 Result(i: 1.414214 | j: 2.00 | i*j:  
2.828427): 8.692130
ITER: 0 | i: 2 | j: 5 Result(i: 1.414214 | j: 2.236068 | i*j:  
3.162278): 11.854408
ITER: 0 | i: 2 | j: 6 Result(i: 1.414214 | j: 2.449490 | i*j:  
3.464102): 15.318510
ITER: 0 | i: 2 | j: 7 Result(i: 1.414214 | j: 2.645751 | i*j:  
3.741657): 19.060167
ITER: 0 | i: 2 | j: 8 Result(i: 1.414214 | j: 2.828427 | i*j:  
4.00): 23.060167
ITER: 0 | i: 2 | j: 9 Result(i: 1.414214 | j: 3.00 | i*j:  
4.242641): 27.302808
ITER: 0 | i: 3 | j: 0 Result(i: 1.732051 | j: 0.00 | i*j:  
0.00): 27.302808
ITER: 0 | i: 3 | j: 1 Result(i: 1.732051 | j: 1.00 | i*j:  
1.732051): 29.034859
ITER: 0 | i: 3 | j: 2 Result(i: 1.732051 | j: 1.414214 | i*j:  
2.449490): 31.484348
ITER: 0 | i: 3 | j: 3 Result(i: 1.732051 | j: 1.732051 | i*j:  
3.00): 34.484348
ITER: 0 | i: 3 | j: 4 Result(i: 1.732051 | j: 2.00 | i*j:  
3.464102): 37.948450
ITER: 0 | i: 3 | j: 5 Result(i: 1.732051 | j: 2.236068 | i*j:  
3.872983): 41.821433
ITER: 0 | i: 3 | j: 6 Result(i: 1.732051 | j: 2.449490 | i*j:  
4.242641): 46.064074
ITER: 0 | i: 3 | j: 7 Result(i: 1.732051 | j: 2.645751 | i*j:  
4.582576): 50.646650
ITER: 0 | i: 3 | j: 8 Result(i: 1.732051 | j: 2.828427 | i*j:  
4.898979): 55.545629
ITER: 0 | i: 3 | j: 9 Result(i: 1.732051 | j: 3.00 | i*j:  
5.196152): 60.741782
ITER: 0 | i: 4 | j: 0 Result(i: 2.00 | j: 0.00 | i*j:  
0.00): 60.741782
ITER: 0 | i: 4 | j: 1 Result(i: 2.00 | j: 1.00 | i*j:  
2.00): 62.741782
ITER: 0 | i: 4 | j: 2 Result(i: 2.00 | j: 1.414214 | i*j:  
2.828427): 65.570209
ITER: 0 | i: 4 | j: 3 Result(i: 2.00 | j: 1.732051 | i*j:  
3.464102): 69.034310
ITER: 0 | i: 4 | j: 4

[gem5-users] Re: HPCG on RISCV

[Νικόλαος Ταμπουρατζής]

j: 1.732051 | i*j:  
4.242641): 171.985545
ITER: 1 | i: 6 | j: 4 Result(i: 2.449490 | j: 2.00 | i*j:  
4.898979): 176.884524
ITER: 1 | i: 6 | j: 5 Result(i: 2.449490 | j: 2.236068 | i*j:  
5.477226): 182.361750
ITER: 1 | i: 6 | j: 6 Result(i: 2.449490 | j: 2.449490 | i*j:  
6.00): 188.361750
ITER: 1 | i: 6 | j: 7 Result(i: 2.449490 | j: 2.645751 | i*j:  
6.480741): 194.842491
ITER: 1 | i: 6 | j: 8 Result(i: 2.449490 | j: 2.828427 | i*j:  
6.928203): 201.770694
ITER: 1 | i: 6 | j: 9 Result(i: 2.449490 | j: 3.00 | i*j:  
7.348469): 209.119163
ITER: 1 | i: 7 | j: 0 Result(i: 2.645751 | j: 0.00 | i*j:  
0.00): 209.119163
ITER: 1 | i: 7 | j: 1 Result(i: 2.645751 | j: 1.00 | i*j:  
2.645751): 211.764914
ITER: 1 | i: 7 | j: 2 Result(i: 2.645751 | j: 1.414214 | i*j:  
3.741657): 215.506572
ITER: 1 | i: 7 | j: 3 Result(i: 2.645751 | j: 1.732051 | i*j:  
4.582576): 220.089147
ITER: 1 | i: 7 | j: 4 Result(i: 2.645751 | j: 2.00 | i*j:  
5.291503): 225.380650
ITER: 1 | i: 7 | j: 5 Result(i: 2.645751 | j: 2.236068 | i*j:  
5.916080): 231.296730
ITER: 1 | i: 7 | j: 6 Result(i: 2.645751 | j: 2.449490 | i*j:  
6.480741): 237.777470
ITER: 1 | i: 7 | j: 7 Result(i: 2.645751 | j: 2.645751 | i*j:  
7.00): 244.777470
ITER: 1 | i: 7 | j: 8 Result(i: 2.645751 | j: 2.828427 | i*j:  
7.483315): 252.260785
ITER: 1 | i: 7 | j: 9 Result(i: 2.645751 | j: 3.00 | i*j:  
7.937254): 260.198039
ITER: 1 | i: 8 | j: 0 Result(i: 2.828427 | j: 0.00 | i*j:  
0.00): 260.198039
ITER: 1 | i: 8 | j: 1 Result(i: 2.828427 | j: 1.00 | i*j:  
2.828427): 263.026466
ITER: 1 | i: 8 | j: 2 Result(i: 2.828427 | j: 1.414214 | i*j:  
4.00): 267.026466
ITER: 1 | i: 8 | j: 3 Result(i: 2.828427 | j: 1.732051 | i*j:  
4.898979): 271.925446
ITER: 1 | i: 8 | j: 4 Result(i: 2.828427 | j: 2.00 | i*j:  
5.656854): 277.582300
ITER: 1 | i: 8 | j: 5 Result(i: 2.828427 | j: 2.236068 | i*j:  
6.324555): 283.906855
ITER: 1 | i: 8 | j: 6 Result(i: 2.828427 | j: 2.449490 | i*j:  
6.928203): 290.835059
ITER: 1 | i: 8 | j: 7 Result(i: 2.828427 | j: 2.645751 | i*j:  
7.483315): 298.318373
ITER: 1 | i: 8 | j: 8 Result(i: 2.828427 | j: 2.828427 | i*j:  
8.00): 306.318373
ITER: 1 | i: 8 | j: 9 Result(i: 2.828427 | j: 3.00 | i*j:  
8.485281): 314.803655
ITER: 1 | i: 9 | j: 0 Result(i: 3.00 | j: 0.00 | i*j:  
0.00): 314.803655
ITER: 1 | i: 9 | j: 1 Result(i: 3.00 | j: 1.00 | i*j:  
3.00): 317.803655
ITER: 1 | i: 9 | j: 2 Result(i: 3.00 | j: 1.414214 | i*j:  
4.242641): 322.046295
ITER: 1 | i: 9 | j: 3 Result(i: 3.00 | j: 1.732051 | i*j:  
5.196152): 327.242448
ITER: 1 | i: 9 | j: 4 Result(i: 3.00 | j: 2.00 | i*j:  
6.00): 333.242448
ITER: 1 | i: 9 | j: 5 Result(i: 3.00 | j: 2.236068 | i*j:  
6.708204): 339.950652
ITER: 1 | i: 9 | j: 6 Result(i: 3.00 | j: 2.449490 | i*j:  
7.348469): 347.299121
ITER: 1 | i: 9 | j: 7 Result(i: 3.00 | j: 2.645751 | i*j:  
7.937254): 355.236375
ITER: 1 | i: 9 | j: 8 Result(i: 3.00 | j: 2.828427 | i*j:  
8.485281): 363.721656
ITER: 1 | i: 9 | j: 9 Result(i: 3.00 | j: 3.00 | i*j:  
9.00): 372.721656

Final Result: 372.721656



As we can see in the following iterations the sqrt(1) as well as the  
result is set to zero for some reason.


ITER: 0 | i: 1 | j: 4 Result(i: 0.00 | j: 2.00 | i*j:  
0.00): 0.00
ITER: 0 | i: 1 | j: 5 Result(i: 0.00 | j: 2.236068 | i*j:  
0.00): 0.00
ITER: 0 | i: 1 | j: 6 Result(i: 0.00 | j: 2.449490 | i*j:  
0.00): 0.00
ITER: 0 | i: 1 | j: 7 Result(i: 0.00 | j: 2.645751 | i*j:  
0.00): 0.00
ITER: 0 | i: 1 | j: 8 Result(i: 0.00 | j: 2.828427 | i*j:  
0.00): 0.00
ITER: 0 | i: 1 | j: 9 Result(i: 0.00 | j: 3.00 | i*j:  
0.00): 0.00


Please help me to resolve the accuracy issue! I think that it will be  
very useful for gem5 community.


To be noticed, I find the correct simulated tick in which the  
application started in FS (using m5 dumpstats), and I start the  
--debug-start, but the trace file which is generated is 10x larger  
than SE mode for the same application. How can I compare them?


Thank you in advance!
Best regards,
Nikos

Quoting Νικόλαος Ταμπουρατζής :


Dear Jason,

I am trying to use --debug-start but in FS mode it is very difficult  
to find the tick on which the application is started!


However, I am writing the following very simple c++ program:

#include 
#include 

int main(){

int dim = 4096;

double result;

for (int iter = 0; iter < 2; iter++){
result = 0;
for (int i = 0; i < dim; i++){
for (int j = 0; j < dim; j++){
result += sqrt(i) * sqrt(j);
}
}
printf("Result: %lf\n", result); //Result: 30530733453.127449
}
}

I cross-compile it using: riscv64-linux-gnu-g++ -static -O3 -o  
test_riscv test_riscv.cpp



While in X86 (without cross-compilation of course), QEMU-RISCV,  
GEM5-SE the result is the sa

[gem5-users] Re: HPCG on RISCV

[Νικόλαος Ταμπουρατζής]

Dear Jason,

I am trying to use --debug-start but in FS mode it is very difficult  
to find the tick on which the application is started!


However, I am writing the following very simple c++ program:

#include 
#include 

int main(){

int dim = 4096;

double result;

for (int iter = 0; iter < 2; iter++){
result = 0;
for (int i = 0; i < dim; i++){
for (int j = 0; j < dim; j++){
result += sqrt(i) * sqrt(j);
}
}
printf("Result: %lf\n", result); //Result: 30530733453.127449
}
}

I cross-compile it using: riscv64-linux-gnu-g++ -static -O3 -o  
test_riscv test_riscv.cpp



While in X86 (without cross-compilation of course), QEMU-RISCV,  
GEM5-SE the result is the same (30530733453.127449), in GEM5-FS the  
result is different! In addition, the result is also different between  
the 2 iterations.


Please reproduce the error if you want in order to verify my result.
Ηow can the issue be resolved?

Thank you in advance!

Best regards,
Nikos


Quoting Jason Lowe-Power :


Hi Nikos,

You can use --debug-start to start the debugging after some number of
ticks. Also, I would expect that the difference should come up quickly, so
no need to run the program to the end.

For the FS mode one, you will want to just start the trace as the
application starts. This could be a bit of a pain.

I'm not really sure what fundamentally could be different. FS and SE mode
use the exact same code for executing instructions, so I don't think that's
the problem. Have you tried running for smaller inputs or just one
iteration?

Jason



On Wed, Sep 21, 2022 at 9:04 AM Νικόλαος Ταμπουρατζής <
ntampourat...@ece.auth.gr> wrote:


Dear Bobby,

Iam trying to add --debug-flags=Exec (building the gem5 for gem5.opt
not for gem5.fast which I had) but the debug traces exceed the 20GB
(and it is not finished yet) for less than 1 simulated second. How can
I reduce the size of the debug-flags (or set something more specific)?

In contrast I build the HPCG benchmark with DHPCG_DEBUG flag. If you
want, you can compare these two output files
(hpcg20010909T014640_SE_Mode & HPCG-Benchmark_3.1_FS_Mode). As you can
see, something goes wrong with the accuracy of calculations in FS mode
(benchmark uses double precission). You can find the files here:
http://kition.mhl.tuc.gr:8000/d/68d82f3533/

Best regards,
Nikos

Quoting Jason Lowe-Power :

> That's quite odd that it works in SE mode but not FS mode!
>
> I would suggest running with --debug-flags=Exec for both and then
perform a
> diff to see how they differ.
>
> Cheers,
> Jason
>
> On Tue, Sep 20, 2022 at 2:45 PM Νικόλαος Ταμπουρατζής <
> ntampourat...@ece.auth.gr> wrote:
>
>> Dear Bobby,
>>
>> In QEMU I get the same (correct) results that I get in SE mode
>> simulation. I get invalid results in FS simulation (in both
>> riscv-fs.py and riscv-ubuntu-run.py). I cannot access real RISCV
>> hardware at this moment, however, if you want you may execute my xhpcg
>> binary (http://kition.mhl.tuc.gr:8000/f/4ca25fdd3c/) with the
>> following configuration:
>>
>> ./xhpcg --nx=16 --ny=16 --nz=16 --npx=1 --npy=1 --npz=1 --rt=0.1
>>
>> Please let me know if you have any updates!
>>
>> Best regards,
>> Nikos
>>
>>
>> Quoting Jason Lowe-Power :
>>
>> > Hi Nikos,
>> >
>> > I notice you said the following in your original email:
>> >
>> > In addition, I used the RISCV Ubuntu image
>> >> (https://github.com/gem5/gem5-resources/tree/stable/src/riscv-ubuntu
),
>> >> I installed the gcc compiler, compile it (through qemu) and I get
>> >> wrong results too.
>> >
>> >
>> > Is this saying you get the wrong results is QEMU? If so, the bug is in
>> GCC
>> > or the HPCG workload, not in gem5. If not, I would test in QEMU to
make
>> > sure the binary works there. Another way you could test to see if the
>> > problem is your binary or gem5 would be to run it on real hardware. We
>> have
>> > access to some RISC-V hardware here at UC Davis, if you don't have
access
>> > to it.
>> >
>> > Cheers,
>> > Jason
>> >
>> > On Tue, Sep 20, 2022 at 12:58 AM Νικόλαος Ταμπουρατζής <
>> > ntampourat...@ece.auth.gr> wrote:
>> >
>> >> Dear Bobby,
>> >>
>> >> 1) I use the original riscv-fs.py which is provided in the latest
gem5
>> >> release.
>> >> I run the gem5 once (./build/RISCV/gem5.fast -d ./HPCG_FS_results
>> >> ./configs/example/gem5_library/riscv-fs.py) in order to download the
>> >> riscv-bootloader-vmlinux-5.10 and riscv-disk-img.
>> >> After thi

[gem5-users] Re: HPCG on RISCV

[Νικόλαος Ταμπουρατζής]

Dear Bobby,

Iam trying to add --debug-flags=Exec (building the gem5 for gem5.opt  
not for gem5.fast which I had) but the debug traces exceed the 20GB  
(and it is not finished yet) for less than 1 simulated second. How can  
I reduce the size of the debug-flags (or set something more specific)?


In contrast I build the HPCG benchmark with DHPCG_DEBUG flag. If you  
want, you can compare these two output files  
(hpcg20010909T014640_SE_Mode & HPCG-Benchmark_3.1_FS_Mode). As you can  
see, something goes wrong with the accuracy of calculations in FS mode  
(benchmark uses double precission). You can find the files here:  
http://kition.mhl.tuc.gr:8000/d/68d82f3533/


Best regards,
Nikos

Quoting Jason Lowe-Power :


That's quite odd that it works in SE mode but not FS mode!

I would suggest running with --debug-flags=Exec for both and then perform a
diff to see how they differ.

Cheers,
Jason

On Tue, Sep 20, 2022 at 2:45 PM Νικόλαος Ταμπουρατζής <
ntampourat...@ece.auth.gr> wrote:


Dear Bobby,

In QEMU I get the same (correct) results that I get in SE mode
simulation. I get invalid results in FS simulation (in both
riscv-fs.py and riscv-ubuntu-run.py). I cannot access real RISCV
hardware at this moment, however, if you want you may execute my xhpcg
binary (http://kition.mhl.tuc.gr:8000/f/4ca25fdd3c/) with the
following configuration:

./xhpcg --nx=16 --ny=16 --nz=16 --npx=1 --npy=1 --npz=1 --rt=0.1

Please let me know if you have any updates!

Best regards,
Nikos


Quoting Jason Lowe-Power :

> Hi Nikos,
>
> I notice you said the following in your original email:
>
> In addition, I used the RISCV Ubuntu image
>> (https://github.com/gem5/gem5-resources/tree/stable/src/riscv-ubuntu),
>> I installed the gcc compiler, compile it (through qemu) and I get
>> wrong results too.
>
>
> Is this saying you get the wrong results is QEMU? If so, the bug is in
GCC
> or the HPCG workload, not in gem5. If not, I would test in QEMU to make
> sure the binary works there. Another way you could test to see if the
> problem is your binary or gem5 would be to run it on real hardware. We
have
> access to some RISC-V hardware here at UC Davis, if you don't have access
> to it.
>
> Cheers,
> Jason
>
> On Tue, Sep 20, 2022 at 12:58 AM Νικόλαος Ταμπουρατζής <
> ntampourat...@ece.auth.gr> wrote:
>
>> Dear Bobby,
>>
>> 1) I use the original riscv-fs.py which is provided in the latest gem5
>> release.
>> I run the gem5 once (./build/RISCV/gem5.fast -d ./HPCG_FS_results
>> ./configs/example/gem5_library/riscv-fs.py) in order to download the
>> riscv-bootloader-vmlinux-5.10 and riscv-disk-img.
>> After this I mount the riscv-disk-img (sudo mount -o loop
>> riscv-disk-img /mnt), put the xhpcg executable and I do the following
>> changes in riscv-fs.py to boot the riscv-disk-img with executable:
>>
>> image = CustomDiskImageResource(
>>  local_path = "/home/cossim/.cache/gem5/riscv-disk-img",
>> )
>>
>> # Set the Full System workload.
>> board.set_kernel_disk_workload(
>> kernel=Resource("riscv-bootloader-vmlinux-5.10"),
>> disk_image=image,
>> )
>>
>> Finally, in the gem5/src/python/gem5/components/boards/riscv_board.py
>> I change the last line to "return ["console=ttyS0",
>> "root={root_value}", "rw"]" in order to allow the write permissions in
>> the image.
>>
>>
>> 2) The HPCG benchmark after some iterations calculates if the results
>> are valid or not valid. In the case of FS it gives invalid results. As
>> I see from the results, one (at least) problem is that produces
>> different results in each HPCG execution (with the same configuration).
>>
>> Here is the HPCG output and riscv-fs.py
>> (http://kition.mhl.tuc.gr:8000/d/68d82f3533/). You may reproduce the
>> results in the video if you use the xhpcg executable
>> (http://kition.mhl.tuc.gr:8000/f/4ca25fdd3c/)
>>
>> Please help me in order to solve it!
>>
>> Finally, I get invalid results in the HPL benchmark in FS mode too.
>>
>> Best regards,
>> Nikos
>>
>>
>> Quoting Bobby Bruce :
>>
>> > I'm going to need a bit more information to help:
>> >
>> > 1. In what way have you modified
>> > ./configs/example/gem5_library/riscv-fs.py? Can you attach the script
>> here?
>> > 2. What error are you getting or in what way are the results invalid?
>> >
>> > -
>> > Dr. Bobby R. Bruce
>> > Room 3050,
>> > Kemper Hall, UC Davis
>> > Davis,
>> > CA, 95616
>> >
>> > web: https://www.bobbyb

[gem5-users] Re: HPCG on RISCV

[Νικόλαος Ταμπουρατζής]

Dear Bobby,

In QEMU I get the same (correct) results that I get in SE mode  
simulation. I get invalid results in FS simulation (in both  
riscv-fs.py and riscv-ubuntu-run.py). I cannot access real RISCV  
hardware at this moment, however, if you want you may execute my xhpcg  
binary (http://kition.mhl.tuc.gr:8000/f/4ca25fdd3c/) with the  
following configuration:


./xhpcg --nx=16 --ny=16 --nz=16 --npx=1 --npy=1 --npz=1 --rt=0.1

Please let me know if you have any updates!

Best regards,
Nikos


Quoting Jason Lowe-Power :


Hi Nikos,

I notice you said the following in your original email:

In addition, I used the RISCV Ubuntu image

(https://github.com/gem5/gem5-resources/tree/stable/src/riscv-ubuntu),
I installed the gcc compiler, compile it (through qemu) and I get
wrong results too.



Is this saying you get the wrong results is QEMU? If so, the bug is in GCC
or the HPCG workload, not in gem5. If not, I would test in QEMU to make
sure the binary works there. Another way you could test to see if the
problem is your binary or gem5 would be to run it on real hardware. We have
access to some RISC-V hardware here at UC Davis, if you don't have access
to it.

Cheers,
Jason

On Tue, Sep 20, 2022 at 12:58 AM Νικόλαος Ταμπουρατζής <
ntampourat...@ece.auth.gr> wrote:


Dear Bobby,

1) I use the original riscv-fs.py which is provided in the latest gem5
release.
I run the gem5 once (./build/RISCV/gem5.fast -d ./HPCG_FS_results
./configs/example/gem5_library/riscv-fs.py) in order to download the
riscv-bootloader-vmlinux-5.10 and riscv-disk-img.
After this I mount the riscv-disk-img (sudo mount -o loop
riscv-disk-img /mnt), put the xhpcg executable and I do the following
changes in riscv-fs.py to boot the riscv-disk-img with executable:

image = CustomDiskImageResource(
 local_path = "/home/cossim/.cache/gem5/riscv-disk-img",
)

# Set the Full System workload.
board.set_kernel_disk_workload(
kernel=Resource("riscv-bootloader-vmlinux-5.10"),
disk_image=image,
)

Finally, in the gem5/src/python/gem5/components/boards/riscv_board.py
I change the last line to "return ["console=ttyS0",
"root={root_value}", "rw"]" in order to allow the write permissions in
the image.


2) The HPCG benchmark after some iterations calculates if the results
are valid or not valid. In the case of FS it gives invalid results. As
I see from the results, one (at least) problem is that produces
different results in each HPCG execution (with the same configuration).

Here is the HPCG output and riscv-fs.py
(http://kition.mhl.tuc.gr:8000/d/68d82f3533/). You may reproduce the
results in the video if you use the xhpcg executable
(http://kition.mhl.tuc.gr:8000/f/4ca25fdd3c/)

Please help me in order to solve it!

Finally, I get invalid results in the HPL benchmark in FS mode too.

Best regards,
Nikos


Quoting Bobby Bruce :

> I'm going to need a bit more information to help:
>
> 1. In what way have you modified
> ./configs/example/gem5_library/riscv-fs.py? Can you attach the script
here?
> 2. What error are you getting or in what way are the results invalid?
>
> -
> Dr. Bobby R. Bruce
> Room 3050,
> Kemper Hall, UC Davis
> Davis,
> CA, 95616
>
> web: https://www.bobbybruce.net
>
>
> On Mon, Sep 19, 2022 at 1:43 PM Νικόλαος Ταμπουρατζής <
> ntampourat...@ece.auth.gr> wrote:
>
>>
>> Dear gem5 community,
>>
>> I have successfully cross-compile the HPCG benchmark for RISCV (Serial
>> version, without MPI and OpenMP). While it working properly in gem5 SE
>> mode (./build/RISCV/gem5.fast -d ./HPCG_SE_results
>> ./configs/example/se.py -c xhpcg --options '--nx=16 --ny=16 --nz=16
>> --npx=1 --npy=1 --npz=1 --rt=0.1'), I get invalid results in FS
>> simulation using "./build/RISCV/gem5.fast -d ./HPCG_FS_results
>> ./configs/example/gem5_library/riscv-fs.py" (I mount the riscv image
>> and put it).
>>
>> Can you help me please?
>>
>> In addition, I used the RISCV Ubuntu image
>> (https://github.com/gem5/gem5-resources/tree/stable/src/riscv-ubuntu),
>> I installed the gcc compiler, compile it (through qemu) and I get
>> wrong results too.
>>
>> Here is the Makefile which I use, the hpcg executable for RISCV
>> (xhpcg), and a video that shows the results
>> (http://kition.mhl.tuc.gr:8000/f/4ca25fdd3c/).
>>
>> P.S. I use the latest gem5 version.
>>
>> Thank you in advance! :)
>>
>> Best regards,
>> Nikos
>> ___
>> gem5-users mailing list -- gem5-users@gem5.org
>> To unsubscribe send an email to gem5-users-le...@gem5.org
>>


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[gem5-users] Re: HPCG on RISCV

[Νικόλαος Ταμπουρατζής]

Dear Bobby,

1) I use the original riscv-fs.py which is provided in the latest gem5  
release.
I run the gem5 once (./build/RISCV/gem5.fast -d ./HPCG_FS_results  
./configs/example/gem5_library/riscv-fs.py) in order to download the  
riscv-bootloader-vmlinux-5.10 and riscv-disk-img.
After this I mount the riscv-disk-img (sudo mount -o loop  
riscv-disk-img /mnt), put the xhpcg executable and I do the following  
changes in riscv-fs.py to boot the riscv-disk-img with executable:


image = CustomDiskImageResource(
local_path = "/home/cossim/.cache/gem5/riscv-disk-img",
)

# Set the Full System workload.
board.set_kernel_disk_workload(
   kernel=Resource("riscv-bootloader-vmlinux-5.10"),
   disk_image=image,
)

Finally, in the gem5/src/python/gem5/components/boards/riscv_board.py  
I change the last line to "return ["console=ttyS0",  
"root={root_value}", "rw"]" in order to allow the write permissions in  
the image.



2) The HPCG benchmark after some iterations calculates if the results  
are valid or not valid. In the case of FS it gives invalid results. As  
I see from the results, one (at least) problem is that produces  
different results in each HPCG execution (with the same configuration).


Here is the HPCG output and riscv-fs.py  
(http://kition.mhl.tuc.gr:8000/d/68d82f3533/). You may reproduce the  
results in the video if you use the xhpcg executable  
(http://kition.mhl.tuc.gr:8000/f/4ca25fdd3c/)


Please help me in order to solve it!

Finally, I get invalid results in the HPL benchmark in FS mode too.

Best regards,
Nikos


Quoting Bobby Bruce :


I'm going to need a bit more information to help:

1. In what way have you modified
./configs/example/gem5_library/riscv-fs.py? Can you attach the script here?
2. What error are you getting or in what way are the results invalid?

-
Dr. Bobby R. Bruce
Room 3050,
Kemper Hall, UC Davis
Davis,
CA, 95616

web: https://www.bobbybruce.net


On Mon, Sep 19, 2022 at 1:43 PM Νικόλαος Ταμπουρατζής <
ntampourat...@ece.auth.gr> wrote:



Dear gem5 community,

I have successfully cross-compile the HPCG benchmark for RISCV (Serial
version, without MPI and OpenMP). While it working properly in gem5 SE
mode (./build/RISCV/gem5.fast -d ./HPCG_SE_results
./configs/example/se.py -c xhpcg --options '--nx=16 --ny=16 --nz=16
--npx=1 --npy=1 --npz=1 --rt=0.1'), I get invalid results in FS
simulation using "./build/RISCV/gem5.fast -d ./HPCG_FS_results
./configs/example/gem5_library/riscv-fs.py" (I mount the riscv image
and put it).

Can you help me please?

In addition, I used the RISCV Ubuntu image
(https://github.com/gem5/gem5-resources/tree/stable/src/riscv-ubuntu),
I installed the gcc compiler, compile it (through qemu) and I get
wrong results too.

Here is the Makefile which I use, the hpcg executable for RISCV
(xhpcg), and a video that shows the results
(http://kition.mhl.tuc.gr:8000/f/4ca25fdd3c/).

P.S. I use the latest gem5 version.

Thank you in advance! :)

Best regards,
Nikos
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[gem5-users] HPCG on RISCV

[Νικόλαος Ταμπουρατζής]

Dear gem5 community,

I have successfully cross-compile the HPCG benchmark for RISCV (Serial  
version, without MPI and OpenMP). While it working properly in gem5 SE  
mode (./build/RISCV/gem5.fast -d ./HPCG_SE_results  
./configs/example/se.py -c xhpcg --options '--nx=16 --ny=16 --nz=16  
--npx=1 --npy=1 --npz=1 --rt=0.1'), I get invalid results in FS  
simulation using "./build/RISCV/gem5.fast -d ./HPCG_FS_results  
./configs/example/gem5_library/riscv-fs.py" (I mount the riscv image  
and put it).


Can you help me please?

In addition, I used the RISCV Ubuntu image  
(https://github.com/gem5/gem5-resources/tree/stable/src/riscv-ubuntu),  
I installed the gcc compiler, compile it (through qemu) and I get  
wrong results too.


Here is the Makefile which I use, the hpcg executable for RISCV  
(xhpcg), and a video that shows the results  
(http://kition.mhl.tuc.gr:8000/f/4ca25fdd3c/).


P.S. I use the latest gem5 version.

Thank you in advance! :)

Best regards,
Nikos
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[gem5-users] Re: IGbE / Intel 8254x - NIC support on Gem5 (with #COSSIM changes)

[Νικόλαος Ταμπουρατζής]

Dear rshankar,

First of all, you need to download the COSSIM gem5  
(https://github.com/H2020-COSSIM/cgem5.git). After that, you need to

build the gem5 (scons build/X86/gem5.fast -j4).

In addition, you need to mount the x86-ubuntu.img and add the  
gem5_init.sh in /root using qemu (no m5 commands).


After that, in order to simulate the gem5 in dual mode with NIC you  
need to run


./build/X86/gem5.fast --listener-mode=on ./configs/example/fs.py  
--kernel=vmlinux-5.4.49 --disk-image=x86-ubuntu.img --dual


(place the full path of kernel and disk image)

The 1st terminal is in 3456 port (telnet 127.0.0.1 3456).
The 2nd terminal is in 3457 port (telnet 127.0.0.1 3457).

After boot, you need add the localhost and IP in both terminals (eg.  
ifconfig lo 127.0.0.1 & ifconfig eth0 10.0.1.x), where x 2 and 3). You  
can use "ping -c 1 10.0.1.x" to check the functionality.


If you are not familiar with gem5, we suggest you simulate a simple  
X86 ubuntu FS node (without NIC) before the above steps.


Best regards,
Nikolaos Tampouratzis

Quoting rshank...@austin.rr.com:


Nikos, thanks again for your help.

We each tried to chroot from Ubuntu prompt right after the mount  
commands below (we did not realize of Qemu emulation first or gem5  
contexts)


We'd like to simulate x86 cores with NIC & COSSIM changes in gem5 simulation

Any specific instructions we need to add to simulate in the gem5?

Raghu & Ning (cc'd)


We followed these steps from prior email:

https://github.com/H2020-COSSIM/cgem5/blob/main/src/dev/x86/SouthBridge.py   
(see the lines with #COSSIM)
https://github.com/H2020-COSSIM/cgem5/blob/main/configs/common/FSConfig.py  
(lines 636, 674-676)

Build the gem5
You need download the vmlinux-5.4.49 kernel from here:   
https://github.com/gem5/gem5-resources/tree/stable/src/linux-kernel
You need download the x86-ubuntu.img image from here:
http://dist.gem5.org/dist/v21-2/images/x86/ubuntu-18-04/x86-ubuntu.img.gz

Mount the x86-ubuntu.img and add the gem5_init.sh in /root using:

$ sudo mount -o loop,offset=1048576 x86-ubuntu.img /mnt
$ cd /mnt
$ sudo mount --bind /proc /mnt/proc
$ sudo mount --bind /dev /mnt/dev
$ sudo chroot .
$ cd root



-Original Message-
From: Νικόλαος Ταμπουρατζής 
Sent: Monday, June 20, 2022 10:55 AM
To: The gem5 Users mailing list 
Subject: [gem5-users] Re: IGbE / Intel 8254x - NIC support on Gem5?

Dear rshankar,

Do you try to chroot using qemu or gem5? In addition, the m5  
pseudo-instructions (e.g. m5 readfile) work only inside the gem5  
simulation.


I write you how to mount the x86 image through qemu in order to  
emulate it first, make any changes (using chroot .), and then  
simulate it through gem5 (using m5 pseudo-instructions).


Best regards,
Nikos



Quoting rshank...@austin.rr.com:


Nikolaos & Gem5 community,

Thanks for the detailed instructions to run Full system with NICs with
#COSSIM edits. My project partner and I tried all the way to the end.
Both are experiencing /dev/mem problem as below. We've tried different
ways to change to root owner and chmod, but with no luck

Any help on how to proceed?

Thanks in advance


$ sudo chroot .
Starting gem5 init... reading run script file.
Can't open /dev/mem: Operation not permitted Failed to run m5
readfile, exiting!
Can't open /dev/mem: Operation not permitted
m5 exit failed, dropping to shell.

# m5 readfile
Can't open /dev/mem: Operation not permitted # whoami root # ls -l
/dev/mem
crw-r- 1 root kmem 1, 1 Jun  8 10:38 /dev/mem

# chown root:kmem /dev/mem
# m5 readfile
Can't open /dev/mem: Operation not permitted

# chmod 660 /dev/mem
# m5 readfile
Can't open /dev/mem: Operation not permitted

# chown root:kmem /dev/mem
#
# m5 readfile
Can't open /dev/mem: Operation not permitted

# chmod 666 /dev/mem
# ls -l /dev/mem
crw-rw-rw- 1 root kmem 1, 1 Jun  8 10:38 /dev/mem # # m5 readfile
Can't open /dev/mem: Operation not permitted



-Original Message-
From: Νικόλαος Ταμπουρατζής 
Sent: Wednesday, May 11, 2022 12:10 PM
To: The gem5 Users mailing list 
Subject: [gem5-users] Re: IGbE / Intel 8254x - NIC support on Gem5?

Dear rshankar,

As I know, the NIC in gem5 is worked only with Full System (FS) mode
in order to load the correct drivers etc. You can add the following in
order to add the NIC in FS mode:

https://github.com/H2020-COSSIM/cgem5/blob/main/src/dev/x86/SouthBridg
e.py
(see the lines with #COSSIM)
https://github.com/H2020-COSSIM/cgem5/blob/main/configs/common/FSConfi
g.py
(lines 636, 674-676)

Build the gem5.

You need download the vmlinux-5.4.49 kernel from here:
https://github.com/gem5/gem5-resources/tree/stable/src/linux-kernel

You need download the x86-ubuntu.img image from here:
http://dist.gem5.org/dist/v21-2/images/x86/ubuntu-18-04/x86-ubuntu.img
.gz

Mount the x86-ubuntu.img and add the gem5_init.sh in /root using:

sudo mount -o loop,offset=1048576 x86-ubuntu.img /mnt cd /mnt sudo
mount --bind /proc /mnt/proc sudo mount --bind /dev /mnt

[gem5-users] Re: IGbE / Intel 8254x - NIC support on Gem5?

[Νικόλαος Ταμπουρατζής]

Dear rshankar,

Do you try to chroot using qemu or gem5? In addition, the m5  
pseudo-instructions (e.g. m5 readfile) work only inside the gem5  
simulation.


I write you how to mount the x86 image through qemu in order to  
emulate it first, make any changes (using chroot .), and then simulate  
it through gem5 (using m5 pseudo-instructions).


Best regards,
Nikos



Quoting rshank...@austin.rr.com:


Nikolaos & Gem5 community,

Thanks for the detailed instructions to run Full system with NICs with
#COSSIM edits. My project partner and I tried all the way to the end.
Both are experiencing /dev/mem problem as below. We've tried different ways
to change to root owner and chmod, but with no luck

Any help on how to proceed?

Thanks in advance


$ sudo chroot .
Starting gem5 init... reading run script file.
Can't open /dev/mem: Operation not permitted
Failed to run m5 readfile, exiting!
Can't open /dev/mem: Operation not permitted
m5 exit failed, dropping to shell.

# m5 readfile
Can't open /dev/mem: Operation not permitted
# whoami
root
# ls -l /dev/mem
crw-r- 1 root kmem 1, 1 Jun  8 10:38 /dev/mem

# chown root:kmem /dev/mem
# m5 readfile
Can't open /dev/mem: Operation not permitted

# chmod 660 /dev/mem
# m5 readfile
Can't open /dev/mem: Operation not permitted

# chown root:kmem /dev/mem
#
# m5 readfile
Can't open /dev/mem: Operation not permitted

# chmod 666 /dev/mem
# ls -l /dev/mem
crw-rw-rw- 1 root kmem 1, 1 Jun  8 10:38 /dev/mem
#
# m5 readfile
Can't open /dev/mem: Operation not permitted



-Original Message-
From: Νικόλαος Ταμπουρατζής 
Sent: Wednesday, May 11, 2022 12:10 PM
To: The gem5 Users mailing list 
Subject: [gem5-users] Re: IGbE / Intel 8254x - NIC support on Gem5?

Dear rshankar,

As I know, the NIC in gem5 is worked only with Full System (FS) mode in
order to load the correct drivers etc. You can add the following in order to
add the NIC in FS mode:

https://github.com/H2020-COSSIM/cgem5/blob/main/src/dev/x86/SouthBridge.py
(see the lines with #COSSIM)
https://github.com/H2020-COSSIM/cgem5/blob/main/configs/common/FSConfig.py
(lines 636, 674-676)

Build the gem5.

You need download the vmlinux-5.4.49 kernel from here:
https://github.com/gem5/gem5-resources/tree/stable/src/linux-kernel

You need download the x86-ubuntu.img image from here:
http://dist.gem5.org/dist/v21-2/images/x86/ubuntu-18-04/x86-ubuntu.img.gz

Mount the x86-ubuntu.img and add the gem5_init.sh in /root using:

sudo mount -o loop,offset=1048576 x86-ubuntu.img /mnt cd /mnt sudo mount
--bind /proc /mnt/proc sudo mount --bind /dev /mnt/dev sudo chroot .
cd root
nano gem5_init.sh #Add the following script:

#!/bin/bash

# Copyright (c) 2021 The University of Texas at Austin.
# SPDX-License-Identifier: BSD 3-Clause

echo "Starting gem5 init... reading run script file."
if ! m5 readfile > /tmp/script; then
 echo "Failed to run m5 readfile, exiting!!"
 rm -f /tmp/script
 if ! m5 exit; then
 # Useful for booting the disk image in (e.g.,) qemu for debugging
 echo "m5 exit failed, dropping to shell."
 /bin/sh
 fi
else
 echo "Running m5 script from /tmp/script !!"
 chmod 755 /tmp/script
 /tmp/script
 echo "Done running script, exiting."
 rm -f /tmp/script
 /bin/sh
 #m5 exit
fi



exit
# now we are back to the host system
cd
sudo umount /mnt/proc
sudo umount /mnt/dev
sudo umount /mnt


Now, you may use this cmd to start the FS execution:

/home/cossim/COSSIM/cgem5/build/X86/gem5.fast --listener-mode=on
/home/cossim/COSSIM/cgem5/configs/example/fs.py
--kernel=vmlinux-5.4.49 --disk-image=x86-ubuntu.img --dual

The 1st terminal is in 3456 port (telnet 127.0.0.1 3456) The 2nd terminal is
in 3457 port (telnet 127.0.0.1 3457)

After boot, you need add the localhost and IP in both terminals (eg.
ifconfig lo 127.0.0.1 & ifconfig eth0 10.0.1.x), where x 2 and 3). You can
use "ping -c 1 10.0.1.x" to check the functionality.

If you use the above steps in your work, refer to the following COSSIM
paper, please: https://dl.acm.org/doi/10.1145/3378934

If someone has configured the NIC with SE mode, please give us details! :)

Best regards,
Nikolaos Tampouratzis



Quoting rshank...@austin.rr.com <mailto:rshank...@austin.rr.com> :


Hello,



I'd like to add a NIC to simple Gem5 model derived from two_level.py
running in SE mode, x86 CPU.

Is this supported in Gem5?



Per COSSIM version of gem5 (aka cgem5) states below.  I'd like to stay
on
Gem5 - so any guidance here is appreciated.



GitHub - H2020-COSSIM/cgem5: Modified GEM5 March 2022 release
<https://github.com/H2020-COSSIM/cgem5>



In GEM5's publicly available repositories, the only network interface
card implemented, tested and verified is the Intel 8254x based gigabit
Ethernet adapter. It is provided as a PCI GEM5 network device using
the e1000 Linux driver.

However, the latest version of GEM5 supports this real-ne

[gem5-users] Re: RISCV FS Read-only file system

[Νικόλαος Ταμπουρατζής]

Dear Hoa,

Thank you for the quick answer! It worked! :)

Best regards,
Nikos


Quoting Hoa Nguyen :


Hi Nikos,

I believe it is due to the default kernel params passed to the kernel
https://gem5.googlesource.com/public/gem5/+/refs/heads/develop/src/python/gem5/components/boards/riscv_board.py#487
.

I think it could be fixed by changing "ro" to "rw", which tells the kernel
to mount "/" as read-write.

Regards,
Hoa Nguyen

On Wed, Jun 8, 2022 at 7:37 AM Νικόλαος Ταμπουρατζής <
ntampourat...@ece.auth.gr> wrote:


Dear gem5 community,

I have successfully run RISCV FS using the following command:

./build/RISCV/gem5.opt configs/example/gem5_library/riscv-fs.py

However, I cannot write anything inside the simulated image because I
get "Read-only file system". How can I resolve it?
My benchmark produces a number of files and it cannot write them
during the simulation.

The terminal output:
  _   _  _ _
| | | |/ ___|__ _ _ __ | |   (_)_ __  _   ___  __
| | | | |   / _` | '_ \| |   | | '_ \| | | \ \/ /
| |_| | |__| (_| | | | | |___| | | | | |_| |>  <
  \___/ \\__,_|_| |_|_|_|_| |_|\__,_/_/\_\
Welcome to RiscV

UCanLinux login: root
Password:
root@UCanLinux:~ # ls
index.html
root@UCanLinux:/ # cd /home
root@UCanLinux:/home # ls
root@UCanLinux:/home # mkdir test
mkdir: can't create directory 'test': Read-only file system



Thank you in advance for any help! :)

Best regards,
Nikos
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[gem5-users] RISCV FS Read-only file system

[Νικόλαος Ταμπουρατζής]

Dear gem5 community,

I have successfully run RISCV FS using the following command:

./build/RISCV/gem5.opt configs/example/gem5_library/riscv-fs.py

However, I cannot write anything inside the simulated image because I  
get "Read-only file system". How can I resolve it?
My benchmark produces a number of files and it cannot write them  
during the simulation.


The terminal output:
 _   _  _ _
| | | |/ ___|__ _ _ __ | |   (_)_ __  _   ___  __
| | | | |   / _` | '_ \| |   | | '_ \| | | \ \/ /
| |_| | |__| (_| | | | | |___| | | | | |_| |>  <
 \___/ \\__,_|_| |_|_|_|_| |_|\__,_/_/\_\
Welcome to RiscV

UCanLinux login: root
Password:
root@UCanLinux:~ # ls
index.html
root@UCanLinux:/ # cd /home
root@UCanLinux:/home # ls
root@UCanLinux:/home # mkdir test
mkdir: can't create directory 'test': Read-only file system



Thank you in advance for any help! :)

Best regards,
Nikos
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[gem5-users] Re: Store changes in image after FS termination

[Νικόλαος Ταμπουρατζής]

Dear Heng,

Thank you very much for the quick answer!!

However, I would like to save a number of files. Finally, I manage to  
save the changes by replacing the following lines in starter_fs.py:


FROM:
image = CowDiskImage()
image.child.image_file = SysPaths.disk(name)

TO:
image = RawDiskImage(read_only=False)
image.image_file = SysPaths.disk(name)

Best regards,
Nikos


Quoting HENG ZHUO :


Hi Nikos,

I think the unsaved changes are intended behavior, so same disk  
image can be used to repeat experiment.


As for saving files, you can do this : m5 writefile fileToSave , and  
files will be saved into your run folder. It is similar to how " m5  
readfile" at the beginning.


Best,
Heng


On May 17, 2022, at 09:59, Νικόλαος Ταμπουρατζής  
 wrote:



Dear gem5 community,

I simulate the official ubuntu 18.04 image using FS simulation  
($GEM5/build/ARM/gem5.fast -d $GEM5/node0  
$GEM5/configs/example/arm/starter_fs.py --kernel=vmlinux.arm64  
--num-cores=8 --disk-image=ubuntu-18.04-arm64-docker.img)


However, I see that the changes inside the simulated image are not  
saved after the correct gem5 termination (m5 exit).


I run a benchmark that saves a number of files during execution.  
How can I keep that files after gem5 execution?


Thanks in advance!
Best regards,
Nikos
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[gem5-users] Store changes in image after FS termination

[Νικόλαος Ταμπουρατζής]

Dear gem5 community,

I simulate the official ubuntu 18.04 image using FS simulation  
($GEM5/build/ARM/gem5.fast -d $GEM5/node0  
$GEM5/configs/example/arm/starter_fs.py --kernel=vmlinux.arm64  
--num-cores=8 --disk-image=ubuntu-18.04-arm64-docker.img)


However, I see that the changes inside the simulated image are not  
saved after the correct gem5 termination (m5 exit).


I run a benchmark that saves a number of files during execution. How  
can I keep that files after gem5 execution?


Thanks in advance!
Best regards,
Nikos
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[gem5-users] Re: IGbE / Intel 8254x - NIC support on Gem5?

[Νικόλαος Ταμπουρατζής]

We have not synchronize the COSSIM code in official gem5 release because it 
requires HLA libriries. 

> 11 Μαΐ 2022, 11:13 μμ, ο χρήστης «Νικόλαος Ταμπουρατζής 
> » έγραψε:
> 
> Dear Raghu,
> 
> The steps which I sent you is for dual gem5 (not for cgem5). In this 
> scenario, two gem5s is connected through Etherlink (virtual dummy link) 
> without switches etc. Also in this scenario both two gem5s is working in one 
> thread (for this reason does not need synchronization). So you do not need 
> the COSSIM and cgem5. You only need download the latest official gem5 and 
> patch it using my previous steps to add the NIC.
> 
> COSSIM uses OMNET++ and it is much more complex as you can see in the paper.
> 
> Best regards,
> Nikolaos Tampouratzis
> 
> 
>> 11 Μαΐ 2022, 11:02 μμ, ο χρήστης «rshank...@austin.rr.com» έγραψε:
>> 
>> Nikolaos.
>> A related question - Are the 2 code streams of cgem5 & gem5 - kept 
>> consistent to each other?  So users can benefit from updates on either 
>> stream (I'm not sure how that works today). If one switches to cgem5 stream 
>> do we lose improvements happening on gem5 stream?
>> 
>> Also, thanks for your research work, community share of COSSIM gem5, and 
>> paper below (which I had a copy from before )
>> 
>> Raghu
>> 
>> -Original Message-
>> From: rshank...@austin.rr.com  
>> Sent: Wednesday, May 11, 2022 12:58 PM
>> To: 'The gem5 Users mailing list' 
>> Subject: [gem5-users] Re: IGbE / Intel 8254x - NIC support on Gem5?
>> 
>> Thanks very much Nikolaos for the detailed step-by-step response. This is 
>> highly appreciated.  I'll try and get back 
>> 
>> Raghu 
>> 
>> -Original Message-
>> From: Νικόλαος Ταμπουρατζής 
>> Sent: Wednesday, May 11, 2022 12:10 PM
>> To: The gem5 Users mailing list 
>> Subject: [gem5-users] Re: IGbE / Intel 8254x - NIC support on Gem5?
>> 
>> Dear rshankar,
>> 
>> As I know, the NIC in gem5 is worked only with Full System (FS) mode in 
>> order to load the correct drivers etc. You can add the following in order to 
>> add the NIC in FS mode:
>> 
>> https://github.com/H2020-COSSIM/cgem5/blob/main/src/dev/x86/SouthBridge.py
>> (see the lines with #COSSIM)
>> https://github.com/H2020-COSSIM/cgem5/blob/main/configs/common/FSConfig.py
>> (lines 636, 674-676)
>> 
>> Build the gem5.
>> 
>> You need download the vmlinux-5.4.49 kernel from here:  
>> https://github.com/gem5/gem5-resources/tree/stable/src/linux-kernel
>> 
>> You need download the x86-ubuntu.img image from here:  
>> http://dist.gem5.org/dist/v21-2/images/x86/ubuntu-18-04/x86-ubuntu.img.gz
>> 
>> Mount the x86-ubuntu.img and add the gem5_init.sh in /root using:
>> 
>> sudo mount -o loop,offset=1048576 x86-ubuntu.img /mnt cd /mnt sudo mount 
>> --bind /proc /mnt/proc sudo mount --bind /dev /mnt/dev sudo chroot .
>> cd root
>> nano gem5_init.sh #Add the following script:
>> 
>> #!/bin/bash
>> 
>> # Copyright (c) 2021 The University of Texas at Austin.
>> # SPDX-License-Identifier: BSD 3-Clause
>> 
>> echo "Starting gem5 init... reading run script file."
>> if ! m5 readfile > /tmp/script; then
>>echo "Failed to run m5 readfile, exiting!!"
>>rm -f /tmp/script
>>if ! m5 exit; then
>># Useful for booting the disk image in (e.g.,) qemu for debugging
>>echo "m5 exit failed, dropping to shell."
>>/bin/sh
>>fi
>> else
>>echo "Running m5 script from /tmp/script !!"
>>chmod 755 /tmp/script
>>/tmp/script
>>echo "Done running script, exiting."
>>rm -f /tmp/script
>>/bin/sh
>>#m5 exit
>> fi
>> 
>> 
>> 
>> exit
>> # now we are back to the host system
>> cd
>> sudo umount /mnt/proc
>> sudo umount /mnt/dev
>> sudo umount /mnt
>> 
>> 
>> Now, you may use this cmd to start the FS execution:
>> 
>> /home/cossim/COSSIM/cgem5/build/X86/gem5.fast --listener-mode=on 
>> /home/cossim/COSSIM/cgem5/configs/example/fs.py
>> --kernel=vmlinux-5.4.49 --disk-image=x86-ubuntu.img --dual
>> 
>> The 1st terminal is in 3456 port (telnet 127.0.0.1 3456) The 2nd terminal is 
>> in 3457 port (telnet 127.0.0.1 3457)
>> 
>> After boot, you need add the localhost and IP in both terminals (eg.  
>> ifconfig lo 127.0.0.1 & ifconfig eth0 10.0.1.x), where x 2 and 3). You can 
>> use "ping -c 1 10.0.1.x" to check the f

[gem5-users] Re: IGbE / Intel 8254x - NIC support on Gem5?

[Νικόλαος Ταμπουρατζής]

Dear Raghu,

The steps which I sent you is for dual gem5 (not for cgem5). In this scenario, 
two gem5s is connected through Etherlink (virtual dummy link) without switches 
etc. Also in this scenario both two gem5s is working in one thread (for this 
reason does not need synchronization). So you do not need the COSSIM and cgem5. 
You only need download the latest official gem5 and patch it using my previous 
steps to add the NIC.

COSSIM uses OMNET++ and it is much more complex as you can see in the paper.

Best regards,
Nikolaos Tampouratzis


> 11 Μαΐ 2022, 11:02 μμ, ο χρήστης «rshank...@austin.rr.com» έγραψε:
> 
> Nikolaos.
> A related question - Are the 2 code streams of cgem5 & gem5 - kept consistent 
> to each other?  So users can benefit from updates on either stream (I'm not 
> sure how that works today). If one switches to cgem5 stream do we lose 
> improvements happening on gem5 stream?
> 
> Also, thanks for your research work, community share of COSSIM gem5, and 
> paper below (which I had a copy from before )
> 
> Raghu
> 
> -Original Message-
> From: rshank...@austin.rr.com  
> Sent: Wednesday, May 11, 2022 12:58 PM
> To: 'The gem5 Users mailing list' 
> Subject: [gem5-users] Re: IGbE / Intel 8254x - NIC support on Gem5?
> 
> Thanks very much Nikolaos for the detailed step-by-step response. This is 
> highly appreciated.  I'll try and get back 
> 
> Raghu 
> 
> -Original Message-
> From: Νικόλαος Ταμπουρατζής 
> Sent: Wednesday, May 11, 2022 12:10 PM
> To: The gem5 Users mailing list 
> Subject: [gem5-users] Re: IGbE / Intel 8254x - NIC support on Gem5?
> 
> Dear rshankar,
> 
> As I know, the NIC in gem5 is worked only with Full System (FS) mode in order 
> to load the correct drivers etc. You can add the following in order to add 
> the NIC in FS mode:
> 
> https://github.com/H2020-COSSIM/cgem5/blob/main/src/dev/x86/SouthBridge.py
> (see the lines with #COSSIM)
> https://github.com/H2020-COSSIM/cgem5/blob/main/configs/common/FSConfig.py
> (lines 636, 674-676)
> 
> Build the gem5.
> 
> You need download the vmlinux-5.4.49 kernel from here:  
> https://github.com/gem5/gem5-resources/tree/stable/src/linux-kernel
> 
> You need download the x86-ubuntu.img image from here:  
> http://dist.gem5.org/dist/v21-2/images/x86/ubuntu-18-04/x86-ubuntu.img.gz
> 
> Mount the x86-ubuntu.img and add the gem5_init.sh in /root using:
> 
> sudo mount -o loop,offset=1048576 x86-ubuntu.img /mnt cd /mnt sudo mount 
> --bind /proc /mnt/proc sudo mount --bind /dev /mnt/dev sudo chroot .
> cd root
> nano gem5_init.sh #Add the following script:
> 
> #!/bin/bash
> 
> # Copyright (c) 2021 The University of Texas at Austin.
> # SPDX-License-Identifier: BSD 3-Clause
> 
> echo "Starting gem5 init... reading run script file."
> if ! m5 readfile > /tmp/script; then
> echo "Failed to run m5 readfile, exiting!!"
> rm -f /tmp/script
> if ! m5 exit; then
> # Useful for booting the disk image in (e.g.,) qemu for debugging
> echo "m5 exit failed, dropping to shell."
> /bin/sh
> fi
> else
> echo "Running m5 script from /tmp/script !!"
> chmod 755 /tmp/script
> /tmp/script
> echo "Done running script, exiting."
> rm -f /tmp/script
> /bin/sh
> #m5 exit
> fi
> 
> 
> 
> exit
> # now we are back to the host system
> cd
> sudo umount /mnt/proc
> sudo umount /mnt/dev
> sudo umount /mnt
> 
> 
> Now, you may use this cmd to start the FS execution:
> 
> /home/cossim/COSSIM/cgem5/build/X86/gem5.fast --listener-mode=on 
> /home/cossim/COSSIM/cgem5/configs/example/fs.py
> --kernel=vmlinux-5.4.49 --disk-image=x86-ubuntu.img --dual
> 
> The 1st terminal is in 3456 port (telnet 127.0.0.1 3456) The 2nd terminal is 
> in 3457 port (telnet 127.0.0.1 3457)
> 
> After boot, you need add the localhost and IP in both terminals (eg.  
> ifconfig lo 127.0.0.1 & ifconfig eth0 10.0.1.x), where x 2 and 3). You can 
> use "ping -c 1 10.0.1.x" to check the functionality.
> 
> If you use the above steps in your work, refer to the following COSSIM paper, 
> please: https://dl.acm.org/doi/10.1145/3378934
> 
> If someone has configured the NIC with SE mode, please give us details! :)
> 
> Best regards,
> Nikolaos Tampouratzis
> 
> 
> 
> Quoting rshank...@austin.rr.com:
> 
>> Hello,
>> 
>> 
>> 
>> I'd like to add a NIC to simple Gem5 model derived from two_level.py 
>> running in SE mode, x86 CPU.
>> 
>> Is this supported in Gem5?
>> 
>> 
>> 
>> Per COSSIM version of gem5 (aka cgem5) states below.  I'd li

[gem5-users] Re: IGbE / Intel 8254x - NIC support on Gem5?

[Νικόλαος Ταμπουρατζής]

Dear rshankar,

As I know, the NIC in gem5 is worked only with Full System (FS) mode  
in order to load the correct drivers etc. You can add the following in  
order to add the NIC in FS mode:


https://github.com/H2020-COSSIM/cgem5/blob/main/src/dev/x86/SouthBridge.py  
(see the lines with #COSSIM)
https://github.com/H2020-COSSIM/cgem5/blob/main/configs/common/FSConfig.py  
(lines 636, 674-676)


Build the gem5.

You need download the vmlinux-5.4.49 kernel from here:  
https://github.com/gem5/gem5-resources/tree/stable/src/linux-kernel


You need download the x86-ubuntu.img image from here:  
http://dist.gem5.org/dist/v21-2/images/x86/ubuntu-18-04/x86-ubuntu.img.gz


Mount the x86-ubuntu.img and add the gem5_init.sh in /root using:

sudo mount -o loop,offset=1048576 x86-ubuntu.img /mnt
cd /mnt
sudo mount --bind /proc /mnt/proc
sudo mount --bind /dev /mnt/dev
sudo chroot .
cd root
nano gem5_init.sh #Add the following script:

#!/bin/bash

# Copyright (c) 2021 The University of Texas at Austin.
# SPDX-License-Identifier: BSD 3-Clause

echo "Starting gem5 init... reading run script file."
if ! m5 readfile > /tmp/script; then
echo "Failed to run m5 readfile, exiting!!"
rm -f /tmp/script
if ! m5 exit; then
# Useful for booting the disk image in (e.g.,) qemu for debugging
echo "m5 exit failed, dropping to shell."
/bin/sh
fi
else
echo "Running m5 script from /tmp/script !!"
chmod 755 /tmp/script
/tmp/script
echo "Done running script, exiting."
rm -f /tmp/script
/bin/sh
#m5 exit
fi



exit
# now we are back to the host system
cd
sudo umount /mnt/proc
sudo umount /mnt/dev
sudo umount /mnt


Now, you may use this cmd to start the FS execution:

/home/cossim/COSSIM/cgem5/build/X86/gem5.fast --listener-mode=on  
/home/cossim/COSSIM/cgem5/configs/example/fs.py  
--kernel=vmlinux-5.4.49 --disk-image=x86-ubuntu.img --dual


The 1st terminal is in 3456 port (telnet 127.0.0.1 3456)
The 2nd terminal is in 3457 port (telnet 127.0.0.1 3457)

After boot, you need add the localhost and IP in both terminals (eg.  
ifconfig lo 127.0.0.1 & ifconfig eth0 10.0.1.x), where x 2 and 3). You  
can use "ping -c 1 10.0.1.x" to check the functionality.


If you use the above steps in your work, refer to the following COSSIM  
paper, please: https://dl.acm.org/doi/10.1145/3378934


If someone has configured the NIC with SE mode, please give us details! :)

Best regards,
Nikolaos Tampouratzis



Quoting rshank...@austin.rr.com:


Hello,



I'd like to add a NIC to simple Gem5 model derived from two_level.py running
in SE mode, x86 CPU.

Is this supported in Gem5?



Per COSSIM version of gem5 (aka cgem5) states below.  I'd like to stay on
Gem5 - so any guidance here is appreciated.



GitHub - H2020-COSSIM/cgem5: Modified GEM5 March 2022 release




In GEM5's publicly available repositories, the only network interface card
implemented, tested and verified is the Intel 8254x based gigabit Ethernet
adapter. It is provided as a PCI GEM5 network device using the e1000 Linux
driver.

However, the latest version of GEM5 supports this real-network device only
on ARM-based architectures. In the scope of COSSIM, GEM5 has been recently
modified so as to support the Intel 8254x network card for the x86 ISA



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[gem5-users] Re: riscv-ubuntu 20.04 FS mode

[Νικόλαος Ταμπουρατζής via gem5-users]

Dear Bobby,

Thank you very much for your suggestion! Iam able to run the RISCV  
full image without problems (after 8 hours). The problem was that it  
requires more than 20GB of RAM in order to complete the process and my  
machine has only 16GB, as a result the OS killed the process as soon  
as the RΑΜ + swap was full. I run the gem5 in a server and the process  
is completed normally. If you create a lighter RISCV gem5-compatible  
image which requires less RAM and boot time please let me know! :)


Best regards,
Nikos

Quoting Bobby Bruce :


Nikos,

You shouldn't need to modify this example script at all to use the latest
disk image (it'll be downloaded automatically). You should try reverting
your changes, recompiling your gem5 (just in case) and try again. It'll
take a while, perhaps 7 hours or so to complete. I'd try that to see if it
resolves the issue.

--
Dr. Bobby R. Bruce
Room 3050,
Kemper Hall, UC Davis
Davis,
CA, 95616

web: https://www.bobbybruce.net


On Mon, Mar 21, 2022 at 1:31 PM Νικόλαος Ταμπουρατζής <
ntampourat...@ece.auth.gr> wrote:


I use the following configuration:

$GEM5/build/RISCV/gem5.fast -d $GEM5/node0
$GEM5/configs/example/gem5_library/riscv-ubuntu-run.py

To be noticed that I have changed the riscv-ubuntu-run.py in order to
use your new image as follows:

...
image = CustomDiskImageResource(
 local_path = "$HOME/kernels/disks/riscv-ubuntu.img",
 disk_root_partition = "1", # This is the partition in the disk
image to use. 'None' if there is no disk image
)


board.set_kernel_disk_workload(
 # The RISCV bootloader will be automatically downloaded to the
 # `~/.cache/gem5` directory if not already present.
 # The riscv-ubuntu boot-test was tested with riscv-bootloader-5.10
 kernel=Resource(
 "riscv-bootloader-vmlinux-5.10",
 ),
 disk_image = image,
)
...

Best regards,
Nikos

Quoting Bobby Bruce :

> What configuration script are you using?
>
> --
> Dr. Bobby R. Bruce
> Room 3050,
> Kemper Hall, UC Davis
> Davis,
> CA, 95616
>
> web: https://www.bobbybruce.net
>
>
> On Mon, Mar 21, 2022 at 9:50 AM Νικόλαος Ταμπουρατζής via gem5-users <
> gem5-users@gem5.org> wrote:
>
>> Dear Boddy,
>>
>> Thank you for the image and instructions! However, when I try to
>> simulate the image through gem5, after 3 hours the gem5 simulation is
>> automatically killed (after  the following terminal output)
>>
>> .
>>
>> [  OK  ] Started Unattended Upgrades Shutdown.
>> [  OK  ] Started LSB: automatic crash report generation.
>> [  OK  ] Finished Hold until boot process finishes up.
>> [  OK  ] Finished Terminate Plymouth Boot Screen.
>> [  OK  ] Started Serial Getty on hvc0.
>> [  OK  ] Started Serial Getty on ttyS0.
>>   Starting Set console scheme...
>>
>> As a result, the terminal prompt is not shown...
>>
>>
>> To be noticed that the gem5 output is the following:
>>
>> ..
>> build/RISCV/arch/riscv/isa.cc:559: warn: 2647474672536: context 1:
>> 17 consecutive SC failures.
>> build/RISCV/arch/riscv/isa.cc:559: warn: 2680581940794: context 0:
>> 16 consecutive SC failures.
>> build/RISCV/arch/riscv/isa.cc:559: warn: 2818816451577: context 1:
>> 18 consecutive SC failures.
>> Killed
>>
>>
>> Best regards,
>> Nikos
>>
>>
>> Quoting Bobby Bruce via gem5-users :
>>
>> > Hey Nikos,
>> >
>> > While not any faster, this new disk image,
>> >
>>
http://dist.gem5.org/v21-2/images/riscv/ubuntu-20-04/riscv-ubuntu-20220318.img.gz
>> ,
>> > has been uploaded. We believe it's more stable. The older one
>> occasionally
>> > didn't boot correctly (at least on our end). This is the same
resource,
>> so
>> > your scripts should continue to work, but now they'll pull this image
>> which
>> > we believe is more stable. Sorry we took so long getting this live.
>> >
>> > Kind regards,
>> > Bobby
>> > --
>> > Dr. Bobby R. Bruce
>> > Room 3050,
>> > Kemper Hall, UC Davis
>> > Davis,
>> > CA, 95616
>> >
>> > web: https://www.bobbybruce.net
>> >
>> >
>> > On Mon, Mar 14, 2022 at 12:08 PM Νικόλαος Ταμπουρατζής <
>> > ntampourat...@ece.auth.gr> wrote:
>> >
>> >> Dear Boddy,
>> >>
>> >> I have used the same gem5_init.sh in gem5 X86 architecture and all
>> >> systemd services bypassed and it is working properly without
READ-ONLY
>> >> permissions. So, I believe that it is related either to riscv-image
or
>> >&g

[gem5-users] Re: riscv-ubuntu 20.04 FS mode

[Νικόλαος Ταμπουρατζής via gem5-users]

I use the following configuration:

$GEM5/build/RISCV/gem5.fast -d $GEM5/node0  
$GEM5/configs/example/gem5_library/riscv-ubuntu-run.py


To be noticed that I have changed the riscv-ubuntu-run.py in order to  
use your new image as follows:


...
image = CustomDiskImageResource(
local_path = "$HOME/kernels/disks/riscv-ubuntu.img",
disk_root_partition = "1", # This is the partition in the disk  
image to use. 'None' if there is no disk image

)


board.set_kernel_disk_workload(
# The RISCV bootloader will be automatically downloaded to the
# `~/.cache/gem5` directory if not already present.
# The riscv-ubuntu boot-test was tested with riscv-bootloader-5.10
kernel=Resource(
"riscv-bootloader-vmlinux-5.10",
),
disk_image = image,
)
...

Best regards,
Nikos

Quoting Bobby Bruce :


What configuration script are you using?

--
Dr. Bobby R. Bruce
Room 3050,
Kemper Hall, UC Davis
Davis,
CA, 95616

web: https://www.bobbybruce.net


On Mon, Mar 21, 2022 at 9:50 AM Νικόλαος Ταμπουρατζής via gem5-users <
gem5-users@gem5.org> wrote:


Dear Boddy,

Thank you for the image and instructions! However, when I try to
simulate the image through gem5, after 3 hours the gem5 simulation is
automatically killed (after  the following terminal output)

.

[  OK  ] Started Unattended Upgrades Shutdown.
[  OK  ] Started LSB: automatic crash report generation.
[  OK  ] Finished Hold until boot process finishes up.
[  OK  ] Finished Terminate Plymouth Boot Screen.
[  OK  ] Started Serial Getty on hvc0.
[  OK  ] Started Serial Getty on ttyS0.
  Starting Set console scheme...

As a result, the terminal prompt is not shown...


To be noticed that the gem5 output is the following:

..
build/RISCV/arch/riscv/isa.cc:559: warn: 2647474672536: context 1:
17 consecutive SC failures.
build/RISCV/arch/riscv/isa.cc:559: warn: 2680581940794: context 0:
16 consecutive SC failures.
build/RISCV/arch/riscv/isa.cc:559: warn: 2818816451577: context 1:
18 consecutive SC failures.
Killed


Best regards,
Nikos


Quoting Bobby Bruce via gem5-users :

> Hey Nikos,
>
> While not any faster, this new disk image,
>
http://dist.gem5.org/v21-2/images/riscv/ubuntu-20-04/riscv-ubuntu-20220318.img.gz
,
> has been uploaded. We believe it's more stable. The older one
occasionally
> didn't boot correctly (at least on our end). This is the same resource,
so
> your scripts should continue to work, but now they'll pull this image
which
> we believe is more stable. Sorry we took so long getting this live.
>
> Kind regards,
> Bobby
> --
> Dr. Bobby R. Bruce
> Room 3050,
> Kemper Hall, UC Davis
> Davis,
> CA, 95616
>
> web: https://www.bobbybruce.net
>
>
> On Mon, Mar 14, 2022 at 12:08 PM Νικόλαος Ταμπουρατζής <
> ntampourat...@ece.auth.gr> wrote:
>
>> Dear Boddy,
>>
>> I have used the same gem5_init.sh in gem5 X86 architecture and all
>> systemd services bypassed and it is working properly without READ-ONLY
>> permissions. So, I believe that it is related either to riscv-image or
>> gem5 configuration.
>>
>> Best regards,
>> Nikos
>>
>>
>>
>> Quoting Bobby Bruce :
>>
>> > Ok, I just thought about this a bit further, if you skip all the init
>> > processes in this manner the OS will boot as read-only. This is by
>> design.
>> > So while you can pass a script here, it can only do read-only things.
>> Your
>> > choices are either to boot properly (with standard init stuff) or
accept
>> > this restriction.
>> >
>> > --
>> > Dr. Bobby R. Bruce
>> > Room 3050,
>> > Kemper Hall, UC Davis
>> > Davis,
>> > CA, 95616
>> >
>> > web: https://www.bobbybruce.net
>> >
>> >
>> > On Mon, Mar 14, 2022 at 11:38 AM Νικόλαος Ταμπουρατζής <
>> > ntampourat...@ece.auth.gr> wrote:
>> >
>> >> Thank you Boddy!
>> >>
>> >> I have also used this image but I get the same READ-ONLY problem.
>> >> However, I would like to use Ubuntu in order to install packages
using
>> >> apt-get install through qemu. Using the "init=/root/gem5_init.sh"
>> >> command both images boot only in 10 minutes.
>> >>
>> >> Best regards,
>> >> Nikos
>> >>
>> >>
>> >> Quoting Bobby Bruce :
>> >>
>> >> > Just remembered: If you're wanting to bi-pass large parts of the
>> Ubuntu
>> >> OS
>> >> > like this, you may just want to use the "riscv-disk-image" (
>> >> >
>> http://dist.gem5.org/dist/v21-2/images/riscv/busybox/ri

[gem5-users] Re: riscv-ubuntu 20.04 FS mode

[Νικόλαος Ταμπουρατζής via gem5-users]

Dear Boddy,

Thank you for the image and instructions! However, when I try to  
simulate the image through gem5, after 3 hours the gem5 simulation is  
automatically killed (after  the following terminal output)


.

[  OK  ] Started Unattended Upgrades Shutdown.
[  OK  ] Started LSB: automatic crash report generation.
[  OK  ] Finished Hold until boot process finishes up.
[  OK  ] Finished Terminate Plymouth Boot Screen.
[  OK  ] Started Serial Getty on hvc0.
[  OK  ] Started Serial Getty on ttyS0.
 Starting Set console scheme...

As a result, the terminal prompt is not shown...


To be noticed that the gem5 output is the following:

..
build/RISCV/arch/riscv/isa.cc:559: warn: 2647474672536: context 1:  
17 consecutive SC failures.
build/RISCV/arch/riscv/isa.cc:559: warn: 2680581940794: context 0:  
16 consecutive SC failures.
build/RISCV/arch/riscv/isa.cc:559: warn: 2818816451577: context 1:  
18 consecutive SC failures.

Killed


Best regards,
Nikos


Quoting Bobby Bruce via gem5-users :


Hey Nikos,

While not any faster, this new disk image,
http://dist.gem5.org/v21-2/images/riscv/ubuntu-20-04/riscv-ubuntu-20220318.img.gz,
has been uploaded. We believe it's more stable. The older one occasionally
didn't boot correctly (at least on our end). This is the same resource, so
your scripts should continue to work, but now they'll pull this image which
we believe is more stable. Sorry we took so long getting this live.

Kind regards,
Bobby
--
Dr. Bobby R. Bruce
Room 3050,
Kemper Hall, UC Davis
Davis,
CA, 95616

web: https://www.bobbybruce.net


On Mon, Mar 14, 2022 at 12:08 PM Νικόλαος Ταμπουρατζής <
ntampourat...@ece.auth.gr> wrote:


Dear Boddy,

I have used the same gem5_init.sh in gem5 X86 architecture and all
systemd services bypassed and it is working properly without READ-ONLY
permissions. So, I believe that it is related either to riscv-image or
gem5 configuration.

Best regards,
Nikos



Quoting Bobby Bruce :

> Ok, I just thought about this a bit further, if you skip all the init
> processes in this manner the OS will boot as read-only. This is by
design.
> So while you can pass a script here, it can only do read-only things.
Your
> choices are either to boot properly (with standard init stuff) or accept
> this restriction.
>
> --
> Dr. Bobby R. Bruce
> Room 3050,
> Kemper Hall, UC Davis
> Davis,
> CA, 95616
>
> web: https://www.bobbybruce.net
>
>
> On Mon, Mar 14, 2022 at 11:38 AM Νικόλαος Ταμπουρατζής <
> ntampourat...@ece.auth.gr> wrote:
>
>> Thank you Boddy!
>>
>> I have also used this image but I get the same READ-ONLY problem.
>> However, I would like to use Ubuntu in order to install packages using
>> apt-get install through qemu. Using the "init=/root/gem5_init.sh"
>> command both images boot only in 10 minutes.
>>
>> Best regards,
>> Nikos
>>
>>
>> Quoting Bobby Bruce :
>>
>> > Just remembered: If you're wanting to bi-pass large parts of the
Ubuntu
>> OS
>> > like this, you may just want to use the "riscv-disk-image" (
>> >
http://dist.gem5.org/dist/v21-2/images/riscv/busybox/riscv-disk.img.gz),
>> an
>> > example usage of which can be found in
>> > "configs/example/gem5_library/riscv-fs.py":
>> >
>> > ```
>> > ./build/RISCV/gem5.opt configs/example/gem5_library/riscv-fs.py
>> > ```
>> >
>> > This disk image is based on BusyBox, which is very light-weight. The
>> source
>> > for building this image is found here:
>> >
>>
https://gem5.googlesource.com/public/gem5-resources/+/refs/heads/stable/src/riscv-fs
>> >
>> > --
>> > Dr. Bobby R. Bruce
>> > Room 3050,
>> > Kemper Hall, UC Davis
>> > Davis,
>> > CA, 95616
>> >
>> > web: https://www.bobbybruce.net
>> >
>> >
>> > On Mon, Mar 14, 2022 at 11:12 AM Bobby Bruce 
wrote:
>> >
>> >> Oh I see, I understand now. I thought you managed to disable some
>> systemd
>> >> jobs (something I think Hoa struggled with), but you're just
bypassing
>> them
>> >> by setting init to a script.
>> >>
>> >> Nice, I'll let you know when the new image is available. I'll see if
I
>> can
>> >> reproduce the error you found with the READ-ONLY problem on the new
>> image.
>> >>
>> >> --
>> >> Dr. Bobby R. Bruce
>> >> Room 3050,
>> >> Kemper Hall, UC Davis
>> >> Davis,
>> >> CA, 95616
>> >>
>> >> web: https://www.bobbybruce.net
>> >>
>> >>
>> >> On Mon, Mar 14, 20

[gem5-users] Re: Gem5 FS mode exit after booting

[Νικόλαος Ταμπουρατζής via gem5-users]

Dear Waliullah,

I think that the image has a gem5_init script that executes the m5  
exit command. You can use the image from gem5 resources  
(http://dist.gem5.org/dist/v21-2/images/x86/ubuntu-18-04/x86-ubuntu.img.gz)  
with vmlinux-5.4.49 kernel  
(http://dist.gem5.org/dist/v21-2/kernels/x86/static/vmlinux-5.4.49).  
Then you need to emulate the image and change the gem5_init.sh in  
order to get the terminal:


sudo apt-get install qemu qemu-user-static qemu-user
sudo mount -o loop,offset=1048576  
$HOME/COSSIM/kernels/disks/x86-ubuntu.img /mnt

cd /mnt
sudo mount --bind /proc /mnt/proc
sudo mount --bind /dev /mnt/dev
sudo chroot .

nano root/gem5_init.sh #Change the line 21 from m5 exit to /bin/sh

exit
# now we are back to the host system
cd
sudo umount /mnt/proc
sudo umount /mnt/dev
sudo umount /mnt


Now you can simulate using the gem5.

Best regards,
Nikos




Quoting Waliullah Mridha via gem5-users :


Hi,
I am a new user trying to run Gem5 in FS mode. My command line is  
given bellow. I also attached a terminal to see the output.  
Everything looks good except Gem5 exit after the boot process  
finishes. On Gem5 run terminal I got the message  
"[cid:image004.png@01D8394B.885BD600]".
Shouldn't I see a linux command prompt in the attached terminal  
instead of exiting after boot complete.
Just wondering if the disk image I am using (downloaded from  
gs://dist/gem5.org/dist/current/images/x86) has any init script that  
causes this exit?

Appreciate your help.
Thanks

Here is my command line.
[cid:image002.png@01D8394B.885BD600]

Here is the output from gem5:
[cid:image003.png@01D8394B.885BD600]
.
.
[cid:image004.png@01D8394B.885BD600]


Here is the output from the terminal:
.
.
[cid:image001.png@01D8394C.E5439960]



___
gem5-users mailing list -- gem5-users@gem5.org
To unsubscribe send an email to gem5-users-le...@gem5.org
%(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s

[gem5-users] Re: riscv-ubuntu 20.04 FS mode

[Νικόλαος Ταμπουρατζής via gem5-users]

Dear Boddy,

I have used the same gem5_init.sh in gem5 X86 architecture and all  
systemd services bypassed and it is working properly without READ-ONLY  
permissions. So, I believe that it is related either to riscv-image or  
gem5 configuration.


Best regards,
Nikos



Quoting Bobby Bruce :


Ok, I just thought about this a bit further, if you skip all the init
processes in this manner the OS will boot as read-only. This is by design.
So while you can pass a script here, it can only do read-only things. Your
choices are either to boot properly (with standard init stuff) or accept
this restriction.

--
Dr. Bobby R. Bruce
Room 3050,
Kemper Hall, UC Davis
Davis,
CA, 95616

web: https://www.bobbybruce.net


On Mon, Mar 14, 2022 at 11:38 AM Νικόλαος Ταμπουρατζής <
ntampourat...@ece.auth.gr> wrote:


Thank you Boddy!

I have also used this image but I get the same READ-ONLY problem.
However, I would like to use Ubuntu in order to install packages using
apt-get install through qemu. Using the "init=/root/gem5_init.sh"
command both images boot only in 10 minutes.

Best regards,
Nikos


Quoting Bobby Bruce :

> Just remembered: If you're wanting to bi-pass large parts of the Ubuntu
OS
> like this, you may just want to use the "riscv-disk-image" (
> http://dist.gem5.org/dist/v21-2/images/riscv/busybox/riscv-disk.img.gz),
an
> example usage of which can be found in
> "configs/example/gem5_library/riscv-fs.py":
>
> ```
> ./build/RISCV/gem5.opt configs/example/gem5_library/riscv-fs.py
> ```
>
> This disk image is based on BusyBox, which is very light-weight. The
source
> for building this image is found here:
>
https://gem5.googlesource.com/public/gem5-resources/+/refs/heads/stable/src/riscv-fs
>
> --
> Dr. Bobby R. Bruce
> Room 3050,
> Kemper Hall, UC Davis
> Davis,
> CA, 95616
>
> web: https://www.bobbybruce.net
>
>
> On Mon, Mar 14, 2022 at 11:12 AM Bobby Bruce  wrote:
>
>> Oh I see, I understand now. I thought you managed to disable some
systemd
>> jobs (something I think Hoa struggled with), but you're just bypassing
them
>> by setting init to a script.
>>
>> Nice, I'll let you know when the new image is available. I'll see if I
can
>> reproduce the error you found with the READ-ONLY problem on the new
image.
>>
>> --
>> Dr. Bobby R. Bruce
>> Room 3050,
>> Kemper Hall, UC Davis
>> Davis,
>> CA, 95616
>>
>> web: https://www.bobbybruce.net
>>
>>
>> On Mon, Mar 14, 2022 at 11:10 AM Νικόλαος Ταμπουρατζής <
>> ntampourat...@ece.auth.gr> wrote:
>>
>>> Dear Boddy,
>>>
>>> Thank you very much for the clarifications! I used the pre-build disk
>>> image from gem5 resources
>>> (https://github.com/gem5/gem5-resources/tree/stable/src/riscv-ubuntu),
>>> and I add the "init=/root/gem5_init.sh" command in the gem5 python
>>> script in order to bypass the systemd services.
>>>
>>> Please let me know when your new disk image is available!
>>>
>>> Thanks!
>>>
>>> Best regards,
>>> Nikos
>>>
>>>
>>> Quoting Bobby Bruce :
>>>
>>> > Hey Nikos,
>>> >
>>> > First, you can set your own kernel arguments via the `kernel_args`
>>> > parameter in the `set_kernel_disk_worload` function to do this sort
of
>>> > thing, there's no need to modify the source. You can do something
like
>>> this:
>>> >
>>> > ```
>>> > board.set_kernel_disk_workload(
>>> > kernel=Resource(
>>> > "riscv-bootloader-vmlinux-5.10",
>>> > ),
>>> > disk_image=Resource(
>>> > "riscv-ubuntu-20.04-img",
>>> > ),
>>> > kernel_args=get_default_kernel_args() +
>>> ["init=/root/gem5_init.sh'"],
>>> > )
>>> > ```
>>> >
>>> > Anyway, to answer your question: It looks like you made some error
when
>>> > creating your disk image and set things up in a read-only partition.
>>> That'd
>>> > be my best guess at this point. You should try to ensure you setup
the
>>> > partitions correctly in the disk image. Given I don't know how you
>>> created
>>> > this new image, I can't help much further.
>>> >
>>> > We should have a new RISCV disk image available by the end of today
(it
>>> > took as a bit longer than expected). It still takes some time to
boot,
>>> but
>>> > it's more stable than the one we currently provide.
>>> >
>>> > 

[gem5-users] Re: riscv-ubuntu 20.04 FS mode

[Νικόλαος Ταμπουρατζής via gem5-users]

Thank you Boddy!

I have also used this image but I get the same READ-ONLY problem.  
However, I would like to use Ubuntu in order to install packages using  
apt-get install through qemu. Using the "init=/root/gem5_init.sh"  
command both images boot only in 10 minutes.


Best regards,
Nikos


Quoting Bobby Bruce :


Just remembered: If you're wanting to bi-pass large parts of the Ubuntu OS
like this, you may just want to use the "riscv-disk-image" (
http://dist.gem5.org/dist/v21-2/images/riscv/busybox/riscv-disk.img.gz), an
example usage of which can be found in
"configs/example/gem5_library/riscv-fs.py":

```
./build/RISCV/gem5.opt configs/example/gem5_library/riscv-fs.py
```

This disk image is based on BusyBox, which is very light-weight. The source
for building this image is found here:
https://gem5.googlesource.com/public/gem5-resources/+/refs/heads/stable/src/riscv-fs

--
Dr. Bobby R. Bruce
Room 3050,
Kemper Hall, UC Davis
Davis,
CA, 95616

web: https://www.bobbybruce.net


On Mon, Mar 14, 2022 at 11:12 AM Bobby Bruce  wrote:


Oh I see, I understand now. I thought you managed to disable some systemd
jobs (something I think Hoa struggled with), but you're just bypassing them
by setting init to a script.

Nice, I'll let you know when the new image is available. I'll see if I can
reproduce the error you found with the READ-ONLY problem on the new image.

--
Dr. Bobby R. Bruce
Room 3050,
Kemper Hall, UC Davis
Davis,
CA, 95616

web: https://www.bobbybruce.net


On Mon, Mar 14, 2022 at 11:10 AM Νικόλαος Ταμπουρατζής <
ntampourat...@ece.auth.gr> wrote:


Dear Boddy,

Thank you very much for the clarifications! I used the pre-build disk
image from gem5 resources
(https://github.com/gem5/gem5-resources/tree/stable/src/riscv-ubuntu),
and I add the "init=/root/gem5_init.sh" command in the gem5 python
script in order to bypass the systemd services.

Please let me know when your new disk image is available!

Thanks!

Best regards,
Nikos


Quoting Bobby Bruce :

> Hey Nikos,
>
> First, you can set your own kernel arguments via the `kernel_args`
> parameter in the `set_kernel_disk_worload` function to do this sort of
> thing, there's no need to modify the source. You can do something like
this:
>
> ```
> board.set_kernel_disk_workload(
> kernel=Resource(
> "riscv-bootloader-vmlinux-5.10",
> ),
> disk_image=Resource(
> "riscv-ubuntu-20.04-img",
> ),
> kernel_args=get_default_kernel_args() +
["init=/root/gem5_init.sh'"],
> )
> ```
>
> Anyway, to answer your question: It looks like you made some error when
> creating your disk image and set things up in a read-only partition.
That'd
> be my best guess at this point. You should try to ensure you setup the
> partitions correctly in the disk image. Given I don't know how you
created
> this new image, I can't help much further.
>
> We should have a new RISCV disk image available by the end of today (it
> took as a bit longer than expected). It still takes some time to boot,
but
> it's more stable than the one we currently provide.
>
> Out of curiosity, how did you remove your systemd processes? How are you
> building this disk image? With what OS are you booting?
>
> Kind regards,
> Bobby
> --
> Dr. Bobby R. Bruce
> Room 3050,
> Kemper Hall, UC Davis
> Davis,
> CA, 95616
>
> web: https://www.bobbybruce.net
>
>
> On Mon, Mar 14, 2022 at 4:04 AM Νικόλαος Ταμπουρατζής <
> ntampourat...@ece.auth.gr> wrote:
>>
>> Dear all, Bobby and Hoa,
>>
>> I add this command (self.workload.command_line += '
>> init=/root/gem5_init.sh') in 169 line of
>> gem5/src/python/gem5/components/boards/kernel_disk_workload.py and I
>> build the gem5. Using this command, the gem5 is able to boot after 10
>> minutes (without a large number of systemd services). However, when it
>> boots and read the gem5_init.sh, I get the following:"cannot create
>> /tmp/script: Read-only file system". And of course, nothing can be
>> written in the filesystem. How can I resolve this?
>>
>> Thank you in advance!!!
>>
>> Best regards,
>> Nikos
>>
>>
>> Quoting Νικόλαος Ταμπουρατζής via gem5-users :
>>
>> > Dear Bobby and Hoa,
>> >
>> > Thank you for your advice! It is working properly using the
>> > CustomDiskImageResource (including the following command: from
>> > gem5.resources.resource import Resource, CustomDiskImageResource).
>> >
>> > Is there any news about booting faster of `riscv-ubuntu-20.04-img`?
>> > I am able to emulate the image using qemu
>> > (http://resources.gem5.org/resources/riscv-ubuntu), but I do not
>> > know what service

[gem5-users] Re: riscv-ubuntu 20.04 FS mode

[Νικόλαος Ταμπουρατζής via gem5-users]

Dear Boddy,

Thank you very much for the clarifications! I used the pre-build disk  
image from gem5 resources  
(https://github.com/gem5/gem5-resources/tree/stable/src/riscv-ubuntu),  
and I add the "init=/root/gem5_init.sh" command in the gem5 python  
script in order to bypass the systemd services.


Please let me know when your new disk image is available!

Thanks!

Best regards,
Nikos


Quoting Bobby Bruce :


Hey Nikos,

First, you can set your own kernel arguments via the `kernel_args`
parameter in the `set_kernel_disk_worload` function to do this sort of
thing, there's no need to modify the source. You can do something like this:

```
board.set_kernel_disk_workload(
kernel=Resource(
"riscv-bootloader-vmlinux-5.10",
),
disk_image=Resource(
"riscv-ubuntu-20.04-img",
),
kernel_args=get_default_kernel_args() + ["init=/root/gem5_init.sh'"],
)
```

Anyway, to answer your question: It looks like you made some error when
creating your disk image and set things up in a read-only partition. That'd
be my best guess at this point. You should try to ensure you setup the
partitions correctly in the disk image. Given I don't know how you created
this new image, I can't help much further.

We should have a new RISCV disk image available by the end of today (it
took as a bit longer than expected). It still takes some time to boot, but
it's more stable than the one we currently provide.

Out of curiosity, how did you remove your systemd processes? How are you
building this disk image? With what OS are you booting?

Kind regards,
Bobby
--
Dr. Bobby R. Bruce
Room 3050,
Kemper Hall, UC Davis
Davis,
CA, 95616

web: https://www.bobbybruce.net


On Mon, Mar 14, 2022 at 4:04 AM Νικόλαος Ταμπουρατζής <
ntampourat...@ece.auth.gr> wrote:


Dear all, Bobby and Hoa,

I add this command (self.workload.command_line += '
init=/root/gem5_init.sh') in 169 line of
gem5/src/python/gem5/components/boards/kernel_disk_workload.py and I
build the gem5. Using this command, the gem5 is able to boot after 10
minutes (without a large number of systemd services). However, when it
boots and read the gem5_init.sh, I get the following:"cannot create
/tmp/script: Read-only file system". And of course, nothing can be
written in the filesystem. How can I resolve this?

Thank you in advance!!!

Best regards,
Nikos


Quoting Νικόλαος Ταμπουρατζής via gem5-users :

> Dear Bobby and Hoa,
>
> Thank you for your advice! It is working properly using the
> CustomDiskImageResource (including the following command: from
> gem5.resources.resource import Resource, CustomDiskImageResource).
>
> Is there any news about booting faster of `riscv-ubuntu-20.04-img`?
> I am able to emulate the image using qemu
> (http://resources.gem5.org/resources/riscv-ubuntu), but I do not
> know what services I need to disable in order to boot faster the
> image!
>
> Best regards,
> Nikolaos Tampouratzis
>
>
> Quoting Bobby Bruce via gem5-users :
>
>> Hey Nikos,
>>
>> I'm not sure I know exactly how to remove all these annoying systemd
>> services. Currently Hoa is assigned this task:
>> https://gem5.atlassian.net/browse/GEM5-1177
>>
>> @Hoa can you make this a top priority for you? I think 6+ hours for a

boot

>> is a bit too much. I'm sure there must be a way to modify this disk

image

>> to make it faster.
>>
>> To answer your second question, this should work:
>>
>> ```
>>
>> image = CustomDiskImageResource(
>>local_path = "path/to/your/disk/image/here",
>>disk_root_partition = "1", # This is the partition in the disk

image to

>> use. 'None' if there is no disk image
>> )
>>
>> board.set_kernel_disk_workload(
>>kernel = Resource("riscv-bootloader-vmlinux-5.10"),
>>disk_image = image,
>> )
>>
>> ```
>>
>>
>>
>> Dr. Bobby R. Bruce
>> Room 3050,
>> Kemper Hall, UC Davis
>> Davis,
>> CA, 95616
>>
>> web: https://www.bobbybruce.net
>>
>>
>> On Sat, Feb 12, 2022 at 7:19 AM Νικόλαος Ταμπουρατζής via gem5-users <
>> gem5-users@gem5.org> wrote:
>>
>>> Dear all,
>>>
>>> I have successfully emulated the riscv-ubuntu.img through qemu! The
>>> problem was that I use Ubuntu 20.04 and it requires the Hirsute’s
>>> version of u-boot-qemu (wget
>>>
>>>

http://mirrors.kernel.org/ubuntu/pool/main/u/u-boot/u-boot-qemu_2021.01+dfsg-3ubuntu9_all.deb
)

>>> and not the standard through the apt
>>> install.
>>>
>>> Now I have two questions:
>>>
>>> 1) How can I disable the huge number of services in order to speedup
>>> the gem5 b

[gem5-users] Re: FS RISCV PCI

[Νικόλαος Ταμπουρατζής via gem5-users]

Dear Ayaz, all,

Is there any news about PCI implementation on RISCV FS?

Best regards,
Nikos


Quoting Ayaz Akram :


Hi Nikolaos,

Thanks for bringing this to our attention. We are looking at this problem
here at Davis and will try to respond soon.

-Ayaz

On Sat, Apr 10, 2021 at 4:42 AM Νικόλαος Ταμπουρατζής via gem5-users <
gem5-users@gem5.org> wrote:



Dear Gem5 community,

I try to add PCI interface in RISCV arch doing the following steps
(similar with ARM RealView - I use the gem5-v21):

1) Create a file gem5/src/dev/riscv/pci_host.cc with the following code:

#include "dev/riscv/pci_host.hh"
#include "params/GenericRiscvPciHost.hh"

GenericRiscvPciHost::GenericRiscvPciHost(const GenericRiscvPciHostParams
)
 : GenericPciHost(p), intBase(p.int_base), intCount(p.int_count)
{
}

uint32_t
GenericRiscvPciHost::mapPciInterrupt(
 const PciBusAddr , PciIntPin pin) const
{

 fatal_if(pin == PciIntPin::NO_INT,
  "%02x:%02x.%i: Interrupt from a device without interrupts\n",
  addr.bus, addr.dev, addr.func);

 return intBase + (addr.dev % intCount);
}

2) Create a file gem5/src/dev/riscv/pci_host.hh with the following code:

#ifndef __DEV_RISCV_PCI_HOST_HH__
#define __DEV_RISCV_PCI_HOST_HH__

#include "dev/pci/host.hh"

struct GenericRiscvPciHostParams;

class GenericRiscvPciHost : public GenericPciHost
{
   private:
 const uint32_t intBase;
 const uint32_t intCount;

   public:
 GenericRiscvPciHost(const GenericRiscvPciHostParams );
 virtual ~GenericRiscvPciHost() {}

   protected:
 uint32_t mapPciInterrupt(const PciBusAddr ,
  PciIntPin pin) const override;
};

#endif // __DEV_RISCV_PCI_HOST_HH__

3) Add the "Source('pci_host.cc')" to gem5/src/dev/riscv/SConscript

4) Add the following code in gem5/src/dev/riscv/HiFive.py according to
RealView GenericArmPciHost:

from m5.objects.Ethernet import NSGigE, IGbE_igb, IGbE_e1000

from m5.objects.Device import BasicPioDevice
from m5.objects.PciHost import *
from m5.SimObject import SimObject

class GenericRiscvPciHost(GenericPciHost): #Add this class (PCI)
 type = 'GenericRiscvPciHost'
 cxx_header = "dev/riscv/pci_host.hh"
 int_base   = Param.Unsigned("PCI interrupt base")
 int_count  = Param.Unsigned("Maximum number of interrupts used by
this host")

 # This python parameter can be used in configuration scripts to turn
 # on/off the fdt dma-coherent flag when doing dtb autogeneration
 _dma_coherent = True

 def generateDeviceTree(self, state):
 local_state = FdtState(
 addr_cells=3, size_cells=2,
 cpu_cells=1, interrupt_cells=1)

 node = FdtNode("pci")

 if int(self.conf_device_bits) == 8:
 node.appendCompatible("pci-host-cam-generic")
 elif int(self.conf_device_bits) == 12:
 node.appendCompatible("pci-host-ecam-generic")
 else:
 m5.fatal("No compatibility string for the set
conf_device_width")

 node.append(FdtPropertyStrings("device_type", ["pci"]))

 # Cell sizes of child nodes/peripherals
 node.append(local_state.addrCellsProperty())
 node.append(local_state.sizeCellsProperty())
 node.append(local_state.interruptCellsProperty())
 # PCI address for CPU
 node.append(FdtPropertyWords("reg",
 state.addrCells(self.conf_base) +
 state.sizeCells(self.conf_size) ))

 # Ranges mapping
 # For now some of this is hard coded, because the PCI module does
not
 # have a proper full understanding of the memory map, but
adapting the
 # PCI module is beyond the scope of what I'm trying to do here.
 # Values are taken from the VExpress_GEM5_V1 platform.
 ranges = []
 # Pio address range
 ranges += self.pciFdtAddr(space=1, addr=0)
 ranges += state.addrCells(self.pci_pio_base)
 ranges += local_state.sizeCells(0x1)  # Fixed size

 # AXI memory address range
 ranges += self.pciFdtAddr(space=2, addr=0)
 ranges += state.addrCells(self.pci_mem_base)
 ranges += local_state.sizeCells(0x4000) # Fixed size
 node.append(FdtPropertyWords("ranges", ranges))

 if True:
   #Change this to True because Realview calls always
ARM_PCI_INT_DEV
 plic = self._parent.unproxy(self).plic
 int_phandle = state.phandle(plic)
 # Interrupt mapping
 interrupts = []

 # child interrupt specifier
 child_interrupt = local_state.interruptCells(0x0)

 # parent unit address
 parent_addr = 0x0
   #get this from /gem5/system/arm/dt/platforms file

 for i in range(int(self.int_count)):
  

[gem5-users] Re: riscv-ubuntu 20.04 FS mode

[Νικόλαος Ταμπουρατζής via gem5-users]

Dear all, Bobby and Hoa,

I add this command (self.workload.command_line += '  
init=/root/gem5_init.sh') in 169 line of  
gem5/src/python/gem5/components/boards/kernel_disk_workload.py and I  
build the gem5. Using this command, the gem5 is able to boot after 10  
minutes (without a large number of systemd services). However, when it  
boots and read the gem5_init.sh, I get the following:"cannot create  
/tmp/script: Read-only file system". And of course, nothing can be  
written in the filesystem. How can I resolve this?


Thank you in advance!!!

Best regards,
Nikos


Quoting Νικόλαος Ταμπουρατζής via gem5-users :


Dear Bobby and Hoa,

Thank you for your advice! It is working properly using the  
CustomDiskImageResource (including the following command: from  
gem5.resources.resource import Resource, CustomDiskImageResource).


Is there any news about booting faster of `riscv-ubuntu-20.04-img`?  
I am able to emulate the image using qemu  
(http://resources.gem5.org/resources/riscv-ubuntu), but I do not  
know what services I need to disable in order to boot faster the  
image!


Best regards,
Nikolaos Tampouratzis


Quoting Bobby Bruce via gem5-users :


Hey Nikos,

I'm not sure I know exactly how to remove all these annoying systemd
services. Currently Hoa is assigned this task:
https://gem5.atlassian.net/browse/GEM5-1177

@Hoa can you make this a top priority for you? I think 6+ hours for a boot
is a bit too much. I'm sure there must be a way to modify this disk image
to make it faster.

To answer your second question, this should work:

```

image = CustomDiskImageResource(
   local_path = "path/to/your/disk/image/here",
   disk_root_partition = "1", # This is the partition in the disk image to
use. 'None' if there is no disk image
)

board.set_kernel_disk_workload(
   kernel = Resource("riscv-bootloader-vmlinux-5.10"),
   disk_image = image,
)

```



Dr. Bobby R. Bruce
Room 3050,
Kemper Hall, UC Davis
Davis,
CA, 95616

web: https://www.bobbybruce.net


On Sat, Feb 12, 2022 at 7:19 AM Νικόλαος Ταμπουρατζής via gem5-users <
gem5-users@gem5.org> wrote:


Dear all,

I have successfully emulated the riscv-ubuntu.img through qemu! The
problem was that I use Ubuntu 20.04 and it requires the Hirsute’s
version of u-boot-qemu (wget

http://mirrors.kernel.org/ubuntu/pool/main/u/u-boot/u-boot-qemu_2021.01+dfsg-3ubuntu9_all.deb)
and not the standard through the apt
install.

Now I have two questions:

1) How can I disable the huge number of services in order to speedup
the gem5 boot process through qemu?

2) When I execute the following: "./build/RISCV/gem5.opt
configs/example/gem5_library/riscv-ubuntu-run.py", it downloads
automatically the riscv-ubuntu-20.04-img. How can I set another image?
The --disk-image option is not working.


Thank you in advance!!!
Best regards,
Nikos


Quoting Νικόλαος Ταμπουρατζής via gem5-users :


Dear Hoa,

Thank you very much for your information! I try to emulate the
ubuntu-image through qemu (following this tutorial:
http://resources.gem5.org/resources/riscv-ubuntu) and I get the
following TFTP error:

I appreciate any help!!

Best regards,
Nikos


cossim@cossim-virtual-machine:~/riscv-ubuntu$
./qemu/build/qemu-system-riscv64 -machine virt -nographic \

-m 16384 -smp 8 \
-bios /usr/lib/riscv64-linux-gnu/opensbi/generic/fw_jump.elf \
-kernel /usr/lib/u-boot/qemu-riscv64_smode/uboot.elf \
-device virtio-net-device,netdev=eth0 \
-netdev user,id=eth0,hostfwd=tcp::-:22 \
-drive file=ubuntu.img,format=raw,if=virtio


OpenSBI v0.9
   _  _
  / __ \  / |  _ \_   _|
 | |  | |_ __   ___ _ __ | (___ | |_) || |
 | |  | | '_ \ / _ \ '_ \ \___ \|  _ < | |
 | |__| | |_) |  __/ | | |) | |_) || |_
  \/| .__/ \___|_| |_|_/|/_|
| |
|_|

Platform Name : riscv-virtio,qemu
Platform Features : timer,mfdeleg
Platform HART Count   : 8
Firmware Base : 0x8000
Firmware Size : 156 KB
Runtime SBI Version   : 0.2

Domain0 Name  : root
Domain0 Boot HART : 5
Domain0 HARTs : 0*,1*,2*,3*,4*,5*,6*,7*
Domain0 Region00  : 0x8000-0x8003 ()
Domain0 Region01  : 0x-0x (R,W,X)
Domain0 Next Address  : 0x8020
Domain0 Next Arg1 : 0x8220
Domain0 Next Mode : S-mode
Domain0 SysReset  : yes

Boot HART ID  : 5
Boot HART Domain  : root
Boot HART ISA : rv64imafdcsu
Boot HART Features: scounteren,mcounteren,time
Boot HART PMP Count   : 16
Boot HART PMP Granularity : 4
Boot HART PMP Address Bits: 54
Boot HART MHPM Count  : 0
Boot HART MHPM Count  : 0
Boot HART MIDELEG : 0x0222
Boot HART MEDELEG : 0xb109


U-Boot 2021.01+dfsg-3ubuntu0~20.04.4 (Sep 21 2021

[gem5-users] Re: riscv-ubuntu 20.04 FS mode

[Νικόλαος Ταμπουρατζής via gem5-users]

Dear Bobby and Hoa,

Thank you for your advice! It is working properly using the  
CustomDiskImageResource (including the following command: from  
gem5.resources.resource import Resource, CustomDiskImageResource).


Is there any news about booting faster of `riscv-ubuntu-20.04-img`? I  
am able to emulate the image using qemu  
(http://resources.gem5.org/resources/riscv-ubuntu), but I do not know  
what services I need to disable in order to boot faster the image!


Best regards,
Nikolaos Tampouratzis


Quoting Bobby Bruce via gem5-users :


Hey Nikos,

I'm not sure I know exactly how to remove all these annoying systemd
services. Currently Hoa is assigned this task:
https://gem5.atlassian.net/browse/GEM5-1177

@Hoa can you make this a top priority for you? I think 6+ hours for a boot
is a bit too much. I'm sure there must be a way to modify this disk image
to make it faster.

To answer your second question, this should work:

```

image = CustomDiskImageResource(
local_path = "path/to/your/disk/image/here",
disk_root_partition = "1", # This is the partition in the disk image to
use. 'None' if there is no disk image
)

board.set_kernel_disk_workload(
kernel = Resource("riscv-bootloader-vmlinux-5.10"),
disk_image = image,
)

```



Dr. Bobby R. Bruce
Room 3050,
Kemper Hall, UC Davis
Davis,
CA, 95616

web: https://www.bobbybruce.net


On Sat, Feb 12, 2022 at 7:19 AM Νικόλαος Ταμπουρατζής via gem5-users <
gem5-users@gem5.org> wrote:


Dear all,

I have successfully emulated the riscv-ubuntu.img through qemu! The
problem was that I use Ubuntu 20.04 and it requires the Hirsute’s
version of u-boot-qemu (wget

http://mirrors.kernel.org/ubuntu/pool/main/u/u-boot/u-boot-qemu_2021.01+dfsg-3ubuntu9_all.deb)
and not the standard through the apt
install.

Now I have two questions:

1) How can I disable the huge number of services in order to speedup
the gem5 boot process through qemu?

2) When I execute the following: "./build/RISCV/gem5.opt
configs/example/gem5_library/riscv-ubuntu-run.py", it downloads
automatically the riscv-ubuntu-20.04-img. How can I set another image?
The --disk-image option is not working.


Thank you in advance!!!
Best regards,
Nikos


Quoting Νικόλαος Ταμπουρατζής via gem5-users :

> Dear Hoa,
>
> Thank you very much for your information! I try to emulate the
> ubuntu-image through qemu (following this tutorial:
> http://resources.gem5.org/resources/riscv-ubuntu) and I get the
> following TFTP error:
>
> I appreciate any help!!
>
> Best regards,
> Nikos
>
>
> cossim@cossim-virtual-machine:~/riscv-ubuntu$
> ./qemu/build/qemu-system-riscv64 -machine virt -nographic \
>> -m 16384 -smp 8 \
>> -bios /usr/lib/riscv64-linux-gnu/opensbi/generic/fw_jump.elf \
>> -kernel /usr/lib/u-boot/qemu-riscv64_smode/uboot.elf \
>> -device virtio-net-device,netdev=eth0 \
>> -netdev user,id=eth0,hostfwd=tcp::-:22 \
>> -drive file=ubuntu.img,format=raw,if=virtio
>
> OpenSBI v0.9
>_  _
>   / __ \  / |  _ \_   _|
>  | |  | |_ __   ___ _ __ | (___ | |_) || |
>  | |  | | '_ \ / _ \ '_ \ \___ \|  _ < | |
>  | |__| | |_) |  __/ | | |) | |_) || |_
>   \/| .__/ \___|_| |_|_/|/_|
> | |
> |_|
>
> Platform Name : riscv-virtio,qemu
> Platform Features : timer,mfdeleg
> Platform HART Count   : 8
> Firmware Base : 0x8000
> Firmware Size : 156 KB
> Runtime SBI Version   : 0.2
>
> Domain0 Name  : root
> Domain0 Boot HART : 5
> Domain0 HARTs : 0*,1*,2*,3*,4*,5*,6*,7*
> Domain0 Region00  : 0x8000-0x8003 ()
> Domain0 Region01  : 0x-0x (R,W,X)
> Domain0 Next Address  : 0x8020
> Domain0 Next Arg1 : 0x8220
> Domain0 Next Mode : S-mode
> Domain0 SysReset  : yes
>
> Boot HART ID  : 5
> Boot HART Domain  : root
> Boot HART ISA : rv64imafdcsu
> Boot HART Features: scounteren,mcounteren,time
> Boot HART PMP Count   : 16
> Boot HART PMP Granularity : 4
> Boot HART PMP Address Bits: 54
> Boot HART MHPM Count  : 0
> Boot HART MHPM Count  : 0
> Boot HART MIDELEG : 0x0222
> Boot HART MEDELEG : 0xb109
>
>
> U-Boot 2021.01+dfsg-3ubuntu0~20.04.4 (Sep 21 2021 - 15:55:38 +)
>
> CPU:   rv64imafdcsu
> Model: riscv-virtio,qemu
> DRAM:  16 GiB
> In:uart@1000
> Out:   uart@1000
> Err:   uart@1000
> Net:   eth0: virtio-net#0
> Hit any key to stop autoboot:  0
>
> Device 0: 1af4 VirtIO Block Device
> Typ

[gem5-users] Re: riscv-ubuntu 20.04 FS mode

[Νικόλαος Ταμπουρατζής via gem5-users]

Dear all,

I have successfully emulated the riscv-ubuntu.img through qemu! The  
problem was that I use Ubuntu 20.04 and it requires the Hirsute’s  
version of u-boot-qemu (wget  
http://mirrors.kernel.org/ubuntu/pool/main/u/u-boot/u-boot-qemu_2021.01+dfsg-3ubuntu9_all.deb) and not the standard through the apt  
install.


Now I have two questions:

1) How can I disable the huge number of services in order to speedup  
the gem5 boot process through qemu?


2) When I execute the following: "./build/RISCV/gem5.opt  
configs/example/gem5_library/riscv-ubuntu-run.py", it downloads  
automatically the riscv-ubuntu-20.04-img. How can I set another image?  
The --disk-image option is not working.



Thank you in advance!!!
Best regards,
Nikos


Quoting Νικόλαος Ταμπουρατζής via gem5-users :


Dear Hoa,

Thank you very much for your information! I try to emulate the  
ubuntu-image through qemu (following this tutorial:  
http://resources.gem5.org/resources/riscv-ubuntu) and I get the  
following TFTP error:


I appreciate any help!!

Best regards,
Nikos


cossim@cossim-virtual-machine:~/riscv-ubuntu$  
./qemu/build/qemu-system-riscv64 -machine virt -nographic \

-m 16384 -smp 8 \
-bios /usr/lib/riscv64-linux-gnu/opensbi/generic/fw_jump.elf \
-kernel /usr/lib/u-boot/qemu-riscv64_smode/uboot.elf \
-device virtio-net-device,netdev=eth0 \
-netdev user,id=eth0,hostfwd=tcp::-:22 \
-drive file=ubuntu.img,format=raw,if=virtio


OpenSBI v0.9
   _  _
  / __ \  / |  _ \_   _|
 | |  | |_ __   ___ _ __ | (___ | |_) || |
 | |  | | '_ \ / _ \ '_ \ \___ \|  _ < | |
 | |__| | |_) |  __/ | | |) | |_) || |_
  \/| .__/ \___|_| |_|_/|/_|
| |
|_|

Platform Name : riscv-virtio,qemu
Platform Features : timer,mfdeleg
Platform HART Count   : 8
Firmware Base : 0x8000
Firmware Size : 156 KB
Runtime SBI Version   : 0.2

Domain0 Name  : root
Domain0 Boot HART : 5
Domain0 HARTs : 0*,1*,2*,3*,4*,5*,6*,7*
Domain0 Region00  : 0x8000-0x8003 ()
Domain0 Region01  : 0x-0x (R,W,X)
Domain0 Next Address  : 0x8020
Domain0 Next Arg1 : 0x8220
Domain0 Next Mode : S-mode
Domain0 SysReset  : yes

Boot HART ID  : 5
Boot HART Domain  : root
Boot HART ISA : rv64imafdcsu
Boot HART Features: scounteren,mcounteren,time
Boot HART PMP Count   : 16
Boot HART PMP Granularity : 4
Boot HART PMP Address Bits: 54
Boot HART MHPM Count  : 0
Boot HART MHPM Count  : 0
Boot HART MIDELEG : 0x0222
Boot HART MEDELEG : 0xb109


U-Boot 2021.01+dfsg-3ubuntu0~20.04.4 (Sep 21 2021 - 15:55:38 +)

CPU:   rv64imafdcsu
Model: riscv-virtio,qemu
DRAM:  16 GiB
In:uart@1000
Out:   uart@1000
Err:   uart@1000
Net:   eth0: virtio-net#0
Hit any key to stop autoboot:  0

Device 0: 1af4 VirtIO Block Device
Type: Hard Disk
Capacity: 13824.0 MB = 13.5 GB (28311552 x 512)
... is now current device
Scanning virtio 0:1...
Found /boot/extlinux/extlinux.conf
Retrieving file: /boot/extlinux/extlinux.conf
755 bytes read in 4 ms (183.6 KiB/s)
U-Boot menu
1:  Ubuntu 20.04.3 LTS 5.11.0-1017-generic
2:  Ubuntu 20.04.3 LTS 5.11.0-1017-generic (rescue target)
Enter choice: 1:Ubuntu 20.04.3 LTS 5.11.0-1017-generic
Retrieving file: /boot/initrd.img-5.11.0-1017-generic
170008555 bytes read in 728 ms (222.7 MiB/s)
Retrieving file: /boot/vmlinuz-5.11.0-1017-generic
25258496 bytes read in 148 ms (162.8 MiB/s)
append: root=LABEL=cloudimg-rootfs ro earlycon
Retrieving file: /lib/firmware/5.11.0-1017-generic/device-tree/qemu-riscv.dtb
Failed to load '/lib/firmware/5.11.0-1017-generic/device-tree/qemu-riscv.dtb'
Skipping l0 for failure retrieving fdt
2:  Ubuntu 20.04.3 LTS 5.11.0-1017-generic (rescue target)
Retrieving file: /boot/initrd.img-5.11.0-1017-generic
170008555 bytes read in 44 ms (3.6 GiB/s)
Retrieving file: /boot/vmlinuz-5.11.0-1017-generic
25258496 bytes read in 12 ms (2 GiB/s)
append: root=LABEL=cloudimg-rootfs ro earlycon single
Retrieving file: /lib/firmware/5.11.0-1017-generic/device-tree/qemu-riscv.dtb
Failed to load '/lib/firmware/5.11.0-1017-generic/device-tree/qemu-riscv.dtb'
Skipping l0r for failure retrieving fdt
SCRIPT FAILED: continuing...
libfdt fdt_check_header(): FDT_ERR_BADMAGIC
Scanning disk virtio-blk#8...
** Unrecognized filesystem type **
** Unrecognized filesystem type **
Found 6 disks
** Invalid partition 21 **
Cannot read EFI system partition
BootOrder not defined
EFI boot manager: Cannot load any image
Scanning virtio 0:f...
** Unable to read file / **
Failed to load '/'
libfdt fdt_check_header(): FDT_ERR_BADMAGIC
BootOrder not defined
EFI boot manager: Cannot load any image
scanning bu

[gem5-users] Re: riscv-ubuntu 20.04 FS mode

[Νικόλαος Ταμπουρατζής via gem5-users]

orking service, and especially the "motd" (message of the day?)
service, which queries for updates from Ubuntu servers.

We can turn off the motd service, which would improve the booting time by a
lot. However, I don't really know how to turn off the network service.

I hope that somebody will help with the systemd stuff.

Regards,
Hoa Nguyen

On Fri, Feb 11, 2022 at 4:57 AM Νικόλαος Ταμπουρατζής via gem5-users <
gem5-users@gem5.org> wrote:


Dear community,

I have just downloaded the latest version of gem5 (v21.2.1) and I try
to simulate the FS using the riscv-ubuntu-run.py
(./build/RISCV/gem5.opt
configs/example/gem5_library/riscv-ubuntu-run.py). It downloads
automatically both riscv-ubuntu-20.04-img and
riscv-bootloader-vmlinux-5.10. However, after 4 hours the system is
not completely booted.

How many hours it is required to boot?
How can I disable the systemd services from riscv-ubuntu-20.04-img?

I found the following link but I cannot emulate the image through
qemu: http://resources.gem5.org/resources/riscv-ubuntu

Best regards,
Nikos

Here is the output (through m5term):

 m5 terminal: Terminal 0 
[0.00] Linux version 5.10.0 (hn@amarillo)
(riscv64-linux-gnu-gcc (Ubuntu 7.5.0-3ubuntu1~18.04) 7.5.0, GNU ld
(GNU Binutils for Ubuntu) 2.30) #1 SMP Mon Jul 19 13:32:59 PDT 2021
[0.00] OF: fdt: Ignoring memory range 0x8000 - 0x8020
[0.00] efi: UEFI not found.
[0.00] Zone ranges:
[0.00]   DMA32[mem 0x8020-0x]
[0.00]   Normal   [mem 0x0001-0x00013fff]
[0.00] Movable zone start for each node
[0.00] Early memory node ranges
[0.00]   node   0: [mem 0x8020-0x00013fff]
[0.00] Initmem setup node 0 [mem
0x8020-0x00013fff]
[0.00] software IO TLB: mapped [mem
0xfbfff000-0xf000] (64MB)
[0.00] SBI specification v0.1 detected
[0.00] riscv: ISA extensions acdfim
[0.00] riscv: ELF capabilities acdfim
[0.00] percpu: Embedded 16 pages/cpu s26200 r8192 d31144 u65536
[0.00] Built 1 zonelists, mobility grouping on.  Total pages:
775175
[0.00] Kernel command line: console=ttyS0 root=/dev/vda1 ro
[0.00] Dentry cache hash table entries: 524288 (order: 10,
4194304 bytes, linear)
[0.00] Inode-cache hash table entries: 262144 (order: 9,
2097152 bytes, linear)
[0.00] Sorting __ex_table...
[0.00] mem auto-init: stack:off, heap alloc:off, heap free:off
[0.00] Memory: 3014996K/3143680K available (5866K kernel code,
3086K rwdata, 2048K rodata, 189K init, 341K bss, 128684K reserved, 0K
cma-reserved)
[0.00] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1
[0.00] rcu: Hierarchical RCU implementation.
[0.00] rcu: RCU restricting CPUs from NR_CPUS=8 to
nr_cpu_ids=2.
[0.00]  Tracing variant of Tasks RCU enabled.
[0.00] rcu: RCU calculated value of scheduler-enlistment delay
is 25 jiffies.
[0.00] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=2
[0.00] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
[0.00] riscv-intc: 64 local interrupts mapped
[0.00] plic: plic@c00: mapped 10 interrupts with 2
handlers for 4 contexts.
[0.00] random: get_random_bytes called from
start_kernel+0x316/0x496 with crng_init=0
[0.00] riscv_timer_init_dt: Registering clocksource cpuid [0]
hartid [1]
[0.00] clocksource: riscv_clocksource: mask:
0x max_cycles: 0x24e6a1710, max_idle_ns: 440795202120 ns
[0.14] sched_clock: 64 bits at 10MHz, resolution 100ns, wraps
every 4398046511100ns
[0.000269] Console: colour dummy device 80x25
[0.000322] Calibrating delay loop (skipped), value calculated
using timer frequency.. 20.00 BogoMIPS (lpj=4)
[0.000363] pid_max: default: 32768 minimum: 301
[0.000710] Mount-cache hash table entries: 8192 (order: 4, 65536
bytes, linear)
[0.000776] Mountpoint-cache hash table entries: 8192 (order: 4,
65536 bytes, linear)
[0.002680] rcu: Hierarchical SRCU implementation.
[0.002885] EFI services will not be available.
[0.003051] smp: Bringing up secondary CPUs ...
[0.003724] smp: Brought up 1 node, 2 CPUs
[0.004415] devtmpfs: initialized
[0.006194] clocksource: jiffies: mask: 0x max_cycles:
0x, max_idle_ns: 764504178510 ns
[0.006230] futex hash table entries: 512 (order: 3, 32768 bytes,
linear)
[0.006736] NET: Registered protocol family 16
[0.030604] vgaarb: loaded
[0.031121] SCSI subsystem initialized
[0.031625] usbcore: registered new interface driver usbfs
[0.031716] usbcore: registered new interface driver hub
[0.031801] usbcore: registered new device driver usb
[0.033017] clocksource: Switched to clocksource riscv_clocksource
[0.042536] NET: Registered protocol family 2
[0.043824] tc

[gem5-users] riscv-ubuntu 20.04 FS mode

[Νικόλαος Ταμπουρατζής via gem5-users]

Dear community,

I have just downloaded the latest version of gem5 (v21.2.1) and I try  
to simulate the FS using the riscv-ubuntu-run.py  
(./build/RISCV/gem5.opt  
configs/example/gem5_library/riscv-ubuntu-run.py). It downloads  
automatically both riscv-ubuntu-20.04-img and  
riscv-bootloader-vmlinux-5.10. However, after 4 hours the system is  
not completely booted.


How many hours it is required to boot?
How can I disable the systemd services from riscv-ubuntu-20.04-img?

I found the following link but I cannot emulate the image through  
qemu: http://resources.gem5.org/resources/riscv-ubuntu


Best regards,
Nikos

Here is the output (through m5term):

 m5 terminal: Terminal 0 
[0.00] Linux version 5.10.0 (hn@amarillo)  
(riscv64-linux-gnu-gcc (Ubuntu 7.5.0-3ubuntu1~18.04) 7.5.0, GNU ld  
(GNU Binutils for Ubuntu) 2.30) #1 SMP Mon Jul 19 13:32:59 PDT 2021

[0.00] OF: fdt: Ignoring memory range 0x8000 - 0x8020
[0.00] efi: UEFI not found.
[0.00] Zone ranges:
[0.00]   DMA32[mem 0x8020-0x]
[0.00]   Normal   [mem 0x0001-0x00013fff]
[0.00] Movable zone start for each node
[0.00] Early memory node ranges
[0.00]   node   0: [mem 0x8020-0x00013fff]
[0.00] Initmem setup node 0 [mem  
0x8020-0x00013fff]
[0.00] software IO TLB: mapped [mem  
0xfbfff000-0xf000] (64MB)

[0.00] SBI specification v0.1 detected
[0.00] riscv: ISA extensions acdfim
[0.00] riscv: ELF capabilities acdfim
[0.00] percpu: Embedded 16 pages/cpu s26200 r8192 d31144 u65536
[0.00] Built 1 zonelists, mobility grouping on.  Total pages: 775175
[0.00] Kernel command line: console=ttyS0 root=/dev/vda1 ro
[0.00] Dentry cache hash table entries: 524288 (order: 10,  
4194304 bytes, linear)
[0.00] Inode-cache hash table entries: 262144 (order: 9,  
2097152 bytes, linear)

[0.00] Sorting __ex_table...
[0.00] mem auto-init: stack:off, heap alloc:off, heap free:off
[0.00] Memory: 3014996K/3143680K available (5866K kernel code,  
3086K rwdata, 2048K rodata, 189K init, 341K bss, 128684K reserved, 0K  
cma-reserved)

[0.00] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1
[0.00] rcu: Hierarchical RCU implementation.
[0.00] rcu: RCU restricting CPUs from NR_CPUS=8 to nr_cpu_ids=2.
[0.00]  Tracing variant of Tasks RCU enabled.
[0.00] rcu: RCU calculated value of scheduler-enlistment delay  
is 25 jiffies.

[0.00] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=2
[0.00] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
[0.00] riscv-intc: 64 local interrupts mapped
[0.00] plic: plic@c00: mapped 10 interrupts with 2  
handlers for 4 contexts.
[0.00] random: get_random_bytes called from  
start_kernel+0x316/0x496 with crng_init=0
[0.00] riscv_timer_init_dt: Registering clocksource cpuid [0]  
hartid [1]
[0.00] clocksource: riscv_clocksource: mask:  
0x max_cycles: 0x24e6a1710, max_idle_ns: 440795202120 ns
[0.14] sched_clock: 64 bits at 10MHz, resolution 100ns, wraps  
every 4398046511100ns

[0.000269] Console: colour dummy device 80x25
[0.000322] Calibrating delay loop (skipped), value calculated  
using timer frequency.. 20.00 BogoMIPS (lpj=4)

[0.000363] pid_max: default: 32768 minimum: 301
[0.000710] Mount-cache hash table entries: 8192 (order: 4, 65536  
bytes, linear)
[0.000776] Mountpoint-cache hash table entries: 8192 (order: 4,  
65536 bytes, linear)

[0.002680] rcu: Hierarchical SRCU implementation.
[0.002885] EFI services will not be available.
[0.003051] smp: Bringing up secondary CPUs ...
[0.003724] smp: Brought up 1 node, 2 CPUs
[0.004415] devtmpfs: initialized
[0.006194] clocksource: jiffies: mask: 0x max_cycles:  
0x, max_idle_ns: 764504178510 ns

[0.006230] futex hash table entries: 512 (order: 3, 32768 bytes, linear)
[0.006736] NET: Registered protocol family 16
[0.030604] vgaarb: loaded
[0.031121] SCSI subsystem initialized
[0.031625] usbcore: registered new interface driver usbfs
[0.031716] usbcore: registered new interface driver hub
[0.031801] usbcore: registered new device driver usb
[0.033017] clocksource: Switched to clocksource riscv_clocksource
[0.042536] NET: Registered protocol family 2
[0.043824] tcp_listen_portaddr_hash hash table entries: 2048  
(order: 3, 32768 bytes, linear)
[0.043977] TCP established hash table entries: 32768 (order: 6,  
262144 bytes, linear)
[0.045452] TCP bind hash table entries: 32768 (order: 7, 524288  
bytes, linear)

[0.047006] TCP: Hash tables configured (established 32768 bind 32768)
[0.047159] UDP hash table entries: 2048 (order: 4, 65536 

[gem5-users] ARM KVM

[Νικόλαος Ταμπουρατζής via gem5-users]

Dear gem5 community,

I have installed the latest gem5 on an x86 machine. Is it possible to  
run ARM FS with kvm on X86 machine or the host machine must be  
ARM-based?


I try to execute the following configuration (from this thread  
https://www.mail-archive.com/gem5-users@gem5.org/msg19472.html):


$GEM5/build/ARM/gem5.opt $GEM5/configs/example/arm/fs_bigLITTLE.py  
--kernel=vmlinux.arm64 --machine-type VExpress_GEM5 --disk  
ubuntu-18.04-arm64-docker.img --cpu-type kvm --big-cpus 4


and I get the following error (which means that there is not the kvm option):

fs_bigLITTLE.py: error: argument --cpu-type: invalid choice: 'kvm'  
(choose from 'atomic', 'timing', 'exynos')


May you help me, please?

Best regards,
Nikos



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[gem5-users] PCI Express on gem5

[Νικόλαος Ταμπουρατζής via gem5-users]

Dear gem5 community,

I have successfully connected the two gem5s through Gigabit PCI e1000  
card on ARM FS. However, I would like to use a faster card (more than  
gigabit) based on PCI-E instead of PCI. Is there any work on this? I  
found this work: https://www.ideals.illinois.edu/handle/2142/101569  
but unfortunately I can not find the source code of this. I will  
appreciate it if anyone may help me.


Thank you in advance,
Nikos
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[gem5-users] SSH on ARM Full System

[Νικόλαος Ταμπουρατζής via gem5-users]

Dear gem5 community,

I have connected successfully two gem5s through e1000 ethernet card.  
You can see the terminal output in the following commands:


1st GEM5:

root@aarch64-gem5:/# ifconfig
eth0: flags=4163  mtu 1500
inet 192.168.0.2  netmask 255.255.255.0  broadcast 192.168.0.255
ether 00:90:00:00:00:00  txqueuelen 1000  (Ethernet)
RX packets 0  bytes 0 (0.0 B)
RX errors 0  dropped 0  overruns 0  frame 0
TX packets 0  bytes 0 (0.0 B)
TX errors 0  dropped 0 overruns 0  carrier 0  collisions 0

lo: flags=73  mtu 65536
inet 127.0.0.1  netmask 255.0.0.0
loop  txqueuelen 1000  (Local Loopback)
RX packets 0  bytes 0 (0.0 B)
RX errors 0  dropped 0  overruns 0  frame 0
TX packets 0  bytes 0 (0.0 B)
TX errors 0  dropped 0 overruns 0  carrier 0  collisions 0

root@aarch64-gem5:/# ping -c 1 192.168.0.3
PING 192.168.0.3 (192.168.0.3) 56(84) bytes of data.
64 bytes from 192.168.0.3: icmp_seq=1 ttl=64 time=192 ms

--- 192.168.0.3 ping statistics ---
1 packets transmitted, 1 received, 0% packet loss, time 0ms
rtt min/avg/max/mdev = 192.857/192.857/192.857/0.000 ms
root@aarch64-gem5:/# ssh root@192.168.0.3
[2.784304] random: ssh: uninitialized urandom read (32 bytes read)
ssh: connect to host 192.168.0.3 port 22: Connection refused
root@aarch64-gem5:/#


2nd gem5:

root@aarch64-gem5:/# ifconfig
eth0: flags=4163  mtu 1500
inet 192.168.0.3  netmask 255.255.255.0  broadcast 192.168.0.255
ether 00:90:00:00:00:01  txqueuelen 1000  (Ethernet)
RX packets 2  bytes 158 (158.0 B)
RX errors 0  dropped 0  overruns 0  frame 0
TX packets 2  bytes 158 (158.0 B)
TX errors 0  dropped 0 overruns 0  carrier 0  collisions 0

lo: flags=73  mtu 65536
inet 127.0.0.1  netmask 255.0.0.0
loop  txqueuelen 1000  (Local Loopback)
RX packets 0  bytes 0 (0.0 B)
RX errors 0  dropped 0  overruns 0  frame 0
TX packets 0  bytes 0 (0.0 B)
TX errors 0  dropped 0 overruns 0  carrier 0  collisions 0

root@aarch64-gem5:/# ping -c 1 192.168.0.2
PING 192.168.0.2 (192.168.0.2) 56(84) bytes of data.
64 bytes from 192.168.0.2: icmp_seq=1 ttl=64 time=97.7 ms

--- 192.168.0.2 ping statistics ---
1 packets transmitted, 1 received, 0% packet loss, time 0ms
rtt min/avg/max/mdev = 97.758/97.758/97.758/0.000 ms
root@aarch64-gem5:/# ssh root@192.168.0.2
[3.187606] random: ssh: uninitialized urandom read (32 bytes read)
ssh: connect to host 192.168.0.2 port 22: Connection refused
root@aarch64-gem5:/#



I have used this gem5 configuration:

$GEM5/build/ARM/gem5.opt -d $GEM5/node0  
$GEM5/configs/example/arm/starter_fs.py --kernel=vmlinux.arm64  
--num-cores=2 --disk-image=ubuntu-18.04-arm64-docker.img --node=0


and

$GEM5/build/ARM/gem5.opt -d $GEM5/node0  
$GEM5/configs/example/arm/starter_fs.py --kernel=vmlinux.arm64  
--num-cores=2 --disk-image=ubuntu-18.04-arm64-docker.img --node=1


I would like to connect one gem5 to another through ssh (because I  
would like to use MPI).


I have installed the openssh-client packet through qemu but I get the  
above connection refused. After that, I installed the openssh-server  
through qemu, but it is not booted after 2 hours (it installed a  
number of packets):


"The following NEW packages will be installed:
  ca-certificates dbus dmsetup gir1.2-glib-2.0 libapparmor1 libargon2-0
  libcryptsetup12 libdbus-1-3 libdevmapper1.02.1 libgirepository-1.0-1
  libglib2.0-0 libglib2.0-data libip4tc0 libjson-c3 libkmod2 libmpdec2
  libnss-systemd libpam-systemd libpsl5 libpython3-stdlib libpython3.6-minimal
  libpython3.6-stdlib libwrap0 mime-support ncurses-term networkd-dispatcher
  openssh-server openssh-sftp-server openssl publicsuffix python3
  python3-certifi python3-chardet python3-dbus python3-gi python3-idna
  python3-minimal python3-pkg-resources python3-requests python3-six
  python3-urllib3 python3.6 python3.6-minimal shared-mime-info ssh-import-id
  systemd systemd-sysv ucf wget xdg-user-dirs"

I appreciate it if someone knows how to speed up the boot time or how  
can I connect two gem5s through ssh, please.
Following is the gem5 terminal output after openssh-server  
installation (but it is not finished yet).




[0.460103] systemd[1]: System time before build time, advancing clock.
[0.460256] systemd[1]: Failed to insert module 'autofs4': No such  
file or directory
[0.461222] systemd[1]: systemd 237 running in system mode. (+PAM  
+AUDIT +SELINUX +IMA +APPARMOR +SMACK +SYSVINIT +UTMP +LIBCRYPTSETUP  
+GCRYPT +GNUTLS +ACL +XZ +LZ4 +SECCOMP +BLKID +ELFUTILS +KMOD -IDN2  
+IDN -PCRE2 default-hierarchy=hybrid)

[0.461283] systemd[1]: Detected architecture arm64.

Welcome to Ubuntu 18.04.2 LTS!

[0.472880] systemd[1]: File  
/lib/systemd/system/systemd-journald.service:36 configures an IP  
firewall (IPAddressDeny=any), but the local system does not support  
BPF/cgroup based firewalling.
[

[gem5-users] Re: gem5 RISCV, issue on boot when mounting filesystem

[Νικόλαος Ταμπουρατζής via gem5-users]

Dear David,

I have used the bbl, Linux Kernel, and riscv_disk from the following  
GitHub: https://github.com/ppeetteerrs/gem5-RISC-V-FS-Linux/ .You can  
use either the files from prebuild directory or you can create your  
own according to instructions of this Github. Specifically, I have  
used the following configurations which are working properly (5 of 6):


 RISCV 1 core 

AtomicSimpleCPU (Working)

$GEM5/build/RISCV/gem5.opt -d $GEM5/node0  
$GEM5/configs/example/riscv/fs_linux.py --kernel=$OUT/bbl --caches  
--mem-size=512MB --mem-type=DDR4_2400_8x8 --cpu-type=AtomicSimpleCPU  
--disk-image=$OUT/riscv_disk -n 1



TimingSimpleCPU (Working)

$GEM5/build/RISCV/gem5.opt -d $GEM5/node0  
$GEM5/configs/example/riscv/fs_linux.py --kernel=$OUT/bbl --caches  
--mem-size=512MB --mem-type=DDR4_2400_8x8 --cpu-type=TimingSimpleCPU  
--disk-image=$OUT/riscv_disk -n 1


DerivO3CPU (Working)

$GEM5/build/RISCV/gem5.opt -d $GEM5/node0  
$GEM5/configs/example/riscv/fs_linux.py --kernel=$OUT/bbl --caches  
--mem-size=512MB --mem-type=DDR4_2400_8x8 --cpu-type=DerivO3CPU  
--disk-image=$OUT/riscv_disk -n 1



 RISCV 2 cores 

AtomicSimpleCPU (Working)

$GEM5/build/RISCV/gem5.opt -d $GEM5/node0  
$GEM5/configs/example/riscv/fs_linux.py --kernel=$OUT/bbl --caches  
--mem-size=512MB --mem-type=DDR4_2400_8x8 --cpu-type=AtomicSimpleCPU  
--disk-image=$OUT/riscv_disk -n 2


TimingSimpleCPU (Working)

$GEM5/build/RISCV/gem5.opt -d $GEM5/node0  
$GEM5/configs/example/riscv/fs_linux.py --kernel=$OUT/bbl --caches  
--mem-size=512MB --mem-type=DDR4_2400_8x8 --cpu-type=TimingSimpleCPU  
--disk-image=$OUT/riscv_disk -n 2


DerivO3CPU (NOT Working): void BaseDynInst<   
>::initVars() [with Impl = O3CPUImpl]: Assertion `cpu->instcount <=  
1500' failed.


$GEM5/build/RISCV/gem5.opt -d $GEM5/node0  
$GEM5/configs/example/riscv/fs_linux.py --kernel=$OUT/bbl --caches  
--mem-size=512MB --mem-type=DDR4_2400_8x8 --cpu-type=DerivO3CPU  
--disk-image=$OUT/riscv_disk -n 2



To be noticed that when I use --mem-size more than 512MB, gem5 is not booted.


Finally, when I use the last configuration I get the above error  
(please let me know if you/anyone can resolve it :))


Best regards,
Nikolaos Tampouratzis


Quoting Truan David via gem5-users :


Hello,
We are a team working on gem5 RISCV. We are trying to use gem5  
full-system but we are encountering some issues when mounting the  
rootfs/initramfs.


This is our setup:
- gem5 on branch develop from  
https://gem5.googlesource.com/public/gem5 (c493d2c4ad)

- BBL on branche master from https://github.com/riscv/riscv-pk.git (e8e6b3aa)
- Linux 5.10, checkout on v5.10 tag (2c85ebc57)

This is what we tried so far:

-Compiling BBL with and without specifying the DTS: No changes
-Compiling BBL with Linux vmlinux OR Image as payload: No changes
-Compiling Linux with an minimalistic initramfs which only prints a  
"Hello World" from the init script: No changes

-Using fs_linux.py OR run_riscv.py as the entry point: No changes

Here are the boot logs from different experiments, with only the  
last lines of the boot log to keep this mail short:


=
This is the boot log when specifying a disk-image param, using fs_linux.py:

Command:
$GEM5_FAST_BIN -v \
-d $GEM5_OUTPUT \
$GEM5_HOME/configs/example/riscv/fs_linux.py \
--cpu-type=AtomicSimpleCPU \
--cpu-clock=1GHz \
-n 1 \
--disk-image=$DISK \
--kernel= \
--mem-type=DDR4_2400_4x16 \
--mem-size=4GB \
--command-line="root=/dev/vda ro console=ttyS0"


 m5 terminal: Terminal 0 
...
[1.123014] [drm] radeon kernel modesetting enabled.
[1.146199] loop: module loaded
[1.147219] virtio_blk virtio0: [vda] 6821 512-byte logical  
blocks (3.49 MB/3.33 MiB)

[1.147423] vda: detected capacity change from 0 to 3492352

=
This is the boot log when NOT specifying a disk-image param, using  
fs_linux.py:


Command:
$GEM5_FAST_BIN -v \
-d $GEM5_OUTPUT \
$GEM5_HOME/configs/example/riscv/fs_linux.py \
--cpu-type=AtomicSimpleCPU \
--cpu-clock=1GHz \
-n 1 \
--kernel= \
--mem-type=DDR4_2400_4x16 \
--mem-size=4GB \
--command-line="root=/dev/vda ro console=ttyS0"

 m5 terminal: Terminal 0 
...
[1.121246] [drm] radeon kernel modesetting enabled.
[1.144593] loop: module loaded
[1.148461] libphy: Fixed MDIO Bus: probed
[1.152291] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
[1.152426] ehci-pci: EHCI PCI platform driver
[1.152703] ehci-platform: EHCI generic platform driver
[1.152981] ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
[1.153111] ohci-pci: OHCI PCI platform driver
[1.153376] ohci-platform: OHCI generic platform driver
[1.154497] usbcore: registered new interface driver uas
[1.154842] usbcore: registered new interface driver usb-storage
[1.155422] mousedev: PS/2 mouse device common for all mice
[1.156642] usbcore: registered new interface driver usbhid
[1.156760] 

[gem5-users] FS RISCV PCI

[Νικόλαος Ταμπουρατζής via gem5-users]

Dear Gem5 community,

I try to add PCI interface in RISCV arch doing the following steps  
(similar with ARM RealView - I use the gem5-v21):


1) Create a file gem5/src/dev/riscv/pci_host.cc with the following code:

#include "dev/riscv/pci_host.hh"
#include "params/GenericRiscvPciHost.hh"

GenericRiscvPciHost::GenericRiscvPciHost(const GenericRiscvPciHostParams )
: GenericPciHost(p), intBase(p.int_base), intCount(p.int_count)
{
}

uint32_t
GenericRiscvPciHost::mapPciInterrupt(
const PciBusAddr , PciIntPin pin) const
{

fatal_if(pin == PciIntPin::NO_INT,
 "%02x:%02x.%i: Interrupt from a device without interrupts\n",
 addr.bus, addr.dev, addr.func);

return intBase + (addr.dev % intCount);
}

2) Create a file gem5/src/dev/riscv/pci_host.hh with the following code:

#ifndef __DEV_RISCV_PCI_HOST_HH__
#define __DEV_RISCV_PCI_HOST_HH__

#include "dev/pci/host.hh"

struct GenericRiscvPciHostParams;

class GenericRiscvPciHost : public GenericPciHost
{
  private:
const uint32_t intBase;
const uint32_t intCount;

  public:
GenericRiscvPciHost(const GenericRiscvPciHostParams );
virtual ~GenericRiscvPciHost() {}

  protected:
uint32_t mapPciInterrupt(const PciBusAddr ,
 PciIntPin pin) const override;
};

#endif // __DEV_RISCV_PCI_HOST_HH__

3) Add the "Source('pci_host.cc')" to gem5/src/dev/riscv/SConscript

4) Add the following code in gem5/src/dev/riscv/HiFive.py according to  
RealView GenericArmPciHost:


from m5.objects.Ethernet import NSGigE, IGbE_igb, IGbE_e1000

from m5.objects.Device import BasicPioDevice
from m5.objects.PciHost import *
from m5.SimObject import SimObject

class GenericRiscvPciHost(GenericPciHost): #Add this class (PCI)
type = 'GenericRiscvPciHost'
cxx_header = "dev/riscv/pci_host.hh"
int_base   = Param.Unsigned("PCI interrupt base")
int_count  = Param.Unsigned("Maximum number of interrupts used by  
this host")


# This python parameter can be used in configuration scripts to turn
# on/off the fdt dma-coherent flag when doing dtb autogeneration
_dma_coherent = True

def generateDeviceTree(self, state):
local_state = FdtState(
addr_cells=3, size_cells=2,
cpu_cells=1, interrupt_cells=1)

node = FdtNode("pci")

if int(self.conf_device_bits) == 8:
node.appendCompatible("pci-host-cam-generic")
elif int(self.conf_device_bits) == 12:
node.appendCompatible("pci-host-ecam-generic")
else:
m5.fatal("No compatibility string for the set conf_device_width")

node.append(FdtPropertyStrings("device_type", ["pci"]))

# Cell sizes of child nodes/peripherals
node.append(local_state.addrCellsProperty())
node.append(local_state.sizeCellsProperty())
node.append(local_state.interruptCellsProperty())
# PCI address for CPU
node.append(FdtPropertyWords("reg",
state.addrCells(self.conf_base) +
state.sizeCells(self.conf_size) ))

# Ranges mapping
# For now some of this is hard coded, because the PCI module does not
# have a proper full understanding of the memory map, but adapting the
# PCI module is beyond the scope of what I'm trying to do here.
# Values are taken from the VExpress_GEM5_V1 platform.
ranges = []
# Pio address range
ranges += self.pciFdtAddr(space=1, addr=0)
ranges += state.addrCells(self.pci_pio_base)
ranges += local_state.sizeCells(0x1)  # Fixed size

# AXI memory address range
ranges += self.pciFdtAddr(space=2, addr=0)
ranges += state.addrCells(self.pci_mem_base)
ranges += local_state.sizeCells(0x4000) # Fixed size
node.append(FdtPropertyWords("ranges", ranges))

if True:   
  #Change this to True because Realview calls always  
ARM_PCI_INT_DEV

plic = self._parent.unproxy(self).plic
int_phandle = state.phandle(plic)
# Interrupt mapping
interrupts = []

# child interrupt specifier
child_interrupt = local_state.interruptCells(0x0)

# parent unit address
parent_addr = 0x0  
  #get this from /gem5/system/arm/dt/platforms file


for i in range(int(self.int_count)):
parent_interrupt = int(self.int_base) + i  
  #RISCV uses only 1 interrupt_cell in plic


interrupts += self.pciFdtAddr(device=i, addr=0) + \
child_interrupt + [int_phandle] + [parent_addr] + \
[parent_interrupt]

node.append(FdtPropertyWords("interrupt-map", interrupts))

int_count = int(self.int_count)
if int_count & (int_count - 1):
fatal("PCI interrupt count should 

[gem5-users] RISC-V Full system Linux PCI

[Νικόλαος Ταμπουρατζής via gem5-users]

Dear community,

I would like to use the IGbE_e1000 card with RISC-V Linux Full System  
Simulation. As I read in this link  
(https://gem5.googlesource.com/public/gem5/+/refs/heads/stable/RELEASE-NOTES.md) gem5 v21.0 release includes RISC-V Full system Linux boot  
support!


So, I contact Peter Yuen and he sends me the binaries, images,  
bootloader etc. As a result, I simulate a Full Linux RISCV.  
Specifically, I use the prebuilt files from here:  
https://github.com/ppeetteerrs/gem5-RISC-V-FS-Linux/ (to be noticed  
that following his instructions - Section 4, I build my own files and  
working properly).


Here is the cmd: build/RISCV/gem5.opt -d $RISCV/logs  
configs/example/riscv/fs_linux.py --kernel=$OUT/bbl --caches  
--mem-size=256MB --mem-type=DDR4_2400_8x8 --cpu-type=AtomicSimpleCPU  
--disk-image=$OUT/riscv_parsec_disk -n 1


However, as you can see in the file src/dev/riscv/HiFive.py there is  
not implemented PCI interface yet. I try to add it in order to connect  
the IGbE_e1000 ethernet card but I cannot achieve it. I do the  
following:


1) Add the src/dev/riscv/pci_host.hh file:

#ifndef __DEV_RISCV_PCI_HOST_HH__
#define __DEV_RISCV_PCI_HOST_HH__

#include "dev/pci/host.hh"

struct GenericRiscvPciHostParams;

class GenericRiscvPciHost : public GenericPciHost
{
  private:
int intBase;

  public:
GenericRiscvPciHost(const GenericRiscvPciHostParams );
virtual ~GenericRiscvPciHost() {}

  protected:
uint32_t mapPciInterrupt(const PciBusAddr , PciIntPin pin)  
const override;

};

#endif // __DEV_RISCV_PCI_HOST_HH__

2) Add the src/dev/riscv/pci_host.cc file:

#include "dev/riscv/pci_host.hh"

#include "params/GenericRiscvPciHost.hh"

GenericRiscvPciHost::GenericRiscvPciHost(const GenericRiscvPciHostParams )
: GenericPciHost(p), intBase(p.int_base)
{
}

uint32_t
GenericRiscvPciHost::mapPciInterrupt(
const PciBusAddr , PciIntPin pin) const
{
return (intBase + (uint8_t)pin);
}

3) Add "Source('pci_host.cc')" to Sconscript

4) Add the following in the src/dev/riscv/HiFive.py

class GenericRiscvPciHost(GenericPciHost):
type = 'GenericRiscvPciHost'
cxx_header = "dev/riscv/pci_host.hh"
int_base = Param.Int(0x20,
"Base number used as interrupt line and PLIC source.")

5) Add in class HiFive(Platform):

pci_host = GenericRiscvPciHost(conf_base=0x3000, conf_size='256MB',
conf_device_bits=12, pci_pio_base=0x2f00)

ethernet = IGbE_e1000(pci_bus=0, pci_dev=0, pci_func=0,
   InterruptLine=1, InterruptPin=1)


6) Add in gem5/configs/example/riscv/fs_linux.py the following:

range_list = system.platform._off_chip_ranges()
range_list.append(AddrRange(0x2f00, 0x5fff))
system.bridge.ranges = range_list

system.platform.pci_host.pio = system.iobus.mem_side_ports
system.platform.ethernet.host = system.platform.pci_host
system.platform.ethernet.pio = system.iobus.mem_side_ports
system.platform.ethernet.dma = system.iobus.cpu_side_ports

7) Add the following in the dts which is produced from auto  
generateDeviceTree:


pci@3000 {
compatible = "pci-host-ecam-generic";
device_type = "pci";
#address-cells = <0x3>;
#size-cells = <0x2>;
#interrupt-cells = <0x1>;
reg = <0x0 0x3000 0x0 0x1000>;
			ranges = <0x100 0x0 0x0 0x0 0x2f00 0x0 0x1 0x200  
0x0 0x4000 0x0 0x4000 0x0 0x1000>;
			interrupt-map = <0x0 0x0 0x0 0x1 0x2 0x20 0x0 0x0 0x0 0x2 0x2 0x21  
0x0 0x0 0x0 0x3 0x2 0x22 0x0 0x0 0x0 0x4 0x2 0x23 0x800 0x0 0x0 0x1  
0x2 0x21 0x800 0x0 0x0 0x2 0x2 0x22 0x800 0x0 0x0 0x3 0x2 0x23 0x800  
0x0 0x0 0x4 0x2 0x20 0x1000 0x0 0x0 0x1 0x2 0x22 0x1000 0x0 0x0 0x2  
0x2 0x23 0x1000 0x0 0x0 0x3 0x2 0x20 0x1000 0x0 0x0 0x4 0x2 0x21  
0x1800 0x0 0x0 0x1 0x2 0x23 0x1800 0x0 0x0 0x2 0x2 0x20 0x1800 0x0 0x0  
0x3 0x2 0x21 0x1800 0x0 0x0 0x4 0x2 0x22>;

interrupt-map-mask = <0x1800 0x0 0x0 0x>;
dma-coherent;
bus-range = <0x0 0xff>;
linux,pci-domain = <0x0>;
};

However, when I try to connect the IGbE_e1000 I get:

panic: invalid access size(?) for PCI configspace!

I would appreciate it if anyone would like to help me please! :)

Best regards,
Nikolaos


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[gem5-users] Re: IGbE_e1000 card not connected

[Νικόλαος Ταμπουρατζής via gem5-users]

Dear Giacomo,

Thank you very much for your very good instructions!!

Before I add the card, I download the latest v21 gem5 and execute the  
following command (the dtb is updated with correct addresses):


$GEM5/build/ARM/gem5.opt -d $GEM5/node1  
$GEM5/configs/example/arm/starter_fs.py --kernel=vmlinux.arm64  
--disk-image=linaro-minimal-aarch64.img --dtb=armv8_gem5_v1_1cpu.dtb


but I get kernel panic:

0: system.remote_gdb: listening for remote gdb on port 7000
info: Using bootloader at address 0x10
info: Using kernel entry physical address at 0x8008
warn: DTB file specified, but no device tree support in kernel
warn: Existing EnergyCtrl, but no enabled DVFSHandler found.
panic: panic condition !e occurred: Failed to find kernel symbol 'panic'
Memory Usage: 2619356 KBytes
Program aborted at tick 0
--- BEGIN LIBC BACKTRACE ---
/home/riscv/gem5/build/ARM/gem5.opt(_Z15print_backtracev+0x2c)[0x5564f3e562bc]
/home/riscv/gem5/build/ARM/gem5.opt(_Z12abortHandleri+0x48)[0x5564f3eb8828]
/lib/x86_64-linux-gnu/libpthread.so.0(+0x12980)[0x7f1536bc0980]
/lib/x86_64-linux-gnu/libc.so.6(gsignal+0xc7)[0x7f15367fbfb7]
/lib/x86_64-linux-gnu/libc.so.6(abort+0x141)[0x7f15367fd921]
/home/riscv/gem5/build/ARM/gem5.opt(+0xb26b8f)[0x5564f3e4ab8f]
/home/riscv/gem5/build/ARM/gem5.opt(+0xd5a1b2)[0x5564f407e1b2]
/home/riscv/gem5/build/ARM/gem5.opt(_ZN6ArmISA7FsLinux7startupEv+0x447)[0x5564f407ea27]
/home/riscv/gem5/build/ARM/gem5.opt(+0x1983956)[0x5564f4ca7956]
/home/riscv/gem5/build/ARM/gem5.opt(+0xb54fdc)[0x5564f3e78fdc]
/usr/lib/x86_64-linux-gnu/libpython3.6m.so.1.0(_PyCFunction_FastCallDict+0x20a)[0x7f153632558a]
/usr/lib/x86_64-linux-gnu/libpython3.6m.so.1.0(+0x17bec8)[0x7f153628dec8]
/usr/lib/x86_64-linux-gnu/libpython3.6m.so.1.0(_PyEval_EvalFrameDefault+0x4ec3)[0x7f1536294303]
/usr/lib/x86_64-linux-gnu/libpython3.6m.so.1.0(+0x17ba0f)[0x7f153628da0f]
/usr/lib/x86_64-linux-gnu/libpython3.6m.so.1.0(+0x17c0fc)[0x7f153628e0fc]
/usr/lib/x86_64-linux-gnu/libpython3.6m.so.1.0(_PyEval_EvalFrameDefault+0x4ec3)[0x7f1536294303]
/usr/lib/x86_64-linux-gnu/libpython3.6m.so.1.0(+0x17a803)[0x7f153628c803]
/usr/lib/x86_64-linux-gnu/libpython3.6m.so.1.0(+0x17c2be)[0x7f153628e2be]
/usr/lib/x86_64-linux-gnu/libpython3.6m.so.1.0(_PyEval_EvalFrameDefault+0x4ec3)[0x7f1536294303]
/usr/lib/x86_64-linux-gnu/libpython3.6m.so.1.0(+0x17a803)[0x7f153628c803]
/usr/lib/x86_64-linux-gnu/libpython3.6m.so.1.0(+0x17c2be)[0x7f153628e2be]
/usr/lib/x86_64-linux-gnu/libpython3.6m.so.1.0(_PyEval_EvalFrameDefault+0x4ec3)[0x7f1536294303]
/usr/lib/x86_64-linux-gnu/libpython3.6m.so.1.0(+0x17ba0f)[0x7f153628da0f]
/usr/lib/x86_64-linux-gnu/libpython3.6m.so.1.0(PyEval_EvalCodeEx+0x3e)[0x7f153628e4ce]
/usr/lib/x86_64-linux-gnu/libpython3.6m.so.1.0(PyEval_EvalCode+0x1b)[0x7f153628f24b]
/usr/lib/x86_64-linux-gnu/libpython3.6m.so.1.0(+0x18855d)[0x7f153629a55d]
/usr/lib/x86_64-linux-gnu/libpython3.6m.so.1.0(_PyCFunction_FastCallDict+0x1bb)[0x7f153632553b]
/usr/lib/x86_64-linux-gnu/libpython3.6m.so.1.0(+0x17c1ec)[0x7f153628e1ec]
/usr/lib/x86_64-linux-gnu/libpython3.6m.so.1.0(_PyEval_EvalFrameDefault+0x4ec3)[0x7f1536294303]
/usr/lib/x86_64-linux-gnu/libpython3.6m.so.1.0(+0x17ba0f)[0x7f153628da0f]
/usr/lib/x86_64-linux-gnu/libpython3.6m.so.1.0(+0x17c0fc)[0x7f153628e0fc]
/usr/lib/x86_64-linux-gnu/libpython3.6m.so.1.0(_PyEval_EvalFrameDefault+0x4ec3)[0x7f1536294303]
--- END LIBC BACKTRACE ---
Aborted (core dumped)


Best regards,
Nikolaos Tampouratzis

Παραθέτοντας από Giacomo Travaglini via gem5-users :


Hi Nikos,


-Original Message-
From: Νικόλαος Ταμπουρατζής via gem5-users 
Sent: 31 March 2021 21:04
To: gem5-users@gem5.org
Cc: Νικόλαος Ταμπουρατζής 
Subject: [gem5-users] IGbE_e1000 card not connected

Dear gem5 community,

I would like to use the IGbE_e1000 card in the latest gem5 version in ARM FS
mode. As I can see the card is connected only in VExpress_EMM and
VExpress_EMM64. However, I cannot boot correctly the latest gem5 version
either in VExpress_EMM or VExpress_EMM64 using the 20180409.tar.xz
kernels and images from the following link:
https://www.gem5.org/documentation/general_docs/fullsystem/guest_bin
aries.

So I achieve to boot the gem5 using the VExpress_GEM5_V1 machine type
(specifically through this configuration: $GEM5/build/ARM/gem5.opt -d
$GEM5/node0 $GEM5/configs/example/fs.py
--kernel=vmlinux.vexpress_gem5_v1_64
--disk-image=linaro-minimal-aarch64.img
--machine-type=VExpress_GEM5_V1 --dtb=armv7_gem5_v1_1cpu.dtb).


It not related to your problem, but:

1) You are using an armv8 kernel, with an armv7 DTB
2) We tend to discourage using fs.py for Arm simulations; I would  
recommend you having a look
At either configs/example/arm/fs_bigLITTLE.py or  
configs/example/arm/starter_fs.py depending on what you are trying  
to model




However, the IGbE_e1000 card is not included in the VExpress_GEM5_V1...
So I tried to connect it in VExpress_GEM5_Base (which is used from
VExpress_GEM5_V1). Specifically,

1) I add the following (below pci_host

[gem5-users] Re: IGbE_e1000 card not connected

[Νικόλαος Ταμπουρατζής via gem5-users]

Dear Gabe,

I use the latest version of gem5 (I download it before 5 days). Please  
follow my instructions and I think that you can reproduce the error.


Best regards,
Nikos


Παραθέτοντας από Gabe Black via gem5-users :


Hi Nikos, how old is your gem5 checkout? The change below fixed some
aspects of how PCI devices are managed, including one which could cause
failures like you're seeing.

commit 9be18aa66ddb8db4da043279819d45bc72b7b086
Author: Gabe Black 
Date:   Fri Oct 2 03:00:04 2020 -0700

On Wed, Mar 31, 2021 at 1:04 PM Νικόλαος Ταμπουρατζής via gem5-users <
gem5-users@gem5.org> wrote:


Dear gem5 community,

I would like to use the IGbE_e1000 card in the latest gem5 version in
ARM FS mode. As I can see the card is connected only in VExpress_EMM
and VExpress_EMM64. However, I cannot boot correctly the latest gem5
version either in VExpress_EMM or VExpress_EMM64 using the
20180409.tar.xz kernels and images from the following link:
https://www.gem5.org/documentation/general_docs/fullsystem/guest_binaries.

So I achieve to boot the gem5 using the VExpress_GEM5_V1 machine type
(specifically through this configuration: $GEM5/build/ARM/gem5.opt -d
$GEM5/node0 $GEM5/configs/example/fs.py
--kernel=vmlinux.vexpress_gem5_v1_64
--disk-image=linaro-minimal-aarch64.img
--machine-type=VExpress_GEM5_V1 --dtb=armv7_gem5_v1_1cpu.dtb).

However, the IGbE_e1000 card is not included in the
VExpress_GEM5_V1... So I tried to connect it in VExpress_GEM5_Base
(which is used from VExpress_GEM5_V1). Specifically,

1) I add the following (below pci_host = GenericArmPciHost)

# Attach any PCI devices that are supported
def attachPciDevices(self):
self.ethernet = IGbE_e1000(pci_bus=0, pci_dev=0, pci_func=0,
InterruptLine=1, InterruptPin=1)

2) I add the self.ethernet in def _off_chip_devices(self).

Unfortunatelly, I get the following error after 2 minutes of
simulation (during this message: [0.135098] e1000 :00:00.0:
enabling device ( -> 0002)):

fatal: system.iobus has two ports responding within range
[0x8000:0x8002]:
 system.realview.ethernet.pio
 system.iobridge.cpu_side_port

Looking in previous gem5 versions, in the GenericArmPciHost there is
not the "pci_mem_base=0x4000". So, I remove this and I am able to
boot Linux and see the eth0 but I do not know if is correct to remove
the pci_mem_base.

I would appreciate it if anyone would like to explain me please! :)

Best regards,
Nikos
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[gem5-users] RISC-V Full system Linux

[Νικόλαος Ταμπουρατζής via gem5-users]

Dear gem5 community,

As I read in this link  
https://gem5.googlesource.com/public/gem5/+/refs/heads/stable/RELEASE-NOTES.md


gem5 v21.0 release includes RISC-V Full system Linux boot support! May  
you help me please where can I find the Bootloader (bbl), Linux  
Kernel, and BusyBox image (expect to build them from scratch)? In  
addition, is there somewhere the run script?


I would appreciate it if anyone would like to help me please! :)

Best regards,
Nikolaos
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[gem5-users] IGbE_e1000 card not connected

[Νικόλαος Ταμπουρατζής via gem5-users]

Dear gem5 community,

I would like to use the IGbE_e1000 card in the latest gem5 version in  
ARM FS mode. As I can see the card is connected only in VExpress_EMM  
and VExpress_EMM64. However, I cannot boot correctly the latest gem5  
version either in VExpress_EMM or VExpress_EMM64 using the  
20180409.tar.xz kernels and images from the following link:  
https://www.gem5.org/documentation/general_docs/fullsystem/guest_binaries.


So I achieve to boot the gem5 using the VExpress_GEM5_V1 machine type  
(specifically through this configuration: $GEM5/build/ARM/gem5.opt -d  
$GEM5/node0 $GEM5/configs/example/fs.py  
--kernel=vmlinux.vexpress_gem5_v1_64  
--disk-image=linaro-minimal-aarch64.img  
--machine-type=VExpress_GEM5_V1 --dtb=armv7_gem5_v1_1cpu.dtb).


However, the IGbE_e1000 card is not included in the  
VExpress_GEM5_V1... So I tried to connect it in VExpress_GEM5_Base  
(which is used from VExpress_GEM5_V1). Specifically,


1) I add the following (below pci_host = GenericArmPciHost)

# Attach any PCI devices that are supported
def attachPciDevices(self):
   self.ethernet = IGbE_e1000(pci_bus=0, pci_dev=0, pci_func=0,  
InterruptLine=1, InterruptPin=1)


2) I add the self.ethernet in def _off_chip_devices(self).

Unfortunatelly, I get the following error after 2 minutes of  
simulation (during this message: [0.135098] e1000 :00:00.0:  
enabling device ( -> 0002)):


fatal: system.iobus has two ports responding within range  
[0x8000:0x8002]:

system.realview.ethernet.pio
system.iobridge.cpu_side_port

Looking in previous gem5 versions, in the GenericArmPciHost there is  
not the "pci_mem_base=0x4000". So, I remove this and I am able to  
boot Linux and see the eth0 but I do not know if is correct to remove  
the pci_mem_base.


I would appreciate it if anyone would like to explain me please! :)

Best regards,
Nikos
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