[gem5-users] snoop_filter panic error

Dear gem5 community,   I have used the latest gem5 version with the following command: ./build/RISCV/gem5.fast ./configs/example/gem5_library/riscvmatched-fs.py and I boot Ubuntu successfully. The problem is that after 10 hours of simulation I get the following error:  

[gem5-users] Re: RISCV Power/Energy Estimation

at 7:35 PM 최순원 via gem5-users wrote: Dear Νικόλαος Ταμπουρατζής,   Your description is perfect. I was able to get "mcpatOutput.txt" without any problem like this.   If you don't mind, can I ask you two more questions?   1) How can I get the t

[gem5-users] Re: RISCV Power/Energy Estimation

Dear Soonwon,   I had used McPAT v1.3. Specifically, you can do the following:   1) git clone https://github.com/H2020-COSSIM/cMcPAT.git   2) cd cMcPAT/mcpat 3) make all   4) cd cMcPAT/Scripts (here you can see the GEM5ToMcPAT.py). Usage: GEM5toMcPAT.py [options] (json)> -o  

[gem5-users] RISCV Power/Energy Estimation

Dear gem5 users, In the past, I got power/energy estimations of ARM and X86 ISAs through McPAT. However, I would like to get power estimations using RISCV FS. I found the McPAT-Calib in which the authors describe that they use it in combination with the gem5. Has anyone used this or

[gem5-users] RISCVMatchedBoard FS

Dear gem5 community, I try to simulate RISCV FS using the RISCVMatchedBoard but after 2 hours it does not get output in the terminal. Specifically, I use the following command (with latest gem5 version): ./build/RISCV/gem5.opt configs/example/gem5_library/riscvmatched-fs.py To be noticed

[gem5-users] Kernel Panic ARM Ubuntu

Dear gem5 community, I have successfully simulated the HPCG benchmark using ARM Ubuntu in gem5 in 2 cores. However, when I try to simulate it using more cores (i.e. 8 cores) it takes more simulated time, and I get the following kernel panic after approximately 20 hours of simulation: [

[gem5-users] Re: How to use different clock frequency in cpu and system

option, but you just need to edit the system frequency in BaseSimpleSystem [1] Kind Regards Giacomo [1]: https://github.com/gem5/gem5/blob/stable/configs/example/arm/devices.py#L274 From: Νικόλαος Ταμπουρατζής via gem5-users Date: Friday, 23 December 2022 at 13:19 To: gem5-users Cc: Ν

[gem5-users] How to use different clock frequency in cpu and system

Dear gem5 community, I am using configs/example/arm/starter_fs.py configuration in order to simulate ARM FS. However, I would like to use different clock frequencies in the CPU and different in the system clock. Is there this option in the latest gem5 release? Thank you! Best regards,

[gem5-users] Re: HPCG on RISCV

all, I also ran into the same problem using another benchmark. I want to note that this problem also appears when using the AtomicCPU. Regards, Hoa Nguyen On Tue, Nov 1, 2022 at 3:02 AM Νικόλαος Ταμπουρατζής via gem5-users < gem5-users@gem5.org> wrote: Dear Boddy, Thank you for the

[gem5-users] Re: HPCG on RISCV

this bug? Unfortunately not, I've been very busy with the upcoming gem5 release and haven't had time to investigate this further. -- Dr. Bobby R. Bruce Room 3050, Kemper Hall, UC Davis Davis, CA, 95616 web: https://www.bobbybruce.net On Mon, Oct 31, 2022 at 1:45 AM Νικόλαος Ταμπουρατζής via gem5-users

[gem5-users] Re: HPCG on RISCV

6 web: https://www.bobbybruce.net On Fri, Oct 7, 2022 at 12:50 PM Νικόλαος Ταμπουρατζής < ntampourat...@ece.auth.gr> wrote: Dear Jason & Boddy, Unfortunately, I have tried my simple example without the sqrt function and the problem remains. Specifically, I have the following simple c

[gem5-users] Re: HPCG on RISCV

that both sqrt_i and result were zeroed out at the same time. Does the problem appear in other ISA FS mode, e.g. x86 FS mode? Can you show the objdump of the loop as well? Regards, Hoa Nguyen On Thu, Oct 6, 2022, 04:06 Νικόλαος Ταμπουρατζής wrote: Dear Jason, all, I am trying to find the accuracy

[gem5-users] Re: HPCG on RISCV

in SE mode and running in FS mode we are using the same rounding mode. My hypothesis is that in FS mode the rounding mode is set differently. Cheers, Jason On Fri, Oct 7, 2022 at 12:15 AM Νικόλαος Ταμπουρατζής < ntampourat...@ece.auth.gr> wrote: Dear Boddy, Thanks a lot for the effort! I l

[gem5-users] Re: HPCG on RISCV

at 2:26 PM Νικόλαος Ταμπουρατζής < ntampourat...@ece.auth.gr> wrote: In my previous results, I had used double (not float) for the following variables: result, sq_i and sq_j. In the case of float instead of double I get "nan" and not 0.00. Quoting Νικόλαος Ταμπουρατζής : &

[gem5-users] Re: HPCG on RISCV

In my previous results, I had used double (not float) for the following variables: result, sq_i and sq_j. In the case of float instead of double I get "nan" and not 0.00. Quoting Νικόλαος Ταμπουρατζής : Dear Jason, all, I am trying to find the accuracy problem with RISC

[gem5-users] Re: HPCG on RISCV

nd the correct simulated tick in which the application started in FS (using m5 dumpstats), and I start the --debug-start, but the trace file which is generated is 10x larger than SE mode for the same application. How can I compare them? Thank you in advance! Best regards, Nikos Quoting Ν

[gem5-users] Re: HPCG on RISCV

code for executing instructions, so I don't think that's the problem. Have you tried running for smaller inputs or just one iteration? Jason On Wed, Sep 21, 2022 at 9:04 AM Νικόλαος Ταμπουρατζής < ntampourat...@ece.auth.gr> wrote: Dear Bobby, Iam trying to add --debug-flags=Exec (build

[gem5-users] Re: HPCG on RISCV

ffer. Cheers, Jason On Tue, Sep 20, 2022 at 2:45 PM Νικόλαος Ταμπουρατζής < ntampourat...@ece.auth.gr> wrote: Dear Bobby, In QEMU I get the same (correct) results that I get in SE mode simulation. I get invalid results in FS simulation (in both riscv-fs.py and riscv-ubuntu-run.py). I cannot a

[gem5-users] Re: HPCG on RISCV

On Tue, Sep 20, 2022 at 12:58 AM Νικόλαος Ταμπουρατζής < ntampourat...@ece.auth.gr> wrote: Dear Bobby, 1) I use the original riscv-fs.py which is provided in the latest gem5 release. I run the gem5 once (./build/RISCV/gem5.fast -d ./HPCG_FS_results ./configs/example/gem5_library/riscv

[gem5-users] Re: HPCG on RISCV

y/riscv-fs.py? Can you attach the script here? 2. What error are you getting or in what way are the results invalid? - Dr. Bobby R. Bruce Room 3050, Kemper Hall, UC Davis Davis, CA, 95616 web: https://www.bobbybruce.net On Mon, Sep 19, 2022 at 1:43 PM Νικόλαος Ταμπουρατζής < ntampourat...@e

[gem5-users] HPCG on RISCV

Dear gem5 community, I have successfully cross-compile the HPCG benchmark for RISCV (Serial version, without MPI and OpenMP). While it working properly in gem5 SE mode (./build/RISCV/gem5.fast -d ./HPCG_SE_results ./configs/example/se.py -c xhpcg --options '--nx=16 --ny=16 --nz=16

[gem5-users] Re: IGbE / Intel 8254x - NIC support on Gem5 (with #COSSIM changes)

ntu.img /mnt $ cd /mnt $ sudo mount --bind /proc /mnt/proc $ sudo mount --bind /dev /mnt/dev $ sudo chroot . $ cd root -Original Message- From: Νικόλαος Ταμπουρατζής Sent: Monday, June 20, 2022 10:55 AM To: The gem5 Users mailing list Subject: [gem5-users] Re: IGbE / Intel 8254x - NIC

[gem5-users] Re: IGbE / Intel 8254x - NIC support on Gem5?

/dev/mem: Operation not permitted -Original Message- From: Νικόλαος Ταμπουρατζής Sent: Wednesday, May 11, 2022 12:10 PM To: The gem5 Users mailing list Subject: [gem5-users] Re: IGbE / Intel 8254x - NIC support on Gem5? Dear rshankar, As I know, the NIC in gem5 is worked only with

[gem5-users] Re: RISCV FS Read-only file system

#487 . I think it could be fixed by changing "ro" to "rw", which tells the kernel to mount "/" as read-write. Regards, Hoa Nguyen On Wed, Jun 8, 2022 at 7:37 AM Νικόλαος Ταμπουρατζής < ntampourat...@ece.auth.gr> wrote: Dear gem5 community, I have successfu

[gem5-users] RISCV FS Read-only file system

Dear gem5 community, I have successfully run RISCV FS using the following command: ./build/RISCV/gem5.opt configs/example/gem5_library/riscv-fs.py However, I cannot write anything inside the simulated image because I get "Read-only file system". How can I resolve it? My benchmark produces a

[gem5-users] Re: Store changes in image after FS termination

will be saved into your run folder. It is similar to how " m5 readfile" at the beginning. Best, Heng On May 17, 2022, at 09:59, Νικόλαος Ταμπουρατζής wrote: Dear gem5 community, I simulate the official ubuntu 18.04 image using FS simulation ($GEM5/build/ARM/gem5.fast -d $

[gem5-users] Store changes in image after FS termination

Dear gem5 community, I simulate the official ubuntu 18.04 image using FS simulation ($GEM5/build/ARM/gem5.fast -d $GEM5/node0 $GEM5/configs/example/arm/starter_fs.py --kernel=vmlinux.arm64 --num-cores=8 --disk-image=ubuntu-18.04-arm64-docker.img) However, I see that the changes inside

[gem5-users] Re: IGbE / Intel 8254x - NIC support on Gem5?

We have not synchronize the COSSIM code in official gem5 release because it requires HLA libriries. > 11 Μαΐ 2022, 11:13 μμ, ο χρήστης «Νικόλαος Ταμπουρατζής > » έγραψε: > > Dear Raghu, > > The steps which I sent you is for dual gem5 (not for cgem5). In this >

[gem5-users] Re: IGbE / Intel 8254x - NIC support on Gem5?

11, 2022 12:58 PM > To: 'The gem5 Users mailing list' > Subject: [gem5-users] Re: IGbE / Intel 8254x - NIC support on Gem5? > > Thanks very much Nikolaos for the detailed step-by-step response. This is > highly appreciated. I'll try and get back > > Raghu > > -Origi

[gem5-users] Re: IGbE / Intel 8254x - NIC support on Gem5?

Dear rshankar, As I know, the NIC in gem5 is worked only with Full System (FS) mode in order to load the correct drivers etc. You can add the following in order to add the NIC in FS mode: https://github.com/H2020-COSSIM/cgem5/blob/main/src/dev/x86/SouthBridge.py (see the lines with

[gem5-users] Re: riscv-ubuntu 20.04 FS mode

. Bruce Room 3050, Kemper Hall, UC Davis Davis, CA, 95616 web: https://www.bobbybruce.net On Mon, Mar 21, 2022 at 1:31 PM Νικόλαος Ταμπουρατζής < ntampourat...@ece.auth.gr> wrote: I use the following configuration: $GEM5/build/RISCV/gem5.fast -d $GEM5/node0 $GEM5/configs/example/gem5_library

[gem5-users] Re: riscv-ubuntu 20.04 FS mode

g? -- Dr. Bobby R. Bruce Room 3050, Kemper Hall, UC Davis Davis, CA, 95616 web: https://www.bobbybruce.net On Mon, Mar 21, 2022 at 9:50 AM Νικόλαος Ταμπουρατζής via gem5-users < gem5-users@gem5.org> wrote: Dear Boddy, Thank you for the image and instructions! However, when I try to simu

[gem5-users] Re: riscv-ubuntu 20.04 FS mode

, Bobby -- Dr. Bobby R. Bruce Room 3050, Kemper Hall, UC Davis Davis, CA, 95616 web: https://www.bobbybruce.net On Mon, Mar 14, 2022 at 12:08 PM Νικόλαος Ταμπουρατζής < ntampourat...@ece.auth.gr> wrote: Dear Boddy, I have used the same gem5_init.sh in gem5 X86 architecture and all s

[gem5-users] Re: Gem5 FS mode exit after booting

Dear Waliullah, I think that the image has a gem5_init script that executes the m5 exit command. You can use the image from gem5 resources (http://dist.gem5.org/dist/v21-2/images/x86/ubuntu-18-04/x86-ubuntu.img.gz) with vmlinux-5.4.49 kernel

[gem5-users] Re: riscv-ubuntu 20.04 FS mode

this restriction. -- Dr. Bobby R. Bruce Room 3050, Kemper Hall, UC Davis Davis, CA, 95616 web: https://www.bobbybruce.net On Mon, Mar 14, 2022 at 11:38 AM Νικόλαος Ταμπουρατζής < ntampourat...@ece.auth.gr> wrote: Thank you Boddy! I have also used this image but I get the same READ-ONLY p

[gem5-users] Re: riscv-ubuntu 20.04 FS mode

://www.bobbybruce.net On Mon, Mar 14, 2022 at 11:10 AM Νικόλαος Ταμπουρατζής < ntampourat...@ece.auth.gr> wrote: Dear Boddy, Thank you very much for the clarifications! I used the pre-build disk image from gem5 resources (https://github.com/gem5/gem5-resources/tree/stable/src/risc

[gem5-users] Re: riscv-ubuntu 20.04 FS mode

ow did you remove your systemd processes? How are you building this disk image? With what OS are you booting? Kind regards, Bobby -- Dr. Bobby R. Bruce Room 3050, Kemper Hall, UC Davis Davis, CA, 95616 web: https://www.bobbybruce.net On Mon, Mar 14, 2022 at 4:04 AM Νικόλαος Ταμπουρατζής < n

[gem5-users] Re: FS RISCV PCI

Νικόλαος Ταμπουρατζής via gem5-users < gem5-users@gem5.org> wrote: Dear Gem5 community, I try to add PCI interface in RISCV arch doing the following steps (similar with ARM RealView - I use the gem5-v21): 1) Create a file gem5/src/dev/riscv/pci_host.cc with the following code: #include &quo

[gem5-users] Re: riscv-ubuntu 20.04 FS mode

one' if there is no disk image ) board.set_kernel_disk_workload( kernel = Resource("riscv-bootloader-vmlinux-5.10"), disk_image = image, ) ``` Dr. Bobby R. Bruce Room 3050, Kemper Hall, UC Davis Davis, CA, 95616 web: https://www.bobbybruce.net On Sat, Feb 12, 2022 at 7:19 AM Νικόλαος Ταμπουρατζής via

[gem5-users] Re: riscv-ubuntu 20.04 FS mode

workload( kernel = Resource("riscv-bootloader-vmlinux-5.10"), disk_image = image, ) ``` Dr. Bobby R. Bruce Room 3050, Kemper Hall, UC Davis Davis, CA, 95616 web: https://www.bobbybruce.net On Sat, Feb 12, 2022 at 7:19 AM Νικόλαος Ταμπουρατζής via gem5-users < gem5-users@gem

[gem5-users] Re: riscv-ubuntu 20.04 FS mode

downloads automatically the riscv-ubuntu-20.04-img. How can I set another image? The --disk-image option is not working. Thank you in advance!!! Best regards, Nikos Quoting Νικόλαος Ταμπουρατζής via gem5-users : Dear Hoa, Thank you very much for your information! I try to emulate the ubuntu-ima

[gem5-users] Re: riscv-ubuntu 20.04 FS mode

ates from Ubuntu servers. We can turn off the motd service, which would improve the booting time by a lot. However, I don't really know how to turn off the network service. I hope that somebody will help with the systemd stuff. Regards, Hoa Nguyen On Fri, Feb 11, 2022 at 4:57 AM Νικόλαος Ταμπο

[gem5-users] riscv-ubuntu 20.04 FS mode

Dear community, I have just downloaded the latest version of gem5 (v21.2.1) and I try to simulate the FS using the riscv-ubuntu-run.py (./build/RISCV/gem5.opt configs/example/gem5_library/riscv-ubuntu-run.py). It downloads automatically both riscv-ubuntu-20.04-img and

[gem5-users] ARM KVM

Dear gem5 community, I have installed the latest gem5 on an x86 machine. Is it possible to run ARM FS with kvm on X86 machine or the host machine must be ARM-based? I try to execute the following configuration (from this thread

[gem5-users] PCI Express on gem5

Dear gem5 community, I have successfully connected the two gem5s through Gigabit PCI e1000 card on ARM FS. However, I would like to use a faster card (more than gigabit) based on PCI-E instead of PCI. Is there any work on this? I found this work:

[gem5-users] SSH on ARM Full System

Dear gem5 community, I have connected successfully two gem5s through e1000 ethernet card. You can see the terminal output in the following commands: 1st GEM5: root@aarch64-gem5:/# ifconfig eth0: flags=4163 mtu 1500 inet 192.168.0.2 netmask 255.255.255.0 broadcast 192.168.0.255

[gem5-users] Re: gem5 RISCV, issue on boot when mounting filesystem

Dear David, I have used the bbl, Linux Kernel, and riscv_disk from the following GitHub: https://github.com/ppeetteerrs/gem5-RISC-V-FS-Linux/ .You can use either the files from prebuild directory or you can create your own according to instructions of this Github. Specifically, I have

[gem5-users] FS RISCV PCI

Dear Gem5 community, I try to add PCI interface in RISCV arch doing the following steps (similar with ARM RealView - I use the gem5-v21): 1) Create a file gem5/src/dev/riscv/pci_host.cc with the following code: #include "dev/riscv/pci_host.hh" #include "params/GenericRiscvPciHost.hh"

[gem5-users] RISC-V Full system Linux PCI

Dear community, I would like to use the IGbE_e1000 card with RISC-V Linux Full System Simulation. As I read in this link (https://gem5.googlesource.com/public/gem5/+/refs/heads/stable/RELEASE-NOTES.md) gem5 v21.0 release includes RISC-V Full system Linux boot support! So, I contact

[gem5-users] Re: IGbE_e1000 card not connected

/libpython3.6m.so.1.0(_PyEval_EvalFrameDefault+0x4ec3)[0x7f1536294303] --- END LIBC BACKTRACE --- Aborted (core dumped) Best regards, Nikolaos Tampouratzis Παραθέτοντας από Giacomo Travaglini via gem5-users : Hi Nikos, -Original Message- From: Νικόλαος Ταμπουρατζής via gem5-users Sent: 31

[gem5-users] Re: IGbE_e1000 card not connected

aspects of how PCI devices are managed, including one which could cause failures like you're seeing. commit 9be18aa66ddb8db4da043279819d45bc72b7b086 Author: Gabe Black Date: Fri Oct 2 03:00:04 2020 -0700 On Wed, Mar 31, 2021 at 1:04 PM Νικόλαος Ταμπουρατζής via gem5-users < gem5-users@gem5.

[gem5-users] RISC-V Full system Linux

Dear gem5 community, As I read in this link https://gem5.googlesource.com/public/gem5/+/refs/heads/stable/RELEASE-NOTES.md gem5 v21.0 release includes RISC-V Full system Linux boot support! May you help me please where can I find the Bootloader (bbl), Linux Kernel, and BusyBox image

[gem5-users] IGbE_e1000 card not connected

Dear gem5 community, I would like to use the IGbE_e1000 card in the latest gem5 version in ARM FS mode. As I can see the card is connected only in VExpress_EMM and VExpress_EMM64. However, I cannot boot correctly the latest gem5 version either in VExpress_EMM or VExpress_EMM64 using the