>You might find forthcoming APAR OA47689 PTF UA90982 of interest. This is
>likely to be on or about December 10.
>It is likely that no additional information will be available until that
>time.
>Instead of "installation pick" it might be "installation tells the system
>what is available, and
] On Behalf
Of Shmuel Metz (Seymour J.)
Sent: Tuesday, December 01, 2015 6:25 PM
To: IBM-MAIN@LISTSERV.UA.EDU
Subject: (External):Re: Straightforward way to determine hardware architecture
level?
In
<sn1pr0101mb1520a1ecdd98150f6c931ef3ce...@sn1pr0101mb1520.prod.exchangelabs.com>,
on 12/01/2015
On Wed, Dec 2, 2015 at 11:44 AM, J O Skip Robinson wrote:
> I'm grateful to this thread for the news that MVCIN lives on. When it
> disappeared on the 3090--talk about unexpected S0C1--I did a brief RIP and
> never looked for it again. MVCIN allowed you to reverse a
In
,
on 12/01/2015
at 10:57 PM, J O Skip Robinson said:
>MVCIN was indeed a useful instruction. I encountered it (IIRC) on a
>4381. I assumed that, like typical new instructions, it would
On Wed, 2 Dec 2015 17:44:38 +, J O Skip Robinson
wrote:
>I'm grateful to this thread for the news that MVCIN lives on. When it
>disappeared on the 3090--talk about unexpected S0C1--I did a brief RIP and
>never looked for it again. MVCIN allowed you to reverse a
):Re: Straightforward way to determine hardware architecture
level?
On Tue, 1 Dec 2015 12:52:05 +, Bob Shannon wrote:
>> Amdahl responded by shipping some code that was loaded early in IPL
>>to accommodate the new instructions
>
>SE and SP Assist. They trapped the ab
On 12/01/2015 10:27 AM, Tom Marchant wrote:
On Tue, 1 Dec 2015 12:52:05 +, Bob Shannon wrote:
Amdahl responded by shipping some code that was loaded early in IPL to
accommodate the new instructions
SE and SP Assist. They trapped the abend in the FLIH. I remember it well.
That's SE
er 01, 2015 7:27 AM
To: IBM-MAIN@LISTSERV.UA.EDU
Subject: (External):Re: Straightforward way to determine hardware
architecture level?
That's SE Assist. And it led to the design on the 580 series of
computers that provided a third state of operation called (IIRC)
System state. The 580 design i
[mailto:IBM-MAIN@LISTSERV.UA.EDU] On Behalf
Of Steve Thompson
Sent: Tuesday, December 01, 2015 2:05 PM
To: IBM-MAIN@LISTSERV.UA.EDU
Subject: (External):Re: Straightforward way to determine hardware architecture
level?
On 12/01/2015 10:27 AM, Tom Marchant wrote:
> On Tue, 1 Dec 2015 12:52:05 +0
On Dec 1, 2015, at 3:19 PM, J O Skip Robinson wrote:
Timeframe was 1980 plus or minus. I was a true novice sysprog and
kept an arm's length from OS innards. It was during that two-year
gig that MVS/SP was announced, so not likely available just yet. I
only remember being impressed with the
On 1 December 2015 at 17:57, J O Skip Robinson
wrote:
> MVCIN was indeed a useful instruction. I encountered it (IIRC) on a 4381.
> I assumed that, like typical new instructions, it would stick around for
> the duration. I was later shocked to discover that it had been
Mike Schwab wrote:
>How about compiling at all ARCHLEVELs, then letting the installation
>pick which level to install. Have the install program issue a warning
>if the current machine does not meet the ARCHLEVEL selected.
I like the core of your idea. All levels might be too much to manage (7
On Tue, 1 Dec 2015 12:52:05 +, Bob Shannon wrote:
>> Amdahl responded by shipping some code that was loaded early in IPL to
>>accommodate the new instructions
>
>SE and SP Assist. They trapped the abend in the FLIH. I remember it well.
That's SE Assist. And it led to the design on the 580
> Amdahl responded by shipping some code that was loaded early in IPL to
> accommodate the new instructions
SE and SP Assist. They trapped the abend in the FLIH. I remember it well.
Bob Shannon
Rocket Software
Rocket Software, Inc. and subsidiaries ■ 77 Fourth
Ed Gould wrote:
On Nov 30, 2015, at 5:54 PM, Charles Mills wrote:
SNIP-
With the advent of facility and function indications in
z/Architecture, the technique of trial execution should
be avoided - particularly if a workload may be relocated
to
>How about compiling at all ARCHLEVELs, then letting the installation
>pick which level to install. Have the install program issue a warning
>if the current machine does not meet the ARCHLEVEL selected.
You might find forthcoming APAR OA47689 PTF UA90982 of interest. This is
likely to be on or
--Original Message-
> From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On
> Behalf Of Ed Gould
> Sent: Monday, November 30, 2015 11:49 AM
> To: IBM-MAIN@LISTSERV.UA.EDU
> Subject: Re: Straightforward way to determine hardware architecture level?
>
> Charles:
>
In <1a619cdc-a055-40ec-9821-4337587d6...@copper.net>, on 11/29/2015
at 08:17 PM, Stevet said:
>This is why you have specialty routines that you load and if I
>remember correctly, IDENTIFY.
You don't need IDENTIFY unless you want to use system assisted linkage
to a name
al Message-
From: IBM Mainframe Discussion List [mailto:IBM-
m...@listserv.ua.edu] On
Behalf Of Ed Gould
Sent: Sunday, November 29, 2015 4:22 PM
To: IBM-MAIN@LISTSERV.UA.EDU
Subject: Re: Straightforward way to determine hardware architecture
level?
Charles,
I have been watching this thread a
mailto:IBM-MAIN@LISTSERV.UA.EDU] On
Behalf Of Ed Gould
Sent: Monday, November 30, 2015 11:49 AM
To: IBM-MAIN@LISTSERV.UA.EDU
Subject: Re: Straightforward way to determine hardware architecture level?
Charles:
On Nov 30, 2015, at 7:59 AM, Charles Mills wrote:
> Sorry. MSUs are *incredibly* impo
On Nov 30, 2015, at 8:32 AM, Elardus Engelbrecht wrote:
Charles Mills wrote:
--SNIP
Shipping the source is utterly out of the question,
Of course, you have to be crazy if you give away your bread and
butter source for all the
-
From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On Behalf
Of Ed Gould
Sent: Monday, November 30, 2015 2:49 PM
To: IBM-MAIN@LISTSERV.UA.EDU
Subject: Re: Straightforward way to determine hardware architecture level?
I don't know what your company sells and wonder why anyone
To: IBM-MAIN@LISTSERV.UA.EDU
Subject: Re: Straightforward way to determine hardware architecture level?
Charles:
Then the issue *IS* correct and *IS* appropriate. I am suggesting that if
the discussion had started out with that understanding
start.
Charles
-Original Message-
From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On
Behalf Of David L. Craig
Sent: Monday, November 30, 2015 4:24 PM
To: IBM-MAIN@LISTSERV.UA.EDU
Subject: Re: Straightforward way to determine hardware architecture level?
Then there'
In
,
on 11/30/2015
at 11:44 PM, J O Skip Robinson said:
>When I was a novice sysprog, my shop had an Amdahl. MVS at that
>time predated 'system product'. (Way back.) IBM shipped a new
@LISTSERV.UA.EDU
Subject: Re: Straightforward way to determine hardware architecture
level?
I don't know what your company sells and wonder why anyone would
pay "extra" for a few seconds of cpu savings gain.
I suspect you (or your management) is making a mountain out of a
mole h
On Nov 30, 2015, at 5:44 PM, J O Skip Robinson wrote:
I'm reaching back a long way to stretch the notion of
'straightforward', but here goes. When I was a novice sysprog, my
shop had an Amdahl. MVS at that time predated 'system product'.
(Way back.) IBM shipped a new level of MVS that
):Re: Straightforward way to determine hardware architecture
level?
Sorry. MSUs are *incredibly* important to some (most?) customers. They are a
major buy/no-buy decider. I cannot ship z900 code and shrug my shoulders about
performance on a z13. IBM (as an example) has come to realize
Interesting. That makes sense. I've got a better method anyway, but you know
what IBM says now? I just happened to run into this a few minutes ago. (From
the Nov. 2012 PoOp)
Programming Note: Prior to the introduction of
z/Architecture, determination of the presence of a
facility was often
f Ed Gould
Sent: Monday, November 30, 2015 11:49 AM
To: IBM-MAIN@LISTSERV.UA.EDU
Subject: Re: Straightforward way to determine hardware architecture
level?
Charles:
On Nov 30, 2015, at 7:59 AM, Charles Mills wrote:
Sorry. MSUs are *incredibly* important to some (most?) customers.
They are a
On 15Nov30:1354-0600, Ed Gould wrote:
> On Nov 30, 2015, at 8:32 AM, Elardus Engelbrecht wrote:
>
> >Charles Mills wrote:
> >--SNIP
> >>Shipping the source is utterly out of the question,
> >
> >Of course, you have to be crazy if
2015 11:44 AM
> To: IBM-MAIN@LISTSERV.UA.EDU
> Subject: Re: Straightforward way to determine hardware architecture level?
>
> I confess to not having slogged through this thread, but from the beginning
> I've wondered why no one has suggested the static system symbol
> System symbols
On Nov 30, 2015, at 5:54 PM, Charles Mills wrote:
SNIP-
With the advent of facility and function indications in
z/Architecture, the technique of trial execution should
be avoided - particularly if a workload may be relocated
to another system
John McKown wrote:
>... Such as IAZYREG, ...
I believe it should be renamed to LazyRegs... ;-)
>Of course, my code is "weird" in that I cause HLASM to flag the instruction:
> LG R10,DOUBLE
>because, in my case, it should be:
> LG R10_64,DOUBLE
>And so on.
Interesting. That is a
iously, thanks for your input.
Charles
-Original Message-
From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On
Behalf Of Ed Gould
Sent: Sunday, November 29, 2015 4:22 PM
To: IBM-MAIN@LISTSERV.UA.EDU
Subject: Re: Straightforward way to determine hardware architecture level?
C
>For others not really familiar to assembler programs, in Kirk listing there is
>a line YREGS.
>YREGS <-- That is a list of register value declarations/constants. You
will have to provide your own list.
YREGS is shipped in SYS1.MACLIB. It only provides equates for GPRs.
Bob Shannon
Bob Shannon wrote:
>YREGS is shipped in SYS1.MACLIB. It only provides equates for GPRs.
Duh, yes, you're right of course.
Thanks for curing my blue Monday ignorance! Much appreciated.
And there is SYS1.MACLIB(IAZYREG), which includes both GPR and Access Registers.
Groete / Greetings
Elardus
On Mon, Nov 30, 2015 at 6:29 AM, Bob Shannon
wrote:
> >For others not really familiar to assembler programs, in Kirk listing
> there is a line YREGS.
>
> >YREGS <-- That is a list of register value declarations/constants.
> You will have to provide your own
Charles Mills wrote:
>Sorry. MSUs are *incredibly* important to some (most?) customers. They are a
>major buy/no-buy decider.
Indeed. Other questions customers also asked to vendors (from what I know and
found out over the years):
- How easy is it to install? With SMP/E (increasingly
IN@LISTSERV.UA.EDU
Subject: Re: Straightforward way to determine hardware architecture level?
> Charles Mills has a reason. But part of that reason is that he's
> running
...
Right. And dealing with imperfect co-workers dealing with imperfect
information from sales and pre-sales and a boss
≫> My boss wants something more user-friendly than a S0C1.
Like a S0C1:) ???
Chris Hoelscher
Technology Architect, Database Infrastructure Services
Technology Solution Services
: humana.com
123 East Main Street
Louisville, KY 40202
Humana.com
(502) 714-8615, (502) 476-2538
email to
-
From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On Behalf
Of Charles Mills
Sent: Sunday, November 29, 2015 12:10 PM
To: IBM-MAIN@LISTSERV.UA.EDU
Subject: (External):Re: Straightforward way to determine hardware architecture
level?
I am not a LOADXX guru but looks like
ERV.UA.EDU
Subject: Re: Straightforward way to determine hardware architecture level?
I confess to not having slogged through this thread, but from the beginning
I've wondered why no one has suggested the static system symbol
System symbols can be queried from pretty much any environment. T
-
From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On
Behalf Of J O Skip Robinson
Sent: Sunday, November 29, 2015 12:33 PM
To: IBM-MAIN@LISTSERV.UA.EDU
Subject: Re: Straightforward way to determine hardware architecture level?
I get it. There are different meanings
o: IBM-MAIN@LISTSERV.UA.EDU
Subject: Re: Straightforward way to determine hardware architecture level?
What is still missing is a reason why someone should want to do this sort of
check. Only with that information could one answer a question such as
"should we also check CVTVEF?". Checking CVTV
, November 29, 2015 10:13 AM
To: IBM-MAIN@LISTSERV.UA.EDU
Subject: (External):Re: Straightforward way to determine hardware architecture
level?
Two corrections:
1. At several points in this thread I think I may have said "facility bits in
the CVT." I wuz of course confused. Make that &quo
What is still missing is a reason why someone should want to do this sort
of check. Only with that information could one answer a question such as
"should we also check CVTVEF?". Checking CVTVEF will tell you if the
vector extension facility is present *and* that that operating system is
Kirk Wolf wrote:
>FYI, I noticed that there are some cut/paste errors in the comments (only) for
>ARCH(7) and ARCH(8).
Nevermind, real Assembler programmers don't bother with comments. ;-)
"Comments? What is that new-fangled thing? They're just making my source
listings 'dirty'!" ;-D ;-D ;-D
Perhaps it's too obvious, but the z/OS release level provides certain
information. Specifically:
1. If you're on z/OS 1.6 or a higher 1.x release, you know you're on a
z900/z800 or higher and cannot be on a 31-bit machine.
2. If you're on z/OS 2.1, you know you're on a z9 or higher.
3. If you're
On Nov 29, 2015, at 7:17 PM, Stevet wrote:
This is why you have specialty routines that you load and if I
remember correctly, IDENTIFY.
What is being described is part of the joys of being an ISV.
Imagine, back in the day, of providing code that was sensitive to
JES2 releases and Maint
2015 12:33 PM
To: IBM-MAIN@LISTSERV.UA.EDU
Subject: Re: Straightforward way to determine hardware architecture
level?
I get it. There are different meanings of 'architecture level'. You
need
more granularity. Not knowing the ins and outs of the various
control blocks
suggested by others, I
This is why you have specialty routines that you load and if I remember
correctly, IDENTIFY.
What is being described is part of the joys of being an ISV.
Imagine, back in the day, of providing code that was sensitive to JES2 releases
and Maint changes. My headache w/ ACS/WYLBUR while also
On 11/29/2015 09:56 PM, Ed Gould wrote:
On Nov 29, 2015, at 7:17 PM, Stevet wrote:
Then supply an object deck that has the "special" instructions
with instructions to relink the problem program. Put the burden
on the user. BTW he has not informed us what the timing
difference is. I submit
Steve:
I don't think I asked of him anything a customer wouldn't ask.
Frankly if he would have responded with a 10 percent increase that
would have been good enough (for me as a non customer). The bottom
line are we talking about 1 second or 5000 seconds savings that would
be good
mbler! Will run on Connor's z890!
>
> Charles
>
> -Original Message-
> From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On
> Behalf Of Kirk Wolf
> Sent: Saturday, November 28, 2015 3:12 PM
> To: IBM-MAIN@LISTSERV.UA.EDU
> Subject: Re: Straightforw
: Straightforward way to determine hardware architecture level?
Here's a brute force assembler translation of my quick decoding of doc for
"ARCHLEVEL" in the z/OS V2R2 C/C++ UG.
NB: It would be great if someone could get IBM to confirm that these are the
correct FACL bits described by the ARC
Here's a brute force assembler translation of my quick decoding of doc for
"ARCHLEVEL" in the z/OS V2R2 C/C++ UG.
NB: It would be great if someone could get IBM to confirm that these are
the correct FACL bits described by the ARCHLEVEL doc.
It returns "9" as expected on the z196 machine that I
me Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On
> Behalf Of Kirk Wolf
> Sent: Saturday, November 28, 2015 3:12 PM
> To: IBM-MAIN@LISTSERV.UA.EDU
> Subject: Re: Straightforward way to determine hardware architecture level?
>
> Here's a brute force assembler translation of my q
IBM Mainframe Discussion List wrote on
11/28/2015 06:12:04 PM:
> * Test ARCH(6)
> * long-displacement facility
> TMFaclByte2,FaclLongDisplacement
> BNO EXIT
> LAR15,6 ARCH(6)
I would recommend using
>Are there other functions also absent when z/OS is
>running as a guest under z/VM?
>If so, where is that documented?
I'm sure the answer to the first is "yes", and I don't know the answer to
the second.
But if you were to turn the question around and ask "where is it
documented what you can
To answer your question directly: no there is no such way. Could there be,
in the future? Sure. If z/OS base control program were to provide it, it
might not be the compiler ARCH value but might be the machine generation
number (which happens to be +2 over the compiler ARCH level) -- e.g., z13
I wanted to add that the list of facilities mentioned in one of the posts
>ARCH(10) (xC12) execution-hint facility, the load-and-trap
>facility, the miscellaneous-instruction-extension facility, and the
>transactional-execution facility.
leads to some interesting points.
The availability of an
Peter Relson wrote:
>Further, it is not available on any z/OS release if z/OS is running under VM.
Very interesting. Are there other functions also absent when z/OS is running as
a guest under z/VM?
If so, where is that documented?
Many thanks for your excellent posts. I value them all!
mber 26, 2015 6:12 AM
To: IBM-MAIN@LISTSERV.UA.EDU
Subject: Re: Straightforward way to determine hardware architecture level?
To answer your question directly: no there is no such way. Could there be,
in the future? Sure. If z/OS base control program were to provide it, it
might not be the compi
On 26 November 2015 at 09:47, Elardus Engelbrecht
wrote:
> Peter Relson wrote:
>>Further, it [Transactional Execution] is not available on any z/OS release if
>>z/OS is running under VM.
>
> Very interesting. Are there other functions also absent when z/OS is
I just got on offline reply. To clarify, I mean for a program to make this
determination programmatically, presumably by an LE call or z/OS control
block chaining.
Charles
-Original Message-
From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On
Behalf Of Charles Mills
rame Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On Behalf
Of Kirk Wolf
Sent: Wednesday, November 25, 2015 3:47 PM
To: IBM-MAIN@LISTSERV.UA.EDU
Subject: Re: Straightforward way to determine hardware architecture level?
Charles,
I agree that there should be a compiler or LE API to do this.
Charles,
I agree that there should be a compiler or LE API to do this.
If not:
ARCH levels actually map to a set of required "Facilities" (the Principles
of Operation term).
You can test at the facility bits in the PSAE, mapped by IHAFACL.
Then you could use the documentation on ARCH in the
her problem. I will post that.
Charles
-Original Message-
From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On Behalf
Of Elardus Engelbrecht
Sent: Wednesday, November 25, 2015 10:57 AM
To: IBM-MAIN@LISTSERV.UA.EDU
Subject: Re: Straightforward way to determine hardw
Charles Mills wrote:
>I just got on offline reply.
Amazing you get help so fast! Good for you!
>To clarify, I mean for a program to make this determination programmatically,
>presumably by an LE call or z/OS control block chaining.
Care to tell us what you could use? By peeking in an address
We have one product that that compiles their code for each architectural level.
The initial module is determines the hardware and loads the remainder of the
code to match the processor
> but one or two pesky customers want to run on an older machine
So you are saying that all of your customers
On 25 November 2015 at 11:57, Charles Mills wrote:
> Is there a fairly straightforward way to determine the "architecture number"
> of the hardware on which a program is actually running? By architecture
> level I mean z13 = ARCH(11) and so forth, as supported by C/C++ and I
Bob Shannon wrote:
>We have one product that that compiles their code for each architectural
>level. The initial module is determines the hardware and loads the remainder
>of the code to match the processor
How is your initial module working to determine the ARCH level? If you can't
> How is your initial module working to determine the ARCH level? If you can't
> disclose it, it is fine
It's not my product and I haven’t looked at the code. However, it's simple
enough to build a table of processor types with the corresponding ARCH/MACH
level.
Bob Shannon
Rocket Software
: IBM-MAIN@LISTSERV.UA.EDU
Subject: Re: Straightforward way to determine hardware architecture level?
On 25 November 2015 at 11:57, Charles Mills <charl...@mcn.org> wrote:
> Is there a fairly straightforward way to determine the "architecture number"
> of the hardware on whi
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