Andrew,
please drop these patches until further notice. I would recommend we avoid
merging
these patches until we get proper Acked-by for the entire set. Waiman has a bit
more
work to do and even after the 5th iteration this is not right yet.
Luis
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On Mon, Mar 19, 2018 at 11:35:19AM -0400, Waiman Long wrote:
> On 03/16/2018 08:54 PM, Luis R. Rodriguez wrote:
> > On Fri, Mar 16, 2018 at 02:13:43PM -0400, Waiman Long wrote:
> >> Checking code is added to provide the following additional
> >> ctl_table.flags checks:
> >>
> >> 1) No unknown
On Mon, Mar 19, 2018 at 11:39:19AM -0400, Waiman Long wrote:
> On 03/16/2018 09:10 PM, Luis R. Rodriguez wrote:
> > On Fri, Mar 16, 2018 at 02:13:42PM -0400, Waiman Long wrote:
> >> When the CTL_FLAGS_CLAMP_RANGE flag is set in the ctl_table
> >> entry, any update from the userspace will be
Hi Rob,
Le mer. 28 mars 2018 à 18:28, Rob Herring a écrit :
On Wed, Mar 28, 2018 at 10:33 AM, Paul Cercueil
wrote:
Le 2018-03-27 16:46, Rob Herring a écrit :
On Sun, Mar 18, 2018 at 12:28:57AM +0100, Paul Cercueil wrote:
Add documentation about
The logic with parses array has a bug that prevents it to
parse arrays like:
struct {
...
struct {
u64 msdu[IEEE80211_NUM_TIDS + 1];
...
...
Fix the parser to accept it.
Signed-off-by: Mauro Carvalho Chehab
Le mer. 28 mars 2018 à 18:25, Daniel Lezcano
a écrit :
On 28/03/2018 17:15, Paul Cercueil wrote:
Le 2018-03-24 07:26, Daniel Lezcano a écrit :
On 18/03/2018 00:29, Paul Cercueil wrote:
This driver will use the TCU (Timer Counter Unit) present on the
Ingenic
Em Thu, 29 Mar 2018 16:26:33 +0200
Johannes Berg escreveu:
> Hi,
>
> > The original patchset for nested structs was supporting it only
> > when not inlined. This should be fixed on this patchset:
> >
> > https://lkml.org/lkml/2018/2/19/387
> >
> > Do you have
Hi,
> The original patchset for nested structs was supporting it only
> when not inlined. This should be fixed on this patchset:
>
> https://lkml.org/lkml/2018/2/19/387
>
> Do you have those patches on your tree?
No, looks like I don't have those yet. I'll wait for those then.
> With
Em Thu, 29 Mar 2018 11:47:07 +0200
Johannes Berg escreveu:
> On Thu, 2018-03-29 at 11:46 +0200, Johannes Berg wrote:
> > Hi,
> >
> > For a while I haven't looked at my documentation for 802.11, and now I
> > noticed I'm getting warnings due to the nested parsing.
> >
On Thu, Mar 29, 2018 at 12:07:52AM +0800, Sanjeev Gupta wrote:
> All links checked, for those dead, I have replaced with copies on
> archive.org. For some, https is not supported, http has been
> kept.
>
> The git log says this was last done by Justin P. Mattock in 2010.
> Hi, Justin!
Not sure
On Thu, 2018-03-29 at 11:46 +0200, Johannes Berg wrote:
> Hi,
>
> For a while I haven't looked at my documentation for 802.11, and now I
> noticed I'm getting warnings due to the nested parsing.
>
> However, something seems to be wrong? I have, for example, this (in
> net/mac80211/sta_info.h)
>
Hi,
For a while I haven't looked at my documentation for 802.11, and now I
noticed I'm getting warnings due to the nested parsing.
However, something seems to be wrong? I have, for example, this (in
net/mac80211/sta_info.h)
struct sta_info {
...
struct {
u64
Hi Alex,
I'm appreciated for your reply and tests.
On Wed, Mar 28, 2018 at 03:58:41PM -0700, Alex Solomatnikov wrote:
> Did you test this code?
I did test this patch on QEMU's virt model with multi-hart, which is the only
RISC-V machine I have for now. But as I mentioned in
Dave Hansen writes:
> On 03/28/2018 01:47 PM, Thiago Jung Bauermann wrote:
if (flags)
- assert(rdpkey_reg() > orig_pkey_reg);
+ assert(rdpkey_reg() < orig_pkey_reg);
}
void pkey_write_allow(int pkey)
>>> This seems so
Dave Hansen writes:
> On 02/21/2018 05:55 PM, Ram Pai wrote:
>> --- a/tools/testing/selftests/vm/protection_keys.c
>> +++ b/tools/testing/selftests/vm/protection_keys.c
>> @@ -461,7 +461,7 @@ void pkey_disable_clear(int pkey, int flags)
>> pkey, pkey,
On Wed, Mar 28, 2018 at 5:04 PM, Paul Cercueil wrote:
> Le 2018-03-20 08:15, Mathieu Malaterre a écrit :
>>
>> Hi Paul,
>>
>> Two things:
>>
>> On Sun, Mar 18, 2018 at 12:28 AM, Paul Cercueil
>> wrote:
>>>
>>> This header provides clock numbers for the
On Wed, Mar 28, 2018 at 10:57:11AM -0700, Tony Luck wrote:
> On Wed, Mar 28, 2018 at 6:02 AM, Sinan Kaya wrote:
> > +linux-ia64
> > Does IA64 follow this requirement? If not, is implementation planned?
> >
> > "no wmb() before writel()"
> >
> > Linus asked us to get rid of
On Wed, 28 Mar 2018 11:42:07 -0500
Rob Herring wrote:
> >>
> >> > +where device-type is describing the type of device connected on the bus
> >> > +(gpio-controller, sensor, ...).
> >> > +
> >> > +Required properties
> >> > +---
> >> > +- reg: contains 3 cells
On Wed, Mar 28, 2018 at 3:19 AM, Boris Brezillon
wrote:
> Hi Rob,
>
> On Mon, 26 Mar 2018 17:24:58 -0500
> Rob Herring wrote:
>
>> > +
>> > +I3C devices
>> > +===
>> > +
>> > +All I3C devices are supposed to support DAA (Dynamic Address
On Wed, Mar 28, 2018 at 10:33 AM, Paul Cercueil wrote:
> Le 2018-03-27 16:46, Rob Herring a écrit :
>>
>> On Sun, Mar 18, 2018 at 12:28:57AM +0100, Paul Cercueil wrote:
>>>
>>> Add documentation about how to properly use the Ingenic TCU
>>> (Timer/Counter Unit) drivers from
On 28/03/2018 17:15, Paul Cercueil wrote:
> Le 2018-03-24 07:26, Daniel Lezcano a écrit :
>> On 18/03/2018 00:29, Paul Cercueil wrote:
>>> This driver will use the TCU (Timer Counter Unit) present on the Ingenic
>>> JZ47xx SoCs to provide the kernel with a clocksource and timers.
>>
>> Please
All links checked, for those dead, I have replaced with copies on
archive.org. For some, https is not supported, http has been
kept.
The git log says this was last done by Justin P. Mattock in 2010.
Hi, Justin!
Signed-off-by: Sanjeev Gupta
---
Le 2018-03-27 16:46, Rob Herring a écrit :
On Sun, Mar 18, 2018 at 12:28:57AM +0100, Paul Cercueil wrote:
Add documentation about how to properly use the Ingenic TCU
(Timer/Counter Unit) drivers from devicetree.
Signed-off-by: Paul Cercueil
---
Le 2018-03-24 07:26, Daniel Lezcano a écrit :
On 18/03/2018 00:29, Paul Cercueil wrote:
This driver will use the TCU (Timer Counter Unit) present on the
Ingenic
JZ47xx SoCs to provide the kernel with a clocksource and timers.
Please provide a more detailed description about the timer.
On 28/03/2018 17:01, Paul Cercueil wrote:
> Le 2018-03-18 23:13, Daniel Lezcano a écrit :
>> On 18/03/2018 00:28, Paul Cercueil wrote:
>>> Hi,
>>>
>>> This is the 4th version of my TCU patchset.
>>>
>>> The major change is a greatly improved documentation, both in-code
>>> and as separate text
Le 2018-03-20 09:52, Marc Zyngier a écrit :
On 17/03/18 23:28, Paul Cercueil wrote:
Add documentation about how to properly use the Ingenic TCU
(Timer/Counter Unit) drivers from devicetree.
Signed-off-by: Paul Cercueil
---
.../bindings/clock/ingenic,tcu-clocks.txt
Le 2018-03-20 08:15, Mathieu Malaterre a écrit :
Hi Paul,
Two things:
On Sun, Mar 18, 2018 at 12:28 AM, Paul Cercueil
wrote:
This header provides clock numbers for the ingenic,tcu
DT binding.
I have tested the whole series on my Creator CI20 with success, using:
+
Le 2018-03-18 23:13, Daniel Lezcano a écrit :
On 18/03/2018 00:28, Paul Cercueil wrote:
Hi,
This is the 4th version of my TCU patchset.
The major change is a greatly improved documentation, both in-code
and as separate text files, to describe how the hardware works and
how the devicetree
All links working.
Signed-off-by: Sanjeev Gupta
---
Documentation/thermal/cpu-cooling-api.txt | 2 +-
Documentation/thermal/nouveau_thermal | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/Documentation/thermal/cpu-cooling-api.txt
Le 2018-03-18 00:52, Randy Dunlap a écrit :
On 03/17/2018 04:28 PM, Paul Cercueil wrote:
Add a documentation file about the Timer/Counter Unit (TCU)
present in the Ingenic JZ47xx SoCs.
Signed-off-by: Paul Cercueil
---
Documentation/mips/00-INDEX| 3 +++
The linuxwimax.org domain, registered by the Linux Foundation,
no longer has any DNS entries. Locate a copy on archive.org and
update the documentation.
Signed-off-by: Sanjeev Gupta
---
Documentation/wimax/README.i2400m | 5 +++--
1 file changed, 3 insertions(+), 2
+linux-ia64
On 3/27/2018 11:02 AM, Paul E. McKenney wrote:
> On Tue, Mar 27, 2018 at 02:11:27PM +0100, Will Deacon wrote:
>> The section of memory-barriers.txt that describes the dma_Xmb() barriers
>> has an incorrect example claiming that a wmb() is required after writing
>> to coherent memory
Hi all,
The directory (not yet three years old although, I freely admit, I've
only recently become aware of it) provides arch. support matrices for
more than 40 generic kernel features that need per-arch. support:
This is a superb project! ;-) and not a simple one given that, to be
effective,
Hi Rob,
On Mon, 26 Mar 2018 17:24:58 -0500
Rob Herring wrote:
> > +
> > +I3C devices
> > +===
> > +
> > +All I3C devices are supposed to support DAA (Dynamic Address Assignment),
> > and
> > +are thus discoverable. So, by default, I3C devices do not have to be
> >
On Tue, 2018-03-27 at 10:23 -0400, Waiman Long wrote:
> On 03/27/2018 10:02 AM, Tejun Heo wrote:
> > Hello,
> >
> > On Mon, Mar 26, 2018 at 04:28:49PM -0400, Waiman Long wrote:
> >> Maybe we can have a different root level flag, say,
> >> sched_partition_domain that is equivalent to
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Greeting, once again is me Lucy Boston this is twice am contacting you
please is very urgent respond to me for more details through my.
Email:
dr.lucybos...@gmail.com
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Hi!
arm64 has a feature called Top Byte Ignore, which allows to embed pointer
tags into the top byte of each pointer. Userspace programs (such as
HWASan, a memory debugging tool [1]) might use this feature and pass
tagged user pointers to the kernel through syscalls or other interfaces.
This
This patch makes the untagged_addr macro accept all kinds of address types
(void *, unsigned long, etc.) and allows not to specify type casts in each
place where it is used. This is done by using __typeof__.
Signed-off-by: Andrey Konovalov
---
copy_from_user (and a few other similar functions) are used to copy data
from user memory into the kernel memory or vice versa. Since a user can
provided a tagged pointer to one of the syscalls that use copy_from_user,
we need to correctly handle such pointers.
Do this by untagging user pointers
strncpy_from_user and strnlen_user accept user addresses as arguments, and
do not go through the same path as copy_from_user and others, so here we
need to separately handle the case of tagged user addresses as well.
Untag user pointers passed to these functions.
Signed-off-by: Andrey Konovalov
To allow arm64 syscalls accept tagged pointers from userspace, we must
untag them when they are passed to the kernel. Since untagging is done in
generic parts of the kernel (like the mm subsystem), the untagged_addr
macro should be defined for all architectures.
Define it as a noop for other
Add a note that work on passing tagged user pointers to the kernel via
syscalls has started, but might not be complete yet.
Signed-off-by: Andrey Konovalov
---
Documentation/arm64/tagged-pointers.txt | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git
On Tue, Mar 27, 2018 at 02:11:27PM +0100, Will Deacon wrote:
> The section of memory-barriers.txt that describes the dma_Xmb() barriers
> has an incorrect example claiming that a wmb() is required after writing
> to coherent memory in order for those writes to be visible to a device
> before a
On Tue, Mar 27, 2018 at 09:52:49AM -0500, Rob Herring wrote:
> On Wed, Mar 21, 2018 at 10:10:38AM +0530, Rajkumar Rampelli wrote:
> > Supply Device tree binding documentation for the NVIDIA
> > Tegra186 SoC's Tachometer Controller
> >
> > Signed-off-by: Rajkumar Rampelli
> >
On 03/27/2018 10:02 AM, Tejun Heo wrote:
> Hello,
>
> On Mon, Mar 26, 2018 at 04:28:49PM -0400, Waiman Long wrote:
>> Maybe we can have a different root level flag, say,
>> sched_partition_domain that is equivalent to !sched_load_balnace.
>> However, I am still not sure if we should enforce that
Hello,
On Mon, Mar 26, 2018 at 04:28:49PM -0400, Waiman Long wrote:
> Maybe we can have a different root level flag, say,
> sched_partition_domain that is equivalent to !sched_load_balnace.
> However, I am still not sure if we should enforce that no task should be
> in the root cgroup when the
The section of memory-barriers.txt that describes the dma_Xmb() barriers
has an incorrect example claiming that a wmb() is required after writing
to coherent memory in order for those writes to be visible to a device
before a subsequent MMIO access using writel() can reach the device.
In fact,
VM_PKEY_BITx are defined only if CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS
is enabled. Powerpc also needs these bits. Hence lets define the
VM_PKEY_BITx bits for any architecture that enables
CONFIG_ARCH_HAS_PKEYS.
cc: Michael Ellermen
cc: Benjamin Herrenschmidt
Currently the architecture specific code is expected to
display the protection keys in smap for a given vma.
This can lead to redundant code and possibly to divergent
formats in which the key gets displayed.
This patch changes the implementation. It displays the
pkey only if the
This patch series provides arch-neutral enhancements to
enable memory-keys on new architecutes, and the corresponding
changes in x86 and powerpc specific code to support that.
a) Provides ability to support upto 32 keys. PowerPC
can handle 32 keys and hence needs this.
b) Arch-neutral
Currently only 4bits are allocated in the vma flags to hold 16
keys. This is sufficient for x86. PowerPC supports 32 keys,
which needs 5bits. This patch allocates an additional bit.
cc: Dave Hansen
cc: Michael Ellermen
cc: Benjamin Herrenschmidt
On Mon, 2018-03-26 at 16:28 -0400, Waiman Long wrote:
>
> The sched_load_balance flag isn't something that is passed to the
> scheduler. It only only affects the CPU topology of the system. So I
> suspect that a process in the root cgroup will be load balanced among
> the CPUs in the one of the
On 26/03/18 16:28, Waiman Long wrote:
> On 03/26/2018 08:47 AM, Juri Lelli wrote:
> > On 23/03/18 14:44, Waiman Long wrote:
> >> On 03/23/2018 03:59 AM, Juri Lelli wrote:
> > [...]
> >
> >>> OK, thanks for confirming. Can you tell again however why do you think
> >>> we need to remove
On Fri, Mar 23, 2018 at 12:00:14PM +0100, Boris Brezillon wrote:
> From: Boris Brezillon
>
> A new I3C subsystem has been added and a generic description has been
> created to represent the I3C bus and the devices connected on it.
>
> Document this generic
On Fri, Mar 23, 2018 at 12:00:15PM +0100, Boris Brezillon wrote:
> The reg property of devices connected to an I3C bus have 3 cells, and
> filling them manually is not trivial. Provides macros to help doing
> that.
>
> Signed-off-by: Boris Brezillon
> ---
>
On Fri, Mar 23, 2018 at 12:00:20PM +0100, Boris Brezillon wrote:
> Document the Cadence I3C gpio expander bindings.
>
> Signed-off-by: Boris Brezillon
> ---
> .../devicetree/bindings/gpio/gpio-cdns-i3c.txt | 38
> ++
> 1 file changed, 38
On 03/26/2018 08:47 AM, Juri Lelli wrote:
> On 23/03/18 14:44, Waiman Long wrote:
>> On 03/23/2018 03:59 AM, Juri Lelli wrote:
> [...]
>
>>> OK, thanks for confirming. Can you tell again however why do you think
>>> we need to remove sched_load_balance from root level? Won't we end up
>>> having
Dave Hansen writes:
> On 02/21/2018 05:55 PM, Ram Pai wrote:
>> -static inline unsigned int _rdpkey_reg(int line)
>> +static inline pkey_reg_t _rdpkey_reg(int line)
>> {
>> -unsigned int pkey_reg = __rdpkey_reg();
>> +pkey_reg_t pkey_reg = __rdpkey_reg();
>>
>> -
On Tue, Mar 20, 2018 at 4:17 PM, Andrew Cooper
wrote:
> On 20/03/18 19:56, Dongliang Mu wrote:
>> Signed-off-by: Dongliang Mu
>> ---
>> Documentation/ia64/xen.txt | 4 ++--
>> 1 file changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git
On 03/26/2018 11:32 AM, Jonathan Corbet wrote:
On Mon, 26 Mar 2018 11:28:03 -0500
Gary R Hook wrote:
Submitting a v3 because the example could better illuminate the options
by using loop construct inside of an if, addressing Jani's point but
without opening the door to
On Mon, 26 Mar 2018 11:28:03 -0500
Gary R Hook wrote:
> Submitting a v3 because the example could better illuminate the options
> by using loop construct inside of an if, addressing Jani's point but
> without opening the door to later criticism.
>
> I also like the verbage
On 03/22/2018 04:12 AM, Jani Nikula wrote:
On Wed, 21 Mar 2018, Jonathan Corbet wrote:
To head that off, I think I'll apply your first version instead, sorry
Jani.
No worries.
Submitting a v3 because the example could better illuminate the options
by using loop construct
Add another example of required braces when using a compound statement in
a loop.
Signed-off-by: Gary R Hook
---
Changes since v2:
- Modified the example code fragment
Changes since v1:
- Move the new example up, and make it more generic
On Fri, 23 Mar 2018 08:32:31 +0100
Martin Kepplinger wrote:
> This fixes a little then / them confusion.
>
> Signed-off-by: Martin Kepplinger
> ---
> Documentation/process/magic-number.rst | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff
On Thu, 22 Mar 2018 13:06:56 +0100
Martin Kepplinger wrote:
> Add kvmconfig, xenconfig and tinyconfig to the list of alternative
> configuration commands. Descriptions are directly taken from the Makefile.
Applied to the docs tree, thanks.
jon
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On Wed, 21 Mar 2018 21:03:36 +0100
Pali Rohár wrote:
> Bits for M, R and L buttons are already processed in alps. Other newly
> documented bits not yet.
>
> Signed-off-by: Pali Rohár
> ---
> This is based on information which Masaki Ota provided to
On 23/03/18 14:44, Waiman Long wrote:
> On 03/23/2018 03:59 AM, Juri Lelli wrote:
[...]
> > OK, thanks for confirming. Can you tell again however why do you think
> > we need to remove sched_load_balance from root level? Won't we end up
> > having tasks put on isolated sets?
>
> The root cgroup
Hi Boris,
On Mon, Mar 26, 2018 at 1:25 PM, Boris Brezillon
wrote:
> On Mon, 26 Mar 2018 12:12:54 +0200
> Geert Uytterhoeven wrote:
>> On Fri, Mar 23, 2018 at 12:00 PM, Boris Brezillon
>> wrote:
>> > Document the
On Mon, 26 Mar 2018 12:12:54 +0200
Geert Uytterhoeven wrote:
> Hi Boris,
>
> On Fri, Mar 23, 2018 at 12:00 PM, Boris Brezillon
> wrote:
> > Document the Cadence I3C gpio expander bindings.
> >
> > Signed-off-by: Boris Brezillon
Hi Geert,
On Mon, 26 Mar 2018 12:17:26 +0200
Geert Uytterhoeven wrote:
> Hi Boris,
>
> On Fri, Mar 23, 2018 at 12:00 PM, Boris Brezillon
> wrote:
> > Document the Cadence I3C gpio expander bindings.
> >
> > Signed-off-by: Boris Brezillon
Hi Geert,
On Mon, 26 Mar 2018 12:22:24 +0200
Geert Uytterhoeven wrote:
> Hi Boris,
>
> On Fri, Mar 23, 2018 at 12:00 PM, Boris Brezillon
> wrote:
> > From: Boris Brezillon
> >
> > A new I3C subsystem has
Hi Boris,
On Fri, Mar 23, 2018 at 12:00 PM, Boris Brezillon
wrote:
> From: Boris Brezillon
>
> A new I3C subsystem has been added and a generic description has been
> created to represent the I3C bus and the devices connected on
Hi Boris,
On Fri, Mar 23, 2018 at 12:00 PM, Boris Brezillon
wrote:
> Document the Cadence I3C gpio expander bindings.
>
> Signed-off-by: Boris Brezillon
Thanks for your patch!
> --- /dev/null
> +++
Hi Boris,
On Fri, Mar 23, 2018 at 12:00 PM, Boris Brezillon
wrote:
> Document the Cadence I3C gpio expander bindings.
>
> Signed-off-by: Boris Brezillon
Thanks for your patch!
> --- /dev/null
> +++
Cc: Nick Hu
Cc: Greentime Hu
Signed-off-by: Alan Kao
---
Documentation/riscv/pmu.txt | 250
1 file changed, 250 insertions(+)
create mode 100644 Documentation/riscv/pmu.txt
diff
This patch provide a basic PMU, riscv_base_pmu, which supports two
general hardware event, instructions and cycles. Furthermore, this
PMU serves as a reference implementation to ease the portings in
the future.
riscv_base_pmu should be able to run on any RISC-V machine that
conforms to the
This implements the baseline PMU for RISC-V platforms.
To ease the future PMU portings, a guide is also written, containing
perf concepts, arch porting practices and some hints.
Alan Kao (2):
perf: riscv: preliminary RISC-V support
perf: riscv: Add Document for Future Porting Guide
The syscall entry points to the kernel defined by SYSCALL_DEFINEx()
and COMPAT_SYSCALL_DEFINEx() should only be called from userspace
through kernel entry points, but not from the kernel itself. This
will allow cleanups and optimizations to the entry paths *and* to
the parts of the kernel code
On Sat, 24 Mar 2018 23:38:32 +0100
Wolfram Sang wrote:
> > > - info.archdata = _ad;
> >
> > Why did you drop this?
>
> If the removal is safe, it should be a seperate patch, I mean.
>
Sure, I'll move that in a separate patch. Actually, I had a closer look
and it seems
Hi Wolfram,
On Sat, 24 Mar 2018 23:35:18 +0100
Wolfram Sang wrote:
> Hi Boris,
>
> > - rebase on v4.15-rc1
>
> This code has changed a little meanwhile. Please check my for-next
> branch. Some changes are identical, some similar.
Actually it was rebased on top of
> > - info.archdata = _ad;
>
> Why did you drop this?
If the removal is safe, it should be a seperate patch, I mean.
signature.asc
Description: PGP signature
Hi Boris,
> - rebase on v4.15-rc1
This code has changed a little meanwhile. Please check my for-next
branch. Some changes are identical, some similar.
> - info.archdata = _ad;
Why did you drop this?
Regards,
Wolfram
signature.asc
Description: PGP signature
Hi Doug
On 3/23/2018 5:34 PM, Doug Anderson wrote:
> Hi,
>
> On Fri, Mar 23, 2018 at 1:20 PM, Karthikeyan Ramasubramanian
> wrote:
>> This bus driver supports the GENI based i2c hardware controller in the
>> Qualcomm SOCs. The Qualcomm Generic Interface (GENI) is a
On 18/03/2018 00:29, Paul Cercueil wrote:
> This driver will use the TCU (Timer Counter Unit) present on the Ingenic
> JZ47xx SoCs to provide the kernel with a clocksource and timers.
Please provide a more detailed description about the timer.
Where is the clocksource ?
I don't see the point of
Hi,
On Fri, Mar 23, 2018 at 1:21 PM, Karthikeyan Ramasubramanian
wrote:
> + i2c10: i2c@a88000 {
> + compatible = "qcom,geni-i2c";
> + reg = <0xa88000 0x4000>;
> +
Hi,
On Fri, Mar 23, 2018 at 1:20 PM, Karthikeyan Ramasubramanian
wrote:
> This bus driver supports the GENI based i2c hardware controller in the
> Qualcomm SOCs. The Qualcomm Generic Interface (GENI) is a programmable
> module supporting a wide range of serial interfaces
This driver manages the Generic Interface (GENI) firmware based Qualcomm
Universal Peripheral (QUP) Wrapper. GENI based QUP is the next generation
programmable module composed of multiple Serial Engines (SE) and supports
a wide range of serial interfaces like UART, SPI, I2C, I3C, etc. This
driver
From: Rajendra Nayak
Add the qup uart node and geni se instance needed to
support the serial console on the MTP.
Signed-off-by: Rajendra Nayak
Signed-off-by: Karthikeyan Ramasubramanian
---
This bus driver supports the GENI based i2c hardware controller in the
Qualcomm SOCs. The Qualcomm Generic Interface (GENI) is a programmable
module supporting a wide range of serial interfaces including I2C. The
driver supports FIFO mode and DMA mode of transfer and switches modes
dynamically
Add device tree binding support for the QCOM GENI SE driver.
Signed-off-by: Karthikeyan Ramasubramanian
Signed-off-by: Sagar Dharia
Signed-off-by: Girish Mahadevan
Reviewed-by: Rob Herring
Reviewed-by:
Generic Interface (GENI) firmware based Qualcomm Universal Peripheral (QUP)
Wrapper is a next generation programmable module for supporting a wide
range of serial interfaces like UART, SPI, I2C, I3C, etc. A single QUP
module can provide upto 8 Serial Interfaces using its internal Serial
Engines
On 03/23/2018 03:59 AM, Juri Lelli wrote:
> On 22/03/18 17:50, Waiman Long wrote:
>> On 03/22/2018 04:41 AM, Juri Lelli wrote:
>>> On 21/03/18 12:21, Waiman Long wrote:
> [...]
>
+ cpuset.sched_load_balance
+ A read-write single value file which exists on non-root cgroups.
+ The
On Thu, 22 Mar 2018 15:53:36 +1030
Joel Stanley wrote:
> When debugging recent kernels, people will see '(ptrval)' but there
> isn't much information as to what that means. Briefly describe why it's
> there.
Applied, thanks.
jon
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On Fri, 23 Mar 2018 06:51:04 -0300
Mauro Carvalho Chehab wrote:
> The contents of COPYING file is now duplicated at two other
> files under LICENSE:
> LICENSES/preferred/GPL-2.0
> LICENSES/exceptions/Linux-syscall-note
>
> Also, a new file was added, with
On Fri, Mar 23, 2018 at 04:23:21AM +0100, Linus Walleij wrote:
> On Fri, Mar 9, 2018 at 12:40 AM, Jonathan Neuschäfer
> wrote:
>
> > Jonathan Neuschäfer (8):
> > MAINTAINERS: GPIO: Add Documentation/driver-api/gpio/
> > Documentation: driver-api: Move gpio.rst to
On Fri, 23 Mar 2018 12:10:35 +0100
Thomas Petazzoni wrote:
> Hello,
>
> On Fri, 23 Mar 2018 12:00:18 +0100, Boris Brezillon wrote:
>
> > +Optional properties defined by the generic binding (see
> > +Documentation/devicetree/bindings/i3c/i3c.txt for more details):
On Fri, 23 Mar 2018 13:47:49 +0100
Peter Rosin wrote:
> > +Example:
> > +
> > + i3c-master@d04 {
> > + compatible = "cdns,i3c-master";
> > + clocks = <>, <>;
> > + clock-names = "pclk", "sysclk";
> > + interrupts = <3 0>;
> > +
On 2018-03-23 12:00, Boris Brezillon wrote:
> From: Boris Brezillon
>
> A new I3C subsystem has been added and a generic description has been
> created to represent the I3C bus and the devices connected on it.
>
> Document this generic representation.
>
>
Hello,
On Fri, 23 Mar 2018 12:00:18 +0100, Boris Brezillon wrote:
> +Optional properties defined by the generic binding (see
> +Documentation/devicetree/bindings/i3c/i3c.txt for more details):
> +
> +- i2c-scl-frequency
> +- i3c-scl-frequency
These properties are now named *-scl-hz.
>
From: Boris Brezillon
Document sysfs files/directories/symlinks exposed by the I3C subsystem.
Signed-off-by: Boris Brezillon
---
Changes in v2:
- new patch
---
Documentation/ABI/testing/sysfs-bus-i3c | 95
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