The right flag is apdma_sync when apdma remove hand-shake signel.
Signed-off-by: Qii Wang
---
drivers/i2c/busses/i2c-mt65xx.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/i2c/busses/i2c-mt65xx.c b/drivers/i2c/busses/i2c-mt65xx.c
index 3e34261..bf25acb 100644
There are some omissions in the previous patch about replacing
I2C_MAX_FAST_MODE__FREQ with I2C_MAX_FAST_MODE_PLUS_FREQ and
need to fix it.
Fixes: b44658e755b5("i2c: mediatek: Send i2c master code at more than 1MHz")
Signed-off-by: Qii Wang
---
drivers/i2c/busses/i2c-mt65xx.c | 9 ++
The parameters of tSU,STA/tHD,STA/tSU,STOP maybe out of spec due
to device clock-stretch or circuit loss, we could get a suitable
scl_int_delay_ns from i2c_timings to compensate these parameters
to meet the spec via EXT_CONF register.
Signed-off-by: Qii Wang
---
drivers/i2c/busses/i2c-mt65xx.c
This series are based on 5.12-rc2 and we provide three i2c patches
to fix some historical issues.
Qii Wang (3):
i2c: mediatek: Fix send master code at more than 1MHz
i2c: mediatek: Fix wrong dma sync flag
i2c: mediatek: Use scl_int_delay_ns to compensate clock-stretching
drivers/i2c
On Tue, 2021-04-13 at 22:17 +0200, Wolfram Sang wrote:
> On Mon, Apr 12, 2021 at 08:03:14PM +0800, Qii Wang wrote:
> > I can't see the relationship between "i2c-scl-falling-time-ns" and clock
> > stretching, is there a parameter related to clock stretching?
>
> (
On Wed, 2021-04-07 at 20:19 +0200, Wolfram Sang wrote:
> > Due to clock stretch, our HW IP cannot meet the ac-timing
> > spec(tSU;STA,tSU;STO).
> > There isn't a same delay for clock stretching, so we need pass a
> > parameter which can be found through measurement to meet most
> > conditions.
>
On Tue, 2021-04-06 at 21:48 +0200, Wolfram Sang wrote:
> On Sat, Mar 13, 2021 at 04:04:24PM +0800, qii.w...@mediatek.com wrote:
> > From: Qii Wang
> >
> > tSU,STA/tHD,STA/tSU,STOP maybe out of spec due to device
> > clock-stretching or circuit loss, we could get de
On Wed, 2021-03-24 at 11:12 -0600, Rob Herring wrote:
> On Sat, Mar 13, 2021 at 04:07:09PM +0800, qii.w...@mediatek.com wrote:
> > From: Qii Wang
> >
> > tSU,STA/tHD,STA/tSU,STOP maybe out of spec due to device
> > clock-stretching or circuit loss, we could get device
Hi,
On Tue, 2021-03-02 at 19:30 +0800, Ikjoon Jang wrote:
> Hi Qii,
> >
> > @@ -1171,6 +1173,8 @@ static int mtk_i2c_parse_dt(struct device_node *np,
> > struct mtk_i2c *i2c)
> > if (i2c->clk_src_div == 0)
> > return -EINVAL;
> >
> > + of_property_read_u32(np,
Hi,
On Wed, 2021-02-03 at 18:35 +0800, qii.w...@mediatek.com wrote:
> From: Qii Wang
>
> tSU,STA/tHD,STA/tSU,STOP maybe out of spec due to device
> clock-stretching or circuit loss, we could get device
> clock-stretch time from dts to adjust these parameters
> to meet the
Hi Wolfram,
On Sat, 2021-01-09 at 16:29 +0800, qii.w...@mediatek.com wrote:
> From: Qii Wang
>
> Some i2c device driver indirectly uses I2C driver when it is now
> being suspended. The i2c devices driver is suspended during the
> NOIRQ phase and this cannot be changed due to oth
On Mon, 2021-01-04 at 19:32 +0100, Wolfram Sang wrote:
> On Mon, Jan 04, 2021 at 07:29:59PM +0100, Wolfram Sang wrote:
> > On Thu, Dec 24, 2020 at 08:26:07PM +0800, qii.w...@mediatek.com wrote:
> > > From: Qii Wang
> > >
> > > With the apdma remove h
Hi sirs:
If there is no new comment, I will resent it in 5.11.
On Mon, 2020-12-14 at 22:08 +0200, Grygorii Strashko wrote:
>
> On 14/12/2020 10:48, Qii Wang wrote:
> > On Thu, 2020-12-10 at 15:03 +0200, Grygorii Strashko wrote:
> >>
> >> On 10/12/2020 03:56, Qii Wang wrote:
> >>> On Mon, 2020-12-
On Thu, 2020-12-10 at 15:03 +0200, Grygorii Strashko wrote:
>
> On 10/12/2020 03:56, Qii Wang wrote:
> > On Mon, 2020-12-07 at 18:35 +0200, Grygorii Strashko wrote:
> >>
> >>>
> >>> On Thu, 2020-12-03 at 10:01 +0200, Grygorii Strashko wrote:
>
On Mon, 2020-12-07 at 18:35 +0200, Grygorii Strashko wrote:
>
> >
> > On Thu, 2020-12-03 at 10:01 +0200, Grygorii Strashko wrote:
> >>
> >> On 03/12/2020 03:25, Qii Wang wrote:
> >>> On Wed, 2020-12-02 at 16:35 +0100, Wolfram Sang wrote:
>
://patchwork.kernel.org/project/linux-acpi/patch/20180923135812.29574-8-hdego...@redhat.com/
On Thu, 2020-12-03 at 10:01 +0200, Grygorii Strashko wrote:
>
> On 03/12/2020 03:25, Qii Wang wrote:
> > On Wed, 2020-12-02 at 16:35 +0100, Wolfram Sang wrote:
> >> Hi,
> >>
> >>>
; > Therefore, we also need to move the suspend handling for the I2C
> > controller driver to the NOIRQ phase as well.
> >
> > Signed-off-by: Qii Wang
>
> Is this a bugfix and should go into 5.10? Or can it wait for 5.11?
>
Yes, Can you help to apply it into 5.10? Thanks
> Thanks,
>
>Wolfram
>
I am sorry, there is a misspelling in my subject.
-medaitek
+mediatek
I will revise it with other new comments and then update this patch.
On Sat, 2020-11-07 at 17:09 +0800, qii.w...@mediatek.com wrote:
> From: Qii Wang
>
> Some i2c device driver indirectly uses I2C driver when
Thanks, it looks good for me, it would be better to remove all useless
members
On Wed, 2020-09-30 at 08:42 +, Xu Wang wrote:
> Because clk_disable_unprepare already checked NULL clock parameter,
> so the additional checks are unnecessary, just remove it
>
> Signed-off-by: Xu Wang
> ---
>
The master code needs to being sent when the speed is more than
I2C_MAX_FAST_MODE_PLUS_FREQ, not I2C_MAX_FAST_MODE_FREQ in the
latest I2C-bus specification and user manual.
Signed-off-by: Qii Wang
---
drivers/i2c/busses/i2c-mt65xx.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff
This series are based on 5.9-rc1 and we provide two i2c patches
to fix some definitions for bus frequency.
Qii Wang (2):
i2c: mediatek: Fix generic definitions for bus frequency
i2c: mediatek: Send i2c master code at more than 1MHz
drivers/i2c/busses/i2c-mt65xx.c | 6 +++---
1 file changed
The max frequency of mediatek i2c controller driver is
I2C_MAX_HIGH_SPEED_MODE_FREQ, not I2C_MAX_FAST_MODE_PLUS_FREQ.
Fix it.
Fixes: 90224e6468e1 ("i2c: drivers: Use generic definitions
for bus frequencies")
Reviewed-by: Yingjoe Chen
Signed-off-by: Qii Wang
---
drivers/i2c/busses/i2
On Mon, 2020-09-14 at 15:48 +0300, Andy Shevchenko wrote:
> On Sat, Sep 12, 2020 at 9:02 AM wrote:
> >
> > From: Qii Wang
> >
> > The master code needs to being sent when the speed is more than
> > I2C_MAX_FAST_MODE_PLUS_FREQ instead of
> > I2C_MAX_HIGH_
arameter or member
> 'min_low_ns' not described in 'i2c_spec_values'
>
> We also delete min_high_ns member as it is not used in the code.
>
> Signed-off-by: Matthias Brugger
Reviewed-by: Qii Wang
> ---
>
> Changes since v1:
> delete mint_high_ns member
>
>
On Thu, 2020-08-06 at 15:35 +0200, Matthias Brugger wrote:
>
> On 06/08/2020 13:06, Qii Wang wrote:
> > On Thu, 2020-08-06 at 11:48 +0200, Matthias Brugger wrote:
> >> The struct i2c_spec_values have it's members documented but is missing the
> >> starting '@
On Thu, 2020-08-06 at 11:48 +0200, Matthias Brugger wrote:
> The struct i2c_spec_values have it's members documented but is missing the
> starting '@', which leads to warings like:
>
> drivers/i2c/busses/i2c-mt65xx.c:267: warning: Function parameter or member
> 'min_low_ns' not described in
Add i2c compatible for MT8192. Compare to MT8183 i2c controller,
MT8192 support more then 8GB DMA mode.
Signed-off-by: Qii Wang
---
drivers/i2c/busses/i2c-mt65xx.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/drivers/i2c/busses/i2c-mt65xx.c b/drivers/i2c/busses/i2c
This series are based on 5.8-rc1 and we provide four i2c patches
to support mt8192 SoC.
Main changes compared to v2:
--delete unused I2C_DMA_4G_MODE
Main changes compared to v1:
--modify the commit with access more than 8GB dram
--add Reviewed-by and Acked-by from Yingjoe, Matthias and Rob
Qii
With the apdma remove hand-shake signal, it need to keep i2c and
apdma in sync manually.
Reviewed-by: Yingjoe Chen
Reviewed-by: Matthias Brugger
Signed-off-by: Qii Wang
---
drivers/i2c/busses/i2c-mt65xx.c | 23 ---
1 file changed, 20 insertions(+), 3 deletions(-)
diff
Newer MTK chip support more than 8GB of dram. Replace support_33bits
with more general dma_max_support and remove mtk_i2c_set_4g_mode.
Reviewed-by: Yingjoe Chen
Signed-off-by: Qii Wang
---
drivers/i2c/busses/i2c-mt65xx.c | 39 +--
1 file changed, 17
Add a DT binding documentation for the MT8192 soc.
Acked-by: Rob Herring
Signed-off-by: Qii Wang
---
Documentation/devicetree/bindings/i2c/i2c-mt65xx.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/i2c/i2c-mt65xx.txt
b/Documentation/devicetree
On Wed, 2020-07-29 at 09:59 +0200, Matthias Brugger wrote:
>
> On 28/07/2020 14:30, Qii Wang wrote:
> > Newer MTK chip support more than 8GB of dram. Replace support_33bits
> > with more general dma_max_support and remove mtk_i2c_set_4g_mode.
> >
>
Add a DT binding documentation for the MT8192 soc.
Acked-by: Rob Herring
Signed-off-by: Qii Wang
---
Documentation/devicetree/bindings/i2c/i2c-mt65xx.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/i2c/i2c-mt65xx.txt
b/Documentation/devicetree
Add i2c compatible for MT8192. Compare to MT8183 i2c controller,
MT8192 support more then 8GB DMA mode.
Signed-off-by: Qii Wang
---
drivers/i2c/busses/i2c-mt65xx.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/drivers/i2c/busses/i2c-mt65xx.c b/drivers/i2c/busses/i2c
With the apdma remove hand-shake signal, it need to keep i2c and
apdma in sync manually.
Reviewed-by: Yingjoe Chen
Reviewed-by: Matthias Brugger
Signed-off-by: Qii Wang
---
drivers/i2c/busses/i2c-mt65xx.c | 23 ---
1 file changed, 20 insertions(+), 3 deletions(-)
diff
This series are based on 5.8-rc1 and we provide four i2c patches
to support mt8192 SoC.
Main changes compared to v1:
--modify the commit with access more than 8GB dram
--add Reviewed-by and Acked-by from Yingjoe, Matthias and Rob
Qii Wang (4):
i2c: mediatek: Add apdma sync in i2c driver
i2c
Newer MTK chip support more than 8GB of dram. Replace support_33bits
with more general dma_max_support and remove mtk_i2c_set_4g_mode.
Signed-off-by: Qii Wang
---
drivers/i2c/busses/i2c-mt65xx.c | 38 +-
1 file changed, 17 insertions(+), 21 deletions(-)
diff
On Thu, 2020-07-23 at 09:24 +0800, Yingjoe Chen wrote:
> On Wed, 2020-07-22 at 20:31 +0800, Qii Wang wrote:
> > Replace 'support_33bits with 'dma_max_support' for DMA mask
> > operation, and replace 'mtk_i2c_set_4g_mode' with 'upper_32_bits'.
>
> This doesn't explain why we
On Thu, 2020-07-23 at 09:29 +0800, Yingjoe Chen wrote:
> On Wed, 2020-07-22 at 20:31 +0800, Qii Wang wrote:
> > With the apdma remove hand-shake signal, it need to keep i2c and
> > apdma in sync manually.
> >
>
> Looks good to me,
>
> Reviewed-by: Yingjoe Chen
On Wed, 2020-07-22 at 17:38 +0200, Matthias Brugger wrote:
>
> On 22/07/2020 14:31, Qii Wang wrote:
> > Replace 'support_33bits with 'dma_max_support' for DMA mask
> > operation, and replace 'mtk_i2c_set_4g_mode' with 'upper_32_bits'.
>
> Please explain more in detail wh
With the apdma remove hand-shake signal, it need to keep i2c and
apdma in sync manually.
Signed-off-by: Qii Wang
---
drivers/i2c/busses/i2c-mt65xx.c | 23 ---
1 file changed, 20 insertions(+), 3 deletions(-)
diff --git a/drivers/i2c/busses/i2c-mt65xx.c b/drivers/i2c/busses
Add a DT binding documentation for the MT8192 soc.
Signed-off-by: Qii Wang
---
Documentation/devicetree/bindings/i2c/i2c-mt65xx.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/i2c/i2c-mt65xx.txt
b/Documentation/devicetree/bindings/i2c/i2c-mt65xx.txt
Replace 'support_33bits with 'dma_max_support' for DMA mask
operation, and replace 'mtk_i2c_set_4g_mode' with 'upper_32_bits'.
Signed-off-by: Qii Wang
---
drivers/i2c/busses/i2c-mt65xx.c | 37 +
1 file changed, 17 insertions(+), 20 deletions(-)
diff --git
Add i2c compatible for MT8192. Compare to MT8183 i2c controller,
MT8192 support more then 8GB DMA mode.
Signed-off-by: Qii Wang
---
drivers/i2c/busses/i2c-mt65xx.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/drivers/i2c/busses/i2c-mt65xx.c b/drivers/i2c/busses/i2c
This series are based on 5.8-rc1 and we provide four i2c patches
to support mt8192 SoC.
Qii Wang (4):
i2c: mediatek: Add apdma sync in i2c driver
i2c: mediatek: Support DMA mask range over 33-bits
dt-bindings: i2c: update bindings for MT8192 SoC
i2c: mediatek: Add i2c compatible
Hi Qiangming:
Do you have the specific timing cost data about the "continuous mode"?
Is it better than the default multi-write mode(one message by one
message) ?I need to know if this patch is very necessary.
On Fri, 2020-06-19 at 16:06 +0800, Qiangming Xia wrote:
> From: "qiangming.xia"
On Fri, 2020-06-19 at 16:06 +0800, Qiangming Xia wrote:
> From: "qiangming.xia"
>
> Mediatek i2c controller support for continuous mode,
> it allow to transfer once multiple writing messages of equal length.
> For example, a slave need write a serial of non-continuous
> offset range in
Hi Geert,
On Wed, 2020-05-20 at 10:58 +0200, Geert Uytterhoeven wrote:
> Hi Qii,
>
> On Wed, May 20, 2020 at 10:44 AM Qii Wang wrote:
> > On Tue, 2020-05-19 at 09:14 +0200, Geert Uytterhoeven wrote:
> > > On Tue, May 19, 2020 at 4:59 AM Qii Wang wrote:
> > > &g
Hi Geert,
On Tue, 2020-05-19 at 09:14 +0200, Geert Uytterhoeven wrote:
> Hi Qii,
>
> On Tue, May 19, 2020 at 4:59 AM Qii Wang wrote:
> > On Mon, 2020-05-18 at 17:44 +0200, Geert Uytterhoeven wrote:
> > > On Thu, May 14, 2020 at 3:13 PM Qii Wang wrote:
> > &
On Mon, 2020-05-18 at 17:44 +0200, Geert Uytterhoeven wrote:
> On Thu, May 14, 2020 at 3:13 PM Qii Wang wrote:
> > This patch adds a algorithm to calculate some ac-timing parameters
> > which can fully meet I2C Spec.
> >
> > Signed-off-by: Qii Wang
> > ---
>
This series are based on 5.7-rc1, we provide two patches to support i2c
ac-timing.
Main changes compared to v1:
--add maintainer for mediatek i2c controller driver
--fix warning of self-assignment
Qii Wang (2):
MAINTAINERS: add maintainer for mediatek i2c controller driver
i2c: mediatek
This patch adds a algorithm to calculate some ac-timing parameters
which can fully meet I2C Spec.
Signed-off-by: Qii Wang
---
drivers/i2c/busses/i2c-mt65xx.c | 328 +---
1 file changed, 277 insertions(+), 51 deletions(-)
diff --git a/drivers/i2c/busses/i2c
Add Qii Wang as maintainer for mediatek i2c controller driver.
Signed-off-by: Qii Wang
---
MAINTAINERS | 7 +++
1 file changed, 7 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index e64e5db..c0fdf11 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -10658,6 +10658,13 @@ L: net
On Thu, 2020-05-14 at 08:29 +0200, Wolfram Sang wrote:
> > > Last question: You seem to be the one doing major updates to this
> > > driver. Thanks for that! Are you maybe interested in becoming the
> > > maintainer for this driver? I think there won't be much patches to
> > > review and reports
On Tue, 2020-05-12 at 15:38 +0200, Wolfram Sang wrote:
> Hi Qii Wang,
>
> On Thu, Mar 26, 2020 at 07:54:36PM +0800, qii.w...@mediatek.com wrote:
> > From: Qii Wang
> >
> > This patch adds a algorithm to calculate some ac-timing parameters
> > which can fully m
On Fri, 2019-08-23 at 16:13 +0800, Hsin-Yi Wang wrote:
> On Fri, Aug 23, 2019 at 4:09 PM Qii Wang wrote:
>
> > >
> > > static u32 mtk_i2c_functionality(struct i2c_adapter *adap)
> > > {
> > > - return I2C_FUNC_I2C | I2C_FUNC_SMBUS
On Thu, 2019-08-22 at 17:45 +0800, Hsin-Yi Wang wrote:
> When doing i2cdetect quick write mode, we would get transfer
> error ENOMEM, and i2cdetect shows there's no device at the address.
> Quoting from mt8183 datasheet, the number of transfers to be
> transferred in one transaction should be set
On Sat, 2019-07-27 at 11:18 +0200, Boris Brezillon wrote:
> On Sat, 27 Jul 2019 09:23:33 +0800
> Qii Wang wrote:
>
> > On Wed, 2019-07-24 at 14:21 -0600, Rob Herring wrote:
> > > On Tue, Jul 09, 2019 at 09:09:21PM +0800, Qii Wang wrote:
> > > > Docu
On Wed, 2019-07-24 at 14:21 -0600, Rob Herring wrote:
> On Tue, Jul 09, 2019 at 09:09:21PM +0800, Qii Wang wrote:
> > Document MediaTek I3C master DT bindings.
> >
> > Signed-off-by: Qii Wang
> > ---
> > .../devicetree/bindings/i3c/mtk,i3c-master.txt | 48
On Wed, 2019-06-26 at 15:39 +0200, Wolfram Sang wrote:
> Hi,
>
> On Tue, Jun 11, 2019 at 04:11:54PM +0800, Qii Wang wrote:
> > Add i2c AC timing binding to binding file. It can give the AC
> > timing parameters to meet I2C specification at different speed.
> >
> >
Add a driver for MediaTek I3C master IP.
Signed-off-by: Qii Wang
---
drivers/i3c/master/Kconfig | 10 +
drivers/i3c/master/Makefile |1 +
drivers/i3c/master/i3c-master-mtk.c | 1239 +++
3 files changed, 1250 insertions(+)
create mode
driver handle it
--let sample_cnt and step_cnt start from two
Qii Wang (2):
dt-bindings: i3c: Document MediaTek I3C master bindings
i3c: master: Add driver for MediaTek IP
.../devicetree/bindings/i3c/mtk,i3c-master.txt | 48 +
drivers/i3c/master/Kconfig | 10
Document MediaTek I3C master DT bindings.
Signed-off-by: Qii Wang
---
.../devicetree/bindings/i3c/mtk,i3c-master.txt | 48
1 file changed, 48 insertions(+)
create mode 100644 Documentation/devicetree/bindings/i3c/mtk,i3c-master.txt
diff --git a/Documentation
On Wed, 2019-06-26 at 18:23 +0200, Boris Brezillon wrote:
> On Wed, 26 Jun 2019 13:36:27 +0800
> Qii Wang wrote:
>
> > Document MediaTek I3C master DT bindings.
> >
> > Signed-off-by: Qii Wang
> > ---
> > .../devicetree/bin
This series are based on 5.2-rc1, we provide two patches to
support MediaTek I3C master controller.
Main changes compared to v1:
--remove clock-div, let clock driver handle it
--let sample_cnt and step_cnt start from two
Qii Wang (2):
dt-bindings: i3c: Document MediaTek I3C master bindings
Document MediaTek I3C master DT bindings.
Signed-off-by: Qii Wang
---
.../devicetree/bindings/i3c/mtk,i3c-master.txt | 47
1 file changed, 47 insertions(+)
create mode 100644 Documentation/devicetree/bindings/i3c/mtk,i3c-master.txt
diff --git a/Documentation
Add a driver for MediaTek I3C master IP.
Signed-off-by: Qii Wang
---
drivers/i3c/master/Kconfig | 10 +
drivers/i3c/master/Makefile |1 +
drivers/i3c/master/i3c-master-mtk.c | 1239 +++
3 files changed, 1250 insertions(+)
create mode
On Tue, 2019-06-11 at 14:28 +0200, Boris Brezillon wrote:
> On Tue, 11 Jun 2019 20:25:22 +0800
> Qii Wang wrote:
>
> > On Tue, 2019-06-04 at 20:26 +0800, Qii Wang wrote:
> > > On Tue, 2019-06-04 at 09:58 +0200, Boris Brezillon wrote:
> > > > On Mon, 3 Jun
On Tue, 2019-06-04 at 20:26 +0800, Qii Wang wrote:
> On Tue, 2019-06-04 at 09:58 +0200, Boris Brezillon wrote:
> > On Mon, 3 Jun 2019 11:51:03 +0800
> > Qii Wang wrote:
> >
> >
> > > +static int mtk_i3c_master_probe(struct platform_device *pdev)
> &
This patch adds some I2C timing registers to meet I2C spec, it
configures these registers according to information passed via DT.
Signed-off-by: Qii Wang
---
drivers/i2c/busses/i2c-mt65xx.c | 94 ++-
1 file changed, 82 insertions(+), 12 deletions(-)
diff
This series are based on 5.2-rc1, we provide two patches to
support AC timing adjustment.
Qii Wang (2):
dt-bindings: i2c: Add MediaTek i2c AC timing binding
i2c: mediatek: Add i2c AC timing adjust support
.../devicetree/bindings/i2c/i2c-mt65xx.txt | 11 +++
drivers/i2c/busses/i2c
Add i2c AC timing binding to binding file. It can give the AC
timing parameters to meet I2C specification at different speed.
Signed-off-by: Qii Wang
---
.../devicetree/bindings/i2c/i2c-mt65xx.txt | 11 +++
1 file changed, 11 insertions(+)
diff --git a/Documentation
On Tue, 2019-06-04 at 09:58 +0200, Boris Brezillon wrote:
> On Mon, 3 Jun 2019 11:51:03 +0800
> Qii Wang wrote:
>
>
> > +static int mtk_i3c_master_probe(struct platform_device *pdev)
> > +{
> > + struct device *dev = >dev;
> > + struct mtk_i3c_maste
Document MediaTek I3C master DT bindings.
Signed-off-by: Qii Wang
---
.../devicetree/bindings/i3c/mtk,i3c-master.txt | 50
1 file changed, 50 insertions(+)
create mode 100644 Documentation/devicetree/bindings/i3c/mtk,i3c-master.txt
diff --git a/Documentation
Add a driver for MediaTek I3C master IP.
Signed-off-by: Qii Wang
---
drivers/i3c/master/Kconfig | 10 +
drivers/i3c/master/Makefile |1 +
drivers/i3c/master/i3c-master-mtk.c | 1246 +++
3 files changed, 1257 insertions(+)
create mode
This series are based on 5.2-rc1, we provide two patches to
support MediaTek I3C master controller.
Qii Wang (2):
dt-bindings: i3c: Document MediaTek I3C master bindings
i3c: master: Add driver for MediaTek IP
.../devicetree/bindings/i3c/mtk,i3c-master.txt | 50 +
drivers/i3c/master
New i2c registers would have different offsets, so we use different
offsets array to distinguish different i2c registers version.
Signed-off-by: Qii Wang
Reviewed-by: Matthias Brugger
---
drivers/i2c/busses/i2c-mt65xx.c | 163 +--
1 file changed, 104
When two i2c controllers are internally connected to the same
GPIO pins, the arb clock is needed to ensure that the waveforms
do not interfere with each other. And we also need to enable
the interrupt to find arb lost, old i2c controllers also have
the bit.
Signed-off-by: Qii Wang
Reviewed
When i2c and apdma use different source clocks, we should enable
synchronization between them.
Signed-off-by: Qii Wang
Reviewed-by: Nicolas Boichat
---
drivers/i2c/busses/i2c-mt65xx.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/drivers/i2c/busses/i2c-mt65xx.c b/drivers
This patch adds i2c nodes for I2C controllers
Signed-off-by: Qii Wang
---
arch/arm64/boot/dts/mediatek/mt8183.dtsi | 192 ++
1 file changed, 192 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
index
Add MT8183 i2c binding to binding file. Compare to MT2712 i2c
controller, MT8183 has different registers, offsets, and clock.
Signed-off-by: Qii Wang
Reviewed-by: Matthias Brugger
---
Documentation/devicetree/bindings/i2c/i2c-mtk.txt |4 +++-
1 file changed, 3 insertions(+), 1 deletion
to for-next
--remove i2c fallback for i3c controller
Main changes compared to v2:
--update commit message
--add Reviewed-by from Rob Herring, Nicolas and Sean
Main changes compared to v1:
--remove useless dt-binding for mt7629
--split a patch into two(2/6 3/6)
--muti-user feature was dropped
Qii Wang
Add i2c compatible for MT8183. Compare to MT2712 i2c controller,
MT8183 has different register offsets. Ltiming_reg is added to
adjust low width of SCL. Arb clock and dma_sync are needed.
Signed-off-by: Qii Wang
Reviewed-by: Nicolas Boichat
---
drivers/i2c/busses/i2c-mt65xx.c | 62
On Mon, 2019-03-11 at 16:36 +0800, Nicolas Boichat wrote:
> On Mon, Mar 11, 2019 at 1:41 PM Qii Wang wrote:
> >
> > This patch adds nodes for I2C controller.
> >
> > Signed-off-by: Qii Wang
> > ---
>
> This applies on top of some other uncommitted series
--add Reviewed-by from Rob Herring, Nicolas and Sean
Main changes compared to v1:
--remove useless dt-binding for mt7629
--split a patch into two(2/6 3/6)
--muti-user feature was dropped
Qii Wang (6):
i2c: mediatek: Add offsets array for new i2c registers
dt-bindings: i2c: Add Mediatek MT8183
This patch adds nodes for I2C controller.
Signed-off-by: Qii Wang
---
arch/arm64/boot/dts/mediatek/mt8183.dtsi | 190 ++
1 file changed, 190 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
index
Add i2c compatible for MT8183. Compare to MT2712 i2c controller,
MT8183 has different register offsets. Ltiming_reg is added to
adjust low width of SCL. Arb clock and dma_sync are needed.
Signed-off-by: Qii Wang
---
drivers/i2c/busses/i2c-mt65xx.c | 62
New i2c registers would have different offsets, so we use different
offsets array to distinguish different i2c registers version.
Signed-off-by: Qii Wang
Reviewed-by: Matthias Brugger
---
drivers/i2c/busses/i2c-mt65xx.c | 163 +--
1 file changed, 104
When two i2c controllers are internally connected to the same
GPIO pins, the arb clock is needed to ensure that the waveforms
do not interfere with each other. And we also need to enable
the interrupt to find arb lost, old i2c controllers also have
the bit.
Signed-off-by: Qii Wang
---
drivers
When i2c and apdma use different source clocks, we should enable
synchronization between them.
Signed-off-by: Qii Wang
Reviewed-by: Nicolas Boichat
---
drivers/i2c/busses/i2c-mt65xx.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/drivers/i2c/busses/i2c-mt65xx.c b/drivers
Add MT8183 i2c binding to binding file. Compare to MT2712 i2c
controller, MT8183 has different registers, offsets, and clock.
Signed-off-by: Qii Wang
Reviewed-by: Rob Herring
---
Documentation/devicetree/bindings/i2c/i2c-mtk.txt |4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff
On Wed, 2019-03-06 at 18:52 +0800, Nicolas Boichat wrote:
> On Tue, Feb 26, 2019 at 9:11 PM Qii Wang wrote:
> >
> > Add i2c compatible for MT8183. Compare to MT2712 i2c controller,
> > MT8183 has different register offsets. Ltiming_reg is added to
> > adjust
On Wed, 2019-03-06 at 18:49 +0800, Nicolas Boichat wrote:
> One thing I missed from Matthias' comment on v4:
> https://patchwork.kernel.org/patch/10822083/
>
> On Wed, Mar 6, 2019 at 6:44 PM Nicolas Boichat wrote:
> >
> > On Tue, Feb 26, 2019 at 9:11 PM Qii Wang wrote:
I am sorry to have missed some comment, and reply the mail again.
On Wed, 2019-02-20 at 15:41 +0100, Matthias Brugger wrote:
>
> On 20/02/2019 13:33, Qii Wang wrote:
> > Add i2c compatible for MT8183. Compare to MT2712 i2c controller,
> > MT8183 has different registers,
When i2c and apdma use different source clocks, we should enable
synchronization between them.
Signed-off-by: Qii Wang
---
drivers/i2c/busses/i2c-mt65xx.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/drivers/i2c/busses/i2c-mt65xx.c b/drivers/i2c/busses/i2c-mt65xx.c
index
Add MT8183 i2c binding to binding file. Compare to MT2712 i2c
controller, MT8183 has different registers, offsets, and clock.
Signed-off-by: Qii Wang
---
Documentation/devicetree/bindings/i2c/i2c-mtk.txt |4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/Documentation
Add i2c compatible for MT8183. Compare to MT2712 i2c controller,
MT8183 has different register offsets. Ltiming_reg is added to
adjust low width of SCL. Arb clock and dma_sync are needed.
Signed-off-by: Qii Wang
---
drivers/i2c/busses/i2c-mt65xx.c | 53
New i2c registers would have different offsets, so we use different
offsets array to distinguish different i2c registers version.
Signed-off-by: Qii Wang
Reviewed-by: Matthias Brugger
---
drivers/i2c/busses/i2c-mt65xx.c | 163 +--
1 file changed, 104
When two i2c controllers are internally connected to the same
GPIO pins, the arb clock is needed to ensure that the waveforms
do not interfere with each other.
Signed-off-by: Qii Wang
---
drivers/i2c/busses/i2c-mt65xx.c | 25 ++---
1 file changed, 22 insertions(+), 3
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