Flash mt35xu512aba connected to FlexSPI controller supports
1-1-8/1-8-8 protocol.
Added flag spi-rx-bus-width and spi-tx-bus-width with values as
8 and 8 respectively for both flashes connected at CS0 and CS1.
Signed-off-by: Yogesh Narayan Gaur
---
Changes for v6:
- Correct S-o-b tag with full
Hi Tudor,
> -Original Message-
> From: tudor.amba...@microchip.com [mailto:tudor.amba...@microchip.com]
> Sent: Tuesday, December 11, 2018 1:40 PM
> To: Yogesh Narayan Gaur ; linux-
> m...@lists.infradead.org; boris.brezil...@bootlin.com; broo...@kernel.org;
> marek.va..
Hi Vignesh,
> -Original Message-
> From: Vignesh R [mailto:vigne...@ti.com]
> Sent: Wednesday, December 19, 2018 6:14 PM
> To: Yogesh Narayan Gaur ; linux-
> m...@lists.infradead.org; boris.brezil...@bootlin.com; broo...@kernel.org;
> marek.va...@gmail.com; linux-.
Hi All,
> -Original Message-
> From: Vignesh R [mailto:vigne...@ti.com]
> Sent: Thursday, December 20, 2018 12:03 PM
> To: Yogesh Narayan Gaur ; linux-
> m...@lists.infradead.org; boris.brezil...@bootlin.com; broo...@kernel.org;
> marek.va...@gmail.com; linux-.
@nod.at;
> miquel.ray...@bootlin.com; David Wolfe ; Fabio
> Estevam ; Prabhakar Kushwaha
> ; Yogesh Narayan Gaur
> ; shawn...@kernel.org; Schrempf Frieder
> ; linux-kernel@vger.kernel.org
> Subject: [PATCH v7 3/9] spi: Add a driver for the Freescale/NXP QuadSPI
> controller
>
Hi Boris,
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Wednesday, December 5, 2018 6:16 PM
> To: Vignesh R ; broo...@kernel.org
> Cc: Yogesh Narayan Gaur ; linux-
> m...@lists.infradead.org; marek.va...@gmail.com; linux-.
Hi Boris,
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Thursday, December 6, 2018 12:16 PM
> To: Yogesh Narayan Gaur
> Cc: Vignesh R ; broo...@kernel.org; linux-
> m...@lists.infradead.org; marek.va...@gmail.com; linux-.
Hi Boris,
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Tuesday, October 16, 2018 5:48 PM
> To: Yogesh Narayan Gaur
> Cc: Tudor Ambarus ; marek.va...@gmail.com;
> dw...@infradead.org; computersforpe...@gmail.com; rich...@nod.
Hi Tudor,
> -Original Message-
> From: Cyrille Pitchen [mailto:cyrille.pitc...@wedev4u.fr]
> Sent: Tuesday, October 16, 2018 10:04 PM
> To: Tudor Ambarus ; Yogesh Narayan Gaur
> ; marek.va...@gmail.com;
> dw...@infradead.org; computersforpe...@gmail.com;
> boris.
Hi Tudor,
> -Original Message-
> From: Yogesh Narayan Gaur
> Sent: Wednesday, October 17, 2018 7:38 AM
> To: 'Cyrille Pitchen' ; Tudor Ambarus
> ; marek.va...@gmail.com;
> dw...@infradead.org; computersforpe...@gmail.com;
> boris.brezil...@bootlin.com; rich...@nod.
Hi Boris,
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Wednesday, October 17, 2018 1:00 PM
> To: Yogesh Narayan Gaur
> Cc: Cyrille Pitchen ; Tudor Ambarus
> ; marek.va...@gmail.com;
> dw...@infradead.org; computersfor
Hi Tudor,
> -Original Message-
> From: Tudor Ambarus [mailto:tudor.amba...@microchip.com]
> Sent: Wednesday, October 17, 2018 1:31 PM
> To: Yogesh Narayan Gaur ; Boris Brezillon
>
> Cc: Cyrille Pitchen ; marek.va...@gmail.com;
> dw...@infradead.org; computersfor
Hi Vignesh,
> -Original Message-
> From: Vignesh R [mailto:vigne...@ti.com]
> Sent: Wednesday, October 3, 2018 10:26 PM
> To: Boris Brezillon ; Marek Vasut
> ; Rob Herring
> Cc: Brian Norris ; Yogesh Narayan Gaur
> ; Linux ARM Mailing List ker...@lists.
Hi Boris,
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Thursday, October 4, 2018 1:09 PM
> To: Yogesh Narayan Gaur
> Cc: Vignesh R ; Marek Vasut ; Rob
> Herring ; Brian Norris ;
> Linux ARM Mailing List ; linux-
>
Hi Boris,
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Thursday, October 4, 2018 2:35 PM
> To: Yogesh Narayan Gaur
> Cc: linux-...@lists.infradead.org; marek.va...@gmail.com; vigne...@ti.com;
> linux-...@vger.k
Hi Boris,
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Thursday, October 4, 2018 2:48 PM
> To: Yogesh Narayan Gaur
> Cc: linux-...@lists.infradead.org; marek.va...@gmail.com; vigne...@ti.com;
> linux-...@vger.k
Hi Boris,
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Thursday, October 4, 2018 2:50 PM
> To: Yogesh Narayan Gaur
> Cc: linux-...@lists.infradead.org; marek.va...@gmail.com; vigne...@ti.com;
> linux-...@vger.k
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Thursday, October 4, 2018 2:56 PM
> To: Yogesh Narayan Gaur
> Cc: linux-...@lists.infradead.org; marek.va...@gmail.com; vigne...@ti.com;
> linux-...@vger.kernel.org; devicet...@
Hi Vignesh,
> -Original Message-
> From: Vignesh R [mailto:vigne...@ti.com]
> Sent: Thursday, October 4, 2018 2:52 PM
> To: Yogesh Narayan Gaur ; linux-
> m...@lists.infradead.org; boris.brezil...@bootlin.com; marek.va...@gmail.com;
> linux-...@vger.kernel.org; devicet.
Hi Boris,
> -Original Message-
> From: Yogesh Narayan Gaur
> Sent: Thursday, October 4, 2018 2:56 PM
> To: 'Boris Brezillon'
> Cc: linux-...@lists.infradead.org; marek.va...@gmail.com; vigne...@ti.com;
> linux-...@vger.kernel.org; devicet...@vger.kernel.org; r...@kerne
- Add opcodes for octal I/O commands
* Read : 1-1-8 and 1-8-8 protocol
* Write : 1-1-8 and 1-8-8 protocol
* opcodes for 4-byte address mode command
- Entry of macros in _convert_3to4_xxx function
- Add flag specifying flash support octal read commands.
Signed-off-by: Vignesh R
Add support for octal mode IO data transfer.
Micron flash, mt35xu512aba, supports octal mode data transfer and
NXP FlexSPI controller supports 8 data lines for data transfer (Rx/Tx).
Patch series
* Add support for octal mode flags and parsing of same in spi driver.
* Add opcodes for octal I/O
Add flags for Octal I/O data transfer
Required for the SPI controller which can do the data transfer (TX/RX)
on 8 data lines e.g. NXP FlexSPI controller.
SPI_TX_OCTAL: transmit with 8 wires
SPI_RX_OCTAL: receive with 8 wires
Signed-off-by: Yogesh Gaur
---
Changes for v2:
Incorporated review
Add octal read flag for flash mt35xu512aba.
This flash, mt35xu512aba, is only complaint to SFDP JESD216B and does
not seem to support newer JESD216C standard that provides auto
detection of Octal mode capabilities and opcodes. Therefore, this
capability is manually added using new
Add support for octal I/O data transfer based on the controller (spi)
mode.
Assign hw-capability mask bits for octal transfer.
Signed-off-by: Yogesh Gaur
---
Changes for v2:
Incorporated review comments of Boris.
drivers/mtd/devices/m25p80.c | 9 -
1 file changed, 8 insertions(+), 1
Add support for octal I/O data transfer in spi-mem framework.
Signed-off-by: Yogesh Gaur
---
Changes for v2:
Patch added in v2 version.
drivers/spi/spi-mem.c | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/spi/spi-mem.c b/drivers/spi/spi-mem.c
index
Add mode flags for octal I/O data transfer support.
NXP FlexSPI controller supports octal mode data transfer.
Signed-off-by: Yogesh Gaur
---
Changes for v2:
None
drivers/spi/spi-nxp-fspi.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/spi/spi-nxp-fspi.c
Flash mt35xu512aba connected to FlexSPI controller supports
1-1-8/1-8-8 protocol.
Added flag spi-rx-bus-width and spi-tx-bus-width with values as
8 and 8 respectively for both flashes connected at CS0 and CS1.
Signed-off-by: Yogesh Gaur
---
Changes for v2:
None
Hi Boris,
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Monday, October 15, 2018 5:24 PM
> To: Yogesh Narayan Gaur
> Cc: linux-...@lists.infradead.org; marek.va...@gmail.com; vigne...@ti.com;
> linux-...@vger.k
Add flags for Octal I/O data transfer
Required for the SPI controller which can do the data transfer (TX/RX)
on 8 data lines e.g. NXP FlexSPI controller.
SPI_TX_OCTAL: transmit with 8 wires
SPI_RX_OCTAL: receive with 8 wires
Signed-off-by: Yogesh Gaur
---
Changes for v2:
Incorporated review
Add octal read flag for flash mt35xu512aba.
This flash, mt35xu512aba, is only complaint to SFDP JESD216B and does
not seem to support newer JESD216C standard that provides auto
detection of Octal mode capabilities and opcodes. Therefore, this
capability is manually added using new
- Add opcodes for octal I/O commands
* Read : 1-1-8 and 1-8-8 protocol
* Write : 1-1-8 and 1-8-8 protocol
* opcodes for 4-byte address mode command
- Entry of macros in _convert_3to4_xxx function
- Add flag specifying flash support octal read commands.
Signed-off-by: Vignesh R
Flash mt35xu512aba connected to FlexSPI controller supports
1-1-8/1-8-8 protocol.
Added flag spi-rx-bus-width and spi-tx-bus-width with values as
8 and 8 respectively for both flashes connected at CS0 and CS1.
Signed-off-by: Yogesh Gaur
---
Changes for v2:
Make spi-tx-bus-width as 8.
Add mode flags for octal I/O data transfer support.
NXP FlexSPI controller supports octal mode data transfer.
Signed-off-by: Yogesh Gaur
---
Changes for v2:
None
drivers/spi/spi-nxp-fspi.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/spi/spi-nxp-fspi.c
Add support for octal mode IO data transfer.
Micron flash, mt35xu512aba, supports octal mode data transfer and
NXP FlexSPI controller supports 8 data lines for data transfer (Rx/Tx).
Patch series
* Add support for octal mode flags and parsing of same in spi driver.
* Add parsing logic for spi-mem
Add support for octal I/O data transfer based on the controller (spi)
mode.
Assign hw-capability mask bits for octal transfer.
Signed-off-by: Yogesh Gaur
---
Changes for v2:
Incorporated review comments of Boris.
drivers/mtd/devices/m25p80.c | 9 -
1 file changed, 8 insertions(+), 1
Add support for octal I/O data transfer in spi-mem framework.
Signed-off-by: Yogesh Gaur
---
Changes for v2:
Patch added in v2 version.
drivers/spi/spi-mem.c | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/spi/spi-mem.c b/drivers/spi/spi-mem.c
index
Hi Tudor,
This patch is breaking the 1-4-4 Read protocol for the spansion flash
"s25fl512s".
Without this patch read request command for Quad mode, 4-byte enable, is coming
as 0xEC i.e. SPINOR_OP_READ_1_4_4_4B.
But after applying this patch, read request command for Quad mode is coming as
Hi Boris,
> -Original Message-
> From: Frieder Schrempf [mailto:frieder.schre...@exceet.de]
> Sent: Monday, October 1, 2018 11:48 AM
> To: Boris Brezillon ; Yogesh Narayan Gaur
>
> Cc: linux-...@lists.infradead.org; marek.va...@gmail.com; linux-
> s...@vge
> -Original Message-
> From: Shawn Guo [mailto:shawn...@kernel.org]
> Sent: Friday, February 1, 2019 8:24 AM
> To: Yogesh Narayan Gaur
> Cc: linux-...@lists.infradead.org; bbrezil...@kernel.org;
> marek.va...@gmail.com; broo...@kernel.org; linux-...@vger.ker
Hello Mark,
Can you please apply below patch in SPI tree?
Patch has been reviewed by Boris and Frieder.
--
Regards
Yogesh Gaur
> -Original Message-
> From: Yogesh Narayan Gaur
> Sent: Tuesday, January 15, 2019 5:30 PM
> To: linux-...@lists.infradead.org; bbrezil..
Hi Rob / Shawn,
Can you please apply patches [1] [2].
--
Regards,
Yogesh Gaur
[1] https://patchwork.ozlabs.org/patch/1025136/
[2] https://patchwork.ozlabs.org/patch/1025137/
> -Original Message-
> From: Yogesh Narayan Gaur
> Sent: Tuesday, January 15, 2019 5:30 PM
&g
Hi Boris,
> -Original Message-
> From: Boris Brezillon [mailto:bbrezil...@kernel.org]
> Sent: Tuesday, January 22, 2019 2:47 PM
> To: Yogesh Narayan Gaur
> Cc: r...@kernel.org; shawn...@kernel.org; mark.rutl...@arm.com;
> devicet...@vger.kernel.org; linux-kern
- 1/2/4 bit mode]
[1] https://www.nxp.com/docs/en/reference-manual/IMXRT1050RM.pdf
[2] https://patchwork.kernel.org/project/linux-arm-kernel/list/?submitter=182097
Yogesh Narayan Gaur (5):
spi: spi-mem: Add driver for NXP FlexSPI controller
dt-bindings: spi: add binding file for NXP FlexSPI
Add maintainers for the NXP FlexSPI driver
Signed-off-by: Yogesh Narayan Gaur
---
Changes for v6:
- None
Changes for v5:
- Add maintainers for binding file
Changes for v4:
- None
Changes for v3:
- None
Changes for v2:
- None
---
MAINTAINERS | 7 +++
1 file changed, 7 insertions(+)
diff
).
Verified this driver on following SPI NOR flashes:
Micron, mt35xu512ab, [Read - 1 bit mode]
Cypress, s25fl512s, [Read - 1/2/4 bit mode]
Signed-off-by: Yogesh Narayan Gaur
---
Changes for v6:
- Rebase on top of v5.0-rc1
- Updated as per Frieder review comments and perform code cleanup
Enable driver support of NXP FlexSPI controller.
Signed-off-by: Yogesh Narayan Gaur
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 3ef443cfbab6..fe7f35824a79 100644
--- a/arch/arm64/configs
Add binding file for NXP FlexSPI controller
Signed-off-by: Yogesh Narayan Gaur
Reviewed-by: Rob Herring
---
Changes for v6:
- None
Changes for v5:
- None
Changes for v4:
- Incorporated Rob review comments.
Changes for v3:
- Removed node property 'big-endian'.
Changes for v2:
- Incorporated Rob
Add fspi node property for LX2160A SoC for FlexSPI driver.
Property added for the FlexSPI controller and for the connected
slave device for the LX2160ARDB target.
This is having two SPI-NOR flash device, mt35xu512aba, connected
at CS0 and CS1.
Signed-off-by: Yogesh Narayan Gaur
---
Changes
Hi Frieder,
> -Original Message-
> From: Schrempf Frieder [mailto:frieder.schre...@kontron.de]
> Sent: Wednesday, January 9, 2019 7:49 PM
> To: Yogesh Narayan Gaur ; linux-
> m...@lists.infradead.org; boris.brezil...@bootlin.com; marek.va...@gmail.com;
> broo...
Add support for octal mode IO data transfer.
Micron flash, mt35xu512aba, supports octal mode data transfer and
NXP FlexSPI controller supports 8 data lines for data transfer (Rx/Tx).
Patch series
* Add support for octal mode flags and parsing of same in spi driver.
* Add parsing logic for spi-mem
Add support for octal mode I/O data transfer in spi-mem framework.
Signed-off-by: Yogesh Gaur
Reviewed-by: Boris Brezillon
---
Changes for v5:
- Modified string 'octo' with 'octal'.
Changes for v4:
- None
Changes for v3:
- Modified string 'octal' with 'octo'.
Changes for v2:
- Patch added in v2
Add flags for Octal mode I/O data transfer
Required for the SPI controller which can do the data transfer (TX/RX)
on 8 data lines e.g. NXP FlexSPI controller.
SPI_TX_OCTAL: transmit with 8 wires
SPI_RX_OCTAL: receive with 8 wires
Signed-off-by: Yogesh Gaur
Reviewed-by: Boris Brezillon
---
Add octal mode flags for octal I/O data transfer support.
NXP FlexSPI controller supports 8 lines Rx/Tx data transfer.
Signed-off-by: Yogesh Gaur
---
Changes for v5:
- Modified string 'octo' with 'octal'.
Changes for v4:
- None
Changes for v3:
- Modified string 'octal' with 'octo'.
Changes for
Flash mt35xu512aba connected to FlexSPI controller supports
1-1-8/1-8-8 protocol.
Added flag spi-rx-bus-width and spi-tx-bus-width with values as
8 and 8 respectively for both flashes connected at CS0 and CS1.
Signed-off-by: Yogesh Gaur
---
Changes for v5:
- None
Changes for v4:
- None
Changes
- Add opcodes for octal I/O commands
* Read : 1-1-8 and 1-8-8 protocol
* Write : 1-1-8 and 1-8-8 protocol
* opcodes for 4-byte address mode command
- Entry of macros in _convert_3to4_xxx function
- Add flag specifying flash support octal read commands.
Signed-off-by: Vignesh R
Add support for octal mode I/O data transfer based on the controller (spi)
mode.
Assign hw-capability mask bits for octal transfer.
Signed-off-by: Yogesh Gaur
---
Changes for v5:
- Modified string 'octo' with 'octal'.
Changes for v4:
- None
Changes for v3:
- Modified string 'octal' with 'octo'.
Add octal read flag for flash mt35xu512aba.
This flash, mt35xu512aba, is only complaint to SFDP JESD216B and does
not seem to support newer JESD216C standard that provides auto
detection of Octal mode capabilities and opcodes. Therefore, this
capability is manually added using new
Hi Boris,
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Monday, December 3, 2018 1:35 PM
> To: Yogesh Narayan Gaur ;
> broo...@kernel.org
> Cc: linux-...@lists.infradead.org; marek.va...@gmail.com; vigne...@ti.com;
> linu
; Han Xu
> Cc: dw...@infradead.org; computersforpe...@gmail.com; rich...@nod.at;
> miquel.ray...@bootlin.com; David Wolfe ; Fabio
> Estevam ; Prabhakar Kushwaha
> ; Yogesh Narayan Gaur
> ; shawn...@kernel.org; Schrempf Frieder
> ; linux-kernel@vger.kernel.org
> Subject: [PATCH v7 3/9]
Add support for octal mode I/O data transfer based on the controller (spi)
mode.
Assign hw-capability mask bits for octal transfer.
Signed-off-by: Yogesh Gaur
---
Changes for v5:
- Modified string 'octo' with 'octal'.
Changes for v4:
- None
Changes for v3:
- Modified string 'octal' with 'octo'.
nal Message-
> From: Mark Brown [mailto:broo...@kernel.org]
> Sent: Friday, December 7, 2018 2:00 AM
> To: Yogesh Narayan Gaur
> Cc: Boris Brezillon ; Vignesh R
> ;
> linux-...@lists.infradead.org; marek.va...@gmail.com; linux-
> s...@vger.kernel.org; devicet...@vger.ker
Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Monday, December 10, 2018 1:52 PM
> To: Yogesh Narayan Gaur
> Cc: Mark Brown ; Vignesh R ; linux-
> m...@lists.infradead.org; marek.va...@gmail.com; linux-...@vger.kernel.org;
> devicet...@vger.kernel.org; r...@kernel.org;
Hi Frieder,
> -Original Message-
> From: Frieder Schrempf [mailto:frieder.schre...@exceet.de]
> Sent: Thursday, September 6, 2018 1:56 PM
> To: Yogesh Narayan Gaur ; Boris Brezillon
>
> Cc: linux-...@lists.infradead.org; marek.va...@gmail.com; linux-
> s...@vge
Hi Boris,
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Thursday, September 6, 2018 5:14 PM
> To: Yogesh Narayan Gaur
> Cc: Frieder Schrempf ; linux-
> m...@lists.infradead.org; marek.va...@gmail.com; linux-...@vger.ker
; Fabio Estevam ; Prabhakar
Kushwaha ; Yogesh Narayan Gaur
; Han Xu ; Frieder Schrempf
; linux-kernel@vger.kernel.org
Subject: [PATCH 03/11] spi: Add a driver for the Freescale/NXP QuadSPI
controller
This driver is derived from the SPI NOR driver at mtd/spi-nor/fsl-quadspi.c. It
uses the new
Hi Boris,
-Original Message-
From: linux-mtd [mailto:linux-mtd-boun...@lists.infradead.org] On Behalf Of
Yogesh Narayan Gaur
Sent: Monday, June 11, 2018 3:51 PM
To: Boris Brezillon
Cc: rich...@nod.at; Prabhakar Kushwaha ; Han Xu
; linux-kernel@vger.kernel.org; linux-...@vger.kernel.org
Hi Boris,
-Original Message-
From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
Sent: Tuesday, June 12, 2018 12:43 PM
To: Yogesh Narayan Gaur
Cc: rich...@nod.at; Prabhakar Kushwaha ; Han Xu
; linux-kernel@vger.kernel.org; linux-...@vger.kernel.org;
marek.va...@gmail.com
Hi Boris,
-Original Message-
From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
Sent: Monday, June 11, 2018 3:19 PM
To: Yogesh Narayan Gaur
Cc: linux-...@lists.infradead.org; boris.brezil...@free-electrons.com;
frieder.schre...@exceet.de; computersforpe...@gmail.com; David
Hi Lothar,
> -Original Message-
> From: Lothar Waßmann [mailto:l...@karo-electronics.de]
> Sent: Friday, August 31, 2018 5:28 PM
> To: Yogesh Narayan Gaur
> Cc: linux-...@lists.infradead.org; boris.brezil...@bootlin.com;
> marek.va...@gmail.com; linux-...@vger.ker
Hi Prabhakar,
> -Original Message-
> From: Prabhakar Kushwaha
> Sent: Monday, September 3, 2018 3:24 PM
> To: Yogesh Narayan Gaur ; linux-
> m...@lists.infradead.org; boris.brezil...@bootlin.com; marek.va...@gmail.com;
> linux-...@vger.kernel.org; devicet...@vger.
Hi Boris,
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Tuesday, September 4, 2018 8:29 PM
> To: Yogesh Narayan Gaur
> Cc: linux-...@lists.infradead.org; marek.va...@gmail.com; linux-
> s...@vger.kernel.org; devicet...@
k.va...@gmail.com;
rich...@nod.at; miquel.ray...@bootlin.com; broo...@kernel.org; David Wolfe
; Fabio Estevam ; Prabhakar
Kushwaha ; Yogesh Narayan Gaur
; Han Xu ; Frieder Schrempf
; linux-kernel@vger.kernel.org
Subject: [PATCH 03/11] spi: Add a driver for the Freescale/NXP QuadSPI
contro
Hi Boris,
-Original Message-
From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
Sent: Friday, June 8, 2018 6:22 PM
To: Yogesh Narayan Gaur
Cc: Frieder Schrempf ;
linux-...@lists.infradead.org; linux-...@vger.kernel.org; dw...@infradead.org;
computersforpe...@gmail.com
Hi Boris,
-Original Message-
From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
Sent: Monday, June 11, 2018 1:16 PM
To: Yogesh Narayan Gaur ; marek.va...@gmail.com
Cc: Frieder Schrempf ;
linux-...@lists.infradead.org; linux-...@vger.kernel.org; dw...@infradead.org
Hi Boris,
-Original Message-
From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
Sent: Monday, June 11, 2018 3:46 PM
To: Yogesh Narayan Gaur
Cc: marek.va...@gmail.com; Frieder Schrempf ;
linux-...@lists.infradead.org; linux-...@vger.kernel.org; dw...@infradead.org
Hi Frieder,
[..]
> >
> > Ok, I will have a look at what could make the chip selection fail in
> > case of AHB read.
>
> Could you try with this change applied:
>
> @@ -503,7 +503,7 @@ static void fsl_qspi_select_mem(struct fsl_qspi *q, struct
> spi_device *spi)
>
Hi Frieder,
With below patch on top of your v5, Read/Write/Erase on CS1 is working fine for
me.
I have tested with JFFS2 mounting and booting also for both CS0 and CS1.
diff --git a/drivers/spi/spi-fsl-qspi.c b/drivers/spi/spi-fsl-qspi.c
index ce45e8e..4467983 100644
---
Hi Frieder,
> -Original Message-
> From: Schrempf Frieder [mailto:frieder.schre...@kontron.de]
> Sent: Thursday, November 15, 2018 7:32 PM
> To: Yogesh Narayan Gaur
> Cc: Boris Brezillon ;
> linux-...@lists.infradead.org;
> linux-...@vger.kernel.org; Marek Vasut ;
Hi Boris,
Please apply this patch series [1] in the coming release.
--
Regards
Yogesh Gaur
[1] https://patchwork.ozlabs.org/project/linux-mtd/list/?series=70384
> -Original Message-
> From: Yogesh Narayan Gaur
> Sent: Tuesday, October 23, 2018 3:31 PM
> To: 'Boris Brez
Hi Frieder,
> -Original Message-
> From: Schrempf Frieder [mailto:frieder.schre...@kontron.de]
> Sent: Friday, November 16, 2018 3:12 PM
> To: Yogesh Narayan Gaur
> Cc: Boris Brezillon ;
> linux-...@lists.infradead.org;
> linux-...@vger.kernel.org; Marek Vasut ;
Enable driver support of NXP FlexSPI controller.
Signed-off-by: Yogesh Gaur
---
Changes for v5:
- None
Changes for v4:
- None
Changes for v3:
- None
Changes for v2:
- None
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig
- Add driver for NXP FlexSPI host controller
(0) What is the FlexSPI controller?
FlexSPI is a flexsible SPI host controller which supports two SPI
channels and up to 4 external devices. Each channel supports
Single/Dual/Quad/Octal mode data transfer (1/2/4/8 bidirectional
data lines) i.e.
Add binding file for NXP FlexSPI controller
Signed-off-by: Yogesh Gaur
Reviewed-by: Rob Herring
---
Changes for v5:
- None
Changes for v4:
- Incorporated Rob review comments.
Changes for v3:
- Removed node property 'big-endian'.
Changes for v2:
- Incorporated Rob review comments.
Add fspi node property for LX2160A SoC for FlexSPI driver.
Property added for the FlexSPI controller and for the connected
slave device for the LX2160ARDB target.
This is having two SPI-NOR flash device, mt35xu512aba, connected
at CS0 and CS1.
Signed-off-by: Yogesh Gaur
---
Changes for v5:
-
- Add driver for NXP FlexSPI host controller
FlexSPI is a flexsible SPI host controller [1], Chapter 30 page 1475,
which supports two SPI channels and up to 4 external devices.
Each channel supports Single/Dual/Quad/Octal mode data transfer (1/2/4/8
bidirectional data lines)
i.e. FlexSPI
Add maintainers for the NXP FlexSPI driver
Signed-off-by: Yogesh Gaur
---
Changes for v5:
- Add maintainers for binding file
Changes for v4:
- None
Changes for v3:
- None
Changes for v2:
- None
MAINTAINERS | 7 +++
1 file changed, 7 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
Hi Boris, Tudor,
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Wednesday, October 17, 2018 3:23 PM
> To: Yogesh Narayan Gaur
> Cc: Cyrille Pitchen ; Tudor Ambarus
> ; marek.va...@gmail.com;
> dw...@infradead.org; comput
HI,
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Monday, October 22, 2018 1:32 PM
> To: Yogesh Narayan Gaur
> Cc: Cyrille Pitchen ; Tudor Ambarus
> ; marek.va...@gmail.com;
> dw...@infradead.org; computersforpe...@gmai
Hi,
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Monday, October 22, 2018 2:46 PM
> To: Yogesh Narayan Gaur
> Cc: Tudor Ambarus ; rich...@nod.at; Mark
> Brown ; linux-kernel@vger.kernel.org;
> nicolas.fe...@mi
Hi,
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Monday, October 22, 2018 3:41 PM
> To: Yogesh Narayan Gaur
> Cc: Tudor Ambarus ; rich...@nod.at; Mark
> Brown ; linux-kernel@vger.kernel.org;
> nicolas.fe...@microchip.com;
Hi,
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Monday, October 22, 2018 3:57 PM
> To: Yogesh Narayan Gaur
> Cc: Tudor Ambarus ; rich...@nod.at; Mark
> Brown ; linux-kernel@vger.kernel.org;
> nicolas.fe...@microchip.com;
Hi,
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Monday, October 22, 2018 4:23 PM
> To: Yogesh Narayan Gaur ;
> cristian.bir...@microchip.com
> Cc: Tudor Ambarus ; rich...@nod.at; Mark
> Brown ; linux-kernel@vger.ker
+ Mark Brown
Complete patch series[1]
[1] https://patchwork.ozlabs.org/project/linux-mtd/list/?series=70210
--
Regards,
Yogesh Gaur
> -Original Message-
> From: Yogesh Narayan Gaur [mailto:yogeshnarayan.g...@nxp.com]
> Sent: Thursday, October 11, 2018 4:30 PM
&g
Hi,
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Monday, October 22, 2018 5:13 PM
> To: Yogesh Narayan Gaur
> Cc: cristian.bir...@microchip.com; Tudor Ambarus
> ; rich...@nod.at; Mark Brown
> ; linux-kernel@vger.ker
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Monday, October 22, 2018 5:20 PM
> To: Yogesh Narayan Gaur
> Cc: linux-...@lists.infradead.org; marek.va...@gmail.com; linux-
> s...@vger.kernel.org; devicet...@vger.kernel.org
Hi,
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Monday, October 22, 2018 5:22 PM
> To: Yogesh Narayan Gaur
> Cc: cristian.bir...@microchip.com; Tudor Ambarus
> ; rich...@nod.at; Mark Brown
> ; linux-kernel@vger.ker
HI,
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Tuesday, October 23, 2018 11:10 AM
> To: Yogesh Narayan Gaur
> Cc: cristian.bir...@microchip.com; Tudor Ambarus
> ; rich...@nod.at; Mark Brown
> ; linux-kernel@vger.ker
- Add driver for NXP FlexSPI host controller
FlexSPI is a flexsible SPI host controller [1], Chapter 30 page 1475,
which supports two SPI channels and up to 4 external devices.
Each channel supports Single/Dual/Quad/Octal mode data transfer (1/2/4/8
bidirectional data lines)
i.e. FlexSPI
Add binding file for NXP FlexSPI controller
Signed-off-by: Yogesh Gaur
Reviewed-by: Rob Herring
---
Changes for v4:
- Incorporated Rob review comments.
Changes for v3:
- Removed node property 'big-endian'.
Changes for v2:
- Incorporated Rob review comments.
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