On 4/19/21 3:57 PM, Arnd Bergmann wrote:
On Thu, Apr 15, 2021 at 2:23 PM Alexandre TORGUE
wrote:
On 4/15/21 12:43 PM, Ahmad Fatoum wrote:
On 15.04.21 12:10, Alexandre Torgue wrote:
Running "make dtbs_check W=1", some warnings are reported concerning
DSI. This patch reorder DS
On 4/15/21 4:30 PM, Marek Vasut wrote:
On 4/15/21 3:34 PM, Alexandre TORGUE wrote:
Hi Marek
Hello Alexandre,
diff --git a/arch/arm/boot/dts/stm32mp157c-dk2.dts
b/arch/arm/boot/dts/stm32mp157c-dk2.dts
index 2bc92ef3aeb9..19ef475a48fc 100644
--- a/arch/arm/boot/dts/stm32mp157c-dk2.dts
Hi Marek
On 4/15/21 3:21 PM, Marek Vasut wrote:
On 4/15/21 12:10 PM, Alexandre Torgue wrote:
Running "make dtbs_check W=1", some warnings are reported concerning
LTDC port subnode:
/soc/display-controller@5a001000/port:
unnecessary #address-cells/#size-cells without "ranges
Hi Ahmad
On 4/15/21 12:43 PM, Ahmad Fatoum wrote:
Hi,
On 15.04.21 12:10, Alexandre Torgue wrote:
Running "make dtbs_check W=1", some warnings are reported concerning
DSI. This patch reorder DSI nodes to avoid:
soc/dsi@5a00: unnecessary #address-cells/#size-cells without
"r
Hi Ahmad
On 4/15/21 12:51 PM, Ahmad Fatoum wrote:
Hi,
On 15.04.21 12:10, Alexandre Torgue wrote:
Add vref_ddr-supply to the STPMIC1 regulators supplies pattern
list.
Signed-off-by: Alexandre Torgue
diff --git a/Documentation/devicetree/bindings/mfd/st,stpmic1.yaml
b/Documentation
as single child node
'endpoint', #address-cells/#size-cells are not necessary
Signed-off-by: Alexandre Torgue
diff --git a/arch/arm/boot/dts/stm32f469-disco.dts
b/arch/arm/boot/dts/stm32f469-disco.dts
index 8c982ae79f43..f530f84474ea 100644
--- a/arch/arm/boot/dts/stm32f469-disco.dts
+++
Fix following warning observed with "make dtbs_check W=1" command.
It concerns f429 eval and disco boards, f769 disco board.
Warning (unit_address_vs_reg): /gpio_keys/button@0: node has a unit name,
but no reg or ranges property
Signed-off-by: Alexandre Torgue
diff --git a/arch/ar
It prevents the following warning:
pin-controller@50002000: 'ltdc' does not match any of the regexes:
'-[0-9]*$', '^gpio@[0-9a-f]*$', 'pinctrl-[0-9]+'
Signed-off-by: Alexandre Torgue
diff --git
a/arch/arm/boot/dts/stm32mp157a-microgea-stm32mp1-
-LDO4 has a fixed voltage (3v3) so min/max entries are not allowed.
Signed-off-by: Alexandre Torgue
diff --git a/arch/arm/boot/dts/stm32mp157a-stinger96.dtsi
b/arch/arm/boot/dts/stm32mp157a-stinger96.dtsi
index 113c48b2ef93..a4b14ef3caee 100644
--- a/arch/arm/boot/dts/stm32mp157a-stinger9
27;eth-ck', 'ptp_ref', 'ethstp'] is too long
Signed-off-by: Alexandre Torgue
diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml
b/Documentation/devicetree/bindings/net/snps,dwmac.yaml
index 0642b0f59491..0201a879399f 100644
--- a/Documentation/devicetree
Running "make dtbs_check W=1", some warnings are reported concerning
DSI. This patch reorder DSI nodes to avoid:
soc/dsi@5a00: unnecessary #address-cells/#size-cells without
"ranges" or child "reg" property
Signed-off-by: Alexandre Torgue
diff --git a/arch/a
Add vref_ddr-supply to the STPMIC1 regulators supplies pattern
list.
Signed-off-by: Alexandre Torgue
diff --git a/Documentation/devicetree/bindings/mfd/st,stpmic1.yaml
b/Documentation/devicetree/bindings/mfd/st,stpmic1.yaml
index 305123e74a58..ffc32d209496 100644
--- a/Documentation/devicetree
It fixes the following warning seen running "make dtbs_check W=1"
Warning (simple_bus_reg): /soc/stmmac-axi-config: missing or empty
reg/ranges property
Signed-off-by: Alexandre Torgue
diff --git a/arch/arm/boot/dts/stm32mp151.dtsi
b/arch/arm/boot/dts/stm32mp151.dtsi
index fb
Update node name to avoid a DT schema validation issue seen with
"make dtbs_check W=1". It also cleans picntrl dtsi files for f429/f469 MCU.
Signed-off-by: Alexandre Torgue
diff --git a/arch/arm/boot/dts/stm32f4-pinctrl.dtsi
b/arch/arm/boot/dts/stm32f4-pinctrl.dtsi
index 47
address-cells and size-cells can't be declared as "required" properties
as they are not needed if subnodes don't have a "reg" entry.
Signed-off-by: Alexandre Torgue
diff --git a/Documentation/devicetree/bindings/mfd/st,stm32-timers.yaml
b/Documentation/de
Prevent warning seen with "make dtbs_check W=1" command:
Warning (avoid_unnecessary_addr_size): /soc/timers@40001c00: unnecessary
address-cells/size-cells without "ranges" or child "reg" property
Signed-off-by: Alexandre Torgue
diff --git a/arch/arm/boot/dts/stm3
Replace upper case by lower case in i2c nodes name.
Signed-off-by: Alexandre Torgue
diff --git a/arch/arm/boot/dts/stm32f746.dtsi b/arch/arm/boot/dts/stm32f746.dtsi
index 72c1b76684b6..014b416f57e6 100644
--- a/arch/arm/boot/dts/stm32f746.dtsi
+++ b/arch/arm/boot/dts/stm32f746.dtsi
@@ -360,9
s but some imply a change in yaml
dt-bindings file.
regards
Alex
Alexandre Torgue (13):
ARM: dts: stm32: fix gpio-keys node on STM32 MCU boards
ARM: dts: stm32: fix RCC node name on stm32f429 MCU
ARM: dts: stm32: fix timer nodes on STM32 MCU to prevent warnings
dt-bindings: mfd: stm32-time
This prevent warning observed with "make dtbs_check W=1"
Warning (simple_bus_reg): /soc/rcc@40023810: simple-bus unit address format
error, expected "40023800"
Signed-off-by: Alexandre Torgue
diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dts
Hi Dillon
On 3/31/21 10:28 AM, dillon.min...@gmail.com wrote:
From: dillon min
This patchset intend to add art-pi board support, this board developed
by rt-thread(https://www.rt-thread.org/).
Board resources:
8MiB QSPI flash
16MiB SPI flash
32MiB SDRAM
AP6212 wifi,bt,fm comb
sw context:
- as
Hi Dillon
On 3/31/21 12:43 AM, dillon min wrote:
Hi Alexandre,
Thanks for the quick response.
On Wed, Mar 31, 2021 at 12:50 AM Alexandre TORGUE
wrote:
On 3/30/21 10:58 AM, dillon.min...@gmail.com wrote:
From: dillon min
This patchset has following changes:
- introduce stm32h750.dtsi
On 3/30/21 10:58 AM, dillon.min...@gmail.com wrote:
From: dillon min
This patchset has following changes:
- introduce stm32h750.dtsi to support stm32h750 value line
- add stm32h750i-art-pi.dtb (arch/arm/boot/dts/Makefile)
- add stm32h750-art-pi.dts to support art-pi board
art-pi board comp
delete mode 100644 arch/arm/boot/dts/stm32h743-pinctrl.dtsi
diff --git a/arch/arm/boot/dts/stm32h7-pinctrl.dtsi
b/arch/arm/boot/dts/stm32h7-pinctrl.dtsi
new file mode 100644
index ..a5c295eca081
--- /dev/null
+++ b/arch/arm/boot/dts/stm32h7-pinctrl.dtsi
@@ -0,0 +1,341 @@
+/*
+ * Copyr
Hi Dillon
On 3/30/21 4:28 AM, dillon.min...@gmail.com wrote:
From: dillon min
This patchset has following changes:
- introduce stm32h750.dtsi to support stm32h750 value line
- add stm32h750i-art-pi.dtb (arch/arm/boot/dts/Makefile)
- add dts binding usart3 for bt, uart4 for console
usart3/u
te mode 100644 arch/arm/boot/dts/stm32h7-pinctrl.dtsi
diff --git a/arch/arm/boot/dts/stm32h7-pinctrl.dtsi
b/arch/arm/boot/dts/stm32h7-pinctrl.dtsi
new file mode 100644
index ..a5c295eca081
--- /dev/null
+++ b/arch/arm/boot/dts/stm32h7-pinctrl.dtsi
@@ -0,0 +1,341 @@
+/*
+ * Copyright 201
On 3/29/21 10:07 AM, dillon min wrote:
On Mon, Mar 29, 2021 at 4:00 PM Alexandre TORGUE
wrote:
Hi Dillon
On 3/12/21 7:24 AM, dillon.min...@gmail.com wrote:
From: dillon min
This patch adds STM32H750 pinctrl and GPIO support
since stm32h750 has the same pin alternate functions
with
Hi Alain
On 2/10/21 9:39 AM, Pierre Yves MORDRET wrote:
Hello
Looks good to me
Reviewed-by: Pierre-Yves MORDRET
Thx
Regards
Applied on stm32-next.
Thanks.
Alex
On 2/5/21 9:51 AM, Alain Volmat wrote:
Enable the analog filter for all I2C nodes of the stm32mp151.
Signed-off-by: Alain V
Hi Dillon
On 3/12/21 7:24 AM, dillon.min...@gmail.com wrote:
From: dillon min
This patch adds STM32H750 pinctrl and GPIO support
since stm32h750 has the same pin alternate functions
with stm32h743, so just reuse the stm32h743's pinctrl
driver
Signed-off-by: dillon min
---
v2:
- add compatibl
Hi Dillon
On 3/19/21 5:28 AM, dillon min wrote:
No changes, Just loop lkp in.
Hi lkp,
Sorry for the late reply, thanks for your report.
This patch is to fix the build warning message.
Thanks.
Regards
On Mon, Mar 15, 2021 at 5:45 PM wrote:
From: dillon min
when run make dtbs_check with
Hi Wolfram
On 3/18/21 11:55 AM, Wolfram Sang wrote:
On Fri, Feb 05, 2021 at 09:51:43AM +0100, Alain Volmat wrote:
Enable the analog filter for all I2C nodes of the stm32mp151.
Signed-off-by: Alain Volmat
I usually don't take DTS patches, but they can go in now via arm-soc as
I applied the p
On 3/11/21 3:32 PM, dillon min wrote:
Hi Alexandre
On Thu, Mar 11, 2021 at 9:30 PM Alexandre TORGUE
wrote:
Hi Dillon
On 3/11/21 1:23 PM, dillon min wrote:
Hi Alexandre
On Thu, Mar 11, 2021 at 6:40 PM Alexandre TORGUE
wrote:
Hi Dillon
On 3/3/21 9:05 AM, dillon.min...@gmail.com wrote
On 3/11/21 1:32 PM, dillon min wrote:
Hi Alexandre
On Thu, Mar 11, 2021 at 6:42 PM Alexandre TORGUE
wrote:
On 3/3/21 9:05 AM, dillon.min...@gmail.com wrote:
From: dillon min
This patchset has following changes:
- add stm32h750i-art-pi.dtb
- add dts binding usart3 for bt, uart4 for
Hi Dillon
On 3/11/21 1:23 PM, dillon min wrote:
Hi Alexandre
On Thu, Mar 11, 2021 at 6:40 PM Alexandre TORGUE
wrote:
Hi Dillon
On 3/3/21 9:05 AM, dillon.min...@gmail.com wrote:
From: dillon min
To support stm32h750 and stm32h743, we need a base stm32h7-pinctrl.dtsi
as stm32h743 &
Hi Valentin
On 2/11/21 12:07 PM, Valentin CARON - foss wrote:
Modify usart 2 & 3 pins to allow wake up from low power mode while the
hardware flow control is activated. UART RTS pin need to stay configure
in idle mode to receive characters in order to wake up.
Fixes: 842ed898a757 ("ARM: dts: st
Hi Jagan
> -Original Message-
> From: Jagan Teki
> Sent: dimanche 28 février 2021 16:43
> To: Maxime Coquelin ; Alexandre TORGUE
> ; Rob Herring
> Cc: devicet...@vger.kernel.org; linux-stm32@st-md-
> mailman.stormreply.com; linux-arm-ker...@lists.infrad
Hi Dillon
On 3/3/21 9:05 AM, dillon.min...@gmail.com wrote:
From: dillon min
No empty commit message please
Signed-off-by: dillon min
---
arch/arm/mach-stm32/board-dt.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-stm32/board-dt.c b/arch/arm/mach-stm32/board-dt.c
i
On 3/3/21 9:05 AM, dillon.min...@gmail.com wrote:
From: dillon min
This patchset has following changes:
- add stm32h750i-art-pi.dtb
- add dts binding usart3 for bt, uart4 for console
- add dts binding sdmmc2 for wifi
- add stm32h750-art-pi.dts to support art-pi board
board component:
- 8Mi
/* SPI1_MOSI */
+ bias-disable;
+ drive-push-pull;
+ slew-rate = <2>;
+ };
+ pins2 {
+
Hi Dillon
> -Original Message-
> From: dillon min
> Sent: mercredi 10 mars 2021 12:48
> To: Rob Herring ; Maxime Coquelin
> ; Alexandre TORGUE
> ; open list:OPEN FIRMWARE AND FLATTENED
> DEVICE TREE BINDINGS ; linux-stm32@st-md-
> mailman.stormr
Hi Jagan
On 2/26/21 8:02 AM, Jagan Teki wrote:
MicroGEA STM32MP1 is an EDIMM SoM based on STM32MP157A from Engicam.
General features:
- STM32MP157AAC
- Up to 1GB DDR3L-800
- 512MB Nand flash
- I2S
MicroGEA STM32MP1 needs to mount on top of Engicam MicroDev carrier
boards for creating complete
Hi Jagan
On 2/24/21 7:05 PM, Jagan Teki wrote:
On Mon, Jan 25, 2021 at 8:35 PM Alexandre TORGUE
wrote:
Hi,
On 12/23/20 8:13 PM, Jagan Teki wrote:
MicroGEA STM32MP1 is an EDIMM SoM based on STM32MP157A from Engicam.
General features:
- STM32MP157AAC
- Up to 1GB DDR3L-800
- 512MB Nand flash
d
schema, it is simpler as a whole to only define scalar constraints.
Cc: Jean Delvare
Cc: Guenter Roeck
Cc: Jonathan Cameron
Cc: Lars-Peter Clausen
Cc: Alexandre Torgue
Cc: Dmitry Torokhov
Cc: Ulf Hansson
Cc: "David S. Miller"
Cc: Jakub Kicinski
Cc: Sebastian Reichel
Cc: Mark Brown
Hi Amélie,
On 1/14/21 2:15 PM, Amelie Delaunay wrote:
This series updates usbphyc parent and child nodes to follow latest DT
bindings.
---
Changes in v2:
- squash all DT board patches in one patch
- update also non-ST DT
Amelie Delaunay (3):
ARM: dts: stm32: add usbphyc vdda1v1 and vdda1v8
Hi,
On 12/23/20 12:07 PM, Jagan Teki wrote:
Add SDA/SCL pinmux lines for I2C6 on STM32MP1.
This support adds both in default and sleep states.
Signed-off-by: Jagan Teki
---
arch/arm/boot/dts/stm32mp15-pinctrl.dtsi | 17 +
1 file changed, 17 insertions(+)
diff --git a/arch/
On 1/25/21 4:05 PM, Alexandre TORGUE wrote:
Hi,
On 12/23/20 8:13 PM, Jagan Teki wrote:
MicroGEA STM32MP1 is an EDIMM SoM based on STM32MP157A from Engicam.
General features:
- STM32MP157AAC
- Up to 1GB DDR3L-800
- 512MB Nand flash
- I2S
MicroGEA STM32MP1 needs to mount on top of Engicam
Hi,
On 12/23/20 8:13 PM, Jagan Teki wrote:
MicroGEA STM32MP1 is an EDIMM SoM based on STM32MP157A from Engicam.
General features:
- STM32MP157AAC
- Up to 1GB DDR3L-800
- 512MB Nand flash
- I2S
MicroGEA STM32MP1 needs to mount on top of Engicam MicroDev carrier
boards for creating complete plat
Hi Yannick
On 1/15/21 3:32 PM, Yannick Fertre wrote:
Enable CEC support for STMicroelectronics as loadable module.
Signed-off-by: Yannick Fertre
---
arch/arm/configs/multi_v7_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/multi_v7_defconfig
b/arch/arm/config
Hi Alexander
On 12/28/20 5:32 PM, Alexander Dahl wrote:
The node names for devices using the pwm-leds driver follow a certain
naming scheme (now). Parent node name is not enforced, but recommended
by DT project.
DTC arch/arm/boot/dts/stm32mp157c-lxa-mc1.dt.yaml
CHECK arch/arm/boot/
Hi Serge,
Sorry I never used GPIO provided by DWMAC IP. Obviously, I think is to
late for you to use GPIOs provided by your SoC directly. Unfortunately,
it seems to be a "perfect" chicken and eggs problem :(.
Do you have possibilty to "play" with gpio setting. I mean change
configuration of
On 11/26/20 2:38 PM, Olivier MOYSAN wrote:
Hi Alex
On 11/26/20 12:25 PM, Alexandre Torgue wrote:
Hi Olivier
On 11/20/20 10:15 AM, Olivier Moysan wrote:
Add STM32 SPDIFRX and DFSDM audio support to multi_v7_defconfig
Change in v2:
- Add targeted SoC in commit message for DFSDM config
Hi Olivier
On 11/20/20 10:15 AM, Olivier Moysan wrote:
Add STM32 SPDIFRX and DFSDM audio support to multi_v7_defconfig
Change in v2:
- Add targeted SoC in commit message for DFSDM config
Olivier Moysan (2):
ARM: multi_v7_defconfig: enable spdifrx support
ARM: multi_v7_defconfig: enable d
Hi Manuel
On 11/24/20 1:50 PM, Manuel Reis wrote:
To: Maxime Coquelin
To: Alexandre Torgue
Cc: linux-kernel@vger.kernel.org
CC: Michael Opdenacker
Hi there,
Mainline stable kernel 5.9.10 hangs indefinitely on a STM32MP157A-DK1
Discovery Kit board.
Built plain vanilla
Hi Ahmad
On 11/10/20 11:25 AM, Ahmad Fatoum wrote:
Earlier commit modified the binding, so the SiP is to be specified
as well. Adjust the device tree accordingly.
Signed-off-by: Ahmad Fatoum
---
v1 -> v2:
- split up binding and device tree change
---
arch/arm/boot/dts/stm32mp157c-lxa-mc1.
Hi Arnaud
On 10/14/20 2:54 PM, Arnaud Pouliquen wrote:
This series implements the DT part associated to the commit 9276536f455b3
("remoteproc: stm32: Parse syscon that will manage M4 synchronisation")
Delta vs V1 [1]
- add Rob acked-by on patch 1/4
- simplify yaml descriptions and align other s
Hi Ahmad
On 10/21/20 12:28 PM, Ahmad Fatoum wrote:
The stm32mp1 TAMP peripheral has 32 backup registers that survive
a warm reset. This makes them suitable for storing a reboot
mode, which the vendor's kernel tree is already doing[0].
The actual syscon-reboot-mode child node can be added by a b
Hi Amélie
On 11/10/20 2:10 PM, Amelie Delaunay wrote:
Defaut use case on stm32mp151 USB OTG is ethernet gadget, using EP1 bulk
endpoint (MPS=512 bytes) and EP2 interrupt endpoint (MPS=16 bytes).
This patch optimizes USB OTG FIFO sizes accordingly.
Signed-off-by: Amelie Delaunay
---
arch/arm/
Hi,
On 11/10/20 3:27 PM, Amelie Delaunay wrote:
Reg property length should cover all DMAMUX_CxCR registers.
DMAMUX_CxCR Address offset: 0x000 + 0x04 * x (x = 0 to 15), so latest
offset is at 0x3c, so length should be 0x40.
Signed-off-by: Amelie Delaunay
---
arch/arm/boot/dts/stm32h743.dtsi |
Hi,
On 11/10/20 3:36 PM, Amelie Delaunay wrote:
Update mdma1 clients channel priority level following stm32-mdma bindings.
Signed-off-by: Amelie Delaunay
---
arch/arm/boot/dts/stm32mp151.dtsi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/stm32mp
Hi,
On 11/6/20 5:58 PM, Amelie Delaunay wrote:
This series adds missing bindings for Type-C typec-power-opmode property
and STUSB160x Type-C port controllers [1].
STUSB160x driver requires to get power operation mode via device tree,
that's why this series also adds the optional DT property
type
Hi Patrick
On 10/22/20 7:38 PM, Patrick Delaunay wrote:
Move spi4 at the right alphabetical place within stm32mp15-pinctrl
Fixes: 4fe663890ac5 ("ARM: dts: stm32: Fix spi4 pins in stm32mp15-pinctrl")
Signed-off-by: Patrick Delaunay
---
arch/arm/boot/dts/stm32mp15-pinctrl.dtsi | 28 ++
Hi Hugues
On 11/4/20 6:32 PM, Hugues Fruchet wrote:
Add support of BT656 embedded synchronization bus.
This mode allows to save hardware synchro lines hsync & vsync
by replacing them with synchro codes embedded in data stream.
Add "bus-type" property and make it required so that there is no
ambi
Hi Lionel
On 11/5/20 10:47 AM, Lionel Debieve wrote:
Enable crypto controllers enabling following flags as module:
CONFIG_CRYPTO_DEV_STM32_CRC
CONFIG_CRYPTO_DEV_STM32_HASH
CONFIG_CRYPTO_DEV_STM32_CRYP
Signed-off-by: Lionel Debieve
---
arch/arm/configs/multi_v7_defconfig | 3 +++
1 file chan
Hi Lionel
On 11/5/20 11:23 AM, Lionel Debieve wrote:
Enable the crypto controllers in the STM32MP157C-EV1 and STM32MP157A-DK1
STM32MP157C-DK2 boards.
Lionel Debieve (2):
ARM: dts: stm32: enable HASH by default on stm32mp15
ARM: dts: stm32: enable CRYP by default on stm32mp15
Nicolas Toro
Hi Alex
On 10/31/20 2:54 PM, Alexander Dahl wrote:
Hei hei,
On Tue, Oct 27, 2020 at 11:58:10AM +0100, Ahmad Fatoum wrote:
Hello,
On 10/27/20 11:05 AM, Alexander Dahl wrote:
Hello Ahmad,
thanks for your feedback, comments below.
- led-rgb {
+ led-controller-2 {
Is a single
Hi Fabrice
On 10/16/20 4:40 PM, Fabrice Gasnier wrote:
STM32 LP timer that's available on STM32MP15x can wakeup the platform
using EXTI interrupts.
This series add:
- LP timer EXTI - GIC interrupt events to EXTI driver and device-tree
- LP timer wakeup-source to device-tree
Fabrice Gasnier (3)
Hi Ahmad
On 10/20/20 4:04 PM, Ahmad Fatoum wrote:
From: Yann Gautier
Update the IP version to v2.0, which supports linked lists in internal DMA,
and is present in STM32MP1 SoCs.
The mmci driver supports the v2.0 periph id since 7a2a98be672b ("mmc: mmci:
Add support for sdmmc variant revision
Hi Serge
On 10/20/20 2:36 PM, Krzysztof Kozlowski wrote:
On Tue, Oct 20, 2020 at 02:59:38PM +0300, Serge Semin wrote:
In accordance with the Generic EHCI/OHCI bindings the corresponding node
name is suppose to comply with the Generic USB HCD DT schema, which
requires the USB nodes to have the n
Hi fabrice
On 10/16/20 10:00 AM, Fabrice Gasnier wrote:
This enables the counter subsystem and drivers for the stm32 timer and LP
timer.
Signed-off-by: Fabrice Gasnier
---
arch/arm/configs/multi_v7_defconfig | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/configs/multi_v7_de
Hi Hugues
On 10/8/20 11:09 AM, Hugues Fruchet wrote:
Enable FIFO mode with half-full threshold.
Signed-off-by: Hugues Fruchet
---
arch/arm/boot/dts/stm32mp151.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/stm32mp151.dtsi
b/arch/arm/boot/dts/stm3
Hi Sakari
On 11/6/20 12:53 PM, Sakari Ailus wrote:
Hi Alexandre,
On Thu, Nov 05, 2020 at 10:26:37AM +0100, Alexandre Torgue wrote:
Hi Huges
On 11/4/20 6:32 PM, Hugues Fruchet wrote:
Add support of BT656 embedded synchronization bus.
This mode allows to save hardware synchro lines hsync
Hi Huges
On 11/4/20 6:32 PM, Hugues Fruchet wrote:
Add support of BT656 embedded synchronization bus.
This mode allows to save hardware synchro lines hsync & vsync
by replacing them with synchro codes embedded in data stream.
Add "bus-type" property and make it required so that there is no
ambig
Hi Ahmad
On 11/4/20 11:28 AM, Ahmad Fatoum wrote:
Hello,
On 11/2/20 9:27 PM, Michał Mirosław wrote:
On Mon, Nov 02, 2020 at 01:48:54PM +0100, Ahmad Fatoum wrote:
Hello Michał,
CC += linux-stm32
On 10/24/20 1:53 PM, Michał Mirosław wrote:
On Fri, Oct 23, 2020 at 10:39:43PM +0200, Corentin L
Hi Serge,
On 10/14/20 12:14 PM, Serge Semin wrote:
In accordance with the Generic EHCI/OHCI bindings the corresponding node
name is suppose to comply with the Generic USB HCD DT schema, which
requires the USB nodes to have the name acceptable by the regexp:
"^usb(@.*)?" . Let's fix the DTS files
Hi
On 8/28/20 3:00 PM, Holger Assmann wrote:
From: Ahmad Fatoum
The "eMMC high-speed DDR mode (3.3V I/O)" at 50MHz is supported on
the eMMC-interface of the lxa-mc1. Set it in the device tree to
benefit from the speed improvement.
Signed-off-by: Ahmad Fatoum
Signed-off-by: Holger Assmann
--
Hi Christophe,
On 9/4/20 3:20 PM, Christophe Kerello wrote:
This patchset enables FMC2 EBI support on STM32MP1 SOCs.
Christophe Kerello (2):
ARM: multi_v7_defconfig: add FMC2 EBI controller support
ARM: dts: stm32: add FMC2 EBI support for stm32mp157c
arch/arm/boot/dts/stm32mp151.dtsi
Hi Tobias
On 8/15/20 12:50 AM, Tobias Schramm wrote:
The stm32h743 has a display controller. This commit adds it to the
device tree.
Signed-off-by: Tobias Schramm
---
arch/arm/boot/dts/stm32h743.dtsi | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/stm32h743
Hi Tobias
On 8/15/20 12:35 AM, Tobias Schramm wrote:
The stm32 spi driver tries to determine the fifo size of spi devices
dynamically. However, if the spi was already configured by the bootloader
the fifo size check can become an endless loop, because the driver
expects the spi to be in its init
Hi Tobias
On 8/14/20 8:11 PM, Tobias Schramm wrote:
Previously the FIFO on the stm32h743 usart was not utilized, because
the stm32f7 compatible configures it without FIFO support.
Signed-off-by: Tobias Schramm
---
arch/arm/boot/dts/stm32h743.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2
Hi Marcin,
On 8/9/20 6:44 PM, Marcin Sloniewski wrote:
Add support for Seeed Studio's stm32mp157c odyssey board.
Board consists of SoM with stm32mp157c with 4GB eMMC and 512 MB DDR3 RAM
and carrier board with USB and ETH interfaces, SD card connector,
wifi and BT chip AP6236.
In this patch only
Hi Holger
On 8/7/20 5:03 PM, Holger Assmann wrote:
The KSZ9031 PHY skew timings for rxc/txc, originally set to achieve
the desired phase shift between clock- and data-signal, now trigger a
kernel warning when used in rgmii-id mode:
*-skew-ps values should be used only with phy-mode = "rgmii"
Hi Alexander
On 7/22/20 9:20 PM, Alexander A. Klimov wrote:
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.
Deterministic algorithm:
For each file:
If not .svg:
For each line:
If doesn't contain `\bxmlns\b
...
+
+&sdmmc2_d47_pins_a {
+ pins {
+ pinmux = , /* SDMMC2_D4 */
+, /* SDMMC2_D5 */
+, /* SDMMC2_D6 */
+; /* SDMMC2_D7 */
+ };
+};
+
+&sdmmc2_d47_sleep_pins_a {
+ pins {
+ pin
On 7/23/20 3:20 PM, Linus Walleij wrote:
On Mon, Jun 15, 2020 at 2:44 PM Alexandre Torgue
wrote:
From: Fabien Dessenne
Use the hwspin_lock_timeout_in_atomic() API which is the most appropriated
here. Indeed:
- hwspin_lock_() is called after spin_lock_irqsave()
- the hwspin_lock_timeout
On 7/21/20 7:49 PM, Alexander A. Klimov wrote:
Am 21.07.20 um 10:49 schrieb Alexandre Torgue:
Hi Alexander
On 7/19/20 11:49 AM, Alexander A. Klimov wrote:
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate
Hi Marcin
On 7/21/20 5:20 PM, Marcin Sloniewski wrote:
Add support for Seeed Studio's stm32mp157c odyssey board.
Board consists of SoM with stm32mp157c with 4GB eMMC and 512 MB DDR3 RAM
and carrier board with USB and ETH interfaces, SD card connector,
wifi and BT chip AP6236.
In this patch only
On 7/21/20 2:55 PM, dillon min wrote:
Hi, Alexandre,
On Tue, Jul 21, 2020 at 7:54 PM Alexandre Torgue
wrote:
On 7/21/20 12:39 PM, dillon min wrote:
Hi Alexandre,
On Tue, Jul 21, 2020 at 5:19 PM Alexandre Torgue
wrote:
Hi Dillon
On 5/25/20 5:40 AM, dillon.min...@gmail.com wrote
On 7/21/20 12:39 PM, dillon min wrote:
Hi Alexandre,
On Tue, Jul 21, 2020 at 5:19 PM Alexandre Torgue
wrote:
Hi Dillon
On 5/25/20 5:40 AM, dillon.min...@gmail.com wrote:
From: dillon min
V5's update based on Mark Brown's suggestion, use 'SPI_MASTER_MUST_RX'
for SP
Hi Marcin,
On 7/6/20 7:33 PM, Marcin Sloniewski wrote:
Add support for Seeed Studio's stm32mp157c odyssey board.
Board consists of SoM with stm32mp157c with 4GB eMMC and 512 MB DDR3 RAM
and carrier board with USB and ETH interfaces, SD card connector,
wifi and BT chip AP6236.
In this patch only
Hi Dillon
On 5/25/20 5:40 AM, dillon.min...@gmail.com wrote:
From: dillon min
V5's update based on Mark Brown's suggestion, use 'SPI_MASTER_MUST_RX'
for SPI_SIMPLEX_RX mode on stm32 spi controller.
V5:
1 instead of add send dummy data out under SIMPLEX_RX mode,
add flags 'SPI_CONTROLLER_M
Hi Adrian
On 7/2/20 7:27 PM, Adrian Pop wrote:
STM32f769-disco features a 4" MIPI DSI display: add support for it.
On Cortex-M7 DMA can't use cached memory. For this reason I use a dedicated
memory pool for DMA with no-cache attribute which is located at the end of
RAM.
Signed-off-by: Adrian
Hi Amélie
On 6/16/20 4:07 PM, Amelie Delaunay wrote:
When using usb-c connector (but it can also be the case with a micro-b
connector), iddig, avalid, bvalid, vbusvalid input signals may not be
connected to the DWC2 OTG controller.
DWC2 OTG controller features an overriding control of the PHY vo
Hi Alexander
On 7/19/20 11:49 AM, Alexander A. Klimov wrote:
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.
Deterministic algorithm:
For each file:
If not .svg:
For each line:
If doesn't contain `\bxmlns\
Hi Benjamin
On 7/3/20 11:55 AM, Benjamin Gaignard wrote:
Since commit ad440432d1f9 ("dt-bindings: mfd: Ensure 'syscon' has a more specific
compatible")
it is required to provide at least 2 compatibles string for syscon node.
This series update the syscon of the STM32 SoCs to fix the reported er
Hi Patrick
On 7/8/20 1:43 PM, Patrick Delaunay wrote:
Move spi4_pins_a nodes from pinctrl_z to pinctrl
as the associated pins are not in BANK Z.
Fixes: 498a7014989dfdd9a47864b55704dc829ed0dc90
Signed-off-by: Patrick Delaunay
---
Applied on stm32-next by updating Fixes tag.
Thanks
Alex
Hi Alain
On 6/23/20 11:31 AM, Alain Volmat wrote:
From: Fabrice Gasnier
Configure I2C5 on stm32mp15 DK boards. It's available and can be used on:
- Arduino connector
- GPIO expansion connector
Keep it disabled by default, so the pins are kept in their initial state to
lower power consumption.
Hi Erwan
On 6/18/20 3:06 PM, Erwan Le Ray wrote:
Add the support of uart instances available on STM32MP157 boards:
- usart3 on stm32mp157c-ev1, stm32mp157a-dk1, and stm32mp157c-dk2
- uart7 on stm32mp157a-dk1 and stm32mp157c-dk2
- usart2 on stm32mp157c-dk2
Erwan Le Ray (5):
ARM: dts: stm32: a
Hi Patrick
On 6/16/20 5:33 PM, Patrick Delaunay wrote:
Use tabs where possible and remove multiple blanks lines.
Signed-off-by: Patrick Delaunay
---
arch/arm/boot/dts/stm32mp15-pinctrl.dtsi | 9 -
1 file changed, 4 insertions(+), 5 deletions(-)
Applied on stm32-next.
Thanks.
Al
ned-off-by: Alexandre Torgue
---
Changes since v1:
- Fix warning reported by test robot.
diff --git a/drivers/irqchip/irq-stm32-exti.c b/drivers/irqchip/irq-stm32-exti.c
index faa8482c8246..732b04a121b6 100644
--- a/drivers/irqchip/irq-stm32-exti.c
+++ b/drivers/irqchip/irq-stm32-exti.c
@@ -
On 7/17/20 2:37 PM, Marc Zyngier wrote:
On Fri, 10 Jul 2020 10:37:47 +0100,
Alexandre Torgue wrote:
Hi Marc,
On 7/10/20 11:31 AM, Marc Zyngier wrote:
Alexandre,
On Wed, 08 Jul 2020 05:57:24 +0100,
kernel test robot wrote:
[1 ]
Hi Alexandre,
I love your patch! Perhaps something to
next-20200707]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use as documented in
https://git-scm.com/docs/git-format-patch]
url:
https://github.com/0day-ci/linux/commits/Alexandre-Torgue/irqchip-stm32-exti-map-direct-event-to
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