Re: Memory performance / Cache problem

2009-10-15 Thread epsi
On Wednesday 14 October 2009 17:48:39 ext e...@gmx.de wrote: Mem clock is both times 166MHz. I don't know whether are differences in cycle access and timing, but memclock is fine. Following Siarhei hints of initialize the buffers (around 1.2 MByte each) I get different results in

RE: RE: Memory performance / Cache problem

2009-10-14 Thread Woodruff, Richard
There is no newer u-boot from TI available. There is a SDK 02.01.03.11 but it contains the same uboot 2008.10 with the only addition of the second generation of EVM boards with another network chip. So I checked the uboot from git, but this doesn't support Microns NAND Flash anymore. It is

Re: RE: RE: Memory performance / Cache problem

2009-10-14 Thread epsi
, Richard r-woodru...@ti.com An: e...@gmx.de e...@gmx.de, Premi, Sanjeev pr...@ti.com, linux-omap@vger.kernel.org linux-omap@vger.kernel.org Betreff: RE: RE: Memory performance / Cache problem There is no newer u-boot from TI available. There is a SDK 02.01.03.11 but it contains the same uboot

RE: RE: RE: Memory performance / Cache problem

2009-10-14 Thread Woodruff, Richard
From: e...@gmx.de [mailto:e...@gmx.de] Sent: Wednesday, October 14, 2009 9:49 AM To: Woodruff, Richard; linux-omap@vger.kernel.org; Premi, Sanjeev Subject: Re: RE: RE: Memory performance / Cache problem Mem clock is both times 166MHz. I don't know whether are differences in cycle access

Re: RE: RE: RE: Memory performance / Cache problem

2009-10-14 Thread epsi
Mem clock is both times 166MHz. I don't know whether are differences in cycle access and timing, but memclock is fine. How did you physically verify this? Oszi show 166MHz, also the kernel message about freq are in both kernels the same. Following Siarhei hints of initialize the

RE: RE: RE: RE: Memory performance / Cache problem

2009-10-14 Thread Woodruff, Richard
From: e...@gmx.de [mailto:e...@gmx.de] Sent: Wednesday, October 14, 2009 12:23 PM To: Woodruff, Richard; Premi, Sanjeev; linux-omap@vger.kernel.org Subject: Re: RE: RE: RE: Memory performance / Cache problem Yes aligned buffers can make a difference. But probably more so for small

Re: Memory performance / Cache problem

2009-10-14 Thread Siarhei Siamashka
On Wednesday 14 October 2009 17:48:39 ext e...@gmx.de wrote: Mem clock is both times 166MHz. I don't know whether are differences in cycle access and timing, but memclock is fine. Following Siarhei hints of initialize the buffers (around 1.2 MByte each) I get different results in 22kernel for

RE: Memory performance / Cache problem

2009-10-14 Thread Woodruff, Richard
From: Siarhei Siamashka [mailto:siarhei.siamas...@nokia.com] Sent: Wednesday, October 14, 2009 12:37 PM To: ext e...@gmx.de What you see is just a (fake) performance boost because you have a single physical page shared between all the virtual pages in the source buffer. So you get no cache

Re: RE: Memory performance / Cache problem

2009-10-13 Thread epsi
Can you upgrade to a newer u-boot? Either from the PSP release OR u-boot tree hosted at git.denx.de (atleast 2009.03)? Also, it will be good to see the sample program you are using. ~sanjeev There is no newer u-boot from TI available. There is a SDK 02.01.03.11 but it contains the

Re: Memory performance / Cache problem

2009-10-13 Thread epsi
The L2 cache is set and running. I don't know - can it be configured or misconfigured somehow? I just checked the output of 2.6.22 kernel and get these lines (which I don't have in newer kernels): CPU0: D VIPT write-through cache CPU0: cache: 768 bytes, associativity 1, 8 byte lines, 64 sets

RE: Memory performance / Cache problem

2009-10-12 Thread Dasgupta, Romit
Subject: Memory performance / Cache problem I found the memory performance of newer kernels are quit poor on an EVM- Omap3 board. It works with 2-6 times performance on the old 2.6.22 kernel from TI's PSP. Possible reasons: - problem in config the kernel (did omap3_evm_defconfig) - problem

Re: Memory performance / Cache problem

2009-10-12 Thread Siarhei Siamashka
On Monday 12 October 2009 10:54:09 ext e...@gmx.de wrote: I found the memory performance of newer kernels are quit poor on an EVM-Omap3 board. It works with 2-6 times performance on the old 2.6.22 kernel from TI's PSP. Possible reasons: - problem in config the kernel (did

RE: Memory performance / Cache problem

2009-10-12 Thread epsi
Linux version 2.6.31 (s...@localhost) (gcc version 4.3.3 (Sourcery G++ Lite 2009q1-203) ) #1 Mon Oct 12 08:30:58 CEST 2009 CPU: ARMv7 Processor [411fc082] revision 2 (ARMv7), cr=10c53c7f CPU: VIPT nonaliasing data cache, VIPT nonaliasing instruction cache Machine: OMAP3 EVM Memory policy: ECC

RE: Memory performance / Cache problem

2009-10-12 Thread Dasgupta, Romit
, October 12, 2009 2:08 PM To: linux-omap@vger.kernel.org Subject: RE: Memory performance / Cache problem Linux version 2.6.31 (s...@localhost) (gcc version 4.3.3 (Sourcery G++ Lite 2009q1- 203) ) #1 Mon Oct 12 08:30:58 CEST 2009 CPU: ARMv7 Processor [411fc082] revision 2 (ARMv7), cr=10c53c7f CPU: VIPT

RE: Memory performance / Cache problem

2009-10-12 Thread Premi, Sanjeev
-Original Message- From: linux-omap-ow...@vger.kernel.org [mailto:linux-omap-ow...@vger.kernel.org] On Behalf Of e...@gmx.de Sent: Monday, October 12, 2009 2:08 PM To: linux-omap@vger.kernel.org Subject: RE: Memory performance / Cache problem Linux version 2.6.31 (s...@localhost

RE: Memory performance / Cache problem

2009-10-12 Thread Dasgupta, Romit
; linux-omap@vger.kernel.org Subject: RE: Memory performance / Cache problem Please update to the latest HEAD on the linux-omap pm branch. In the gitweb it shows b7ecc865c5f0885fae4c4401fa78a24084f45c40 Thanks, -Romit -Original Message- From: linux-omap-ow...@vger.kernel.org