Hello Samuel,
On Thu, Jan 28, 2021 at 10:22:08AM +0100, Wolfram Sang wrote:
> On Sun, Jan 03, 2021 at 04:51:46AM -0600, Samuel Holland wrote:
> > To save power, gate the clock when the bus is inactive, during system
> > sleep, and during shutdown. On some platforms, specifically Allwinner
> >
Hello Roman,
On Tue, Sep 29, 2020 at 02:13:47PM +0300, Roman Stratiienko wrote:
> Fixes linux_kselftest:timers_inconsistency-check_arm_64
>
> Test logs without the fix:
> '''
> binary returned non-zero. Exit code: 1, stderr: , stdout:
> Consistent CLOCK_REALTIME
> 1601335525:467086804
>
Hello Maxime,
On Thu, Sep 17, 2020 at 03:19:04PM +0200, Maxime Ripard wrote:
> Hi,
>
> On Sat, Sep 12, 2020 at 01:22:00PM +0200, Ondrej Jirman wrote:
> > mfd: sun4i-gpadc: Interrupt numbers should start from 1
>
> Why? An hwirq with 0 is totally fine
>
> > This avoids a warning:
> >
> > [
On Tue, Sep 01, 2020 at 11:30:47PM +0300, Roman Stratiienko wrote:
> Fixes: e1ef9006663b ("drm/sun4i: Wire in DE2 YUV support")
> Signed-off-by: Roman Stratiienko
>
> ---
> CC: meg...@megous.com
> CC: jernej.skra...@gmail.com
> CC: linux-sunxi@googlegroups.com
> CC:
On Fri, Aug 28, 2020 at 02:35:26PM +0200, Jernej Škrabec wrote:
> Dne petek, 28. avgust 2020 ob 13:24:44 CEST je Ondrej Jirman napisal(a):
> > It's writing too much data. regmap_bulk_write expects number of
> > register sized chunks to write, not a byte sized length of the
> > bounce buffer.
On Fri, Aug 28, 2020 at 02:16:36PM +0200, Clément Péron wrote:
> Hi Maxime,
>
> On Tue, 25 Aug 2020 at 15:35, Maxime Ripard wrote:
> >
> > Hi Clement,
> >
> > On Mon, Aug 03, 2020 at 09:54:05AM +0200, Clément Péron wrote:
> > > Hi Maxime and All,
> > >
> > > On Sat, 4 Jul 2020 at 16:56, Clément
Hello Dmitry,
thanks for looking into the patch. :)
On Wed, Jul 29, 2020 at 11:19:39PM -0700, Dmitry Torokhov wrote:
> Hi Ondrej,
>
> On Tue, Jul 14, 2020 at 12:23:01PM +0200, Ondrej Jirman wrote:
> > Make enable-gpio optional to allow using this driver with boards that
> > have vibrator
Hi Maxime,
On Wed, Jul 08, 2020 at 03:57:48PM +0200, Maxime Ripard wrote:
> On Wed, Jul 08, 2020 at 03:44:41PM +0200, Ondřej Jirman wrote:
> > >
[...]
> > > Yeah, but on the other hand, we regularly have people that come up and
> > > ask if a "leg
On Wed, Jul 08, 2020 at 03:36:54PM +0200, Maxime Ripard wrote:
> On Wed, Jul 08, 2020 at 03:29:24PM +0200, Ondřej Jirman wrote:
> > Hello Maxime,
> >
> > On Wed, Jul 08, 2020 at 02:25:42PM +0200, Maxime Ripard wrote:
> > > Hi,
> > >
> > > On Wed,
On Wed, Jul 08, 2020 at 07:55:40PM +0800, Frank Lee wrote:
> HI Ondrej,
> On Wed, Jul 8, 2020 at 6:55 PM Ondrej Jirman wrote:
> >
> > I noticed several mobile Linux distributions failing to enable the
> > thermal regulation correctly, because the kernel is silent
> > when thermal driver fails to
Hello Maxime,
On Wed, Jul 08, 2020 at 02:25:42PM +0200, Maxime Ripard wrote:
> Hi,
>
> On Wed, Jul 08, 2020 at 12:55:27PM +0200, Ondrej Jirman wrote:
> > I noticed several mobile Linux distributions failing to enable the
> > thermal regulation correctly, because the kernel is silent
> > when
On Wed, Jul 08, 2020 at 07:55:40PM +0800, Frank Lee wrote:
> HI Ondrej,
> On Wed, Jul 8, 2020 at 6:55 PM Ondrej Jirman wrote:
> >
> > I noticed several mobile Linux distributions failing to enable the
> > thermal regulation correctly, because the kernel is silent
> > when thermal driver fails to
On Wed, Jul 08, 2020 at 12:03:01PM +0100, Russell King - ARM Linux admin wrote:
> On Wed, Jul 08, 2020 at 12:55:27PM +0200, Ondrej Jirman wrote:
> > I noticed several mobile Linux distributions failing to enable the
> > thermal regulation correctly, because the kernel is silent
> > when thermal
Hello Lukas,
On Sun, Jul 05, 2020 at 08:59:17AM +0200, Lukas Bulwahn wrote:
> Commit a74e81a56405 ("drm/panel: rocktech-jh057n00900: Rename the driver to
> st7703") and commit 7317f4574492 ("dt-bindings: panel: Convert
> rocktech,jh057n00900 to yaml") renamed and converted the files mentioned in
On Fri, Jul 03, 2020 at 12:44:48PM +0200, megous hlavni wrote:
> Hello Sam,
>
> On Fri, Jul 03, 2020 at 07:11:55AM +0200, Sam Ravnborg wrote:
> > Hi Ondrej.
> >
> > > > My bot found errors running 'make dt_binding_check' on your patch:
> > > >
> > > >
Hello Sam,
On Fri, Jul 03, 2020 at 07:11:55AM +0200, Sam Ravnborg wrote:
> Hi Ondrej.
>
> > > My bot found errors running 'make dt_binding_check' on your patch:
> > >
> > > /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/display/bridge/nwl-dsi.example.dt.yaml:
> > >
On Thu, Jul 02, 2020 at 02:51:43PM -0600, Rob Herring wrote:
> On Wed, 01 Jul 2020 18:29:17 +0200, Ondrej Jirman wrote:
> > Convert Rocktech MIPI DSI panel driver from txt to yaml bindings.
> >
> > Signed-off-by: Ondrej Jirman
> > ---
> > .../display/panel/rocktech,jh057n00900.txt| 23
Hi Icenowy,
On Wed, Jul 01, 2020 at 08:01:14PM +0800, Icenowy Zheng wrote:
>
>
> 于 2020年7月1日 GMT+08:00 下午6:31:26, Ondrej Jirman 写到:
> >Pinephone has a Goodix GT917S capacitive touchscreen controller on
> >I2C0 bus. Add support for it.
> >
> >Signed-off-by: Ondrej Jirman
> >Acked-by: Linus
Hello Sam,
On Wed, Jul 01, 2020 at 07:30:18PM +0200, Sam Ravnborg wrote:
> Hi Ondrej.
>
> On Wed, Jul 01, 2020 at 06:29:15PM +0200, Ondrej Jirman wrote:
> > This patchset adds support for the LCD panel of PinePhone.
> >
> > I've tested this on PinePhone 1.0 and 1.2.
>
> Thanks for this nive
Hello,
On Wed, Jul 01, 2020 at 05:54:05PM +0200, Guido Günther wrote:
> Hi,
> On Wed, Jul 01, 2020 at 12:31:13PM +0200, Ondrej Jirman wrote:
> > This patchset adds support for the LCD panel of PinePhone.
>
> I gave this a quick spin on the Librem5 devkit so
>
> Tested-by: Guido Günther
>
>
Hello Guido,
On Wed, Jul 01, 2020 at 05:58:57PM +0200, Guido Günther wrote:
> Hi Ondrej,
> On Wed, Jul 01, 2020 at 12:31:15PM +0200, Ondrej Jirman wrote:
> > Convert Rocktech MIPI DSI panel driver from txt to yaml bindings.
> >
> > Signed-off-by: Ondrej Jirman
> > ---
> >
Hello Sam,
On Wed, Jul 01, 2020 at 05:25:32PM +0200, Sam Ravnborg wrote:
> Hi Ondrej.
>
> On Wed, Jul 01, 2020 at 12:31:13PM +0200, Ondrej Jirman wrote:
> > This patchset adds support for the LCD panel of PinePhone.
> >
> > I've tested this on PinePhone 1.0 and 1.2.
> >
> > Please take a look.
Hello Linus,
On Wed, Jul 01, 2020 at 09:50:40AM +0200, Linus Walleij wrote:
> On Fri, Jun 26, 2020 at 2:56 AM Ondrej Jirman wrote:
>
> > Xingbangda XBD599 is a 5.99" 720x1440 MIPI-DSI LCD panel used in
> > PinePhone. Add support for it.
> >
> > Signed-off-by: Icenowy Zheng
> > Signed-off-by:
Hello Sam,
On Mon, Jun 22, 2020 at 10:08:02AM +0200, Sam Ravnborg wrote:
> On Sun, Jun 21, 2020 at 12:30:10AM +0200, Ondřej Jirman wrote:
> > On Sat, Jun 20, 2020 at 11:25:29PM +0200, Sam Ravnborg wrote:
> > > Hi Ondrej et al.
...
> > > Would it not be bette
On Sat, Jun 20, 2020 at 11:25:29PM +0200, Sam Ravnborg wrote:
> Hi Ondrej et al.
>
> On Wed, Jun 17, 2020 at 02:32:07AM +0200, Ondrej Jirman wrote:
> > From: Icenowy Zheng
> >
> > Xingbangda XBD599 is a 5.99" 720x1440 MIPI-DSI IPS LCD panel made by
> > Xingbangda, which is used on PinePhone
Hello Linus,
On Tue, May 26, 2020 at 01:32:25PM +0200, Linus Walleij wrote:
> Hi Ondrej,
>
[...]
> > + dsi_dcs_write_seq(dsi, ST7703_CMD_SETGIP1,
> > + 0x82, 0x10, 0x06, 0x05, 0xA2, 0x0A, 0xA5, 0x12,
> > + 0x31, 0x23, 0x37, 0x83, 0x04,
Hi,
On Sat, May 23, 2020 at 12:55:42AM -0700, Antonin Skala wrote:
> Hello, did somebody tried to compile gadget serial module for this reader?
yes. You also need to configure it on the kernel command line,
I think. Something like console=/dev/ttyGS0 to get the kernel
console output there if
On Tue, May 12, 2020 at 03:52:12PM -0700, Dmitry Torokhov wrote:
> On Wed, May 13, 2020 at 12:22:02AM +0200, Ondrej Jirman wrote:
> > It is possible to turn the motor on/off just by enabling/disabling
> > the vcc-supply.
> >
> > Signed-off-by: Ondrej Jirman
> > Acked-by: Rob Herring
> > ---
> >
Hi Clément,
On Tue, Apr 28, 2020 at 04:26:29PM +0200, Clément Péron wrote:
> Tanix TX6 has a fixed regulator. As DVFS is instructed to change
> voltage to meet OPP table, the DVFS is not working as expected.
>
> Avoid to introduce a new dedicated OPP Table where voltage are
> equals to the fixed
Hi,
On Mon, Apr 20, 2020 at 03:00:14PM +0200, Clément Péron wrote:
> From: Ondrej Jirman
>
> This enables passive cooling by down-regulating CPU voltage
> and frequency.
Does this not produce a lot of warnings for you during compilation?
regards,
o.
> Signed-off-by: Ondrej Jirman
>
ie is based on Yangtao Li serie[0] and Ondřej Jirman work[1].
> >
> > Most of the OPP tables are taken from original vendor kernel[2].
> > Plus there are new CPU frequencies at 1.6GHz, 1.7GHz and 1.8GHz.
> >
> > I wrote a simple script to randomly set a frequency durin
req doesn't work.
Also, thermal trip points need to be in the opp.dtsi to avoid dtc warnings
during build.
https://megous.com/git/linux/commit/?h=ths-5.7=cacefd7decf5ae0ce42ab4d48a13a58552929ebd
regards,
o.
> > Changes since v1 (thanks to Ondřej Jirman):
> > - Remove Polli
gt; - Change Orange Pi boards to Orange Pi 3
> - Change soc speed nvmem node name
> - Fix device tree warnings
> - Drop GPU opp tables
Looks like you may have also inadverently dropped the second patch from v2
series that implemented CPU thermal trip points.
> Changes since v1 (th
Hi,
On Sun, Apr 05, 2020 at 04:33:37PM +0200, Clément Péron wrote:
> Hi Ondřej,
[ ... ]
> Good point, this information should be added for both CPU and GPU regulator.
> This could be nice to confirm this point with a scope.
>
> Also I remark that Allwinner user higher temperature than what we
Hello Clément,
On Sun, Apr 05, 2020 at 12:49:06PM +0200, Clément Péron wrote:
> Hi Sunxi maintainers and members,
>
> Now that required drivers are merged we can contibute on DVFS support for
> Allwinner H6.
>
> This serie is based on Yangtao Li serie[0] and Megous works[1].
>
> Most of the
Hello,
On Sun, Apr 05, 2020 at 12:49:13PM +0200, Clément Péron wrote:
> Enable CPU and GPU opp tables for Beelink GS1.
>
> This needs also to change the CPU regulator min/max voltage to fit
> the OPP table.
>
> Signed-off-by: Clément Péron
> ---
>
Hello,
On Sun, Apr 05, 2020 at 12:49:09PM +0200, Clément Péron wrote:
> Add reasonable thermal polling time for Allwinner H6.
>
> Signed-off-by: Clément Péron
> ---
> arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 8
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git
On Thu, Mar 19, 2020 at 10:51:36PM +0800, Icenowy Zheng wrote:
> 在 2020-03-16星期一的 21:35 +0800，Icenowy Zheng写道：
> > PinePhone uses PWM backlight and a XBD599 LCD panel over DSI for
> > display.
> >
> > Add its device nodes.
> >
> > Signed-off-by: Icenowy Zheng
> > ---
> > No changes in v2.
> >
Hello Icenowy,
On Mon, Mar 16, 2020 at 09:35:01PM +0800, Icenowy Zheng wrote:
> Xingbangda XBD599 is a 5.99" 720x1440 MIPI-DSI IPS LCD panel made by
> Xingbangda, which is used on PinePhone final assembled phones.
>
> [snip]
>
> +static const struct drm_display_mode xbd599_default_mode = {
> +
On Tue, Mar 10, 2020 at 11:27:24AM +0100, Pascal Roeleven wrote:
> The Topwise A721/LY-F1 tablet is a tablet sold around 2012 under
> different brands. The mainboard mentions A721 clearly, so this tablet
> is best known under this name.
>
> Signed-off-by: Pascal Roeleven
> ---
>
Hello Pascal,
On Tue, Mar 10, 2020 at 11:27:24AM +0100, Pascal Roeleven wrote:
> The Topwise A721/LY-F1 tablet is a tablet sold around 2012 under
> different brands. The mainboard mentions A721 clearly, so this tablet
> is best known under this name.
>
> Signed-off-by: Pascal Roeleven
> ---
>
On Thu, Feb 27, 2020 at 02:04:27PM +0100, Maxime Ripard wrote:
> On Thu, Feb 27, 2020 at 02:26:47AM +0100, Ondrej Jirman wrote:
> > This series adds an initial support for Pine64 PinePhone.
> >
> > Please take a look.
> >
> > thank you and regards,
> > Ondrej Jirman
>
> Applied all three,
Hello,
On Thu, Feb 27, 2020 at 02:26:49AM +0100, megous hlavni wrote:
> Document board compatible names for Pine64 PinePhone:
>
> - 1.0 - Developer variant
> - 1.1 - Braveheart variant
>
> Signed-off-by: Ondrej Jirman
This also got:
Reviewed-by: Rob Herring
short time ago on v1. I didn't
On Mon, Feb 24, 2020 at 06:56:18PM +0100, Daniel Lezcano wrote:
> On 24/02/2020 18:39, Ondřej Jirman wrote:
> > On Mon, Feb 24, 2020 at 06:23:28PM +0100, megous hlavni wrote:
> >
> > To be more clear, new temperatures are available from the thermal sensor
> > driv
On Mon, Feb 24, 2020 at 06:23:28PM +0100, megous hlavni wrote:
> Hi,
>
> On Mon, Feb 24, 2020 at 06:06:20PM +0100, Daniel Lezcano wrote:
> > On 24/02/2020 17:54, Ondrej Jirman wrote:
> > > This enables passive cooling by down-regulating CPU voltage
> > > clocks = < CLK_C1CPUX>;
Hi,
On Mon, Feb 24, 2020 at 06:06:20PM +0100, Daniel Lezcano wrote:
> On 24/02/2020 17:54, Ondrej Jirman wrote:
> > This enables passive cooling by down-regulating CPU voltage
> > clocks = < CLK_C1CPUX>;
> > @@ -1188,12 +1188,60 @@ cpu0_thermal: cpu0-thermal {
> >
On Mon, Feb 24, 2020 at 08:31:06AM +0200, Stefan Mavrodiev wrote:
>
> On 2/23/20 3:35 PM, Ondřej Jirman wrote:
> > On Sun, Feb 23, 2020 at 02:27:30PM +0100, megous hlavni wrote:
> > > On Sun, Feb 23, 2020 at 02:14:31PM +0100, megous hlavni wrote:
> > > > The
On Mon, Feb 24, 2020 at 10:27:04AM +0100, Maxime Ripard wrote:
> On Sun, Feb 23, 2020 at 11:40:19AM +0100, Ondrej Jirman wrote:
> > Orange Pi PC2 features sy8106a regulator just like Orange Pi PC.
> >
> > Signed-off-by: Ondrej Jirman
> > Reviewed-by: Samuel Holland
> > ---
> >
Hello,
On Mon, Feb 24, 2020 at 10:10:59AM +0100, Maxime Ripard wrote:
> Hi,
>
> On Sun, Feb 23, 2020 at 12:14:27AM +0100, Ondrej Jirman wrote:
> > The board has a vibrator mottor. Hook it to the input subsystem.
> >
> > Signed-off-by: Ondrej Jirman
> > ---
> >
On Mon, Feb 24, 2020 at 12:01:00PM +0100, Maxime Ripard wrote:
> On Sun, Feb 23, 2020 at 06:29:14PM +0100, Ondrej Jirman wrote:
> > PinePhone needs I2C2 pins description. Add it.
> >
> > Signed-off-by: Ondrej Jirman
> > ---
> > arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 5 +
> > 1 file
Hello Maxime,
On Mon, Feb 24, 2020 at 12:00:27PM +0100, Maxime Ripard wrote:
> Hi,
>
> On Sun, Feb 23, 2020 at 06:29:16PM +0100, Ondrej Jirman wrote:
> > At them moment PinePhone comes in two slightly incompatible variants:
> >
> > - 1.0: Early Developer Batch
> > - 1.1: Braveheart Batch
> >
> >
On Sun, Feb 23, 2020 at 02:27:30PM +0100, megous hlavni wrote:
> On Sun, Feb 23, 2020 at 02:14:31PM +0100, megous hlavni wrote:
> > The tablet has a charger LED exposed on the top. This LED is controlled
> > by AXP813 PMIC. Add support for enabling the LED and using it either
> > for charging
On Sun, Feb 23, 2020 at 02:14:31PM +0100, megous hlavni wrote:
> The tablet has a charger LED exposed on the top. This LED is controlled
> by AXP813 PMIC. Add support for enabling the LED and using it either
> for charging indication (handled by PMIC automatically) or for other uses
> via user
Hello,
On Sun, Feb 23, 2020 at 12:03:46PM +0800, Chen-Yu Tsai wrote:
> On Sun, Feb 23, 2020 at 11:26 AM Chen-Yu Tsai wrote:
> >
> > Hi,
> >
> >
> > On Sun, Feb 23, 2020 at 6:32 AM Ondrej Jirman wrote:
> > >
> > > It just causes a constant rate of 5000 interrupts per second for both
> > > GPIO
Hi Samuel,
On Sat, Feb 22, 2020 at 09:26:30PM -0600, Samuel Holland wrote:
> Hi Ondrej,
>
> On 2/22/20 3:45 PM, Ondrej Jirman wrote:
> > Orange Pi PC2 features sy8106a regulator just like Orange Pi PC.
> >
> > Signed-off-by: Ondrej Jirman
> > ---
> >
Hello,
On Sun, Feb 23, 2020 at 11:29:31AM +0800, Chen-Yu Tsai wrote:
> On Sun, Feb 23, 2020 at 5:42 AM Ondrej Jirman wrote:
> >
> > This enables passive cooling by down-regulating CPU voltage
> > and frequency.
>
>
> Please state for the record how the trip points were derived. Were they from
Hello,
On Sun, Feb 23, 2020 at 11:29:07AM +0800, Chen-Yu Tsai wrote:
> Hi,
>
> On Sun, Feb 23, 2020 at 5:40 AM Ondrej Jirman wrote:
> >
> > This enables passive cooling by down-regulating CPU voltage
> > and frequency.
>
> Please state for the record how the trip points were derived. Were they
On Sun, Feb 23, 2020 at 12:03:46PM +0800, Chen-Yu Tsai wrote:
> On Sun, Feb 23, 2020 at 11:26 AM Chen-Yu Tsai wrote:
> >
> > Hi,
> >
> >
> > On Sun, Feb 23, 2020 at 6:32 AM Ondrej Jirman wrote:
> > >
> > > It just causes a constant rate of 5000 interrupts per second for both
> > > GPIO and MMC,
Hello,
On Sun, Feb 23, 2020 at 11:39:17AM +0800, Chen-Yu Tsai wrote:
> On Sun, Feb 23, 2020 at 6:32 AM Ondrej Jirman wrote:
> >
> > Lowering the voltage solves the quick image degradation over time
> > (minutes), that was probably caused by overheating.
> >
> > Signed-off-by: Ondrej Jirman
>
>
Hi,
On Thu, Feb 20, 2020 at 06:32:13PM +0100, Maxime Ripard wrote:
> On Wed, Feb 19, 2020 at 02:09:50AM +0100, Ondrej Jirman wrote:
> > When doing a 16-bit read that returns data in the MSB byte, the
> > RSB_DATA register will keep the MSB byte unchanged when doing
> > the following 8-bit read.
On Wed, Feb 19, 2020 at 10:49:18AM +0800, Chen-Yu Tsai wrote:
> On Wed, Feb 19, 2020 at 9:10 AM Ondrej Jirman wrote:
> >
> > When doing a 16-bit read that returns data in the MSB byte, the
> > RSB_DATA register will keep the MSB byte unchanged when doing
> > the following 8-bit read.
Hi,
On Mon, Feb 10, 2020 at 06:40:07PM +0100, Jernej Skrabec wrote:
> OrangePi 3 can optionally have 8 GiB eMMC (soldered on board). Because
> those pins are dedicated to eMMC exclusively, node can be added for both
> variants (with and without eMMC). Kernel will then scan bus for presence
> of
On Thu, Nov 28, 2019 at 11:26:24AM +0800, Chen-Yu Tsai wrote:
> On Thu, Nov 28, 2019 at 11:06 AM Ondřej Jirman wrote:
> >
> > Hi,
> >
> > On Thu, Nov 28, 2019 at 10:26:08AM +0800, Yong wrote:
> > > Hi Ondrej,
> > >
> > > This has been discusse
Hi,
On Thu, Nov 28, 2019 at 10:26:08AM +0800, Yong wrote:
> Hi Ondrej,
>
> This has been discussed.
> And Maxime sent a patch for this:
> https://www.mail-archive.com/linux-media@vger.kernel.org/msg127149.html
Thanks for pointing to the previous patch. But that patch doesn't make any
sense,
On Fri, Nov 08, 2019 at 07:29:21PM +0800, Icenowy Zheng wrote:
>
>
> 于 2019年11月8日 GMT+08:00 上午5:45:14, "Ondřej Jirman" 写到:
> >Hello Rikard,
> >
> >On Thu, Nov 07, 2019 at 09:46:45PM +0100, Rikard Falkeborn wrote:
> >> Arguments are supposed to b
Hello Rikard,
On Thu, Nov 07, 2019 at 09:46:45PM +0100, Rikard Falkeborn wrote:
> Arguments are supposed to be ordered high then low.
>
> Signed-off-by: Rikard Falkeborn
> ---
> Spotted while trying to add compile time checks of GENMASK arguments.
> Patch has only been compile tested.
thank
Hello Maxime,
On Mon, Oct 21, 2019 at 01:09:46PM +0200, Maxime Ripard wrote:
> On Sun, Oct 20, 2019 at 03:42:29PM +0200, meg...@megous.com wrote:
> > From: Ondrej Jirman
> >
> > Enable Allwinner's USB 3.0 phy and the host controller. Orange Pi 3
> > board has GL3510 USB 3.0 4-port hub connected
On Fri, Nov 01, 2019 at 04:07:01PM +0100, Maxime Ripard wrote:
> On Thu, Oct 31, 2019 at 07:13:58PM +0100, Ondrej Jirman wrote:
> > I have failures to boot on Orange Pi 3, because this driver determined
> > that my SoC is from the normal bin, but my SoC only works reliably with
> > the OPP values
Hi,
On Thu, Oct 31, 2019 at 08:12:57PM +0100, megous hlavni wrote:
> Hi,
>
> On Thu, Oct 31, 2019 at 07:55:43PM +0100, Clément Péron wrote:
> > Hi Ondrej,
> >
> > On Thu, 31 Oct 2019 at 19:14, Ondrej Jirman wrote:
> > >
> > > I have failures to boot on Orange Pi 3, because this driver
On Fri, Nov 01, 2019 at 04:07:01PM +0100, Maxime Ripard wrote:
> On Thu, Oct 31, 2019 at 07:13:58PM +0100, Ondrej Jirman wrote:
> > I have failures to boot on Orange Pi 3, because this driver determined
> > that my SoC is from the normal bin, but my SoC only works reliably with
> > the OPP values
Hi,
On Thu, Oct 31, 2019 at 07:55:43PM +0100, Clément Péron wrote:
> Hi Ondrej,
>
> On Thu, 31 Oct 2019 at 19:14, Ondrej Jirman wrote:
> >
> > I have failures to boot on Orange Pi 3, because this driver determined
> > that my SoC is from the normal bin, but my SoC only works reliably with
> >
On Mon, Oct 28, 2019 at 09:18:04PM -0700, Dmitry Torokhov wrote:
> On Tue, Oct 29, 2019 at 02:45:59AM +0100, Ondřej Jirman wrote:
> > On Mon, Oct 28, 2019 at 05:12:50PM -0700, Dmitry Torokhov wrote:
> > > On Tue, Oct 29, 2019 at 12:56:26AM +0100, Ondřej Jirman wrote:
> >
Hi Marco,
On Tue, Oct 29, 2019 at 09:55:45AM +0100, Marco Felsch wrote:
> Hi Dmitry,
>
> On 19-10-28 21:12, Dmitry Torokhov wrote:
> > On Tue, Oct 29, 2019 at 01:58:04AM +0100, Ondrej Jirman wrote:
> > > From: Mylčne Josserand
> > >
> > > Add the support for enabling optional regulator that
Hello Marco,
On Tue, Oct 29, 2019 at 10:08:01AM +0100, Marco Felsch wrote:
> Hi,
>
> On 19-10-29 01:58, Ondrej Jirman wrote:
> > From: Mylčne Josserand
> >
> > Enable a FocalTech EDT-FT5x06 Polytouch touchscreen.
> >
> > Signed-off-by: Ondrej Jirman
> > Signed-off-by: Mylčne Josserand
> >
On Mon, Oct 28, 2019 at 05:12:50PM -0700, Dmitry Torokhov wrote:
> On Tue, Oct 29, 2019 at 12:56:26AM +0100, Ondřej Jirman wrote:
> > On Mon, Oct 28, 2019 at 04:38:28PM -0700, Dmitry Torokhov wrote:
> > > > +
> > > > + error = dev_pm_set_wake_irq(dev
On Tue, Oct 29, 2019 at 09:09:40AM +0800, Chen-Yu Tsai wrote:
> On Tue, Oct 29, 2019 at 5:49 AM Ondrej Jirman wrote:
> >
> > PRCM_PWROFF_GATING_REG has CPU0 at bit 4 on A83T. So without this
> > patch, instead of gating the CPU0, the whole cluster was power gated,
> > when shutting down first CPU
Hello Dmitry,
On Mon, Oct 28, 2019 at 04:38:28PM -0700, Dmitry Torokhov wrote:
> Hi Ondrej,
>
> On Mon, Oct 28, 2019 at 11:15:02PM +0100, Ondrej Jirman wrote:
> > Allow the driver to wakeup the system on key press.
> >
> > Signed-off-by: Ondrej Jirman
> > ---
> >
Hi,
On Wed, Apr 24, 2019 at 01:44:12PM +0800, Icenowy Zheng wrote:
> The Allwinner H6 SoC has a register to set the PIO banks' voltage. When
> it mismatches the real voltage supplied to the VCC to the PIO supply,
> the PIO will work improperly.
>
> The PIO controller also has a register that
HI Icenowy,
On Sun, Oct 06, 2019 at 11:12:43PM +0800, Icenowy Zheng wrote:
> 在 2019-10-06日的 22:44 +0800，Icenowy Zheng写道：
> > 在 2019-10-03四的 09:53 +0530，Jagan Teki写道：
> > > Hi Wens,
> > >
> > > On Tue, Oct 1, 2019 at 1:34 PM Icenowy Zheng
> > > wrote:
> > > > This reverts commit
7b48cc
https://megous.com/git/linux/commit/?h=private-5.3=5af208e90de5ced30350fc0fba8419e9662e9bb7
> On Monday, September 9, 2019 at 1:27:08 AM UTC, 张宁 wrote:
> >
> > thanks for your patches.
> >
> > BR.
> > Ning.
> >
> > On Sunday, September 8, 2019 at
Hi,
On Sun, Sep 08, 2019 at 10:54:17PM -0500, Samuel Holland wrote:
> On 9/8/19 10:22 PM, Ondřej Jirman wrote:
> > Hello Samuel,
> >
> > On Mon, Aug 19, 2019 at 10:23:01PM -0500, Samuel Holland wrote:
> >> This series adds support for the "hardware message bo
Hello Samuel,
On Mon, Aug 19, 2019 at 10:23:01PM -0500, Samuel Holland wrote:
> This series adds support for the "hardware message box" in sun8i, sun9i,
> and sun50i SoCs, used for communication with the ARISC management
> processor (the platform's equivalent of the ARM SCP). The end goal is to
>
On Wed, Sep 04, 2019 at 11:38:01PM +0200, Jernej Škrabec wrote:
> Dne sreda, 04. september 2019 ob 23:10:15 CEST je Ondřej Jirman napisal(a):
> > On Wed, Sep 04, 2019 at 11:02:33PM +0200, Jernej Škrabec wrote:
> > > Dne sreda, 04. september 2019 ob 22:45:47 CEST je Ondřej
Hi,
On Sun, Sep 08, 2019 at 07:01:42PM +0200, Jernej Škrabec wrote:
> Dne nedelja, 08. september 2019 ob 12:20:50 CEST je Ondřej Jirman napisal(a):
> > Hi,
> >
> > On Sun, Sep 08, 2019 at 12:21:45AM +0200, megous hlavni wrote:
> > > On Thu, Sep 05, 2019
gt;
> >
> > On Thursday, September 5, 2019 at 5:38:05 AM UTC+8, Jernej Škrabec wrote:
> > >
> > > Dne sreda, 04. september 2019 ob 23:10:15 CEST je Ondřej Jirman
> > > napisal(a):
> > > > On Wed, Sep 04, 2019 at 11:02:33PM +0200, Jernej Škrabec
rs don't fit in current DRM design.
>
>
> On Thursday, September 5, 2019 at 5:38:05 AM UTC+8, Jernej Škrabec wrote:
> >
> > Dne sreda, 04. september 2019 ob 23:10:15 CEST je Ondřej Jirman
> > napisal(a):
> > > On Wed, Sep 04, 2019 at 11:02:33PM +0200, Jernej Šk
September 5, 2019 at 5:38:05 AM UTC+8, Jernej Škrabec wrote:
> >
> > Dne sreda, 04. september 2019 ob 23:10:15 CEST je Ondřej Jirman
> > napisal(a):
> > > On Wed, Sep 04, 2019 at 11:02:33PM +0200, Jernej Škrabec wrote:
> > > > Dne sreda, 04. september 2019 ob 22:
On Wed, Sep 04, 2019 at 11:02:33PM +0200, Jernej Škrabec wrote:
> Dne sreda, 04. september 2019 ob 22:45:47 CEST je Ondřej Jirman napisal(a):
> > On Wed, Sep 04, 2019 at 07:29:39AM +0200, Jernej Škrabec wrote:
> > > Dne sreda, 04. september 2019 ob 05:08:14 CEST je 张宁 napisa
On Wed, Sep 04, 2019 at 07:29:39AM +0200, Jernej Škrabec wrote:
> Dne sreda, 04. september 2019 ob 05:08:14 CEST je 张宁 napisal(a):
> > just check drm_mode_cursor_universal, cursor plane needs to support
> > DRM_FORMAT_ARGB
> >
> > but VI layer doesn't support alpha, directly change VI layer
Hi,
On Wed, Jan 30, 2019 at 04:41:53PM +0800, Chen-Yu Tsai wrote:
> Hi everyone,
>
> This series enables DVFS for the CPU cores (aka cpufreq) on the
> Allwinner H5 SoC. The OPP table was taken from Armbian, with minor
> tweaks to the maximum voltage to account for slightly increased voltage
> on
Hi,
On Tue, Aug 27, 2019 at 03:34:43PM +0200, Maxime Ripard wrote:
> On Sun, Aug 25, 2019 at 03:03:36PM +0200, Jernej Skrabec wrote:
> > Depending on kernel and bootloader configuration, it's possible that
> > Realtek ethernet PHY isn't powered on properly. It needs some time
> > before it can be
On Sat, Aug 24, 2019 at 11:36:26PM +0200, Jernej Škrabec wrote:
> Dne sobota, 24. avgust 2019 ob 23:27:46 CEST je Ondřej Jirman napisal(a):
> > Hello Jernej,
> >
> > On Sat, Aug 24, 2019 at 11:09:49PM +0200, Jernej Škrabec wrote:
> > > > Visually?
> &
Hello Jernej,
On Sat, Aug 24, 2019 at 11:09:49PM +0200, Jernej Škrabec wrote:
> > Visually?
> >
> > That would explain why it doesn't work for you. The mainline RTC driver
> > disables auto-switch feature, and if your board doesn't have a crystal for
> > LOSC, RTC will not generate a clock for
On Sat, Aug 24, 2019 at 03:16:41PM +0200, Jernej Škrabec wrote:
> Dne sobota, 24. avgust 2019 ob 15:05:44 CEST je Ondřej Jirman napisal(a):
> > On Sat, Aug 24, 2019 at 02:51:54PM +0200, Jernej Škrabec wrote:
> > > Dne sobota, 24. avgust 2019 ob 14:46:54 CEST je Ondřej Jirman napi
On Sat, Aug 24, 2019 at 02:51:54PM +0200, Jernej Škrabec wrote:
> Dne sobota, 24. avgust 2019 ob 14:46:54 CEST je Ondřej Jirman napisal(a):
> > Hi,
> >
> > On Sat, Aug 24, 2019 at 02:32:32PM +0200, Jernej Škrabec wrote:
> > > Hi!
> > >
> > > Dn
Hi,
On Sat, Aug 24, 2019 at 10:06:14AM +0200, Jernej Škrabec wrote:
> Dne sobota, 24. avgust 2019 ob 10:04:24 CEST je Jernej Škrabec napisal(a):
> > Hi!
> >
> > Dne torek, 20. avgust 2019 ob 17:19:31 CEST je meg...@megous.com napisal(a):
> > > From: Ondrej Jirman
> > >
> > > I went through the
Hi,
On Sat, Aug 24, 2019 at 02:32:32PM +0200, Jernej Škrabec wrote:
> Hi!
>
> Dne torek, 20. avgust 2019 ob 17:19:33 CEST je meg...@megous.com napisal(a):
> > From: Ondrej Jirman
> >
> > RTC on H6 is mostly the same as on H5 and H3. It has slight differences
> > mostly in features that are not
Hi,
On Tue, Aug 20, 2019 at 08:07:53AM -0500, Samuel Holland wrote:
> On 8/20/19 6:18 AM, Ondřej Jirman wrote:
> > Hi Samuel,
> >
> > On Mon, Aug 19, 2019 at 10:23:05PM -0500, Samuel Holland wrote:
> >> Allwinner sun8i, sun9i, and sun50i SoCs contain a
Hi Samuel,
On Mon, Aug 19, 2019 at 10:23:05PM -0500, Samuel Holland wrote:
> Allwinner sun8i, sun9i, and sun50i SoCs contain a hardware message box
> used for communication between the ARM CPUs and the ARISC management
> coprocessor. The hardware contains 8 unidirectional 4-message FIFOs.
>
>
On Fri, Aug 09, 2019 at 01:39:30AM +0200, Alexandre Belloni wrote:
> On 08/08/2019 14:12:37+0200, Ondřej Jirman wrote:
> > On Wed, Aug 07, 2019 at 12:55:02PM +0200, Alexandre Belloni wrote:
> > > Hi,
> > >
> > > On 06/08/2019 20:30:45+0200, Ondřej Jirman wro
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