[linux-sunxi] Re: [PATCH v7 0/6] Add support for Orange Pi 3

On Thu, Jun 20, 2019 at 03:47:42PM +0200, verejna wrote: > From: Ondrej Jirman > > This series implements support for Xunlong Orange Pi 3 board. > > - ethernet support (patches 1-3) > - HDMI support (patches 4-6) > > For some people, ethernet doesn't work after reboot (but works on cold >

Re: [linux-sunxi] [PATCH v7 0/6] Add support for Orange Pi 3

Hi Jernej, On Thu, Jun 20, 2019 at 05:53:58PM +0200, Jernej Škrabec wrote: > Hi! > > Dne četrtek, 20. junij 2019 ob 15:47:42 CEST je megous via linux-sunxi > napisal(a): > > From: Ondrej Jirman > > > > This series implements support for Xunlong Orange Pi 3 board. > > > > - ethernet support

Re: [linux-sunxi] [PATCH v6 5/6] drm: sun4i: Add support for enabling DDC I2C bus to sun8i_dw_hdmi glue

Hi Jernej, On Sun, Jun 16, 2019 at 01:05:13PM +0200, Jernej Škrabec wrote: > Hi Ondrej! > > Dne ponedeljek, 27. maj 2019 ob 18:22:36 CEST je megous via linux-sunxi > napisal(a): > > From: Ondrej Jirman > > > > Orange Pi 3 board requires enabling a voltage shifting circuit via GPIO > > for the

[linux-sunxi] Re: [PATCH v6 4/6] dt-bindings: display: hdmi-connector: Support DDC bus enable

On Tue, Jun 11, 2019 at 03:52:06PM -0600, Rob Herring wrote: > On Mon, 27 May 2019 18:22:35 +0200, meg...@megous.com wrote: > > From: Ondrej Jirman > > > > Some Allwinner SoC using boards (Orange Pi 3 for example) need to enable > > on-board voltage shifting logic for the DDC bus using a gpio to

Re: [linux-sunxi] [PATCH v2] clk: sunxi-ng: sun50i-h6-r: Fix incorrect W1 clock gate register

Hi Clément, On Tue, Jun 04, 2019 at 06:14:15PM +0200, Clément Péron wrote: > Hi Ondrej, > > On Tue, 4 Jun 2019 at 17:40, megous via linux-sunxi > wrote: > > > > From: Ondrej Jirman > > > > The current code defines W1 clock gate to be at 0x1cc, overlaying it > > with the IR gate. > > > > Clock

Re: [linux-sunxi] [PATCH] clk: sunxi-ng: sun50i-h6-r: Fix incorrect W1 clock gate register

Hello Jernej, On Tue, Jun 04, 2019 at 05:35:48PM +0200, Jernej Škrabec wrote: > Hi! > > Dne torek, 04. junij 2019 ob 17:31:20 CEST je 'Ondřej Jirman' via linux-sunxi > napisal(a): > > Hi Jernej, > > > > On Tue, Jun 04, 2019 at 05:03:55PM +0200, Jernej Škrabec wro

Re: [linux-sunxi] [PATCH] clk: sunxi-ng: sun50i-h6-r: Fix incorrect W1 clock gate register

Hi Jernej, On Tue, Jun 04, 2019 at 05:03:55PM +0200, Jernej Škrabec wrote: > Dne torek, 04. junij 2019 ob 17:00:54 CEST je megous via linux-sunxi > napisal(a): > > From: Ondrej Jirman > > > > The current code defines W1 clock gate to be at 0x1cc, overlaying it > > with the IR gate. > > > >

Re: [linux-sunxi] Re: [PATCH v3 10/12] arm64: dts: allwinner: h6: Add IR receiver node

Hi Clément, On Tue, Jun 04, 2019 at 05:04:07PM +0200, Clément Péron wrote: > Hi Ondrej, > > On Tue, 4 Jun 2019 at 16:47, Ondřej Jirman wrote: > > > > Hi Clément, > > > > On Tue, Jun 04, 2019 at 02:33:55PM +0200, verejna wrote: > > > Hi Clément, > > > > > > On Mon, Jun 03, 2019 at 09:58:23PM

[linux-sunxi] Re: [PATCH v3 03/12] media: rc: sunxi: Add A31 compatible

On Tue, May 28, 2019 at 06:14:31PM +0200, Clément Péron wrote: > Allwiner A31 has a different memory mapping so add the compatible > we will need it later. > > Signed-off-by: Clément Péron > --- > drivers/media/rc/sunxi-cir.c | 9 + > 1 file changed, 9 insertions(+) > > diff --git

Re: [linux-sunxi] Re: [PATCH v3 10/12] arm64: dts: allwinner: h6: Add IR receiver node

Hi Clément, On Tue, Jun 04, 2019 at 02:33:55PM +0200, verejna wrote: > Hi Clément, > > On Mon, Jun 03, 2019 at 09:58:23PM +0200, Clément Péron wrote: > > Hi Ondrej, > > > > On Fri, 31 May 2019 at 14:46, Ondřej Jirman wrote: > > > > > > Hello Clément, > > > > > > On Fri, May 31, 2019 at

Re: [linux-sunxi] Re: [PATCH v3 10/12] arm64: dts: allwinner: h6: Add IR receiver node

Hi Clément, On Mon, Jun 03, 2019 at 09:58:23PM +0200, Clément Péron wrote: > Hi Ondrej, > > On Fri, 31 May 2019 at 14:46, Ondřej Jirman wrote: > > > > Hello Clément, > > > > On Fri, May 31, 2019 at 12:25:32AM +0200, Clément Péron wrote: > > > Hi Ondrej, > > > > > > On Thu, 30 May 2019 at 16:55,

Re: [linux-sunxi] [PATCH v6 0/6] Add support for Orange Pi 3

Hello, On Mon, May 27, 2019 at 06:22:31PM +0200, megous via linux-sunxi wrote: > From: Ondrej Jirman > > This series implements support for Xunlong Orange Pi 3 board. > > Unfortunately, this board needs some small driver patches, so I have > split the boards DT patch into chunks that require

Re: [linux-sunxi] Re: [PATCH v3 10/12] arm64: dts: allwinner: h6: Add IR receiver node

Hello Clément, On Fri, May 31, 2019 at 12:25:32AM +0200, Clément Péron wrote: > Hi Ondrej, > > On Thu, 30 May 2019 at 16:55, Ondřej Jirman wrote: > > > > Hello Clément, > > > > On Tue, May 28, 2019 at 06:14:38PM +0200, Clément Péron wrote: > > > Allwinner H6 IR is similar to A31 and can use

[linux-sunxi] Re: [PATCH v3 10/12] arm64: dts: allwinner: h6: Add IR receiver node

Hello Clément, On Tue, May 28, 2019 at 06:14:38PM +0200, Clément Péron wrote: > Allwinner H6 IR is similar to A31 and can use same driver. > > Add support for it. > > Signed-off-by: Clément Péron > --- > arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 19 +++ > 1 file changed,

Re: [linux-sunxi] Re: [PATCH v2 00/10] Allwinner A64/H6 IR support

Hello Clément, On Tue, May 28, 2019 at 06:21:19PM +0200, Clément Péron wrote: > Hi Ondřej, > > On Mon, 27 May 2019 at 21:53, 'Ondřej Jirman' via linux-sunxi > wrote: > > > > Hi Clément, > > > > On Mon, May 27, 2019 at 09:30:16PM +0200, verejna wrote: > >

[linux-sunxi] Re: [PATCH v2 00/10] Allwinner A64/H6 IR support

Hi Clément, On Mon, May 27, 2019 at 09:30:16PM +0200, verejna wrote: > Hi Clément, > > On Mon, May 27, 2019 at 08:49:59PM +0200, Clément Péron wrote: > > Hi Ondrej, > > > > > > > > I'm testing on Orange Pi 3. > > > > > > With your patches, I get kernel lockup after ~1 minute of use (ssh stops >

[linux-sunxi] Re: [PATCH v2 00/10] Allwinner A64/H6 IR support

Hi Clément, On Mon, May 27, 2019 at 08:49:59PM +0200, Clément Péron wrote: > Hi Ondrej, > > > > > I'm testing on Orange Pi 3. > > > > With your patches, I get kernel lockup after ~1 minute of use (ssh stops > > responding/serial console stops responding). I don't have RC controller to > > test

[linux-sunxi] Re: [PATCH v2 00/10] Allwinner A64/H6 IR support

Hi Clément, On Mon, May 27, 2019 at 06:31:17PM +0200, verejna wrote: > Hi Clément, > > On Mon, May 27, 2019 at 04:59:35PM +0200, Clément Péron wrote: > > Hi Ondřej, > > > > On Mon, 27 May 2019 at 15:48, Ondřej Jirman wrote: > > > > > > Hi Clément, > > > > > > On Mon, May 27, 2019 at 12:25:26AM

[linux-sunxi] Re: [PATCH v2 00/10] Allwinner A64/H6 IR support

Hi Clément, On Mon, May 27, 2019 at 04:59:35PM +0200, Clément Péron wrote: > Hi Ondřej, > > On Mon, 27 May 2019 at 15:48, Ondřej Jirman wrote: > > > > Hi Clément, > > > > On Mon, May 27, 2019 at 12:25:26AM +0200, Clément Péron wrote: > > > Hi, > > > > > > A64 IR support series[1] pointed out

[linux-sunxi] Re: [PATCH v2 00/10] Allwinner A64/H6 IR support

Hi Clément, On Mon, May 27, 2019 at 12:25:26AM +0200, Clément Péron wrote: > Hi, > > A64 IR support series[1] pointed out that an A31 bindings should be > introduced. > > This series introduce the A31 compatible bindings, then switch it on > the already existing board. > > Finally introduce

[linux-sunxi] Re: [PATCH v5 5/6] drm: sun4i: Add support for enabling DDC I2C bus to sun8i_dw_hdmi glue

Hi Maxime, On Tue, May 21, 2019 at 01:46:11PM +0200, Maxime Ripard wrote: > Hi, > > On Tue, May 21, 2019 at 01:50:08AM +0200, meg...@megous.com wrote: > > From: Ondrej Jirman > > > > Orange Pi 3 board requires enabling a voltage shifting circuit via GPIO > > for the DDC bus to be usable. > > >

[linux-sunxi] Re: [PATCH v5 2/6] net: stmmac: sun8i: force select external PHY when no internal one

Hello Sergei, On Tue, May 21, 2019 at 12:27:24PM +0300, Sergei Shtylyov wrote: > Hello! > > On 21.05.2019 2:50, meg...@megous.com wrote: > > > From: Icenowy Zheng > > > > The PHY selection bit also exists on SoCs without an internal PHY; if it's > > set to 1 (internal PHY, default value) then

Re: [linux-sunxi] Re: [PATCH v2] arm64: allwinner: h6: orangepi-one-plus: Add Ethernet support

On Mon, May 06, 2019 at 03:03:15PM +0530, Jagan Teki wrote: > On Fri, May 3, 2019 at 8:16 PM Maxime Ripard > wrote: > > > > On Fri, May 03, 2019 at 05:29:28PM +0530, Jagan Teki wrote: > > > Add Ethernet support for orangepi-one-plus board, > > > > > > - Ethernet port connected via RTL8211E PHY >

Re: [linux-sunxi] GPIO implementation Bananapi m2 ultra

Hi, On Fri, May 03, 2019 at 09:41:23AM -0700, mcaballer...@gmail.com wrote: > Hi all, this is my first post, I have a question about dts implementation > for my BananaPi m2 ultra. I was looking for hints in previous posts, and > other places, with no luck. Sorry if it´s a begginer question. >

[linux-sunxi] Re: [PATCH v4 6/9] dt-bindings: display: hdmi-connector: Add DDC power supply

On Fri, Apr 26, 2019 at 03:02:50PM -0500, Rob Herring wrote: > On Fri, Apr 26, 2019 at 2:20 PM Ondřej Jirman wrote: > > > > On Fri, Apr 26, 2019 at 01:23:37PM -0500, Rob Herring wrote: > > > On Sat, Apr 13, 2019 at 06:54:15PM +0200, meg...@megous.com wrote: > > > > From: Ondrej Jirman > > > > >

[linux-sunxi] Re: [PATCH v4 6/9] dt-bindings: display: hdmi-connector: Add DDC power supply

On Fri, Apr 26, 2019 at 01:23:37PM -0500, Rob Herring wrote: > On Sat, Apr 13, 2019 at 06:54:15PM +0200, meg...@megous.com wrote: > > From: Ondrej Jirman > > > > Some Allwinner SoC using boards (Orange Pi 3 for example) need to enable > > on-board voltage shifting logic for the DDC bus to be

Re: [linux-sunxi] [PATCH 0/3] Add basic support for RTC on Allwinner H6 SoC

On Mon, Apr 15, 2019 at 10:35:47PM +0800, Chen-Yu Tsai wrote: > On Mon, Apr 15, 2019 at 10:22 PM 'Ondřej Jirman' via linux-sunxi > wrote: > > > > Hi ChenYu, > > > > On Mon, Apr 15, 2019 at 04:18:12PM +0800, Chen-Yu Tsai wrote: > > > On Fri, Apr 12,

[linux-sunxi] Re: [PATCH 1/4] dt-bindings: sound: sun4i-spdif: Add Allwinner H6 compatible

Hi Clement, On Mon, Apr 15, 2019 at 10:30:38AM +0200, Clément Péron wrote: > On Mon, 15 Apr 2019 at 10:18, Maxime Ripard wrote: > > > > On Mon, Apr 15, 2019 at 10:09:11AM +0200, Clément Péron wrote: > > > Hi, > > > > > > On Mon, 15 Apr 2019 at 10:04, Maxime Ripard > > > wrote: > > > > > > > >

Re: [linux-sunxi] [PATCH 0/3] Add basic support for RTC on Allwinner H6 SoC

Hi ChenYu, On Mon, Apr 15, 2019 at 04:18:12PM +0800, Chen-Yu Tsai wrote: > On Fri, Apr 12, 2019 at 8:07 PM megous via linux-sunxi > wrote: > > > > From: Ondrej Jirman > > > > I went through the datasheets for H6 and H5, and compared the differences. > > RTCs are largely similar, but not

Re: [linux-sunxi] [PATCH v3 00/11] Add support for Orange Pi 3

Hello ChenYu, On Fri, Apr 12, 2019 at 07:05:05PM +0800, Chen-Yu Tsai wrote: > On Thu, Apr 11, 2019 at 6:19 PM megous via linux-sunxi > wrote: > > > > From: Ondrej Jirman > > > > This series implements support for Xunlong Orange Pi 3 board. > > > > Unfortunately, this board needs some small

Re: [linux-sunxi] [PATCH v3 03/11] pinctrl: sunxi: Prepare for alternative bias voltage setting methods

On Thu, Apr 11, 2019 at 08:34:33PM +1000, Julian Calaby wrote: > Hi Ondrej > > On Thu, Apr 11, 2019 at 8:19 PM megous via linux-sunxi > wrote: > > > > From: Ondrej Jirman > > > > H6 has a different I/O voltage bias setting method than A80. Prepare > > existing code for using alternative bias

Re: [linux-sunxi] [PATCH v5 3/5] phy: allwinner: add phy driver for USB3 PHY on Allwinner H6 SoC

On Sat, Apr 06, 2019 at 04:57:34AM +0800, Icenowy Zheng wrote: > Allwinner H6 SoC contains a USB3 PHY (with USB2 DP/DM lines also > controlled). > > Add a driver for it. > > The register operations in this driver is mainly extracted from the BSP > USB3 driver. > > Signed-off-by: Icenowy Zheng

Re: [linux-sunxi] [PATCH v5 3/5] phy: allwinner: add phy driver for USB3 PHY on Allwinner H6 SoC

Hello Icenowy, On Sat, Apr 06, 2019 at 04:57:34AM +0800, Icenowy Zheng wrote: > Allwinner H6 SoC contains a USB3 PHY (with USB2 DP/DM lines also > controlled). > > Add a driver for it. > > The register operations in this driver is mainly extracted from the BSP > USB3 driver. > > Signed-off-by:

Re: [linux-sunxi] [PATCH v2 02/13] arm64: dts: allwinner: h6: Add Orange Pi 3 DTS

Hi Jagan, On Tue, Apr 09, 2019 at 02:08:18PM +0530, Jagan Teki wrote: > Based on the conversation about using common dtsi from this thread[1], > I'm commenting here to make show the diff directly on the nodes, > giving comments on each node so-that we can see the diff globally. Thanks for the

[linux-sunxi] Re: [PATCH v2 02/13] arm64: dts: allwinner: h6: Add Orange Pi 3 DTS

On Tue, Apr 09, 2019 at 10:12:30AM +0200, Maxime Ripard wrote: > Hi, > > On Tue, Apr 09, 2019 at 02:24:41AM +0200, meg...@megous.com wrote: > > + { > > + pinctrl-names = "default"; > > + pinctrl-0 = <_pins>; > > Since 5 minutes ago, that's now the default. Ah. :) > > + { > > + /* > > +

[linux-sunxi] Re: [PATCH 07/12] arm64: dts: allwinner: orange-pi-3: Enable ethernet

On Mon, Apr 08, 2019 at 09:40:42AM +0200, Maxime Ripard wrote: > On Sat, Apr 06, 2019 at 01:45:09AM +0200, meg...@megous.com wrote: > > From: Ondrej Jirman > > > > Orange Pi 3 has two regulators that power the Realtek RTL8211E. > > According to the phy datasheet, both regulators need to be

[linux-sunxi] Re: [PATCH 01/12] arm64: dts: allwinner: h6: Add Orange Pi 3 DTS

On Mon, Apr 08, 2019 at 09:46:28AM +0200, Maxime Ripard wrote: > On Sat, Apr 06, 2019 at 01:45:03AM +0200, meg...@megous.com wrote: > > From: Ondrej Jirman > > > > Orange Pi 3 is a H6 based SBC made by Xulong, released in > > January 2019. It has the following features: > > > > - Allwinner H6

[linux-sunxi] Re: [PATCH 08/12] arm64: dts: allwinner: h6: Add MMC1 pins

On Mon, Apr 08, 2019 at 09:43:27AM +0200, Maxime Ripard wrote: > On Sat, Apr 06, 2019 at 01:45:10AM +0200, meg...@megous.com wrote: > > From: Ondrej Jirman > > > > --- > > arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 9 + > > 1 file changed, 9 insertions(+) > > > > diff --git

[linux-sunxi] Re: [PATCH 07/12] arm64: dts: allwinner: orange-pi-3: Enable ethernet

On Mon, Apr 08, 2019 at 11:41:38AM +0530, Jagan Teki wrote: > On Sat, Apr 6, 2019 at 5:15 AM wrote: > > > > From: Ondrej Jirman > > > > Orange Pi 3 has two regulators that power the Realtek RTL8211E. > > According to the phy datasheet, both regulators need to be enabled > > at the same time, but

[linux-sunxi] Re: [PATCH 09/12] pinctrl: sunxi: Prepare for alternative bias voltage setting methods

Hi Linus, On Mon, Apr 08, 2019 at 02:53:58PM +0200, Linus Walleij wrote: > On Sat, Apr 6, 2019 at 1:45 AM wrote: > > > From: Ondrej Jirman > > > > H6 has a different I/O voltage bias setting method than A80. Prepare > > existing code for using alternative bias voltage setting methods. > > > >

Re: [linux-sunxi] [PATCH 00/12] Add support for Orange Pi 3

Hi Jagan, On Mon, Apr 08, 2019 at 11:31:22AM +0530, Jagan Teki wrote: > On Sun, Apr 7, 2019 at 8:02 PM 'Ondřej Jirman' via linux-sunxi > wrote: > > > > On Sun, Apr 07, 2019 at 03:36:21PM +0200, Clément Péron wrote: > > > Hi, > > > > > > On Sat

Re: [linux-sunxi] Re: [PATCH 02/12] drm: sun4i: Add support for enabling DDC I2C bus to dw_hdmi glue

On Mon, Apr 08, 2019 at 10:47:14AM +0200, Maxime Ripard wrote: > On Mon, Apr 08, 2019 at 03:28:24PM +0800, Chen-Yu Tsai wrote: > > On Mon, Apr 8, 2019 at 3:23 PM Maxime Ripard > > wrote: > > > > > > On Sat, Apr 06, 2019 at 01:45:04AM +0200, meg...@megous.com wrote: > > > > From: Ondrej Jirman >

[linux-sunxi] Re: [PATCH RESEND v4 3/4] ARM: dts: sunxi: Add R_LRADC support for A83T

Hello Maxime, On Mon, Apr 08, 2019 at 10:00:56AM +0200, Maxime Ripard wrote: > On Wed, Mar 27, 2019 at 03:33:38AM +0100, meg...@megous.com wrote: > > From: Ziping Chen > > > > Allwinner A83T SoC has a low res adc like the one in Allwinner A10 SoC. > > Now the driver has been modified to support

[linux-sunxi] Re: [PATCH 10/12] pinctrl: sunxi: Support I/O bias voltage setting on H6

On Sat, Apr 06, 2019 at 01:45:12AM +0200, verejna wrote: > From: Ondrej Jirman > > H6 SoC has a "pio group withstand voltage mode" register (datasheet > description), that needs to be used to select either 1.8V or 3.3V > I/O mode, based on what voltage is powering the respective pin > banks and

Re: [linux-sunxi] [PATCH 12/12] arm64: dts: allwinner: orange-pi-3: Enable WiFi

On Sun, Apr 07, 2019 at 05:31:52PM +0200, Clément Péron wrote: > Hi, > > On Sat, 6 Apr 2019 at 01:45, megous via linux-sunxi > wrote: > > > > From: Ondrej Jirman > > > > Orange Pi 3 has AP6256 WiFi/BT module. WiFi part of the module is > > called bcm43356 and can be used with the brcmfmac

Re: [linux-sunxi] [PATCH 00/12] Add support for Orange Pi 3

On Sun, Apr 07, 2019 at 03:36:21PM +0200, Clément Péron wrote: > Hi, > > On Sat, 6 Apr 2019 at 01:45, megous via linux-sunxi > wrote: > > > > From: Ondrej Jirman > > > > This series implements support for Xunlong Orange Pi 3 board. > > OrangePi 3 Lite2 and One Plus boards support has already

Re: [linux-sunxi] [PATCH v5 3/5] phy: allwinner: add phy driver for USB3 PHY on Allwinner H6 SoC

Hello Icenowy, On Sat, Apr 06, 2019 at 04:57:34AM +0800, Icenowy Zheng wrote: > Allwinner H6 SoC contains a USB3 PHY (with USB2 DP/DM lines also > controlled). > > Add a driver for it. > > The register operations in this driver is mainly extracted from the BSP > USB3 driver. > > Signed-off-by:

Re: [linux-sunxi] Re: [PATCH RESEND v4 1/4] input: sun4i-a10-lradc-keys: Add support for A83T

Hello, On Thu, Apr 04, 2019 at 11:49:15AM -0700, Dmitry Torokhov wrote: > On Wed, Mar 27, 2019 at 03:33:36AM +0100, meg...@megous.com wrote: > > From: Ziping Chen > > > > Allwinner A83T SoC has a low res adc like the one in Allwinner A10 SoC, > > however, the A10 SoC's vref of lradc internally

Re: [linux-sunxi] [PATCH v2 5/5] ARM: dts: sun8i: tbs-a711: Enable UART2 (for NEO-6M GPS module)

Hello Maxime, On Mon, Apr 01, 2019 at 01:56:16PM +0200, megous via linux-sunxi wrote: > From: Ondrej Jirman > > TBS A711 tablet contains u-blox NEO-6M module connected to UART2. > Enable UART2 to gain access to the module from userspace. Other GPS bits are now applied (thank you, Johan), so if

Re: [linux-sunxi] [PATCH v2 4/5] dt-bindings: gnss: Add u-blox,neo-6m compatible

On Mon, Apr 01, 2019 at 01:56:15PM +0200, megous via linux-sunxi wrote: > From: Ondrej Jirman > > Add compatible for u-blox NEO-6M GPS module. > > Signed-off-by: Ondrej Jirman Ouch, I forgot to add: Reviewed-by: Rob Herring I'll do v3 if necessary, for this. regards, Ondrej > --- >

[linux-sunxi] Re: [PATCH 2/7] ARM: dts: sun8i: tbs-a711: Add node for BMA250 accelerometer

Hello Maxime, On Mon, Apr 01, 2019 at 08:30:49AM +0200, Maxime Ripard wrote: > Hi, > > On Wed, Mar 27, 2019 at 01:18:38AM +0100, meg...@megous.com wrote: > > From: Ondrej Jirman > > > > A711 tablet has BMA250 accelerometer connected to I2C1 bus. Enable > > both the I2C1 bus and add the

[linux-sunxi] Re: [PATCH v2 2/2] ARM: dts: sun8i: a83t: Add missing CPU clock references

Hello Maxime, On Mon, Apr 01, 2019 at 10:22:42AM +0200, Maxime Ripard wrote: > Hi, > > On Thu, Mar 28, 2019 at 12:31:59PM +0100, meg...@megous.com wrote: > > From: Ondrej Jirman > > > > A83T DTSI has cpu clocks defined only on the first CPU in each cluster. > > We can bring down any CPU in the

Re: [linux-sunxi] Re: [PATCH v3 1/3] input: sun4i-a10-lradc-keys: Add support for A83T

Hello, On Mon, Jun 26, 2017 at 07:13:42PM +0200, Maxime Ripard wrote: > On Sat, Jun 24, 2017 at 10:45:13AM +0800, Ziping Chen wrote: > > From: Ziping Chen > > > > Allwinner A83T SoC has a low res adc like the one > > in Allwinner A10 SoC, however, the A10 SoC's vref > > of lradc internally is

Re: [linux-sunxi] [PATCH v12 0/2] Initial Allwinner V3s CSI Support

Hello, On Tue, Oct 30, 2018 at 04:09:48PM +0800, Yong Deng wrote: > I can't make v4l2-compliance always happy. > The V3s CSI support many pixformats. But they are not always available. > It's dependent on the input bus format (MEDIA_BUS_FMT_*). > Example: > V4L2_PIX_FMT_SBGGR8:

Re: [linux-sunxi] [PATCH v3 09/30] iio: adc: Threat A33 as thermal sensor and remove non thermal sun4i channel

On Thu, Aug 30, 2018 at 05:44:57PM +0200, Philipp Rossak wrote: > We want to use this driver mostly as thermal sensor, that still supports > the adc for the older chips, thus we threat the A33 as thermal sensor. > We also remove the adc channel without thermal support. Threat -> treat (in the

Re: [linux-sunxi] [PATCH v3 30/30] ARM: sun8i: a83t: full range OPP tables and CPUfreq

Hello, On Thu, Aug 30, 2018 at 05:45:18PM +0200, Philipp Rossak wrote: > Since we have now thermal trotteling enabeled we can now add the full > range of the OPP table. I'm not sure we can. I have a tablet with A83T SoC and it gets unstable at these frequencies even with thermal throttling on

Re: [linux-sunxi] [PATCH v3 21/30] iio: adc: sun4i-gpadc-iio: add support for H3 thermal sensor

Hello, On Thu, Aug 30, 2018 at 05:45:09PM +0200, Philipp Rossak wrote: > This patch adds support for the H3 ths sensor. > > The H3 supports interrupts. The interrupt is configured to update the > the sensor values every second. The calibration data is writen at the > begin of the init process. >

Re: [linux-sunxi] CPUFreq on H2+

On Sat, Aug 11, 2018 at 05:56:06AM -0700, Nuno Gonçalves wrote: > I will check what is the smallest delta I get to trigger the bug. > > For now, I believe in u-boot clock_sun4i.c is the one used on H3: I think it's sun6i. >

Re: [linux-sunxi] CPUFreq on H2+

On Fri, Aug 10, 2018 at 02:55:03AM -0700, Nuno Gonçalves wrote: > > > > > > > You may try a stress test and toggle the cpufreq frequency settings > > manually > > in a fast loop, to see if you can reproduce it faster. Because, waiting 8h > > or more for a crash is not optimal. :) > > > > If

Re: [linux-sunxi] CPUFreq on H2+

On Fri, Aug 10, 2018 at 11:44:17AM +0200, Ondřej Jirman wrote: > Hi, > > On Thu, Aug 09, 2018 at 09:42:21AM -0700, Nuno Gonçalves wrote: > > Dear Ondřej, > > > > Thank you. I applied this patches to linux and u-boot and the number of > > crashes did reduce, but they still happen. > > > > Any

Re: [linux-sunxi] CPUFreq on H2+

Hi, On Thu, Aug 09, 2018 at 09:42:21AM -0700, Nuno Gonçalves wrote: > Dear Ondřej, > > Thank you. I applied this patches to linux and u-boot and the number of > crashes did reduce, but they still happen. > > Any other idea? :) You may try a stress test and toggle the cpufreq frequency

Re: [linux-sunxi] Paging request error on Lamobo-R1 (Allwinner A20), overcurrent or overheat?

On Sat, Apr 07, 2018 at 12:00:10PM +0800, Chen-Yu Tsai wrote: > On Sat, Apr 7, 2018 at 1:11 AM, Paul Kocialkowski wrote: > > Hi, > > > > One of the servers I'm running has recently rebooted due to a kernel > > paging request that could not be handled correctly. > > > > The

Re: [linux-sunxi] "BUG: Bad page state in process ..." on Olimex A64-OLinuXino

On Wed, Mar 14, 2018 at 12:52:22PM +0100, Martin Lucina wrote: > On Wednesday, 14.03.2018 at 00:45, 'Ondřej Jirman' via linux-sunxi wrote: > > On Tue, Mar 13, 2018 at 08:20:35PM +0100, Martin Lucina wrote: > > > Hi, > > > > > > > > However, while runn

Re: [linux-sunxi] "BUG: Bad page state in process ..." on Olimex A64-OLinuXino

On Tue, Mar 13, 2018 at 08:20:35PM +0100, Martin Lucina wrote: > Hi, > > > > However, while running the debootstrap 2nd stage on the board, it seems > > > that > > > the kernel is not stable: > > > > Another thing to check if you are seeing stability issues is the power > > supply (including

Re: [linux-sunxi] [PATCH v3 06/16] drm/sun4i: Release exclusive clock lock when disabling TCON

that's called only once, but sun4i_tcon_channel_set_status(..., 1, false) can be called multiple times, so the first call would disable protection and the clock would be unprotected from then on, even though the display would be active. Perhaps the protection needs to be enabled in sun4i_tcon_channel

Re: [linux-sunxi] [PATCH v3 06/16] drm/sun4i: Release exclusive clock lock when disabling TCON

(..., 1, false) is called multiple times, which leads to unbalanced calls to clk_set_rate_exclusive and clk_rate_exclusive_put. I don't know how to fix this. regards, o. On Fri, Mar 09, 2018 at 01:13:14AM +0100, 'Ondřej Jirman' via linux-sunxi wrote: > Hi Jernej, > > On Thu, Mar

Re: [linux-sunxi] [PATCH v3 06/16] drm/sun4i: Release exclusive clock lock when disabling TCON

Hi Jernej, On Thu, Mar 08, 2018 at 11:57:40PM +0100, Jernej Škrabec wrote: > Hi, > > Dne četrtek, 08. marec 2018 ob 23:47:17 CET je Ondřej Jirman napisal(a): > > Hi, > > > > On Thu, Mar 01, 2018 at 10:34:32PM +0100, Jernej Skrabec wrote: > > > Currently exclusive TCON clock lock is never

Re: [linux-sunxi] [PATCH v3 06/16] drm/sun4i: Release exclusive clock lock when disabling TCON

Hi, On Thu, Mar 01, 2018 at 10:34:32PM +0100, Jernej Skrabec wrote: > Currently exclusive TCON clock lock is never released, which, for > example, prevents changing resolution on HDMI. > > In order to fix that, release clock when disabling TCON. TCON is always > disabled first before new mode is

Re: [linux-sunxi] Re: DRM fb issue - Kernel 4.15.7

Hi, On Wed, Mar 07, 2018 at 02:17:42PM -0800, @lex wrote: > Hi Jernej, > > Unfortunately, this patch did not fix the issue, unless I did something > silly. > Here is the complete > bootlog: https://gist.github.com/avafinger/ac6b5e73da87797c6ff32d6746e5fac5 > > *code excerpt:* > > static void

Re: [linux-sunxi] [PATCH v4 0/2] Initial Allwinner V3s CSI Support

On Thu, Jan 04, 2018 at 03:06:25PM +0100, Maxime Ripard wrote: > On Mon, Dec 25, 2017 at 09:58:02AM +0100, Ondřej Jirman wrote: > > Hello, > > > > On Mon, Dec 25, 2017 at 11:15:26AM +0800, Yong wrote: > > > Hi, > > > > > > On Fri, 22 Dec 2017 14:46:48 +0100 > > > Ondřej Jirman

Re: [linux-sunxi] [PATCH v4 0/2] Initial Allwinner V3s CSI Support

Hello, On Mon, Dec 25, 2017 at 11:15:26AM +0800, Yong wrote: > Hi, > > On Fri, 22 Dec 2017 14:46:48 +0100 > Ondřej Jirman wrote: > > > Hello, > > > > Yong Deng píše v Pá 22. 12. 2017 v 17:32 +0800: > > > > > > Test input 0: > > > > > > Control ioctls: > > >

Re: [linux-sunxi] [PATCH v4 0/2] Initial Allwinner V3s CSI Support

Hello, Yong Deng píše v Pá 22. 12. 2017 v 17:32 +0800: > This patchset add initial support for Allwinner V3s CSI. > > Allwinner V3s SoC have two CSI module. CSI0 is used for MIPI interface > and CSI1 is used for parallel interface. This is not documented in > datasheet but by testing and guess.

Re: [linux-sunxi] OrangePi PC2 CPU Voltage Regulator

Hi, Chris Obbard píše v Ne 26. 11. 2017 v 16:47 +: > Hi Ondřej, > > Interesting, looks like you are on the way to implementing a cpufreq driver? > Are these patches submitted yet? Cpufreq works fine in the mainline, I suppose. This branch is for thermal regulation. Some of the patches

Re: [linux-sunxi] OrangePi PC2 CPU Voltage Regulator

Chris Obbard píše v Ne 26. 11. 2017 v 15:24 +: > Hi guys, > Looking into the COU core voltage regulator on the opipc2. By default, > through resistors on the PCB, the regulator is set to 1.1V and should be set > by u-boot to 1.2V before bringing up the cpu core PLL as the cpu is spec'd at >

Re: [linux-sunxi] Enabling uart2 with flow control

Hi Alan, alan.martino...@senic.com píše v Pá 17. 11. 2017 v 03:41 -0800: > { > uart2_pins_ctsrts: uart2-ctsrts { > pins = "PA#", "PA#"; // replace # with number of the CTS/DTS pin > function = "uart2"; > }; > }; > > Where are you referencing those strings from (both

Re: [linux-sunxi] Enabling uart2 with flow control

Hi, for flow control, you need to configure relevant flow control pins for uart2 function too too. Perhaps DTS and CTS? Add: { > uart2_pins_ctsrts: uart2-ctsrts { > pins = "PA#", "PA#"; // replace # with number of the CTS/DTS pin > function = "uart2"; }; You can check pinctrl code for

Re: [linux-sunxi] Re: [U-Boot] [PATCH] sunxi: set the default CPUx frequency of H5 to 816MHz

'Ondřej Jirman' via linux-sunxi píše v St 01. 11. 2017 v 03:10 +0100: > Hi, > > Icenowy Zheng píše v St 01. 11. 2017 v 08:31 +0800: > > > > And according to the Orange Pi PC2 and Prime schematics, they both > > start at 1.1V. (The Prime schematics even says "Fo

Re: [linux-sunxi] Re: [U-Boot] [PATCH] sunxi: set the default CPUx frequency of H5 to 816MHz

Hi, Icenowy Zheng píše v St 01. 11. 2017 v 08:31 +0800: > > And according to the Orange Pi PC2 and Prime schematics, they both > start at 1.1V. (The Prime schematics even says "For H5 adjust > VDD-CPUX to 1.1V). > Orange Pi PC2 starts at the same voltage as Orange Pi PC. That is at 1.308V. It

Odp.: [linux-sunxi] PLL cpux on H3 allwinner

Hi, there's some pattern. This is the lookup table that the BSP driver uses: https://github.com/megous/h3-firmware/blob/master/clk.c#L166 If you stray too much from this you'll get PLL lockups on change and have to do some acrobatics to restart the PLL, which is kind of pointless if it can be

Re: [linux-sunxi] [PATCH v2 1/3] media: V3s: Add support for Allwinner CSI.

Hello Yong, I noticed one issue in the register macros. See below. Yong Deng píše v Čt 27. 07. 2017 v 13:01 +0800: > Allwinner V3s SoC have two CSI module. CSI0 is used for MIPI interface > and CSI1 is used for parallel interface. This is not documented in > datasheet but by testing and guess. >

Re: [linux-sunxi] Re: [U-Boot] [PATCH 3/4] sunxi: dts: added emac node for nanopi m1

Hi, Jagan Teki píše v St 30. 08. 2017 v 19:48 +0530: > On Wed, Aug 30, 2017 at 2:40 PM, Philipp Rossak wrote: > > > > > > Am 30.08.2017 um 08:47 schrieb Jagan Teki: > > > > > > On Wed, Aug 30, 2017 at 6:02 AM, Philipp Rossak wrote: > > > > > > > > From:

Re: [linux-sunxi] [PATCH 10/10] ARM: dts: sun8i: Add SY8106A regulator to Orange Pi PC

Maxime Ripard píše v St 26. 07. 2017 v 13:44 +0200: > Hi, > > On Wed, Jul 26, 2017 at 12:23:48PM +0200, Ondřej Jirman wrote: > > Hi, > > > > icen...@aosc.io píše v St 26. 07. 2017 v 15:36 +0800: > > > > > > > > > > > > > > > Otherwse > > > > > > > > > > > > > +

Re: [linux-sunxi] [PATCH 10/10] ARM: dts: sun8i: Add SY8106A regulator to Orange Pi PC

Hi, icen...@aosc.io píše v St 26. 07. 2017 v 15:36 +0800: > > > > > > > > > Otherwse > > > > > > > > > + regulator-max-microvolt = <140>; > > > > > + regulator-ramp-delay = <200>; > > > > > > > > Is this an actual constraint of the SoC? Or is it a

Re: [linux-sunxi] [PATCH v4 4/5] ARM: sunxi: h3/h5: switch apb0-related clocks to r_ccu

Hi Icenowy, icen...@aosc.io píše v Čt 20. 07. 2017 v 16:21 +0800: > 在 2017-07-20 06:59，Ondřej Jirman 写道： > > Hi, > > > > Icenowy Zheng píše v Út 04. 04. 2017 v 17:50 +0800: > > > From: Icenowy Zheng > > > > > > Now we have driver for the PRCM CCU, switch to use it instead of

Re: [linux-sunxi] [PATCH v4 4/5] ARM: sunxi: h3/h5: switch apb0-related clocks to r_ccu

Hi, Icenowy Zheng píše v Út 04. 04. 2017 v 17:50 +0800: > From: Icenowy Zheng > > Now we have driver for the PRCM CCU, switch to use it instead of > old-style clock nodes for apb0-related clocks in sunxi-h3-h5.dtsi . > > The mux 3 of R_CCU is still the internal oscillator,

Re: [linux-sunxi] DT based cpufreq scaling for H5

Hi, I have working cpufreq for H5 in this branch: https://github.com/megous/linux/commits/orange-pi-4.11 regards, Ondrej Menion píše v St 28. 06. 2017 v 03:07 -0700: > Hi all > Googling a little bit, I have found reference to a series of 5 patches > Icenowy Zheng provided for adding cpufreq

Re: [linux-sunxi] A33 Suspend

Hi Lawrence, Thanks for your work. I may take you on your word some day. I've been also working on reverse engineering the arisc firmware and figuring out what it does. It's a bit bloated with various debug functionality, IR code, clock setup, regulator setup, etc. I hope the core functionality

Re: [linux-sunxi] Re: [PATCH] sunxi: set up PLL1 on sun6i+ without use dividers

icen...@aosc.io píše v Po 10. 04. 2017 v 18:15 +0800: > 在 2017-04-10 18:06，Ondřej Jirman 写道： > > Hi Maxime, > > > > Maxime Ripard píše v Po 10. 04. 2017 v 08:59 +0200: > > > On Mon, Apr 10, 2017 at 12:19:41AM +0800, Icenowy Zheng wrote: > > > > According to the researching result of Ondrej

Re: [linux-sunxi] [PATCH] sunxi: set up PLL1 on sun6i+ without use dividers

Hi Icenowy, Icenowy Zheng píše v Po 10. 04. 2017 v 00:19 +0800: > According to the researching result of Ondrej Jirman, the factor M of > PLL1 shouldn't be used and the factor P should be used only if the > intended frequency is lower than 288MHz. This is proven by the > clk-sun8iw7_tbl.c in the

Re: [linux-sunxi] Re: [PATCH] sunxi: set up PLL1 on sun6i+ without use dividers

Hi Maxime, Maxime Ripard píše v Po 10. 04. 2017 v 08:59 +0200: > On Mon, Apr 10, 2017 at 12:19:41AM +0800, Icenowy Zheng wrote: > > According to the researching result of Ondrej Jirman, the factor M of > > PLL1 shouldn't be used and the factor P should be used only if the > > intended frequency

Re: [linux-sunxi] [PATCH 1/5] clk: sunxi-ng: prevent NKMP clocks from temporarily get higher freq

Hi Icenowy, I already tried this approach to changing CPUX_PLL and it didn't work well. I've written a test program for CPUS (additional RISC-V processor on H3 SoC) for testing various NKMP clock change algorithms, by randomly changing the PLL frequency. Everything except simply not using

Re: [linux-sunxi] Re: [PATCH 5/8] sunxi: Add clock support for DE2/HDMI/TCON on newer SoCs

Hi, Dne 14.3.2017 v 07:53 Jernej Škrabec napsal(a): > Hi, > > Dne ponedeljek, 13. marec 2017 ob 13:33:43 CET je Simon Glass napisal(a): >> Hi, >> >> On 8 March 2017 at 16:34, Jernej Skrabec wrote: >>> This is needed for HDMI, which will be added later. >>> >>>