[PATCH] cpufreq: powernv: Check negative value returned by cpufreq_table_find_index_dl()

This patch fixes the below Coverity warning: *** CID 182816: Memory - illegal accesses (NEGATIVE_RETURNS) /drivers/cpufreq/powernv-cpufreq.c: 1008 in powernv_fast_switch() 1002unsigned int target_freq) 1003 { 1004int index; 1005

Re: [PATCH] powerpc/xmon: Dont register sysrq key when kernel param xmon=off

On Mon, Feb 12, 2018 at 7:59 PM, Vaibhav Jain wrote: > Presently sysrq key for xmon('x') is registered during kernel init > irrespective of the value of kernel param 'xmon'. Thus xmon is enabled > even if 'xmon=off' is passed on the kernel command line. > > This minor

Re: [PATCH] cpufreq: powernv: Check negative value returned by cpufreq_table_find_index_dl()

On 12-02-18, 15:51, Shilpasri G Bhat wrote: > This patch fixes the below Coverity warning: > > *** CID 182816: Memory - illegal accesses (NEGATIVE_RETURNS) > /drivers/cpufreq/powernv-cpufreq.c: 1008 in powernv_fast_switch() > 1002 unsigned int

Re: KVM compile error

It‘s only an info. I tried to compile the latest git version yesterday and I got this error. I will try to compile the RC1 today and test if this error still exists. Cheers, Christian Sent from my iPhone > On 12. Feb 2018, at 12:08, Michael Ellerman wrote: > > Christian

Re: [PATCH] cpufreq: powernv: Check negative value returned by cpufreq_table_find_index_dl()

Hi, On 02/12/2018 03:59 PM, Viresh Kumar wrote: > On 12-02-18, 15:51, Shilpasri G Bhat wrote: >> This patch fixes the below Coverity warning: >> >> *** CID 182816: Memory - illegal accesses (NEGATIVE_RETURNS) >> /drivers/cpufreq/powernv-cpufreq.c: 1008 in powernv_fast_switch() >> 1002

Re: [PATCH 2/3] cxl: Introduce module parameter 'enable_psltrace'

Le 11/02/2018 à 18:10, Vaibhav Jain a écrit : Thanks for reviewing the patch Christophe, christophe lombard writes: +bool cxl_enable_psltrace = true; +module_param_named(enable_psltrace, cxl_enable_psltrace, bool, 0600); +MODULE_PARM_DESC(enable_psltrace, "Set PSL

Re: KVM compile error

Christian Zigotzky writes: > Just for info: KVM doesn’t compile currently. > > Error messages: > > CC arch/powerpc/kvm/powerpc.o > arch/powerpc/kvm/powerpc.c: In function 'kvm_arch_vcpu_ioctl_run': > arch/powerpc/kvm/powerpc.c:1611:1: error: label 'out' defined but

Re: [PATCH] headers: untangle kmemleak.h from mm.h

Randy Dunlap writes: > From: Randy Dunlap > > Currently #includes for no obvious > reason. It looks like it's only a convenience, so remove kmemleak.h > from slab.h and add to any users of kmemleak_* > that don't already #include it. > Also

Re: Build regressions/improvements in v4.16-rc1

On Mon, Feb 12, 2018 at 11:17 AM, Geert Uytterhoeven wrote: > Below is the list of build error/warning regressions/improvements in > v4.16-rc1[1] compared to v4.15[2]. > > Summarized: > - build errors: +13/-5 > - build warnings: +1653/-1537 > > Note that there may be

linux-4.16-rc1/drivers/misc/ocxl/file.c:320:broken error checking ?

Hello there, linux-4.16-rc1/drivers/misc/ocxl/file.c:320]: (style) Checking if unsigned variable 'used' is less than zero. Source code is used = append_xsl_error(ctx, , buf + sizeof(header)); if (used < 0) return used; Suggest put return value from function into

Re: [PATCH] powerpc/xmon: Dont register sysrq key when kernel param xmon=off

Thanks for reviewing this patch Balbir Balbir Singh writes: > Any specific issue you've run into without this patch? Without this patch since xmon is still accessible via sysrq and there is no indication/warning on the xmon console mentioning that its is not fully

Re: linux-4.16-rc1/drivers/misc/ocxl/file.c:320:broken error checking ?

Le 12/02/2018 à 09:58, David Binderman a écrit : Hello there, linux-4.16-rc1/drivers/misc/ocxl/file.c:320]: (style) Checking if unsigned variable 'used' is less than zero. Source code is    used = append_xsl_error(ctx, , buf + sizeof(header));     if (used < 0)    

Re: [PATCH] cpufreq: powernv: Check negative value returned by cpufreq_table_find_index_dl()

On 12-02-18, 16:03, Shilpasri G Bhat wrote: > I agree too. There is no way we can get -1 with initialized cpu frequency > table. > We don't initialize powernv-cpufreq if we don't have valid CPU frequency > entries. Is there any other way to suppress the Coverity tool warning apart > from >

Re: [PATCH 2/3] cxl: Introduce module parameter 'enable_psltrace'

Le 11/02/2018 à 18:10, Vaibhav Jain a écrit : Thanks for reviewing the patch Christophe, christophe lombard writes: +bool cxl_enable_psltrace = true; +module_param_named(enable_psltrace, cxl_enable_psltrace, bool, 0600); +MODULE_PARM_DESC(enable_psltrace, "Set

Re: [RFC PATCH 0/5] powerpc/mm/slice: improve slice speed and stack use

Le 10/02/2018 à 09:11, Nicholas Piggin a écrit : This series intends to improve performance and reduce stack consumption in the slice allocation code. It does it by keeping slice masks in the mm_context rather than compute them for each allocation, and by reducing bitmaps and slice_masks from

Re: [RFC PATCH 0/5] powerpc/mm/slice: improve slice speed and stack use

On Mon, 12 Feb 2018 16:02:23 +0100 Christophe LEROY wrote: > Le 10/02/2018 à 09:11, Nicholas Piggin a écrit : > > This series intends to improve performance and reduce stack > > consumption in the slice allocation code. It does it by keeping slice > > masks in the

[RFC PATCH 01/12] powerpc/64s: do not allocate lppaca if we are not virtualized

The "lppaca" is a structure registered with the hypervisor. This is unnecessary when running on non-virtualised platforms. One field from the lppaca (pmcregs_in_use) is also used by the host, so move the host part out into the paca (lppaca field is still updated in guest mode). Signed-off-by:

Re: [PATCH] headers: untangle kmemleak.h from mm.h

On 02/12/2018 04:28 AM, Michael Ellerman wrote: > Randy Dunlap writes: > >> From: Randy Dunlap >> >> Currently #includes for no obvious >> reason. It looks like it's only a convenience, so remove kmemleak.h >> from slab.h and add to any users of

[RFC PATCH 06/12] powerpc/mm/numa: move numa topology discovery earlier

Split sparsemem initialisation from basic numa topology discovery. XXX: untested with lpars --- arch/powerpc/include/asm/setup.h | 1 + arch/powerpc/kernel/setup-common.c | 3 +++ arch/powerpc/mm/mem.c | 5 - arch/powerpc/mm/numa.c | 32

[RFC PATCH 07/12] powerpc/64: move default SPR recording

Move this into the early setup code, and don't iterate over CPU masks. We don't want to call into sysfs so early from setup, and a future patch won't initialize CPU masks by the time this is called. --- arch/powerpc/kernel/paca.c | 3 +++ arch/powerpc/kernel/setup.h| 9 +++--

[RFC PATCH 10/12] powerpc/64: allocate pacas per node

Per-node allocations are possible on 64s with radix that does not have the bolted SLB limitation. Hash would be able to do the same if all CPUs had the bottom of their node-local memory bolted as well. This is left as an exercise for the reader. --- arch/powerpc/kernel/paca.c | 41

[RFC PATCH 12/12] powerpc/64s/radix: allocate kernel page tables node-local if possible

Try to allocate kernel page tables according to the node of the memory they will map. Signed-off-by: Nicholas Piggin --- arch/powerpc/include/asm/book3s/64/hash.h | 2 +- arch/powerpc/include/asm/book3s/64/radix.h | 2 +- arch/powerpc/include/asm/sparsemem.h | 2

[RFC REBASED 5/5] powerpc/mm/slice: use the dynamic high slice size to limit bitmap operations

The number of high slices a process might use now depends on its address space size, and what allocation address it has requested. This patch uses that limit throughout call chains where possible, rather than use the fixed SLICE_NUM_HIGH for bitmap operations. This saves some cost for processes

[RFC PATCH 05/12] mm: make memblock_alloc_base_nid non-static

This will be used by powerpc to allocate per-cpu stacks and other data structures node-local where possible. Signed-off-by: Nicholas Piggin --- include/linux/memblock.h | 5 - mm/memblock.c| 2 +- 2 files changed, 5 insertions(+), 2 deletions(-) diff --git

[RFC PATCH 08/12] powerpc/setup: cpu_to_phys_id array

Build an array that finds hardware CPU number from logical CPU number in firmware CPU discovery. Use that rather than setting paca of other CPUs directly, to begin with. Subsequent patch will not have pacas allocated at this point. --- arch/powerpc/include/asm/smp.h | 1 +

[RFC REBASED 1/5] powerpc/mm/slice: pass pointers to struct slice_mask where possible

Pass around const pointers to struct slice_mask where possible, rather than copies of slice_mask, to reduce stack and call overhead. checkstack.pl gives, before: 0x0de4 slice_get_unmapped_area [slice.o]: 656 0x1b4c is_hugepage_only_range [slice.o]:512 0x075c

samples/seccomp/ broken when cross compiling s390, ppc allyesconfig

Hi, my build test machinery chokes on samples/seccomp when cross compiling s390 and ppc64 allyesconfig. This has been the case for quite some time already but I never found time to look at the problem and report it. It seems this is not new issue and similar thing happend for MIPS e9107f88c985

[RFC PATCH 04/12] powerpc/64s: allocate slb_shadow structures individually

Allocate slb_shadow structures individually. slb_shadow structures are avoided for radix environment. Signed-off-by: Nicholas Piggin --- arch/powerpc/kernel/paca.c | 65 +- 1 file changed, 30 insertions(+), 35 deletions(-) diff

[RFC PATCH 09/12] powerpc/64: defer paca allocation until memory topology is discovered

--- arch/powerpc/include/asm/paca.h| 3 +- arch/powerpc/kernel/paca.c | 80 +- arch/powerpc/kernel/prom.c | 5 ++- arch/powerpc/kernel/setup-common.c | 2 + 4 files changed, 35 insertions(+), 55 deletions(-) diff --git

[RFC REBASED 3/5] powerpc/mm/slice: implement slice_check_range_fits

Rather than build slice masks from a range then use that to check for fit in a candidate mask, implement slice_check_range_fits that checks if a range fits in a mask directly. This allows several structures to be removed from stacks, and also we don't expect a huge range in a lot of these cases,

[RFC PATCH 02/12] powerpc/64: Use array of paca pointers and allocate pacas individually

Change the paca array into an array of pointers to pacas. Allocate pacas individually. This allows flexibility in where the PACAs are allocated. Future work will allocate them node-local. Platforms that don't have address limits on PACAs would be able to defer PACA allocations until later in boot

[RFC REBASED 2/5] powerpc/mm/slice: implement a slice mask cache

Calculating the slice mask can become a signifcant overhead for get_unmapped_area. This patch adds a struct slice_mask for each page size in the mm_context, and keeps these in synch with the slices psize arrays and slb_addr_limit. This saves about 30% kernel time on a single-page mmap/munmap

[RFC PATCH 00/12] numa aware allocation for pacas, stacks,

This series allows numa aware allocations for various early data structures for radix. Hash still has a bolted SLB limitation that prevents at least pacas and stacks from node-affine allocations. Since I last posted a feeble attempt at this, I went back and tried to cover the setup / topology

[RFC PATCH 03/12] powerpc/64s: allocate lppacas individually

Allocate LPPACAs individually. We no longer allocate lppacas in an array, so this patch removes the 1kB static alignment for the structure, and enforces the PAPR alignment requirements at allocation time. We can not reduce the 1kB allocation size however, due to existing KVM hypervisors.

[RFC PATCH 11/12] powerpc/64: allocate per-cpu stacks node-local if possible

Signed-off-by: Nicholas Piggin --- arch/powerpc/kernel/setup_64.c | 51 ++ 1 file changed, 32 insertions(+), 19 deletions(-) diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c index 02fa358982e6..16ea71fa1ead

Re: [RFC PATCH 0/5] powerpc/mm/slice: improve slice speed and stack use

Le 12/02/2018 à 16:24, Nicholas Piggin a écrit : On Mon, 12 Feb 2018 16:02:23 +0100 Christophe LEROY wrote: Le 10/02/2018 à 09:11, Nicholas Piggin a écrit : This series intends to improve performance and reduce stack consumption in the slice allocation code. It

[RFC REBASED 4/5] powerpc/mm/slice: Use const pointers to cached slice masks where possible

The slice_mask cache was a basic conversion which copied the slice mask into caller's structures, because that's how the original code worked. In most cases the pointer can be used directly instead, saving a copy and an on-stack structure. This also converts the slice_mask bit operation helpers

Re: [PATCH 3/5] mtd: Stop assuming mtd_erase() is asynchronous

Am Montag, 12. Februar 2018, 22:03:09 CET schrieb Boris Brezillon: > None of the mtd->_erase() implementations work in an asynchronous manner, > so let's simplify MTD users that call mtd_erase(). All they need to do > is check the value returned by mtd_erase() and assume that != 0 means > failure.

[PATCH v6 09/17] ASoC: fsl_ssi: Clean up fsl_ssi_setup_regvals()

This patch cleans fsl_ssi_setup_regvals() by following changes: 1) Moving DBG bits to the first lines. 2) Setting SSIE, RE/TE as default and cleaning it for AC97 Signed-off-by: Nicolin Chen Tested-by: Caleb Crome Tested-by: Maciej S. Szmigiero

[PATCH v6 10/17] ASoC: fsl_ssi: Set xFEN0 and xFEN1 together

It'd be safer to enable both FIFOs for TX or RX at the same time. Signed-off-by: Nicolin Chen Tested-by: Caleb Crome Tested-by: Maciej S. Szmigiero Reviewed-by: Maciej S. Szmigiero ---

[PATCH v6 12/17] ASoC: fsl_ssi: Move one-time configurations to probe()

The probe() could handle some one-time configurations since they will not be changed once being configured. Signed-off-by: Nicolin Chen Tested-by: Caleb Crome Tested-by: Maciej S. Szmigiero Reviewed-by: Maciej S. Szmigiero

[PATCH 2/2] powerpc/pseries: Declare optional dummy function for find_and_online_cpu_nid

Commit e67e02a544e9 ("powerpc/pseries: Fix cpu hotplug crash with memoryless nodes") adds an unconditional call to find_and_online_cpu_nid(), which is only declared if CONFIG_PPC_SPLPAR is enabled. This results in the following build error if this is not the case.

[PATCH v6 01/17] ASoC: fsl_ssi: Redefine RX and TX macros

The RX and TX macros were defined implicitly and there was a potential risk if someone changes their values. Since they were defined to index the array ssi->regvals[2], this patch moves these two macros to fsl_ssi.c, closer to its owner ssi->regvals. And it also puts some comments here to limit

[PATCH v6 04/17] ASoC: fsl_ssi: Maintain a mask of active streams

Checking TE and RE bits in SCR register doesn't work for AC97 mode which enables SSIEN, TE and RE in the fsl_ssi_setup_ac97() that's called during probe(). So when running into the trigger(), it will always get the result of both TE and RE being enabled already, even if actually there is no

[PATCH v6 06/17] ASoC: fsl_ssi: Clear FIFO directly in fsl_ssi_config()

The FIFO clear helper function is just one line of code now. So it could be cleaned up by removing it and calling regmap directly. Meanwhile, FIFO clear could be applied to all use cases, not confined to AC97. So this patch also moves FIFO clear in the trigger() to fsl_ssi_config() and removes

[PATCH v6 13/17] ASoC: fsl_ssi: Setup AC97 in fsl_ssi_hw_init()

AC97 configures most of registers earlier to start a communication with CODECs in order to successfully initialize CODEC. Currently, _fsl_ssi_set_dai_fmt() and fsl_ssi_setup_ac97() are called to get all SSI registers properly set. Since now the driver has a fsl_ssi_hw_init() to handle all

[PATCH v6 17/17] ASoC: fsl_ssi: Use ssi->streams instead of reading register

Since ssi->streams is being updated along with SCR register and its SSIEN bit, it's simpler to use it instead. Signed-off-by: Nicolin Chen Tested-by: Caleb Crome Tested-by: Maciej S. Szmigiero Reviewed-by: Maciej S. Szmigiero

Re: [PATCH 4/5] mtd: Unconditionally update ->fail_addr and ->addr in part_erase()

Am Montag, 12. Februar 2018, 22:03:10 CET schrieb Boris Brezillon: > ->fail_addr and ->addr can be updated no matter the result of > parent->_erase(), we just need to remove the code doing the same thing > in mtd_erase_callback() to avoid adjusting those fields twice. > > Note that this can be

usleep_range without a range

scheduling can generally be better when these values are not identical. Perhaps these ranges should be expanded. $ git grep -P -n "usleep_range\s*\(\s*([\w\.\>\-]+)\s*,\s*\1\s*\)" drivers/clk/ux500/clk-sysctrl.c:45: usleep_range(clk->enable_delay_us, clk->enable_delay_us);

Re: [PATCH 5/5] mtd: Stop updating erase_info->state and calling mtd_erase_callback()

Am Montag, 12. Februar 2018, 22:03:11 CET schrieb Boris Brezillon: > MTD users are no longer checking erase_info->state to determine if the > erase operation failed or succeeded. Moreover, mtd_erase_callback() is > now a NOP. > > We can safely get rid of all mtd_erase_callback() calls and all >

Re: KVM compile error

Hello Michael, I compiled the RC1 of kernel 4.16 today. Unfortunately the issue with KVM still exists. I get the error 'label out defined but not used' (see error messages below). Link to the rc1 kernel config without KVM: http://www.xenosoft.de/cyrus-4.16-rc1.config Link to the git kernel

Re: Build regressions/improvements in v4.16-rc1

On Mon, Feb 12, 2018 at 11:28:32AM +0100, Geert Uytterhoeven wrote: > On Mon, Feb 12, 2018 at 11:17 AM, Geert Uytterhoeven > wrote: > > Below is the list of build error/warning regressions/improvements in > > v4.16-rc1[1] compared to v4.15[2]. > > > > Summarized: > > -

[PATCH 2/5] mtd: Get rid of unused fields in struct erase_info

Some fields are not used by MTD drivers, users or core code. Moreover, those fields are not documented, so get rid of them to avoid any confusion. Signed-off-by: Boris Brezillon --- include/linux/mtd/mtd.h | 5 - 1 file changed, 5 deletions(-) diff --git

[PATCH 1/5] mtd: Initialize ->fail_addr early in mtd_erase()

mtd_erase() can return an error before ->fail_addr is initialized to MTD_FAIL_ADDR_UNKNOWN. Move this initialization at the very beginning of the function. Signed-off-by: Boris Brezillon --- drivers/mtd/mtdcore.c | 3 ++- 1 file changed, 2 insertions(+), 1

[PATCH 4/5] mtd: Unconditionally update ->fail_addr and ->addr in part_erase()

->fail_addr and ->addr can be updated no matter the result of parent->_erase(), we just need to remove the code doing the same thing in mtd_erase_callback() to avoid adjusting those fields twice. Note that this can be done because all MTD users have been converted to not pass an

[PATCH 0/5] mtd: Simplify erase handling

Hello, This series aims at simplifying erase handling both in MTD drivers and MTD users code. Historically, the erase operation has been designed to be asynchronous, which, in theory, is a good thing since erasing a block usually takes longer that reading/writing to a flash. In practice, all

[PATCH 3/5] mtd: Stop assuming mtd_erase() is asynchronous

None of the mtd->_erase() implementations work in an asynchronous manner, so let's simplify MTD users that call mtd_erase(). All they need to do is check the value returned by mtd_erase() and assume that != 0 means failure. Signed-off-by: Boris Brezillon ---

[PATCH v6 05/17] ASoC: fsl_ssi: Rename fsl_ssi_disable_val macro

The define of fsl_ssi_disable_val is not so clear as it mixes two steps of calculations together. And those parameter names are also a bit long to read. Since it just tries to exclude the shared bits from the regvals of current stream while the opposite stream is active, it's better to use

[PATCH v6 07/17] ASoC: fsl_ssi: Clean up helper functions of trigger()

The trigger() calls fsl_ssi_tx_config() and fsl_ssi_rx_config(), and both of them jump to fsl_ssi_config(). And fsl_ssi_config() later calls another fsl_ssi_rxtx_config(). However, the whole routine, especially fsl_ssi_config() function, is too complicated because of the folowing reasons: 1) It

[PATCH v6 08/17] ASoC: fsl_ssi: Add DAIFMT define for AC97

The _fsl_ssi_set_dai_fmt() bypasses an undefined format for AC97 mode. However, it's not really necessary if AC97 has its complete format defined. So this patch adds a DAIFMT macro of complete format including a clock direction and polarity. Signed-off-by: Nicolin Chen

[PATCH v6 11/17] ASoC: fsl_ssi: Use snd_soc_init_dma_data instead

Since there is a helper function, use it to help readability. Signed-off-by: Nicolin Chen Tested-by: Caleb Crome Tested-by: Maciej S. Szmigiero Reviewed-by: Maciej S. Szmigiero ---

[PATCH v6 14/17] ASoC: fsl_ssi: Clean up _fsl_ssi_set_dai_fmt()

The _fsl_ssi_set_dai_fmt() is a helper function being called from fsl_ssi_set_dai_fmt() as an ASoC operation and fsl_ssi_hw_init() mainly for AC97 format initialization. This patch cleans the _fsl_ssi_set_dai_fmt() in following ways: * Removing *dev pointer in the parameters as it's included in

[PATCH v6 15/17] ASoC: fsl_ssi: Add bool synchronous to mark synchronous mode

Using symmetric_rates in the cpu_dai_drv is a bit implicit, so this patch adds a bool synchronous instead. Signed-off-by: Nicolin Chen Tested-by: Caleb Crome Tested-by: Maciej S. Szmigiero Reviewed-by: Maciej S. Szmigiero

[PATCH v6 16/17] ASoC: fsl_ssi: Move DT related code to a separate probe()

This patch cleans up probe() function by moving all Device Tree related code into a separate function. It allows the probe() to be Device Tree independent. This will be very useful for future integration of imx-ssi driver which has similar functionalities while exists only because it supports

[PATCH 1/2] powerpc/kdump: Add missing optional dummy functions

If KEXEC_CORE is not enabled, PowerNV builds fail as follows. arch/powerpc/platforms/powernv/smp.c: In function 'pnv_smp_cpu_kill_self': arch/powerpc/platforms/powernv/smp.c:236:4: error: implicit declaration of function 'crash_ipi_callback' Add dummy function calls, similar to

Re: [PATCH] headers: untangle kmemleak.h from mm.h

On 02/12/2018 04:28 AM, Michael Ellerman wrote: > Randy Dunlap writes: > >> From: Randy Dunlap >> >> Currently #includes for no obvious >> reason. It looks like it's only a convenience, so remove kmemleak.h >> from slab.h and add to any users of

[PATCH 5/5] mtd: Stop updating erase_info->state and calling mtd_erase_callback()

MTD users are no longer checking erase_info->state to determine if the erase operation failed or succeeded. Moreover, mtd_erase_callback() is now a NOP. We can safely get rid of all mtd_erase_callback() calls and all erase_info->state assignments. While at it, get rid of the erase_info->state

Re: [PATCH 1/2] powerpc/kdump: Add missing optional dummy functions

On Tue, Feb 13, 2018 at 9:34 AM, Guenter Roeck wrote: > If KEXEC_CORE is not enabled, PowerNV builds fail as follows. > > arch/powerpc/platforms/powernv/smp.c: In function 'pnv_smp_cpu_kill_self': > arch/powerpc/platforms/powernv/smp.c:236:4: error: > implicit

Re: [PATCH 2/5] mtd: Get rid of unused fields in struct erase_info

Am Montag, 12. Februar 2018, 22:03:08 CET schrieb Boris Brezillon: > Some fields are not used by MTD drivers, users or core code. Moreover, > those fields are not documented, so get rid of them to avoid any > confusion. > > Signed-off-by: Boris Brezillon > --- >

[PATCH v6 00/17] ASoC: fsl_ssi: Clean up - program flow level

[ The v6 just rebased the series and fixed the comments in probe(). There is no need to re-test it except the uncovered tests listed at the end of this cover letter. Timur, these patches have been in the list for quite a long time and there has been no review for nearly a month since

pata-macio WARNING at dmam_alloc_coherent+0xec/0x110

I tested 4.16-rc1 on my PowerMac G4 and got the following warning from macio pata driver. Since pata-macio has no recent changes, dma-mapping.h changes seem to be related. [0.228408] MacIO PCI driver attached to Keylargo chipset [1.283931] pata-macio 0.0001f000:ata-4: Activating

Re: [PATCH 2/4] powerpc/vas: Fix cleanup when VAS is not configured

Michael Ellerman [m...@ellerman.id.au] wrote: > Sukadev Bhattiprolu writes: > > > When VAS is not configured in the system, make sure to remove > > the VAS debugfs directory and unregister the platform driver. > > > > Signed-off-by: Sukadev Bhattiprolu

Re: [PATCH 1/5] mtd: Initialize ->fail_addr early in mtd_erase()

Am Montag, 12. Februar 2018, 22:03:07 CET schrieb Boris Brezillon: > mtd_erase() can return an error before ->fail_addr is initialized to > MTD_FAIL_ADDR_UNKNOWN. Move this initialization at the very beginning > of the function. > > Signed-off-by: Boris Brezillon >

[PATCH v6 02/17] ASoC: fsl_ssi: Keep ssi->i2s_net updated

The hw_params() overwrites i2s_net settings for special cases like mono-channel support, however, it doesn't update ssi->i2s_net as set_dai_fmt() does. This patch removes the local i2s_net variable and directly updates ssi->i2s_net in the hw_params() so that the driver can simply look up the

[PATCH v6 03/17] ASoC: fsl_ssi: Clean up set_dai_tdm_slot()

This patch replaces the register read with ssi->i2s_net for simplification. It also removes masking SSIEN from scr value since it's handled later by regmap_update_bits() to set this scr value back. Signed-off-by: Nicolin Chen Tested-by: Caleb Crome

[RFC PATCH] powerpc/mm/radix: Update pte fragment count from 16 to 256 on radix

This needs more performance test. But right now we are wasting lot of space in the level 4 page table. Signed-off-by: Aneesh Kumar K.V --- arch/powerpc/include/asm/book3s/64/hash-64k.h | 9 - arch/powerpc/include/asm/book3s/64/radix-64k.h | 8

Re: [RFC PATCH] powerpc/mm/radix: Update pte fragment count from 16 to 256 on radix

"Aneesh Kumar K.V" writes: > This needs more performance test. But right now we are wasting lot of space > in the level 4 page table. > > Signed-off-by: Aneesh Kumar K.V > --- > arch/powerpc/include/asm/book3s/64/hash-64k.h | 9

[PATCH] powerpc/xmon: Dont register sysrq key when kernel param xmon=off

Presently sysrq key for xmon('x') is registered during kernel init irrespective of the value of kernel param 'xmon'. Thus xmon is enabled even if 'xmon=off' is passed on the kernel command line. This minor patch updates setup_xmon_sysrq() to register 'sysrq_xmon_op' only when variable 'xmon_on'

Re: [PATCH 2/4] powerpc/vas: Fix cleanup when VAS is not configured

Sukadev Bhattiprolu writes: > Michael Ellerman [m...@ellerman.id.au] wrote: >> Sukadev Bhattiprolu writes: >> >> > When VAS is not configured in the system, make sure to remove >> > the VAS debugfs directory and unregister the platform

[PATCH] powerpc/npu-dma.c: Fix deadlock in mmio_invalidate

When sending TLB invalidates to the NPU we need to send extra flushes due to a hardware issue. The original implementation would lock the all the ATSD MMIO registers sequentially before unlocking and relocking each of them sequentially to do the extra flush. This introduced a deadlock as it is

Re: samples/seccomp/ broken when cross compiling s390, ppc allyesconfig

Michal Hocko writes: > Hi, > my build test machinery chokes on samples/seccomp when cross compiling > s390 and ppc64 allyesconfig. This has been the case for quite some > time already but I never found time to look at the problem and report > it. It seems this is not new issue

[RFC][PATCH bpf v2 1/2] bpf: allow 64-bit offsets for bpf function calls

The imm field of a bpf_insn is a signed 32-bit integer. For JIT-ed bpf-to-bpf function calls, it stores the offset from __bpf_call_base to the start of the callee function. For some architectures, such as powerpc64, it was found that this offset may be as large as 64 bits because of which this

Re: [PATCH] powerpc/npu-dma.c: Fix crash after __mmu_notifier_register failure

Thanks Mark, this will also fix the lack of cleanup OPAL call in the unlikely case the kzalloc() fails. Acked-By: Alistair Popple On Friday, 9 February 2018 7:20:06 PM AEDT Mark Hairgrove wrote: > pnv_npu2_init_context wasn't checking the return code from >

[RFC][PATCH bpf v2 2/2] bpf: powerpc64: add JIT support for multi-function programs

This adds support for bpf-to-bpf function calls for the powerpc64 JIT compiler. After a round of the usual JIT passes, the offsets to callee functions from __bpf_call_base are known. To update the target addresses for the branch instructions associated with each BPF_CALL, an extra pass is

Re: [PATCH 1/2] powerpc/kdump: Add missing optional dummy functions

On Tue, Feb 13, 2018 at 10:01:57AM +1100, Balbir Singh wrote: > On Tue, Feb 13, 2018 at 9:34 AM, Guenter Roeck wrote: > > If KEXEC_CORE is not enabled, PowerNV builds fail as follows. > > > > arch/powerpc/platforms/powernv/smp.c: In function 'pnv_smp_cpu_kill_self': > >

Re: [PATCH] cxl: Remove function write_timebase_ctrl_psl9() for PSL9

On 09/02/18 15:10, Vaibhav Jain wrote: For PSL9 the time-base enable bit has moved from PSL_TB_CTLSTAT register to PSL_CONTROL register. Hence we don't need an sl_ops implementation for 'write_timebase_ctrl' for PSL9. Hence this patch removes function write_timebase_ctrl_psl9() and its

Re: [PATCH v2] mm: hwpoison: disable memory error handling on 1GB hugepage

Andrew Morton writes: > On Thu, 08 Feb 2018 12:30:45 + Punit Agrawal > wrote: > >> > >> > So I don't think that the above test result means that errors are properly >> > handled, and the proposed patch should help for arm64. >> >>

Re: [PATCH] cxl: Enable NORST bit in PSL_DEBUG register for PSL9

On 09/02/18 15:09, Vaibhav Jain wrote: We enable the NORST bit by default for debug afu images to prevent reset of AFU trace-data on a PCI link drop. For production AFU images this bit is always ignored and PSL gets reconfigured anyways thereby resetting the trace data. So setting this bit for

Re: pata-macio WARNING at dmam_alloc_coherent+0xec/0x110

On Mon, Feb 12, 2018 at 10:52:46PM +0200, Meelis Roos wrote: > I tested 4.16-rc1 on my PowerMac G4 and got the following warning from > macio pata driver. Since pata-macio has no recent changes, dma-mapping.h > changes seem to be related. Thje are, as they add just that warning. But the root

[RFC PATCH] powerpc/mm/hugetlb: initialize the pagetable cache correctly for hugetlb

With 64k page size, we have hugetlb pte entries at the pmd and pud level for book3s64. We don't need to create a separate page table cache for that. With 4k we need to make sure hugepd page table cache for 16M is placed at PUD level and 16G at the PGD level. Simplify all these by not using

Re: [PATCH] powerpc/npu-dma.c: Fix deadlock in mmio_invalidate

On Tue, 13 Feb 2018 14:17:34 +1100 Alistair Popple wrote: > When sending TLB invalidates to the NPU we need to send extra flushes due > to a hardware issue. The original implementation would lock the all the > ATSD MMIO registers sequentially before unlocking and relocking

Re: [PATCH v7 00/24] Speculative page faults

On 08/02/2018 21:53, Andrew Morton wrote: > On Tue, 6 Feb 2018 17:49:46 +0100 Laurent Dufour > wrote: > >> This is a port on kernel 4.15 of the work done by Peter Zijlstra to >> handle page fault without holding the mm semaphore [1]. >> >> The idea is to try to

[PATCH] powerpc/powernv: IMC fix out of bounds memory access at shutdown

The OPAL IMC driver's shutdown handler disables nest PMU counters by walking nodes and taking the first CPU out of their cpumask, which is used to index into the paca (get_hard_smp_processor_id()). This does not always do the right thing, and in particular for CPU-less nodes it returns NR_CPUS and

[PATCH] selftests/powerpc: Fix: use ucontext_t instead of struct ucontext

With glibc 2.26 'struct ucontext' is removed to improve POSIX compliance, which breaks powerpc/alignment_handler selftest. Fix the test by using ucontext_t. Tested on ppc, works with older glibc versions as well. Fixes the following: alignment_handler.c: In function ‘sighandler’:

[RFC] powerpc/radix/hotunplug: Atomically replace pte entries

The current approach uses stop machine for atomicity while removing a smaller range from a larger mapping. For example, while trying to hotunplug 256MiB from a 1GiB range, we split the mappings into the next slower size (2MiB). This is done using stop machine. This approach atomically replaces the

[PATCH kernel] powerpc/npu: Do not try invalidating 32bit table when 64bit table is enabled

GPUs and the corresponding NVLink bridges get different PEs as they have separate translation validation entries (TVEs). We put these PEs to the same IOMMU group so they cannot be passed through separately. So the iommu_table_group_ops::set_window/unset_window for GPUs do set tables to the NPU PEs

Re: samples/seccomp/ broken when cross compiling s390, ppc allyesconfig

On Mon, Feb 12, 2018 at 7:25 PM, Michael Ellerman wrote: > Michal Hocko writes: >> Hi, >> my build test machinery chokes on samples/seccomp when cross compiling >> s390 and ppc64 allyesconfig. This has been the case for quite some >> time already but I

Re: [PATCH v2] powerpc/npu: Cleanup MMIO ATSD flushing

On Wed, Feb 7, 2018 at 2:14 PM, Alistair Popple wrote: > On Tuesday, 16 January 2018 3:15:05 PM AEDT Alistair Popple wrote: >> Thanks Balbir, one question below. I have no way of testing this at present >> but >> it looks ok to me. Thanks! > > The below are more future

Re: [PATCH v2 04/13] lpfc: Add push-to-adapter support to sli4

Johannes Thumshirn writes: > On Wed, Feb 07, 2018 at 10:51:57AM +0100, Johannes Thumshirn wrote: >> > + /* Enable combined writes for DPP aperture */ >> > + pg_addr = (unsigned long)(wq->dpp_regaddr) & PAGE_MASK; >> > +#ifdef CONFIG_X86 >> >