[llvm-branch-commits] [mlir] [mlir][memref] Remove runtime verification for `memref.reinterpret_cast` (PR #132547)

2025-03-24 Thread via llvm-branch-commits
https://github.com/MaheshRavishankar commented: I think this is OK, but when we create a new memref, dont we want to verify that the strides specified dont make it such that accessing using strides goes out of bounds? https://github.com/llvm/llvm-project/pull/132547 ___

[llvm-branch-commits] [LoongArch][MC] Add relocation support for fld fst [x]vld [x]vst (PR #133225)

2025-03-27 Thread via llvm-branch-commits
https://github.com/wangleiat updated https://github.com/llvm/llvm-project/pull/133225 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [DAG][AArch64] Handle truncated buildvectors to allow and(subvector(anyext)) fold. (PR #133915)

2025-04-02 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-backend-aarch64 Author: David Green (davemgreen) Changes This fold was not handling the extended BUILDVECTORs that we see when i8/i16 are not legal types. Using isConstOrConstSplat(N1, false, true) allows it to match truncated constants. The other chan

[llvm-branch-commits] [llvm] Bump version to 20.1.3 (PR #134187)

2025-04-03 Thread via llvm-branch-commits
github-actions[bot] wrote: @tstellar (or anyone else). If you would like to add a note about this fix in the release notes (completely optional). Please reply to this comment with a one or two sentence description of the fix. When you are done, please add the release:note label to this PR.

[llvm-branch-commits] [lldb] release/20.x: [lldb] Use correct path for lldb-server executable (#131519) (PR #134072)

2025-04-02 Thread via llvm-branch-commits
https://github.com/llvmbot milestoned https://github.com/llvm/llvm-project/pull/134072 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [lldb] release/20.x: [lldb] Use correct path for lldb-server executable (#131519) (PR #134072)

2025-04-02 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-lldb Author: None (llvmbot) Changes Backport 945c494e2c3c078e26ff521ef3e9455e0ff764ac Requested by: @DavidSpickett --- Full diff: https://github.com/llvm/llvm-project/pull/134072.diff 1 Files Affected: - (modified) lldb/tools/lldb-server/lldb-platfo

[llvm-branch-commits] [llvm] release/20.x: [TailDuplicator] Determine if computed gotos using `blockaddress` (#132536) (PR #133082)

2025-04-02 Thread via llvm-branch-commits
dianqk wrote: > This introduces an ABI change, I think. It modifies `isIndirectBranch` and > removes ` isComputedGoto` Although I could add a deprecation warning, this might also be considered an "ABI" break, so I removed these changes. https://github.com/llvm/llvm-project/pull/133082 ___

[llvm-branch-commits] [llvm] release/20.x: Avoid a race condition in opt-viewer/optrecord (#131214) (PR #134058)

2025-04-02 Thread via llvm-branch-commits
https://github.com/llvmbot milestoned https://github.com/llvm/llvm-project/pull/134058 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] release/20.x: Avoid a race condition in opt-viewer/optrecord (#131214) (PR #134058)

2025-04-02 Thread via llvm-branch-commits
llvmbot wrote: @serge-sans-paille What do you think about merging this PR to the release branch? https://github.com/llvm/llvm-project/pull/134058 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/ma

[llvm-branch-commits] [llvm] release/20.x: [TailDuplicator] Determine if computed gotos using `blockaddress` (#132536) (PR #133082)

2025-04-02 Thread via llvm-branch-commits
https://github.com/dianqk updated https://github.com/llvm/llvm-project/pull/133082 >From 6a8abf2eb3fae7cd8da3ca3f0d97c3baa06f518e Mon Sep 17 00:00:00 2001 From: dianqk Date: Wed, 26 Mar 2025 21:27:43 +0800 Subject: [PATCH] [TailDuplicator] Determine if computed gotos using `blockaddress` (#132

[llvm-branch-commits] [llvm] release/20.x: [GlobalMerge][PPC] Don't merge globals in llvm.metadata section (#131801) (PR #134052)

2025-04-02 Thread via llvm-branch-commits
llvmbot wrote: @amy-kwan What do you think about merging this PR to the release branch? https://github.com/llvm/llvm-project/pull/134052 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/list

[llvm-branch-commits] [clang] adbf46d - Revert "Enable unnecessary-virtual-specifier by default (#133265)"

2025-04-02 Thread via llvm-branch-commits
Author: Nikolas Klauser Date: 2025-04-02T17:53:29+02:00 New Revision: adbf46d2b5b226452eee71825dd26b4414617f7d URL: https://github.com/llvm/llvm-project/commit/adbf46d2b5b226452eee71825dd26b4414617f7d DIFF: https://github.com/llvm/llvm-project/commit/adbf46d2b5b226452eee71825dd26b4414617f7d.dif

[llvm-branch-commits] [llvm] [ctxprof][nfc] Make `computeImportForFunction` a member of `ModuleImportsManager` (PR #134011)

2025-04-02 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-lto Author: Mircea Trofin (mtrofin) Changes --- Full diff: https://github.com/llvm/llvm-project/pull/134011.diff 1 Files Affected: - (modified) llvm/lib/Transforms/IPO/FunctionImport.cpp (+14-12) ``diff diff --git a/llvm/lib/Transforms/IP

[llvm-branch-commits] [clang] release/20.x: [clang] Do not infer lifetimebound for functions with void return type (#131997) (PR #133998)

2025-04-02 Thread via llvm-branch-commits
https://github.com/llvmbot created https://github.com/llvm/llvm-project/pull/133998 Backport 65ee2813f9f9a8cd11c5e9ea372da7d12867b52f Requested by: @cor3ntin >From 81e0cf124e5ba336311139917c0e5c80d51e7479 Mon Sep 17 00:00:00 2001 From: Utkarsh Saxena Date: Mon, 24 Mar 2025 17:42:33 +0100 Subj

[llvm-branch-commits] [llvm] release/20.x: [GlobalMerge][PPC] Don't merge globals in llvm.metadata section (#131801) (PR #134052)

2025-04-02 Thread via llvm-branch-commits
https://github.com/llvmbot created https://github.com/llvm/llvm-project/pull/134052 Backport 9356091a98c24718572f99b51553838ed664b67a Requested by: @nikic >From 542310684354c41f148b8b74f8d4ab6247d85b62 Mon Sep 17 00:00:00 2001 From: Nikita Popov Date: Wed, 2 Apr 2025 16:40:53 +0800 Subject: [

[llvm-branch-commits] [llvm] [SPARC][MC] Add tests for VIS family instructions (PR #130967)

2025-04-02 Thread via llvm-branch-commits
https://github.com/koachan updated https://github.com/llvm/llvm-project/pull/130967 >From e2e0d44800b65a8fbddd6234c2ee9f83af92d7da Mon Sep 17 00:00:00 2001 From: Koakuma Date: Wed, 12 Mar 2025 21:14:42 +0700 Subject: [PATCH 1/4] Add missing NO-VIS lines Created using spr 1.3.5 --- llvm/test/M

[llvm-branch-commits] [llvm] [ctxprof] Don't import roots elsewhere (PR #134012)

2025-04-02 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-llvm-transforms Author: Mircea Trofin (mtrofin) Changes Block a context root from being imported by its callers. Suppose that happened. Its caller - usually a message pump - inlines its copy of the root. Then it (the root) and whatever it calls will b

[llvm-branch-commits] [llvm] eec5039 - Revert "[Metadata] Preserve MD_prof when merging instructions when one is mis…"

2025-04-04 Thread via llvm-branch-commits
Author: Snehasish Kumar Date: 2025-04-02T22:08:33-07:00 New Revision: eec5039bb4f01dd3067fce475ff8bf65297ed4ba URL: https://github.com/llvm/llvm-project/commit/eec5039bb4f01dd3067fce475ff8bf65297ed4ba DIFF: https://github.com/llvm/llvm-project/commit/eec5039bb4f01dd3067fce475ff8bf65297ed4ba.dif

[llvm-branch-commits] [libcxx] release/20.x: [libc++] Fix deployment targets that were incorrectly bumped (#134278) (PR #134435)

2025-04-04 Thread via llvm-branch-commits
https://github.com/llvmbot milestoned https://github.com/llvm/llvm-project/pull/134435 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [clang] 63bf5d5 - Revert "[clang] add support for -Wpadded on Windows (#130182)"

2025-04-04 Thread via llvm-branch-commits
Author: Alex Bradbury Date: 2025-04-03T13:12:30+01:00 New Revision: 63bf5d531c46cbc9c1571debf285fc51463f007d URL: https://github.com/llvm/llvm-project/commit/63bf5d531c46cbc9c1571debf285fc51463f007d DIFF: https://github.com/llvm/llvm-project/commit/63bf5d531c46cbc9c1571debf285fc51463f007d.diff

[llvm-branch-commits] [lldb] release/20.x: [lldb] Use correct path for lldb-server executable (#131519) (PR #134072)

2025-04-04 Thread via llvm-branch-commits
llvmbot wrote: @labath What do you think about merging this PR to the release branch? https://github.com/llvm/llvm-project/pull/134072 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listin

[llvm-branch-commits] [llvm] release/20.x: [GlobalMerge][PPC] Don't merge globals in llvm.metadata section (#131801) (PR #134052)

2025-04-04 Thread via llvm-branch-commits
https://github.com/llvmbot milestoned https://github.com/llvm/llvm-project/pull/134052 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] AMDGPU/GlobalISel: add RegBankLegalize rules for extends and trunc (PR #132383)

2025-04-04 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-backend-amdgpu Author: Petar Avramovic (petar-avramovic) Changes Uniform S1: Truncs to uniform S1 and AnyExts from S1 are left as is as they are meant to be combined away. Uniform S1 ZExt and SExt are lowered using select. Divergent S1: Trunc of VGPR to

[llvm-branch-commits] [clang] [RISCV][Driver] Add riscv emulation mode to linker job of BareMetal toolchain (PR #134442)

2025-04-04 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-clang-driver Author: Garvit Gupta (quic-garvgupt) Changes --- Full diff: https://github.com/llvm/llvm-project/pull/134442.diff 2 Files Affected: - (modified) clang/lib/Driver/ToolChains/BareMetal.cpp (+8-5) - (modified) clang/test/Driver/baremetal.

[llvm-branch-commits] [llvm] release/20.x: [HEXAGON] Add support to lower "FREEZE a half(f16)" instruction on Hexagon and fix the isel-buildvector-v2f16.ll assertion (#130977) (PR #132138)

2025-04-04 Thread via llvm-branch-commits
https://github.com/llvmbot milestoned https://github.com/llvm/llvm-project/pull/132138 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] release/20.x: [GlobalMerge][PPC] Don't merge globals in llvm.metadata section (#131801) (PR #134052)

2025-04-04 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-backend-powerpc Author: None (llvmbot) Changes Backport 9356091a98c24718572f99b51553838ed664b67a Requested by: @nikic --- Full diff: https://github.com/llvm/llvm-project/pull/134052.diff 2 Files Affected: - (modified) llvm/lib/CodeGen/GlobalMerge.cp

[llvm-branch-commits] [llvm] [SelectionDAG] Widen <2 x T> vector types for atomic load (PR #120598)

2025-05-07 Thread via llvm-branch-commits
https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/120598 >From 99a560ff2b72ea0dd90c16fedeaac27820398079 Mon Sep 17 00:00:00 2001 From: jofrn Date: Thu, 19 Dec 2024 11:19:39 -0500 Subject: [PATCH] [SelectionDAG] Widen <2 x T> vector types for atomic load Vector types of

[llvm-branch-commits] [llvm] [SelectionDAG] Split vector types for atomic load (PR #120640)

2025-05-07 Thread via llvm-branch-commits
https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/120640 >From 0e4399dc220b175e78ad110118635bf5e843d768 Mon Sep 17 00:00:00 2001 From: jofrn Date: Thu, 19 Dec 2024 16:25:55 -0500 Subject: [PATCH] [SelectionDAG] Split vector types for atomic load Vector types that aren'

[llvm-branch-commits] [llvm] [X86] Add atomic vector tests for unaligned >1 sizes. (PR #120387)

2025-05-07 Thread via llvm-branch-commits
https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/120387 >From 5ce8ea6a12090d66e6bacceea9837c54ee83 Mon Sep 17 00:00:00 2001 From: jofrn Date: Wed, 18 Dec 2024 03:40:32 -0500 Subject: [PATCH] [X86] Add atomic vector tests for unaligned >1 sizes. Unaligned atomic ve

[llvm-branch-commits] [llvm] [X86] Manage atomic load of fp -> int promotion in DAG (PR #120386)

2025-05-07 Thread via llvm-branch-commits
https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/120386 >From 531bc05506d196392d1aac609049bda9cad7da01 Mon Sep 17 00:00:00 2001 From: jofrn Date: Wed, 18 Dec 2024 03:38:23 -0500 Subject: [PATCH] [X86] Manage atomic load of fp -> int promotion in DAG When lowering atom

[llvm-branch-commits] [llvm] [SelectionDAG] Legalize <1 x T> vector types for atomic load (PR #120385)

2025-05-07 Thread via llvm-branch-commits
https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/120385 >From 08e39f28a1f041a72bbbf3ebe520f9136e5aebbc Mon Sep 17 00:00:00 2001 From: jofrn Date: Wed, 18 Dec 2024 03:37:17 -0500 Subject: [PATCH] [SelectionDAG] Legalize <1 x T> vector types for atomic load `load atomic

[llvm-branch-commits] [llvm] [X86] Add atomic vector tests for unaligned >1 sizes. (PR #120387)

2025-05-07 Thread via llvm-branch-commits
https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/120387 >From 5ce8ea6a12090d66e6bacceea9837c54ee83 Mon Sep 17 00:00:00 2001 From: jofrn Date: Wed, 18 Dec 2024 03:40:32 -0500 Subject: [PATCH] [X86] Add atomic vector tests for unaligned >1 sizes. Unaligned atomic ve

[llvm-branch-commits] [llvm] [SelectionDAG] Widen <2 x T> vector types for atomic load (PR #120598)

2025-05-07 Thread via llvm-branch-commits
https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/120598 >From 99a560ff2b72ea0dd90c16fedeaac27820398079 Mon Sep 17 00:00:00 2001 From: jofrn Date: Thu, 19 Dec 2024 11:19:39 -0500 Subject: [PATCH] [SelectionDAG] Widen <2 x T> vector types for atomic load Vector types of

[llvm-branch-commits] [llvm] [X86] Manage atomic load of fp -> int promotion in DAG (PR #120386)

2025-05-07 Thread via llvm-branch-commits
https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/120386 >From 531bc05506d196392d1aac609049bda9cad7da01 Mon Sep 17 00:00:00 2001 From: jofrn Date: Wed, 18 Dec 2024 03:38:23 -0500 Subject: [PATCH] [X86] Manage atomic load of fp -> int promotion in DAG When lowering atom

[llvm-branch-commits] [llvm] [X86] Remove extra MOV after widening atomic load (PR #138635)

2025-05-07 Thread via llvm-branch-commits
https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/138635 >From 5b5d94887ed368de16e1395727295527ff67b471 Mon Sep 17 00:00:00 2001 From: jofernau_amdeng Date: Tue, 6 May 2025 01:48:11 -0400 Subject: [PATCH] [X86] Remove extra MOV after widening atomic load This change ad

[llvm-branch-commits] [llvm] [AtomicExpand] Add bitcasts when expanding load atomic vector (PR #120716)

2025-05-07 Thread via llvm-branch-commits
https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/120716 >From 72fd8a6b0d8d304992a804e7e05367389feedc2c Mon Sep 17 00:00:00 2001 From: jofrn Date: Fri, 20 Dec 2024 06:14:28 -0500 Subject: [PATCH] [AtomicExpand] Add bitcasts when expanding load atomic vector AtomicExpan

[llvm-branch-commits] [llvm] [SelectionDAG] Split vector types for atomic load (PR #120640)

2025-05-07 Thread via llvm-branch-commits
https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/120640 >From 0e4399dc220b175e78ad110118635bf5e843d768 Mon Sep 17 00:00:00 2001 From: jofrn Date: Thu, 19 Dec 2024 16:25:55 -0500 Subject: [PATCH] [SelectionDAG] Split vector types for atomic load Vector types that aren'

[llvm-branch-commits] [llvm] [X86] Manage atomic load of fp -> int promotion in DAG (PR #120386)

2025-05-07 Thread via llvm-branch-commits
https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/120386 >From 531bc05506d196392d1aac609049bda9cad7da01 Mon Sep 17 00:00:00 2001 From: jofrn Date: Wed, 18 Dec 2024 03:38:23 -0500 Subject: [PATCH] [X86] Manage atomic load of fp -> int promotion in DAG When lowering atom

[llvm-branch-commits] [llvm] [SelectionDAG] Legalize <1 x T> vector types for atomic load (PR #120385)

2025-05-07 Thread via llvm-branch-commits
https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/120385 >From 08e39f28a1f041a72bbbf3ebe520f9136e5aebbc Mon Sep 17 00:00:00 2001 From: jofrn Date: Wed, 18 Dec 2024 03:37:17 -0500 Subject: [PATCH] [SelectionDAG] Legalize <1 x T> vector types for atomic load `load atomic

[llvm-branch-commits] [llvm] [X86] Add atomic vector tests for unaligned >1 sizes. (PR #120387)

2025-05-07 Thread via llvm-branch-commits
https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/120387 >From 5ce8ea6a12090d66e6bacceea9837c54ee83 Mon Sep 17 00:00:00 2001 From: jofrn Date: Wed, 18 Dec 2024 03:40:32 -0500 Subject: [PATCH] [X86] Add atomic vector tests for unaligned >1 sizes. Unaligned atomic ve

[llvm-branch-commits] [llvm] [SelectionDAG] Widen <2 x T> vector types for atomic load (PR #120598)

2025-05-07 Thread via llvm-branch-commits
https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/120598 >From 99a560ff2b72ea0dd90c16fedeaac27820398079 Mon Sep 17 00:00:00 2001 From: jofrn Date: Thu, 19 Dec 2024 11:19:39 -0500 Subject: [PATCH] [SelectionDAG] Widen <2 x T> vector types for atomic load Vector types of

[llvm-branch-commits] [clang] clang/OpenCL: Fix special casing OpenCL in call emission (PR #138864)

2025-05-07 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-clang-codegen Author: Matt Arsenault (arsenm) Changes This essentially reverts 1bf1a156d673. OpenCL's handling of address spaces has always been a mess, but it's better than it used to be so this hack appears to be unnecessary now. None of the code her

[llvm-branch-commits] [clang] [llvm] Enable fexec-charset option (PR #138895)

2025-05-07 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-clang Author: Abhina Sree (abhina-sree) Changes This patch enables the fexec-charset option to control the execution charset of string literals. It sets the default internal charset, system charset, and execution charset for z/OS and UTF-8 for all othe

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port ProcessImplicitDefs to NPM (PR #138829)

2025-05-07 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-backend-x86 Author: Akshat Oke (optimisan) Changes AMDGPU/llc-pipeline-npm.ll test update is because the dummy class name is now changed to its CL name. --- Patch is 22.56 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-

[llvm-branch-commits] [llvm] 137a062 - Revert "[RISCV] Initial codegen support for zvqdotq extension (#137039)"

2025-05-07 Thread via llvm-branch-commits
Author: Philip Reames Date: 2025-05-07T08:18:37-07:00 New Revision: 137a062e2185cdd797c0c009f556a200e8194009 URL: https://github.com/llvm/llvm-project/commit/137a062e2185cdd797c0c009f556a200e8194009 DIFF: https://github.com/llvm/llvm-project/commit/137a062e2185cdd797c0c009f556a200e8194009.diff

[llvm-branch-commits] [mlir] [mlir][MemRef] Use specialized index ops to fold expand/collapse_shape (PR #138930)

2025-05-07 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-mlir Author: Krzysztof Drewniak (krzysz00) Changes This PR updates the FoldMemRefAliasOps to use `affine.linearize_index` and `affine.delinearize_index` to perform the index computations needed to fold a `memref.expand_shape` or `memref.collapse_shape`

[llvm-branch-commits] [mlir] [mlir][MemRef] Use specialized index ops to fold expand/collapse_shape (PR #138930)

2025-05-07 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-mlir-memref Author: Krzysztof Drewniak (krzysz00) Changes This PR updates the FoldMemRefAliasOps to use `affine.linearize_index` and `affine.delinearize_index` to perform the index computations needed to fold a `memref.expand_shape` or `memref.collapse

[llvm-branch-commits] [llvm] [CodeGen][NPM] Register Function Passes (PR #138828)

2025-05-07 Thread via llvm-branch-commits
https://github.com/paperchalice edited https://github.com/llvm/llvm-project/pull/138828 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [CodeGen][NPM] Port ProcessImplicitDefs to NPM (PR #138829)

2025-05-07 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-llvm-regalloc Author: Akshat Oke (optimisan) Changes AMDGPU/llc-pipeline-npm.ll test update is because the dummy class name is now changed to its CL name. --- Patch is 22.56 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llv

[llvm-branch-commits] [llvm] release/20.x: Fix crash lowering stack guard on OpenBSD/aarch64. (#125416) (PR #136458)

2025-05-07 Thread via llvm-branch-commits
https://github.com/Sterling-Augustine updated https://github.com/llvm/llvm-project/pull/136458 Rate limit · GitHub body { background-color: #f6f8fa; color: #24292e; font-family: -apple-system,BlinkMacSystemFont,Segoe UI,Helvetica,A

[llvm-branch-commits] [llvm] release/20.x: Fix crash lowering stack guard on OpenBSD/aarch64. (#125416) (PR #136458)

2025-05-07 Thread via llvm-branch-commits
https://github.com/Sterling-Augustine approved this pull request. https://github.com/llvm/llvm-project/pull/136458 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commi

[llvm-branch-commits] [llvm] [AMDGPU][NPM] Fill in addPreSched2 passes (PR #139516)

2025-05-12 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-backend-amdgpu Author: Akshat Oke (optimisan) Changes --- Full diff: https://github.com/llvm/llvm-project/pull/139516.diff 3 Files Affected: - (modified) llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp (+6) - (modified) llvm/lib/Target/AMDGPU/AMDGPU

[llvm-branch-commits] [llvm] [CodeGen][NPM] Introduce FreeAllAnalysesPass (PR #139517)

2025-05-12 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-backend-amdgpu Author: Akshat Oke (optimisan) Changes This replaces the Invalidate pass. There are no cross-function analysis requirements right now, so clearing all analyses works for the last pass in the pipeline. --- Havi

[llvm-branch-commits] [llvm] [RISCV][MC] Add Q support for Zfa (PR #139508)

2025-05-12 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-mc Author: Iris Shi (el-ev) Changes --- Patch is 25.59 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/139508.diff 5 Files Affected: - (modified) llvm/lib/Target/RISCV/RISCVInstrInfoZfa.td (+29) - (added

[llvm-branch-commits] [clang] [llvm] Enable fexec-charset option (PR #138895)

2025-05-12 Thread via llvm-branch-commits
@@ -1842,23 +1859,52 @@ CharLiteralParser::CharLiteralParser(const char *begin, const char *end, HadError = true; PP.Diag(Loc, diag::err_character_too_large); } + if (!HadError && Converter) { +assert(Kind != tok::wide_cha

[llvm-branch-commits] [clang] [llvm] Enable fexec-charset option (PR #138895)

2025-05-12 Thread via llvm-branch-commits
@@ -1842,23 +1859,52 @@ CharLiteralParser::CharLiteralParser(const char *begin, const char *end, HadError = true; PP.Diag(Loc, diag::err_character_too_large); } + if (!HadError && Converter) { +assert(Kind != tok::wide_cha

[llvm-branch-commits] [clang] [llvm] Enable fexec-charset option (PR #138895)

2025-05-12 Thread via llvm-branch-commits
@@ -146,6 +144,8 @@ static unsigned ProcessCharEscape(const char *ThisTokBegin, // that would have been \", which would not have been the end of string. unsigned ResultChar = *ThisTokBuf++; char Escape = ResultChar; + bool Translate = true; cor3ntin wrot

[llvm-branch-commits] [clang] [llvm] Enable fexec-charset option (PR #138895)

2025-05-12 Thread via llvm-branch-commits
@@ -416,8 +416,7 @@ Builtin Macros ``__clang_literal_encoding__`` Defined to a narrow string literal that represents the current encoding of narrow string literals, e.g., ``"hello"``. This macro typically expands to - "UTF-8" (but may change in the future if the - ``-fexe

[llvm-branch-commits] [clang] [llvm] Enable fexec-charset option (PR #138895)

2025-05-12 Thread via llvm-branch-commits
@@ -246,18 +249,19 @@ class StringLiteralParser { StringLiteralEvalMethod EvalMethod; public: - StringLiteralParser(ArrayRef StringToks, Preprocessor &PP, - StringLiteralEvalMethod StringMethod = - StringLiteralEvalMethod::Evalu

[llvm-branch-commits] [clang] [llvm] Enable fexec-charset option (PR #138895)

2025-05-12 Thread via llvm-branch-commits
@@ -0,0 +1,36 @@ +//===--- clang/Lex/LiteralConverter.h - Translator for Literals -*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apa

[llvm-branch-commits] [clang] [llvm] Enable fexec-charset option (PR #138895)

2025-05-12 Thread via llvm-branch-commits
@@ -0,0 +1,36 @@ +//===--- clang/Lex/LiteralConverter.h - Translator for Literals -*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apa

[llvm-branch-commits] [clang] [llvm] Enable fexec-charset option (PR #138895)

2025-05-12 Thread via llvm-branch-commits
@@ -491,6 +491,9 @@ class Triple { /// For example, "fooos1.2.3" would return "1.2.3". StringRef getEnvironmentVersionString() const; + /// getSystemCharset - Get the system charset of the triple. + StringRef getSystemCharset() const; + cor3ntin wrote:

[llvm-branch-commits] [clang] [llvm] Enable fexec-charset option (PR #138895)

2025-05-12 Thread via llvm-branch-commits
@@ -367,6 +370,15 @@ static unsigned ProcessCharEscape(const char *ThisTokBegin, HadError = true; } + if (Translate && Converter) { +// Invalid escapes are written as '?' and then translated. +char ByteChar = Invalid ? '?' : ResultChar; +SmallString<8> Resul

[llvm-branch-commits] [clang] [llvm] Enable fexec-charset option (PR #138895)

2025-05-12 Thread via llvm-branch-commits
@@ -0,0 +1,36 @@ +//===--- clang/Lex/LiteralConverter.h - Translator for Literals -*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apa

[llvm-branch-commits] [clang] [llvm] Enable fexec-charset option (PR #138895)

2025-05-12 Thread via llvm-branch-commits
@@ -633,6 +633,9 @@ class LangOptions : public LangOptionsBase { bool AtomicFineGrainedMemory = false; bool AtomicIgnoreDenormalMode = false; + /// Name of the exec charset to convert the internal charset to. + std::string ExecCharset; cor3ntin wrote: L

[llvm-branch-commits] [llvm] [SelectionDAG] Split vector types for atomic load (PR #120640)

2025-05-11 Thread via llvm-branch-commits
https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/120640 >From 4fccbd69f8ee5b6f16b08da38cb65d989450c8aa Mon Sep 17 00:00:00 2001 From: jofrn Date: Thu, 19 Dec 2024 16:25:55 -0500 Subject: [PATCH] [SelectionDAG] Split vector types for atomic load Vector types that aren'

[llvm-branch-commits] [llvm] [SelectionDAG] Split vector types for atomic load (PR #120640)

2025-05-11 Thread via llvm-branch-commits
https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/120640 >From 4fccbd69f8ee5b6f16b08da38cb65d989450c8aa Mon Sep 17 00:00:00 2001 From: jofrn Date: Thu, 19 Dec 2024 16:25:55 -0500 Subject: [PATCH] [SelectionDAG] Split vector types for atomic load Vector types that aren'

[llvm-branch-commits] [llvm] [AtomicExpand] Add bitcasts when expanding load atomic vector (PR #120716)

2025-05-11 Thread via llvm-branch-commits
https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/120716 >From 717ea645df30178ab0873da4191d41bc7ba4b761 Mon Sep 17 00:00:00 2001 From: jofrn Date: Fri, 20 Dec 2024 06:14:28 -0500 Subject: [PATCH] [AtomicExpand] Add bitcasts when expanding load atomic vector AtomicExpan

[llvm-branch-commits] [llvm] [SelectionDAG][X86] Remove unused elements from atomic vector. (PR #125432)

2025-05-11 Thread via llvm-branch-commits
https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/125432 >From 684a54284458cae0b700737126715384b9fddab1 Mon Sep 17 00:00:00 2001 From: jofrn Date: Fri, 31 Jan 2025 13:12:56 -0500 Subject: [PATCH] [SelectionDAG][X86] Remove unused elements from atomic vector. After spl

[llvm-branch-commits] [llvm] [SelectionDAG][X86] Remove unused elements from atomic vector. (PR #125432)

2025-05-11 Thread via llvm-branch-commits
https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/125432 >From 684a54284458cae0b700737126715384b9fddab1 Mon Sep 17 00:00:00 2001 From: jofrn Date: Fri, 31 Jan 2025 13:12:56 -0500 Subject: [PATCH] [SelectionDAG][X86] Remove unused elements from atomic vector. After spl

[llvm-branch-commits] [llvm] [SelectionDAG][X86] Remove unused elements from atomic vector. (PR #125432)

2025-05-11 Thread via llvm-branch-commits
https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/125432 >From 684a54284458cae0b700737126715384b9fddab1 Mon Sep 17 00:00:00 2001 From: jofrn Date: Fri, 31 Jan 2025 13:12:56 -0500 Subject: [PATCH] [SelectionDAG][X86] Remove unused elements from atomic vector. After spl

[llvm-branch-commits] [llvm] [SelectionDAG] Widen <2 x T> vector types for atomic load (PR #120598)

2025-05-11 Thread via llvm-branch-commits
https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/120598 >From 730b40b39dfa3ed5d802bbb1270d49273a5de7fb Mon Sep 17 00:00:00 2001 From: jofrn Date: Thu, 19 Dec 2024 11:19:39 -0500 Subject: [PATCH] [SelectionDAG] Widen <2 x T> vector types for atomic load Vector types of

[llvm-branch-commits] [llvm] [AtomicExpand] Add bitcasts when expanding load atomic vector (PR #120716)

2025-05-11 Thread via llvm-branch-commits
https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/120716 >From 717ea645df30178ab0873da4191d41bc7ba4b761 Mon Sep 17 00:00:00 2001 From: jofrn Date: Fri, 20 Dec 2024 06:14:28 -0500 Subject: [PATCH] [AtomicExpand] Add bitcasts when expanding load atomic vector AtomicExpan

[llvm-branch-commits] [llvm] [SelectionDAG] Split vector types for atomic load (PR #120640)

2025-05-11 Thread via llvm-branch-commits
https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/120640 >From 4fccbd69f8ee5b6f16b08da38cb65d989450c8aa Mon Sep 17 00:00:00 2001 From: jofrn Date: Thu, 19 Dec 2024 16:25:55 -0500 Subject: [PATCH] [SelectionDAG] Split vector types for atomic load Vector types that aren'

[llvm-branch-commits] [llvm] [SelectionDAG] Legalize <1 x T> vector types for atomic load (PR #120385)

2025-05-11 Thread via llvm-branch-commits
https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/120385 >From 192b17cf42a818acb1f10c2a81481e58b25ff238 Mon Sep 17 00:00:00 2001 From: jofrn Date: Wed, 18 Dec 2024 03:37:17 -0500 Subject: [PATCH] [SelectionDAG] Legalize <1 x T> vector types for atomic load `load atomic

[llvm-branch-commits] [llvm] [X86] Add atomic vector tests for unaligned >1 sizes. (PR #120387)

2025-05-11 Thread via llvm-branch-commits
https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/120387 >From d212710191a62be5ad7257f8825b71230d715041 Mon Sep 17 00:00:00 2001 From: jofrn Date: Wed, 18 Dec 2024 03:40:32 -0500 Subject: [PATCH] [X86] Add atomic vector tests for unaligned >1 sizes. Unaligned atomic ve

[llvm-branch-commits] [llvm] [X86] Remove extra MOV after widening atomic load (PR #138635)

2025-05-11 Thread via llvm-branch-commits
https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/138635 >From 6312f8c4dbc5272b5f2c741a46fe7623ace49bf8 Mon Sep 17 00:00:00 2001 From: jofernau_amdeng Date: Tue, 6 May 2025 01:48:11 -0400 Subject: [PATCH] [X86] Remove extra MOV after widening atomic load This change ad

[llvm-branch-commits] [llvm] [X86] Manage atomic load of fp -> int promotion in DAG (PR #120386)

2025-05-11 Thread via llvm-branch-commits
https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/120386 >From ce52d5295249681faf782a15ebe56599152e8491 Mon Sep 17 00:00:00 2001 From: jofrn Date: Wed, 18 Dec 2024 03:38:23 -0500 Subject: [PATCH] [X86] Manage atomic load of fp -> int promotion in DAG When lowering atom

[llvm-branch-commits] [llvm] [X86] Manage atomic load of fp -> int promotion in DAG (PR #120386)

2025-05-11 Thread via llvm-branch-commits
https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/120386 >From ce52d5295249681faf782a15ebe56599152e8491 Mon Sep 17 00:00:00 2001 From: jofrn Date: Wed, 18 Dec 2024 03:38:23 -0500 Subject: [PATCH] [X86] Manage atomic load of fp -> int promotion in DAG When lowering atom

[llvm-branch-commits] [llvm] [AtomicExpand] Add bitcasts when expanding load atomic vector (PR #120716)

2025-05-11 Thread via llvm-branch-commits
https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/120716 >From 717ea645df30178ab0873da4191d41bc7ba4b761 Mon Sep 17 00:00:00 2001 From: jofrn Date: Fri, 20 Dec 2024 06:14:28 -0500 Subject: [PATCH] [AtomicExpand] Add bitcasts when expanding load atomic vector AtomicExpan

[llvm-branch-commits] [llvm] [RISCV][Scheduler] Add scheduler definitions for the Q extension (PR #139495)

2025-05-11 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-backend-risc-v Author: Iris Shi (el-ev) Changes --- Patch is 24.97 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/139495.diff 14 Files Affected: - (modified) llvm/lib/Target/RISCV/RISCVInstrInfoQ.td (+61

[llvm-branch-commits] [llvm] [SelectionDAG] Widen <2 x T> vector types for atomic load (PR #120598)

2025-05-11 Thread via llvm-branch-commits
https://github.com/jofrn updated https://github.com/llvm/llvm-project/pull/120598 >From 730b40b39dfa3ed5d802bbb1270d49273a5de7fb Mon Sep 17 00:00:00 2001 From: jofrn Date: Thu, 19 Dec 2024 11:19:39 -0500 Subject: [PATCH] [SelectionDAG] Widen <2 x T> vector types for atomic load Vector types of

[llvm-branch-commits] [SPARC][IAS] Add definitions for UA 2007 instructions (PR #138401)

2025-05-11 Thread via llvm-branch-commits
https://github.com/koachan updated https://github.com/llvm/llvm-project/pull/138401 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [SPARC][IAS][NFC] Rename CBCOND -> CPBCOND (PR #138402)

2025-05-11 Thread via llvm-branch-commits
https://github.com/koachan updated https://github.com/llvm/llvm-project/pull/138402 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [SPARC][IAS][NFC] Rename CBCOND -> CPBCOND (PR #138402)

2025-05-11 Thread via llvm-branch-commits
https://github.com/koachan updated https://github.com/llvm/llvm-project/pull/138402 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [SPARC][IAS] Add definitions for OSA 2011 instructions (PR #138403)

2025-05-11 Thread via llvm-branch-commits
https://github.com/koachan updated https://github.com/llvm/llvm-project/pull/138403 Rate limit · GitHub body { background-color: #f6f8fa; color: #24292e; font-family: -apple-system,BlinkMacSystemFont,Segoe UI,Helvetica,Arial,sans-s

[llvm-branch-commits] [SPARC][IAS] Add definitions for OSA 2011 instructions (PR #138403)

2025-05-11 Thread via llvm-branch-commits
https://github.com/koachan updated https://github.com/llvm/llvm-project/pull/138403 Rate limit · GitHub body { background-color: #f6f8fa; color: #24292e; font-family: -apple-system,BlinkMacSystemFont,Segoe UI,Helvetica,Arial,sans-s

[llvm-branch-commits] [SPARC][IAS] Add definitions for cryptographic instructions (PR #139451)

2025-05-11 Thread via llvm-branch-commits
https://github.com/koachan updated https://github.com/llvm/llvm-project/pull/139451 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [GlobalISel] Add computeNumSignBits for ASHR (PR #139503)

2025-05-11 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-backend-aarch64 Author: David Green (davemgreen) Changes --- Full diff: https://github.com/llvm/llvm-project/pull/139503.diff 4 Files Affected: - (modified) llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp (+10) - (modified) llvm/test/CodeGen/AAr

[llvm-branch-commits] [SPARC][IAS] Add definitions for cryptographic instructions (PR #139451)

2025-05-11 Thread via llvm-branch-commits
https://github.com/koachan updated https://github.com/llvm/llvm-project/pull/139451 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [GlobalISel] Add computeKnownBits for G_SHUFFLE_VECTOR (PR #139505)

2025-05-11 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-llvm-globalisel Author: David Green (davemgreen) Changes The code is similar to computeKnownBits and the code in SelectionDAG::ComputeNumSignBits. --- Full diff: https://github.com/llvm/llvm-project/pull/139505.diff 3 Files Affected: - (modified) ll

[llvm-branch-commits] [llvm] [GlobalISel] Add computeKnownBits for G_SHUFFLE_VECTOR (PR #139505)

2025-05-11 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-backend-aarch64 Author: David Green (davemgreen) Changes The code is similar to computeKnownBits and the code in SelectionDAG::ComputeNumSignBits. --- Full diff: https://github.com/llvm/llvm-project/pull/139505.diff 3 Files Affected: - (modified) ll

[llvm-branch-commits] [llvm] [GlobalISel] Add computeNumSignBits for G_BUILD_VECTOR. (PR #139506)

2025-05-11 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-backend-aarch64 Author: David Green (davemgreen) Changes The code is similar to SelectionDAG::ComputeNumSignBits, but does not deal with truncating buildvectors. --- Full diff: https://github.com/llvm/llvm-project/pull/139506.diff 3 Files Affected:

[llvm-branch-commits] [llvm] [GlobalISel] Add computeNumSignBits for G_BUILD_VECTOR. (PR #139506)

2025-05-11 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-llvm-globalisel Author: David Green (davemgreen) Changes The code is similar to SelectionDAG::ComputeNumSignBits, but does not deal with truncating buildvectors. --- Full diff: https://github.com/llvm/llvm-project/pull/139506.diff 3 Files Affected:

[llvm-branch-commits] [llvm] AMDGPU: Use minnum instead of maxnum for fmed3 src2-nan fold (PR #139531)

2025-05-12 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-backend-amdgpu Author: Matt Arsenault (arsenm) Changes By the pseudocode in the ISA manual, if any input is a nan it acts like min3, which will fold to min2 of the other operands. The other cases fold to min, I'm not sure how this one was wrong. --- Ful

[llvm-branch-commits] [llvm] release/20.x: [X86][TargetLowering] Avoid deleting temporary nodes in `getNegatedExpression` (#139029) (PR #139356)

2025-05-09 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-backend-x86 Author: None (llvmbot) Changes Backport 143cce72b1f50bc37363315793b80ae92d2b0ae3 Requested by: @dtcxzyw --- Full diff: https://github.com/llvm/llvm-project/pull/139356.diff 2 Files Affected: - (modified) llvm/lib/Target/X86/X86ISelLoweri

[llvm-branch-commits] [IR] Introduce the `ptrtoaddr` instruction (PR #139357)

2025-05-09 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-llvm-selectiondag @llvm/pr-subscribers-backend-x86 Author: Alexander Richardson (arichardson) Changes This introduces a new `ptrtoaddr` instruction which is similar to `ptrtoint` but has two differences: 1) Unlike `ptrtoint`, `ptrtoaddr` does not captur

[llvm-branch-commits] [llvm] release/20.x: [X86][TargetLowering] Avoid deleting temporary nodes in `getNegatedExpression` (#139029) (PR #139356)

2025-05-09 Thread via llvm-branch-commits
https://github.com/llvmbot created https://github.com/llvm/llvm-project/pull/139356 Backport 143cce72b1f50bc37363315793b80ae92d2b0ae3 Requested by: @dtcxzyw Rate limit · GitHub body { background-color: #f6f8fa; color: #24292e; fon

[llvm-branch-commits] [llvm] dc28f70 - Revert "MC: Support quoted symbol names"

2025-05-09 Thread via llvm-branch-commits
Author: Mehdi Amini Date: 2025-05-09T19:22:54+02:00 New Revision: dc28f70a0be854449642923241df0313dd1e2f3d URL: https://github.com/llvm/llvm-project/commit/dc28f70a0be854449642923241df0313dd1e2f3d DIFF: https://github.com/llvm/llvm-project/commit/dc28f70a0be854449642923241df0313dd1e2f3d.diff L

[llvm-branch-commits] [BOLT] Drop perf2bolt cold samples diagnostic (PR #139337)

2025-05-09 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-bolt Author: Amir Ayupov (aaupov) Changes Cold samples diagnostics in perf2bolt are superseded by `print-heatmap-stats` option. It provides a superset of stats and works without BAT section (not emitted by default). Test Plan: NFC --- Full diff: https

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