On Fri, Feb 9, 2018 at 3:43 PM, Jason Ekstrand wrote:
> From: Louis-Francis Ratté-Boulianne
>
> This was breaking CCS support as because we would take the planar path
> whenever planar_format is set which is always.
>
> Signed-off-by: Louis-Francis
This commit fixes two bugs in intel_from_planar. First, if the planar
format was non-NULL but only had a single plane, we were falling through
to the planar case. If we had a CCS modifier and plane == 1, we would
return NULL instead of the CCS plane. Second, if we did end up in the
Signed-off-by: Ilia Mirkin
---
Tested on GM107 with DOW3 and DiRT Rally (in bindless mode). Seems to
work about as well as on Kepler, except I got a few ltc errors in DiRT
Rally. Unclear if it's related to this patch though. Could be a missing
flush somewhere.
All this information can be retrieved from the TIC directly. Avoid
having to dip into the constbuf information about the image.
Signed-off-by: Ilia Mirkin
---
.../nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 61 +-
This adds support for the KHR_display extension to the anv and radv
Vulkan drivers. The drivers now attempt to open the master DRM node
when the KHR_display extension is requested so that the common winsys
code can perform the necessary operations.
Signed-off-by: Keith Packard
Add support for the EXT_direct_mode_display extension. This just
provides the vkReleaseDisplayEXT function.
Signed-off-by: Keith Packard
---
src/amd/vulkan/radv_extensions.py | 1 +
src/amd/vulkan/radv_wsi_display.c | 11 +++
src/intel/vulkan/anv_extensions.py |
Here's a series of extensions necessary to perform reasonable direct
display operations, either directly through DRM with no window system,
or using RandR and Linux leases.
There's one new extension, MESA_query_timestamp which performs the
same operation as glGetInteger64v(GL_TIMESTAMP, ) -- it
This extension adds a single function to query the current GPU
timestamp, just like glGetInteger64v(GL_TIMESTAMP, ). This
function is needed to complete the implementation of
GOOGLE_display_timing, which needs to be able to coorelate GPU and CPU
timestamps.
Signed-off-by: Keith Packard
This adds support for the VK_GOOGLE_display timing extension, which
provides two things:
1) Detailed information about when frames are displayed, including
slack time between GPU execution and display frame.
2) Absolute time control over swapchain queue processing. This allows
the
This extension adds the ability to borrow an X RandR output for
temporary use directly by a Vulkan application. For DRM, we use the
Linux resource leasing mechanism.
Signed-off-by: Keith Packard
---
configure.ac | 25 ++
meson.build
This extension is required to support EXT_display_control as it offers
a way to query whether the vblank counter is supported.
v2: Thanks to kisak
Fix spelling of VkSurfaceCapabilities2EXT in wsi_common_wayland.c,
it was using ext instead of EXT.
Fix spelling of
This extension provides fences and frame count information to direct
display contexts. It uses new kernel ioctls to provide 64-bits of
vblank sequence and nanosecond resolution.
v2: Remove DRM_CRTC_SEQUENCE_FIRST_PIXEL_OUT flag. This has
been removed from the proposed kernel API.
Add
Hello,
I know that NIR support for radeonsi is new, but should this land in
Mesa 18.0.0 final as early upgrade path?
I've tried running my whole system with NIR enabled in /etc/environment
export R600_DEBUG=nir
But older Mesa 18.0.0-rc3/4 (in the background) created disk cache files
interfere
On Tue, Feb 6, 2018 at 12:05 AM, Ilia Mirkin wrote:
> On Mon, Feb 5, 2018 at 6:42 AM, Ilia Mirkin wrote:
>> On Mon, Feb 5, 2018 at 6:24 AM, Daniel Stone wrote:
>>> Hi Ilia,
>>>
>>> On 4 February 2018 at 19:09, Ilia Mirkin
The GBM surface format has to match the DRM mode. Both are used in a
couple of places, so unify it so that it's only set in one place. Note
that the GBM and DRM formats are identical.
Signed-off-by: Ilia Mirkin
Reviewed-by: Eric Engestrom
---
v2
This struct allows us to report accurate max point size/line width.
---
src/gallium/drivers/virgl/virgl_hw.h| 29 +
src/gallium/drivers/virgl/virgl_screen.c| 9
src/gallium/winsys/virgl/drm/virgl_drm_winsys.c | 19 +++-
3 files
On Fri, Feb 9, 2018 at 3:43 PM, Jason Ekstrand wrote:
> From: Louis-Francis Ratté-Boulianne
>
> If PresentCompleteNotify event says the pixmap was presented
> with mode PresentCompleteModeSuboptimalCopy, it means the pixmap
> could possibly have been
On Fri, Feb 9, 2018 at 3:43 PM, Jason Ekstrand wrote:
> From: Louis-Francis Ratté-Boulianne
>
> Add support for DRI3 v1.1, which allows pixmaps to be backed by
> multi-planar buffers, or those with format modifiers. This is both
> for allocating render
Quoting Emil Velikov (2018-02-08 16:14:39)
> On 8 February 2018 at 23:36, Dylan Baker wrote:
> > Quoting Emil Velikov (2018-02-08 15:22:32)
> >> On 8 February 2018 at 23:16, Dylan Baker wrote:
> >> > Quoting Emil Velikov (2018-02-08 14:56:27)
> >> >> On
On Fri, Feb 9, 2018 at 3:43 PM, Jason Ekstrand wrote:
> From: Louis-Francis Ratté-Boulianne
>
> It does the same as createImagewithModifiers but allow multiple
> modifiers set to be given. The modifier used to create the image
> should be selected from
Reviewed-by: Jason Ekstrand
On Fri, Feb 9, 2018 at 3:43 PM, Jason Ekstrand wrote:
> From: Daniel Stone
>
> Signed-off-by: Daniel Stone
> ---
> src/egl/main/eglapi.c | 1 +
>
On Fri, Feb 9, 2018 at 3:43 PM, Jason Ekstrand wrote:
> From: Daniel Stone
>
> Reviewed-by: Jason Ekstrand
>
Ugh... I meant to take that off before sending...
> ---
> src/mesa/drivers/dri/i965/intel_screen.c | 17
From: Daniel Stone
Adds support for multiple planes and buffer modifiers.
v4: Rename "has_dri3_v1_1" to "has_dri3_modifiers"
---
src/vulkan/wsi/wsi_common_x11.c | 180
1 file changed, 163 insertions(+), 17 deletions(-)
diff --git
This adds support for the modifiers portion of the WSI "extension".
---
src/intel/vulkan/anv_formats.c | 39 ++
src/intel/vulkan/anv_image.c | 93 +-
src/intel/vulkan/anv_private.h | 6 +++
src/intel/vulkan/anv_wsi.c | 24 +--
From: Louis-Francis Ratté-Boulianne
When it is detected that a window could have been flipped
but has been copied because of suboptimal format/modifier.
The Vulkan client should then re-create the swapchain.
Signed-off-by: Louis-Francis Ratté-Boulianne
For a bit there, we had a bug in i965 where it ignored the tiling of the
modifier and used the one from the BO instead. At one point, we though
this was best fixed by setting a tiling from Vulkan. However, we've
decided that i965 was just doing the wrong thing and have fixed it as of
From: Daniel Stone
zwp_linux_dmabuf_v1 lets us use multi-planar images and buffer
modifiers.
Signed-off-by: Daniel Stone
---
src/vulkan/Makefile.am | 10 +++
src/vulkan/Makefile.sources | 4 +-
From: Louis-Francis Ratté-Boulianne
This was breaking CCS support as because we would take the planar path
whenever planar_format is set which is always.
Signed-off-by: Louis-Francis Ratté-Boulianne
Reviewed-by: Jason Ekstrand
---
From: Louis-Francis Ratté-Boulianne
If PresentCompleteNotify event says the pixmap was presented
with mode PresentCompleteModeSuboptimalCopy, it means the pixmap
could possibly have been flipped instead if allocated with a
different format/modifier.
Signed-off-by:
From: Louis-Francis Ratté-Boulianne
Add support for DRI3 v1.1, which allows pixmaps to be backed by
multi-planar buffers, or those with format modifiers. This is both
for allocating render buffers, as well as EGLImage imports from a
native pixmap (EGL_NATIVE_PIXMAP_KHR).
This involves extending our fake extension a bit to allow for additional
querying and passing of modifier information. The added bits are
intended to look a lot like the draft of VK_EXT_image_drm_format_modifier.
Once the extension gets finalized, we'll simply transition all of the
structs used
From: Daniel Stone
Not currently used.
Signed-off-by: Daniel Stone
Reviewed-by: Jason Ekstrand
---
src/vulkan/wsi/wsi_common.c | 18 ++
src/vulkan/wsi/wsi_common_private.h | 9 +
From: Daniel Stone
Provide a hook to inform the driver that implicit synchronization should
be suppressed.
Reviewed-by: Jason Ekstrand
---
include/GL/internal/dri_interface.h | 10 +-
src/egl/drivers/dri2/egl_dri2.c | 27
From: Daniel Stone
Not yet used anywhere.
Signed-off-by: Daniel Stone
Reviewed-by: Jason Ekstrand
---
src/vulkan/Makefile.am | 1 +
src/vulkan/wsi/meson.build | 2 +-
src/vulkan/wsi/wsi_common.c
From: Louis-Francis Ratté-Boulianne
It was assumed that fromPlanar() could return NULL to mean
that the planar image is the same as the parent DRI image.
That assumption wasn't made everywhere though.
Let's fix things and make sure that all callers understand
a NULL result
From: Daniel Stone
Reviewed-by: Jason Ekstrand
---
src/mesa/drivers/dri/i965/intel_screen.c | 17 +++--
1 file changed, 15 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/intel_screen.c
From: Louis-Francis Ratté-Boulianne
It does the same as createImagewithModifiers but allow multiple
modifiers set to be given. The modifier used to create the image
should be selected from the first tranche if possible. If not,
then the subsequent tranches should be used.
This patch series is getting seriously confusing when it comes to
authorship. :-) I've rebased on master and I think I have most of the i965
and anv bits working. The only thing missing from this series is a 6-patch
series for i965 to fix texture_from_pixmap for modifiers:
From: Daniel Stone
Signed-off-by: Daniel Stone
---
src/egl/main/eglapi.c | 1 +
src/egl/main/egldisplay.h | 1 +
src/egl/main/eglimage.c | 26 ++
src/egl/main/eglimage.h | 3 +++
4 files changed, 31 insertions(+)
Hi Mark,
thanks for point them out. [PATCH v3 3/8] / [PATCH v3 4/8] / [PATCH v3
5/8] update according.
James.
On 2018-02-08 05:23 PM, Mark Thompson wrote:
On 06/02/18 20:05, James Zhu wrote:
Implement UVD hevc encode functions
Signed-off-by: James Zhu
---
Implement required IBs for UVD HEVC encode.
Signed-off-by: James Zhu
---
src/gallium/drivers/radeon/radeon_uvd_enc_1_1.c | 1115 +++
1 file changed, 1115 insertions(+)
create mode 100644 src/gallium/drivers/radeon/radeon_uvd_enc_1_1.c
diff --git
Implement UVD hevc encode functions
Signed-off-by: James Zhu
---
src/gallium/drivers/radeon/radeon_uvd_enc.c | 381
1 file changed, 381 insertions(+)
create mode 100644 src/gallium/drivers/radeon/radeon_uvd_enc.c
diff --git
Add hevc encode hardware interface for UVD
Signed-off-by: James Zhu
---
src/gallium/drivers/radeon/radeon_uvd_enc.h | 471
1 file changed, 471 insertions(+)
create mode 100644 src/gallium/drivers/radeon/radeon_uvd_enc.h
diff --git
in order keep the patch order for tacking. I will update at final update
On 2018-02-07 05:40 PM, Boyuan Zhang wrote:
Better to add it to Makefile.source and Meson in this patch. Other
than this,
this patch is Reviewed-by: Boyuan Zhang
On 2018-02-06 03:05 PM, James
On 2018-02-08 05:13 PM, Mark Thompson wrote:
On 06/02/18 20:05, James Zhu wrote:
Implement required IBs for UVD HEVC encode.
Signed-off-by: James Zhu
---
src/gallium/drivers/radeon/radeon_uvd_enc_1_1.c | 1115 +++
1 file changed, 1115 insertions(+)
Hi Daniel,
thanks, I got it to work - almost. I am running this on the i.MX6 with
etnaviv. I do get some flickering, however.
To test if something is wrong with the page flipping, I call drmGetCap()
with DRM_CAP_ASYNC_PAGE_FLIP , and it returns me 0, indicating that
async page flipping is
On 2018-02-09 — 11:50, Aaron Watry wrote:
> No worries. I've been rebasing this series every time I've pulled
> mesa for the last few months, and this week is the first time I've had
> any real conflicts that need addressing. I'll see if I can find some
> time to address your comments and
No worries. I've been rebasing this series every time I've pulled
mesa for the last few months, and this week is the first time I've had
any real conflicts that need addressing. I'll see if I can find some
time to address your comments and re-organize the commits as you
suggested.
Jan also had
From: Mathias Fröhlich
Hi all,
An other splitout VAO handling improvement patch that
I wanted to feed seperately.
The change may be subject to discussion and following
patches depend on the call signatures of some of the
mesa internal vao methods that in turn depend on
Thomas Hellstrom kirjoitti 09.02.2018 klo 10:37:
> Removing this callback caused rendering corruption in some multi-screen cases,
> so it is reinstated but without the drawable argument which was never used
> by implementations and was confusing since the drawable could have been
> created with
Hi,
On 8 February 2018 at 22:47, Emil Velikov wrote:
> On 8 February 2018 at 14:05, Daniel Stone wrote:
>> When Ilia asked for suggestions on where to look to add 10bpc BGR
>> support to the GBM and Wayland EGL backends, I had a quick look; the
Hi Carlos,
On 9 February 2018 at 08:33, Carlos Rafael Giani
wrote:
> I want to implement triple buffering instead of double buffering for a
> program that uses EGL on GBM on a KMS-enabled platform. So far, I used
> kmscube as an example.
>
> However, I do not see where
Hi Emil,
On 8 February 2018 at 21:56, Emil Velikov wrote:
> On 8 February 2018 at 14:05, Daniel Stone wrote:
>> Extend the visual map from only containing names and bitmasks, to also
>> carrying the three format enums we need. These are the
Hi Eric,
On 8 February 2018 at 18:40, Eric Engestrom wrote:
> On February 8, 2018 2:06:23 PM UTC, Daniel Stone
> wrote:
>> When 0b2b7191214eb moved from an if tree to a struct to map between
>> wl_drm formats and EGLConfigs, it transposed the mapping
On Fri, Feb 9, 2018 at 2:56 AM, Brian Paul wrote:
> On Thu, Feb 8, 2018 at 6:18 PM, Marek Olšák wrote:
>>
>> From: Marek Olšák
>>
>> 80 -> 40 bytes.
>> ---
>> src/mesa/main/mtypes.h | 47
>>
On Fri, Feb 9, 2018 at 3:01 AM, Brian Paul wrote:
> Again, I can't research this right now, but what values in the
> gl_state_index array are greater than 255? Perhaps you can add a comment
> about that. And if that's not the case, gl_state_index8?
I don't remember
Awesome!
Reviewed-by: Bas Nieuwenhuizen
On Fri, Feb 9, 2018 at 1:54 PM, Samuel Pitoiset
wrote:
> Hi,
>
> This series removes the backlink to nir_to_llvm_context in ac_nir_context
> by moving some code to the ABI.
>
> We should also rename
On Fri, Feb 9, 2018 at 3:10 AM, Michel Dänzer wrote:
> On 2018-02-09 08:54 AM, Gert Wollny wrote:
> > The initialization of tex_target was dropped and since the value
> > is used uninitialized (e.g. with Unreal Editor), an assertion
> > fires in tgsi/tgsi_util.c:502:
Reviewed-by: Brian Paul
On Fri, Feb 9, 2018 at 2:08 AM, Andreas Boll
wrote:
> There are no *_screen binaries anymore.
>
> Fixes: 66136b95 "egl: Build some OpenGL demos for Wayland"
> Signed-off-by: Andreas Boll
> ---
Reviewed-by: Brian Paul
On Fri, Feb 9, 2018 at 2:09 AM, Andreas Boll
wrote:
> Signed-off-by: Andreas Boll
> ---
> src/perf/.gitignore | 1 +
> src/tests/.gitignore | 1 +
> 2 files changed, 2 insertions(+)
>
> diff
On Fri, Feb 9, 2018 at 2:08 AM, Andreas Boll
wrote:
> Fixes: 6eaf6ab3 "glxinfo/wglinfo: query/print more GL limits"
> Signed-off-by: Andreas Boll
> ---
> src/xdemos/glinfo_common.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
Hello Aaron,
Sorry for not having reviewed the updated series…
I will have a look at it over the weekend. If I understand correctly, patches 1
and 2 have been squashed together and upstreamed already, while patches 3
through 8 have not been merged yet. Is this series the latest version, or do
you
On Fri, Feb 9, 2018 at 3:58 AM, Tomasz Figa wrote:
> On Fri, Feb 2, 2018 at 11:51 PM, Tomasz Figa wrote:
>> On Fri, Feb 2, 2018 at 11:00 PM, Rob Herring wrote:
>>> On Fri, Feb 2, 2018 at 2:01 AM, Tomasz Figa wrote:
We are seeking nominations for candidates for election to the X.Org
Foundation Board of Directors. All X.Org Foundation members are
eligible for election to the board.
Nominations for the 2018 election are now open and will remain open
until 23:59 UTC on 23 Feb 2018.
The Board consists of
Am Donnerstag, 8. Februar 2018, 21:55:33 CET schrieb Dylan Baker:
> Hi Marc,
>
> Can I call that a Tested-by?
I wouldn't it call tested-by because I wasn't able to decode a video (maybe
different problem), but at least the tools work as they should.
Marc
>
> Quoting Marc Dietrich (2018-02-05
On 02/09/2018 02:48 AM, Timothy Arceri wrote:
This adds the missing nir support and allows the nir backend to produce
an equivalent shader to the tgsi backend for the only piglit test we
have for this [1]. However the test still fails and I've so far been
unable to spot the problem.
[1]
On 02/09/2018 02:48 AM, Timothy Arceri wrote:
---
src/amd/common/ac_nir_to_llvm.c | 48 +++--
1 file changed, 42 insertions(+), 6 deletions(-)
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index e7352cc7d2..db692919ce
v2:
Use ccache
build using meson, rather than autotools
---
appveyor.yml| 19 ++-
scripts/appveyor_cygwin.bat | 39 +++
2 files changed, 53 insertions(+), 5 deletions(-)
create mode 100644 scripts/appveyor_cygwin.bat
diff --git
On 02/09/2018 10:49 AM, Timothy Arceri wrote:
Fixes a numer of draw buffers piglit tests.
number
---
src/gallium/drivers/radeonsi/si_shader_nir.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/src/gallium/drivers/radeonsi/si_shader_nir.c
---
appveyor.yml | 29 +++--
scripts/appveyor_msvc.bat | 35 +++
2 files changed, 38 insertions(+), 26 deletions(-)
create mode 100644 scripts/appveyor_msvc.bat
diff --git a/appveyor.yml b/appveyor.yml
index
Jon Turney (2):
appveyor: put build steps in a script, rather than inline in
appveyor.yml
appveyor: Add a Cygwin build script
appveyor.yml| 40 +---
scripts/appveyor_cygwin.bat | 39 +++
Series is:
Reviewed-by: Samuel Pitoiset
On 02/09/2018 07:20 AM, Timothy Arceri wrote:
Fixes the following piglit test:
./bin/arb_vertex_attrib_64bit-check-explicit-location -auto -fbo
Where we would end up with the nir such as:
vec1 64 ssa_11 =
Reviewed-by: Samuel Pitoiset
On 02/09/2018 11:09 AM, Timothy Arceri wrote:
---
src/gallium/drivers/radeonsi/si_shader_nir.c | 19 +++
1 file changed, 19 insertions(+)
diff --git a/src/gallium/drivers/radeonsi/si_shader_nir.c
Signed-off-by: Samuel Pitoiset
---
src/amd/common/ac_nir_to_llvm.c | 23 ++-
1 file changed, 10 insertions(+), 13 deletions(-)
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index ae9e7b6c80..70718853ec 100644
---
Signed-off-by: Samuel Pitoiset
---
src/amd/common/ac_nir_to_llvm.c | 6 --
1 file changed, 6 deletions(-)
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 70718853ec..024d6ba547 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++
Signed-off-by: Samuel Pitoiset
---
src/amd/common/ac_nir_to_llvm.c | 187
1 file changed, 92 insertions(+), 95 deletions(-)
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index
Signed-off-by: Samuel Pitoiset
---
src/amd/common/ac_nir_to_llvm.c | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 167d0f0c91..b89067d6ca 100644
---
Signed-off-by: Samuel Pitoiset
---
src/amd/common/ac_nir_to_llvm.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 1188708020..3c7cc55eb7 100644
---
Signed-off-by: Samuel Pitoiset
---
src/amd/common/ac_nir_to_llvm.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index d9ad62d7f6..167d0f0c91 100644
---
Signed-off-by: Samuel Pitoiset
---
src/amd/common/ac_nir_to_llvm.c | 26 +-
1 file changed, 13 insertions(+), 13 deletions(-)
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index b89067d6ca..273435adb6 100644
---
Signed-off-by: Samuel Pitoiset
---
src/amd/common/ac_nir_to_llvm.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 97b5ec90f7..1188708020 100644
---
Signed-off-by: Samuel Pitoiset
---
src/amd/common/ac_nir_to_llvm.c | 20 +---
src/amd/common/ac_shader_abi.h | 12
2 files changed, 25 insertions(+), 7 deletions(-)
diff --git a/src/amd/common/ac_nir_to_llvm.c
Signed-off-by: Samuel Pitoiset
---
src/amd/common/ac_nir_to_llvm.c | 13 +++--
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 3c7cc55eb7..d9ad62d7f6 100644
---
Signed-off-by: Samuel Pitoiset
---
src/amd/common/ac_nir_to_llvm.c | 5 ++---
src/amd/common/ac_shader_abi.h | 4 +---
src/gallium/drivers/radeonsi/si_shader.c | 6 ++
3 files changed, 5 insertions(+), 10 deletions(-)
diff --git
Signed-off-by: Samuel Pitoiset
---
src/amd/common/ac_nir_to_llvm.c | 17 +
src/amd/common/ac_shader_abi.h | 2 ++
src/gallium/drivers/radeonsi/si_shader.c | 6 ++
3 files changed, 17 insertions(+), 8 deletions(-)
diff --git
Signed-off-by: Samuel Pitoiset
---
src/amd/common/ac_nir_to_llvm.c | 7 +++
src/amd/common/ac_shader_abi.h | 2 ++
2 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index
Signed-off-by: Samuel Pitoiset
---
src/amd/common/ac_nir_to_llvm.c | 29 ++---
1 file changed, 14 insertions(+), 15 deletions(-)
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 88e3b3f68b..97b5ec90f7 100644
Signed-off-by: Samuel Pitoiset
---
src/amd/common/ac_nir_to_llvm.c | 5 ++---
src/amd/common/ac_shader_abi.h | 1 +
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index
Signed-off-by: Samuel Pitoiset
---
src/amd/common/ac_nir_to_llvm.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 3691555208..846566dc81 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++
Hi,
This series removes the backlink to nir_to_llvm_context in ac_nir_context
by moving some code to the ABI.
We should also rename nir_to_llvm_context to radv_shader_context, move
all RADV-specific code outside of ac and remove the link to ac_nir_context,
but this series is a good start.
nir_intrinsic_load_tess_coord always returns a v3i32.
Signed-off-by: Samuel Pitoiset
---
src/amd/common/ac_nir_to_llvm.c | 11 +++
1 file changed, 3 insertions(+), 8 deletions(-)
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
Signed-off-by: Samuel Pitoiset
---
src/amd/common/ac_nir_to_llvm.c | 29 +++--
src/amd/common/ac_shader_abi.h | 4 +++-
2 files changed, 18 insertions(+), 15 deletions(-)
diff --git a/src/amd/common/ac_nir_to_llvm.c
Fair, but since we're reading from sysfs, I think we should be fine.
On 09/02/18 12:27, Grazvydas Ignotas wrote:
Is this really sufficient? From what I read in the manpage, you can
get an incomplete read instead when a signal arrives.
Gražvydas
On Fri, Feb 9, 2018 at 12:03 PM, Lionel
Reviewed-by: Lionel Landwerlin
Thanks,
-
Lionel
On 09/02/18 12:28, Grazvydas Ignotas wrote:
ping
On Sun, Feb 4, 2018 at 12:19 AM, Grazvydas Ignotas wrote:
Fix the following:
warning: format ‘%lx’ expects argument of type ‘long unsigned
ping
On Sun, Feb 4, 2018 at 12:19 AM, Grazvydas Ignotas wrote:
> Fix the following:
> warning: format ‘%lx’ expects argument of type ‘long unsigned int’, but
> argument 3 has type ‘uint64_t {aka long long unsigned int}.
> ---
> src/intel/compiler/brw_disasm.c
Is this really sufficient? From what I read in the manpage, you can
get an incomplete read instead when a signal arrives.
Gražvydas
On Fri, Feb 9, 2018 at 12:03 PM, Lionel Landwerlin
wrote:
> Fixes: 458468c136e "i965: Expose OA counters via
On Friday, 2018-02-09 10:03:53 +, Lionel Landwerlin wrote:
> Fixes: 458468c136e "i965: Expose OA counters via INTEL_performance_query"
> Signed-off-by: Lionel Landwerlin
> Cc: "18.0"
The Fixes: tag with a commit which is in
Marek Olšák writes:
> From: Marek Olšák
>
> Non-MRT cases always translate blend state for 1 color buffer only.
> MRT cases only check and translate blend state for enabled color buffers.
>
> This also avoids an assertion failure in translate_blend for:
>
Marek Olšák writes:
> From: Marek Olšák
Reviewed-by: Eric Anholt
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On Friday, 2018-02-09 10:09:01 +0100, Andreas Boll wrote:
> Signed-off-by: Andreas Boll
> ---
> I'd like to ship eglinfo inside Debian's mesa-utils-extra package and I
> thought
> other distributions could be interested in this patch as well.
Yes please :)
Btw, I
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