Re: [Mesa-dev] [PATCH v2] glsl: Optimize min/max expression trees
On vie, 2014-09-26 at 12:57 -0400, Connor Abbott wrote: On Fri, Sep 26, 2014 at 9:02 AM, Iago Toral Quiroga ito...@igalia.com wrote: Original patch by Petri Latvala petri.latv...@intel.com: Add an optimization pass that drops min/max expression operands that can be proven to not contribute to the final result. The algorithm is similar to alpha-beta pruning on a minmax search, from the field of AI. This optimization pass can optimize min/max expressions where operands are min/max expressions. Such code can appear in shaders by itself, or as the result of clamp() or AMD_shader_trinary_minmax functions. This optimization pass improves the generated code for piglit's AMD_shader_trinary_minmax tests as follows: total instructions in shared programs: 75 - 67 (-10.67%) instructions in affected programs: 60 - 52 (-13.33%) GAINED:0 LOST: 0 All tests (max3, min3, mid3) improved. A full shader-db run: total instructions in shared programs: 4293603 - 4293575 (-0.00%) instructions in affected programs: 1188 - 1160 (-2.36%) GAINED:0 LOST: 0 Improvements happen in Guacamelee and Serious Sam 3. One shader from Dungeon Defenders is hurt by shader-db metrics (26 - 28), because of dropping of a (constant float (0.0)) operand, which was compiled to a saturate modifier. Version 2 by Iago Toral Quiroga ito...@igalia.com: Changes from review feedback: - Squashed various cosmetic changes sent by Matt Turner. - Make less_all_components return an enum rather than setting a class member. (Suggested by Mat Turner). Also, renamed it to compare_components. - Make less_all_components, smaller_constant and larger_constant static. (Suggested by Mat Turner) - Change mixmax_range to call its limits low and high instead of range[0] and range[1]. (Suggested by Connor Abbot). - Use ir_builder swizzle helpers in swizzle_if_required(). (Suggested by Connor Abbot). - Make the logic more clearer by rearrenging the code and commenting. (Suggested by Connor Abbot). - Added comment to explain why we need to recurse twice. (Suggested by Connor Abbot). - If we cannot prune an expression, do not return early. Instead, attempt to prune its children. (Suggested by Connor Abbot). Other changes: - Instead of having a global valid visitor member, let the various functions that can determine this status return a boolean and check for its value to decide what to do in each case. This is more flexible and allows to recurse into children of parents that could not be prunned due to invalid ranges (so related to the last bullet in the review feedback). - Make sure we always check if a range is valid before working with it. Since any use of get_range, combine_range or range_intersection can invalidate a range we should check for this situation every time we use any of these functions. No piglit regressions observed with Version 2. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=76861 --- Version 2 also passes all unit tests sent by Petri in the original series. src/glsl/Makefile.sources | 1 + src/glsl/glsl_parser_extras.cpp | 1 + src/glsl/ir_optimization.h | 1 + src/glsl/opt_minmax.cpp | 457 4 files changed, 460 insertions(+) create mode 100644 src/glsl/opt_minmax.cpp diff --git a/src/glsl/Makefile.sources b/src/glsl/Makefile.sources index cb8d5a6..1c08697 100644 --- a/src/glsl/Makefile.sources +++ b/src/glsl/Makefile.sources @@ -95,6 +95,7 @@ LIBGLSL_FILES = \ $(GLSL_SRCDIR)/opt_flip_matrices.cpp \ $(GLSL_SRCDIR)/opt_function_inlining.cpp \ $(GLSL_SRCDIR)/opt_if_simplification.cpp \ + $(GLSL_SRCDIR)/opt_minmax.cpp \ $(GLSL_SRCDIR)/opt_noop_swizzle.cpp \ $(GLSL_SRCDIR)/opt_rebalance_tree.cpp \ $(GLSL_SRCDIR)/opt_redundant_jumps.cpp \ diff --git a/src/glsl/glsl_parser_extras.cpp b/src/glsl/glsl_parser_extras.cpp index 490c3c8..ae19ce4 100644 --- a/src/glsl/glsl_parser_extras.cpp +++ b/src/glsl/glsl_parser_extras.cpp @@ -1586,6 +1586,7 @@ do_common_optimization(exec_list *ir, bool linked, else progress = do_constant_variable_unlinked(ir) || progress; progress = do_constant_folding(ir) || progress; + progress = do_minmax_prune(ir) || progress; progress = do_cse(ir) || progress; progress = do_rebalance_tree(ir) || progress; progress = do_algebraic(ir, native_integers, options) || progress; diff --git a/src/glsl/ir_optimization.h b/src/glsl/ir_optimization.h index 369dcd1..8fbd992 100644 --- a/src/glsl/ir_optimization.h +++ b/src/glsl/ir_optimization.h @@ -99,6 +99,7 @@ bool opt_flatten_nested_if_blocks(exec_list
[Mesa-dev] [PATCH] st/xa: Fix regression in xa_yuv_planar_blit()
Commit st/xa: scissor to help tilers broke xa_yuv_planar_blit() and vmwgfx
textured video. Fix this by implementing scissors also in the yuv draw path.
Signed-off-by: Thomas Hellstrom thellst...@vmware.com
Cc: Rob Clark robcl...@freedesktop.org
Cc: 10.2 10.3 mesa-sta...@lists.freedesktop.org
---
src/gallium/state_trackers/xa/xa_renderer.c | 11 +++
src/gallium/state_trackers/xa/xa_yuv.c | 1 +
2 files changed, 12 insertions(+)
diff --git a/src/gallium/state_trackers/xa/xa_renderer.c
b/src/gallium/state_trackers/xa/xa_renderer.c
index 121d8ed..780b247 100644
--- a/src/gallium/state_trackers/xa/xa_renderer.c
+++ b/src/gallium/state_trackers/xa/xa_renderer.c
@@ -530,11 +530,22 @@ renderer_draw_yuv(struct xa_context *r,
src_x, src_y, src_w, src_h,
dst_x, dst_y, dst_w, dst_h, srf);
+ if (!r-scissor_valid) {
+ r-scissor.minx = 0;
+ r-scissor.miny = 0;
+ r-scissor.maxx = r-dst-tex-width0;
+ r-scissor.maxy = r-dst-tex-height0;
+ }
+
+ r-pipe-set_scissor_states(r-pipe, 0, 1, r-scissor);
+
cso_set_vertex_elements(r-cso, num_attribs, r-velems);
util_draw_user_vertex_buffer(r-cso, r-buffer, PIPE_PRIM_QUADS,
4, /* verts */
num_attribs); /* attribs/vert */
r-buffer_size = 0;
+
+ xa_scissor_reset(r);
}
void
diff --git a/src/gallium/state_trackers/xa/xa_yuv.c
b/src/gallium/state_trackers/xa/xa_yuv.c
index 43f56ff..1519639 100644
--- a/src/gallium/state_trackers/xa/xa_yuv.c
+++ b/src/gallium/state_trackers/xa/xa_yuv.c
@@ -146,6 +146,7 @@ xa_yuv_planar_blit(struct xa_context *r,
int w = box-x2 - box-x1;
int h = box-y2 - box-y1;
+xa_scissor_update(r, x, y, box-x2, box-y2);
renderer_draw_yuv(r,
(float)src_x + scale_x * (x - dst_x),
(float)src_y + scale_y * (y - dst_y),
--
1.8.3.2
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Re: [Mesa-dev] [PATCH] Revert configure: ask vdpau.pc for the default location of the vdpau drivers
On Sun, 28 Sep 2014 13:00:47 -0400 Ilia Mirkin imir...@alum.mit.edu wrote: This reverts commit bbe6f7f865cd4316b5f885507ee0b128a20686eb. This change broke the usual assumption that setting a prefix will cause files to be installed into that prefix. Restore that assumption before people's system installs are accidentally overwritten, and everyone starts having to add a --with-libvdpau-dir as a hack to work around this. Signed-off-by: Ilia Mirkin imir...@alum.mit.edu Cc: Christian König deathsim...@vodafone.de Cc: Alexandre Demers alexandre.f.dem...@gmail.com Cc: Matt Turner matts...@gmail.com Cc: Emil Velikov emil.l.veli...@gmail.com --- Emil and I had a discussion about this on IRC but he didn't seem to agree. However I think that this behavior is as broken as opening up ld.so.conf, grabbing the first dir from that and using that as the installation libdir. (Which I think everyone can agree is ridiculous.) Setting a prefix should cause things to be installed into that prefix. This is how every other autoconf-using package behaves. As a side-note, using --with-module-dir as an installation destination is a little crazy, but... I don't have the energy to fight that one. configure.ac | 11 +++ 1 file changed, 3 insertions(+), 8 deletions(-) Hi, so do I understand correctly, that assuming there is a system libvdpau installed but not another one in the $prefix, then Emil wants the system libvdpau to automatically discover the backends from $prefix? (Not literally, but with an equivalent effect.) If so, I would find that strange. A system library finding modules automatically from inside a $prefix is certainly unexpected. One uses a separate $prefix to exactly avoid that. Yet, from the IRC and this discussion here, it sounds like the reason to make the original patch, except it's just the other way around: cannot make system libvdpau go look in arbitrary $prefixes, so install into the system paths instead. If that was not the reason, then I completely missed it, sorry. FWIW, I agree with Ilia: 'make install' should never attempt to write outside of the given $prefix (or DESTDIR, whatwasit). It didn't even cross my mind before that some build might actually try writing to system paths regardless (and then simply fail half-way through installing, leaving me with a broken $prefix). Thanks, pq ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] Revert configure: ask vdpau.pc for the default location of the vdpau drivers
Am 28.09.2014 um 22:13 schrieb Ilia Mirkin:
On Sun, Sep 28, 2014 at 4:09 PM, Emil Velikov emil.l.veli...@gmail.com wrote:
On 28/09/14 20:08, Emil Velikov wrote:
On 28/09/14 19:04, Ilia Mirkin wrote:
On Sun, Sep 28, 2014 at 1:35 PM, Emil Velikov emil.l.veli...@gmail.com wrote:
[snip]
This, however, has nothing to do with mesa. When I set --prefix,
that's saying hey, install here. Not hey, install here for most
things, but actually overwrite my system install for other things.
The point is if we are to revert this, we have to nuke the equivalent
omx and va ones. Afaics there is no middle ground - either we keep the
commit or add some default and hope that distros and anyone building
mesa will bother correcting their config. Are you volunteering to hold
everyone's hand during the transition ?
Had this idea, but I'm not too trilled about it:
Default = blank, and error out if the user did not set it. The error
message will state how to get it of course :)
This approach is not ideal but in a way it covers the all must adhere
prefix and prevents the case of xx reports on the topic vdpau/omx is
broken.
Thoughts ?
What was wrong with the thing we did before that worked fine for
everyone in all cases? Use ${prefix}/lib/vdpau, allow people to
override if they want something funky?
The issue with that is the same as with OMX, it just doesn't work for
all distributions.
Debian/Ubuntu for example installs things into
/usr/lib/x86_64-linux-gnu/vdpau/ and that's exactly what moduledir in
vdpau.pc is pointing to. We could do something like ${libdir}/vdpau
instead, but I think that is similar broken since it assumes that the
module directory is named vdpau.
How about we just use whatever is defined in the pkg-config files as
long as no prefix is given to configure and fallback to the hardcoded
names when the user specifies it manually?
Regards,
Christian.
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[Mesa-dev] [PATCH v3] glsl: Optimize min/max expression trees
Original patch by Petri Latvala petri.latv...@intel.com: Add an optimization pass that drops min/max expression operands that can be proven to not contribute to the final result. The algorithm is similar to alpha-beta pruning on a minmax search, from the field of AI. This optimization pass can optimize min/max expressions where operands are min/max expressions. Such code can appear in shaders by itself, or as the result of clamp() or AMD_shader_trinary_minmax functions. This optimization pass improves the generated code for piglit's AMD_shader_trinary_minmax tests as follows: total instructions in shared programs: 75 - 67 (-10.67%) instructions in affected programs: 60 - 52 (-13.33%) GAINED:0 LOST: 0 All tests (max3, min3, mid3) improved. A full shader-db run: total instructions in shared programs: 4293603 - 4293575 (-0.00%) instructions in affected programs: 1188 - 1160 (-2.36%) GAINED:0 LOST: 0 Improvements happen in Guacamelee and Serious Sam 3. One shader from Dungeon Defenders is hurt by shader-db metrics (26 - 28), because of dropping of a (constant float (0.0)) operand, which was compiled to a saturate modifier. Version 2 by Iago Toral Quiroga ito...@igalia.com: Changes from review feedback: - Squashed various cosmetic changes sent by Matt Turner. - Make less_all_components return an enum rather than setting a class member. (Suggested by Mat Turner). Also, renamed it to compare_components. - Make less_all_components, smaller_constant and larger_constant static. (Suggested by Mat Turner) - Change mixmax_range to call its limits low and high instead of range[0] and range[1]. (Suggested by Connor Abbot). - Use ir_builder swizzle helpers in swizzle_if_required(). (Suggested by Connor Abbot). - Make the logic more clearer by rearrenging the code and commenting. (Suggested by Connor Abbot). - Added comment to explain why we need to recurse twice. (Suggested by Connor Abbot). - If we cannot prune an expression, do not return early. Instead, attempt to prune its children. (Suggested by Connor Abbot). Other changes: - Instead of having a global valid visitor member, let the various functions that can determine this status return a boolean and check for its value to decide what to do in each case. This is more flexible and allows to recurse into children of parents that could not be prunned due to invalid ranges (so related to the last bullet in the review feedback). - Make sure we always check if a range is valid before working with it. Since any use of get_range, combine_range or range_intersection can invalidate a range we should check for this situation every time we use any of these functions. Version 3 by Iago Toral Quiroga ito...@igalia.com: Changes from review feedback: - Now we can make get_range, combine_range and range_intersection static too (suggested by Connor Abbot). - Do not return NULL when looking for the larger or greater constant into mixed vector constants. Instead, produce a new constant by doing a component-wise minmax. With this we can also remove of the validations when we call into these functions (suggested by Connor Abbot). - Add a comment explaining the meaning of the baserange argument in prune_expression (suggested by Connor Abbot). Other changes: - Eliminate minmax expressions operating on constant vectors with mixed values by resolving them. No piglit regressions observed with Version 3. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=76861 --- Version 3 passes all minmax unit tests sent in the original series by Petri, except for the ones aimed at mixed vectors because this version produces better code for these than what is expected by these tests. src/glsl/Makefile.sources | 1 + src/glsl/glsl_parser_extras.cpp | 1 + src/glsl/ir_optimization.h | 1 + src/glsl/opt_minmax.cpp | 464 4 files changed, 467 insertions(+) create mode 100644 src/glsl/opt_minmax.cpp diff --git a/src/glsl/Makefile.sources b/src/glsl/Makefile.sources index cb8d5a6..1c08697 100644 --- a/src/glsl/Makefile.sources +++ b/src/glsl/Makefile.sources @@ -95,6 +95,7 @@ LIBGLSL_FILES = \ $(GLSL_SRCDIR)/opt_flip_matrices.cpp \ $(GLSL_SRCDIR)/opt_function_inlining.cpp \ $(GLSL_SRCDIR)/opt_if_simplification.cpp \ + $(GLSL_SRCDIR)/opt_minmax.cpp \ $(GLSL_SRCDIR)/opt_noop_swizzle.cpp \ $(GLSL_SRCDIR)/opt_rebalance_tree.cpp \ $(GLSL_SRCDIR)/opt_redundant_jumps.cpp \ diff --git a/src/glsl/glsl_parser_extras.cpp b/src/glsl/glsl_parser_extras.cpp index 490c3c8..ae19ce4 100644 --- a/src/glsl/glsl_parser_extras.cpp +++ b/src/glsl/glsl_parser_extras.cpp @@ -1586,6 +1586,7 @@ do_common_optimization(exec_list *ir, bool linked, else progress = do_constant_variable_unlinked(ir) || progress;
[Mesa-dev] [PATCH] egl: setup screen iterator before using it
commit 4ed23fd broke creation of pbuffer surfaces, patch fixes
the failure, noticed when running chrome with '--use-gl=egl'.
Signed-off-by: Tapani Pälli tapani.pa...@intel.com
---
src/egl/drivers/dri2/platform_x11.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/egl/drivers/dri2/platform_x11.c
b/src/egl/drivers/dri2/platform_x11.c
index 316ac18..f8c4b70 100644
--- a/src/egl/drivers/dri2/platform_x11.c
+++ b/src/egl/drivers/dri2/platform_x11.c
@@ -223,6 +223,7 @@ dri2_x11_create_surface(_EGLDriver *drv, _EGLDisplay *disp,
EGLint type,
dri2_surf-region = XCB_NONE;
if (type == EGL_PBUFFER_BIT) {
+ s = xcb_setup_roots_iterator(xcb_get_setup(dri2_dpy-conn));
screen = get_xcb_screen(s, dri2_dpy-screen);
if (!screen) {
_eglError(EGL_BAD_NATIVE_WINDOW, dri2_create_surface);
@@ -230,7 +231,6 @@ dri2_x11_create_surface(_EGLDriver *drv, _EGLDisplay *disp,
EGLint type,
}
dri2_surf-drawable = xcb_generate_id(dri2_dpy-conn);
- s = xcb_setup_roots_iterator(xcb_get_setup(dri2_dpy-conn));
xcb_create_pixmap(dri2_dpy-conn, conf-BufferSize,
dri2_surf-drawable, screen-root,
dri2_surf-base.Width, dri2_surf-base.Height);
--
1.9.3
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Re: [Mesa-dev] [PATCH 3/4] i965: Issue performance warnings for program cache related stalls.
On Fri, Sep 26, 2014 at 02:36:20PM -0700, Kenneth Graunke wrote: On Friday, September 26, 2014 04:41:14 PM Chris Wilson wrote: On Fri, Sep 26, 2014 at 08:36:39AM -0700, Kristian Høgsberg wrote: On Fri, Aug 29, 2014 at 11:10:49PM -0700, Kenneth Graunke wrote: We don't really want extra buffer copying or stalls when mapping, so it'd be nice to know when it's happening. Signed-off-by: Kenneth Graunke kenn...@whitecape.org Reviewed-by: Kristian Høgsberg k...@bitplanet.net This warns if the the program cache is currently being read by the GPU (expected) but a read-read (as used here) does not incur a stall. -Chris Good catch! Since we're doing a read-only mapping, and all of our relocations to this buffer have 0 for the write domains, GEM knows that nobody is altering it, so there shouldn't be a stall. Even though i915_gem_set_domain_ioctl calls i915_gem_object_wait_rendering__nonblocking, it shouldn't actually wait. Thanks for spotting this. I'll drop this hunk. I suppose this is a problem with my stall-warning code in general... drm_intel_bo_busy() == true does not necessarily imply that there will be a stall when mapping it. I hadn't considered that. It sounds like patch 4 (using unsynchronized mappings) is still useful though, as drm_intel_bo_subdata/pwrite doesn't know that it's safe to let the CPU write the buffer even while the GPU is reading it. We coul add a flag to the timeout ioctl (which works like busy for timeout=0) asking to just wait for read-only access. Shouldn't be a lot of fuzz to pimp the corresponding igt testcase and wire it all up. Or not that interesting? Cheers, Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 1/3] driconf: Synchronize po files
On Fri, Sep 26, 2014 at 4:31 PM, Alex Henrie alexhenri...@gmail.com wrote: --- src/mesa/drivers/dri/common/xmlpool/ca.po | 119 -- src/mesa/drivers/dri/common/xmlpool/de.po | 118 - src/mesa/drivers/dri/common/xmlpool/es.po | 118 - src/mesa/drivers/dri/common/xmlpool/fr.po | 118 - src/mesa/drivers/dri/common/xmlpool/nl.po | 118 - src/mesa/drivers/dri/common/xmlpool/sv.po | 118 - 6 files changed, 390 insertions(+), 319 deletions(-) This series is: Reviewed-by: Alex Deucher alexander.deuc...@amd.com Do you need someone to commit this for you? diff --git a/src/mesa/drivers/dri/common/xmlpool/ca.po b/src/mesa/drivers/dri/common/xmlpool/ca.po index c0cf7f6..1db9703 100644 --- a/src/mesa/drivers/dri/common/xmlpool/ca.po +++ b/src/mesa/drivers/dri/common/xmlpool/ca.po @@ -21,12 +21,11 @@ # LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING # FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS # IN THE SOFTWARE. - msgid msgstr Project-Id-Version: Mesa 10.1.0-devel\n Report-Msgid-Bugs-To: \n -POT-Creation-Date: 2014-01-13 22:30-0700\n +POT-Creation-Date: 2014-09-25 22:29-0600\n PO-Revision-Date: 2014-01-15 10:37-0700\n Last-Translator: Alex Henrie alexhenri...@gmail.com\n Language-Team: Catalan c...@li.org\n @@ -87,108 +86,112 @@ msgstr Força una versió GLSL per defecte en els shaders als quals falta una línia #version explícita -#: t_options.h:115 +#: t_options.h:110 +msgid Allow GLSL #extension directives in the middle of shaders +msgstr + +#: t_options.h:120 msgid Image Quality msgstr Qualitat d'Imatge -#: t_options.h:128 +#: t_options.h:133 msgid Texture color depth msgstr Profunditat de color de textura -#: t_options.h:129 +#: t_options.h:134 msgid Prefer frame buffer color depth msgstr Prefereix profunditat de color del framebuffer -#: t_options.h:130 +#: t_options.h:135 msgid Prefer 32 bits per texel msgstr Prefereix 32 bits per texel -#: t_options.h:131 +#: t_options.h:136 msgid Prefer 16 bits per texel msgstr Prefereix 16 bits per texel -#: t_options.h:132 +#: t_options.h:137 msgid Force 16 bits per texel msgstr Força 16 bits per texel -#: t_options.h:138 +#: t_options.h:143 msgid Initial maximum value for anisotropic texture filtering msgstr Valor màxim inicial per a la filtració de textura anisòtropa -#: t_options.h:143 +#: t_options.h:148 msgid Forbid negative texture LOD bias msgstr Prohibeix una parcialitat negativa del Nivell de Detalle (LOD) de les textures -#: t_options.h:148 +#: t_options.h:153 msgid Enable S3TC texture compression even if software support is not available msgstr Habilitar la compressió de textures S3TC encara que el suport de programari no estigui disponible -#: t_options.h:155 +#: t_options.h:160 msgid Initial color reduction method msgstr Mètode inicial de reducció de color -#: t_options.h:156 +#: t_options.h:161 msgid Round colors msgstr Colors arrodonits -#: t_options.h:157 +#: t_options.h:162 msgid Dither colors msgstr Colors tramats -#: t_options.h:165 +#: t_options.h:170 msgid Color rounding method msgstr Mètode d'arrodoniment de color -#: t_options.h:166 +#: t_options.h:171 msgid Round color components downward msgstr Arrondeix els components de color a baix -#: t_options.h:167 +#: t_options.h:172 msgid Round to nearest color msgstr Arrondeix al color més proper -#: t_options.h:176 +#: t_options.h:181 msgid Color dithering method msgstr Mètode de tramat de color -#: t_options.h:177 +#: t_options.h:182 msgid Horizontal error diffusion msgstr Difusió d'error horitzontal -#: t_options.h:178 +#: t_options.h:183 msgid Horizontal error diffusion, reset error at line start msgstr Difusió d'error horitzontal, reinicia l'error a l'inici de la línia -#: t_options.h:179 +#: t_options.h:184 msgid Ordered 2D color dithering msgstr Tramat de color 2D ordenat -#: t_options.h:185 +#: t_options.h:190 msgid Floating point depth buffer msgstr Buffer de profunditat de punt flotant -#: t_options.h:190 +#: t_options.h:195 msgid A post-processing filter to cel-shade the output msgstr Un filtre de postprocessament per a aplicar cel shading a la sortida -#: t_options.h:195 +#: t_options.h:200 msgid A post-processing filter to remove the red channel msgstr Un filtre de postprocessament per a treure el canal vermell -#: t_options.h:200 +#: t_options.h:205 msgid A post-processing filter to remove the green channel msgstr Un filtre de postprocessament per a treure el canal verd -#: t_options.h:205 +#: t_options.h:210 msgid A post-processing filter to remove the blue channel msgstr Un filtre de postprocessament per a treure el canal blau -#:
[Mesa-dev] [PATCH v3 6/6] st/va: implement vlVa(Query|Create|Get|Put|Destroy)Image
This patch implements functions for images support,
which basically supports copy data between video
surface and user buffers, in this case supports
SW decode, and other video output
v2: fix buffer size for odd-sized image case
expose I420 format as well
v3: fix YUV 4:2:2 format data buffer size
cleanup I420 format exposure
Signed-off-by: Leo Liu leo@amd.com
---
src/gallium/state_trackers/va/context.c| 2 +-
src/gallium/state_trackers/va/image.c | 266 -
src/gallium/state_trackers/va/va_private.h | 22 +++
3 files changed, 281 insertions(+), 9 deletions(-)
diff --git a/src/gallium/state_trackers/va/context.c
b/src/gallium/state_trackers/va/context.c
index 1819ec5..ae87d3b 100644
--- a/src/gallium/state_trackers/va/context.c
+++ b/src/gallium/state_trackers/va/context.c
@@ -121,7 +121,7 @@ VA_DRIVER_INIT_FUNC(VADriverContextP ctx)
ctx-max_profiles = PIPE_VIDEO_PROFILE_MPEG4_AVC_HIGH -
PIPE_VIDEO_PROFILE_UNKNOWN;
ctx-max_entrypoints = 1;
ctx-max_attributes = 1;
- ctx-max_image_formats = 1;
+ ctx-max_image_formats = VL_VA_MAX_IMAGE_FORMATS;
ctx-max_subpic_formats = 1;
ctx-max_display_attributes = 1;
ctx-str_vendor = mesa gallium vaapi;
diff --git a/src/gallium/state_trackers/va/image.c
b/src/gallium/state_trackers/va/image.c
index 8aaa29c..cd4044a 100644
--- a/src/gallium/state_trackers/va/image.c
+++ b/src/gallium/state_trackers/va/image.c
@@ -26,18 +26,66 @@
*
**/
+#include pipe/p_screen.h
+
+#include util/u_memory.h
+#include util/u_handle_table.h
+#include util/u_surface.h
+#include util/u_video.h
+
+#include vl/vl_winsys.h
+
#include va_private.h
+static const VAImageFormat formats[VL_VA_MAX_IMAGE_FORMATS] =
+{
+ {VA_FOURCC('N','V','1','2')},
+ {VA_FOURCC('I','4','2','0')},
+ {VA_FOURCC('Y','V','1','2')},
+ {VA_FOURCC('Y','U','Y','V')},
+ {VA_FOURCC('U','Y','V','Y')},
+};
+
+static void
+vlVaVideoSurfaceSize(vlVaSurface *p_surf, int component,
+ unsigned *width, unsigned *height)
+{
+ *width = p_surf-templat.width;
+ *height = p_surf-templat.height;
+
+ if (component 0) {
+ if (p_surf-templat.chroma_format == PIPE_VIDEO_CHROMA_FORMAT_420) {
+ *width /= 2;
+ *height /= 2;
+ } else if (p_surf-templat.chroma_format == PIPE_VIDEO_CHROMA_FORMAT_422)
+ *width /= 2;
+ }
+ if (p_surf-templat.interlaced)
+ *height /= 2;
+}
+
VAStatus
vlVaQueryImageFormats(VADriverContextP ctx, VAImageFormat *format_list, int
*num_formats)
{
+ struct pipe_screen *pscreen;
+ enum pipe_format format;
+ int i;
+
if (!ctx)
return VA_STATUS_ERROR_INVALID_CONTEXT;
if (!(format_list num_formats))
- return VA_STATUS_ERROR_UNKNOWN;
+ return VA_STATUS_ERROR_INVALID_PARAMETER;
*num_formats = 0;
+ pscreen = VL_VA_PSCREEN(ctx);
+ for (i = 0; i VL_VA_MAX_IMAGE_FORMATS; ++i) {
+ format = YCbCrToPipe(formats[i].fourcc);
+ if (pscreen-is_video_format_supported(pscreen, format,
+ PIPE_VIDEO_PROFILE_UNKNOWN,
+ PIPE_VIDEO_ENTRYPOINT_BITSTREAM))
+ format_list[(*num_formats)++] = formats[i];
+ }
return VA_STATUS_SUCCESS;
}
@@ -45,16 +93,61 @@ vlVaQueryImageFormats(VADriverContextP ctx, VAImageFormat
*format_list, int *num
VAStatus
vlVaCreateImage(VADriverContextP ctx, VAImageFormat *format, int width, int
height, VAImage *image)
{
+ vlVaDriver *drv;
+ int w, h;
+
if (!ctx)
return VA_STATUS_ERROR_INVALID_CONTEXT;
- if(!format)
- return VA_STATUS_ERROR_UNKNOWN;
+ if (!(format image width height))
+ return VA_STATUS_ERROR_INVALID_PARAMETER;
+
+ drv = VL_VA_DRIVER(ctx);
- if (!(width height))
+ image-image_id = handle_table_add(drv-htab, image);
+ image-format = *format;
+ image-width = width;
+ image-height = height;
+ w = align(width, 2);
+ h = align(width, 2);
+
+ switch (format-fourcc) {
+ case VA_FOURCC('N','V','1','2'):
+ image-num_planes = 2;
+ image-pitches[0] = w;
+ image-offsets[0] = 0;
+ image-pitches[1] = w;
+ image-offsets[1] = w * h;
+ image-data_size = w * h * 3 / 2;
+ break;
+
+ case VA_FOURCC('I','4','2','0'):
+ case VA_FOURCC('Y','V','1','2'):
+ image-num_planes = 3;
+ image-pitches[0] = w;
+ image-offsets[0] = 0;
+ image-pitches[1] = w / 2;
+ image-offsets[1] = w * h;
+ image-pitches[2] = w / 2;
+ image-offsets[2] = w * h * 5 / 4;
+ image-data_size = w * h * 3 / 2;
+ break;
+
+ case VA_FOURCC('U','Y','V','Y'):
+ case VA_FOURCC('Y','U','Y','V'):
+ image-num_planes = 1;
+ image-pitches[0] = w * 2;
+ image-offsets[0] = 0;
+ image-data_size = w * h * 2;
+ break;
+
+ default:
return VA_STATUS_ERROR_INVALID_IMAGE_FORMAT;
+ }
- return VA_STATUS_ERROR_UNIMPLEMENTED;
+ return vlVaCreateBuffer(ctx, 0,
[Mesa-dev] [PATCH v4 2/6] st/va: skeleton VAAPI state tracker
From: Christian König christian.koe...@amd.com
This patch adds a skeleton VA-API state tracker,
which is filled with live in the subsequent patches.
v2: fixes in configure.ac and va state_tracker Makefile.am
v3: do not link against libva.
detect libva version, and correctly set driver entrypoint name.
rebase(cleanup) targets/va/Makefile.am
v4: cleanup va version auto detection
add back targets/va/va.sym
Signed-off-by: Christian König christian.koe...@amd.com
Signed-off-by: Leo Liu leo@amd.com
---
configure.ac | 37 ++
src/gallium/Makefile.am| 4 +
src/gallium/state_trackers/va/Makefile.am | 37 ++
src/gallium/state_trackers/va/Makefile.sources | 10 ++
src/gallium/state_trackers/va/buffer.c | 87 ++
src/gallium/state_trackers/va/config.c | 91 +++
src/gallium/state_trackers/va/context.c| 151 +
src/gallium/state_trackers/va/display.c| 61 ++
src/gallium/state_trackers/va/image.c | 106 +
src/gallium/state_trackers/va/picture.c| 56 +
src/gallium/state_trackers/va/subpicture.c | 115 +++
src/gallium/state_trackers/va/surface.c| 111 ++
src/gallium/state_trackers/va/va_private.h | 116 +++
src/gallium/targets/va/Makefile.am | 63 +++
src/gallium/targets/va/target.c| 1 +
src/gallium/targets/va/va.sym | 6 +
16 files changed, 1052 insertions(+)
create mode 100644 src/gallium/state_trackers/va/Makefile.am
create mode 100644 src/gallium/state_trackers/va/Makefile.sources
create mode 100644 src/gallium/state_trackers/va/buffer.c
create mode 100644 src/gallium/state_trackers/va/config.c
create mode 100644 src/gallium/state_trackers/va/context.c
create mode 100644 src/gallium/state_trackers/va/display.c
create mode 100644 src/gallium/state_trackers/va/image.c
create mode 100644 src/gallium/state_trackers/va/picture.c
create mode 100644 src/gallium/state_trackers/va/subpicture.c
create mode 100644 src/gallium/state_trackers/va/surface.c
create mode 100644 src/gallium/state_trackers/va/va_private.h
create mode 100644 src/gallium/targets/va/Makefile.am
create mode 100644 src/gallium/targets/va/target.c
create mode 100644 src/gallium/targets/va/va.sym
diff --git a/configure.ac b/configure.ac
index c030c56..2a5c143 100644
--- a/configure.ac
+++ b/configure.ac
@@ -673,6 +673,11 @@ AC_ARG_ENABLE([omx],
[enable OpenMAX library @:@default=disabled@:@])],
[enable_omx=$enableval],
[enable_omx=no])
+AC_ARG_ENABLE([va],
+ [AS_HELP_STRING([--enable-va],
+ [enable va library @:@default=auto@:@])],
+ [enable_va=$enableval],
+ [enable_va=auto])
AC_ARG_ENABLE([opencl],
[AS_HELP_STRING([--enable-opencl],
[enable OpenCL library @:@default=disabled@:@])],
@@ -744,6 +749,7 @@ if test x$enable_opengl = xno -a \
x$enable_xvmc = xno -a \
x$enable_vdpau = xno -a \
x$enable_omx = xno -a \
+x$enable_va = xno -a \
x$enable_opencl = xno; then
AC_MSG_ERROR([at least one API should be enabled])
fi
@@ -1404,6 +1410,10 @@ if test -n $with_gallium_drivers -a
x$with_gallium_drivers != xswrast; then
if test x$enable_omx = xauto; then
PKG_CHECK_EXISTS([libomxil-bellagio], [enable_omx=yes], [enable_omx=no])
fi
+
+if test x$enable_va = xauto; then
+PKG_CHECK_EXISTS([libva], [enable_va=yes], [enable_va=no])
+fi
fi
if test x$enable_xvmc = xyes; then
@@ -1425,6 +1435,14 @@ if test x$enable_omx = xyes; then
fi
AM_CONDITIONAL(HAVE_ST_OMX, test x$enable_omx = xyes)
+if test x$enable_va = xyes; then
+PKG_CHECK_MODULES([VA], [libva = 0.35.0 x11-xcb xcb-dri2 =
$XCBDRI2_REQUIRED],
+ [VA_LIBS=`$PKG_CONFIG --libs x11-xcb xcb-dri2`])
+GALLIUM_STATE_TRACKERS_DIRS=$GALLIUM_STATE_TRACKERS_DIRS va
+enable_gallium_loader=$enable_shared_pipe_drivers
+fi
+AM_CONDITIONAL(HAVE_ST_VA, test x$enable_va = xyes)
+
dnl
dnl OpenCL configuration
dnl
@@ -1793,6 +1811,15 @@ AC_ARG_WITH([omx-libdir],
[OMX_LIB_INSTALL_DIR=$OMX_LIB_INSTALL_DIR_DEFAULT])
AC_SUBST([OMX_LIB_INSTALL_DIR])
+dnl Directory for VA libs
+
+AC_ARG_WITH([va-libdir],
+[AS_HELP_STRING([--with-va-libdir=DIR],
+[directory for the VA libraries @:@default=`pkg-config libva
--variable=driverdir`@:@])],
+[VA_LIB_INSTALL_DIR=$withval],
+[VA_LIB_INSTALL_DIR=`pkg-config libva --variable=driverdir`])
+AC_SUBST([VA_LIB_INSTALL_DIR])
+
dnl
dnl Gallium helper functions
dnl
@@ -1818,6 +1845,9 @@ gallium_require_drm_loader() {
fi
enable_gallium_drm_loader=yes
fi
+if test x$enable_va = xyes test x$7 != x; then
+ GALLIUM_TARGET_DIRS=$GALLIUM_TARGET_DIRS $7
+fi
}
require_egl_drm() {
@@ -2071,6 +2101,11 @@
Re: [Mesa-dev] [PATCH] Revert configure: ask vdpau.pc for the default location of the vdpau drivers
So all in all we have the following: Some distributions/people choose odd location of the modules. Which can lead to the system (vdpau/omx) looking at the wrong place for the backends, i.e. not working. One can consider that there is no way to override the module location at runtime. So we either - Try to be smart and auto-detect it at configure time, causing a violation of the --prefix , or - Choose a sane default, and let the packager worry about the broken setup. Imho the do the auto-detection only when the prefix is empty approach is useless as virtually everyone sets the prefix. As mentioned earlier, I expect the latter will cause more issues than the former thus why I've went with the patch. On the other hand the majority is inclined to do the correct thing, which means breaking some builds. How many volunteers do we have that will guide Debian/Ubuntu/other to do the correct thing ? If we have at least one, I will be OK with reverting the patch. -Emil ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] Revert configure: ask vdpau.pc for the default location of the vdpau drivers
On Mon, Sep 29, 2014 at 1:43 AM, Christian König
deathsim...@vodafone.de wrote:
Debian/Ubuntu for example installs things into
/usr/lib/x86_64-linux-gnu/vdpau/ and that's exactly what moduledir in
vdpau.pc is pointing to. We could do something like ${libdir}/vdpau instead,
but I think that is similar broken since it assumes that the module
directory is named vdpau.
That only sounds as broken as installing GL headers in a directory
named GL/. What am I missing?
(Installing to ${libdir}/vdpau sounds right to me)
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Re: [Mesa-dev] [PATCH] egl: setup screen iterator before using it
On Mon, Sep 29, 2014 at 5:08 AM, Tapani Pälli tapani.pa...@intel.com wrote: commit 4ed23fd broke creation of pbuffer surfaces, patch fixes the failure, noticed when running chrome with '--use-gl=egl'. Cc'ing JP so he can review as well. Reviewed-by: Matt Turner matts...@gmail.com ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [Bug 70920] [GLSL compiler] SIGSEGV for shaders/glsl-fs-inline-explosion
https://bugs.freedesktop.org/show_bug.cgi?id=70920 Ian Romanick i...@freedesktop.org changed: What|Removed |Added CC||huax...@intel.com --- Comment #7 from Ian Romanick i...@freedesktop.org --- *** Bug 84215 has been marked as a duplicate of this bug. *** -- You are receiving this mail because: You are on the CC list for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 14/12] i965/fs: Copy propagate partial reads.
On Fri, Sep 26, 2014 at 12:24 PM, Jason Ekstrand ja...@jlekstrand.net wrote:
This commit reworks copy propagation a bit to support propagating the
copying of partial registers. This comes up every time we have pull
constants because we do a pull constant read immediately followed by a move
to splat the one component of the out to 8 or 16-wide. This allows us to
eliminate the copy and simply use the one component of the register.
Shader DB results:
total instructions in shared programs: 5044937 - 5044428 (-0.01%)
instructions in affected programs: 66112 - 65603 (-0.77%)
GAINED:0
LOST: 0
Signed-off-by: Jason Ekstrand jason.ekstr...@intel.com
---
src/mesa/drivers/dri/i965/brw_fs.h | 1 +
.../drivers/dri/i965/brw_fs_copy_propagation.cpp | 83
--
2 files changed, 64 insertions(+), 20 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.h
b/src/mesa/drivers/dri/i965/brw_fs.h
index 50b5fc1..9b63114 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.h
+++ b/src/mesa/drivers/dri/i965/brw_fs.h
@@ -337,6 +337,7 @@ public:
bool opt_cse_local(bblock_t *block);
bool opt_copy_propagate();
bool try_copy_propagate(fs_inst *inst, int arg, acp_entry *entry);
+ bool try_constant_propagate(fs_inst *inst, acp_entry *entry);
bool opt_copy_propagate_local(void *mem_ctx, bblock_t *block,
exec_list *acp);
void opt_drop_redundant_mov_to_flags();
diff --git a/src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp
b/src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp
index e5816df..a97dc04 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp
@@ -277,24 +277,30 @@ is_logic_op(enum opcode opcode)
bool
fs_visitor::try_copy_propagate(fs_inst *inst, int arg, acp_entry *entry)
{
+ if (inst-src[arg].file != GRF)
+ return false;
+
if (entry-src.file == IMM)
return false;
+ assert(entry-src.file == GRF || entry-src.file == UNIFORM);
if (entry-opcode == SHADER_OPCODE_LOAD_PAYLOAD
inst-opcode == SHADER_OPCODE_LOAD_PAYLOAD)
return false;
- /* Bail if inst is reading more than entry is writing. */
- if ((inst-regs_read(this, arg) * inst-src[arg].stride *
-type_sz(inst-src[arg].type)) type_sz(entry-dst.type))
+ assert(entry-dst.file == GRF);
+ if (inst-src[arg].reg != entry-dst.reg)
return false;
- if (inst-src[arg].file != entry-dst.file ||
- inst-src[arg].reg != entry-dst.reg ||
- inst-src[arg].reg_offset != entry-dst.reg_offset ||
- inst-src[arg].subreg_offset != entry-dst.subreg_offset) {
+ /* Bail if inst is reading a range that isn't contained in the range
+* that entry is writing.
+*/
+ int reg_size = dispatch_width * sizeof(float);
+ if (inst-src[arg].reg_offset entry-dst.reg_offset ||
+ (inst-src[arg].reg_offset * reg_size + inst-src[arg].subreg_offset +
+inst-regs_read(this, arg) * inst-src[arg].stride * reg_size)
+ (entry-dst.reg_offset + 1) * reg_size)
return false;
- }
/* See resolve_ud_negate() and comment in brw_fs_emit.cpp. */
if (inst-conditional_mod
@@ -361,11 +367,39 @@ fs_visitor::try_copy_propagate(fs_inst *inst, int arg,
acp_entry *entry)
inst-src[arg].file = entry-src.file;
inst-src[arg].reg = entry-src.reg;
- inst-src[arg].reg_offset = entry-src.reg_offset;
- inst-src[arg].subreg_offset = entry-src.subreg_offset;
inst-src[arg].stride *= entry-src.stride;
inst-saturate = inst-saturate || entry-saturate;
+ switch (entry-src.file) {
+ case BAD_FILE:
+ case HW_REG:
+ case UNIFORM:
+ inst-src[arg].reg_offset = entry-src.reg_offset;
+ inst-src[arg].subreg_offset = entry-src.subreg_offset;
+ break;
+ case GRF:
+ {
+ /* In this case, we have to deal with mapping parts of vgrfs to
+ * other parts of vgrfs so we have to do some reg_offset magic.
+ */
+
+ /* Compute the offset of inst-src[arg] relative to inst-dst */
+ assert(entry-dst.subreg_offset == 0);
+ int rel_offset = inst-src[arg].reg_offset - entry-dst.reg_offset;
+ int rel_suboffset = inst-src[arg].subreg_offset;
+
+ /* Compute the final register offset (in bytes) */
+ int offset = entry-src.reg_offset * reg_size +
entry-src.subreg_offset;
+ offset += rel_offset * reg_size + rel_suboffset;
+ inst-src[arg].reg_offset = offset / reg_size;
+ inst-src[arg].subreg_offset = offset % reg_size;
+ }
+ break;
+ default:
+ unreachable(Invalid register file);
+ break;
+ }
+
if (!inst-src[arg].abs) {
inst-src[arg].abs = entry-src.abs;
inst-src[arg].negate ^= entry-src.negate;
@@ -375,9 +409,8 @@
Re: [Mesa-dev] [PATCH 06.5/41] SQUAHS: i965/fs: Always 2-align registers SIMD16 for gen = 5
On Fri, Sep 26, 2014 at 12:24 PM, Jason Ekstrand ja...@jlekstrand.net wrote:
---
src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp | 61
++-
1 file changed, 48 insertions(+), 13 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp
b/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp
index 567f8e2..8d96906 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp
@@ -117,7 +117,21 @@ brw_alloc_reg_set(struct intel_screen *screen, int
reg_width)
/* Compute the total number of registers across all classes. */
int ra_reg_count = 0;
for (int i = 0; i class_count; i++) {
- ra_reg_count += base_reg_count - (class_sizes[i] - 1);
+ if (devinfo-gen = 5 reg_width == 2) {
+ /* From the GM5 PRM:
G45
I think I want you to explain how this works at the office today.
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Re: [Mesa-dev] [PATCH v3 2/6] st/va: skeleton VAAPI state tracker
Hi Emil, Thanks for the explanation. V4 has been sent, please review. Thanks, Leo -Original Message- From: Emil Velikov [mailto:emil.l.veli...@gmail.com] Sent: Monday, September 29, 2014 12:27 PM To: Liu, Leo Cc: mesa-dev@lists.freedesktop.org; Koenig, Christian Subject: Re: [Mesa-dev] [PATCH v3 2/6] st/va: skeleton VAAPI state tracker Hi Leo, [...] It seems that you've dropped the sym file. Is that intentional, can we get it back please ? I will get it back. What's the purpose of this sym file? Thanks. It can be used for two purposes - version/tag exported symbols, manager exported/private symbols. We use the latter, otherwise our libraries will export functions which they should not. Mostly llvm symbols plus a few other which cannot be easily fixed otherwise. +dnl Directory for VA libs + +AC_ARG_WITH([va-libdir], +[AS_HELP_STRING([--with-va-libdir=DIR], +[directory for the VA libraries @:@default=`pkg-config +libva -- variable=driverdir`@:@])], +[VA_LIB_INSTALL_DIR=$withval], +[VA_LIB_INSTALL_DIR=`pkg-config libva --variable=driverdir`]) +AC_SUBST([VA_LIB_INSTALL_DIR]) + The above hunk has silently changed since v2 and I'm not sure this one is better. Also there is a discussion about mesa's use of the above pkg-config to set the destination/install dir. I'll amend mesa at a later stage once a decision is made :) So, Can I just keep it like this for now? I meant the complete opposite, but don't bother. Most likely I'll redo this in a day or so. -Emil ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] Revert configure: ask vdpau.pc for the default location of the vdpau drivers
On Mon, Sep 29, 2014 at 9:16 AM, Emil Velikov emil.l.veli...@gmail.com wrote:
So all in all we have the following:
Some distributions/people choose odd location of the modules. Which
can lead to the system (vdpau/omx) looking at the wrong place for the
backends, i.e. not working. One can consider that there is no way to
override the module location at runtime.
Do we have more specifics? If they're doing something stupid and it
breaks, they typically get to keep the pieces.
Debian/Ubuntu install to /usr/lib/x86_64-linux-gnu/vdpau/? Isn't
${libdir} just /usr/lib/x86_64-linux-gnu/ in that case?
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Re: [Mesa-dev] [PATCH v3 2/6] st/va: skeleton VAAPI state tracker
Hi Leo, [...] It seems that you've dropped the sym file. Is that intentional, can we get it back please ? I will get it back. What's the purpose of this sym file? Thanks. It can be used for two purposes - version/tag exported symbols, manager exported/private symbols. We use the latter, otherwise our libraries will export functions which they should not. Mostly llvm symbols plus a few other which cannot be easily fixed otherwise. +dnl Directory for VA libs + +AC_ARG_WITH([va-libdir], +[AS_HELP_STRING([--with-va-libdir=DIR], +[directory for the VA libraries @:@default=`pkg-config libva -- variable=driverdir`@:@])], +[VA_LIB_INSTALL_DIR=$withval], +[VA_LIB_INSTALL_DIR=`pkg-config libva --variable=driverdir`]) +AC_SUBST([VA_LIB_INSTALL_DIR]) + The above hunk has silently changed since v2 and I'm not sure this one is better. Also there is a discussion about mesa's use of the above pkg-config to set the destination/install dir. I'll amend mesa at a later stage once a decision is made :) So, Can I just keep it like this for now? I meant the complete opposite, but don't bother. Most likely I'll redo this in a day or so. -Emil ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 14/12] i965/fs: Copy propagate partial reads.
On Mon, Sep 29, 2014 at 9:50 AM, Matt Turner matts...@gmail.com wrote:
On Fri, Sep 26, 2014 at 12:24 PM, Jason Ekstrand ja...@jlekstrand.net
wrote:
This commit reworks copy propagation a bit to support propagating the
copying of partial registers. This comes up every time we have pull
constants because we do a pull constant read immediately followed by a
move
to splat the one component of the out to 8 or 16-wide. This allows us to
eliminate the copy and simply use the one component of the register.
Shader DB results:
total instructions in shared programs: 5044937 - 5044428 (-0.01%)
instructions in affected programs: 66112 - 65603 (-0.77%)
GAINED:0
LOST: 0
Signed-off-by: Jason Ekstrand jason.ekstr...@intel.com
---
src/mesa/drivers/dri/i965/brw_fs.h | 1 +
.../drivers/dri/i965/brw_fs_copy_propagation.cpp | 83
--
2 files changed, 64 insertions(+), 20 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.h
b/src/mesa/drivers/dri/i965/brw_fs.h
index 50b5fc1..9b63114 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.h
+++ b/src/mesa/drivers/dri/i965/brw_fs.h
@@ -337,6 +337,7 @@ public:
bool opt_cse_local(bblock_t *block);
bool opt_copy_propagate();
bool try_copy_propagate(fs_inst *inst, int arg, acp_entry *entry);
+ bool try_constant_propagate(fs_inst *inst, acp_entry *entry);
bool opt_copy_propagate_local(void *mem_ctx, bblock_t *block,
exec_list *acp);
void opt_drop_redundant_mov_to_flags();
diff --git a/src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp
b/src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp
index e5816df..a97dc04 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp
@@ -277,24 +277,30 @@ is_logic_op(enum opcode opcode)
bool
fs_visitor::try_copy_propagate(fs_inst *inst, int arg, acp_entry *entry)
{
+ if (inst-src[arg].file != GRF)
+ return false;
+
if (entry-src.file == IMM)
return false;
+ assert(entry-src.file == GRF || entry-src.file == UNIFORM);
if (entry-opcode == SHADER_OPCODE_LOAD_PAYLOAD
inst-opcode == SHADER_OPCODE_LOAD_PAYLOAD)
return false;
- /* Bail if inst is reading more than entry is writing. */
- if ((inst-regs_read(this, arg) * inst-src[arg].stride *
-type_sz(inst-src[arg].type)) type_sz(entry-dst.type))
+ assert(entry-dst.file == GRF);
+ if (inst-src[arg].reg != entry-dst.reg)
return false;
- if (inst-src[arg].file != entry-dst.file ||
- inst-src[arg].reg != entry-dst.reg ||
- inst-src[arg].reg_offset != entry-dst.reg_offset ||
- inst-src[arg].subreg_offset != entry-dst.subreg_offset) {
+ /* Bail if inst is reading a range that isn't contained in the range
+* that entry is writing.
+*/
+ int reg_size = dispatch_width * sizeof(float);
+ if (inst-src[arg].reg_offset entry-dst.reg_offset ||
+ (inst-src[arg].reg_offset * reg_size +
inst-src[arg].subreg_offset +
+inst-regs_read(this, arg) * inst-src[arg].stride * reg_size)
+ (entry-dst.reg_offset + 1) * reg_size)
return false;
- }
/* See resolve_ud_negate() and comment in brw_fs_emit.cpp. */
if (inst-conditional_mod
@@ -361,11 +367,39 @@ fs_visitor::try_copy_propagate(fs_inst *inst, int
arg, acp_entry *entry)
inst-src[arg].file = entry-src.file;
inst-src[arg].reg = entry-src.reg;
- inst-src[arg].reg_offset = entry-src.reg_offset;
- inst-src[arg].subreg_offset = entry-src.subreg_offset;
inst-src[arg].stride *= entry-src.stride;
inst-saturate = inst-saturate || entry-saturate;
+ switch (entry-src.file) {
+ case BAD_FILE:
+ case HW_REG:
+ case UNIFORM:
+ inst-src[arg].reg_offset = entry-src.reg_offset;
+ inst-src[arg].subreg_offset = entry-src.subreg_offset;
+ break;
+ case GRF:
+ {
+ /* In this case, we have to deal with mapping parts of vgrfs to
+ * other parts of vgrfs so we have to do some reg_offset magic.
+ */
+
+ /* Compute the offset of inst-src[arg] relative to inst-dst
*/
+ assert(entry-dst.subreg_offset == 0);
+ int rel_offset = inst-src[arg].reg_offset -
entry-dst.reg_offset;
+ int rel_suboffset = inst-src[arg].subreg_offset;
+
+ /* Compute the final register offset (in bytes) */
+ int offset = entry-src.reg_offset * reg_size +
entry-src.subreg_offset;
+ offset += rel_offset * reg_size + rel_suboffset;
+ inst-src[arg].reg_offset = offset / reg_size;
+ inst-src[arg].subreg_offset = offset % reg_size;
+ }
+ break;
+ default:
+ unreachable(Invalid
Re: [Mesa-dev] [PATCH 1/3] driconf: Synchronize po files
2014-09-29 9:17 GMT-06:00 Alex Deucher alexdeuc...@gmail.com: On Fri, Sep 26, 2014 at 4:31 PM, Alex Henrie alexhenri...@gmail.com wrote: --- src/mesa/drivers/dri/common/xmlpool/ca.po | 119 -- src/mesa/drivers/dri/common/xmlpool/de.po | 118 - src/mesa/drivers/dri/common/xmlpool/es.po | 118 - src/mesa/drivers/dri/common/xmlpool/fr.po | 118 - src/mesa/drivers/dri/common/xmlpool/nl.po | 118 - src/mesa/drivers/dri/common/xmlpool/sv.po | 118 - 6 files changed, 390 insertions(+), 319 deletions(-) This series is: Reviewed-by: Alex Deucher alexander.deuc...@amd.com Do you need someone to commit this for you? Yes. (I do not have commit privileges to Mesa.) -Alex ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 1/4] st/mesa: remove unneded PIPE_TEXTURE_CUBE check in st_texture_create()
Earlier in the function we assert layers==6 for PIPE_TEXTURE_CUBE so there's no reason to special-case the pt.array_size = layers assignment. --- src/mesa/state_tracker/st_texture.c |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mesa/state_tracker/st_texture.c b/src/mesa/state_tracker/st_texture.c index 2cd95ec..5996b7d 100644 --- a/src/mesa/state_tracker/st_texture.c +++ b/src/mesa/state_tracker/st_texture.c @@ -88,7 +88,7 @@ st_texture_create(struct st_context *st, pt.width0 = width0; pt.height0 = height0; pt.depth0 = depth0; - pt.array_size = (target == PIPE_TEXTURE_CUBE ? 6 : layers); + pt.array_size = layers; pt.usage = PIPE_USAGE_DEFAULT; pt.bind = bind; pt.flags = 0; -- 1.7.10.4 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 4/4] softpipe: don't special case PIPE_TEXTURE_CUBE in softpipe_resource_layout()
As with the previous patch for llvmpipe. --- src/gallium/drivers/softpipe/sp_texture.c |5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/softpipe/sp_texture.c b/src/gallium/drivers/softpipe/sp_texture.c index c2df71e..e1ea5df 100644 --- a/src/gallium/drivers/softpipe/sp_texture.c +++ b/src/gallium/drivers/softpipe/sp_texture.c @@ -68,8 +68,9 @@ softpipe_resource_layout(struct pipe_screen *screen, nblocksy = util_format_get_nblocksy(pt-format, height); if (pt-target == PIPE_TEXTURE_CUBE) - slices = 6; - else if (pt-target == PIPE_TEXTURE_3D) + assert(pt-array_size == 6); + + if (pt-target == PIPE_TEXTURE_3D) slices = depth; else slices = pt-array_size; -- 1.7.10.4 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 2/4] gallium: add doc note about cube textures and can_create_resource()
Just to be clear, and echo the description for resource_create(). --- src/gallium/docs/source/screen.rst |2 ++ 1 file changed, 2 insertions(+) diff --git a/src/gallium/docs/source/screen.rst b/src/gallium/docs/source/screen.rst index c83be12..f4e9204 100644 --- a/src/gallium/docs/source/screen.rst +++ b/src/gallium/docs/source/screen.rst @@ -486,6 +486,8 @@ memory). This is used to implement OpenGL's proxy textures. Typically, a driver will simply check if the total size of the given resource is less than some limit. +For PIPE_TEXTURE_CUBE, the pipe_resource::array_size field should be 6. + .. _resource_create: -- 1.7.10.4 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 3/4] llvmpipe: remove special case for PIPE_TEXTURE_CUBE in llvmpipe_texture_layout()
layers (aka array_size) should be 6 for cube textures so we don't need
to special-case it. But add an assertion just to be safe.
---
src/gallium/drivers/llvmpipe/lp_texture.c |9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/src/gallium/drivers/llvmpipe/lp_texture.c
b/src/gallium/drivers/llvmpipe/lp_texture.c
index ba0e7f8..a7d7ad4 100644
--- a/src/gallium/drivers/llvmpipe/lp_texture.c
+++ b/src/gallium/drivers/llvmpipe/lp_texture.c
@@ -132,12 +132,15 @@ llvmpipe_texture_layout(struct llvmpipe_screen *screen,
lpr-img_stride[level] = lpr-row_stride[level] * nblocksy;
/* Number of 3D image slices, cube faces or texture array layers */
- if (lpr-base.target == PIPE_TEXTURE_CUBE)
- num_slices = 6;
- else if (lpr-base.target == PIPE_TEXTURE_3D)
+ if (lpr-base.target == PIPE_TEXTURE_CUBE) {
+ assert(layers == 6);
+ }
+
+ if (lpr-base.target == PIPE_TEXTURE_3D)
num_slices = depth;
else if (lpr-base.target == PIPE_TEXTURE_1D_ARRAY ||
lpr-base.target == PIPE_TEXTURE_2D_ARRAY ||
+ lpr-base.target == PIPE_TEXTURE_CUBE ||
lpr-base.target == PIPE_TEXTURE_CUBE_ARRAY)
num_slices = layers;
else
--
1.7.10.4
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Re: [Mesa-dev] [PATCH 1/4] st/mesa: remove unneded PIPE_TEXTURE_CUBE check in st_texture_create()
Series is Reviewed-by: Ilia Mirkin imir...@alum.mit.edu One more place I remember is in util_max_layer() which also special-cases CUBE, where it could just be added to the *_ARRAY case. On Mon, Sep 29, 2014 at 12:56 PM, Brian Paul bri...@vmware.com wrote: Earlier in the function we assert layers==6 for PIPE_TEXTURE_CUBE so there's no reason to special-case the pt.array_size = layers assignment. --- src/mesa/state_tracker/st_texture.c |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mesa/state_tracker/st_texture.c b/src/mesa/state_tracker/st_texture.c index 2cd95ec..5996b7d 100644 --- a/src/mesa/state_tracker/st_texture.c +++ b/src/mesa/state_tracker/st_texture.c @@ -88,7 +88,7 @@ st_texture_create(struct st_context *st, pt.width0 = width0; pt.height0 = height0; pt.depth0 = depth0; - pt.array_size = (target == PIPE_TEXTURE_CUBE ? 6 : layers); + pt.array_size = layers; pt.usage = PIPE_USAGE_DEFAULT; pt.bind = bind; pt.flags = 0; -- 1.7.10.4 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH v3] glsl: Optimize min/max expression trees
On Mon, Sep 29, 2014 at 7:49 AM, Iago Toral Quiroga ito...@igalia.com wrote: Original patch by Petri Latvala petri.latv...@intel.com: Add an optimization pass that drops min/max expression operands that can be proven to not contribute to the final result. The algorithm is similar to alpha-beta pruning on a minmax search, from the field of AI. This optimization pass can optimize min/max expressions where operands are min/max expressions. Such code can appear in shaders by itself, or as the result of clamp() or AMD_shader_trinary_minmax functions. This optimization pass improves the generated code for piglit's AMD_shader_trinary_minmax tests as follows: total instructions in shared programs: 75 - 67 (-10.67%) instructions in affected programs: 60 - 52 (-13.33%) GAINED:0 LOST: 0 All tests (max3, min3, mid3) improved. A full shader-db run: total instructions in shared programs: 4293603 - 4293575 (-0.00%) instructions in affected programs: 1188 - 1160 (-2.36%) GAINED:0 LOST: 0 Improvements happen in Guacamelee and Serious Sam 3. One shader from Dungeon Defenders is hurt by shader-db metrics (26 - 28), because of dropping of a (constant float (0.0)) operand, which was compiled to a saturate modifier. Version 2 by Iago Toral Quiroga ito...@igalia.com: Changes from review feedback: - Squashed various cosmetic changes sent by Matt Turner. - Make less_all_components return an enum rather than setting a class member. (Suggested by Mat Turner). Also, renamed it to compare_components. - Make less_all_components, smaller_constant and larger_constant static. (Suggested by Mat Turner) - Change mixmax_range to call its limits low and high instead of range[0] and range[1]. (Suggested by Connor Abbot). - Use ir_builder swizzle helpers in swizzle_if_required(). (Suggested by Connor Abbot). - Make the logic more clearer by rearrenging the code and commenting. (Suggested by Connor Abbot). - Added comment to explain why we need to recurse twice. (Suggested by Connor Abbot). - If we cannot prune an expression, do not return early. Instead, attempt to prune its children. (Suggested by Connor Abbot). Other changes: - Instead of having a global valid visitor member, let the various functions that can determine this status return a boolean and check for its value to decide what to do in each case. This is more flexible and allows to recurse into children of parents that could not be prunned due to invalid ranges (so related to the last bullet in the review feedback). - Make sure we always check if a range is valid before working with it. Since any use of get_range, combine_range or range_intersection can invalidate a range we should check for this situation every time we use any of these functions. Version 3 by Iago Toral Quiroga ito...@igalia.com: Changes from review feedback: - Now we can make get_range, combine_range and range_intersection static too (suggested by Connor Abbot). - Do not return NULL when looking for the larger or greater constant into mixed vector constants. Instead, produce a new constant by doing a component-wise minmax. With this we can also remove of the validations when we call into these functions (suggested by Connor Abbot). - Add a comment explaining the meaning of the baserange argument in prune_expression (suggested by Connor Abbot). Other changes: - Eliminate minmax expressions operating on constant vectors with mixed values by resolving them. No piglit regressions observed with Version 3. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=76861 --- Version 3 passes all minmax unit tests sent in the original series by Petri, except for the ones aimed at mixed vectors because this version produces better code for these than what is expected by these tests. Thanks for cleaning this up! This patch is Reviewed-by: Connor Abbott cwabbo...@gmail.com Dylan had some style comments on the Python patches IIRC, but other than that I think they looked good (assuming you fix the broken tests you mentioned) - it has been a while though. src/glsl/Makefile.sources | 1 + src/glsl/glsl_parser_extras.cpp | 1 + src/glsl/ir_optimization.h | 1 + src/glsl/opt_minmax.cpp | 464 4 files changed, 467 insertions(+) create mode 100644 src/glsl/opt_minmax.cpp diff --git a/src/glsl/Makefile.sources b/src/glsl/Makefile.sources index cb8d5a6..1c08697 100644 --- a/src/glsl/Makefile.sources +++ b/src/glsl/Makefile.sources @@ -95,6 +95,7 @@ LIBGLSL_FILES = \ $(GLSL_SRCDIR)/opt_flip_matrices.cpp \ $(GLSL_SRCDIR)/opt_function_inlining.cpp \ $(GLSL_SRCDIR)/opt_if_simplification.cpp \ + $(GLSL_SRCDIR)/opt_minmax.cpp \
[Mesa-dev] [PATCH] i965: Use BRW_MATH_DATA_SCALAR when source regioning is scalar.
Notice the mistaken (but harmless) argument swapping in brw_math_invert().
---
src/mesa/drivers/dri/i965/brw_eu.h | 1 -
src/mesa/drivers/dri/i965/brw_eu_emit.c | 9 -
src/mesa/drivers/dri/i965/brw_eu_util.c | 3 +--
src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 3 ---
src/mesa/drivers/dri/i965/brw_sf_emit.c | 2 --
src/mesa/drivers/dri/i965/brw_vec4_generator.cpp | 2 --
6 files changed, 9 insertions(+), 11 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_eu.h
b/src/mesa/drivers/dri/i965/brw_eu.h
index e6c26e3..db40497 100644
--- a/src/mesa/drivers/dri/i965/brw_eu.h
+++ b/src/mesa/drivers/dri/i965/brw_eu.h
@@ -291,7 +291,6 @@ void gen4_math(struct brw_compile *p,
unsigned function,
unsigned msg_reg_nr,
struct brw_reg src,
- unsigned data_type,
unsigned precision );
void gen6_math(struct brw_compile *p,
diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c
b/src/mesa/drivers/dri/i965/brw_eu_emit.c
index 15e1da7..e4488fc 100644
--- a/src/mesa/drivers/dri/i965/brw_eu_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c
@@ -1879,11 +1879,18 @@ void gen4_math(struct brw_compile *p,
unsigned function,
unsigned msg_reg_nr,
struct brw_reg src,
- unsigned data_type,
unsigned precision )
{
struct brw_context *brw = p-brw;
brw_inst *insn = next_insn(p, BRW_OPCODE_SEND);
+ unsigned data_type;
+ if (src.vstride == BRW_VERTICAL_STRIDE_0
+ src.width == BRW_WIDTH_1
+ src.hstride == BRW_HORIZONTAL_STRIDE_0) {
+ data_type = BRW_MATH_DATA_SCALAR;
+ } else {
+ data_type = BRW_MATH_DATA_VECTOR;
+ }
assert(brw-gen 6);
diff --git a/src/mesa/drivers/dri/i965/brw_eu_util.c
b/src/mesa/drivers/dri/i965/brw_eu_util.c
index 0950fad..af4cfaf 100644
--- a/src/mesa/drivers/dri/i965/brw_eu_util.c
+++ b/src/mesa/drivers/dri/i965/brw_eu_util.c
@@ -44,8 +44,7 @@ void brw_math_invert( struct brw_compile *p,
BRW_MATH_FUNCTION_INV,
0,
src,
-BRW_MATH_PRECISION_FULL,
-BRW_MATH_DATA_VECTOR );
+BRW_MATH_PRECISION_FULL);
}
diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
index 1bc10f5..e523df5 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
@@ -342,7 +342,6 @@ fs_generator::generate_math_gen4(fs_inst *inst,
gen4_math(p, dst,
op,
inst-base_mrf, src,
-BRW_MATH_DATA_VECTOR,
BRW_MATH_PRECISION_FULL);
if (dispatch_width == 16) {
@@ -350,7 +349,6 @@ fs_generator::generate_math_gen4(fs_inst *inst,
gen4_math(p, sechalf(dst),
op,
inst-base_mrf + 1, sechalf(src),
- BRW_MATH_DATA_VECTOR,
BRW_MATH_PRECISION_FULL);
brw_set_default_compression_control(p, BRW_COMPRESSION_COMPRESSED);
@@ -376,7 +374,6 @@ fs_generator::generate_math_g45(fs_inst *inst,
gen4_math(p, dst,
op,
inst-base_mrf, src,
- BRW_MATH_DATA_VECTOR,
BRW_MATH_PRECISION_FULL);
}
diff --git a/src/mesa/drivers/dri/i965/brw_sf_emit.c
b/src/mesa/drivers/dri/i965/brw_sf_emit.c
index 04d21a8..e8bf716 100644
--- a/src/mesa/drivers/dri/i965/brw_sf_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_sf_emit.c
@@ -327,7 +327,6 @@ static void invert_det( struct brw_sf_compile *c)
BRW_MATH_FUNCTION_INV,
0,
c-det,
-BRW_MATH_DATA_SCALAR,
BRW_MATH_PRECISION_FULL);
}
@@ -616,7 +615,6 @@ void brw_emit_point_sprite_setup(struct brw_sf_compile *c,
bool allocate)
BRW_MATH_FUNCTION_INV,
0,
c-dx0,
- BRW_MATH_DATA_SCALAR,
BRW_MATH_PRECISION_FULL);
brw_set_default_access_mode(p, BRW_ALIGN_16);
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
index 8869538..e522567 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
@@ -157,7 +157,6 @@ vec4_generator::generate_math1_gen4(vec4_instruction *inst,
brw_math_function(inst-opcode),
inst-base_mrf,
src,
-BRW_MATH_DATA_VECTOR,
BRW_MATH_PRECISION_FULL);
}
@@ -218,7 +217,6 @@ vec4_generator::generate_math2_gen4(vec4_instruction *inst,
brw_math_function(inst-opcode),
inst-base_mrf,
op0,
-BRW_MATH_DATA_VECTOR,
BRW_MATH_PRECISION_FULL);
}
--
1.8.5.5
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Re: [Mesa-dev] [PATCH 3/6] i965/fs: Allow SIMD16 borrow/carry/64-bit multiply on Gen 7.
On Sun, Sep 28, 2014 at 4:26 PM, Matt Turner matts...@gmail.com wrote:
These checks were intended for Gen 7 only. None of these restrictions
apply to Gen 8.
---
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
index 8e4a25a..e1f5735 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
@@ -648,7 +648,7 @@ fs_visitor::visit(ir_expression *ir)
}
break;
case ir_binop_imul_high: {
- if (brw-gen = 7)
+ if (brw-gen == 7)
no16(SIMD16 explicit accumulator operands unsupported\n);
struct brw_reg acc = retype(brw_acc_reg(), this-result.type);
@@ -684,7 +684,7 @@ fs_visitor::visit(ir_expression *ir)
emit_math(SHADER_OPCODE_INT_QUOTIENT, this-result, op[0], op[1]);
break;
case ir_binop_carry: {
- if (brw-gen = 7)
+ if (brw-gen == 7)
no16(SIMD16 explicit accumulator operands unsupported\n);
struct brw_reg acc = retype(brw_acc_reg(), BRW_REGISTER_TYPE_UD);
@@ -694,7 +694,7 @@ fs_visitor::visit(ir_expression *ir)
break;
}
case ir_binop_borrow: {
- if (brw-gen = 7)
+ if (brw-gen == 7)
no16(SIMD16 explicit accumulator operands unsupported\n);
struct brw_reg acc = retype(brw_acc_reg(), BRW_REGISTER_TYPE_UD);
--
1.8.5.5
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Just FYI, I think I copied a lot of this code into the NIR frontend,
so this will probably have to be fixed there too...
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Re: [Mesa-dev] [PATCH] i965: Use BRW_MATH_DATA_SCALAR when source regioning is scalar.
On Monday, September 29, 2014 11:02:32 AM Matt Turner wrote:
Notice the mistaken (but harmless) argument swapping in brw_math_invert().
Yuck :) Thanks for fixing that.
This looks good to me. It would be great to have some benchmark numbers (on
anything), but it also cleans up the code, so...
Reviewed-by: Kenneth Graunke kenn...@whitecape.org
---
src/mesa/drivers/dri/i965/brw_eu.h | 1 -
src/mesa/drivers/dri/i965/brw_eu_emit.c | 9 -
src/mesa/drivers/dri/i965/brw_eu_util.c | 3 +--
src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 3 ---
src/mesa/drivers/dri/i965/brw_sf_emit.c | 2 --
src/mesa/drivers/dri/i965/brw_vec4_generator.cpp | 2 --
6 files changed, 9 insertions(+), 11 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_eu.h
b/src/mesa/drivers/dri/i965/brw_eu.h
index e6c26e3..db40497 100644
--- a/src/mesa/drivers/dri/i965/brw_eu.h
+++ b/src/mesa/drivers/dri/i965/brw_eu.h
@@ -291,7 +291,6 @@ void gen4_math(struct brw_compile *p,
unsigned function,
unsigned msg_reg_nr,
struct brw_reg src,
-unsigned data_type,
unsigned precision );
void gen6_math(struct brw_compile *p,
diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c
b/src/mesa/drivers/dri/i965/brw_eu_emit.c
index 15e1da7..e4488fc 100644
--- a/src/mesa/drivers/dri/i965/brw_eu_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c
@@ -1879,11 +1879,18 @@ void gen4_math(struct brw_compile *p,
unsigned function,
unsigned msg_reg_nr,
struct brw_reg src,
-unsigned data_type,
unsigned precision )
{
struct brw_context *brw = p-brw;
brw_inst *insn = next_insn(p, BRW_OPCODE_SEND);
+ unsigned data_type;
+ if (src.vstride == BRW_VERTICAL_STRIDE_0
+ src.width == BRW_WIDTH_1
+ src.hstride == BRW_HORIZONTAL_STRIDE_0) {
+ data_type = BRW_MATH_DATA_SCALAR;
+ } else {
+ data_type = BRW_MATH_DATA_VECTOR;
+ }
assert(brw-gen 6);
diff --git a/src/mesa/drivers/dri/i965/brw_eu_util.c
b/src/mesa/drivers/dri/i965/brw_eu_util.c
index 0950fad..af4cfaf 100644
--- a/src/mesa/drivers/dri/i965/brw_eu_util.c
+++ b/src/mesa/drivers/dri/i965/brw_eu_util.c
@@ -44,8 +44,7 @@ void brw_math_invert( struct brw_compile *p,
BRW_MATH_FUNCTION_INV,
0,
src,
- BRW_MATH_PRECISION_FULL,
- BRW_MATH_DATA_VECTOR );
+ BRW_MATH_PRECISION_FULL);
}
diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
index 1bc10f5..e523df5 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
@@ -342,7 +342,6 @@ fs_generator::generate_math_gen4(fs_inst *inst,
gen4_math(p, dst,
op,
inst-base_mrf, src,
- BRW_MATH_DATA_VECTOR,
BRW_MATH_PRECISION_FULL);
if (dispatch_width == 16) {
@@ -350,7 +349,6 @@ fs_generator::generate_math_gen4(fs_inst *inst,
gen4_math(p, sechalf(dst),
op,
inst-base_mrf + 1, sechalf(src),
- BRW_MATH_DATA_VECTOR,
BRW_MATH_PRECISION_FULL);
brw_set_default_compression_control(p, BRW_COMPRESSION_COMPRESSED);
@@ -376,7 +374,6 @@ fs_generator::generate_math_g45(fs_inst *inst,
gen4_math(p, dst,
op,
inst-base_mrf, src,
- BRW_MATH_DATA_VECTOR,
BRW_MATH_PRECISION_FULL);
}
diff --git a/src/mesa/drivers/dri/i965/brw_sf_emit.c
b/src/mesa/drivers/dri/i965/brw_sf_emit.c
index 04d21a8..e8bf716 100644
--- a/src/mesa/drivers/dri/i965/brw_sf_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_sf_emit.c
@@ -327,7 +327,6 @@ static void invert_det( struct brw_sf_compile *c)
BRW_MATH_FUNCTION_INV,
0,
c-det,
- BRW_MATH_DATA_SCALAR,
BRW_MATH_PRECISION_FULL);
}
@@ -616,7 +615,6 @@ void brw_emit_point_sprite_setup(struct brw_sf_compile
*c, bool allocate)
BRW_MATH_FUNCTION_INV,
0,
c-dx0,
-BRW_MATH_DATA_SCALAR,
BRW_MATH_PRECISION_FULL);
brw_set_default_access_mode(p, BRW_ALIGN_16);
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
index 8869538..e522567 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
@@ -157,7 +157,6 @@ vec4_generator::generate_math1_gen4(vec4_instruction
*inst,
brw_math_function(inst-opcode),
inst-base_mrf,
src,
- BRW_MATH_DATA_VECTOR,
BRW_MATH_PRECISION_FULL);
}
@@ -218,7 +217,6 @@ vec4_generator::generate_math2_gen4(vec4_instruction
*inst,
Re: [Mesa-dev] [PATCH] glx/dri3: Use four buffers until X driver supports async flips
I can't really verify the X bits of this patch. However, I do understand the problem and I can verify that using quad-buffering is a totally sane solution. We had this issue about a year ago with Wayland apps trying to do eglSwapInterval(0) and mesa quad-buffers in that case too. Acked-by: Jason Ekstrand jason.ekstr...@intel.com On Mon, Sep 29, 2014 at 12:25 PM, Matt Turner matts...@gmail.com wrote: Cc'ing people who might be able to review. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] glx/dri3: Use four buffers until X driver supports async flips
Tested-by: Dylan Baker baker.dyla...@gmail.com On Wednesday, July 02, 2014 02:28:07 PM Keith Packard wrote: A driver which doesn't have async flip support will queue up flips without any way to replace them afterwards. This means we've got a scanout buffer pinned as soon as we schedule a flip and so we need another buffer to keep from stalling. When vblank_mode=0, if there are only three buffers we do: current scanout buffer = 0 at MSC 0 Render frame 1 to buffer 1 PresentPixmap for buffer 1 at MSC 1 This is sitting down in the kernel waiting for vblank to become the next scanout buffer Render frame 2 to buffer 2 PresentPixmap for buffer 2 at MSC 1 This cannot be displayed at MSC 1 because the kernel doesn't have any way to replace buffer 1 as the pending scanout buffer. So, best case this will get displayed at MSC 2. Now we block after this, waiting for one of the three buffers to become idle. We can't use buffer 0 because it is the scanout buffer. We can't use buffer 1 because it's sitting in the kernel waiting to become the next scanout buffer and we can't use buffer 2 because that's the most recent frame which will become the next scanout buffer if the application doesn't manage to generate another complete frame by MSC 2. With four buffers, we get: current scanout buffer = 0 at MSC 0 Render frame 1 to buffer 1 PresentPixmap for buffer 1 at MSC 1 This is sitting down in the kernel waiting for vblank to become the next scanout buffer Render frame 2 to buffer 2 PresentPixmap for buffer 2 at MSC 1 This cannot be displayed at MSC 1 because the kernel doesn't have any way to replace buffer 1 as the pending scanout buffer. So, best case this will get displayed at MSC 2. The X server will queue this swap until buffer 1 becomes the scanout buffer. Render frame 3 to buffer 3 PresentPixmap for buffer 3 at MSC 1 As soon as the X server sees this, it will replace the pending buffer 2 swap with this swap and release buffer 2 back to the application Render frame 4 to buffer 2 PresentPixmap for buffer 2 at MSC 1 Now we're in a steady state, flipping between buffer 2 and 3 waiting for one of them to be queued to the kernel. ... current scanout buffer = 1 at MSC 1 Now buffer 0 is free and (e.g.) buffer 2 is queued in the kernel to be the scanout buffer at MSC 2 Render frames, flipping between buffer 0 and 3 When the system can replace a queued buffer, and we update Present to take advantage of that, we can use three buffers and get: current scanout buffer = 0 at MSC 0 Render frame 1 to buffer 1 PresentPixmap for buffer 1 at MSC 1 This is sitting waiting for vblank to become the next scanout buffer Render frame 2 to buffer 2 PresentPixmap for buffer 2 at MSC 1 Queue this for display at MSC 1 1. There are three possible results: 1) We're still before MSC 1. Buffer 1 is released, buffer 2 is queued waiting for MSC 1. 2) We're now after MSC 1. Buffer 0 was released at MSC 1. Buffer 1 is the current scanout buffer. a) If the user asked for a tearing update, we swap scanout from buffer 1 to buffer 2 and release buffer 1. b) If the user asked for non-tearing update, we queue buffer 2 for the MSC 2. In all three cases, we have a buffer released (call it 'n'), ready to receive the next frame. Render frame 3 to buffer n PresentPixmap for buffer n If we're still before MSC 1, then we'll ask to present at MSC 1. Otherwise, we'll ask to present at MSC 2. Present already does this if the driver offers async flips, however it does this by waiting for the right vblank event and sending an async flip right at that point. I've hacked the intel driver to offer this, but I get tearing at the top of the screen. I think this is because flips are always done from within the ring, and so the latency between the vblank event and the async flip happening can cause tearing at the top of the screen. That's why I'm keying the need for the extra buffer on the lack of 2D driver support for async flips. Signed-off-by: Keith Packard kei...@keithp.com --- src/glx/dri3_glx.c | 20
Re: [Mesa-dev] [PATCH] glx/dri3: Use four buffers until X driver supports async flips
Cc'ing people who might be able to review. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] st/xa: Fix regression in xa_yuv_planar_blit()
Looks good.
Reviewed-by: Sinclair Yeh s...@vmware.com
On Mon, Sep 29, 2014 at 08:13:46AM +0200, Thomas Hellstrom wrote:
Commit st/xa: scissor to help tilers broke xa_yuv_planar_blit() and vmwgfx
textured video. Fix this by implementing scissors also in the yuv draw path.
Signed-off-by: Thomas Hellstrom thellst...@vmware.com
Cc: Rob Clark robcl...@freedesktop.org
Cc: 10.2 10.3 mesa-sta...@lists.freedesktop.org
---
src/gallium/state_trackers/xa/xa_renderer.c | 11 +++
src/gallium/state_trackers/xa/xa_yuv.c | 1 +
2 files changed, 12 insertions(+)
diff --git a/src/gallium/state_trackers/xa/xa_renderer.c
b/src/gallium/state_trackers/xa/xa_renderer.c
index 121d8ed..780b247 100644
--- a/src/gallium/state_trackers/xa/xa_renderer.c
+++ b/src/gallium/state_trackers/xa/xa_renderer.c
@@ -530,11 +530,22 @@ renderer_draw_yuv(struct xa_context *r,
src_x, src_y, src_w, src_h,
dst_x, dst_y, dst_w, dst_h, srf);
+ if (!r-scissor_valid) {
+ r-scissor.minx = 0;
+ r-scissor.miny = 0;
+ r-scissor.maxx = r-dst-tex-width0;
+ r-scissor.maxy = r-dst-tex-height0;
+ }
+
+ r-pipe-set_scissor_states(r-pipe, 0, 1, r-scissor);
+
cso_set_vertex_elements(r-cso, num_attribs, r-velems);
util_draw_user_vertex_buffer(r-cso, r-buffer, PIPE_PRIM_QUADS,
4, /* verts */
num_attribs);/* attribs/vert */
r-buffer_size = 0;
+
+ xa_scissor_reset(r);
}
void
diff --git a/src/gallium/state_trackers/xa/xa_yuv.c
b/src/gallium/state_trackers/xa/xa_yuv.c
index 43f56ff..1519639 100644
--- a/src/gallium/state_trackers/xa/xa_yuv.c
+++ b/src/gallium/state_trackers/xa/xa_yuv.c
@@ -146,6 +146,7 @@ xa_yuv_planar_blit(struct xa_context *r,
int w = box-x2 - box-x1;
int h = box-y2 - box-y1;
+xa_scissor_update(r, x, y, box-x2, box-y2);
renderer_draw_yuv(r,
(float)src_x + scale_x * (x - dst_x),
(float)src_y + scale_y * (y - dst_y),
--
1.8.3.2
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[Mesa-dev] [Bug 81680] [r600g] Firefox crashes with hardware acceleration turned on
https://bugs.freedesktop.org/show_bug.cgi?id=81680 Ernst Sjöstrand ern...@gmail.com changed: What|Removed |Added CC||ern...@gmail.com -- You are receiving this mail because: You are the assignee for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [Bug 81680] [r600g] Firefox crashes with hardware acceleration turned on
https://bugs.freedesktop.org/show_bug.cgi?id=81680 --- Comment #39 from Eugene ken20...@ukr.net --- Firefox 33.0~b7. MESA 10.4~git. Still crashes. -- You are receiving this mail because: You are the assignee for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 2/2] util: sipmlify PIPE_TEXTURE_CUBE case in util_max_layer()
For cube resources, the array_size value should be 6. So handle
that case as we do for array texture resources. But assert that
array_size==6 just to be safe.
---
src/gallium/auxiliary/util/u_inlines.h |5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/src/gallium/auxiliary/util/u_inlines.h
b/src/gallium/auxiliary/util/u_inlines.h
index c80ec48..9540162 100644
--- a/src/gallium/auxiliary/util/u_inlines.h
+++ b/src/gallium/auxiliary/util/u_inlines.h
@@ -627,10 +627,11 @@ static INLINE unsigned
util_max_layer(const struct pipe_resource *r, unsigned level)
{
switch (r-target) {
- case PIPE_TEXTURE_CUBE:
- return 6 - 1;
case PIPE_TEXTURE_3D:
return u_minify(r-depth0, level) - 1;
+ case PIPE_TEXTURE_CUBE:
+ assert(r-array_size == 6);
+ /* fall-through */
case PIPE_TEXTURE_1D_ARRAY:
case PIPE_TEXTURE_2D_ARRAY:
case PIPE_TEXTURE_CUBE_ARRAY:
--
1.7.10.4
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[Mesa-dev] [PATCH 1/2] llvmpipe: move lp_jit_screen_init() call after allocation of screen object
The screen argument isn't actually used by lp_jit_screen_init() at this time, but let's move the call so that we pass a valid pointer. --- src/gallium/drivers/llvmpipe/lp_screen.c |6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/gallium/drivers/llvmpipe/lp_screen.c b/src/gallium/drivers/llvmpipe/lp_screen.c index 3025322..e3c3980 100644 --- a/src/gallium/drivers/llvmpipe/lp_screen.c +++ b/src/gallium/drivers/llvmpipe/lp_screen.c @@ -557,9 +557,6 @@ llvmpipe_create_screen(struct sw_winsys *winsys) return NULL; #endif - if (!lp_jit_screen_init(screen)) - return NULL; - #ifdef DEBUG LP_DEBUG = debug_get_flags_option(LP_DEBUG, lp_debug_flags, 0 ); #endif @@ -570,6 +567,9 @@ llvmpipe_create_screen(struct sw_winsys *winsys) if (!screen) return NULL; + if (!lp_jit_screen_init(screen)) + return NULL; + screen-winsys = winsys; screen-base.destroy = llvmpipe_destroy_screen; -- 1.7.10.4 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 2/2] util: sipmlify PIPE_TEXTURE_CUBE case in util_max_layer()
Subject typo: simplify
Otherwise this patch is Reviewed-by: Ilia Mirkin imir...@alum.mit.edu
(Don't know llvmpipe, so can't say much about 1/2.)
On Mon, Sep 29, 2014 at 6:16 PM, Brian Paul bri...@vmware.com wrote:
For cube resources, the array_size value should be 6. So handle
that case as we do for array texture resources. But assert that
array_size==6 just to be safe.
---
src/gallium/auxiliary/util/u_inlines.h |5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/src/gallium/auxiliary/util/u_inlines.h
b/src/gallium/auxiliary/util/u_inlines.h
index c80ec48..9540162 100644
--- a/src/gallium/auxiliary/util/u_inlines.h
+++ b/src/gallium/auxiliary/util/u_inlines.h
@@ -627,10 +627,11 @@ static INLINE unsigned
util_max_layer(const struct pipe_resource *r, unsigned level)
{
switch (r-target) {
- case PIPE_TEXTURE_CUBE:
- return 6 - 1;
case PIPE_TEXTURE_3D:
return u_minify(r-depth0, level) - 1;
+ case PIPE_TEXTURE_CUBE:
+ assert(r-array_size == 6);
+ /* fall-through */
case PIPE_TEXTURE_1D_ARRAY:
case PIPE_TEXTURE_2D_ARRAY:
case PIPE_TEXTURE_CUBE_ARRAY:
--
1.7.10.4
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[Mesa-dev] [PATCH V3 2/4] i965: Initialize the SampleMap{2, 4, 8}x variables
with values specific to Intel hardware.
V2: Define and use gen6_get_sample_map() function to initialize
the variables.
Signed-off-by: Anuj Phogat anuj.pho...@gmail.com
---
src/mesa/drivers/dri/i965/brw_context.c| 8
src/mesa/drivers/dri/i965/brw_context.h| 2 +
src/mesa/drivers/dri/i965/gen6_multisample_state.c | 52 ++
3 files changed, 62 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_context.c
b/src/mesa/drivers/dri/i965/brw_context.c
index 619f2d5..879e4bf 100644
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -406,6 +406,14 @@ brw_initialize_context_constants(struct brw_context *brw)
ctx-Const.MaxDepthTextureSamples = max_samples;
ctx-Const.MaxIntegerSamples = max_samples;
+ /* SampleMap{2,4,8}x variables are used to map indices of rectangular grid
+* to sample numbers within a pixel. For more details see the comment above
+* gen6_get_sample_map() definition.
+*/
+ ctx-Const.SampleMap2x = (unsigned *) gen6_get_sample_map(2);
+ ctx-Const.SampleMap4x = (unsigned *) gen6_get_sample_map(4);
+ ctx-Const.SampleMap8x = (unsigned *) gen6_get_sample_map(8);
+
if (brw-gen = 7)
ctx-Const.MaxProgramTextureGatherComponents = 4;
else if (brw-gen == 6)
diff --git a/src/mesa/drivers/dri/i965/brw_context.h
b/src/mesa/drivers/dri/i965/brw_context.h
index 5830aa99..30313c8 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -1660,6 +1660,8 @@ gen6_get_sample_position(struct gl_context *ctx,
struct gl_framebuffer *fb,
GLuint index,
GLfloat *result);
+const unsigned *
+gen6_get_sample_map(unsigned samples);
/* gen8_multisample_state.c */
void gen8_emit_3dstate_multisample(struct brw_context *brw, unsigned num_samp);
diff --git a/src/mesa/drivers/dri/i965/gen6_multisample_state.c
b/src/mesa/drivers/dri/i965/gen6_multisample_state.c
index 429a590..467f1af 100644
--- a/src/mesa/drivers/dri/i965/gen6_multisample_state.c
+++ b/src/mesa/drivers/dri/i965/gen6_multisample_state.c
@@ -57,6 +57,58 @@ gen6_get_sample_position(struct gl_context *ctx,
}
/**
+ * Sample index layout shows the numbering of slots in a rectangular
+ * grid of samples with in a pixel. Sample number layout shows the
+ * rectangular grid of samples roughly corresponding to the real sample
+ * locations with in a pixel. Sample number layout matches the sample
+ * index layout in case of 2X and 4x MSAA, but they are different in
+ * case of 8X MSAA.
+ *
+ * 2X MSAA sample index / number layout
+ * -
+ * | 0 | 1 |
+ * -
+ *
+ * 4X MSAA sample index / number layout
+ * -
+ * | 0 | 1 |
+ * -
+ * | 2 | 3 |
+ * -
+ *
+ * 8X MSAA sample index layout8x MSAA sample number layout
+ * - -
+ * | 0 | 1 | | 5 | 2 |
+ * - -
+ * | 2 | 3 | | 4 | 6 |
+ * - -
+ * | 4 | 5 | | 0 | 3 |
+ * - -
+ * | 6 | 7 | | 7 | 1 |
+ * - -
+ *
+ * A sample map is used to map sample indices to sample numbers.
+ */
+const unsigned *
+gen6_get_sample_map(unsigned samples)
+{
+ static const unsigned map_2x[2] = {0, 1};
+ static const unsigned map_4x[4] = {0, 1, 2, 3};
+ static const unsigned map_8x[8] = {5, 2, 4, 6, 0, 3, 7, 1};
+
+ switch (samples) {
+ case 2:
+ return map_2x;
+ case 4:
+ return map_4x;
+ case 8:
+ return map_8x;
+ default:
+ unreachable(Not implemented);
+ }
+}
+
+/**
* 3DSTATE_MULTISAMPLE
*/
void
--
1.9.3
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[Mesa-dev] [PATCH V3 1/4] mesa: Add new variables in gl_context to store sample layout
SampleMap{2,4,8}x variables are used in later patches to implement
EXT_framebuffer_multisample_blit_scaled extension.
V2: Use integer array instead of a string.
Bump up the comment.
Signed-off-by: Anuj Phogat anuj.pho...@gmail.com
---
src/mesa/main/mtypes.h | 32
1 file changed, 32 insertions(+)
diff --git a/src/mesa/main/mtypes.h b/src/mesa/main/mtypes.h
index 0d50be8..162dc44 100644
--- a/src/mesa/main/mtypes.h
+++ b/src/mesa/main/mtypes.h
@@ -3608,6 +3608,38 @@ struct gl_constants
GLint MaxDepthTextureSamples;
GLint MaxIntegerSamples;
+ /**
+* GL_EXT_texture_multisample_blit_scaled implementation assumes that
+* samples are laid out in a rectangular grid roughly corresponding to
+* sample locations within a pixel. Below SampleMap{2,4,8}x variables
+* are used to map indices of rectangular grid to sample numbers within
+* a pixel. This mapping of indices to sample numbers must be initialized
+* by the driver for the target hardware. For example, if we have the 8X
+* MSAA sample number layout (sample positions) for XYZ hardware:
+*
+*sample indices layout sample number layout
+*- -
+*| 0 | 1 | | a | b |
+*- -
+*| 2 | 3 | | c | d |
+*- -
+*| 4 | 5 | | e | f |
+*- -
+*| 6 | 7 | | g | h |
+*- -
+*
+* Where a,b,c,d,e,f,g,h are integers between [0-7].
+*
+* Then, initialize the SampleMap8x variable for XYZ hardware as shown
+* below:
+*SampleMap8x = {a, b, c, d, e, f, g, h};
+*
+* Follow the logic for other sample counts.
+*/
+ unsigned *SampleMap2x;
+ unsigned *SampleMap4x;
+ unsigned *SampleMap8x;
+
/** GL_ARB_shader_atomic_counters */
GLuint MaxAtomicBufferBindings;
GLuint MaxAtomicBufferSize;
--
1.9.3
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[Mesa-dev] [PATCH V3 4/4] i965: Enable EXT_framebuffer_multisample_blit_scaled for gen8
Signed-off-by: Anuj Phogat anuj.pho...@gmail.com --- src/mesa/drivers/dri/i965/intel_extensions.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_extensions.c b/src/mesa/drivers/dri/i965/intel_extensions.c index 046d2a1..10fe10e 100644 --- a/src/mesa/drivers/dri/i965/intel_extensions.c +++ b/src/mesa/drivers/dri/i965/intel_extensions.c @@ -256,8 +256,7 @@ intelInitExtensions(struct gl_context *ctx) ctx-Extensions.EXT_framebuffer_multisample = true; ctx-Extensions.EXT_transform_feedback = true; - if (brw-gen 8) - ctx-Extensions.EXT_framebuffer_multisample_blit_scaled = true; + ctx-Extensions.EXT_framebuffer_multisample_blit_scaled = true; ctx-Extensions.ARB_blend_func_extended = !driQueryOptionb(brw-optionCache, disable_blend_func_extended); ctx-Extensions.ARB_draw_buffers_blend = true; ctx-Extensions.ARB_ES3_compatibility = true; -- 1.9.3 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH V3 3/4] meta: Implement ext_framebuffer_multisample_blit_scaled extension
Extension enables doing a multisample buffer resolve and buffer
scaling using a single glBlitFrameBuffer() call. Currently, we
have this extension implemented in BLORP which is only used by
SNB and IVB. This patch implements the extension in meta path
which makes it available to Broadwell.
Implementation features:
- Supports scaled resolves of 2X, 4X and 8X multisample buffers.
- Avoids unnecessary shader compilations by storing the pre compiled
shaders for each supported sample count.
- Uses bilinear filtering for both GL_SCALED_RESOLVE_FASTEST_EXT and
GL_SCALED_RESOLVE_NICEST_EXT filter options. This is an allowed
behavior in the extension's spec.
- I tried doing bicubic filtering for GL_SCALED_RESOLVE_NICEST_EXT
filter. It made the edges in the image look little smoother but
the image gets blurred causing no overall quality improvement.
For now I have dropped the idea of doing different filtering for
nicest filter.
V2:
- Minor changes to simplify the fragment shader.
- Refactor the code to move i965 specific sample_map computation out
of Meta. We now use ctx-Const.SampleMap{2,4,8}x variables initialized
by the driver.
- Use a simple msaa resolve shader for scaled resolves with scaling
factor = 1.0.
V3:
- Make changes to create a string out of ctx-Const.SampleMap{2,4,8}x
variables and use it in fragment shader.
Signed-off-by: Anuj Phogat anuj.pho...@gmail.com
---
src/mesa/drivers/common/meta.h | 6 ++
src/mesa/drivers/common/meta_blit.c | 206 +---
2 files changed, 199 insertions(+), 13 deletions(-)
diff --git a/src/mesa/drivers/common/meta.h b/src/mesa/drivers/common/meta.h
index edc3e8c..2c9517b 100644
--- a/src/mesa/drivers/common/meta.h
+++ b/src/mesa/drivers/common/meta.h
@@ -279,6 +279,12 @@ enum blit_msaa_shader {
BLIT_MSAA_SHADER_2D_MULTISAMPLE_ARRAY_COPY_UINT,
BLIT_MSAA_SHADER_2D_MULTISAMPLE_ARRAY_DEPTH_RESOLVE,
BLIT_MSAA_SHADER_2D_MULTISAMPLE_ARRAY_DEPTH_COPY,
+ BLIT_2X_MSAA_SHADER_2D_MULTISAMPLE_SCALED_RESOLVE,
+ BLIT_4X_MSAA_SHADER_2D_MULTISAMPLE_SCALED_RESOLVE,
+ BLIT_8X_MSAA_SHADER_2D_MULTISAMPLE_SCALED_RESOLVE,
+ BLIT_2X_MSAA_SHADER_2D_MULTISAMPLE_ARRAY_SCALED_RESOLVE,
+ BLIT_4X_MSAA_SHADER_2D_MULTISAMPLE_ARRAY_SCALED_RESOLVE,
+ BLIT_8X_MSAA_SHADER_2D_MULTISAMPLE_ARRAY_SCALED_RESOLVE,
BLIT_MSAA_SHADER_COUNT,
};
diff --git a/src/mesa/drivers/common/meta_blit.c
b/src/mesa/drivers/common/meta_blit.c
index fc9848a..4fd1cb6 100644
--- a/src/mesa/drivers/common/meta_blit.c
+++ b/src/mesa/drivers/common/meta_blit.c
@@ -55,6 +55,179 @@
#define OFFSET(FIELD) ((void *) offsetof(struct vertex, FIELD))
static void
+setup_glsl_msaa_blit_scaled_shader(struct gl_context *ctx,
+ struct blit_state *blit,
+ struct gl_renderbuffer *src_rb,
+ GLenum target, GLenum filter)
+{
+ GLint loc_src_width, loc_src_height;
+ int i, samples;
+ int shader_offset = 0;
+ void *mem_ctx = ralloc_context(NULL);
+ char *fs_source;
+ char *name, *sample_number;
+ const unsigned *sample_map;
+ char *sample_map_str = rzalloc_size(mem_ctx, 1);
+ char *sample_map_expr = rzalloc_size(mem_ctx, 1);
+ char *texel_fetch_macro = rzalloc_size(mem_ctx, 1);;
+ const char *vs_source;
+ const char *sampler_array_suffix = ;
+ const char *texcoord_type = vec2;
+ float y_scale;
+ enum blit_msaa_shader shader_index;
+
+ assert(src_rb);
+ samples = MAX2(src_rb-NumSamples, 1);
+ y_scale = samples * 0.5;
+
+ /* We expect only power of 2 samples in source multisample buffer. */
+ assert((samples (samples - 1)) == 0);
+ while (samples (shader_offset + 1)) {
+ shader_offset++;
+ }
+ /* Update the assert if we plan to support more than 8X MSAA. */
+ assert(shader_offset 0 shader_offset 4);
+
+ assert(target == GL_TEXTURE_2D_MULTISAMPLE ||
+ target == GL_TEXTURE_2D_MULTISAMPLE_ARRAY);
+
+ shader_index = BLIT_2X_MSAA_SHADER_2D_MULTISAMPLE_SCALED_RESOLVE +
+ shader_offset - 1;
+
+ if (target == GL_TEXTURE_2D_MULTISAMPLE_ARRAY) {
+ shader_index += BLIT_2X_MSAA_SHADER_2D_MULTISAMPLE_ARRAY_SCALED_RESOLVE -
+ BLIT_2X_MSAA_SHADER_2D_MULTISAMPLE_SCALED_RESOLVE;
+ sampler_array_suffix = Array;
+ texcoord_type = vec3;
+ }
+
+ if (blit-msaa_shaders[shader_index]) {
+ _mesa_UseProgram(blit-msaa_shaders[shader_index]);
+ /* Update the uniform values. */
+ loc_src_width =
+ glGetUniformLocation(blit-msaa_shaders[shader_index], src_width);
+ loc_src_height =
+ glGetUniformLocation(blit-msaa_shaders[shader_index], src_height);
+ glUniform1f(loc_src_width, src_rb-Width);
+ glUniform1f(loc_src_height, src_rb-Height);
+ return;
+ }
+
+ name = ralloc_asprintf(mem_ctx, vec4 MSAA scaled resolve);
+
+ /* Below switch is used to setup the shader expression, which
Re: [Mesa-dev] [PATCH 2/2] util: sipmlify PIPE_TEXTURE_CUBE case in util_max_layer()
For this patch:
Reviewed-by: Marek Olšák marek.ol...@amd.com
Marek
On Tue, Sep 30, 2014 at 12:16 AM, Brian Paul bri...@vmware.com wrote:
For cube resources, the array_size value should be 6. So handle
that case as we do for array texture resources. But assert that
array_size==6 just to be safe.
---
src/gallium/auxiliary/util/u_inlines.h |5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/src/gallium/auxiliary/util/u_inlines.h
b/src/gallium/auxiliary/util/u_inlines.h
index c80ec48..9540162 100644
--- a/src/gallium/auxiliary/util/u_inlines.h
+++ b/src/gallium/auxiliary/util/u_inlines.h
@@ -627,10 +627,11 @@ static INLINE unsigned
util_max_layer(const struct pipe_resource *r, unsigned level)
{
switch (r-target) {
- case PIPE_TEXTURE_CUBE:
- return 6 - 1;
case PIPE_TEXTURE_3D:
return u_minify(r-depth0, level) - 1;
+ case PIPE_TEXTURE_CUBE:
+ assert(r-array_size == 6);
+ /* fall-through */
case PIPE_TEXTURE_1D_ARRAY:
case PIPE_TEXTURE_2D_ARRAY:
case PIPE_TEXTURE_CUBE_ARRAY:
--
1.7.10.4
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Re: [Mesa-dev] [PATCH] Revert configure: ask vdpau.pc for the default location of the vdpau drivers
On 29/09/14 17:24, Matt Turner wrote:
On Mon, Sep 29, 2014 at 9:16 AM, Emil Velikov emil.l.veli...@gmail.com
wrote:
So all in all we have the following:
Some distributions/people choose odd location of the modules. Which
can lead to the system (vdpau/omx) looking at the wrong place for the
backends, i.e. not working. One can consider that there is no way to
override the module location at runtime.
Do we have more specifics? If they're doing something stupid and it
breaks, they typically get to keep the pieces.
Debian/Ubuntu install to /usr/lib/x86_64-linux-gnu/vdpau/? Isn't
${libdir} just /usr/lib/x86_64-linux-gnu/ in that case?
Hmm I was under the impression that ${libdir} and
/usr/lib/x86_64-linux-gnu/ are different things. Can I consider you as a
volunteer for the following, even if the chances of it happening are zero ?
On 29/09/14 17:16, Emil Velikov wrote:
[...]
How many volunteers do we have that will guide Debian/Ubuntu/other to
do the correct thing ? If we have at least one, I will be OK with
reverting the patch.
-Emil
Thanks
Emil
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Re: [Mesa-dev] [PATCH 1/3] driconf: Synchronize po files
Alex Henrie alexhenri...@gmail.com writes: 2014-09-29 9:17 GMT-06:00 Alex Deucher alexdeuc...@gmail.com: On Fri, Sep 26, 2014 at 4:31 PM, Alex Henrie alexhenri...@gmail.com wrote: --- src/mesa/drivers/dri/common/xmlpool/ca.po | 119 -- src/mesa/drivers/dri/common/xmlpool/de.po | 118 - src/mesa/drivers/dri/common/xmlpool/es.po | 118 - src/mesa/drivers/dri/common/xmlpool/fr.po | 118 - src/mesa/drivers/dri/common/xmlpool/nl.po | 118 - src/mesa/drivers/dri/common/xmlpool/sv.po | 118 - 6 files changed, 390 insertions(+), 319 deletions(-) This series is: Reviewed-by: Alex Deucher alexander.deuc...@amd.com Do you need someone to commit this for you? Yes. (I do not have commit privileges to Mesa.) Applied review and pushed. Thanks! pgpy8RFdQEES4.pgp Description: PGP signature ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 1/2] gallium: Drop software-only primitive restart support.
On Thu, Sep 4, 2014 at 7:43 PM, Eric Anholt e...@anholt.net wrote:
The drivers not flagging primitive restart support are r300 swtcl, svga,
nv30, and vc4.
The point of primitive restart is to slightly reduce draw call overhead
for apps by batching multiple draws. If we do an extra pass to read the
index buffer and split back into multiple draws, we've entirely missed the
point. This is particularly bad for drivers that otherwise have hardware
IB reads, where the readback is probably uncached.
fwiw, I'd even tested this one before I implemented hw primitive
restart for a3xx..
Reviewed-by: Rob Clark robdcl...@gmail.com
---
src/mesa/state_tracker/st_extensions.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/src/mesa/state_tracker/st_extensions.c
b/src/mesa/state_tracker/st_extensions.c
index 9db648c..605c5e6 100644
--- a/src/mesa/state_tracker/st_extensions.c
+++ b/src/mesa/state_tracker/st_extensions.c
@@ -714,9 +714,8 @@ void st_init_extensions(struct pipe_screen *screen,
#endif
}
- extensions-NV_primitive_restart = GL_TRUE;
- if (!screen-get_param(screen, PIPE_CAP_PRIMITIVE_RESTART)) {
- consts-PrimitiveRestartInSoftware = GL_TRUE;
+ if (screen-get_param(screen, PIPE_CAP_PRIMITIVE_RESTART)) {
+ extensions-NV_primitive_restart = GL_TRUE;
}
/* ARB_color_buffer_float. */
--
2.1.0
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Re: [Mesa-dev] [PATCH 2/2] mesa: Drop the always-software-primitive-restart paths.
On Thu, Sep 4, 2014 at 7:43 PM, Eric Anholt e...@anholt.net wrote:
The core sw primitive restart code is still around, because i965 uses it
in some cases, but there are no drivers that want it on all the time.
Reviewed-by: Rob Clark robdcl...@gmail.com
---
src/mesa/drivers/dri/i965/brw_primitive_restart.c | 8
src/mesa/main/context.c | 3 --
src/mesa/main/mtypes.h| 5 ---
src/mesa/vbo/vbo_exec_array.c | 46
+++
src/mesa/vbo/vbo_primitive_restart.c | 4 +-
5 files changed, 8 insertions(+), 58 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_primitive_restart.c
b/src/mesa/drivers/dri/i965/brw_primitive_restart.c
index 2d654f6..f7764e1 100644
--- a/src/mesa/drivers/dri/i965/brw_primitive_restart.c
+++ b/src/mesa/drivers/dri/i965/brw_primitive_restart.c
@@ -138,14 +138,6 @@ brw_handle_primitive_restart(struct gl_context *ctx,
return GL_FALSE;
}
- /* If the driver has requested software handling of primitive restarts,
-* then the VBO module has already taken care of things, and we can
-* just draw as normal.
-*/
- if (ctx-Const.PrimitiveRestartInSoftware) {
- return GL_FALSE;
- }
-
/* If we have set the in_progress flag, then we are in the middle
* of handling the primitive restart draw.
*/
diff --git a/src/mesa/main/context.c b/src/mesa/main/context.c
index fbdbd68..ba8d00d 100644
--- a/src/mesa/main/context.c
+++ b/src/mesa/main/context.c
@@ -684,9 +684,6 @@ _mesa_init_constants(struct gl_constants *consts, gl_api
api)
/* GL_ARB_robustness */
consts-ResetStrategy = GL_NO_RESET_NOTIFICATION_ARB;
- /* PrimitiveRestart */
- consts-PrimitiveRestartInSoftware = GL_FALSE;
-
/* ES 3.0 or ARB_ES3_compatibility */
consts-MaxElementIndex = 0xu;
diff --git a/src/mesa/main/mtypes.h b/src/mesa/main/mtypes.h
index 4fb30ff..3c8f24f 100644
--- a/src/mesa/main/mtypes.h
+++ b/src/mesa/main/mtypes.h
@@ -3471,11 +3471,6 @@ struct gl_constants
GLboolean GLSLSkipStrictMaxUniformLimitCheck;
/**
-* Force software support for primitive restart in the VBO module.
-*/
- GLboolean PrimitiveRestartInSoftware;
-
- /**
* Always use the GetTransformFeedbackVertexCount() driver hook, rather
* than passing the transform feedback object to the drawing function.
*/
diff --git a/src/mesa/vbo/vbo_exec_array.c b/src/mesa/vbo/vbo_exec_array.c
index 22557e1..1ab3e23 100644
--- a/src/mesa/vbo/vbo_exec_array.c
+++ b/src/mesa/vbo/vbo_exec_array.c
@@ -562,38 +562,6 @@ vbo_bind_arrays(struct gl_context *ctx)
}
}
-
-/**
- * Handle a draw case that potentially has primitive restart enabled.
- *
- * If primitive restart is enabled, and PrimitiveRestartInSoftware is
- * set, then vbo_sw_primitive_restart is used to handle the primitive
- * restart case in software.
- */
-static void
-vbo_handle_primitive_restart(struct gl_context *ctx,
- const struct _mesa_prim *prim,
- GLuint nr_prims,
- const struct _mesa_index_buffer *ib,
- GLboolean index_bounds_valid,
- GLuint min_index,
- GLuint max_index)
-{
- struct vbo_context *vbo = vbo_context(ctx);
-
- if (ctx-Const.PrimitiveRestartInSoftware
- ctx-Array._PrimitiveRestart
- (ib != NULL)) {
- /* Handle primitive restart in software */
- vbo_sw_primitive_restart(ctx, prim, nr_prims, ib, NULL);
- } else {
- /* Call driver directly for draw_prims */
- vbo-draw_prims(ctx, prim, nr_prims, ib,
- index_bounds_valid, min_index, max_index, NULL, NULL);
- }
-}
-
-
/**
* Helper function called by the other DrawArrays() functions below.
* This is where we handle primitive restart for drawing non-indexed
@@ -1011,8 +979,8 @@ vbo_validated_drawrangeelements(struct gl_context *ctx,
GLenum mode,
*/
check_buffers_are_unmapped(exec-array.inputs);
- vbo_handle_primitive_restart(ctx, prim, 1, ib,
-index_bounds_valid, start, end);
+ vbo-draw_prims(ctx, prim, 1, ib,
+ index_bounds_valid, start, end, NULL, NULL);
if (MESA_DEBUG_FLAGS DEBUG_ALWAYS_FLUSH) {
_mesa_flush(ctx);
@@ -1386,8 +1354,8 @@ vbo_validated_multidrawelements(struct gl_context *ctx,
GLenum mode,
}
check_buffers_are_unmapped(exec-array.inputs);
- vbo_handle_primitive_restart(ctx, prim, primcount, ib,
- GL_FALSE, ~0, ~0);
+ vbo-draw_prims(ctx, prim, primcount, ib,
+ false, ~0, ~0, NULL, NULL);
} else {
/* render one prim at a time */
for (i = 0; i primcount; i++) {
@@ -1415,8 +1383,8 @@
Re: [Mesa-dev] [PATCH 1/2] llvmpipe: move lp_jit_screen_init() call after allocation of screen object
On 30.09.2014 07:16, Brian Paul wrote: The screen argument isn't actually used by lp_jit_screen_init() at this time, I guess that's why gcc didn't warn about it? but let's move the call so that we pass a valid pointer. --- src/gallium/drivers/llvmpipe/lp_screen.c |6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/gallium/drivers/llvmpipe/lp_screen.c b/src/gallium/drivers/llvmpipe/lp_screen.c index 3025322..e3c3980 100644 --- a/src/gallium/drivers/llvmpipe/lp_screen.c +++ b/src/gallium/drivers/llvmpipe/lp_screen.c @@ -557,9 +557,6 @@ llvmpipe_create_screen(struct sw_winsys *winsys) return NULL; #endif - if (!lp_jit_screen_init(screen)) - return NULL; - #ifdef DEBUG LP_DEBUG = debug_get_flags_option(LP_DEBUG, lp_debug_flags, 0 ); #endif @@ -570,6 +567,9 @@ llvmpipe_create_screen(struct sw_winsys *winsys) if (!screen) return NULL; + if (!lp_jit_screen_init(screen)) + return NULL; + This leaks screen in the failure case. -- Earthling Michel Dänzer| http://www.amd.com Libre software enthusiast |Mesa and X developer ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 1/2] llvmpipe: move lp_jit_screen_init() call after allocation of screen object
On 30.09.2014 10:45, Michel Dänzer wrote: On 30.09.2014 07:16, Brian Paul wrote: The screen argument isn't actually used by lp_jit_screen_init() at this time, I guess that's why gcc didn't warn about it? Nope, it actually does warn about it. Mea culpa for not noticing that. -- Earthling Michel Dänzer| http://www.amd.com Libre software enthusiast |Mesa and X developer ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH V3 1/4] mesa: Add new variables in gl_context to store sample layout
On 2014-09-29 16:33:33, Anuj Phogat wrote:
SampleMap{2,4,8}x variables are used in later patches to implement
EXT_framebuffer_multisample_blit_scaled extension.
V2: Use integer array instead of a string.
Bump up the comment.
Signed-off-by: Anuj Phogat anuj.pho...@gmail.com
---
src/mesa/main/mtypes.h | 32
1 file changed, 32 insertions(+)
diff --git a/src/mesa/main/mtypes.h b/src/mesa/main/mtypes.h
index 0d50be8..162dc44 100644
--- a/src/mesa/main/mtypes.h
+++ b/src/mesa/main/mtypes.h
@@ -3608,6 +3608,38 @@ struct gl_constants
GLint MaxDepthTextureSamples;
GLint MaxIntegerSamples;
+ /**
+* GL_EXT_texture_multisample_blit_scaled implementation assumes that
+* samples are laid out in a rectangular grid roughly corresponding to
+* sample locations within a pixel. Below SampleMap{2,4,8}x variables
+* are used to map indices of rectangular grid to sample numbers within
+* a pixel. This mapping of indices to sample numbers must be initialized
+* by the driver for the target hardware. For example, if we have the 8X
+* MSAA sample number layout (sample positions) for XYZ hardware:
+*
+*sample indices layout sample number layout
+*- -
+*| 0 | 1 | | a | b |
+*- -
+*| 2 | 3 | | c | d |
+*- -
+*| 4 | 5 | | e | f |
+*- -
+*| 6 | 7 | | g | h |
+*- -
+*
+* Where a,b,c,d,e,f,g,h are integers between [0-7].
+*
+* Then, initialize the SampleMap8x variable for XYZ hardware as shown
+* below:
+*SampleMap8x = {a, b, c, d, e, f, g, h};
+*
+* Follow the logic for other sample counts.
+*/
+ unsigned *SampleMap2x;
+ unsigned *SampleMap4x;
+ unsigned *SampleMap8x;
Wouldn't uint8_t work given the 0-7 range?
Also, I thought we could include the bytes directly in the structure,
and let the driver write the bytes rather than setting a pointer to
the array.
uint8_t SampleMap2x[2];
uint8_t SampleMap4x[4];
uint8_t SampleMap8x[8];
-Jordan
/** GL_ARB_shader_atomic_counters */
GLuint MaxAtomicBufferBindings;
GLuint MaxAtomicBufferSize;
--
1.9.3
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[Mesa-dev] [PATCH 2/4] radeonsi: Fix si_dma_copy(_tile) for compressed formats
From: Michel Dänzer michel.daen...@amd.com
Fixes GPUVM faults when running the piglit test getteximage-formats
init-by-rendering with R600_DEBUG=forcedma on SI.
Signed-off-by: Michel Dänzer michel.daen...@amd.com
---
src/gallium/drivers/radeonsi/si_dma.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_dma.c
b/src/gallium/drivers/radeonsi/si_dma.c
index cd6ff4a..ff64722 100644
--- a/src/gallium/drivers/radeonsi/si_dma.c
+++ b/src/gallium/drivers/radeonsi/si_dma.c
@@ -172,7 +172,7 @@ static void si_dma_copy_tile(struct si_context *ctx,
* dma packet will be using the copy_height which is always smaller or
equal
* to the linear height
*/
- height = rtiled-surface.level[tiled_lvl].npix_y;
+ height = rtiled-surface.level[tiled_lvl].nblk_y;
base = rtiled-surface.level[tiled_lvl].offset;
addr = rlinear-surface.level[linear_lvl].offset;
addr += rlinear-surface.level[linear_lvl].slice_size * linear_z;
@@ -302,7 +302,7 @@ void si_dma_copy(struct pipe_context *ctx,
dst_offset += rdst-surface.level[dst_level].slice_size * dst_z;
dst_offset += dst_y * dst_pitch + dst_x * bpp;
si_dma_copy_buffer(sctx, dst, src, dst_offset, src_offset,
- src_box-height * src_pitch);
+ copy_height * src_pitch);
} else {
si_dma_copy_tile(sctx, dst, dst_level, dst_x, dst_y, dst_z,
src, src_level, src_x, src_y, src_box-z,
--
2.1.1
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[Mesa-dev] [PATCH 3/4] radeonsi: Catch more cases that can't be handled by si_dma_copy_buffer/tile
From: Michel Dänzer michel.daen...@amd.com
Signed-off-by: Michel Dänzer michel.daen...@amd.com
---
src/gallium/drivers/radeonsi/si_dma.c | 14 +++---
1 file changed, 11 insertions(+), 3 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_dma.c
b/src/gallium/drivers/radeonsi/si_dma.c
index ff64722..643ce3f 100644
--- a/src/gallium/drivers/radeonsi/si_dma.c
+++ b/src/gallium/drivers/radeonsi/si_dma.c
@@ -251,7 +251,9 @@ void si_dma_copy(struct pipe_context *ctx,
}
if (src-format != dst-format || src_box-depth 1 ||
- rdst-dirty_level_mask != 0) {
+ rdst-dirty_level_mask != 0 ||
+ rdst-cmask.size || rdst-fmask.size ||
+ rsrc-cmask.size || rsrc-fmask.size) {
goto fallback;
}
@@ -277,14 +279,20 @@ void si_dma_copy(struct pipe_context *ctx,
src_mode = src_mode == RADEON_SURF_MODE_LINEAR_ALIGNED ?
RADEON_SURF_MODE_LINEAR : src_mode;
dst_mode = dst_mode == RADEON_SURF_MODE_LINEAR_ALIGNED ?
RADEON_SURF_MODE_LINEAR : dst_mode;
- if (src_pitch != dst_pitch || src_box-x || dst_x || src_w != dst_w) {
+ if (src_pitch != dst_pitch || src_box-x || dst_x || src_w != dst_w ||
+ src_box-width != src_w ||
+ src_box-height != rsrc-surface.level[src_level].npix_y ||
+ src_box-height != rdst-surface.level[dst_level].npix_y ||
+ rsrc-surface.level[src_level].nblk_y !=
+ rdst-surface.level[dst_level].nblk_y) {
/* FIXME si can do partial blit */
goto fallback;
}
/* the x test here are currently useless (because we don't support
partial blit)
* but keep them around so we don't forget about those
*/
- if ((src_pitch % 8) || (src_box-x % 8) || (dst_x % 8) || (src_box-y %
8) || (dst_y % 8)) {
+ if ((src_pitch % 8) || (src_box-x % 8) || (dst_x % 8) ||
+ (src_box-y % 8) || (dst_y % 8) || (src_box-height % 8)) {
goto fallback;
}
--
2.1.1
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[Mesa-dev] [PATCH 4/4] radeonsi: Pass the slice size to si_dma_copy_buffer
From: Michel Dänzer michel.daen...@amd.com
Otherwise some parts of tiled slices can be missed.
Signed-off-by: Michel Dänzer michel.daen...@amd.com
---
src/gallium/drivers/radeonsi/si_dma.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_dma.c
b/src/gallium/drivers/radeonsi/si_dma.c
index 643ce3f..b1bd5e7 100644
--- a/src/gallium/drivers/radeonsi/si_dma.c
+++ b/src/gallium/drivers/radeonsi/si_dma.c
@@ -231,7 +231,7 @@ void si_dma_copy(struct pipe_context *ctx,
struct si_context *sctx = (struct si_context *)ctx;
struct r600_texture *rsrc = (struct r600_texture*)src;
struct r600_texture *rdst = (struct r600_texture*)dst;
- unsigned dst_pitch, src_pitch, bpp, dst_mode, src_mode, copy_height;
+ unsigned dst_pitch, src_pitch, bpp, dst_mode, src_mode;
unsigned src_w, dst_w;
unsigned src_x, src_y;
unsigned dst_x = dstx, dst_y = dsty, dst_z = dstz;
@@ -271,7 +271,6 @@ void si_dma_copy(struct pipe_context *ctx,
src_pitch = rsrc-surface.level[src_level].pitch_bytes;
src_w = rsrc-surface.level[src_level].npix_x;
dst_w = rdst-surface.level[dst_level].npix_x;
- copy_height = src_box-height / rsrc-surface.blk_h;
dst_mode = rdst-surface.level[dst_level].mode;
src_mode = rsrc-surface.level[src_level].mode;
@@ -310,11 +309,12 @@ void si_dma_copy(struct pipe_context *ctx,
dst_offset += rdst-surface.level[dst_level].slice_size * dst_z;
dst_offset += dst_y * dst_pitch + dst_x * bpp;
si_dma_copy_buffer(sctx, dst, src, dst_offset, src_offset,
- copy_height * src_pitch);
+ rsrc-surface.level[src_level].slice_size);
} else {
si_dma_copy_tile(sctx, dst, dst_level, dst_x, dst_y, dst_z,
src, src_level, src_x, src_y, src_box-z,
-copy_height, dst_pitch, bpp);
+src_box-height / rsrc-surface.blk_h,
+dst_pitch, bpp);
}
return;
--
2.1.1
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[Mesa-dev] [PATCH libdrm] radeon: Always multiply pitch_bytes by nsamples, not by slice_pt
From: Michel Dänzer michel.daen...@amd.com slice_pt is tileb[0] / tile_split, which isn't directly related to the pitch. This caused pitch_bytes to be too large in some cases. [0] Tile size in bytes Signed-off-by: Michel Dänzer michel.daen...@amd.com --- radeon/radeon_surface.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/radeon/radeon_surface.c b/radeon/radeon_surface.c index 0723425..930017e 100644 --- a/radeon/radeon_surface.c +++ b/radeon/radeon_surface.c @@ -595,7 +595,7 @@ static void eg_surf_minify(struct radeon_surface *surf, mtile_ps = (mtile_pr * surflevel-nblk_y) / mtileh; surflevel-offset = offset; -surflevel-pitch_bytes = surflevel-nblk_x * bpe * slice_pt; +surflevel-pitch_bytes = surflevel-nblk_x * bpe * surf-nsamples; surflevel-slice_size = mtile_ps * mtileb * slice_pt; surf-bo_size = offset + surflevel-slice_size * surflevel-nblk_z * surf-array_size; @@ -1498,7 +1498,7 @@ static void si_surf_minify_2d(struct radeon_surface *surf, /* macro tile per slice */ mtile_ps = (mtile_pr * surflevel-nblk_y) / yalign; surflevel-offset = offset; -surflevel-pitch_bytes = surflevel-nblk_x * bpe * slice_pt; +surflevel-pitch_bytes = surflevel-nblk_x * bpe * surf-nsamples; surflevel-slice_size = mtile_ps * mtileb * slice_pt; surf-bo_size = offset + surflevel-slice_size * surflevel-nblk_z * surf-array_size; -- 2.1.1 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 1/4] radeonsi: Fix tiling mode index for stencil resources
From: Michel Dänzer michel.daen...@amd.com We are currently only dealing with depth-only or stencil-only resources here, not with resources having both depth and stencil[0]. In both cases, the tiling mode index is in the tile_mode field, not in the stencil_tile_mode field. [0] Add an assertion for that. Signed-off-by: Michel Dänzer michel.daen...@amd.com --- src/gallium/drivers/radeonsi/si_dma.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_dma.c b/src/gallium/drivers/radeonsi/si_dma.c index c067cd9..cd6ff4a 100644 --- a/src/gallium/drivers/radeonsi/si_dma.c +++ b/src/gallium/drivers/radeonsi/si_dma.c @@ -162,6 +162,8 @@ static void si_dma_copy_tile(struct si_context *ctx, tiled_y = detile ? src_y : dst_y; tiled_z = detile ? src_z : dst_z; + assert(!util_format_is_depth_and_stencil(rtiled-resource.b.b.format)); + array_mode = si_array_mode(rtiled-surface.level[tiled_lvl].mode); slice_tile_max = (rtiled-surface.level[tiled_lvl].nblk_x * rtiled-surface.level[tiled_lvl].nblk_y) / (8*8) - 1; @@ -179,8 +181,7 @@ static void si_dma_copy_tile(struct si_context *ctx, bank_w = cik_bank_wh(rtiled-surface.bankw); mt_aspect = cik_macro_tile_aspect(rtiled-surface.mtilea); tile_split = cik_tile_split(rtiled-surface.tile_split); - tile_mode_index = si_tile_mode_index(rtiled, tiled_lvl, - util_format_has_stencil(util_format_description(rtiled-resource.b.b.format))); + tile_mode_index = si_tile_mode_index(rtiled, tiled_lvl, false); nbanks = si_num_banks(sscreen, rtiled); base += rtiled-resource.gpu_address; addr += rlinear-resource.gpu_address; -- 2.1.1 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 0/4] radeonsi: R600_DEBUG=forcedma fixes
This libdrm_radeon patch and series of four radeonsi patches allow running piglit on SI with R600_DEBUG=forcedma with no regressions. [PATCH libdrm] radeon: Always multiply pitch_bytes by nsamples, not [PATCH 1/4] radeonsi: Fix tiling mode index for stencil resources [PATCH 2/4] radeonsi: Fix si_dma_copy(_tile) for compressed formats [PATCH 3/4] radeonsi: Catch more cases that can't be handled by [PATCH 4/4] radeonsi: Pass the slice size to si_dma_copy_buffer ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH] glsl: make consistent use of DECLARE_RALLOC_CXX_OPERATORS
Signed-off-by: Ilia Mirkin imir...@alum.mit.edu
---
Noticed this when investigating how ralloc worked. I'm moderately sure that
the old code was fine, but seems nicer to use the cooked known-to-work macro.
src/glsl/glsl_symbol_table.h | 33 ++---
src/glsl/loop_analysis.h | 17 +
2 files changed, 3 insertions(+), 47 deletions(-)
diff --git a/src/glsl/glsl_symbol_table.h b/src/glsl/glsl_symbol_table.h
index 2528264..e32b88b 100644
--- a/src/glsl/glsl_symbol_table.h
+++ b/src/glsl/glsl_symbol_table.h
@@ -43,37 +43,8 @@ struct glsl_type;
* type safe and some symbol table invariants.
*/
struct glsl_symbol_table {
-private:
- static void
- _glsl_symbol_table_destructor (glsl_symbol_table *table)
- {
- table-~glsl_symbol_table();
- }
-
-public:
- /* Callers of this ralloc-based new need not call delete. It's
-* easier to just ralloc_free 'ctx' (or any of its ancestors). */
- static void* operator new(size_t size, void *ctx)
- {
- void *table;
-
- table = ralloc_size(ctx, size);
- assert(table != NULL);
-
- ralloc_set_destructor(table, (void (*)(void*))
_glsl_symbol_table_destructor);
-
- return table;
- }
-
- /* If the user *does* call delete, that's OK, we will just
-* ralloc_free in that case. Here, C++ will have already called the
-* destructor so tell ralloc not to do that again. */
- static void operator delete(void *table)
- {
- ralloc_set_destructor(table, NULL);
- ralloc_free(table);
- }
-
+ DECLARE_RALLOC_CXX_OPERATORS(glsl_symbol_table)
+
glsl_symbol_table();
~glsl_symbol_table();
diff --git a/src/glsl/loop_analysis.h b/src/glsl/loop_analysis.h
index 31be4f3..3b1971d 100644
--- a/src/glsl/loop_analysis.h
+++ b/src/glsl/loop_analysis.h
@@ -140,22 +140,7 @@ public:
hash_table_dtor(this-var_hash);
}
- static void* operator new(size_t size, void *ctx)
- {
- void *lvs = ralloc_size(ctx, size);
- assert(lvs != NULL);
-
- ralloc_set_destructor(lvs, (void (*)(void*)) destructor);
-
- return lvs;
- }
-
-private:
- static void
- destructor(loop_variable_state *lvs)
- {
- lvs-~loop_variable_state();
- }
+ DECLARE_RALLOC_CXX_OPERATORS(loop_variable_state)
};
--
1.8.5.5
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Re: [Mesa-dev] [PATCH 1/3] driconf: Synchronize po files
2014-09-29 18:46 GMT-06:00 Eric Anholt e...@anholt.net: Applied review and pushed. Thanks! Thank you! -Alex ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
