[Mesa-dev] [Bug 105464] Reading per-patch outputs in Tessellation Control Shader returns undefined values

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=105464

libgra...@gmail.com changed:

   What|Removed |Added

 CC||libgra...@gmail.com

-- 
You are receiving this mail because:
You are the assignee for the bug.___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [RFC] Mesa 17.3.x release problems and process improvements

[Timothy Arceri]

On 14/03/18 07:36, Mark Janes wrote:

Daniel Vetter  writes:


On Tue, Mar 13, 2018 at 4:46 PM, Mark Janes  wrote:

Daniel Vetter  writes:


On Mon, Mar 12, 2018 at 11:54:45PM -0700, Kenneth Graunke wrote:

On Friday, March 9, 2018 12:12:28 PM PDT Mark Janes wrote:
[snip]

I've been doing this for Intel.  Developers are on the hook to fix their
bugs, but you can't make them do it.  They have many pressures on them,
and a maintainer can't make the call as to whether a rendering bug is
more important than day-1 vulkan conformance, for example.

We could heighten the transparency of what is blocking the build by
publicizing the authors of bisected blocking bugs to Phoronix, which
might get things moving.


I hope you're being sarcastic here, or else I'm misunderstanding your
proposal.  Public shaming of developers who create bugs has absolutely
no place in the Mesa community, IMHO.  It would foster the kind of toxic
community that none of us want to be a part of.

Sometimes, people who create bugs are the very people that work the
hardest, who the project may not even exist without.  Would you want
to chew out someone for creating a bug in a Vulkan driver when...if it
weren't for that person, you wouldn't have a Vulkan driver at all?  Or,
maybe they caused a couple bad bugs...but also fixed hundreds of them.

Other times, they're new contributors or volunteers who do this, not as
their day job.  Frankly, those people are under no obligation to help us
at all, so we need to thank them and appreciate the time and effort they
spend - and give them a hand fixing things when they're too busy, or
don't have the relevant hardware or skill to track down a regression.

It's easy to be pissed off when there are bugs, and things seem to not
be making progress, but let's try and keep things positive and work
together to make Mesa the best we can.


I'd like to second this with my experience from the kernel community. The
public shaming game for when you create a regression is very strong there,
lead by Linus Torvalds. In my experience this directly causes:

- Maintainers to hide bug reports and regressions reports at all costs,
   because having Linus destroy you just aint never worth it. The meta game
   becomes "avoid getting railed" instead of "deliver quality code", and
   there's lots of ways to easily achieve the former that serious hurt the
   latter.

- Best practice (in my experience) is to not mention the dreaded
   "REGRESSION" tag when you need another maintainer's help to fix a
   regression, because it's too likely they'll just panic. That means they
   start screaming at you to go away, or brain locks up and they can't
   effectively help you track down the bug (seen both cases).

- Creates a culture where talking about process/tooling improvements to
   prevent regressions and/or handle them quicker becomes too dangerous,
   because it all turns into a personal shaming game of who maintains the
   worst subsystem.

Long term you end up with a culture fucked up for good :-/

Imo the only way to make this better is to try analyzing why a regressions
happened, and fix the tooling to prevent that in the future. Maybe better
test coverage (and long term efforts to fix known gaps), maybe better
presentation of automated checks (stuff like github pull requests that
automatically run CI and report full results, blocking the merge if
anything is amiss).


You have to have a very strong CI to use it to block commits.  i965 Mesa
has a big CI which identifies many regressions, but I wouldn't want to
checkpoint commits in an automated way.  A large pool of obsolete
CI hardware will have lower reliability than the mesa master branch --
which generates noise for developers and impedes progress.


This was all in general about blaming regressions on people, not
specifically for the stable-backporting-from-master issue here.

And if parts of your CI can't autogate then you can make it more
informal - there's definitely stuff you want to autogate, like "does
it compile everywhere in all configs", and probably you don't want to
autogate on gen2 dying :-)


It's a bit different for us, because multiple companies and volunteers
can push.  We have a buildtest which prevents intel engineers and any CI
user from breaking radeon for example.  However, radeon still breaks
when AMD devs push LLVM-version-dependent patches.  We can't stop that,
and there are a set of similar situations where builds break.  Reverts
and quick fixes are fine for this IMO.


My point was if you don't want regressions, make it as easy as
possible for people to never push a regression (whether master or
stable trees) instead of a pillory or other blaming exercises. Litlle
things (like whether your CI results is in some mail somewhere, maybe
for an oudated version of your patches on a different baseline, or
right next to the "do you really want to merge" button) matters.


Agreed.  Anyone can 

Re: [Mesa-dev] [PATCH 2/2] configure.ac: require libdrm_amdgpu 2.4.91

[Marek Olšák]

Yes, it does.

Marek

On Mar 13, 2018 10:44 PM, "Dylan Baker"  wrote:

> Does meson need the same change?
>
> On March 13, 2018 6:03:18 PM PDT, "Marek Olšák"  wrote:
>>
>> From: Marek Olšák 
>>
>> Since 2.4.90 might not work, just ask for the next version.
>> ---
>>  configure.ac | 9 +
>>  1 file changed, 1 insertion(+), 8 deletions(-)
>>
>> diff --git a/configure.ac b/configure.ac
>> index e29ce68..8ec5b26 100644
>> --- a/configure.ac
>> +++ b/configure.ac
>> @@ -67,21 +67,21 @@ OPENCL_VERSION=1
>>  AC_SUBST([OPENCL_VERSION])
>>
>>  # The idea is that libdrm is distributed as one cohesive package, even
>>  # though it is composed of multiple libraries. However some drivers
>>  # may have different version requirements than others. This list
>>  # codifies which drivers need which version of libdrm. Any libdrm
>>  # version dependencies in non-driver-specific code should be reflected
>>  # in the first entry.
>>  LIBDRM_REQUIRED=2.4.75
>>  LIBDRM_RADEON_REQUIRED=2.4.71
>> -LIBDRM_AMDGPU_REQUIRED=2.4.90
>> +LIBDRM_AMDGPU_REQUIRED=2.4.91
>>  LIBDRM_INTEL_REQUIRED=2.4.75
>>  LIBDRM_NVVIEUX_REQUIRED=2.4.66
>>  LIBDRM_NOUVEAU_REQUIRED=2.4.66
>>  LIBDRM_FREEDRENO_REQUIRED=2.4.91
>>  LIBDRM_ETNAVIV_REQUIRED=2.4.82
>>
>>  dnl Versions for external dependencies
>>  DRI2PROTO_REQUIRED=2.8
>>  GLPROTO_REQUIRED=1.4.14
>>  LIBOMXIL_BELLAGIO_REQUIRED=0.0
>> @@ -2601,27 +2601,20 @@ if test -n "$with_gallium_drivers"; then
>>  radeon_llvm_check $LLVM_REQUIRED_R600 "r600"
>>
>>  llvm_add_component "asmparser" "r600"
>>  llvm_add_component "bitreader" "r600"
>>  fi
>>  ;;
>>  xradeonsi)
>>  HAVE_GALLIUM_RADEONSI=yes
>>  PKG_CHECK_MODULES([RADEON], [libdrm >= $LIBDRM_RADEON_REQUIRED 
>> libdrm_radeon >= $LIBDRM_RADEON_REQUIRED])
>>  PKG_CHECK_MODULES([AMDGPU], [libdrm >= $LIBDRM_AMDGPU_REQUIRED 
>> libdrm_amdgpu >= $LIBDRM_AMDGPU_REQUIRED])
>> -
>> -# Blacklist libdrm_amdgpu 2.4.90 because it breaks older 
>> radeonsi
>> -libdrm_version=`pkg-config libdrm_amdgpu --modversion`
>> -if test "x$libdrm_version" = x2.4.90; then
>> -AC_MSG_ERROR([radeonsi can't use libdrm 2.4.90 due to a 
>> compatibility issue. Use a newer or older version.])
>> -fi
>> -
>>  require_libdrm "radeonsi"
>>  radeon_llvm_check $LLVM_REQUIRED_RADEONSI "radeonsi"
>>  if test "x$enable_egl" = xyes; then
>>  require_basic_egl "radeonsi"
>>  fi
>>  ;;
>>  xnouveau)
>>  HAVE_GALLIUM_NOUVEAU=yes
>>  PKG_CHECK_MODULES([NOUVEAU], [libdrm >= 
>> $LIBDRM_NOUVEAU_REQUIRED libdrm_nouveau >= $LIBDRM_NOUVEAU_REQUIRED])
>>  require_libdrm "nouveau"
>>
>>
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 14/14] radv: drop geometry stride user sgpr.

[Dave Airlie]

From: Dave Airlie 

This removes the other geometry specific user sgpr.

Signed-off-by: Dave Airlie 
---
 src/amd/vulkan/radv_nir_to_llvm.c | 37 +++--
 src/amd/vulkan/radv_pipeline.c|  9 -
 src/amd/vulkan/radv_shader.h  |  1 -
 3 files changed, 19 insertions(+), 28 deletions(-)

diff --git a/src/amd/vulkan/radv_nir_to_llvm.c 
b/src/amd/vulkan/radv_nir_to_llvm.c
index e50cd9ef4b9..cdd0d990e3a 100644
--- a/src/amd/vulkan/radv_nir_to_llvm.c
+++ b/src/amd/vulkan/radv_nir_to_llvm.c
@@ -69,7 +69,6 @@ struct radv_shader_context {
LLVMValueRef tes_u;
LLVMValueRef tes_v;
 
-   LLVMValueRef gsvs_ring_stride;
LLVMValueRef gs2vs_offset;
LLVMValueRef gs_wave_id;
LLVMValueRef gs_vtx_offset[6];
@@ -103,6 +102,8 @@ struct radv_shader_context {
uint32_t tcs_vertices_per_patch;
uint32_t tcs_num_inputs;
uint32_t tcs_num_patches;
+   uint32_t max_gsvs_emit_size;
+   uint32_t gsvs_vertex_size;
 };
 
 enum radeon_llvm_calling_convention {
@@ -568,7 +569,6 @@ static void allocate_user_sgprs(struct radv_shader_context 
*ctx,
user_sgpr_info->sgpr_count += 
count_vs_user_sgprs(ctx);
}
}
-   user_sgpr_info->sgpr_count += 1;
break;
default:
break;
@@ -927,8 +927,6 @@ static void create_function(struct radv_shader_context *ctx,
);
}
 
-   add_arg(, ARG_SGPR, ctx->ac.i32,
-   >gsvs_ring_stride);
if (needs_view_index)
add_arg(, ARG_SGPR, ctx->ac.i32,
>abi.view_index);
@@ -956,8 +954,6 @@ static void create_function(struct radv_shader_context *ctx,
   _sgpr_info, ,
   _sets);
 
-   add_arg(, ARG_SGPR, ctx->ac.i32,
-   >gsvs_ring_stride);
if (needs_view_index)
add_arg(, ARG_SGPR, ctx->ac.i32,
>abi.view_index);
@@ -1083,8 +1079,6 @@ static void create_function(struct radv_shader_context 
*ctx,
   previous_stage,
   _sgpr_idx);
}
-   set_loc_shader(ctx, AC_UD_GS_VS_RING_STRIDE_ENTRIES,
-  _sgpr_idx, 1);
if (ctx->abi.view_index)
set_loc_shader(ctx, AC_UD_VIEW_INDEX, _sgpr_idx, 
1);
break;
@@ -2929,6 +2923,8 @@ ac_setup_rings(struct radv_shader_context *ctx)
if (ctx->stage == MESA_SHADER_GEOMETRY) {
LLVMValueRef tmp;
uint32_t num_entries = 64;
+   LLVMValueRef gsvs_ring_stride = LLVMConstInt(ctx->ac.i32, 
ctx->max_gsvs_emit_size, false);
+   LLVMValueRef gsvs_ring_desc = LLVMConstInt(ctx->ac.i32, 
ctx->max_gsvs_emit_size << 16, false);
ctx->esgs_ring = ac_build_load_to_sgpr(>ac, 
ctx->ring_offsets, LLVMConstInt(ctx->ac.i32, RING_ESGS_GS, false));
ctx->gsvs_ring = ac_build_load_to_sgpr(>ac, 
ctx->ring_offsets, LLVMConstInt(ctx->ac.i32, RING_GSVS_GS, false));
 
@@ -2936,10 +2932,10 @@ ac_setup_rings(struct radv_shader_context *ctx)
 
tmp = LLVMConstInt(ctx->ac.i32, num_entries, false);
if (ctx->options->chip_class >= VI)
-   tmp = LLVMBuildMul(ctx->ac.builder, 
LLVMBuildLShr(ctx->ac.builder, ctx->gsvs_ring_stride, LLVMConstInt(ctx->ac.i32, 
16, false), ""), tmp, "");
+   tmp = LLVMBuildMul(ctx->ac.builder, gsvs_ring_stride, 
tmp, "");
ctx->gsvs_ring = LLVMBuildInsertElement(ctx->ac.builder, 
ctx->gsvs_ring, tmp, LLVMConstInt(ctx->ac.i32, 2, false), "");
tmp = LLVMBuildExtractElement(ctx->ac.builder, ctx->gsvs_ring, 
ctx->ac.i32_1, "");
-   tmp = LLVMBuildOr(ctx->ac.builder, tmp, ctx->gsvs_ring_stride, 
"");
+   tmp = LLVMBuildOr(ctx->ac.builder, tmp, gsvs_ring_desc, "");
ctx->gsvs_ring = LLVMBuildInsertElement(ctx->ac.builder, 
ctx->gsvs_ring, tmp, ctx->ac.i32_1, "");
}
 
@@ -3118,6 +3114,17 @@ LLVMModuleRef 
ac_translate_nir_to_llvm(LLVMTargetMachineRef tm,
if (i)
ac_emit_barrier(, ctx.stage);
 
+   nir_foreach_variable(variable, [i]->outputs)
+   scan_shader_output_decl(, variable, shaders[i], 
shaders[i]->info.stage);
+
+   if (shaders[i]->info.stage == MESA_SHADER_GEOMETRY) {
+   unsigned addclip = 

[Mesa-dev] [PATCH 09/14] radv/tess: remove last chunk of tess sgprs

[Dave Airlie]

From: Dave Airlie 

This removes the last TES-specifc user sgpr.

Signed-off-by: Dave Airlie 
---
 src/amd/vulkan/radv_nir_to_llvm.c | 50 ---
 src/amd/vulkan/radv_pipeline.c| 18 ++
 src/amd/vulkan/radv_shader.h  |  4 ++--
 3 files changed, 19 insertions(+), 53 deletions(-)

diff --git a/src/amd/vulkan/radv_nir_to_llvm.c 
b/src/amd/vulkan/radv_nir_to_llvm.c
index 8df60004377..fdbca3812a7 100644
--- a/src/amd/vulkan/radv_nir_to_llvm.c
+++ b/src/amd/vulkan/radv_nir_to_llvm.c
@@ -62,7 +62,6 @@ struct radv_shader_context {
LLVMValueRef vs_prim_id;
LLVMValueRef es2gs_offset;
 
-   LLVMValueRef tcs_offchip_layout;
LLVMValueRef oc_lds;
LLVMValueRef merged_wave_info;
LLVMValueRef tess_factor_offset;
@@ -533,14 +532,11 @@ static void allocate_user_sgprs(struct 
radv_shader_context *ctx,
}
break;
case MESA_SHADER_TESS_EVAL:
-   user_sgpr_info->sgpr_count += 1;
break;
case MESA_SHADER_GEOMETRY:
if (has_previous_stage) {
if (previous_stage == MESA_SHADER_VERTEX) {
user_sgpr_info->sgpr_count += 
count_vs_user_sgprs(ctx);
-   } else {
-   user_sgpr_info->sgpr_count++;
}
}
user_sgpr_info->sgpr_count += 2;
@@ -861,7 +857,6 @@ static void create_function(struct radv_shader_context *ctx,
   previous_stage, _sgpr_info,
   , _sets);
 
-   add_arg(, ARG_SGPR, ctx->ac.i32, >tcs_offchip_layout);
if (needs_view_index)
add_arg(, ARG_SGPR, ctx->ac.i32,
>abi.view_index);
@@ -896,10 +891,7 @@ static void create_function(struct radv_shader_context 
*ctx,
   _sgpr_info, ,
   _sets);
 
-   if (previous_stage == MESA_SHADER_TESS_EVAL) {
-   add_arg(, ARG_SGPR, ctx->ac.i32,
-   >tcs_offchip_layout);
-   } else {
+   if (previous_stage != MESA_SHADER_TESS_EVAL) {
declare_vs_specific_input_sgprs(ctx, stage,

has_previous_stage,
previous_stage,
@@ -1055,7 +1047,6 @@ static void create_function(struct radv_shader_context 
*ctx,
set_loc_shader(ctx, AC_UD_VIEW_INDEX, _sgpr_idx, 
1);
break;
case MESA_SHADER_TESS_EVAL:
-   set_loc_shader(ctx, AC_UD_TES_OFFCHIP_LAYOUT, _sgpr_idx, 
1);
if (ctx->abi.view_index)
set_loc_shader(ctx, AC_UD_VIEW_INDEX, _sgpr_idx, 
1);
break;
@@ -1066,9 +1057,6 @@ static void create_function(struct radv_shader_context 
*ctx,
   has_previous_stage,
   previous_stage,
   _sgpr_idx);
-   else
-   set_loc_shader(ctx, AC_UD_TES_OFFCHIP_LAYOUT,
-  _sgpr_idx, 1);
}
set_loc_shader(ctx, AC_UD_GS_VS_RING_STRIDE_ENTRIES,
   _sgpr_idx, 2);
@@ -1149,35 +1137,27 @@ radv_load_resource(struct ac_shader_abi *abi, 
LLVMValueRef index,
  */
 static LLVMValueRef get_non_vertex_index_offset(struct radv_shader_context 
*ctx)
 {
-   if (ctx->stage == MESA_SHADER_TESS_CTRL) {
-   uint32_t num_tcs_outputs = 
util_last_bit64(ctx->shader_info->info.tcs.outputs_written);
-   uint32_t output_vertex_size = num_tcs_outputs * 16;
-   uint32_t pervertex_output_patch_size = 
ctx->tcs_vertices_per_patch * output_vertex_size;
-   uint32_t num_patches = ctx->tcs_num_patches;
+   uint32_t num_patches = ctx->tcs_num_patches;
+   uint32_t num_tcs_outputs;
+   if (ctx->stage == MESA_SHADER_TESS_CTRL)
+   num_tcs_outputs = 
util_last_bit64(ctx->shader_info->info.tcs.outputs_written);
+   else
+   num_tcs_outputs = ctx->options->key.tes.tcs_num_outputs;
 
-   return LLVMConstInt(ctx->ac.i32, pervertex_output_patch_size * 
num_patches, false);
-   } else
-   return ac_unpack_param(>ac, ctx->tcs_offchip_layout, 16, 
16);
+   uint32_t output_vertex_size = num_tcs_outputs * 16;
+   uint32_t pervertex_output_patch_size = ctx->tcs_vertices_per_patch * 
output_vertex_size;
+
+   return 

[Mesa-dev] [PATCH 13/14] radv: get rid of geometry user sgpr for num entries.

[Dave Airlie]

From: Dave Airlie 

This drops one of the geometry specific user sgprs,
we can work this out at compile time.

Signed-off-by: Dave Airlie 
---
 src/amd/vulkan/radv_nir_to_llvm.c | 15 +++
 src/amd/vulkan/radv_pipeline.c|  9 +
 2 files changed, 8 insertions(+), 16 deletions(-)

diff --git a/src/amd/vulkan/radv_nir_to_llvm.c 
b/src/amd/vulkan/radv_nir_to_llvm.c
index 91b0f3672d9..e50cd9ef4b9 100644
--- a/src/amd/vulkan/radv_nir_to_llvm.c
+++ b/src/amd/vulkan/radv_nir_to_llvm.c
@@ -70,7 +70,6 @@ struct radv_shader_context {
LLVMValueRef tes_v;
 
LLVMValueRef gsvs_ring_stride;
-   LLVMValueRef gsvs_num_entries;
LLVMValueRef gs2vs_offset;
LLVMValueRef gs_wave_id;
LLVMValueRef gs_vtx_offset[6];
@@ -569,7 +568,7 @@ static void allocate_user_sgprs(struct radv_shader_context 
*ctx,
user_sgpr_info->sgpr_count += 
count_vs_user_sgprs(ctx);
}
}
-   user_sgpr_info->sgpr_count += 2;
+   user_sgpr_info->sgpr_count += 1;
break;
default:
break;
@@ -930,8 +929,6 @@ static void create_function(struct radv_shader_context *ctx,
 
add_arg(, ARG_SGPR, ctx->ac.i32,
>gsvs_ring_stride);
-   add_arg(, ARG_SGPR, ctx->ac.i32,
-   >gsvs_num_entries);
if (needs_view_index)
add_arg(, ARG_SGPR, ctx->ac.i32,
>abi.view_index);
@@ -961,8 +958,6 @@ static void create_function(struct radv_shader_context *ctx,
 
add_arg(, ARG_SGPR, ctx->ac.i32,
>gsvs_ring_stride);
-   add_arg(, ARG_SGPR, ctx->ac.i32,
-   >gsvs_num_entries);
if (needs_view_index)
add_arg(, ARG_SGPR, ctx->ac.i32,
>abi.view_index);
@@ -1089,7 +1084,7 @@ static void create_function(struct radv_shader_context 
*ctx,
   _sgpr_idx);
}
set_loc_shader(ctx, AC_UD_GS_VS_RING_STRIDE_ENTRIES,
-  _sgpr_idx, 2);
+  _sgpr_idx, 1);
if (ctx->abi.view_index)
set_loc_shader(ctx, AC_UD_VIEW_INDEX, _sgpr_idx, 
1);
break;
@@ -2933,12 +2928,16 @@ ac_setup_rings(struct radv_shader_context *ctx)
}
if (ctx->stage == MESA_SHADER_GEOMETRY) {
LLVMValueRef tmp;
+   uint32_t num_entries = 64;
ctx->esgs_ring = ac_build_load_to_sgpr(>ac, 
ctx->ring_offsets, LLVMConstInt(ctx->ac.i32, RING_ESGS_GS, false));
ctx->gsvs_ring = ac_build_load_to_sgpr(>ac, 
ctx->ring_offsets, LLVMConstInt(ctx->ac.i32, RING_GSVS_GS, false));
 
ctx->gsvs_ring = LLVMBuildBitCast(ctx->ac.builder, 
ctx->gsvs_ring, ctx->ac.v4i32, "");
 
-   ctx->gsvs_ring = LLVMBuildInsertElement(ctx->ac.builder, 
ctx->gsvs_ring, ctx->gsvs_num_entries, LLVMConstInt(ctx->ac.i32, 2, false), "");
+   tmp = LLVMConstInt(ctx->ac.i32, num_entries, false);
+   if (ctx->options->chip_class >= VI)
+   tmp = LLVMBuildMul(ctx->ac.builder, 
LLVMBuildLShr(ctx->ac.builder, ctx->gsvs_ring_stride, LLVMConstInt(ctx->ac.i32, 
16, false), ""), tmp, "");
+   ctx->gsvs_ring = LLVMBuildInsertElement(ctx->ac.builder, 
ctx->gsvs_ring, tmp, LLVMConstInt(ctx->ac.i32, 2, false), "");
tmp = LLVMBuildExtractElement(ctx->ac.builder, ctx->gsvs_ring, 
ctx->ac.i32_1, "");
tmp = LLVMBuildOr(ctx->ac.builder, tmp, ctx->gsvs_ring_stride, 
"");
ctx->gsvs_ring = LLVMBuildInsertElement(ctx->ac.builder, 
ctx->gsvs_ring, tmp, ctx->ac.i32_1, "");
diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index a4836abf7f1..b6ca2db6916 100644
--- a/src/amd/vulkan/radv_pipeline.c
+++ b/src/amd/vulkan/radv_pipeline.c
@@ -2622,16 +2622,9 @@ radv_pipeline_generate_geometry_shader(struct 
radeon_winsys_cs *cs,
 
AC_UD_GS_VS_RING_STRIDE_ENTRIES);
if (loc->sgpr_idx != -1) {
uint32_t stride = gs->info.gs.max_gsvs_emit_size;
-   uint32_t num_entries = 64;
-   bool is_vi = 
pipeline->device->physical_device->rad_info.chip_class >= VI;
-
-   if (is_vi)
-   num_entries *= stride;
-
stride = S_008F04_STRIDE(stride);
-   radeon_set_sh_reg_seq(cs, R_00B230_SPI_SHADER_USER_DATA_GS_0 + 
loc->sgpr_idx * 4, 2);
+   radeon_set_sh_reg_seq(cs, R_00B230_SPI_SHADER_USER_DATA_GS_0 + 
loc->sgpr_idx * 

[Mesa-dev] [PATCH 10/14] radv: use num_patches output from tcs shader.

[Dave Airlie]

From: Dave Airlie 

Instead of recalculating the value, use the shader calculated value.

Signed-off-by: Dave Airlie 
---
 src/amd/vulkan/radv_pipeline.c | 30 ++
 1 file changed, 2 insertions(+), 28 deletions(-)

diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index b4e96238d76..898124fa827 100644
--- a/src/amd/vulkan/radv_pipeline.c
+++ b/src/amd/vulkan/radv_pipeline.c
@@ -1311,7 +1311,7 @@ calculate_tess_state(struct radv_pipeline *pipeline,
unsigned num_tcs_patch_outputs;
unsigned input_vertex_size, output_vertex_size, 
pervertex_output_patch_size;
unsigned input_patch_size, output_patch_size, output_patch0_offset;
-   unsigned lds_size, hardware_lds_size;
+   unsigned lds_size;
unsigned num_patches;
struct radv_tessellation_state tess = {0};
 
@@ -1334,34 +1334,8 @@ calculate_tess_state(struct radv_pipeline *pipeline,
 
pervertex_output_patch_size = num_tcs_output_cp * output_vertex_size;
output_patch_size = pervertex_output_patch_size + num_tcs_patch_outputs 
* 16;
-   /* Ensure that we only need one wave per SIMD so we don't need to check
-* resource usage. Also ensures that the number of tcs in and out
-* vertices per threadgroup are at most 256.
-*/
-   num_patches = 64 / MAX2(num_tcs_input_cp, num_tcs_output_cp) * 4;
-
-   /* Make sure that the data fits in LDS. This assumes the shaders only
-* use LDS for the inputs and outputs.
-*/
-   hardware_lds_size = 
pipeline->device->physical_device->rad_info.chip_class >= CIK ? 65536 : 32768;
-   num_patches = MIN2(num_patches, hardware_lds_size / (input_patch_size + 
output_patch_size));
-
-   /* Make sure the output data fits in the offchip buffer */
-   num_patches = MIN2(num_patches,
-   (pipeline->device->tess_offchip_block_dw_size * 4) /
-   output_patch_size);
-
-   /* Not necessary for correctness, but improves performance. The
-* specific value is taken from the proprietary driver.
-*/
-   num_patches = MIN2(num_patches, 40);
-
-   /* SI bug workaround - limit LS-HS threadgroups to only one wave. */
-   if (pipeline->device->physical_device->rad_info.chip_class == SI) {
-   unsigned one_wave = 64 / MAX2(num_tcs_input_cp, 
num_tcs_output_cp);
-   num_patches = MIN2(num_patches, one_wave);
-   }
 
+   num_patches = 
pipeline->shaders[MESA_SHADER_TESS_CTRL]->info.tcs.num_patches;
output_patch0_offset = input_patch_size * num_patches;
 
lds_size = output_patch0_offset + output_patch_size * num_patches;
-- 
2.14.3

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 12/14] radv: migrate lds size calculations to shader gen.

[Dave Airlie]

From: Dave Airlie 

This moves the lds_size calcs into the shader so we have all
the size stuff in one file.

Signed-off-by: Dave Airlie 
---
 src/amd/vulkan/radv_nir_to_llvm.c | 33 +
 src/amd/vulkan/radv_pipeline.c| 29 -
 src/amd/vulkan/radv_shader.h  |  1 +
 3 files changed, 38 insertions(+), 25 deletions(-)

diff --git a/src/amd/vulkan/radv_nir_to_llvm.c 
b/src/amd/vulkan/radv_nir_to_llvm.c
index 9997b1e52c4..91b0f3672d9 100644
--- a/src/amd/vulkan/radv_nir_to_llvm.c
+++ b/src/amd/vulkan/radv_nir_to_llvm.c
@@ -174,6 +174,38 @@ get_tcs_num_patches(struct radv_shader_context *ctx)
return num_patches;
 }
 
+static unsigned
+calculate_tess_lds_size(struct radv_shader_context *ctx)
+{
+   unsigned num_tcs_input_cp = ctx->options->key.tcs.input_vertices;
+   unsigned num_tcs_output_cp;
+   unsigned num_tcs_outputs, num_tcs_patch_outputs;
+   unsigned input_vertex_size, output_vertex_size;
+   unsigned input_patch_size, output_patch_size;
+   unsigned pervertex_output_patch_size;
+   unsigned output_patch0_offset;
+   unsigned num_patches;
+   unsigned lds_size;
+
+   num_tcs_output_cp = ctx->tcs_vertices_per_patch;
+   num_tcs_outputs = 
util_last_bit64(ctx->shader_info->info.tcs.outputs_written);
+   num_tcs_patch_outputs = 
util_last_bit64(ctx->shader_info->info.tcs.patch_outputs_written);
+
+   input_vertex_size = ctx->tcs_num_inputs * 16;
+   output_vertex_size = num_tcs_outputs * 16;
+
+   input_patch_size = num_tcs_input_cp * input_vertex_size;
+
+   pervertex_output_patch_size = num_tcs_output_cp * output_vertex_size;
+   output_patch_size = pervertex_output_patch_size + num_tcs_patch_outputs 
* 16;
+
+   num_patches = ctx->tcs_num_patches;
+   output_patch0_offset = input_patch_size * num_patches;
+
+   lds_size = output_patch0_offset + output_patch_size * num_patches;
+   return lds_size;
+}
+
 /* Tessellation shaders pass outputs to the next shader using LDS.
  *
  * LS outputs = TCS inputs
@@ -3131,6 +3163,7 @@ LLVMModuleRef 
ac_translate_nir_to_llvm(LLVMTargetMachineRef tm,
shaders[i]->info.gs.vertices_out;
} else if (shaders[i]->info.stage == MESA_SHADER_TESS_CTRL) {
shader_info->tcs.num_patches = ctx.tcs_num_patches;
+   shader_info->tcs.lds_size = 
calculate_tess_lds_size();
}
}
 
diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index 771bc2e4080..a4836abf7f1 100644
--- a/src/amd/vulkan/radv_pipeline.c
+++ b/src/amd/vulkan/radv_pipeline.c
@@ -1306,38 +1306,17 @@ static struct radv_tessellation_state
 calculate_tess_state(struct radv_pipeline *pipeline,
 const VkGraphicsPipelineCreateInfo *pCreateInfo)
 {
-   unsigned num_tcs_input_cp = 
pCreateInfo->pTessellationState->patchControlPoints;
-   unsigned num_tcs_output_cp, num_tcs_inputs, num_tcs_outputs;
-   unsigned num_tcs_patch_outputs;
-   unsigned input_vertex_size, output_vertex_size, 
pervertex_output_patch_size;
-   unsigned input_patch_size, output_patch_size, output_patch0_offset;
+   unsigned num_tcs_input_cp;
+   unsigned num_tcs_output_cp;
unsigned lds_size;
unsigned num_patches;
struct radv_tessellation_state tess = {0};
 
-   /* This calculates how shader inputs and outputs among VS, TCS, and TES
-* are laid out in LDS. */
-   num_tcs_inputs = 
util_last_bit64(radv_get_vertex_shader(pipeline)->info.info.vs.ls_outputs_written);
-   num_tcs_outputs = 
util_last_bit64(pipeline->shaders[MESA_SHADER_TESS_CTRL]->info.info.tcs.outputs_written);
 //tcs->outputs_written
+   num_tcs_input_cp = pCreateInfo->pTessellationState->patchControlPoints;
num_tcs_output_cp = 
pipeline->shaders[MESA_SHADER_TESS_CTRL]->info.tcs.tcs_vertices_out; //TCS 
VERTICES OUT
-   num_tcs_patch_outputs = 
util_last_bit64(pipeline->shaders[MESA_SHADER_TESS_CTRL]->info.info.tcs.patch_outputs_written);
-
-   /* Ensure that we only need one wave per SIMD so we don't need to check
-* resource usage. Also ensures that the number of tcs in and out
-* vertices per threadgroup are at most 256.
-*/
-   input_vertex_size = num_tcs_inputs * 16;
-   output_vertex_size = num_tcs_outputs * 16;
-
-   input_patch_size = num_tcs_input_cp * input_vertex_size;
-
-   pervertex_output_patch_size = num_tcs_output_cp * output_vertex_size;
-   output_patch_size = pervertex_output_patch_size + num_tcs_patch_outputs 
* 16;
-
num_patches = 
pipeline->shaders[MESA_SHADER_TESS_CTRL]->info.tcs.num_patches;
-   output_patch0_offset = input_patch_size * num_patches;
 
-   lds_size = output_patch0_offset + output_patch_size * num_patches;
+   lds_size = 

[Mesa-dev] [PATCH 11/14] radv: drop scanning the tess shader in the nir code.

[Dave Airlie]

From: Dave Airlie 

This drops the now unneeded scanning and results in favour
of the ones in the info.

Signed-off-by: Dave Airlie 
---
 src/amd/vulkan/radv_nir_to_llvm.c | 33 -
 src/amd/vulkan/radv_pipeline.c|  7 +++
 src/amd/vulkan/radv_shader.h  |  5 -
 3 files changed, 3 insertions(+), 42 deletions(-)

diff --git a/src/amd/vulkan/radv_nir_to_llvm.c 
b/src/amd/vulkan/radv_nir_to_llvm.c
index fdbca3812a7..9997b1e52c4 100644
--- a/src/amd/vulkan/radv_nir_to_llvm.c
+++ b/src/amd/vulkan/radv_nir_to_llvm.c
@@ -98,8 +98,6 @@ struct radv_shader_context {
unsigned gs_max_out_vertices;
 
unsigned tes_primitive_mode;
-   uint64_t tess_outputs_written;
-   uint64_t tess_patch_outputs_written;
 
uint32_t tcs_patch_outputs_read;
uint64_t tcs_outputs_read;
@@ -1216,18 +1214,6 @@ static LLVMValueRef 
get_tcs_tes_buffer_address_params(struct radv_shader_context
return get_tcs_tes_buffer_address(ctx, vertex_index, param_index);
 }
 
-static void
-mark_tess_output(struct radv_shader_context *ctx,
-bool is_patch, uint32_t param, int num_slots)
-
-{
-   uint64_t slot_mask = (1ull << num_slots) - 1;
-   if (is_patch) {
-   ctx->tess_patch_outputs_written |= (slot_mask << param);
-   } else
-   ctx->tess_outputs_written |= (slot_mask << param);
-}
-
 static LLVMValueRef
 get_dw_address(struct radv_shader_context *ctx,
   LLVMValueRef dw_addr,
@@ -1323,7 +1309,6 @@ store_tcs_output(struct ac_shader_abi *abi,
const unsigned component = var->data.location_frac;
const bool is_patch = var->data.patch;
const bool is_compact = var->data.compact;
-   const unsigned count = glsl_count_attribute_slots(var->type, false);
LLVMValueRef dw_addr;
LLVMValueRef stride = NULL;
LLVMValueRef buf_addr = NULL;
@@ -1352,11 +1337,6 @@ store_tcs_output(struct ac_shader_abi *abi,
dw_addr = get_tcs_out_current_patch_data_offset(ctx);
}
 
-   if (param_index)
-   mark_tess_output(ctx, is_patch, param, count);
-   else
-   mark_tess_output(ctx, is_patch, param, 1);
-
dw_addr = get_dw_address(ctx, dw_addr, param, const_index, is_compact, 
vertex_index, stride,
 param_index);
buf_addr = get_tcs_tes_buffer_address_params(ctx, param, const_index, 
is_compact,
@@ -2462,9 +2442,6 @@ handle_ls_outputs_post(struct radv_shader_context *ctx)
if (i == VARYING_SLOT_CLIP_DIST0)
length = ctx->num_output_clips + ctx->num_output_culls;
int param = shader_io_get_unique_index(i);
-   mark_tess_output(ctx, false, param, 1);
-   if (length > 4)
-   mark_tess_output(ctx, false, param + 1, 1);
LLVMValueRef dw_addr = LLVMBuildAdd(ctx->ac.builder, 
base_dw_addr,
LLVMConstInt(ctx->ac.i32, 
param * 4, false),
"");
@@ -2608,13 +2585,11 @@ write_tess_factors(struct radv_shader_context *ctx)
 
if (inner_comps) {
tess_inner_index = 
shader_io_get_unique_index(VARYING_SLOT_TESS_LEVEL_INNER);
-   mark_tess_output(ctx, true, tess_inner_index, 1);
lds_inner = LLVMBuildAdd(ctx->ac.builder, lds_base,
 LLVMConstInt(ctx->ac.i32, 
tess_inner_index * 4, false), "");
}
 
tess_outer_index = 
shader_io_get_unique_index(VARYING_SLOT_TESS_LEVEL_OUTER);
-   mark_tess_output(ctx, true, tess_outer_index, 1);
lds_outer = LLVMBuildAdd(ctx->ac.builder, lds_base,
 LLVMConstInt(ctx->ac.i32, tess_outer_index * 
4, false), "");
 
@@ -3063,7 +3038,6 @@ LLVMModuleRef 
ac_translate_nir_to_llvm(LLVMTargetMachineRef tm,
for(int i = 0; i < shader_count; ++i) {
ctx.stage = shaders[i]->info.stage;
ctx.output_mask = 0;
-   ctx.tess_outputs_written = 0;
ctx.num_output_clips = 
shaders[i]->info.clip_distance_array_size;
ctx.num_output_culls = 
shaders[i]->info.cull_distance_array_size;
 
@@ -3156,14 +3130,7 @@ LLVMModuleRef 
ac_translate_nir_to_llvm(LLVMTargetMachineRef tm,
shader_info->gs.max_gsvs_emit_size = 
shader_info->gs.gsvs_vertex_size *
shaders[i]->info.gs.vertices_out;
} else if (shaders[i]->info.stage == MESA_SHADER_TESS_CTRL) {
-   shader_info->tcs.outputs_written = 
ctx.tess_outputs_written;
-   shader_info->tcs.patch_outputs_written = 
ctx.tess_patch_outputs_written;
shader_info->tcs.num_patches = ctx.tcs_num_patches;
-   assert(ctx.tess_outputs_written 

[Mesa-dev] [PATCH 08/14] radv: pass num_patches to tes from tcs

[Dave Airlie]

From: Dave Airlie 

TES needs num_patches to do some of the calculations.

Signed-off-by: Dave Airlie 
---
 src/amd/vulkan/radv_nir_to_llvm.c | 4 +++-
 src/amd/vulkan/radv_pipeline.c| 4 
 src/amd/vulkan/radv_shader.h  | 3 ++-
 3 files changed, 9 insertions(+), 2 deletions(-)

diff --git a/src/amd/vulkan/radv_nir_to_llvm.c 
b/src/amd/vulkan/radv_nir_to_llvm.c
index 4bdc0e6e9ec..8df60004377 100644
--- a/src/amd/vulkan/radv_nir_to_llvm.c
+++ b/src/amd/vulkan/radv_nir_to_llvm.c
@@ -1170,7 +1170,7 @@ static LLVMValueRef calc_param_stride(struct 
radv_shader_context *ctx,
else
param_stride = LLVMConstInt(ctx->ac.i32, 
ctx->tcs_num_patches, false);
} else {
-   LLVMValueRef num_patches = ac_unpack_param(>ac, 
ctx->tcs_offchip_layout, 0, 9);
+   LLVMValueRef num_patches = LLVMConstInt(ctx->ac.i32, 
ctx->tcs_num_patches, false);
LLVMValueRef vertices_per_patch = LLVMConstInt(ctx->ac.i32, 
ctx->tcs_vertices_per_patch, false);
if (vertex_index)
param_stride = LLVMBuildMul(ctx->ac.builder, 
vertices_per_patch,
@@ -3110,6 +3110,7 @@ LLVMModuleRef 
ac_translate_nir_to_llvm(LLVMTargetMachineRef tm,
ctx.abi.load_tess_coord = load_tess_coord;
ctx.abi.load_patch_vertices_in = load_patch_vertices_in;
ctx.tcs_vertices_per_patch = 
shaders[i]->info.tess.tcs_vertices_out;
+   ctx.tcs_num_patches = ctx.options->key.tes.num_patches;
} else if (shaders[i]->info.stage == MESA_SHADER_VERTEX) {
if (shader_info->info.vs.needs_instance_id) {
if (ctx.options->key.vs.as_ls) {
@@ -3177,6 +3178,7 @@ LLVMModuleRef 
ac_translate_nir_to_llvm(LLVMTargetMachineRef tm,
} else if (shaders[i]->info.stage == MESA_SHADER_TESS_CTRL) {
shader_info->tcs.outputs_written = 
ctx.tess_outputs_written;
shader_info->tcs.patch_outputs_written = 
ctx.tess_patch_outputs_written;
+   shader_info->tcs.num_patches = ctx.tcs_num_patches;
assert(ctx.tess_outputs_written == 
ctx.shader_info->info.tcs.outputs_written);
assert(ctx.tess_patch_outputs_written == 
ctx.shader_info->info.tcs.patch_outputs_written);
} else if (shaders[i]->info.stage == MESA_SHADER_VERTEX && 
ctx.options->key.vs.as_ls) {
diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index 641dc5558b8..cc7824566e0 100644
--- a/src/amd/vulkan/radv_pipeline.c
+++ b/src/amd/vulkan/radv_pipeline.c
@@ -1785,6 +1785,7 @@ void radv_create_shaders(struct radv_pipeline *pipeline,

  _sizes[MESA_SHADER_TESS_CTRL]);
}
modules[MESA_SHADER_VERTEX] = NULL;
+   keys[MESA_SHADER_TESS_EVAL].tes.num_patches = 
pipeline->shaders[MESA_SHADER_TESS_CTRL]->info.tcs.num_patches;
}
 
if (device->physical_device->rad_info.chip_class >= GFX9 && 
modules[MESA_SHADER_GEOMETRY]) {
@@ -1804,6 +1805,9 @@ void radv_create_shaders(struct radv_pipeline *pipeline,
if (i == MESA_SHADER_TESS_CTRL) {
keys[MESA_SHADER_TESS_CTRL].tcs.num_inputs = 
util_last_bit64(pipeline->shaders[MESA_SHADER_VERTEX]->info.info.vs.ls_outputs_written);
}
+   if (i == MESA_SHADER_TESS_EVAL) {
+   keys[MESA_SHADER_TESS_EVAL].tes.num_patches = 
pipeline->shaders[MESA_SHADER_TESS_CTRL]->info.tcs.num_patches;
+   }
pipeline->shaders[i] = 
radv_shader_variant_create(device, modules[i], [i], 1,
  
pipeline->layout,
  keys 
+ i, [i],
diff --git a/src/amd/vulkan/radv_shader.h b/src/amd/vulkan/radv_shader.h
index 7e2f60a2217..deb360df5ae 100644
--- a/src/amd/vulkan/radv_shader.h
+++ b/src/amd/vulkan/radv_shader.h
@@ -63,6 +63,7 @@ struct radv_vs_variant_key {
 struct radv_tes_variant_key {
uint32_t as_es:1;
uint32_t export_prim_id:1;
+   uint32_t num_patches;
 };
 
 struct radv_tcs_variant_key {
@@ -235,7 +236,7 @@ struct radv_shader_variant_info {
uint64_t outputs_written;
/* Which patch outputs are actually written */
uint32_t patch_outputs_written;
-
+   uint32_t num_patches;
} tcs;
struct {
struct radv_vs_output_info outinfo;
-- 
2.14.3

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org

[Mesa-dev] [PATCH 04/14] radv/tess: drop tcs_in_layout setting completely.

[Dave Airlie]

From: Dave Airlie 

Inline all calcs at shader creation.

Signed-off-by: Dave Airlie 
---
 src/amd/vulkan/radv_nir_to_llvm.c | 26 +-
 src/amd/vulkan/radv_pipeline.c| 12 ++--
 src/amd/vulkan/radv_shader.h  |  1 +
 3 files changed, 24 insertions(+), 15 deletions(-)

diff --git a/src/amd/vulkan/radv_nir_to_llvm.c 
b/src/amd/vulkan/radv_nir_to_llvm.c
index 64b50cab0a1..ee32549bde6 100644
--- a/src/amd/vulkan/radv_nir_to_llvm.c
+++ b/src/amd/vulkan/radv_nir_to_llvm.c
@@ -65,7 +65,6 @@ struct radv_shader_context {
LLVMValueRef tcs_offchip_layout;
LLVMValueRef tcs_out_offsets;
LLVMValueRef tcs_out_layout;
-   LLVMValueRef tcs_in_layout;
LLVMValueRef oc_lds;
LLVMValueRef merged_wave_info;
LLVMValueRef tess_factor_offset;
@@ -108,6 +107,7 @@ struct radv_shader_context {
uint32_t tcs_patch_outputs_read;
uint64_t tcs_outputs_read;
uint32_t tcs_vertices_per_patch;
+   uint32_t tcs_num_inputs;
 };
 
 enum radeon_llvm_calling_convention {
@@ -162,7 +162,11 @@ static LLVMValueRef
 get_tcs_in_patch_stride(struct radv_shader_context *ctx)
 {
assert (ctx->stage == MESA_SHADER_TESS_CTRL);
-   return ac_unpack_param(>ac, ctx->tcs_in_layout, 0, 13);
+   uint32_t input_vertex_size = ctx->tcs_num_inputs * 16;
+   uint32_t input_patch_size = ctx->options->key.tcs.input_vertices * 
input_vertex_size;
+
+   input_patch_size /= 4;
+   return LLVMConstInt(ctx->ac.i32, input_patch_size, false);
 }
 
 static LLVMValueRef
@@ -462,7 +466,7 @@ static void allocate_user_sgprs(struct radv_shader_context 
*ctx,
if (previous_stage == MESA_SHADER_VERTEX)
user_sgpr_info->sgpr_count += 
count_vs_user_sgprs(ctx);
}
-   user_sgpr_info->sgpr_count += 4;
+   user_sgpr_info->sgpr_count += 3;
break;
case MESA_SHADER_TESS_EVAL:
user_sgpr_info->sgpr_count += 1;
@@ -764,8 +768,6 @@ static void create_function(struct radv_shader_context *ctx,
>tcs_out_offsets);
add_arg(, ARG_SGPR, ctx->ac.i32,
>tcs_out_layout);
-   add_arg(, ARG_SGPR, ctx->ac.i32,
-   >tcs_in_layout);
if (needs_view_index)
add_arg(, ARG_SGPR, ctx->ac.i32,
>abi.view_index);
@@ -789,8 +791,6 @@ static void create_function(struct radv_shader_context *ctx,
>tcs_out_offsets);
add_arg(, ARG_SGPR, ctx->ac.i32,
>tcs_out_layout);
-   add_arg(, ARG_SGPR, ctx->ac.i32,
-   >tcs_in_layout);
if (needs_view_index)
add_arg(, ARG_SGPR, ctx->ac.i32,
>abi.view_index);
@@ -999,7 +999,7 @@ static void create_function(struct radv_shader_context *ctx,
case MESA_SHADER_TESS_CTRL:
set_vs_specific_input_locs(ctx, stage, has_previous_stage,
   previous_stage, _sgpr_idx);
-   set_loc_shader(ctx, AC_UD_TCS_OFFCHIP_LAYOUT, _sgpr_idx, 
4);
+   set_loc_shader(ctx, AC_UD_TCS_OFFCHIP_LAYOUT, _sgpr_idx, 
3);
if (ctx->abi.view_index)
set_loc_shader(ctx, AC_UD_VIEW_INDEX, _sgpr_idx, 
1);
break;
@@ -1226,7 +1226,8 @@ load_tcs_varyings(struct ac_shader_abi *abi,
unsigned param = shader_io_get_unique_index(location);
 
if (load_input) {
-   stride = ac_unpack_param(>ac, ctx->tcs_in_layout, 13, 8);
+   uint32_t input_vertex_size = (ctx->tcs_num_inputs * 16) / 4;
+   stride = LLVMConstInt(ctx->ac.i32, input_vertex_size, false);
dw_addr = get_tcs_in_current_patch_offset(ctx);
} else {
if (!is_patch) {
@@ -3020,6 +3021,10 @@ LLVMModuleRef 
ac_translate_nir_to_llvm(LLVMTargetMachineRef tm,
ctx.abi.load_patch_vertices_in = load_patch_vertices_in;
ctx.abi.store_tcs_outputs = store_tcs_output;
ctx.tcs_vertices_per_patch = 
shaders[i]->info.tess.tcs_vertices_out;
+   if (shader_count == 1)
+   ctx.tcs_num_inputs = 
ctx.options->key.tcs.num_inputs;
+   else
+   ctx.tcs_num_inputs = 
util_last_bit64(shader_info->info.vs.ls_outputs_written);
} else if (shaders[i]->info.stage == MESA_SHADER_TESS_EVAL) {
ctx.tes_primitive_mode = 
shaders[i]->info.tess.primitive_mode;
ctx.abi.load_tess_varyings = 

[Mesa-dev] [PATCH 06/14] radv: drop tcs_out_offsets

[Dave Airlie]

From: Dave Airlie 

Move all calculations to shader generation.

Signed-off-by: Dave Airlie 
---
 src/amd/vulkan/radv_nir_to_llvm.c | 39 +++
 src/amd/vulkan/radv_pipeline.c| 10 ++
 2 files changed, 29 insertions(+), 20 deletions(-)

diff --git a/src/amd/vulkan/radv_nir_to_llvm.c 
b/src/amd/vulkan/radv_nir_to_llvm.c
index ad165f17cf0..8414247b54a 100644
--- a/src/amd/vulkan/radv_nir_to_llvm.c
+++ b/src/amd/vulkan/radv_nir_to_llvm.c
@@ -63,7 +63,6 @@ struct radv_shader_context {
LLVMValueRef es2gs_offset;
 
LLVMValueRef tcs_offchip_layout;
-   LLVMValueRef tcs_out_offsets;
LLVMValueRef oc_lds;
LLVMValueRef merged_wave_info;
LLVMValueRef tess_factor_offset;
@@ -192,17 +191,37 @@ get_tcs_out_vertex_stride(struct radv_shader_context *ctx)
 static LLVMValueRef
 get_tcs_out_patch0_offset(struct radv_shader_context *ctx)
 {
+   assert (ctx->stage == MESA_SHADER_TESS_CTRL);
+   uint32_t input_vertex_size = ctx->tcs_num_inputs * 16;
+   uint32_t input_patch_size = ctx->options->key.tcs.input_vertices * 
input_vertex_size;
+   uint32_t output_patch0_offset = input_patch_size;
+   LLVMValueRef num_patches = ac_unpack_param(>ac, 
ctx->tcs_offchip_layout, 0, 9);
+
+   output_patch0_offset /= 4;
return LLVMBuildMul(ctx->ac.builder,
-   ac_unpack_param(>ac, ctx->tcs_out_offsets, 0, 
16),
-   LLVMConstInt(ctx->ac.i32, 4, false), "");
+   num_patches,
+   LLVMConstInt(ctx->ac.i32, output_patch0_offset, 
false), "");
 }
 
 static LLVMValueRef
 get_tcs_out_patch0_patch_data_offset(struct radv_shader_context *ctx)
 {
-   return LLVMBuildMul(ctx->ac.builder,
-   ac_unpack_param(>ac, ctx->tcs_out_offsets, 16, 
16),
-   LLVMConstInt(ctx->ac.i32, 4, false), "");
+   uint32_t input_vertex_size = ctx->tcs_num_inputs * 16;
+   uint32_t input_patch_size = ctx->options->key.tcs.input_vertices * 
input_vertex_size;
+   uint32_t output_patch0_offset = input_patch_size;
+
+   uint32_t num_tcs_outputs = 
util_last_bit64(ctx->shader_info->info.tcs.outputs_written);
+   uint32_t output_vertex_size = num_tcs_outputs * 16;
+   uint32_t pervertex_output_patch_size = ctx->tcs_vertices_per_patch * 
output_vertex_size;
+   LLVMValueRef num_patches = ac_unpack_param(>ac, 
ctx->tcs_offchip_layout, 0, 9);
+
+   output_patch0_offset /= 4;
+   LLVMValueRef value = LLVMBuildMul(ctx->ac.builder,
+ num_patches,
+ LLVMConstInt(ctx->ac.i32, 
output_patch0_offset, false), "");
+   return LLVMBuildAdd(ctx->ac.builder,
+   value,
+   LLVMConstInt(ctx->ac.i32, 
pervertex_output_patch_size / 4, false), "");
 }
 
 static LLVMValueRef
@@ -474,7 +493,7 @@ static void allocate_user_sgprs(struct radv_shader_context 
*ctx,
if (previous_stage == MESA_SHADER_VERTEX)
user_sgpr_info->sgpr_count += 
count_vs_user_sgprs(ctx);
}
-   user_sgpr_info->sgpr_count += 2;
+   user_sgpr_info->sgpr_count += 1;
break;
case MESA_SHADER_TESS_EVAL:
user_sgpr_info->sgpr_count += 1;
@@ -772,8 +791,6 @@ static void create_function(struct radv_shader_context *ctx,
 
add_arg(, ARG_SGPR, ctx->ac.i32,
>tcs_offchip_layout);
-   add_arg(, ARG_SGPR, ctx->ac.i32,
-   >tcs_out_offsets);
if (needs_view_index)
add_arg(, ARG_SGPR, ctx->ac.i32,
>abi.view_index);
@@ -793,8 +810,6 @@ static void create_function(struct radv_shader_context *ctx,
 
add_arg(, ARG_SGPR, ctx->ac.i32,
>tcs_offchip_layout);
-   add_arg(, ARG_SGPR, ctx->ac.i32,
-   >tcs_out_offsets);
if (needs_view_index)
add_arg(, ARG_SGPR, ctx->ac.i32,
>abi.view_index);
@@ -1003,7 +1018,7 @@ static void create_function(struct radv_shader_context 
*ctx,
case MESA_SHADER_TESS_CTRL:
set_vs_specific_input_locs(ctx, stage, has_previous_stage,
   previous_stage, _sgpr_idx);
-   set_loc_shader(ctx, AC_UD_TCS_OFFCHIP_LAYOUT, _sgpr_idx, 
2);
+   set_loc_shader(ctx, AC_UD_TCS_OFFCHIP_LAYOUT, _sgpr_idx, 
1);
if (ctx->abi.view_index)
set_loc_shader(ctx, AC_UD_VIEW_INDEX, _sgpr_idx, 
1);
break;
diff --git 

[Mesa-dev] [PATCH 02/14] radv/shader_info: start gathering tess output info (v2)

[Dave Airlie]

From: Dave Airlie 

This gathers the ls outputs written by the vertex shader,
and the tcs outputs, these are needed to calculate certain
tcs parameters.

These have to be separate for combined gfx9 shaders.

This is a bit pessimistic compared to the nir pass,
as we don't work out the individual slots for tcs outputs,
but I actually thing it should be fine to just mark the whole
thing used here.

v2: move to radv, handle clip dist (Samuel),
handle compacts and patchs properly.
Signed-off-by: Dave Airlie 
---
 src/amd/vulkan/radv_shader.h  |  5 
 src/amd/vulkan/radv_shader_info.c | 49 +--
 2 files changed, 52 insertions(+), 2 deletions(-)

diff --git a/src/amd/vulkan/radv_shader.h b/src/amd/vulkan/radv_shader.h
index cab0fc43bda..23ca3b8858e 100644
--- a/src/amd/vulkan/radv_shader.h
+++ b/src/amd/vulkan/radv_shader.h
@@ -131,6 +131,7 @@ struct radv_shader_info {
bool uses_invocation_id;
bool uses_prim_id;
struct {
+   uint64_t ls_outputs_written;
uint8_t input_usage_mask[VERT_ATTRIB_MAX];
uint8_t output_usage_mask[VARYING_SLOT_VAR31 + 1];
bool has_vertex_buffers; /* needs vertex buffers and base/start 
*/
@@ -158,6 +159,10 @@ struct radv_shader_info {
bool uses_thread_id[3];
bool uses_local_invocation_idx;
} cs;
+   struct {
+   uint64_t outputs_written;
+   uint64_t patch_outputs_written;
+   } tcs;
 };
 
 struct radv_userdata_info {
diff --git a/src/amd/vulkan/radv_shader_info.c 
b/src/amd/vulkan/radv_shader_info.c
index 3cce0c2f6e4..ded3281516d 100644
--- a/src/amd/vulkan/radv_shader_info.c
+++ b/src/amd/vulkan/radv_shader_info.c
@@ -30,6 +30,23 @@ static void mark_sampler_desc(const nir_variable *var,
info->desc_set_used_mask |= (1 << var->data.descriptor_set);
 }
 
+static void mark_ls_output(struct radv_shader_info *info,
+  uint32_t param, int num_slots)
+{
+   uint64_t mask = (1ull << num_slots) - 1ull;
+   info->vs.ls_outputs_written |= (mask << param);
+}
+
+static void mark_tess_output(struct radv_shader_info *info,
+bool is_patch, uint32_t param, int num_slots)
+{
+   uint64_t mask = (1ull << num_slots) - 1ull;
+   if (is_patch)
+   info->tcs.patch_outputs_written |= (mask << param);
+   else
+   info->tcs.outputs_written |= (mask << param);
+}
+
 static void
 gather_intrinsic_info(const nir_shader *nir, const nir_intrinsic_instr *instr,
  struct radv_shader_info *info)
@@ -162,6 +179,17 @@ gather_intrinsic_info(const nir_shader *nir, const 
nir_intrinsic_instr *instr,
} else if (nir->info.stage == MESA_SHADER_TESS_EVAL) {
info->tes.output_usage_mask[idx] |=
instr->const_index[0] << comp;
+   } else if (nir->info.stage == MESA_SHADER_TESS_CTRL) {
+   unsigned param = 
shader_io_get_unique_index(idx);
+   const struct glsl_type *type = var->type;
+   if (!var->data.patch)
+   type = 
glsl_get_array_element(var->type);
+   unsigned slots =
+   var->data.compact ? 
DIV_ROUND_UP(glsl_get_length(type), 4)
+   : glsl_count_attribute_slots(type, 
false);
+   if (idx == VARYING_SLOT_CLIP_DIST0)
+   slots = 
(nir->info.clip_distance_array_size + nir->info.cull_distance_array_size > 4) ? 
2 : 1;
+   mark_tess_output(info, var->data.patch, param, 
slots);
}
}
break;
@@ -252,6 +280,18 @@ gather_info_input_decl(const nir_shader *nir, const 
nir_variable *var,
}
 }
 
+static void
+gather_info_output_decl_ls(const nir_shader *nir, const nir_variable *var,
+  struct radv_shader_info *info)
+{
+   int idx = var->data.location;
+   unsigned param = shader_io_get_unique_index(idx);
+   int num_slots = glsl_count_attribute_slots(var->type, false);
+   if (idx == VARYING_SLOT_CLIP_DIST0)
+   num_slots = (nir->info.clip_distance_array_size + 
nir->info.cull_distance_array_size > 4) ? 2 : 1;
+   mark_ls_output(info, param, num_slots);
+}
+
 static void
 gather_info_output_decl_ps(const nir_shader *nir, const nir_variable *var,
   struct radv_shader_info *info)
@@ -275,12 +315,17 @@ gather_info_output_decl_ps(const nir_shader *nir, const 
nir_variable *var,
 
 static void
 gather_info_output_decl(const nir_shader *nir, const nir_variable *var,
-   struct radv_shader_info *info)

[Mesa-dev] [PATCH 03/14] radv: drop ls_out_layout const.

[Dave Airlie]

From: Dave Airlie 

We can precalculate input_vertex_size at compile time.

Signed-off-by: Dave Airlie 
---
 src/amd/vulkan/radv_nir_to_llvm.c | 30 --
 src/amd/vulkan/radv_pipeline.c| 10 --
 src/amd/vulkan/radv_shader.h  |  1 -
 3 files changed, 4 insertions(+), 37 deletions(-)

diff --git a/src/amd/vulkan/radv_nir_to_llvm.c 
b/src/amd/vulkan/radv_nir_to_llvm.c
index 89ad1341a86..64b50cab0a1 100644
--- a/src/amd/vulkan/radv_nir_to_llvm.c
+++ b/src/amd/vulkan/radv_nir_to_llvm.c
@@ -60,7 +60,6 @@ struct radv_shader_context {
LLVMValueRef vertex_buffers;
LLVMValueRef rel_auto_id;
LLVMValueRef vs_prim_id;
-   LLVMValueRef ls_out_layout;
LLVMValueRef es2gs_offset;
 
LLVMValueRef tcs_offchip_layout;
@@ -162,14 +161,8 @@ static LLVMValueRef get_rel_patch_id(struct 
radv_shader_context *ctx)
 static LLVMValueRef
 get_tcs_in_patch_stride(struct radv_shader_context *ctx)
 {
-   if (ctx->stage == MESA_SHADER_VERTEX)
-   return ac_unpack_param(>ac, ctx->ls_out_layout, 0, 13);
-   else if (ctx->stage == MESA_SHADER_TESS_CTRL)
-   return ac_unpack_param(>ac, ctx->tcs_in_layout, 0, 13);
-   else {
-   assert(0);
-   return NULL;
-   }
+   assert (ctx->stage == MESA_SHADER_TESS_CTRL);
+   return ac_unpack_param(>ac, ctx->tcs_in_layout, 0, 13);
 }
 
 static LLVMValueRef
@@ -463,14 +456,11 @@ static void allocate_user_sgprs(struct 
radv_shader_context *ctx,
case MESA_SHADER_VERTEX:
if (!ctx->is_gs_copy_shader)
user_sgpr_info->sgpr_count += count_vs_user_sgprs(ctx);
-   if (ctx->options->key.vs.as_ls)
-   user_sgpr_info->sgpr_count++;
break;
case MESA_SHADER_TESS_CTRL:
if (has_previous_stage) {
if (previous_stage == MESA_SHADER_VERTEX)
user_sgpr_info->sgpr_count += 
count_vs_user_sgprs(ctx);
-   user_sgpr_info->sgpr_count++;
}
user_sgpr_info->sgpr_count += 4;
break;
@@ -743,9 +733,6 @@ static void create_function(struct radv_shader_context *ctx,
if (ctx->options->key.vs.as_es)
add_arg(, ARG_SGPR, ctx->ac.i32,
>es2gs_offset);
-   else if (ctx->options->key.vs.as_ls)
-   add_arg(, ARG_SGPR, ctx->ac.i32,
-   >ls_out_layout);
 
declare_vs_input_vgprs(ctx, );
break;
@@ -771,9 +758,6 @@ static void create_function(struct radv_shader_context *ctx,
has_previous_stage,
previous_stage, );
 
-   add_arg(, ARG_SGPR, ctx->ac.i32,
-   >ls_out_layout);
-
add_arg(, ARG_SGPR, ctx->ac.i32,
>tcs_offchip_layout);
add_arg(, ARG_SGPR, ctx->ac.i32,
@@ -1011,17 +995,10 @@ static void create_function(struct radv_shader_context 
*ctx,
   previous_stage, _sgpr_idx);
if (ctx->abi.view_index)
set_loc_shader(ctx, AC_UD_VIEW_INDEX, _sgpr_idx, 
1);
-   if (ctx->options->key.vs.as_ls) {
-   set_loc_shader(ctx, AC_UD_VS_LS_TCS_IN_LAYOUT,
-  _sgpr_idx, 1);
-   }
break;
case MESA_SHADER_TESS_CTRL:
set_vs_specific_input_locs(ctx, stage, has_previous_stage,
   previous_stage, _sgpr_idx);
-   if (has_previous_stage)
-   set_loc_shader(ctx, AC_UD_VS_LS_TCS_IN_LAYOUT,
-  _sgpr_idx, 1);
set_loc_shader(ctx, AC_UD_TCS_OFFCHIP_LAYOUT, _sgpr_idx, 
4);
if (ctx->abi.view_index)
set_loc_shader(ctx, AC_UD_VIEW_INDEX, _sgpr_idx, 
1);
@@ -2411,7 +2388,8 @@ static void
 handle_ls_outputs_post(struct radv_shader_context *ctx)
 {
LLVMValueRef vertex_id = ctx->rel_auto_id;
-   LLVMValueRef vertex_dw_stride = ac_unpack_param(>ac, 
ctx->ls_out_layout, 13, 8);
+   uint32_t num_tcs_inputs = 
util_last_bit64(ctx->shader_info->info.vs.ls_outputs_written);
+   LLVMValueRef vertex_dw_stride = LLVMConstInt(ctx->ac.i32, 
num_tcs_inputs * 4, false);
LLVMValueRef base_dw_addr = LLVMBuildMul(ctx->ac.builder, vertex_id,
 vertex_dw_stride, "");
 
diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index e02e06505e4..6d175169343 100644
--- a/src/amd/vulkan/radv_pipeline.c
+++ 

[Mesa-dev] [PATCH 07/14] radv: drop tess offchip layout for tcs.

[Dave Airlie]

From: Dave Airlie 

This removes the last TCS specific user sgpr.

Signed-off-by: Dave Airlie 
---
 src/amd/vulkan/radv_nir_to_llvm.c | 116 +-
 src/amd/vulkan/radv_pipeline.c|   9 ---
 src/amd/vulkan/radv_shader.c  |   2 +-
 src/amd/vulkan/radv_shader.h  |   2 +-
 4 files changed, 90 insertions(+), 39 deletions(-)

diff --git a/src/amd/vulkan/radv_nir_to_llvm.c 
b/src/amd/vulkan/radv_nir_to_llvm.c
index 8414247b54a..4bdc0e6e9ec 100644
--- a/src/amd/vulkan/radv_nir_to_llvm.c
+++ b/src/amd/vulkan/radv_nir_to_llvm.c
@@ -106,6 +106,7 @@ struct radv_shader_context {
uint64_t tcs_outputs_read;
uint32_t tcs_vertices_per_patch;
uint32_t tcs_num_inputs;
+   uint32_t tcs_num_patches;
 };
 
 enum radeon_llvm_calling_convention {
@@ -136,6 +137,46 @@ static LLVMValueRef get_rel_patch_id(struct 
radv_shader_context *ctx)
}
 }
 
+static unsigned
+get_tcs_num_patches(struct radv_shader_context *ctx)
+{
+   unsigned num_tcs_input_cp = ctx->options->key.tcs.input_vertices;
+   unsigned num_tcs_output_cp = ctx->tcs_vertices_per_patch;
+   uint32_t input_vertex_size = ctx->tcs_num_inputs * 16;
+   uint32_t input_patch_size = ctx->options->key.tcs.input_vertices * 
input_vertex_size;
+   uint32_t num_tcs_outputs = 
util_last_bit64(ctx->shader_info->info.tcs.outputs_written);
+   uint32_t num_tcs_patch_outputs = 
util_last_bit64(ctx->shader_info->info.tcs.patch_outputs_written);
+   uint32_t output_vertex_size = num_tcs_outputs * 16;
+   uint32_t pervertex_output_patch_size = ctx->tcs_vertices_per_patch * 
output_vertex_size;
+   uint32_t output_patch_size = pervertex_output_patch_size + 
num_tcs_patch_outputs * 16;
+   unsigned num_patches;
+   unsigned hardware_lds_size;
+
+   /* Ensure that we only need one wave per SIMD so we don't need to check
+* resource usage. Also ensures that the number of tcs in and out
+* vertices per threadgroup are at most 256.
+*/
+   num_patches = 64 / MAX2(num_tcs_input_cp, num_tcs_output_cp) * 4;
+   /* Make sure that the data fits in LDS. This assumes the shaders only
+* use LDS for the inputs and outputs.
+*/
+   hardware_lds_size = ctx->options->chip_class >= CIK ? 65536 : 32768;
+   num_patches = MIN2(num_patches, hardware_lds_size / (input_patch_size + 
output_patch_size));
+   /* Make sure the output data fits in the offchip buffer */
+   num_patches = MIN2(num_patches, 
(ctx->options->tess_offchip_block_dw_size * 4) / output_patch_size);
+   /* Not necessary for correctness, but improves performance. The
+* specific value is taken from the proprietary driver.
+*/
+   num_patches = MIN2(num_patches, 40);
+
+   /* SI bug workaround - limit LS-HS threadgroups to only one wave. */
+   if (ctx->options->chip_class == SI) {
+   unsigned one_wave = 64 / MAX2(num_tcs_input_cp, 
num_tcs_output_cp);
+   num_patches = MIN2(num_patches, one_wave);
+   }
+   return num_patches;
+}
+
 /* Tessellation shaders pass outputs to the next shader using LDS.
  *
  * LS outputs = TCS inputs
@@ -195,17 +236,17 @@ get_tcs_out_patch0_offset(struct radv_shader_context *ctx)
uint32_t input_vertex_size = ctx->tcs_num_inputs * 16;
uint32_t input_patch_size = ctx->options->key.tcs.input_vertices * 
input_vertex_size;
uint32_t output_patch0_offset = input_patch_size;
-   LLVMValueRef num_patches = ac_unpack_param(>ac, 
ctx->tcs_offchip_layout, 0, 9);
+   unsigned num_patches = ctx->tcs_num_patches;
 
+   output_patch0_offset *= num_patches;
output_patch0_offset /= 4;
-   return LLVMBuildMul(ctx->ac.builder,
-   num_patches,
-   LLVMConstInt(ctx->ac.i32, output_patch0_offset, 
false), "");
+   return LLVMConstInt(ctx->ac.i32, output_patch0_offset, false);
 }
 
 static LLVMValueRef
 get_tcs_out_patch0_patch_data_offset(struct radv_shader_context *ctx)
 {
+   assert (ctx->stage == MESA_SHADER_TESS_CTRL);
uint32_t input_vertex_size = ctx->tcs_num_inputs * 16;
uint32_t input_patch_size = ctx->options->key.tcs.input_vertices * 
input_vertex_size;
uint32_t output_patch0_offset = input_patch_size;
@@ -213,15 +254,12 @@ get_tcs_out_patch0_patch_data_offset(struct 
radv_shader_context *ctx)
uint32_t num_tcs_outputs = 
util_last_bit64(ctx->shader_info->info.tcs.outputs_written);
uint32_t output_vertex_size = num_tcs_outputs * 16;
uint32_t pervertex_output_patch_size = ctx->tcs_vertices_per_patch * 
output_vertex_size;
-   LLVMValueRef num_patches = ac_unpack_param(>ac, 
ctx->tcs_offchip_layout, 0, 9);
+   unsigned num_patches = ctx->tcs_num_patches;
 
+   output_patch0_offset *= num_patches;
+   output_patch0_offset += pervertex_output_patch_size;

[Mesa-dev] [PATCH 05/14] radv: drop tcs_out_layout

[Dave Airlie]

From: Dave Airlie 

Move all calculations to shader generation.

Signed-off-by: Dave Airlie 
---
 src/amd/vulkan/radv_nir_to_llvm.c | 22 +-
 src/amd/vulkan/radv_pipeline.c|  8 ++--
 2 files changed, 15 insertions(+), 15 deletions(-)

diff --git a/src/amd/vulkan/radv_nir_to_llvm.c 
b/src/amd/vulkan/radv_nir_to_llvm.c
index ee32549bde6..ad165f17cf0 100644
--- a/src/amd/vulkan/radv_nir_to_llvm.c
+++ b/src/amd/vulkan/radv_nir_to_llvm.c
@@ -64,7 +64,6 @@ struct radv_shader_context {
 
LLVMValueRef tcs_offchip_layout;
LLVMValueRef tcs_out_offsets;
-   LLVMValueRef tcs_out_layout;
LLVMValueRef oc_lds;
LLVMValueRef merged_wave_info;
LLVMValueRef tess_factor_offset;
@@ -172,13 +171,22 @@ get_tcs_in_patch_stride(struct radv_shader_context *ctx)
 static LLVMValueRef
 get_tcs_out_patch_stride(struct radv_shader_context *ctx)
 {
-   return ac_unpack_param(>ac, ctx->tcs_out_layout, 0, 13);
+   uint32_t num_tcs_outputs = 
util_last_bit64(ctx->shader_info->info.tcs.outputs_written);
+   uint32_t num_tcs_patch_outputs = 
util_last_bit64(ctx->shader_info->info.tcs.patch_outputs_written);
+   uint32_t output_vertex_size = num_tcs_outputs * 16;
+   uint32_t pervertex_output_patch_size = ctx->tcs_vertices_per_patch * 
output_vertex_size;
+   uint32_t output_patch_size = pervertex_output_patch_size + 
num_tcs_patch_outputs * 16;
+   output_patch_size /= 4;
+   return LLVMConstInt(ctx->ac.i32, output_patch_size, false);
 }
 
 static LLVMValueRef
 get_tcs_out_vertex_stride(struct radv_shader_context *ctx)
 {
-   return ac_unpack_param(>ac, ctx->tcs_out_layout, 13, 8);
+   uint32_t num_tcs_outputs = 
util_last_bit64(ctx->shader_info->info.tcs.outputs_written);
+   uint32_t output_vertex_size = num_tcs_outputs * 16;
+   output_vertex_size /= 4;
+   return LLVMConstInt(ctx->ac.i32, output_vertex_size, false);
 }
 
 static LLVMValueRef
@@ -466,7 +474,7 @@ static void allocate_user_sgprs(struct radv_shader_context 
*ctx,
if (previous_stage == MESA_SHADER_VERTEX)
user_sgpr_info->sgpr_count += 
count_vs_user_sgprs(ctx);
}
-   user_sgpr_info->sgpr_count += 3;
+   user_sgpr_info->sgpr_count += 2;
break;
case MESA_SHADER_TESS_EVAL:
user_sgpr_info->sgpr_count += 1;
@@ -766,8 +774,6 @@ static void create_function(struct radv_shader_context *ctx,
>tcs_offchip_layout);
add_arg(, ARG_SGPR, ctx->ac.i32,
>tcs_out_offsets);
-   add_arg(, ARG_SGPR, ctx->ac.i32,
-   >tcs_out_layout);
if (needs_view_index)
add_arg(, ARG_SGPR, ctx->ac.i32,
>abi.view_index);
@@ -789,8 +795,6 @@ static void create_function(struct radv_shader_context *ctx,
>tcs_offchip_layout);
add_arg(, ARG_SGPR, ctx->ac.i32,
>tcs_out_offsets);
-   add_arg(, ARG_SGPR, ctx->ac.i32,
-   >tcs_out_layout);
if (needs_view_index)
add_arg(, ARG_SGPR, ctx->ac.i32,
>abi.view_index);
@@ -999,7 +1003,7 @@ static void create_function(struct radv_shader_context 
*ctx,
case MESA_SHADER_TESS_CTRL:
set_vs_specific_input_locs(ctx, stage, has_previous_stage,
   previous_stage, _sgpr_idx);
-   set_loc_shader(ctx, AC_UD_TCS_OFFCHIP_LAYOUT, _sgpr_idx, 
3);
+   set_loc_shader(ctx, AC_UD_TCS_OFFCHIP_LAYOUT, _sgpr_idx, 
2);
if (ctx->abi.view_index)
set_loc_shader(ctx, AC_UD_VIEW_INDEX, _sgpr_idx, 
1);
break;
diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index 557d5ec58b3..01808cc3f55 100644
--- a/src/amd/vulkan/radv_pipeline.c
+++ b/src/amd/vulkan/radv_pipeline.c
@@ -62,7 +62,6 @@ struct radv_blend_state {
 
 struct radv_tessellation_state {
uint32_t ls_hs_config;
-   uint32_t tcs_out_layout;
uint32_t tcs_out_offsets;
uint32_t offchip_layout;
unsigned num_patches;
@@ -1382,8 +1381,6 @@ calculate_tess_state(struct radv_pipeline *pipeline,
 
tess.lds_size = lds_size;
 
-   tess.tcs_out_layout = (output_patch_size / 4) |
-   ((output_vertex_size / 4) << 13);
tess.tcs_out_offsets = (output_patch0_offset / 16) |
((perpatch_output_offset / 16) << 16);
tess.offchip_layout = (pervertex_output_patch_size * num_patches << 16) 
|
@@ -2615,12 +2612,11 @@ radv_pipeline_generate_tess_shaders(struct 

[Mesa-dev] [PATCH 01/14] radv: migrate unique index info shader info (v2)

[Dave Airlie]

From: Dave Airlie 

This just moves this function to an inline so the shader_info
pass can use it.

v2: use inline (Samuel)

Signed-off-by: Dave Airlie 
---
 src/amd/vulkan/radv_nir_to_llvm.c | 22 --
 src/amd/vulkan/radv_shader.h  | 21 +
 2 files changed, 21 insertions(+), 22 deletions(-)

diff --git a/src/amd/vulkan/radv_nir_to_llvm.c 
b/src/amd/vulkan/radv_nir_to_llvm.c
index d4c99539aab..89ad1341a86 100644
--- a/src/amd/vulkan/radv_nir_to_llvm.c
+++ b/src/amd/vulkan/radv_nir_to_llvm.c
@@ -659,28 +659,6 @@ set_vs_specific_input_locs(struct radv_shader_context *ctx,
}
 }
 
-static unsigned shader_io_get_unique_index(gl_varying_slot slot)
-{
-   /* handle patch indices separate */
-   if (slot == VARYING_SLOT_TESS_LEVEL_OUTER)
-   return 0;
-   if (slot == VARYING_SLOT_TESS_LEVEL_INNER)
-   return 1;
-   if (slot >= VARYING_SLOT_PATCH0 && slot <= VARYING_SLOT_TESS_MAX)
-   return 2 + (slot - VARYING_SLOT_PATCH0);
-
-   if (slot == VARYING_SLOT_POS)
-   return 0;
-   if (slot == VARYING_SLOT_PSIZ)
-   return 1;
-   if (slot == VARYING_SLOT_CLIP_DIST0)
-   return 2;
-   /* 3 is reserved for clip dist as well */
-   if (slot >= VARYING_SLOT_VAR0 && slot <= VARYING_SLOT_VAR31)
-   return 4 + (slot - VARYING_SLOT_VAR0);
-   unreachable("illegal slot in get unique index\n");
-}
-
 static void set_llvm_calling_convention(LLVMValueRef func,
 gl_shader_stage stage)
 {
diff --git a/src/amd/vulkan/radv_shader.h b/src/amd/vulkan/radv_shader.h
index e7478fd56fc..cab0fc43bda 100644
--- a/src/amd/vulkan/radv_shader.h
+++ b/src/amd/vulkan/radv_shader.h
@@ -335,4 +335,25 @@ radv_can_dump_shader_stats(struct radv_device *device,
   module && !module->nir;
 }
 
+static inline unsigned shader_io_get_unique_index(gl_varying_slot slot)
+{
+   /* handle patch indices separate */
+   if (slot == VARYING_SLOT_TESS_LEVEL_OUTER)
+   return 0;
+   if (slot == VARYING_SLOT_TESS_LEVEL_INNER)
+   return 1;
+   if (slot >= VARYING_SLOT_PATCH0 && slot <= VARYING_SLOT_TESS_MAX)
+   return 2 + (slot - VARYING_SLOT_PATCH0);
+   if (slot == VARYING_SLOT_POS)
+   return 0;
+   if (slot == VARYING_SLOT_PSIZ)
+   return 1;
+   if (slot == VARYING_SLOT_CLIP_DIST0)
+   return 2;
+   /* 3 is reserved for clip dist as well */
+   if (slot >= VARYING_SLOT_VAR0 && slot <= VARYING_SLOT_VAR31)
+   return 4 + (slot - VARYING_SLOT_VAR0);
+   unreachable("illegal slot in get unique index\n");
+}
+
 #endif
-- 
2.14.3

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] radv: drop all tess and geometry user sgprs (v2)

[Dave Airlie]

None of the info we were passing from the pipeline into the shaders
via user sgprs for tess/gs was required, this series removes all
user sgprs in favour of calculating the values at compile time.

This is a repost, I've rebased this into radv and hopefully taken
all the comments on board.

Dave.
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] soft fp64 support - main body (glsl/gallium)

[Roland Scheidegger]

Am 13.03.2018 um 05:28 schrieb Dave Airlie:
> On 13 March 2018 at 14:24, Dave Airlie  wrote:
>> This is the main code for the soft fp64 work. It's mostly Elie's
>> code with a bunch of changes by me.
>>
> 
> All the patches are in my tree here, along with some other bits:
> https://cgit.freedesktop.org/~airlied/mesa/log/?h=glsl_arb_gpu_shader_fp64_v4
> 

I've commented on a couple of the actual functions (first 18 patches).
I think in general the code is definitely too branchy, far from optimal
for gpus (or in general for dealing with vector values ultimately).
But, as long as it works, noone cares about performance all that much I
suppose. Someone could optimize it later if really interested...

Roland
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 03/50] glsl: Add "built-in" function to do sign(fp64) (v2)

[Roland Scheidegger]

Am 14.03.2018 um 02:05 schrieb Dave Airlie:
> On 14 March 2018 at 10:46, Roland Scheidegger  wrote:
>> Am 13.03.2018 um 05:24 schrieb Dave Airlie:
>>> From: Elie Tournier 
>>>
>>> v2: use mix.
>>>
>>> Signed-off-by: Elie Tournier 
>>> ---
>>>  src/compiler/glsl/builtin_float64.h | 28 
>>>  src/compiler/glsl/builtin_functions.cpp |  4 
>>>  src/compiler/glsl/builtin_functions.h   |  3 +++
>>>  src/compiler/glsl/float64.glsl  |  9 +
>>>  src/compiler/glsl/glcpp/glcpp-parse.y   |  1 +
>>>  5 files changed, 45 insertions(+)
>>>
>>> diff --git a/src/compiler/glsl/builtin_float64.h 
>>> b/src/compiler/glsl/builtin_float64.h
>>> index 2898fc9..8546048 100644
>>> --- a/src/compiler/glsl/builtin_float64.h
>>> +++ b/src/compiler/glsl/builtin_float64.h
>>> @@ -68,3 +68,31 @@ fneg64(void *mem_ctx, builtin_available_predicate avail)
>>> sig->replace_parameters(_parameters);
>>> return sig;
>>>  }
>>> +ir_function_signature *
>>> +fsign64(void *mem_ctx, builtin_available_predicate avail)
>>> +{
>>> +   ir_function_signature *const sig =
>>> +  new(mem_ctx) ir_function_signature(glsl_type::uvec2_type, avail);
>>> +   ir_factory body(>body, mem_ctx);
>>> +   sig->is_defined = true;
>>> +
>>> +   exec_list sig_parameters;
>>> +
>>> +   ir_variable *const r001D = new(mem_ctx) 
>>> ir_variable(glsl_type::uvec2_type, "a", ir_var_function_in);
>>> +   sig_parameters.push_tail(r001D);
>>> +   ir_variable *const r001E = new(mem_ctx) 
>>> ir_variable(glsl_type::uvec2_type, "retval", ir_var_auto);
>>> +   body.emit(r001E);
>>> +   body.emit(assign(r001E, body.constant(0u), 0x01));
>>> +
>>> +   ir_expression *const r001F = lshift(swizzle_y(r001D), 
>>> body.constant(int(1)));
>>> +   ir_expression *const r0020 = bit_or(r001F, swizzle_x(r001D));
>>> +   ir_expression *const r0021 = equal(r0020, body.constant(0u));
>>> +   ir_expression *const r0022 = bit_and(swizzle_y(r001D), 
>>> body.constant(2147483648u));
>>> +   ir_expression *const r0023 = bit_or(r0022, body.constant(1072693248u));
>>> +   body.emit(assign(r001E, expr(ir_triop_csel, r0021, body.constant(0u), 
>>> r0023), 0x02));
>>> +
>>> +   body.emit(ret(r001E));
>>> +
>>> +   sig->replace_parameters(_parameters);
>>> +   return sig;
>>> +}
>>> diff --git a/src/compiler/glsl/builtin_functions.cpp 
>>> b/src/compiler/glsl/builtin_functions.cpp
>>> index 9d88a31..17aa868 100644
>>> --- a/src/compiler/glsl/builtin_functions.cpp
>>> +++ b/src/compiler/glsl/builtin_functions.cpp
>>> @@ -3350,6 +3350,10 @@ builtin_builder::create_builtins()
>>>  generate_ir::fneg64(mem_ctx, integer_functions_supported),
>>>  NULL);
>>>
>>> +   add_function("__builtin_fsign64",
>>> +generate_ir::fsign64(mem_ctx, integer_functions_supported),
>>> +NULL);
>>> +
>>>  #undef F
>>>  #undef FI
>>>  #undef FIUD_VEC
>>> diff --git a/src/compiler/glsl/builtin_functions.h 
>>> b/src/compiler/glsl/builtin_functions.h
>>> index adec424..7954373 100644
>>> --- a/src/compiler/glsl/builtin_functions.h
>>> +++ b/src/compiler/glsl/builtin_functions.h
>>> @@ -73,6 +73,9 @@ fabs64(void *mem_ctx, builtin_available_predicate avail);
>>>  ir_function_signature *
>>>  fneg64(void *mem_ctx, builtin_available_predicate avail);
>>>
>>> +ir_function_signature *
>>> +fsign64(void *mem_ctx, builtin_available_predicate avail);
>>> +
>>>  }
>>>
>>>  #endif /* BULITIN_FUNCTIONS_H */
>>> diff --git a/src/compiler/glsl/float64.glsl b/src/compiler/glsl/float64.glsl
>>> index fedf8b7..f8eb1f3 100644
>>> --- a/src/compiler/glsl/float64.glsl
>>> +++ b/src/compiler/glsl/float64.glsl
>>> @@ -51,3 +51,12 @@ fneg64(uvec2 a)
>>> a.y = mix(t, a.y, is_nan(a));
>>> return a;
>>>  }
>>> +
>>
>> I think a function comment indicating what this returns would be quite
>> useful here(I had to look quite a long time at it to realize it returns
>> -1.0/1.0/0.0 depending on sign).
> 
> https://urldefense.proofpoint.com/v2/url?u=https-3A__www.khronos.org_registry_OpenGL-2DRefpages_gl4_html_sign.xhtml=DwIBaQ=uilaK90D4TOVoH58JNXRgQ=_QIjpv-UJ77xEQY8fIYoQtr5qv8wKrPJc7v7_-CYAb0=Kns1o3xPVFZHOhv63qzz5Cn5wzC5m_iNjS_DTEbzrQc=aPXd-t5FNI5Yn81XRndV6DRubU9vz3psCz2hmAJMmRo=
> 
>
Yes, but you should still do a function comment. You do it for the other
functions as well, after all.

Roland

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 15/50] glsl: Add "built-in" functions to do sqrt(fp64)

[Roland Scheidegger]

Am 13.03.2018 um 05:24 schrieb Dave Airlie:
> From: Elie Tournier 
> 
> This currently uses fp64->fp32, sqrt(fp32), fp32->fp64.
> 
> [airlied: The code is include from soft float for doing proper sqrt64
> but it needs to be decided if we need to pursue this and
> how to optimise it better.]
> 
> Signed-off-by: Elie Tournier 
> ---
>  src/compiler/glsl/builtin_float64.h | 393 
> 
>  src/compiler/glsl/builtin_functions.cpp |   4 +
>  src/compiler/glsl/builtin_functions.h   |   3 +
>  src/compiler/glsl/float64.glsl  | 275 ++
>  src/compiler/glsl/glcpp/glcpp-parse.y   |   1 +
>  5 files changed, 676 insertions(+)
> 
> diff --git a/src/compiler/glsl/builtin_float64.h 
> b/src/compiler/glsl/builtin_float64.h
> index 034d2d0..6fbe12d 100644
> --- a/src/compiler/glsl/builtin_float64.h
> +++ b/src/compiler/glsl/builtin_float64.h
> @@ -6242,3 +6242,396 @@ fp32_to_fp64(void *mem_ctx, 
> builtin_available_predicate avail)
> sig->replace_parameters(_parameters);
> return sig;
>  }
> +ir_function_signature *
> +fsqrt64(void *mem_ctx, builtin_available_predicate avail)
> +{
> +   ir_function_signature *const sig =
> +  new(mem_ctx) ir_function_signature(glsl_type::uvec2_type, avail);
> +   ir_factory body(>body, mem_ctx);
> +   sig->is_defined = true;
> +
> +   exec_list sig_parameters;
> +
> +   ir_variable *const r09A9 = new(mem_ctx) 
> ir_variable(glsl_type::uvec2_type, "a", ir_var_function_in);
> +   sig_parameters.push_tail(r09A9);
> +   ir_variable *const r09AA = body.make_temp(glsl_type::uvec2_type, "a");
> +   body.emit(assign(r09AA, r09A9, 0x03));
> +
> +   ir_variable *const r09AB = body.make_temp(glsl_type::float_type, 
> "return_value");
> +   ir_variable *const r09AC = body.make_temp(glsl_type::uint_type, 
> "extractFloat64FracHi_retval");
> +   body.emit(assign(r09AC, bit_and(swizzle_y(r09A9), 
> body.constant(1048575u)), 0x01));
> +
> +   ir_variable *const r09AD = body.make_temp(glsl_type::int_type, 
> "extractFloat64Exp_retval");
> +   ir_expression *const r09AE = rshift(swizzle_y(r09A9), 
> body.constant(int(20)));
> +   ir_expression *const r09AF = bit_and(r09AE, body.constant(2047u));
> +   body.emit(assign(r09AD, expr(ir_unop_u2i, r09AF), 0x01));
> +
> +   ir_variable *const r09B0 = body.make_temp(glsl_type::uint_type, 
> "extractFloat64Sign_retval");
> +   body.emit(assign(r09B0, rshift(swizzle_y(r09A9), body.constant(int(31))), 
> 0x01));
> +
> +   /* IF CONDITION */
> +   ir_expression *const r09B2 = equal(r09AD, body.constant(int(2047)));
> +   ir_if *f09B1 = new(mem_ctx) ir_if(operand(r09B2).val);
> +   exec_list *const f09B1_parent_instructions = body.instructions;
> +
> +  /* THEN INSTRUCTIONS */
> +  body.instructions = >then_instructions;
> +
> +  ir_variable *const r09B3 = new(mem_ctx) 
> ir_variable(glsl_type::float_type, "rval", ir_var_auto);
> +  body.emit(r09B3);
> +  ir_expression *const r09B4 = lshift(swizzle_y(r09A9), 
> body.constant(int(12)));
> +  ir_expression *const r09B5 = rshift(swizzle_x(r09A9), 
> body.constant(int(20)));
> +  body.emit(assign(r09AA, bit_or(r09B4, r09B5), 0x02));
> +
> +  body.emit(assign(r09AA, lshift(swizzle_x(r09A9), 
> body.constant(int(12))), 0x01));
> +
> +  ir_expression *const r09B6 = lshift(r09B0, body.constant(int(31)));
> +  ir_expression *const r09B7 = bit_or(r09B6, body.constant(2143289344u));
> +  ir_expression *const r09B8 = rshift(swizzle_y(r09AA), 
> body.constant(int(9)));
> +  ir_expression *const r09B9 = bit_or(r09B7, r09B8);
> +  body.emit(assign(r09B3, expr(ir_unop_bitcast_u2f, r09B9), 0x01));
> +
> +  ir_variable *const r09BA = body.make_temp(glsl_type::float_type, 
> "mix_retval");
> +  ir_expression *const r09BB = bit_or(r09AC, swizzle_x(r09A9));
> +  ir_expression *const r09BC = nequal(r09BB, body.constant(0u));
> +  ir_expression *const r09BD = lshift(r09B0, body.constant(int(31)));
> +  ir_expression *const r09BE = add(r09BD, body.constant(2139095040u));
> +  ir_expression *const r09BF = expr(ir_unop_bitcast_u2f, r09BE);
> +  body.emit(assign(r09BA, expr(ir_triop_csel, r09BC, r09B3, r09BF), 
> 0x01));
> +
> +  body.emit(assign(r09B3, r09BA, 0x01));
> +
> +  body.emit(assign(r09AB, r09BA, 0x01));
> +
> +
> +  /* ELSE INSTRUCTIONS */
> +  body.instructions = >else_instructions;
> +
> +  ir_variable *const r09C0 = body.make_temp(glsl_type::uint_type, 
> "mix_retval");
> +  ir_expression *const r09C1 = lshift(r09AC, body.constant(int(10)));
> +  ir_expression *const r09C2 = rshift(swizzle_x(r09A9), 
> body.constant(int(22)));
> +  ir_expression *const r09C3 = bit_or(r09C1, r09C2);
> +  ir_expression *const r09C4 = lshift(swizzle_x(r09A9), 
> body.constant(int(10)));
> +  ir_expression *const r09C5 = nequal(r09C4, body.constant(0u));
> +  ir_expression *const r09C6 = expr(ir_unop_b2i, 

Re: [Mesa-dev] [PATCH 2/2] fixup! dri3: allow building against older xcb (v3)

[Dylan Baker]

Wrap it in parens and it can span multiple lines

On March 13, 2018 5:40:15 PM PDT, Rob Clark  wrote:
>On Tue, Mar 13, 2018 at 7:47 PM, Rob Clark  wrote:
>> On Tue, Mar 13, 2018 at 7:27 PM, Rob Clark 
>wrote:
>>> On Tue, Mar 13, 2018 at 7:10 PM, Dylan Baker 
>wrote:
 Quoting Rob Clark (2018-03-13 16:04:00)
> ---
> I'm a bit unsure about the xcb-present version dependency, as that
>was
> added in a different commit.  OTOH I guess Dave is building vulkan
>with
> his patch so it is perhaps not a built-time dependency.
>
>  meson.build | 11 ---
>  1 file changed, 8 insertions(+), 3 deletions(-)
>
> diff --git a/meson.build b/meson.build
> index c201644c372..30f1919e6f5 100644
> --- a/meson.build
> +++ b/meson.build
> @@ -1235,9 +1235,14 @@ if with_platform_x11
>  dep_xcb_dri2 = dependency('xcb-dri2', version : '>= 1.8')
>
>  if with_dri3
> -  pre_args += ['-DHAVE_DRI3', '-DHAVE_DRI3_MODIFIERS']
> -  dep_xcb_dri3 = dependency('xcb-dri3', version : '>= 1.13')
> -  dep_xcb_present = dependency('xcb-present', version: '>=
>1.13')
> +  pre_args += '-DHAVE_DRI3'
> +  dep_xcb_dri3 = dependency('xcb-dri3')
> +  dep_xcb_present = dependency('xcb-present')
> +  # until xcb-dri3 has been around long enough to make a
>hard-dependency:
> +  dep_xcb_dri3_modifiers = dependency('xcb-dri3', version :
>'>= 1.13', required : false)
> +  if dep_xcb_dri3_modifiers.found()

 I think you could simplify this by doing:

  if dep_xcb_dri3.version().version_compare('>= 1.13')
>>>
>>> ahh, yeah, and I guess that will get rid of the confusing error msg
>>> about xcb-dri3 1.13 not found..
>>>
>>>

 Or should we be checking for xcb_dri3 and xcb_present >= 1.13?
>>>
>>> I'm not entirely sure why we were checking for xcb-present >= 1.13..
>>> if that is actually a build time requirement then I think Dave's
>>> initial patch needs some more ifdef..  (but otoh, if it was, I guess
>>> he would have noticed.)
>>>
>>> Anyways, I did a build w/ anv+radv enabled with xcb-present == 1.12
>>> (and xcb-dri3 1.12).. and 61309c2a727d52d543207d6ae79fcb3e68b5cff3
>>> looks like it just cares about >= 1.12 of both of those (although
>not
>>> sure if it is a compile time dependency).
>>>
>>> So *possibly* for both meson and autotools we should require 1.12,
>and
>>> optionally 1.13 for HAVE_DRI3_MODIFIERS?
>>>
>>
>> so mystery solved, Dave #ifdef'd out the present dependencies too ;-)
>>
>> so this is what I end up with:
>>
>> @@ -1235,9 +1235,14 @@ if with_platform_x11
>>  dep_xcb_dri2 = dependency('xcb-dri2', version : '>= 1.8')
>>
>>  if with_dri3
>> -  pre_args += ['-DHAVE_DRI3', '-DHAVE_DRI3_MODIFIERS']
>> -  dep_xcb_dri3 = dependency('xcb-dri3', version : '>= 1.13')
>> -  dep_xcb_present = dependency('xcb-present', version: '>=
>1.13')
>> +  pre_args += '-DHAVE_DRI3'
>> +  dep_xcb_dri3 = dependency('xcb-dri3')
>> +  dep_xcb_present = dependency('xcb-present')
>> +  # until xcb-dri3 has been around long enough to make a
>hard-dependency:
>> +  if dep_xcb_dri3.version().version_compare('>= 1.13') and
>> + dep_xcb_present.version().version_compare('>= 1.13')
>
>hmm, annoyingly enough I found that on rawhide (meson 0.45.0), I seem
>to need the entire if statement on a single line, instead of split in
>two like this.
>
>BR,
>-R
>
>> +pre_args += '-DHAVE_DRI3_MODIFIERS'
>> +  endif
>>dep_xcb_sync = dependency('xcb-sync')
>>dep_xshmfence = dependency('xshmfence', version : '>= 1.1')
>>  endif
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 2/2] configure.ac: require libdrm_amdgpu 2.4.91

[Dylan Baker]

Does meson need the same change? 

On March 13, 2018 6:03:18 PM PDT, "Marek Olšák"  wrote:
>From: Marek Olšák 
>
>Since 2.4.90 might not work, just ask for the next version.
>---
> configure.ac | 9 +
> 1 file changed, 1 insertion(+), 8 deletions(-)
>
>diff --git a/configure.ac b/configure.ac
>index e29ce68..8ec5b26 100644
>--- a/configure.ac
>+++ b/configure.ac
>@@ -67,21 +67,21 @@ OPENCL_VERSION=1
> AC_SUBST([OPENCL_VERSION])
> 
> # The idea is that libdrm is distributed as one cohesive package, even
> # though it is composed of multiple libraries. However some drivers
> # may have different version requirements than others. This list
> # codifies which drivers need which version of libdrm. Any libdrm
> # version dependencies in non-driver-specific code should be reflected
> # in the first entry.
> LIBDRM_REQUIRED=2.4.75
> LIBDRM_RADEON_REQUIRED=2.4.71
>-LIBDRM_AMDGPU_REQUIRED=2.4.90
>+LIBDRM_AMDGPU_REQUIRED=2.4.91
> LIBDRM_INTEL_REQUIRED=2.4.75
> LIBDRM_NVVIEUX_REQUIRED=2.4.66
> LIBDRM_NOUVEAU_REQUIRED=2.4.66
> LIBDRM_FREEDRENO_REQUIRED=2.4.91
> LIBDRM_ETNAVIV_REQUIRED=2.4.82
> 
> dnl Versions for external dependencies
> DRI2PROTO_REQUIRED=2.8
> GLPROTO_REQUIRED=1.4.14
> LIBOMXIL_BELLAGIO_REQUIRED=0.0
>@@ -2601,27 +2601,20 @@ if test -n "$with_gallium_drivers"; then
> radeon_llvm_check $LLVM_REQUIRED_R600 "r600"
> 
> llvm_add_component "asmparser" "r600"
> llvm_add_component "bitreader" "r600"
> fi
> ;;
> xradeonsi)
> HAVE_GALLIUM_RADEONSI=yes
>PKG_CHECK_MODULES([RADEON], [libdrm >= $LIBDRM_RADEON_REQUIRED
>libdrm_radeon >= $LIBDRM_RADEON_REQUIRED])
>PKG_CHECK_MODULES([AMDGPU], [libdrm >= $LIBDRM_AMDGPU_REQUIRED
>libdrm_amdgpu >= $LIBDRM_AMDGPU_REQUIRED])
>-
>-# Blacklist libdrm_amdgpu 2.4.90 because it breaks older
>radeonsi
>-libdrm_version=`pkg-config libdrm_amdgpu --modversion`
>-if test "x$libdrm_version" = x2.4.90; then
>-AC_MSG_ERROR([radeonsi can't use libdrm 2.4.90 due to
>a compatibility issue. Use a newer or older version.])
>-fi
>-
> require_libdrm "radeonsi"
> radeon_llvm_check $LLVM_REQUIRED_RADEONSI "radeonsi"
> if test "x$enable_egl" = xyes; then
> require_basic_egl "radeonsi"
> fi
> ;;
> xnouveau)
> HAVE_GALLIUM_NOUVEAU=yes
>PKG_CHECK_MODULES([NOUVEAU], [libdrm >= $LIBDRM_NOUVEAU_REQUIRED
>libdrm_nouveau >= $LIBDRM_NOUVEAU_REQUIRED])
> require_libdrm "nouveau"
>-- 
>2.7.4
>
>___
>mesa-dev mailing list
>mesa-dev@lists.freedesktop.org
>https://lists.freedesktop.org/mailman/listinfo/mesa-dev
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 06/50] glsl: Add "built-in" functions to do lt(fp64, fp64)

[Roland Scheidegger]

Am 13.03.2018 um 05:24 schrieb Dave Airlie:
> From: Elie Tournier 
> 
> Signed-off-by: Elie Tournier 
> ---
>  src/compiler/glsl/builtin_float64.h | 135 
> 
>  src/compiler/glsl/builtin_functions.cpp |   4 +
>  src/compiler/glsl/builtin_functions.h   |   3 +
>  src/compiler/glsl/float64.glsl  |  42 ++
>  src/compiler/glsl/glcpp/glcpp-parse.y   |   1 +
>  5 files changed, 185 insertions(+)
> 
> diff --git a/src/compiler/glsl/builtin_float64.h 
> b/src/compiler/glsl/builtin_float64.h
> index 6a8afea..f7e613f 100644
> --- a/src/compiler/glsl/builtin_float64.h
> +++ b/src/compiler/glsl/builtin_float64.h
> @@ -218,3 +218,138 @@ extractFloat64Sign(void *mem_ctx, 
> builtin_available_predicate avail)
> sig->replace_parameters(_parameters);
> return sig;
>  }
> +ir_function_signature *
> +lt64(void *mem_ctx, builtin_available_predicate avail)
> +{
> +   ir_function_signature *const sig =
> +  new(mem_ctx) ir_function_signature(glsl_type::bool_type, avail);
> +   ir_factory body(>body, mem_ctx);
> +   sig->is_defined = true;
> +
> +   exec_list sig_parameters;
> +
> +   ir_variable *const r004B = new(mem_ctx) ir_variable(glsl_type::uint_type, 
> "a0", ir_var_function_in);
> +   sig_parameters.push_tail(r004B);
> +   ir_variable *const r004C = new(mem_ctx) ir_variable(glsl_type::uint_type, 
> "a1", ir_var_function_in);
> +   sig_parameters.push_tail(r004C);
> +   ir_variable *const r004D = new(mem_ctx) ir_variable(glsl_type::uint_type, 
> "b0", ir_var_function_in);
> +   sig_parameters.push_tail(r004D);
> +   ir_variable *const r004E = new(mem_ctx) ir_variable(glsl_type::uint_type, 
> "b1", ir_var_function_in);
> +   sig_parameters.push_tail(r004E);
> +   ir_expression *const r004F = less(r004B, r004D);
> +   ir_expression *const r0050 = equal(r004B, r004D);
> +   ir_expression *const r0051 = less(r004C, r004E);
> +   ir_expression *const r0052 = logic_and(r0050, r0051);
> +   ir_expression *const r0053 = logic_or(r004F, r0052);
> +   body.emit(ret(r0053));
> +
> +   sig->replace_parameters(_parameters);
> +   return sig;
> +}
> +ir_function_signature *
> +flt64(void *mem_ctx, builtin_available_predicate avail)
> +{
> +   ir_function_signature *const sig =
> +  new(mem_ctx) ir_function_signature(glsl_type::bool_type, avail);
> +   ir_factory body(>body, mem_ctx);
> +   sig->is_defined = true;
> +
> +   exec_list sig_parameters;
> +
> +   ir_variable *const r0054 = new(mem_ctx) 
> ir_variable(glsl_type::uvec2_type, "a", ir_var_function_in);
> +   sig_parameters.push_tail(r0054);
> +   ir_variable *const r0055 = new(mem_ctx) 
> ir_variable(glsl_type::uvec2_type, "b", ir_var_function_in);
> +   sig_parameters.push_tail(r0055);
> +   ir_variable *const r0056 = body.make_temp(glsl_type::bool_type, 
> "return_value");
> +   ir_variable *const r0057 = new(mem_ctx) ir_variable(glsl_type::bool_type, 
> "isbNaN", ir_var_auto);
> +   body.emit(r0057);
> +   ir_variable *const r0058 = new(mem_ctx) ir_variable(glsl_type::bool_type, 
> "isaNaN", ir_var_auto);
> +   body.emit(r0058);
> +   ir_expression *const r0059 = rshift(swizzle_y(r0054), 
> body.constant(int(20)));
> +   ir_expression *const r005A = bit_and(r0059, body.constant(2047u));
> +   ir_expression *const r005B = expr(ir_unop_u2i, r005A);
> +   ir_expression *const r005C = equal(r005B, body.constant(int(2047)));
> +   ir_expression *const r005D = bit_and(swizzle_y(r0054), 
> body.constant(1048575u));
> +   ir_expression *const r005E = bit_or(r005D, swizzle_x(r0054));
> +   ir_expression *const r005F = nequal(r005E, body.constant(0u));
> +   body.emit(assign(r0058, logic_and(r005C, r005F), 0x01));
> +
> +   ir_expression *const r0060 = rshift(swizzle_y(r0055), 
> body.constant(int(20)));
> +   ir_expression *const r0061 = bit_and(r0060, body.constant(2047u));
> +   ir_expression *const r0062 = expr(ir_unop_u2i, r0061);
> +   ir_expression *const r0063 = equal(r0062, body.constant(int(2047)));
> +   ir_expression *const r0064 = bit_and(swizzle_y(r0055), 
> body.constant(1048575u));
> +   ir_expression *const r0065 = bit_or(r0064, swizzle_x(r0055));
> +   ir_expression *const r0066 = nequal(r0065, body.constant(0u));
> +   body.emit(assign(r0057, logic_and(r0063, r0066), 0x01));
> +
> +   /* IF CONDITION */
> +   ir_expression *const r0068 = logic_or(r0058, r0057);
> +   ir_if *f0067 = new(mem_ctx) ir_if(operand(r0068).val);
> +   exec_list *const f0067_parent_instructions = body.instructions;
> +
> +  /* THEN INSTRUCTIONS */
> +  body.instructions = >then_instructions;
> +
> +  body.emit(assign(r0056, body.constant(false), 0x01));
> +
> +
> +  /* ELSE INSTRUCTIONS */
> +  body.instructions = >else_instructions;
> +
> +  ir_variable *const r0069 = body.make_temp(glsl_type::uint_type, 
> "extractFloat64Sign_retval");
> +  body.emit(assign(r0069, rshift(swizzle_y(r0054), 
> body.constant(int(31))), 0x01));
> +
> +  

Re: [Mesa-dev] [PATCH 2/2] configure.ac: require libdrm_amdgpu 2.4.91

[Marek Olšák]

On Tue, Mar 13, 2018 at 9:15 PM, Mike Lothian  wrote:
> Did you mean to remove the blacklist you added in the previous patch?

Yes. The previous patch is for stable releases only, but it has to go
through master.

Marek
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH v4 1/2] gallium/winsys/kms: Fix possible leak in map/unmap.

[Lepton Wu]

I am fine to add ref count for map pointer but then the code looks a
little complex:
We already have ref count for display target, and it seems most other
drivers don't have a
ref count for map pointer. (I checked dri_sw_displaytarget_map /
gdi_sw_displaytarget_map/hgl_winsys_displaytarget_map
/xlib_displaytarget_map)

If you really want a reference count for map pointer, I will add one.
But I am just feeling that introduce  some unnecessary complex.
Just want to get confirmation before I begin to write code.

Thanks!

On Tue, Mar 13, 2018 at 8:41 AM, Emil Velikov  wrote:
> On 13 March 2018 at 11:46, Tomasz Figa  wrote:
>> On Thu, Mar 8, 2018 at 7:39 AM, Lepton Wu  wrote:
>>> If user calls map twice for kms_sw_displaytarget, the first mapped
>>> buffer could get leaked. Instead of calling mmap every time, just
>>> reuse previous mapping. Since user could map same displaytarget with
>>> different flags, we have to keep two different pointers, one for rw
>>> mapping and one for ro mapping.
>>>
>>> Change-Id: I65308f0ff2640bd57b2577c6a3469540c9722859
>>> Signed-off-by: Lepton Wu 
>>> ---
>>>  .../winsys/sw/kms-dri/kms_dri_sw_winsys.c | 21 ---
>>>  1 file changed, 14 insertions(+), 7 deletions(-)
>>>
>>> diff --git a/src/gallium/winsys/sw/kms-dri/kms_dri_sw_winsys.c 
>>> b/src/gallium/winsys/sw/kms-dri/kms_dri_sw_winsys.c
>>> index 22e1c936ac5..7fc40488c2e 100644
>>> --- a/src/gallium/winsys/sw/kms-dri/kms_dri_sw_winsys.c
>>> +++ b/src/gallium/winsys/sw/kms-dri/kms_dri_sw_winsys.c
>>> @@ -70,6 +70,7 @@ struct kms_sw_displaytarget
>>>
>>> uint32_t handle;
>>> void *mapped;
>>> +   void *ro_mapped;
>>>
>>> int ref_count;
>>> struct list_head link;
>>> @@ -198,16 +199,19 @@ kms_sw_displaytarget_map(struct sw_winsys *ws,
>>>return NULL;
>>>
>>> prot = (flags == PIPE_TRANSFER_READ) ? PROT_READ : (PROT_READ | 
>>> PROT_WRITE);
>>> -   kms_sw_dt->mapped = mmap(0, kms_sw_dt->size, prot, MAP_SHARED,
>>> -kms_sw->fd, map_req.offset);
>>> -
>>> -   if (kms_sw_dt->mapped == MAP_FAILED)
>>> -  return NULL;
>>> +   void **ptr = (flags == PIPE_TRANSFER_READ) ? _sw_dt->ro_mapped : 
>>> _sw_dt->mapped;
>>> +   if (!*ptr) {
>>> +  void *tmp = mmap(0, kms_sw_dt->size, prot, MAP_SHARED,
>>> +   kms_sw->fd, map_req.offset);
>>> +  if (tmp == MAP_FAILED)
>>> + return NULL;
>>> +  *ptr = tmp;
>>> +   }
>>>
>>> DEBUG_PRINT("KMS-DEBUG: mapped buffer %u (size %u) at %p\n",
>>> - kms_sw_dt->handle, kms_sw_dt->size, kms_sw_dt->mapped);
>>> + kms_sw_dt->handle, kms_sw_dt->size, *ptr);
>>>
>>> -   return kms_sw_dt->mapped;
>>> +   return *ptr;
>>>  }
>>>
>>>  static struct kms_sw_displaytarget *
>>> @@ -278,9 +282,12 @@ kms_sw_displaytarget_unmap(struct sw_winsys *ws,
>>> struct kms_sw_displaytarget *kms_sw_dt = kms_sw_displaytarget(dt);
>>>
>>> DEBUG_PRINT("KMS-DEBUG: unmapped buffer %u (was %p)\n", 
>>> kms_sw_dt->handle, kms_sw_dt->mapped);
>>> +   DEBUG_PRINT("KMS-DEBUG: unmapped buffer %u (was %p)\n", 
>>> kms_sw_dt->handle, kms_sw_dt->ro_mapped);
>>>
>>> munmap(kms_sw_dt->mapped, kms_sw_dt->size);
>>> kms_sw_dt->mapped = NULL;
>>> +   munmap(kms_sw_dt->ro_mapped, kms_sw_dt->size);
>>> +   kms_sw_dt->ro_mapped = NULL;
>>>  }
>>
>> If user calls map twice, wouldn't they also call unmap twice?
>> Moreover, wouldn't the pointer be expected to be still valid between
>> first and second unmap?
>>
>> The answer obviously depends on how the API is designed, but i feels
>> really weird being asymmetrical like that. Typically the mapping would
>> be refcounted and maps would have to be balanced with unmaps to free
>> the mapping.
>>
> Valid points.
>
> If you guys prefer we could land 2/2 (multiplane support), since it
> has no dependency of the mapping work.
> And polish out ro/rw mappings (even the leaks) at later stage, as time 
> permits?
>
> -Emil
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 2/2] configure.ac: require libdrm_amdgpu 2.4.91

[Mike Lothian]

Did you mean to remove the blacklist you added in the previous patch?

On Wed, 14 Mar 2018 at 01:03 Marek Olšák  wrote:

> From: Marek Olšák 
>
> Since 2.4.90 might not work, just ask for the next version.
> ---
>  configure.ac | 9 +
>  1 file changed, 1 insertion(+), 8 deletions(-)
>
> diff --git a/configure.ac b/configure.ac
> index e29ce68..8ec5b26 100644
> --- a/configure.ac
> +++ b/configure.ac
> @@ -67,21 +67,21 @@ OPENCL_VERSION=1
>  AC_SUBST([OPENCL_VERSION])
>
>  # The idea is that libdrm is distributed as one cohesive package, even
>  # though it is composed of multiple libraries. However some drivers
>  # may have different version requirements than others. This list
>  # codifies which drivers need which version of libdrm. Any libdrm
>  # version dependencies in non-driver-specific code should be reflected
>  # in the first entry.
>  LIBDRM_REQUIRED=2.4.75
>  LIBDRM_RADEON_REQUIRED=2.4.71
> -LIBDRM_AMDGPU_REQUIRED=2.4.90
> +LIBDRM_AMDGPU_REQUIRED=2.4.91
>  LIBDRM_INTEL_REQUIRED=2.4.75
>  LIBDRM_NVVIEUX_REQUIRED=2.4.66
>  LIBDRM_NOUVEAU_REQUIRED=2.4.66
>  LIBDRM_FREEDRENO_REQUIRED=2.4.91
>  LIBDRM_ETNAVIV_REQUIRED=2.4.82
>
>  dnl Versions for external dependencies
>  DRI2PROTO_REQUIRED=2.8
>  GLPROTO_REQUIRED=1.4.14
>  LIBOMXIL_BELLAGIO_REQUIRED=0.0
> @@ -2601,27 +2601,20 @@ if test -n "$with_gallium_drivers"; then
>  radeon_llvm_check $LLVM_REQUIRED_R600 "r600"
>
>  llvm_add_component "asmparser" "r600"
>  llvm_add_component "bitreader" "r600"
>  fi
>  ;;
>  xradeonsi)
>  HAVE_GALLIUM_RADEONSI=yes
>  PKG_CHECK_MODULES([RADEON], [libdrm >=
> $LIBDRM_RADEON_REQUIRED libdrm_radeon >= $LIBDRM_RADEON_REQUIRED])
>  PKG_CHECK_MODULES([AMDGPU], [libdrm >=
> $LIBDRM_AMDGPU_REQUIRED libdrm_amdgpu >= $LIBDRM_AMDGPU_REQUIRED])
> -
> -# Blacklist libdrm_amdgpu 2.4.90 because it breaks older
> radeonsi
> -libdrm_version=`pkg-config libdrm_amdgpu --modversion`
> -if test "x$libdrm_version" = x2.4.90; then
> -AC_MSG_ERROR([radeonsi can't use libdrm 2.4.90 due to a
> compatibility issue. Use a newer or older version.])
> -fi
> -
>  require_libdrm "radeonsi"
>  radeon_llvm_check $LLVM_REQUIRED_RADEONSI "radeonsi"
>  if test "x$enable_egl" = xyes; then
>  require_basic_egl "radeonsi"
>  fi
>  ;;
>  xnouveau)
>  HAVE_GALLIUM_NOUVEAU=yes
>  PKG_CHECK_MODULES([NOUVEAU], [libdrm >=
> $LIBDRM_NOUVEAU_REQUIRED libdrm_nouveau >= $LIBDRM_NOUVEAU_REQUIRED])
>  require_libdrm "nouveau"
> --
> 2.7.4
>
> ___
> mesa-dev mailing list
> mesa-dev@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/mesa-dev
>
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 04/50] glsl: Add "built-in" functions to do eq(fp64, fp64)

[Roland Scheidegger]

Am 13.03.2018 um 05:24 schrieb Dave Airlie:
> From: Elie Tournier 
> 
> Signed-off-by: Elie Tournier 
> ---
>  src/compiler/glsl/builtin_float64.h | 104 
> 
>  src/compiler/glsl/builtin_functions.cpp |   4 ++
>  src/compiler/glsl/builtin_functions.h   |   3 +
>  src/compiler/glsl/float64.glsl  |  44 ++
>  src/compiler/glsl/glcpp/glcpp-parse.y   |   1 +
>  5 files changed, 156 insertions(+)
> 
> diff --git a/src/compiler/glsl/builtin_float64.h 
> b/src/compiler/glsl/builtin_float64.h
> index 8546048..2340c48 100644
> --- a/src/compiler/glsl/builtin_float64.h
> +++ b/src/compiler/glsl/builtin_float64.h
> @@ -96,3 +96,107 @@ fsign64(void *mem_ctx, builtin_available_predicate avail)
> sig->replace_parameters(_parameters);
> return sig;
>  }
> +ir_function_signature *
> +extractFloat64FracLo(void *mem_ctx, builtin_available_predicate avail)
> +{
> +   ir_function_signature *const sig =
> +  new(mem_ctx) ir_function_signature(glsl_type::uint_type, avail);
> +   ir_factory body(>body, mem_ctx);
> +   sig->is_defined = true;
> +
> +   exec_list sig_parameters;
> +
> +   ir_variable *const r0024 = new(mem_ctx) 
> ir_variable(glsl_type::uvec2_type, "a", ir_var_function_in);
> +   sig_parameters.push_tail(r0024);
> +   ir_swizzle *const r0025 = swizzle_x(r0024);
> +   body.emit(ret(r0025));
> +
> +   sig->replace_parameters(_parameters);
> +   return sig;
> +}
> +ir_function_signature *
> +extractFloat64FracHi(void *mem_ctx, builtin_available_predicate avail)
> +{
> +   ir_function_signature *const sig =
> +  new(mem_ctx) ir_function_signature(glsl_type::uint_type, avail);
> +   ir_factory body(>body, mem_ctx);
> +   sig->is_defined = true;
> +
> +   exec_list sig_parameters;
> +
> +   ir_variable *const r0026 = new(mem_ctx) 
> ir_variable(glsl_type::uvec2_type, "a", ir_var_function_in);
> +   sig_parameters.push_tail(r0026);
> +   ir_expression *const r0027 = bit_and(swizzle_y(r0026), 
> body.constant(1048575u));
> +   body.emit(ret(r0027));
> +
> +   sig->replace_parameters(_parameters);
> +   return sig;
> +}
> +ir_function_signature *
> +extractFloat64Exp(void *mem_ctx, builtin_available_predicate avail)
> +{
> +   ir_function_signature *const sig =
> +  new(mem_ctx) ir_function_signature(glsl_type::int_type, avail);
> +   ir_factory body(>body, mem_ctx);
> +   sig->is_defined = true;
> +
> +   exec_list sig_parameters;
> +
> +   ir_variable *const r0028 = new(mem_ctx) 
> ir_variable(glsl_type::uvec2_type, "a", ir_var_function_in);
> +   sig_parameters.push_tail(r0028);
> +   ir_expression *const r0029 = rshift(swizzle_y(r0028), 
> body.constant(int(20)));
> +   ir_expression *const r002A = bit_and(r0029, body.constant(2047u));
> +   ir_expression *const r002B = expr(ir_unop_u2i, r002A);
> +   body.emit(ret(r002B));
> +
> +   sig->replace_parameters(_parameters);
> +   return sig;
> +}
> +ir_function_signature *
> +feq64(void *mem_ctx, builtin_available_predicate avail)
> +{
> +   ir_function_signature *const sig =
> +  new(mem_ctx) ir_function_signature(glsl_type::bool_type, avail);
> +   ir_factory body(>body, mem_ctx);
> +   sig->is_defined = true;
> +
> +   exec_list sig_parameters;
> +
> +   ir_variable *const r002C = new(mem_ctx) 
> ir_variable(glsl_type::uvec2_type, "a", ir_var_function_in);
> +   sig_parameters.push_tail(r002C);
> +   ir_variable *const r002D = new(mem_ctx) 
> ir_variable(glsl_type::uvec2_type, "b", ir_var_function_in);
> +   sig_parameters.push_tail(r002D);
> +   ir_variable *const r002E = body.make_temp(glsl_type::bool_type, 
> "mix_retval");
> +   ir_expression *const r002F = rshift(swizzle_y(r002C), 
> body.constant(int(20)));
> +   ir_expression *const r0030 = bit_and(r002F, body.constant(2047u));
> +   ir_expression *const r0031 = expr(ir_unop_u2i, r0030);
> +   ir_expression *const r0032 = equal(r0031, body.constant(int(2047)));
> +   ir_expression *const r0033 = bit_and(swizzle_y(r002C), 
> body.constant(1048575u));
> +   ir_expression *const r0034 = bit_or(r0033, swizzle_x(r002C));
> +   ir_expression *const r0035 = nequal(r0034, body.constant(0u));
> +   ir_expression *const r0036 = logic_and(r0032, r0035);
> +   ir_expression *const r0037 = rshift(swizzle_y(r002D), 
> body.constant(int(20)));
> +   ir_expression *const r0038 = bit_and(r0037, body.constant(2047u));
> +   ir_expression *const r0039 = expr(ir_unop_u2i, r0038);
> +   ir_expression *const r003A = equal(r0039, body.constant(int(2047)));
> +   ir_expression *const r003B = bit_and(swizzle_y(r002D), 
> body.constant(1048575u));
> +   ir_expression *const r003C = bit_or(r003B, swizzle_x(r002D));
> +   ir_expression *const r003D = nequal(r003C, body.constant(0u));
> +   ir_expression *const r003E = logic_and(r003A, r003D);
> +   ir_expression *const r003F = logic_or(r0036, r003E);
> +   ir_expression *const r0040 = equal(swizzle_x(r002C), swizzle_x(r002D));
> +   ir_expression *const r0041 

Re: [Mesa-dev] [PATCH 03/50] glsl: Add "built-in" function to do sign(fp64) (v2)

[Dave Airlie]

On 14 March 2018 at 10:46, Roland Scheidegger  wrote:
> Am 13.03.2018 um 05:24 schrieb Dave Airlie:
>> From: Elie Tournier 
>>
>> v2: use mix.
>>
>> Signed-off-by: Elie Tournier 
>> ---
>>  src/compiler/glsl/builtin_float64.h | 28 
>>  src/compiler/glsl/builtin_functions.cpp |  4 
>>  src/compiler/glsl/builtin_functions.h   |  3 +++
>>  src/compiler/glsl/float64.glsl  |  9 +
>>  src/compiler/glsl/glcpp/glcpp-parse.y   |  1 +
>>  5 files changed, 45 insertions(+)
>>
>> diff --git a/src/compiler/glsl/builtin_float64.h 
>> b/src/compiler/glsl/builtin_float64.h
>> index 2898fc9..8546048 100644
>> --- a/src/compiler/glsl/builtin_float64.h
>> +++ b/src/compiler/glsl/builtin_float64.h
>> @@ -68,3 +68,31 @@ fneg64(void *mem_ctx, builtin_available_predicate avail)
>> sig->replace_parameters(_parameters);
>> return sig;
>>  }
>> +ir_function_signature *
>> +fsign64(void *mem_ctx, builtin_available_predicate avail)
>> +{
>> +   ir_function_signature *const sig =
>> +  new(mem_ctx) ir_function_signature(glsl_type::uvec2_type, avail);
>> +   ir_factory body(>body, mem_ctx);
>> +   sig->is_defined = true;
>> +
>> +   exec_list sig_parameters;
>> +
>> +   ir_variable *const r001D = new(mem_ctx) 
>> ir_variable(glsl_type::uvec2_type, "a", ir_var_function_in);
>> +   sig_parameters.push_tail(r001D);
>> +   ir_variable *const r001E = new(mem_ctx) 
>> ir_variable(glsl_type::uvec2_type, "retval", ir_var_auto);
>> +   body.emit(r001E);
>> +   body.emit(assign(r001E, body.constant(0u), 0x01));
>> +
>> +   ir_expression *const r001F = lshift(swizzle_y(r001D), 
>> body.constant(int(1)));
>> +   ir_expression *const r0020 = bit_or(r001F, swizzle_x(r001D));
>> +   ir_expression *const r0021 = equal(r0020, body.constant(0u));
>> +   ir_expression *const r0022 = bit_and(swizzle_y(r001D), 
>> body.constant(2147483648u));
>> +   ir_expression *const r0023 = bit_or(r0022, body.constant(1072693248u));
>> +   body.emit(assign(r001E, expr(ir_triop_csel, r0021, body.constant(0u), 
>> r0023), 0x02));
>> +
>> +   body.emit(ret(r001E));
>> +
>> +   sig->replace_parameters(_parameters);
>> +   return sig;
>> +}
>> diff --git a/src/compiler/glsl/builtin_functions.cpp 
>> b/src/compiler/glsl/builtin_functions.cpp
>> index 9d88a31..17aa868 100644
>> --- a/src/compiler/glsl/builtin_functions.cpp
>> +++ b/src/compiler/glsl/builtin_functions.cpp
>> @@ -3350,6 +3350,10 @@ builtin_builder::create_builtins()
>>  generate_ir::fneg64(mem_ctx, integer_functions_supported),
>>  NULL);
>>
>> +   add_function("__builtin_fsign64",
>> +generate_ir::fsign64(mem_ctx, integer_functions_supported),
>> +NULL);
>> +
>>  #undef F
>>  #undef FI
>>  #undef FIUD_VEC
>> diff --git a/src/compiler/glsl/builtin_functions.h 
>> b/src/compiler/glsl/builtin_functions.h
>> index adec424..7954373 100644
>> --- a/src/compiler/glsl/builtin_functions.h
>> +++ b/src/compiler/glsl/builtin_functions.h
>> @@ -73,6 +73,9 @@ fabs64(void *mem_ctx, builtin_available_predicate avail);
>>  ir_function_signature *
>>  fneg64(void *mem_ctx, builtin_available_predicate avail);
>>
>> +ir_function_signature *
>> +fsign64(void *mem_ctx, builtin_available_predicate avail);
>> +
>>  }
>>
>>  #endif /* BULITIN_FUNCTIONS_H */
>> diff --git a/src/compiler/glsl/float64.glsl b/src/compiler/glsl/float64.glsl
>> index fedf8b7..f8eb1f3 100644
>> --- a/src/compiler/glsl/float64.glsl
>> +++ b/src/compiler/glsl/float64.glsl
>> @@ -51,3 +51,12 @@ fneg64(uvec2 a)
>> a.y = mix(t, a.y, is_nan(a));
>> return a;
>>  }
>> +
>
> I think a function comment indicating what this returns would be quite
> useful here(I had to look quite a long time at it to realize it returns
> -1.0/1.0/0.0 depending on sign).

https://www.khronos.org/registry/OpenGL-Refpages/gl4/html/sign.xhtml

Dave.
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 1/2] configure.ac: blacklist libdrm 2.4.90

[Marek Olšák]

From: Marek Olšák 

Cc: 18.0 17.3 17.2 
---
 configure.ac | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/configure.ac b/configure.ac
index 621dc32..e29ce68 100644
--- a/configure.ac
+++ b/configure.ac
@@ -2601,20 +2601,27 @@ if test -n "$with_gallium_drivers"; then
 radeon_llvm_check $LLVM_REQUIRED_R600 "r600"
 
 llvm_add_component "asmparser" "r600"
 llvm_add_component "bitreader" "r600"
 fi
 ;;
 xradeonsi)
 HAVE_GALLIUM_RADEONSI=yes
 PKG_CHECK_MODULES([RADEON], [libdrm >= $LIBDRM_RADEON_REQUIRED 
libdrm_radeon >= $LIBDRM_RADEON_REQUIRED])
 PKG_CHECK_MODULES([AMDGPU], [libdrm >= $LIBDRM_AMDGPU_REQUIRED 
libdrm_amdgpu >= $LIBDRM_AMDGPU_REQUIRED])
+
+# Blacklist libdrm_amdgpu 2.4.90 because it breaks older radeonsi
+libdrm_version=`pkg-config libdrm_amdgpu --modversion`
+if test "x$libdrm_version" = x2.4.90; then
+AC_MSG_ERROR([radeonsi can't use libdrm 2.4.90 due to a 
compatibility issue. Use a newer or older version.])
+fi
+
 require_libdrm "radeonsi"
 radeon_llvm_check $LLVM_REQUIRED_RADEONSI "radeonsi"
 if test "x$enable_egl" = xyes; then
 require_basic_egl "radeonsi"
 fi
 ;;
 xnouveau)
 HAVE_GALLIUM_NOUVEAU=yes
 PKG_CHECK_MODULES([NOUVEAU], [libdrm >= $LIBDRM_NOUVEAU_REQUIRED 
libdrm_nouveau >= $LIBDRM_NOUVEAU_REQUIRED])
 require_libdrm "nouveau"
-- 
2.7.4

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 2/2] configure.ac: require libdrm_amdgpu 2.4.91

[Marek Olšák]

From: Marek Olšák 

Since 2.4.90 might not work, just ask for the next version.
---
 configure.ac | 9 +
 1 file changed, 1 insertion(+), 8 deletions(-)

diff --git a/configure.ac b/configure.ac
index e29ce68..8ec5b26 100644
--- a/configure.ac
+++ b/configure.ac
@@ -67,21 +67,21 @@ OPENCL_VERSION=1
 AC_SUBST([OPENCL_VERSION])
 
 # The idea is that libdrm is distributed as one cohesive package, even
 # though it is composed of multiple libraries. However some drivers
 # may have different version requirements than others. This list
 # codifies which drivers need which version of libdrm. Any libdrm
 # version dependencies in non-driver-specific code should be reflected
 # in the first entry.
 LIBDRM_REQUIRED=2.4.75
 LIBDRM_RADEON_REQUIRED=2.4.71
-LIBDRM_AMDGPU_REQUIRED=2.4.90
+LIBDRM_AMDGPU_REQUIRED=2.4.91
 LIBDRM_INTEL_REQUIRED=2.4.75
 LIBDRM_NVVIEUX_REQUIRED=2.4.66
 LIBDRM_NOUVEAU_REQUIRED=2.4.66
 LIBDRM_FREEDRENO_REQUIRED=2.4.91
 LIBDRM_ETNAVIV_REQUIRED=2.4.82
 
 dnl Versions for external dependencies
 DRI2PROTO_REQUIRED=2.8
 GLPROTO_REQUIRED=1.4.14
 LIBOMXIL_BELLAGIO_REQUIRED=0.0
@@ -2601,27 +2601,20 @@ if test -n "$with_gallium_drivers"; then
 radeon_llvm_check $LLVM_REQUIRED_R600 "r600"
 
 llvm_add_component "asmparser" "r600"
 llvm_add_component "bitreader" "r600"
 fi
 ;;
 xradeonsi)
 HAVE_GALLIUM_RADEONSI=yes
 PKG_CHECK_MODULES([RADEON], [libdrm >= $LIBDRM_RADEON_REQUIRED 
libdrm_radeon >= $LIBDRM_RADEON_REQUIRED])
 PKG_CHECK_MODULES([AMDGPU], [libdrm >= $LIBDRM_AMDGPU_REQUIRED 
libdrm_amdgpu >= $LIBDRM_AMDGPU_REQUIRED])
-
-# Blacklist libdrm_amdgpu 2.4.90 because it breaks older radeonsi
-libdrm_version=`pkg-config libdrm_amdgpu --modversion`
-if test "x$libdrm_version" = x2.4.90; then
-AC_MSG_ERROR([radeonsi can't use libdrm 2.4.90 due to a 
compatibility issue. Use a newer or older version.])
-fi
-
 require_libdrm "radeonsi"
 radeon_llvm_check $LLVM_REQUIRED_RADEONSI "radeonsi"
 if test "x$enable_egl" = xyes; then
 require_basic_egl "radeonsi"
 fi
 ;;
 xnouveau)
 HAVE_GALLIUM_NOUVEAU=yes
 PKG_CHECK_MODULES([NOUVEAU], [libdrm >= $LIBDRM_NOUVEAU_REQUIRED 
libdrm_nouveau >= $LIBDRM_NOUVEAU_REQUIRED])
 require_libdrm "nouveau"
-- 
2.7.4

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 03/50] glsl: Add "built-in" function to do sign(fp64) (v2)

[Roland Scheidegger]

Am 13.03.2018 um 05:24 schrieb Dave Airlie:
> From: Elie Tournier 
> 
> v2: use mix.
> 
> Signed-off-by: Elie Tournier 
> ---
>  src/compiler/glsl/builtin_float64.h | 28 
>  src/compiler/glsl/builtin_functions.cpp |  4 
>  src/compiler/glsl/builtin_functions.h   |  3 +++
>  src/compiler/glsl/float64.glsl  |  9 +
>  src/compiler/glsl/glcpp/glcpp-parse.y   |  1 +
>  5 files changed, 45 insertions(+)
> 
> diff --git a/src/compiler/glsl/builtin_float64.h 
> b/src/compiler/glsl/builtin_float64.h
> index 2898fc9..8546048 100644
> --- a/src/compiler/glsl/builtin_float64.h
> +++ b/src/compiler/glsl/builtin_float64.h
> @@ -68,3 +68,31 @@ fneg64(void *mem_ctx, builtin_available_predicate avail)
> sig->replace_parameters(_parameters);
> return sig;
>  }
> +ir_function_signature *
> +fsign64(void *mem_ctx, builtin_available_predicate avail)
> +{
> +   ir_function_signature *const sig =
> +  new(mem_ctx) ir_function_signature(glsl_type::uvec2_type, avail);
> +   ir_factory body(>body, mem_ctx);
> +   sig->is_defined = true;
> +
> +   exec_list sig_parameters;
> +
> +   ir_variable *const r001D = new(mem_ctx) 
> ir_variable(glsl_type::uvec2_type, "a", ir_var_function_in);
> +   sig_parameters.push_tail(r001D);
> +   ir_variable *const r001E = new(mem_ctx) 
> ir_variable(glsl_type::uvec2_type, "retval", ir_var_auto);
> +   body.emit(r001E);
> +   body.emit(assign(r001E, body.constant(0u), 0x01));
> +
> +   ir_expression *const r001F = lshift(swizzle_y(r001D), 
> body.constant(int(1)));
> +   ir_expression *const r0020 = bit_or(r001F, swizzle_x(r001D));
> +   ir_expression *const r0021 = equal(r0020, body.constant(0u));
> +   ir_expression *const r0022 = bit_and(swizzle_y(r001D), 
> body.constant(2147483648u));
> +   ir_expression *const r0023 = bit_or(r0022, body.constant(1072693248u));
> +   body.emit(assign(r001E, expr(ir_triop_csel, r0021, body.constant(0u), 
> r0023), 0x02));
> +
> +   body.emit(ret(r001E));
> +
> +   sig->replace_parameters(_parameters);
> +   return sig;
> +}
> diff --git a/src/compiler/glsl/builtin_functions.cpp 
> b/src/compiler/glsl/builtin_functions.cpp
> index 9d88a31..17aa868 100644
> --- a/src/compiler/glsl/builtin_functions.cpp
> +++ b/src/compiler/glsl/builtin_functions.cpp
> @@ -3350,6 +3350,10 @@ builtin_builder::create_builtins()
>  generate_ir::fneg64(mem_ctx, integer_functions_supported),
>  NULL);
>  
> +   add_function("__builtin_fsign64",
> +generate_ir::fsign64(mem_ctx, integer_functions_supported),
> +NULL);
> +
>  #undef F
>  #undef FI
>  #undef FIUD_VEC
> diff --git a/src/compiler/glsl/builtin_functions.h 
> b/src/compiler/glsl/builtin_functions.h
> index adec424..7954373 100644
> --- a/src/compiler/glsl/builtin_functions.h
> +++ b/src/compiler/glsl/builtin_functions.h
> @@ -73,6 +73,9 @@ fabs64(void *mem_ctx, builtin_available_predicate avail);
>  ir_function_signature *
>  fneg64(void *mem_ctx, builtin_available_predicate avail);
>  
> +ir_function_signature *
> +fsign64(void *mem_ctx, builtin_available_predicate avail);
> +
>  }
>  
>  #endif /* BULITIN_FUNCTIONS_H */
> diff --git a/src/compiler/glsl/float64.glsl b/src/compiler/glsl/float64.glsl
> index fedf8b7..f8eb1f3 100644
> --- a/src/compiler/glsl/float64.glsl
> +++ b/src/compiler/glsl/float64.glsl
> @@ -51,3 +51,12 @@ fneg64(uvec2 a)
> a.y = mix(t, a.y, is_nan(a));
> return a;
>  }
> +

I think a function comment indicating what this returns would be quite
useful here(I had to look quite a long time at it to realize it returns
-1.0/1.0/0.0 depending on sign).

Roland

> +uvec2
> +fsign64(uvec2 a)
> +{
> +   uvec2 retval;
> +   retval.x = 0u;
> +   retval.y = mix((a.y & 0x8000u) | 0x3FF0u, 0u, (a.y << 1 | a.x) == 
> 0u);
> +   return retval;
> +}
> diff --git a/src/compiler/glsl/glcpp/glcpp-parse.y 
> b/src/compiler/glsl/glcpp/glcpp-parse.y
> index b9506d8..666543b 100644
> --- a/src/compiler/glsl/glcpp/glcpp-parse.y
> +++ b/src/compiler/glsl/glcpp/glcpp-parse.y
> @@ -2370,6 +2370,7 @@ _glcpp_parser_handle_version_declaration(glcpp_parser_t 
> *parser, intmax_t versio
>   add_builtin_define(parser, "__have_builtin_builtin_imod64", 1);
>   add_builtin_define(parser, "__have_builtin_builtin_fabs64", 1);
>   add_builtin_define(parser, "__have_builtin_builtin_fneg64", 1);
> + add_builtin_define(parser, "__have_builtin_builtin_fsign64", 1);
>}
> }
>  
> 

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 2/2] fixup! dri3: allow building against older xcb (v3)

[Rob Clark]

On Tue, Mar 13, 2018 at 7:47 PM, Rob Clark  wrote:
> On Tue, Mar 13, 2018 at 7:27 PM, Rob Clark  wrote:
>> On Tue, Mar 13, 2018 at 7:10 PM, Dylan Baker  wrote:
>>> Quoting Rob Clark (2018-03-13 16:04:00)
 ---
 I'm a bit unsure about the xcb-present version dependency, as that was
 added in a different commit.  OTOH I guess Dave is building vulkan with
 his patch so it is perhaps not a built-time dependency.

  meson.build | 11 ---
  1 file changed, 8 insertions(+), 3 deletions(-)

 diff --git a/meson.build b/meson.build
 index c201644c372..30f1919e6f5 100644
 --- a/meson.build
 +++ b/meson.build
 @@ -1235,9 +1235,14 @@ if with_platform_x11
  dep_xcb_dri2 = dependency('xcb-dri2', version : '>= 1.8')

  if with_dri3
 -  pre_args += ['-DHAVE_DRI3', '-DHAVE_DRI3_MODIFIERS']
 -  dep_xcb_dri3 = dependency('xcb-dri3', version : '>= 1.13')
 -  dep_xcb_present = dependency('xcb-present', version: '>= 1.13')
 +  pre_args += '-DHAVE_DRI3'
 +  dep_xcb_dri3 = dependency('xcb-dri3')
 +  dep_xcb_present = dependency('xcb-present')
 +  # until xcb-dri3 has been around long enough to make a 
 hard-dependency:
 +  dep_xcb_dri3_modifiers = dependency('xcb-dri3', version : '>= 
 1.13', required : false)
 +  if dep_xcb_dri3_modifiers.found()
>>>
>>> I think you could simplify this by doing:
>>>
>>>  if dep_xcb_dri3.version().version_compare('>= 1.13')
>>
>> ahh, yeah, and I guess that will get rid of the confusing error msg
>> about xcb-dri3 1.13 not found..
>>
>>
>>>
>>> Or should we be checking for xcb_dri3 and xcb_present >= 1.13?
>>
>> I'm not entirely sure why we were checking for xcb-present >= 1.13..
>> if that is actually a build time requirement then I think Dave's
>> initial patch needs some more ifdef..  (but otoh, if it was, I guess
>> he would have noticed.)
>>
>> Anyways, I did a build w/ anv+radv enabled with xcb-present == 1.12
>> (and xcb-dri3 1.12).. and 61309c2a727d52d543207d6ae79fcb3e68b5cff3
>> looks like it just cares about >= 1.12 of both of those (although not
>> sure if it is a compile time dependency).
>>
>> So *possibly* for both meson and autotools we should require 1.12, and
>> optionally 1.13 for HAVE_DRI3_MODIFIERS?
>>
>
> so mystery solved, Dave #ifdef'd out the present dependencies too ;-)
>
> so this is what I end up with:
>
> @@ -1235,9 +1235,14 @@ if with_platform_x11
>  dep_xcb_dri2 = dependency('xcb-dri2', version : '>= 1.8')
>
>  if with_dri3
> -  pre_args += ['-DHAVE_DRI3', '-DHAVE_DRI3_MODIFIERS']
> -  dep_xcb_dri3 = dependency('xcb-dri3', version : '>= 1.13')
> -  dep_xcb_present = dependency('xcb-present', version: '>= 1.13')
> +  pre_args += '-DHAVE_DRI3'
> +  dep_xcb_dri3 = dependency('xcb-dri3')
> +  dep_xcb_present = dependency('xcb-present')
> +  # until xcb-dri3 has been around long enough to make a hard-dependency:
> +  if dep_xcb_dri3.version().version_compare('>= 1.13') and
> + dep_xcb_present.version().version_compare('>= 1.13')

hmm, annoyingly enough I found that on rawhide (meson 0.45.0), I seem
to need the entire if statement on a single line, instead of split in
two like this.

BR,
-R

> +pre_args += '-DHAVE_DRI3_MODIFIERS'
> +  endif
>dep_xcb_sync = dependency('xcb-sync')
>dep_xshmfence = dependency('xshmfence', version : '>= 1.1')
>  endif
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] soft fp64 support - main body (glsl/gallium)

[Dave Airlie]

On 14 March 2018 at 09:47, Gert Wollny  wrote:
>
> Am Dienstag, den 13.03.2018, 14:24 +1000 schrieb Dave Airlie:
>> This is the main code for the soft fp64 work. It's mostly Elie's
>> code with a bunch of changes by me.
>
> Many thanks for this work, Elie and Dave. I've tested the patches on
> BARTS with nosb, piglit set all, -t fp64, and I get 2976 of 2995 test
> pass, skip: 16, fail: 3 (like Elie pointed out: ssbo and arrays of
> arrays are the culprits).
>
> I'm wonderig a bit what is the subset that gives you 1375 piglits ...

I think I've been using

-t fp64.

Dave.
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [Bug 105464] Reading per-patch outputs in Tessellation Control Shader returns undefined values

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=105464

--- Comment #3 from Dave Airlie  ---
https://patchwork.freedesktop.org/series/39918/

Should fix this, thanks for the report and reproducer.

-- 
You are receiving this mail because:
You are the assignee for the bug.
You are the QA Contact for the bug.___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 1/3] radv: get correct offset into LDS for indexed vars.

[Dave Airlie]

From: Dave Airlie 

This seems more correct to me, since if we have an array
of floats they'll be vec4 aligned, and if we do af[2],
we want the const index to increase by 2 slots in the non
compact case.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105464
Fixes: 94f9591995 (radv/ac: add support for TCS/TES inputs/outputs.)
Signed-off-by: Dave Airlie 
---
 src/amd/common/ac_nir_to_llvm.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index d2df2837c8a..a8ecaaac474 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -2807,7 +2807,7 @@ get_dw_address(struct radv_shader_context *ctx,
LLVMConstInt(ctx->ac.i32, 
4, false), ""), "");
else if (const_index && !compact_const_index)
dw_addr = LLVMBuildAdd(ctx->ac.builder, dw_addr,
-  LLVMConstInt(ctx->ac.i32, const_index, 
false), "");
+  LLVMConstInt(ctx->ac.i32, const_index * 
4, false), "");
 
dw_addr = LLVMBuildAdd(ctx->ac.builder, dw_addr,
   LLVMConstInt(ctx->ac.i32, param * 4, false), "");
-- 
2.14.3

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 2/3] ac/nir: pass the nir variable through tcs loading.

[Dave Airlie]

From: Dave Airlie 

I was going to have to add another parameter to this monster,
so we should just pass the nir_variable in, I can't find any
reason this would be a bad idea.

This needed for the next fix.

Fixes: 94f9591995 (radv/ac: add support for TCS/TES inputs/outputs.)
Signed-off-by: Dave Airlie 
---
 src/amd/common/ac_nir_to_llvm.c  | 21 -
 src/amd/common/ac_shader_abi.h   |  8 +++-
 src/gallium/drivers/radeonsi/si_shader.c |  9 -
 3 files changed, 15 insertions(+), 23 deletions(-)

diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index a8ecaaac474..600b6f72167 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -2864,18 +2864,18 @@ load_tcs_varyings(struct ac_shader_abi *abi,
 
 static void
 store_tcs_output(struct ac_shader_abi *abi,
+const nir_variable *var,
 LLVMValueRef vertex_index,
 LLVMValueRef param_index,
 unsigned const_index,
-unsigned location,
-unsigned driver_location,
 LLVMValueRef src,
-unsigned component,
-bool is_patch,
-bool is_compact,
 unsigned writemask)
 {
struct radv_shader_context *ctx = radv_shader_context_from_abi(abi);
+   const unsigned location = var->data.location;
+   const unsigned component = var->data.location_frac;
+   const bool is_patch = var->data.patch;
+   const bool is_compact = var->data.compact;
LLVMValueRef dw_addr;
LLVMValueRef stride = NULL;
LLVMValueRef buf_addr = NULL;
@@ -3244,19 +3244,14 @@ visit_store_var(struct ac_nir_context *ctx,
LLVMValueRef vertex_index = NULL;
LLVMValueRef indir_index = NULL;
unsigned const_index = 0;
-   const unsigned location = 
instr->variables[0]->var->data.location;
-   const unsigned driver_location = 
instr->variables[0]->var->data.driver_location;
-   const unsigned comp = 
instr->variables[0]->var->data.location_frac;
const bool is_patch = 
instr->variables[0]->var->data.patch;
-   const bool is_compact = 
instr->variables[0]->var->data.compact;
-
get_deref_offset(ctx, instr->variables[0],
 false, NULL, is_patch ? NULL : 
_index,
 _index, _index);
 
-   ctx->abi->store_tcs_outputs(ctx->abi, vertex_index, 
indir_index,
-   const_index, location, 
driver_location,
-   src, comp, is_patch, 
is_compact, writemask);
+   ctx->abi->store_tcs_outputs(ctx->abi, 
instr->variables[0]->var,
+   vertex_index, indir_index,
+   const_index, src, 
writemask);
return;
}
 
diff --git a/src/amd/common/ac_shader_abi.h b/src/amd/common/ac_shader_abi.h
index 09fe32c1363..4568c24dc5f 100644
--- a/src/amd/common/ac_shader_abi.h
+++ b/src/amd/common/ac_shader_abi.h
@@ -28,6 +28,8 @@
 
 #include "compiler/shader_enums.h"
 
+struct nir_variable;
+
 #define AC_LLVM_MAX_OUTPUTS (VARYING_SLOT_VAR31 + 1)
 
 enum ac_descriptor_type {
@@ -109,15 +111,11 @@ struct ac_shader_abi {
   bool load_inputs);
 
void (*store_tcs_outputs)(struct ac_shader_abi *abi,
+ const struct nir_variable *var,
  LLVMValueRef vertex_index,
  LLVMValueRef param_index,
  unsigned const_index,
- unsigned location,
- unsigned driver_location,
  LLVMValueRef src,
- unsigned component,
- bool is_patch,
- bool is_compact,
  unsigned writemask);
 
LLVMValueRef (*load_tess_coord)(struct ac_shader_abi *abi);
diff --git a/src/gallium/drivers/radeonsi/si_shader.c 
b/src/gallium/drivers/radeonsi/si_shader.c
index 2a50b266f64..ecb05d3c5c7 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -1487,19 +1487,18 @@ static void store_output_tcs(struct 
lp_build_tgsi_context *bld_base,
 }
 
 static void si_nir_store_output_tcs(struct ac_shader_abi *abi,
+   const struct nir_variable *var,
LLVMValueRef vertex_index,

[Mesa-dev] [PATCH 3/3] ac/radv: mark all tess output for an indirect access.

[Dave Airlie]

From: Dave Airlie 

If a shader does a tcs store with an indirect access, we
were only marking the first spot as used. For indirect access
we always now mark all slots used by the variable.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105464
Fixes: 94f9591995 (radv/ac: add support for TCS/TES inputs/outputs.)
Signed-off-by: Dave Airlie 
---
 src/amd/common/ac_nir_to_llvm.c | 23 +++
 1 file changed, 15 insertions(+), 8 deletions(-)

diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 600b6f72167..7b9b37ce163 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -2773,13 +2773,14 @@ static LLVMValueRef 
get_tcs_tes_buffer_address_params(struct radv_shader_context
 
 static void
 mark_tess_output(struct radv_shader_context *ctx,
-bool is_patch, uint32_t param)
+bool is_patch, uint32_t param, int num_slots)
 
 {
+   uint64_t slot_mask = (1ull << num_slots) - 1;
if (is_patch) {
-   ctx->tess_patch_outputs_written |= (1ull << param);
+   ctx->tess_patch_outputs_written |= (slot_mask << param);
} else
-   ctx->tess_outputs_written |= (1ull << param);
+   ctx->tess_outputs_written |= (slot_mask << param);
 }
 
 static LLVMValueRef
@@ -2876,6 +2877,7 @@ store_tcs_output(struct ac_shader_abi *abi,
const unsigned component = var->data.location_frac;
const bool is_patch = var->data.patch;
const bool is_compact = var->data.compact;
+   const unsigned count = glsl_count_attribute_slots(var->type, false);
LLVMValueRef dw_addr;
LLVMValueRef stride = NULL;
LLVMValueRef buf_addr = NULL;
@@ -2904,7 +2906,12 @@ store_tcs_output(struct ac_shader_abi *abi,
dw_addr = get_tcs_out_current_patch_data_offset(ctx);
}
 
-   mark_tess_output(ctx, is_patch, param);
+
+   if (param_index) {
+   mark_tess_output(ctx, is_patch, param, count);
+   } else {
+   mark_tess_output(ctx, is_patch, param, 1);
+   }
 
dw_addr = get_dw_address(ctx, dw_addr, param, const_index, is_compact, 
vertex_index, stride,
 param_index);
@@ -6201,9 +6208,9 @@ handle_ls_outputs_post(struct radv_shader_context *ctx)
if (i == VARYING_SLOT_CLIP_DIST0)
length = ctx->num_output_clips + ctx->num_output_culls;
int param = shader_io_get_unique_index(i);
-   mark_tess_output(ctx, false, param);
+   mark_tess_output(ctx, false, param, 1);
if (length > 4)
-   mark_tess_output(ctx, false, param + 1);
+   mark_tess_output(ctx, false, param + 1, 1);
LLVMValueRef dw_addr = LLVMBuildAdd(ctx->ac.builder, 
base_dw_addr,
LLVMConstInt(ctx->ac.i32, 
param * 4, false),
"");
@@ -6347,13 +6354,13 @@ write_tess_factors(struct radv_shader_context *ctx)
 
if (inner_comps) {
tess_inner_index = 
shader_io_get_unique_index(VARYING_SLOT_TESS_LEVEL_INNER);
-   mark_tess_output(ctx, true, tess_inner_index);
+   mark_tess_output(ctx, true, tess_inner_index, 1);
lds_inner = LLVMBuildAdd(ctx->ac.builder, lds_base,
 LLVMConstInt(ctx->ac.i32, 
tess_inner_index * 4, false), "");
}
 
tess_outer_index = 
shader_io_get_unique_index(VARYING_SLOT_TESS_LEVEL_OUTER);
-   mark_tess_output(ctx, true, tess_outer_index);
+   mark_tess_output(ctx, true, tess_outer_index, 1);
lds_outer = LLVMBuildAdd(ctx->ac.builder, lds_base,
 LLVMConstInt(ctx->ac.i32, tess_outer_index * 
4, false), "");
 
-- 
2.14.3

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] soft fp64 support - main body (glsl/gallium)

[Dave Airlie]

On 14 March 2018 at 09:54, Matt Turner  wrote:
> On Mon, Mar 12, 2018 at 9:24 PM, Dave Airlie  wrote:
>> This is the main code for the soft fp64 work. It's mostly Elie's
>> code with a bunch of changes by me.
>>
>> This patchset has all the glsl lowering code. (using float64.glsl,
>> yes I know checked in files are bad, but not bad enough for anyone
>> to have solved int64.glsl yet, so we have a precedent).
>
> Have you thought about making a NIR backend for R600?

It would be a lot more work and way too uncertain, I reckon it's taken
Timothy 6 months to get radeonsi even close with nir, I don't have
6 months to spend on getting r600 close, it's backend situation is a lot
worse than radeonsi.

>
> Elie sent patches for lowering fp64 operations in NIR, and it's what
> I'm going to start from when I do the analogous project for some
> future Intel hardware. It's sad to duplicate all of this code, much
> less all of this effort.

Yes it sucks, but maybe the nir code will get a lot more effort put
in and I can improve the GLSL code, I'm mostly hoping the GLSL
code is fire and forget since I doubt anyone in the real world will
ever use it.

Dave.
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH] intel/compiler: Check for unsupported register sizes.

[Rafael Antognolli]

Make sure we don't emit 64 bit types if the hardware doesn't support
them.

Signed-off-by: Rafael Antognolli 
Suggested-by: Kenneth Graunke 
---
 src/intel/compiler/brw_reg_type.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/src/intel/compiler/brw_reg_type.c 
b/src/intel/compiler/brw_reg_type.c
index 3c82eb0a76f..9fe4214972c 100644
--- a/src/intel/compiler/brw_reg_type.c
+++ b/src/intel/compiler/brw_reg_type.c
@@ -204,6 +204,9 @@ brw_reg_type_to_hw_type(const struct gen_device_info 
*devinfo,
   table = gen4_hw_type;
}
 
+   assert(devinfo->has_64bit_types || brw_reg_type_to_size(type) < 8 ||
+  type == BRW_REGISTER_TYPE_NF);
+
if (file == BRW_IMMEDIATE_VALUE) {
   assert(table[type].imm_type != (enum hw_imm_type)INVALID);
   return table[type].imm_type;
-- 
2.14.3

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] soft fp64 support - main body (glsl/gallium)

[Matt Turner]

On Mon, Mar 12, 2018 at 9:24 PM, Dave Airlie  wrote:
> This is the main code for the soft fp64 work. It's mostly Elie's
> code with a bunch of changes by me.
>
> This patchset has all the glsl lowering code. (using float64.glsl,
> yes I know checked in files are bad, but not bad enough for anyone
> to have solved int64.glsl yet, so we have a precedent).

Have you thought about making a NIR backend for R600?

Elie sent patches for lowering fp64 operations in NIR, and it's what
I'm going to start from when I do the analogous project for some
future Intel hardware. It's sad to duplicate all of this code, much
less all of this effort.
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] soft fp64 support - main body (glsl/gallium)

[Gert Wollny]

Am Dienstag, den 13.03.2018, 14:24 +1000 schrieb Dave Airlie:
> This is the main code for the soft fp64 work. It's mostly Elie's
> code with a bunch of changes by me.

Many thanks for this work, Elie and Dave. I've tested the patches on
BARTS with nosb, piglit set all, -t fp64, and I get 2976 of 2995 test
pass, skip: 16, fail: 3 (like Elie pointed out: ssbo and arrays of
arrays are the culprits).

I'm wonderig a bit what is the subset that gives you 1375 piglits ... 

In any case: Tested-By: Gert Wollny  

> 
> This patchset has all the glsl lowering code. (using float64.glsl,
> yes I know checked in files are bad, but not bad enough for anyone
> to have solved int64.glsl yet, so we have a precedent).
> 
> It introduces the builtin code for all the functions first,
> this code has seen some optimisation using findMSB and mix opcodes
> to remove if branches, I'm sure it could see a lot more. if
> statements
> are the enemy, esp when you hit glsl copy prop and the r600/sb
> backend.
> 
> The second part is just the lowering hooks to use the builtins,
> but also to do a bunch of non-builtin lowering.
> 
> Finally the gallium patches adds a new interpreation for the
> PIPE_CAP_DOUBLES,
> allowing drivers to choose if they want no fp64, hw fp64, or emulated
> fp64.
> I don't think we should be enabling this for everyone, just drivers
> who ask.
> 
> There is no r600 patch in this series, it's a one liner, but the code
> does
> cause a lot of long compile times in both the glsl compiler and the
> r600
> backend, however I'd really like to get this stuff checked in so we
> have
>  a known stable good base (it passes
> [1375/1375] skip: 5, pass: 1368, fail: 2
> on r600 nosb at the moment).
> 
> I think most of the remaining issues are not to be found in this
> code,
> but fixes for the other parts of the stack.
> 
> Also I'm not really interested in bikeshedding the nitty gritty
> details
> of the fp64 emulation, the main goal for this code is to provide the
> fp64 bit so we can enable GL4.3 on evergreen GPUs, I don't think
> anyone
> is going to use it that often in practice, and if we can get it to
> the
> level that passes conformance (still WIP) then I'll be happy. I think
> optimising it to reduce CPU usage at compile time is way more
> important
> than optimising it to reduce GPU usage.
> 
> Dave.
> 
> ___
> mesa-dev mailing list
> mesa-dev@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/mesa-dev
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 2/2] fixup! dri3: allow building against older xcb (v3)

[Rob Clark]

On Tue, Mar 13, 2018 at 7:27 PM, Rob Clark  wrote:
> On Tue, Mar 13, 2018 at 7:10 PM, Dylan Baker  wrote:
>> Quoting Rob Clark (2018-03-13 16:04:00)
>>> ---
>>> I'm a bit unsure about the xcb-present version dependency, as that was
>>> added in a different commit.  OTOH I guess Dave is building vulkan with
>>> his patch so it is perhaps not a built-time dependency.
>>>
>>>  meson.build | 11 ---
>>>  1 file changed, 8 insertions(+), 3 deletions(-)
>>>
>>> diff --git a/meson.build b/meson.build
>>> index c201644c372..30f1919e6f5 100644
>>> --- a/meson.build
>>> +++ b/meson.build
>>> @@ -1235,9 +1235,14 @@ if with_platform_x11
>>>  dep_xcb_dri2 = dependency('xcb-dri2', version : '>= 1.8')
>>>
>>>  if with_dri3
>>> -  pre_args += ['-DHAVE_DRI3', '-DHAVE_DRI3_MODIFIERS']
>>> -  dep_xcb_dri3 = dependency('xcb-dri3', version : '>= 1.13')
>>> -  dep_xcb_present = dependency('xcb-present', version: '>= 1.13')
>>> +  pre_args += '-DHAVE_DRI3'
>>> +  dep_xcb_dri3 = dependency('xcb-dri3')
>>> +  dep_xcb_present = dependency('xcb-present')
>>> +  # until xcb-dri3 has been around long enough to make a 
>>> hard-dependency:
>>> +  dep_xcb_dri3_modifiers = dependency('xcb-dri3', version : '>= 1.13', 
>>> required : false)
>>> +  if dep_xcb_dri3_modifiers.found()
>>
>> I think you could simplify this by doing:
>>
>>  if dep_xcb_dri3.version().version_compare('>= 1.13')
>
> ahh, yeah, and I guess that will get rid of the confusing error msg
> about xcb-dri3 1.13 not found..
>
>
>>
>> Or should we be checking for xcb_dri3 and xcb_present >= 1.13?
>
> I'm not entirely sure why we were checking for xcb-present >= 1.13..
> if that is actually a build time requirement then I think Dave's
> initial patch needs some more ifdef..  (but otoh, if it was, I guess
> he would have noticed.)
>
> Anyways, I did a build w/ anv+radv enabled with xcb-present == 1.12
> (and xcb-dri3 1.12).. and 61309c2a727d52d543207d6ae79fcb3e68b5cff3
> looks like it just cares about >= 1.12 of both of those (although not
> sure if it is a compile time dependency).
>
> So *possibly* for both meson and autotools we should require 1.12, and
> optionally 1.13 for HAVE_DRI3_MODIFIERS?
>

so mystery solved, Dave #ifdef'd out the present dependencies too ;-)

so this is what I end up with:

@@ -1235,9 +1235,14 @@ if with_platform_x11
 dep_xcb_dri2 = dependency('xcb-dri2', version : '>= 1.8')

 if with_dri3
-  pre_args += ['-DHAVE_DRI3', '-DHAVE_DRI3_MODIFIERS']
-  dep_xcb_dri3 = dependency('xcb-dri3', version : '>= 1.13')
-  dep_xcb_present = dependency('xcb-present', version: '>= 1.13')
+  pre_args += '-DHAVE_DRI3'
+  dep_xcb_dri3 = dependency('xcb-dri3')
+  dep_xcb_present = dependency('xcb-present')
+  # until xcb-dri3 has been around long enough to make a hard-dependency:
+  if dep_xcb_dri3.version().version_compare('>= 1.13') and
+ dep_xcb_present.version().version_compare('>= 1.13')
+pre_args += '-DHAVE_DRI3_MODIFIERS'
+  endif
   dep_xcb_sync = dependency('xcb-sync')
   dep_xshmfence = dependency('xshmfence', version : '>= 1.1')
 endif
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH] meson: fix pipe-loaders after omx changes

[Rob Clark]

On Tue, Mar 13, 2018 at 7:05 PM, Dylan Baker  wrote:
> with_gallium_omx used to be a boolean, but now it's a string. That means
> it needs to be compared to 'disabled' instead of false.
>
> CC: Rob Clark 
> Fixes: 34e852d5b50772199797ea839fc8d6b3805633ff
>("meson: Re-add auto option for omx")
> Signed-off-by: Dylan Baker 

Thanks! wfm :-)

Tested-by: Rob Clark  ---
>  src/gallium/targets/pipe-loader/meson.build | 7 ---
>  1 file changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/src/gallium/targets/pipe-loader/meson.build 
> b/src/gallium/targets/pipe-loader/meson.build
> index 25b26a34cac..7466d98f2d4 100644
> --- a/src/gallium/targets/pipe-loader/meson.build
> +++ b/src/gallium/targets/pipe-loader/meson.build
> @@ -1,4 +1,4 @@
> -# Copyright © 2017 Intel Corporation
> +# Copyright © 2017-2018 Intel Corporation
>
>  # Permission is hereby granted, free of charge, to any person obtaining a 
> copy
>  # of this software and associated documentation files (the "Software"), to 
> deal
> @@ -27,13 +27,14 @@ pipe_loader_incs = [
>inc_gallium_winsys, inc_gallium_aux,
>  ]
>
> -if (with_gallium_va or with_gallium_vdpau or with_gallium_omx or
> +if (with_gallium_va or with_gallium_vdpau or with_gallium_omx != 'disabled' 
> or
>  with_gallium_xvmc or with_dri)
>pipe_loader_link_with += libgalliumvl
>  else
>pipe_loader_link_with += libgalliumvl_stubs
>  endif
> -if with_gallium_va or with_gallium_vdpau or with_gallium_omx or 
> with_gallium_xvmc
> +if (with_gallium_va or with_gallium_vdpau or with_gallium_omx != 'disabled' 
> or
> +with_gallium_xvmc)
>pipe_loader_link_with += libgalliumvlwinsys
>  endif
>
> --
> 2.16.2
>
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 2/2] fixup! dri3: allow building against older xcb (v3)

[Rob Clark]

On Tue, Mar 13, 2018 at 7:10 PM, Dylan Baker  wrote:
> Quoting Rob Clark (2018-03-13 16:04:00)
>> ---
>> I'm a bit unsure about the xcb-present version dependency, as that was
>> added in a different commit.  OTOH I guess Dave is building vulkan with
>> his patch so it is perhaps not a built-time dependency.
>>
>>  meson.build | 11 ---
>>  1 file changed, 8 insertions(+), 3 deletions(-)
>>
>> diff --git a/meson.build b/meson.build
>> index c201644c372..30f1919e6f5 100644
>> --- a/meson.build
>> +++ b/meson.build
>> @@ -1235,9 +1235,14 @@ if with_platform_x11
>>  dep_xcb_dri2 = dependency('xcb-dri2', version : '>= 1.8')
>>
>>  if with_dri3
>> -  pre_args += ['-DHAVE_DRI3', '-DHAVE_DRI3_MODIFIERS']
>> -  dep_xcb_dri3 = dependency('xcb-dri3', version : '>= 1.13')
>> -  dep_xcb_present = dependency('xcb-present', version: '>= 1.13')
>> +  pre_args += '-DHAVE_DRI3'
>> +  dep_xcb_dri3 = dependency('xcb-dri3')
>> +  dep_xcb_present = dependency('xcb-present')
>> +  # until xcb-dri3 has been around long enough to make a 
>> hard-dependency:
>> +  dep_xcb_dri3_modifiers = dependency('xcb-dri3', version : '>= 1.13', 
>> required : false)
>> +  if dep_xcb_dri3_modifiers.found()
>
> I think you could simplify this by doing:
>
>  if dep_xcb_dri3.version().version_compare('>= 1.13')

ahh, yeah, and I guess that will get rid of the confusing error msg
about xcb-dri3 1.13 not found..


>
> Or should we be checking for xcb_dri3 and xcb_present >= 1.13?

I'm not entirely sure why we were checking for xcb-present >= 1.13..
if that is actually a build time requirement then I think Dave's
initial patch needs some more ifdef..  (but otoh, if it was, I guess
he would have noticed.)

Anyways, I did a build w/ anv+radv enabled with xcb-present == 1.12
(and xcb-dri3 1.12).. and 61309c2a727d52d543207d6ae79fcb3e68b5cff3
looks like it just cares about >= 1.12 of both of those (although not
sure if it is a compile time dependency).

So *possibly* for both meson and autotools we should require 1.12, and
optionally 1.13 for HAVE_DRI3_MODIFIERS?

BR,
-R

>
> Dylan
>
>> +pre_args += '-DHAVE_DRI3_MODIFIERS'
>> +  endif
>>dep_xcb_sync = dependency('xcb-sync')
>>dep_xshmfence = dependency('xshmfence', version : '>= 1.1')
>>  endif
>> --
>> 2.14.3
>>
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 1/2] util: Implement a hash table cloning function

[Thomas Helland]

V2: Don't rzalloc; we are about to rewrite the whole thing (Vladislav)

Reviewed-by: Eric Anholt 
---
 src/util/hash_table.c | 22 ++
 src/util/hash_table.h |  2 ++
 2 files changed, 24 insertions(+)

diff --git a/src/util/hash_table.c b/src/util/hash_table.c
index b7421a0144..f8d5d0f88a 100644
--- a/src/util/hash_table.c
+++ b/src/util/hash_table.c
@@ -141,6 +141,28 @@ _mesa_hash_table_create(void *mem_ctx,
return ht;
 }
 
+struct hash_table *
+_mesa_hash_table_clone(struct hash_table *src, void *dst_mem_ctx)
+{
+   struct hash_table *ht;
+
+   ht = ralloc(dst_mem_ctx, struct hash_table);
+   if (ht == NULL)
+  return NULL;
+
+   memcpy(ht, src, sizeof(struct hash_table));
+
+   ht->table = ralloc_array(ht, struct hash_entry, ht->size);
+   if (ht->table == NULL) {
+  ralloc_free(ht);
+  return NULL;
+   }
+
+   memcpy(ht->table, src->table, ht->size * sizeof(struct hash_entry));
+
+   return ht;
+}
+
 /**
  * Frees the given hash table.
  *
diff --git a/src/util/hash_table.h b/src/util/hash_table.h
index d3e0758b26..3846dad4b4 100644
--- a/src/util/hash_table.h
+++ b/src/util/hash_table.h
@@ -62,6 +62,8 @@ _mesa_hash_table_create(void *mem_ctx,
 uint32_t (*key_hash_function)(const void *key),
 bool (*key_equals_function)(const void *a,
 const void *b));
+struct hash_table *
+_mesa_hash_table_clone(struct hash_table *src, void *dst_mem_ctx);
 void _mesa_hash_table_destroy(struct hash_table *ht,
   void (*delete_function)(struct hash_entry 
*entry));
 void _mesa_hash_table_clear(struct hash_table *ht,
-- 
2.16.2

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 0/2] V2: Use hash table cloning in copy propagation

[Thomas Helland]

Sending out a v2 just in case someone has any more comments.
If not I'll probably push these tomorrow, or thursday.

This is a revival of some old patches I had around to improve
the compile times in the glsl compiler by reducing the time
spend inserting items in the hash table in opt_copy_propagation.
I've only rebased this, as my system don't even want to compile
anything right now. I also don't remember if it was thoroughly
tested, so that will have to be done. Sending it out as Dave
might be interested in this to mitigate some of the overhead
his soft-dobule implementation incurs.

Thomas Helland (2):
  util: Implement a hash table cloning function
  glsl: Use hash table cloning in copy propagation

 src/compiler/glsl/opt_copy_propagation.cpp | 17 -
 .../glsl/opt_copy_propagation_elements.cpp | 29 --
 src/util/hash_table.c  | 22 
 src/util/hash_table.h  |  2 ++
 4 files changed, 39 insertions(+), 31 deletions(-)

-- 
2.16.2

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 2/2] glsl: Use hash table cloning in copy propagation

[Thomas Helland]

Walking the whole hash table, inserting entries by hashing them first
is just a really bad idea. We can simply memcpy the whole thing.

While this does not have a major performance impact on average,
as it only helps shaders with a lot of branches, it might help
individual shaders quite a lot. For my shader-db I get a reduction
from 1'381 (+-0,03%) to 1'272 (+-0,03%) billion cycles on five runs,
as reported by "perf stat".

V2: Remove leftover creation of acp in two places

Reviewed-by: Eric Anholt 
---
 src/compiler/glsl/opt_copy_propagation.cpp | 17 -
 .../glsl/opt_copy_propagation_elements.cpp | 29 --
 2 files changed, 15 insertions(+), 31 deletions(-)

diff --git a/src/compiler/glsl/opt_copy_propagation.cpp 
b/src/compiler/glsl/opt_copy_propagation.cpp
index e904e6ede4..6220aa86da 100644
--- a/src/compiler/glsl/opt_copy_propagation.cpp
+++ b/src/compiler/glsl/opt_copy_propagation.cpp
@@ -213,17 +213,12 @@ ir_copy_propagation_visitor::handle_if_block(exec_list 
*instructions)
set *orig_kills = this->kills;
bool orig_killed_all = this->killed_all;
 
-   acp = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
- _mesa_key_pointer_equal);
kills = _mesa_set_create(NULL, _mesa_hash_pointer,
 _mesa_key_pointer_equal);
this->killed_all = false;
 
/* Populate the initial acp with a copy of the original */
-   struct hash_entry *entry;
-   hash_table_foreach(orig_acp, entry) {
-  _mesa_hash_table_insert(acp, entry->key, entry->data);
-   }
+   acp = _mesa_hash_table_clone(orig_acp, NULL);
 
visit_list_elements(this, instructions);
 
@@ -264,17 +259,15 @@ ir_copy_propagation_visitor::handle_loop(ir_loop *ir, 
bool keep_acp)
set *orig_kills = this->kills;
bool orig_killed_all = this->killed_all;
 
-   acp = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
- _mesa_key_pointer_equal);
kills = _mesa_set_create(NULL, _mesa_hash_pointer,
 _mesa_key_pointer_equal);
this->killed_all = false;
 
if (keep_acp) {
-  struct hash_entry *entry;
-  hash_table_foreach(orig_acp, entry) {
- _mesa_hash_table_insert(acp, entry->key, entry->data);
-  }
+  acp = _mesa_hash_table_clone(orig_acp, NULL);
+   } else {
+  acp = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
+_mesa_key_pointer_equal);
}
 
visit_list_elements(this, >body_instructions);
diff --git a/src/compiler/glsl/opt_copy_propagation_elements.cpp 
b/src/compiler/glsl/opt_copy_propagation_elements.cpp
index 9f79fa9202..8bae424a1d 100644
--- a/src/compiler/glsl/opt_copy_propagation_elements.cpp
+++ b/src/compiler/glsl/opt_copy_propagation_elements.cpp
@@ -124,6 +124,12 @@ public:
   ralloc_free(mem_ctx);
}
 
+   void clone_acp(hash_table *lhs, hash_table *rhs)
+   {
+  lhs_ht = _mesa_hash_table_clone(lhs, mem_ctx);
+  rhs_ht = _mesa_hash_table_clone(rhs, mem_ctx);
+   }
+
void create_acp()
{
   lhs_ht = _mesa_hash_table_create(mem_ctx, _mesa_hash_pointer,
@@ -138,19 +144,6 @@ public:
   _mesa_hash_table_destroy(rhs_ht, NULL);
}
 
-   void populate_acp(hash_table *lhs, hash_table *rhs)
-   {
-  struct hash_entry *entry;
-
-  hash_table_foreach(lhs, entry) {
- _mesa_hash_table_insert(lhs_ht, entry->key, entry->data);
-  }
-
-  hash_table_foreach(rhs, entry) {
- _mesa_hash_table_insert(rhs_ht, entry->key, entry->data);
-  }
-   }
-
void handle_loop(ir_loop *, bool keep_acp);
virtual ir_visitor_status visit_enter(class ir_loop *);
virtual ir_visitor_status visit_enter(class ir_function_signature *);
@@ -395,10 +388,8 @@ 
ir_copy_propagation_elements_visitor::handle_if_block(exec_list *instructions)
this->kills = new(mem_ctx) exec_list;
this->killed_all = false;
 
-   create_acp();
-
/* Populate the initial acp with a copy of the original */
-   populate_acp(orig_lhs_ht, orig_rhs_ht);
+   clone_acp(orig_lhs_ht, orig_rhs_ht);
 
visit_list_elements(this, instructions);
 
@@ -454,11 +445,11 @@ ir_copy_propagation_elements_visitor::handle_loop(ir_loop 
*ir, bool keep_acp)
this->kills = new(mem_ctx) exec_list;
this->killed_all = false;
 
-   create_acp();
-
if (keep_acp) {
   /* Populate the initial acp with a copy of the original */
-  populate_acp(orig_lhs_ht, orig_rhs_ht);
+  clone_acp(orig_lhs_ht, orig_rhs_ht);
+   } else {
+  create_acp();
}
 
visit_list_elements(this, >body_instructions);
-- 
2.16.2

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 2/2] fixup! dri3: allow building against older xcb (v3)

[Dylan Baker]

Quoting Rob Clark (2018-03-13 16:04:00)
> ---
> I'm a bit unsure about the xcb-present version dependency, as that was
> added in a different commit.  OTOH I guess Dave is building vulkan with
> his patch so it is perhaps not a built-time dependency.
> 
>  meson.build | 11 ---
>  1 file changed, 8 insertions(+), 3 deletions(-)
> 
> diff --git a/meson.build b/meson.build
> index c201644c372..30f1919e6f5 100644
> --- a/meson.build
> +++ b/meson.build
> @@ -1235,9 +1235,14 @@ if with_platform_x11
>  dep_xcb_dri2 = dependency('xcb-dri2', version : '>= 1.8')
>  
>  if with_dri3
> -  pre_args += ['-DHAVE_DRI3', '-DHAVE_DRI3_MODIFIERS']
> -  dep_xcb_dri3 = dependency('xcb-dri3', version : '>= 1.13')
> -  dep_xcb_present = dependency('xcb-present', version: '>= 1.13')
> +  pre_args += '-DHAVE_DRI3'
> +  dep_xcb_dri3 = dependency('xcb-dri3')
> +  dep_xcb_present = dependency('xcb-present')
> +  # until xcb-dri3 has been around long enough to make a hard-dependency:
> +  dep_xcb_dri3_modifiers = dependency('xcb-dri3', version : '>= 1.13', 
> required : false)
> +  if dep_xcb_dri3_modifiers.found()

I think you could simplify this by doing:

 if dep_xcb_dri3.version().version_compare('>= 1.13')

Or should we be checking for xcb_dri3 and xcb_present >= 1.13?

Dylan

> +pre_args += '-DHAVE_DRI3_MODIFIERS'
> +  endif
>dep_xcb_sync = dependency('xcb-sync')
>dep_xshmfence = dependency('xshmfence', version : '>= 1.1')
>  endif
> -- 
> 2.14.3
> 


signature.asc
Description: signature
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH] meson: fix pipe-loaders after omx changes

[Dylan Baker]

with_gallium_omx used to be a boolean, but now it's a string. That means
it needs to be compared to 'disabled' instead of false.

CC: Rob Clark 
Fixes: 34e852d5b50772199797ea839fc8d6b3805633ff
   ("meson: Re-add auto option for omx")
Signed-off-by: Dylan Baker 
---
 src/gallium/targets/pipe-loader/meson.build | 7 ---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/src/gallium/targets/pipe-loader/meson.build 
b/src/gallium/targets/pipe-loader/meson.build
index 25b26a34cac..7466d98f2d4 100644
--- a/src/gallium/targets/pipe-loader/meson.build
+++ b/src/gallium/targets/pipe-loader/meson.build
@@ -1,4 +1,4 @@
-# Copyright © 2017 Intel Corporation
+# Copyright © 2017-2018 Intel Corporation
 
 # Permission is hereby granted, free of charge, to any person obtaining a copy
 # of this software and associated documentation files (the "Software"), to deal
@@ -27,13 +27,14 @@ pipe_loader_incs = [
   inc_gallium_winsys, inc_gallium_aux,
 ]
 
-if (with_gallium_va or with_gallium_vdpau or with_gallium_omx or
+if (with_gallium_va or with_gallium_vdpau or with_gallium_omx != 'disabled' or
 with_gallium_xvmc or with_dri)
   pipe_loader_link_with += libgalliumvl
 else
   pipe_loader_link_with += libgalliumvl_stubs
 endif
-if with_gallium_va or with_gallium_vdpau or with_gallium_omx or 
with_gallium_xvmc
+if (with_gallium_va or with_gallium_vdpau or with_gallium_omx != 'disabled' or
+with_gallium_xvmc)
   pipe_loader_link_with += libgalliumvlwinsys
 endif
 
-- 
2.16.2

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 2/2] fixup! dri3: allow building against older xcb (v3)

[Rob Clark]

---
I'm a bit unsure about the xcb-present version dependency, as that was
added in a different commit.  OTOH I guess Dave is building vulkan with
his patch so it is perhaps not a built-time dependency.

 meson.build | 11 ---
 1 file changed, 8 insertions(+), 3 deletions(-)

diff --git a/meson.build b/meson.build
index c201644c372..30f1919e6f5 100644
--- a/meson.build
+++ b/meson.build
@@ -1235,9 +1235,14 @@ if with_platform_x11
 dep_xcb_dri2 = dependency('xcb-dri2', version : '>= 1.8')
 
 if with_dri3
-  pre_args += ['-DHAVE_DRI3', '-DHAVE_DRI3_MODIFIERS']
-  dep_xcb_dri3 = dependency('xcb-dri3', version : '>= 1.13')
-  dep_xcb_present = dependency('xcb-present', version: '>= 1.13')
+  pre_args += '-DHAVE_DRI3'
+  dep_xcb_dri3 = dependency('xcb-dri3')
+  dep_xcb_present = dependency('xcb-present')
+  # until xcb-dri3 has been around long enough to make a hard-dependency:
+  dep_xcb_dri3_modifiers = dependency('xcb-dri3', version : '>= 1.13', 
required : false)
+  if dep_xcb_dri3_modifiers.found()
+pre_args += '-DHAVE_DRI3_MODIFIERS'
+  endif
   dep_xcb_sync = dependency('xcb-sync')
   dep_xshmfence = dependency('xshmfence', version : '>= 1.1')
 endif
-- 
2.14.3

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 1/2] fixup! dri3: allow building against older xcb (v3)

[Rob Clark]

---
You can squash this, and at your descrition the 2nd one into Dave's
patch[1]

[1] https://patchwork.freedesktop.org/patch/210351/

 meson.build | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/meson.build b/meson.build
index 3a00456e7c9..c201644c372 100644
--- a/meson.build
+++ b/meson.build
@@ -1235,7 +1235,7 @@ if with_platform_x11
 dep_xcb_dri2 = dependency('xcb-dri2', version : '>= 1.8')
 
 if with_dri3
-  pre_args += '-DHAVE_DRI3 -DHAVE_DRI3_MODIFIERS'
+  pre_args += ['-DHAVE_DRI3', '-DHAVE_DRI3_MODIFIERS']
   dep_xcb_dri3 = dependency('xcb-dri3', version : '>= 1.13')
   dep_xcb_present = dependency('xcb-present', version: '>= 1.13')
   dep_xcb_sync = dependency('xcb-sync')
-- 
2.14.3

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [Bug 105494] UT2004 cube map reflection problem

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=105494

--- Comment #2 from almos  ---
Created attachment 138082
  --> https://bugs.freedesktop.org/attachment.cgi?id=138082=edit
shot43.png

-- 
You are receiving this mail because:
You are the QA Contact for the bug.
You are the assignee for the bug.___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [Bug 105494] UT2004 cube map reflection problem

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=105494

Bug ID: 105494
   Summary: UT2004 cube map reflection problem
   Product: Mesa
   Version: git
  Hardware: Other
OS: All
Status: NEW
  Severity: normal
  Priority: medium
 Component: Mesa core
  Assignee: mesa-dev@lists.freedesktop.org
  Reporter: aaalmo...@gmail.com
QA Contact: mesa-dev@lists.freedesktop.org

In the map dm-antalus there is a small pond and the surrounding area is
reflected on its surface (this map is included in the demo version btw). Part
of this reflection is missing, depending on the viewing angle (see the
screenshots). It looks like a clipping issue. Other cube map reflections in the
game are also affected, but this is where it's the most prominent.

As far as I can remember this bug wasn't present a few years ago when I last
played this game (mesa was around version 7-8 back then), so I assumed this was
a regression. However, the earliest version of mesa that I could compile with
the oldest llvm in my distribution is 11.0, and that one already has this bug.
I'll try to get an earlier llvm for mesa 10 and 9.

Drivers tested: radeonsi, llvmpipe.

-- 
You are receiving this mail because:
You are the QA Contact for the bug.
You are the assignee for the bug.___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [Bug 105494] UT2004 cube map reflection problem

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=105494

--- Comment #1 from almos  ---
Created attachment 138081
  --> https://bugs.freedesktop.org/attachment.cgi?id=138081=edit
shot42.png

-- 
You are receiving this mail because:
You are the QA Contact for the bug.
You are the assignee for the bug.___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 2/4] st/nine: Fix bad tracking of vs textures for NINESBT_ALL

[Axel Davy]

Stateblocks with NINESBT_ALL should track all textures.
For better performance they have a faster path which
copies all the required.

This path was only tracking ps textures.

Fixes: https://github.com/iXit/Mesa-3D/issues/303

Signed-off-by: Axel Davy 

CC: "17.3 18.0" 
---
 src/gallium/state_trackers/nine/stateblock9.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/gallium/state_trackers/nine/stateblock9.c 
b/src/gallium/state_trackers/nine/stateblock9.c
index 4b7166f0da..54bf1e3c95 100644
--- a/src/gallium/state_trackers/nine/stateblock9.c
+++ b/src/gallium/state_trackers/nine/stateblock9.c
@@ -454,7 +454,7 @@ nine_state_copy_common_all(struct NineDevice9 *device,
 
 /* Textures */
 if (1) {
-for (i = 0; i < device->caps.MaxSimultaneousTextures; i++)
+for (i = 0; i < NINE_MAX_SAMPLERS; i++)
 NineStateBlock9_BindTexture(device, apply, >texture[i], 
src->texture[i]);
 }
 
-- 
2.16.2

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 4/4] st/nine: Fix non inversible matrix check

[Axel Davy]

There was a missing absolute value when
checking if the determinant was big enough.

Fixes: https://github.com/iXit/Mesa-3D/issues/292

Signed-off-by: Axel Davy 

CC: "17.3 18.0" 
---
 src/gallium/state_trackers/nine/nine_ff.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/gallium/state_trackers/nine/nine_ff.c 
b/src/gallium/state_trackers/nine/nine_ff.c
index 6c30839b29..d7b697caee 100644
--- a/src/gallium/state_trackers/nine/nine_ff.c
+++ b/src/gallium/state_trackers/nine/nine_ff.c
@@ -2474,7 +2474,7 @@ nine_d3d_matrix_inverse(D3DMATRIX *D, const D3DMATRIX *M)
 M->m[2][0] * D->m[0][2] +
 M->m[3][0] * D->m[0][3];
 
-if (det < 1e-30) {/* non inversible */
+if (fabsf(det) < 1e-30) {/* non inversible */
 *D = *M; /* wine tests */
 return;
 }
-- 
2.16.2

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 1/4] st/nine: Fix bad tracking of bound vs textures

[Axel Davy]

An incorrect formula was used to compute bound_samplers_mask_vs.
Since s is above always 8 for vs and the variable is encoded on 8 bits,
it was always 0.
This resulted in commiting the samplers every call when
there was at least one texture read in the vs shader.

Signed-off-by: Axel Davy 
---
 src/gallium/state_trackers/nine/nine_state.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/gallium/state_trackers/nine/nine_state.c 
b/src/gallium/state_trackers/nine/nine_state.c
index 26b2dea3bd..c81a05a952 100644
--- a/src/gallium/state_trackers/nine/nine_state.c
+++ b/src/gallium/state_trackers/nine/nine_state.c
@@ -980,7 +980,7 @@ update_textures_and_samplers(struct NineDevice9 *device)
 context->changed.sampler[s] = ~0;
 }
 
-context->bound_samplers_mask_vs |= (1 << s);
+context->bound_samplers_mask_vs |= (1 << i);
 }
 
 cso_set_sampler_views(context->cso, PIPE_SHADER_VERTEX, num_textures, 
view);
-- 
2.16.2

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 3/4] st/nine: Fixes warning about implicit conversion

[Axel Davy]

Makes the conversion explicit.

Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=102542

Signed-off-by: Axel Davy 

CC: "17.3 18.0" 
---
 src/gallium/state_trackers/nine/nine_ff.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/gallium/state_trackers/nine/nine_ff.c 
b/src/gallium/state_trackers/nine/nine_ff.c
index eb673e4aff..6c30839b29 100644
--- a/src/gallium/state_trackers/nine/nine_ff.c
+++ b/src/gallium/state_trackers/nine/nine_ff.c
@@ -1935,7 +1935,7 @@ nine_ff_load_lights(struct NineDevice9 *device)
 dst[38 + l * 8].x = cosf(light->Theta * 0.5f);
 dst[38 + l * 8].y = cosf(light->Phi * 0.5f);
 dst[38 + l * 8].z = 1.0f / (dst[38 + l * 8].x - dst[38 + l * 8].y);
-dst[39 + l * 8].w = (l + 1) == context->ff.num_lights_active;
+dst[39 + l * 8].w = (float)((l + 1) == context->ff.num_lights_active);
 }
 }
 
-- 
2.16.2

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH v2] nir: lower_load_const_to_scalar fix for 8/16b types

[Jason Ekstrand]

Reviewed-by: Jason Ekstrand 

On Tue, Mar 13, 2018 at 2:39 PM, Rob Clark  wrote:

> Signed-off-by: Rob Clark 
> ---
> Now with switch (and also u64<-u64 copy instead of f64<-f64 for 64b)..
>
>  src/compiler/nir/nir_lower_load_const_to_scalar.c | 19
> +++
>  1 file changed, 15 insertions(+), 4 deletions(-)
>
> diff --git a/src/compiler/nir/nir_lower_load_const_to_scalar.c
> b/src/compiler/nir/nir_lower_load_const_to_scalar.c
> index e494facfd21..39447d42c23 100644
> --- a/src/compiler/nir/nir_lower_load_const_to_scalar.c
> +++ b/src/compiler/nir/nir_lower_load_const_to_scalar.c
> @@ -50,11 +50,22 @@ lower_load_const_instr_scalar(nir_load_const_instr
> *lower)
> for (unsigned i = 0; i < lower->def.num_components; i++) {
>nir_load_const_instr *load_comp =
>   nir_load_const_instr_create(b.shader, 1, lower->def.bit_size);
> -  if (lower->def.bit_size == 64)
> - load_comp->value.f64[0] = lower->value.f64[i];
> -  else
> +  switch (lower->def.bit_size) {
> +  case 64:
> + load_comp->value.u64[0] = lower->value.u64[i];
> + break;
> +  case 32:
>   load_comp->value.u32[0] = lower->value.u32[i];
> -  assert(lower->def.bit_size == 64 || lower->def.bit_size == 32);
> + break;
> +  case 16:
> + load_comp->value.u16[0] = lower->value.u16[i];
> + break;
> +  case 8:
> + load_comp->value.u8[0] = lower->value.u8[i];
> + break;
> +  default:
> + assert(!"invalid bit size");
> +  }
>nir_builder_instr_insert(, _comp->instr);
>loads[i] = _comp->def;
> }
> --
> 2.14.3
>
>
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH v2] nir: lower_load_const_to_scalar fix for 8/16b types

[Rob Clark]

Signed-off-by: Rob Clark 
---
Now with switch (and also u64<-u64 copy instead of f64<-f64 for 64b)..

 src/compiler/nir/nir_lower_load_const_to_scalar.c | 19 +++
 1 file changed, 15 insertions(+), 4 deletions(-)

diff --git a/src/compiler/nir/nir_lower_load_const_to_scalar.c 
b/src/compiler/nir/nir_lower_load_const_to_scalar.c
index e494facfd21..39447d42c23 100644
--- a/src/compiler/nir/nir_lower_load_const_to_scalar.c
+++ b/src/compiler/nir/nir_lower_load_const_to_scalar.c
@@ -50,11 +50,22 @@ lower_load_const_instr_scalar(nir_load_const_instr *lower)
for (unsigned i = 0; i < lower->def.num_components; i++) {
   nir_load_const_instr *load_comp =
  nir_load_const_instr_create(b.shader, 1, lower->def.bit_size);
-  if (lower->def.bit_size == 64)
- load_comp->value.f64[0] = lower->value.f64[i];
-  else
+  switch (lower->def.bit_size) {
+  case 64:
+ load_comp->value.u64[0] = lower->value.u64[i];
+ break;
+  case 32:
  load_comp->value.u32[0] = lower->value.u32[i];
-  assert(lower->def.bit_size == 64 || lower->def.bit_size == 32);
+ break;
+  case 16:
+ load_comp->value.u16[0] = lower->value.u16[i];
+ break;
+  case 8:
+ load_comp->value.u8[0] = lower->value.u8[i];
+ break;
+  default:
+ assert(!"invalid bit size");
+  }
   nir_builder_instr_insert(, _comp->instr);
   loads[i] = _comp->def;
}
-- 
2.14.3

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH] dri3: allow building against older xcb (v3)

[Dylan Baker]

Quoting Rob Clark (2018-03-13 14:08:46)
> On Tue, Mar 13, 2018 at 4:48 PM, Dylan Baker  wrote:
> > Quoting Dave Airlie (2018-03-13 13:06:00)
> >> From: Dave Airlie 
> >>
> >> I'm not sure everyone wants to be updating their dri3 in a forced
> >> march setting, this allows a nicer approach, esp when you want
> >> to build on distro that aren't brand new.
> >>
> >> I'm sure there are plenty of ways this patch could be cleaner,
> >> and I've also not built it against an updated dri3.
> >>
> >> For meson I've just left it alone, since if you are using meson
> >> you probably don't mind xcb updates, and if you are using meson
> >> you can fix this better than me.
> >>
> >> v3: just don't put a version in for dri3/present without
> >> modifiers, should allow building with 1.11 as well
> >>
> >> (feel free to supply meson followups)
> >>
> >> Signed-off-by: Dave Airlie 
> >> ---
> >>  configure.ac | 12 +---
> >>  meson.build  |  2 +-
> >>  src/egl/drivers/dri2/platform_x11_dri3.c |  4 
> >>  src/loader/loader_dri3_helper.c  | 22 --
> >>  src/loader/loader_dri3_helper.h  |  3 ++-
> >>  src/vulkan/wsi/wsi_common_x11.c  | 12 ++--
> >>  6 files changed, 42 insertions(+), 13 deletions(-)
> >>
> >> diff --git a/configure.ac b/configure.ac
> >> index 1553ce99da..dcf3f924ee 100644
> >> --- a/configure.ac
> >> +++ b/configure.ac
> >> @@ -92,9 +92,9 @@ WAYLAND_REQUIRED=1.11
> >>  WAYLAND_PROTOCOLS_REQUIRED=1.8
> >>  XCB_REQUIRED=1.9.3
> >>  XCBDRI2_REQUIRED=1.8
> >> -XCBDRI3_REQUIRED=1.13
> >> +XCBDRI3_MODIFIERS_REQUIRED=1.13
> >>  XCBGLX_REQUIRED=1.8.1
> >> -XCBPRESENT_REQUIRED=1.13
> >> +XCBPRESENT_MODIFIERS_REQUIRED=1.13
> >>  XDAMAGE_REQUIRED=1.1
> >>  XSHMFENCE_REQUIRED=1.1
> >>  XVMC_REQUIRED=1.0.6
> >> @@ -1851,8 +1851,14 @@ fi
> >>  if test x"$enable_dri3" = xyes; then
> >>  DEFINES="$DEFINES -DHAVE_DRI3"
> >>
> >> -dri3_modules="x11-xcb xcb >= $XCB_REQUIRED xcb-dri3 >= 
> >> $XCBDRI3_REQUIRED xcb-xfixes xcb-present >= $XCBPRESENT_REQUIRED xcb-sync 
> >> xshmfence >= $XSHMFENCE_REQUIRED"
> >> +dri3_modules="x11-xcb xcb >= $XCB_REQUIRED xcb-dri3 xcb-xfixes 
> >> xcb-present xcb-sync xshmfence >= $XSHMFENCE_REQUIRED"
> >>  PKG_CHECK_MODULES([XCB_DRI3], [$dri3_modules])
> >> +dri3_modifier_modules="xcb-dri3 >= $XCBDRI3_MODIFIERS_REQUIRED 
> >> xcb-present >= $XCBPRESENT_MODIFIERS_REQUIRES"
> >> +PKG_CHECK_MODULES([XCB_DRI3_MODIFIERS], [$dri3_modifier_modules], 
> >> [have_dri3_modifiers=yes], [have_dri3_modifiers=no])
> >> +
> >> +if test "x$have_dri3_modifiers" == xyes; then
> >> +DEFINES="$DEFINES -DHAVE_DRI3_MODIFIERS"
> >> +fi
> >>  fi
> >>
> >>  AM_CONDITIONAL(HAVE_PLATFORM_X11, echo "$platforms" | grep -q 'x11')
> >> diff --git a/meson.build b/meson.build
> >> index 3c63f38438..0012815254 100644
> >> --- a/meson.build
> >> +++ b/meson.build
> >> @@ -1235,7 +1235,7 @@ if with_platform_x11
> >>  dep_xcb_dri2 = dependency('xcb-dri2', version : '>= 1.8')
> >>
> >>  if with_dri3
> >> -  pre_args += '-DHAVE_DRI3'
> >> +  pre_args += '-DHAVE_DRI3 -DHAVE_DRI3_MODIFIERS'
> >
> > That should be `pre_args += ['-DHAVE_DRI3', '-DHAVE_DRI3_MODFIERS']`
> >
> > I don't personally care about libxcb < 1.13, so this approach is fine with 
> > me. I
> > don't the that the version of meson that ships with any of the LTS/EL type
> > releases this matters for will build mesa anyway.
> >
> 
> fwiw, f27 doesn't (yet?) have xcb 1.13, which makes me wonder who else
> (who isn't building their own xcb) does, other than rawhide and
> similar bleeding edge distro versions.. f27 isn't exactly ancient,
> which makes me think the hard dependency on xcb 1.13 is a bit
> premature.
> 
> (also, as nir+clover gets a bit more functional, I could totally see
> users want to build latest mesa with something that is
> modern-but-not-bleeding-edge distro.. although I guess we could just
> tell them to use autotools.. still annoying for me since I'd prefer to
> use meson ;-))
> 
> but I can have a go at a similar patch for meson

More seriously, feel free to CC me on that for review if you like.

Dylan


signature.asc
Description: signature
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH] dri3: allow building against older xcb (v3)

[Dylan Baker]

Quoting Rob Clark (2018-03-13 14:08:46)
> On Tue, Mar 13, 2018 at 4:48 PM, Dylan Baker  wrote:
> > Quoting Dave Airlie (2018-03-13 13:06:00)
> >> From: Dave Airlie 
> >>
> >> I'm not sure everyone wants to be updating their dri3 in a forced
> >> march setting, this allows a nicer approach, esp when you want
> >> to build on distro that aren't brand new.
> >>
> >> I'm sure there are plenty of ways this patch could be cleaner,
> >> and I've also not built it against an updated dri3.
> >>
> >> For meson I've just left it alone, since if you are using meson
> >> you probably don't mind xcb updates, and if you are using meson
> >> you can fix this better than me.
> >>
> >> v3: just don't put a version in for dri3/present without
> >> modifiers, should allow building with 1.11 as well
> >>
> >> (feel free to supply meson followups)
> >>
> >> Signed-off-by: Dave Airlie 
> >> ---
> >>  configure.ac | 12 +---
> >>  meson.build  |  2 +-
> >>  src/egl/drivers/dri2/platform_x11_dri3.c |  4 
> >>  src/loader/loader_dri3_helper.c  | 22 --
> >>  src/loader/loader_dri3_helper.h  |  3 ++-
> >>  src/vulkan/wsi/wsi_common_x11.c  | 12 ++--
> >>  6 files changed, 42 insertions(+), 13 deletions(-)
> >>
> >> diff --git a/configure.ac b/configure.ac
> >> index 1553ce99da..dcf3f924ee 100644
> >> --- a/configure.ac
> >> +++ b/configure.ac
> >> @@ -92,9 +92,9 @@ WAYLAND_REQUIRED=1.11
> >>  WAYLAND_PROTOCOLS_REQUIRED=1.8
> >>  XCB_REQUIRED=1.9.3
> >>  XCBDRI2_REQUIRED=1.8
> >> -XCBDRI3_REQUIRED=1.13
> >> +XCBDRI3_MODIFIERS_REQUIRED=1.13
> >>  XCBGLX_REQUIRED=1.8.1
> >> -XCBPRESENT_REQUIRED=1.13
> >> +XCBPRESENT_MODIFIERS_REQUIRED=1.13
> >>  XDAMAGE_REQUIRED=1.1
> >>  XSHMFENCE_REQUIRED=1.1
> >>  XVMC_REQUIRED=1.0.6
> >> @@ -1851,8 +1851,14 @@ fi
> >>  if test x"$enable_dri3" = xyes; then
> >>  DEFINES="$DEFINES -DHAVE_DRI3"
> >>
> >> -dri3_modules="x11-xcb xcb >= $XCB_REQUIRED xcb-dri3 >= 
> >> $XCBDRI3_REQUIRED xcb-xfixes xcb-present >= $XCBPRESENT_REQUIRED xcb-sync 
> >> xshmfence >= $XSHMFENCE_REQUIRED"
> >> +dri3_modules="x11-xcb xcb >= $XCB_REQUIRED xcb-dri3 xcb-xfixes 
> >> xcb-present xcb-sync xshmfence >= $XSHMFENCE_REQUIRED"
> >>  PKG_CHECK_MODULES([XCB_DRI3], [$dri3_modules])
> >> +dri3_modifier_modules="xcb-dri3 >= $XCBDRI3_MODIFIERS_REQUIRED 
> >> xcb-present >= $XCBPRESENT_MODIFIERS_REQUIRES"
> >> +PKG_CHECK_MODULES([XCB_DRI3_MODIFIERS], [$dri3_modifier_modules], 
> >> [have_dri3_modifiers=yes], [have_dri3_modifiers=no])
> >> +
> >> +if test "x$have_dri3_modifiers" == xyes; then
> >> +DEFINES="$DEFINES -DHAVE_DRI3_MODIFIERS"
> >> +fi
> >>  fi
> >>
> >>  AM_CONDITIONAL(HAVE_PLATFORM_X11, echo "$platforms" | grep -q 'x11')
> >> diff --git a/meson.build b/meson.build
> >> index 3c63f38438..0012815254 100644
> >> --- a/meson.build
> >> +++ b/meson.build
> >> @@ -1235,7 +1235,7 @@ if with_platform_x11
> >>  dep_xcb_dri2 = dependency('xcb-dri2', version : '>= 1.8')
> >>
> >>  if with_dri3
> >> -  pre_args += '-DHAVE_DRI3'
> >> +  pre_args += '-DHAVE_DRI3 -DHAVE_DRI3_MODIFIERS'
> >
> > That should be `pre_args += ['-DHAVE_DRI3', '-DHAVE_DRI3_MODFIERS']`
> >
> > I don't personally care about libxcb < 1.13, so this approach is fine with 
> > me. I
> > don't the that the version of meson that ships with any of the LTS/EL type
> > releases this matters for will build mesa anyway.
> >
> 
> fwiw, f27 doesn't (yet?) have xcb 1.13, which makes me wonder who else
> (who isn't building their own xcb) does, other than rawhide and
> similar bleeding edge distro versions.. f27 isn't exactly ancient,
> which makes me think the hard dependency on xcb 1.13 is a bit
> premature.

Archlinux does! You know, the distro that ships the latest version, whether it
works or not! ;)

Dylan


signature.asc
Description: signature
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH] dri3: allow building against older xcb (v3)

[Rob Clark]

On Tue, Mar 13, 2018 at 4:48 PM, Dylan Baker  wrote:
> Quoting Dave Airlie (2018-03-13 13:06:00)
>> From: Dave Airlie 
>>
>> I'm not sure everyone wants to be updating their dri3 in a forced
>> march setting, this allows a nicer approach, esp when you want
>> to build on distro that aren't brand new.
>>
>> I'm sure there are plenty of ways this patch could be cleaner,
>> and I've also not built it against an updated dri3.
>>
>> For meson I've just left it alone, since if you are using meson
>> you probably don't mind xcb updates, and if you are using meson
>> you can fix this better than me.
>>
>> v3: just don't put a version in for dri3/present without
>> modifiers, should allow building with 1.11 as well
>>
>> (feel free to supply meson followups)
>>
>> Signed-off-by: Dave Airlie 
>> ---
>>  configure.ac | 12 +---
>>  meson.build  |  2 +-
>>  src/egl/drivers/dri2/platform_x11_dri3.c |  4 
>>  src/loader/loader_dri3_helper.c  | 22 --
>>  src/loader/loader_dri3_helper.h  |  3 ++-
>>  src/vulkan/wsi/wsi_common_x11.c  | 12 ++--
>>  6 files changed, 42 insertions(+), 13 deletions(-)
>>
>> diff --git a/configure.ac b/configure.ac
>> index 1553ce99da..dcf3f924ee 100644
>> --- a/configure.ac
>> +++ b/configure.ac
>> @@ -92,9 +92,9 @@ WAYLAND_REQUIRED=1.11
>>  WAYLAND_PROTOCOLS_REQUIRED=1.8
>>  XCB_REQUIRED=1.9.3
>>  XCBDRI2_REQUIRED=1.8
>> -XCBDRI3_REQUIRED=1.13
>> +XCBDRI3_MODIFIERS_REQUIRED=1.13
>>  XCBGLX_REQUIRED=1.8.1
>> -XCBPRESENT_REQUIRED=1.13
>> +XCBPRESENT_MODIFIERS_REQUIRED=1.13
>>  XDAMAGE_REQUIRED=1.1
>>  XSHMFENCE_REQUIRED=1.1
>>  XVMC_REQUIRED=1.0.6
>> @@ -1851,8 +1851,14 @@ fi
>>  if test x"$enable_dri3" = xyes; then
>>  DEFINES="$DEFINES -DHAVE_DRI3"
>>
>> -dri3_modules="x11-xcb xcb >= $XCB_REQUIRED xcb-dri3 >= 
>> $XCBDRI3_REQUIRED xcb-xfixes xcb-present >= $XCBPRESENT_REQUIRED xcb-sync 
>> xshmfence >= $XSHMFENCE_REQUIRED"
>> +dri3_modules="x11-xcb xcb >= $XCB_REQUIRED xcb-dri3 xcb-xfixes 
>> xcb-present xcb-sync xshmfence >= $XSHMFENCE_REQUIRED"
>>  PKG_CHECK_MODULES([XCB_DRI3], [$dri3_modules])
>> +dri3_modifier_modules="xcb-dri3 >= $XCBDRI3_MODIFIERS_REQUIRED 
>> xcb-present >= $XCBPRESENT_MODIFIERS_REQUIRES"
>> +PKG_CHECK_MODULES([XCB_DRI3_MODIFIERS], [$dri3_modifier_modules], 
>> [have_dri3_modifiers=yes], [have_dri3_modifiers=no])
>> +
>> +if test "x$have_dri3_modifiers" == xyes; then
>> +DEFINES="$DEFINES -DHAVE_DRI3_MODIFIERS"
>> +fi
>>  fi
>>
>>  AM_CONDITIONAL(HAVE_PLATFORM_X11, echo "$platforms" | grep -q 'x11')
>> diff --git a/meson.build b/meson.build
>> index 3c63f38438..0012815254 100644
>> --- a/meson.build
>> +++ b/meson.build
>> @@ -1235,7 +1235,7 @@ if with_platform_x11
>>  dep_xcb_dri2 = dependency('xcb-dri2', version : '>= 1.8')
>>
>>  if with_dri3
>> -  pre_args += '-DHAVE_DRI3'
>> +  pre_args += '-DHAVE_DRI3 -DHAVE_DRI3_MODIFIERS'
>
> That should be `pre_args += ['-DHAVE_DRI3', '-DHAVE_DRI3_MODFIERS']`
>
> I don't personally care about libxcb < 1.13, so this approach is fine with 
> me. I
> don't the that the version of meson that ships with any of the LTS/EL type
> releases this matters for will build mesa anyway.
>

fwiw, f27 doesn't (yet?) have xcb 1.13, which makes me wonder who else
(who isn't building their own xcb) does, other than rawhide and
similar bleeding edge distro versions.. f27 isn't exactly ancient,
which makes me think the hard dependency on xcb 1.13 is a bit
premature.

(also, as nir+clover gets a bit more functional, I could totally see
users want to build latest mesa with something that is
modern-but-not-bleeding-edge distro.. although I guess we could just
tell them to use autotools.. still annoying for me since I'd prefer to
use meson ;-))

but I can have a go at a similar patch for meson

BR,
-R
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH] radv: fix vkGetDeviceQueue2() when create flags don't match

[Samuel Pitoiset]

This fixes CTS:
dEQP-VK.api.device_init.create_device_queue2_unmatched_flags

Signed-off-by: Samuel Pitoiset 
---
 src/amd/vulkan/radv_device.c  | 23 +--
 src/amd/vulkan/radv_private.h |  1 +
 2 files changed, 22 insertions(+), 2 deletions(-)

diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c
index 0ed3e27c7bc..13b2da584e5 100644
--- a/src/amd/vulkan/radv_device.c
+++ b/src/amd/vulkan/radv_device.c
@@ -1106,6 +1106,7 @@ radv_get_queue_global_priority(const 
VkDeviceQueueGlobalPriorityCreateInfoEXT *p
 static int
 radv_queue_init(struct radv_device *device, struct radv_queue *queue,
uint32_t queue_family_index, int idx,
+   VkDeviceQueueCreateFlags flags,
const VkDeviceQueueGlobalPriorityCreateInfoEXT *global_priority)
 {
queue->_loader_data.loaderMagic = ICD_LOADER_MAGIC;
@@ -1113,6 +1114,7 @@ radv_queue_init(struct radv_device *device, struct 
radv_queue *queue,
queue->queue_family_index = queue_family_index;
queue->queue_idx = idx;
queue->priority = radv_get_queue_global_priority(global_priority);
+   queue->flags = flags;
 
queue->hw_ctx = device->ws->ctx_create(device->ws, queue->priority);
if (!queue->hw_ctx)
@@ -1266,7 +1268,9 @@ VkResult radv_CreateDevice(
device->queue_count[qfi] = queue_create->queueCount;
 
for (unsigned q = 0; q < queue_create->queueCount; q++) {
-   result = radv_queue_init(device, 
>queues[qfi][q], qfi, q, global_priority);
+   result = radv_queue_init(device, 
>queues[qfi][q],
+qfi, q, queue_create->flags,
+global_priority);
if (result != VK_SUCCESS)
goto fail;
}
@@ -1454,8 +1458,23 @@ void radv_GetDeviceQueue2(
VkQueue*pQueue)
 {
RADV_FROM_HANDLE(radv_device, device, _device);
+   struct radv_queue *queue;
+
+   queue = 
>queues[pQueueInfo->queueFamilyIndex][pQueueInfo->queueIndex];
+   if (pQueueInfo->flags != queue->flags) {
+   /* From the Vulkan 1.1.70 spec:
+*
+* "The queue returned by vkGetDeviceQueue2 must have the same
+* flags value from this structure as that used at device
+* creation time in a VkDeviceQueueCreateInfo instance. If no
+* matching flags were specified at device creation time then
+* pQueue will return VK_NULL_HANDLE."
+*/
+   *pQueue = VK_NULL_HANDLE;
+   return;
+   }
 
-   *pQueue = 
radv_queue_to_handle(>queues[pQueueInfo->queueFamilyIndex][pQueueInfo->queueIndex]);
+   *pQueue = radv_queue_to_handle(queue);
 }
 
 void radv_GetDeviceQueue(
diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h
index 439522585a7..35c3f411645 100644
--- a/src/amd/vulkan/radv_private.h
+++ b/src/amd/vulkan/radv_private.h
@@ -573,6 +573,7 @@ struct radv_queue {
enum radeon_ctx_priority priority;
uint32_t queue_family_index;
int queue_idx;
+   VkDeviceQueueCreateFlags flags;
 
uint32_t scratch_size;
uint32_t compute_scratch_size;
-- 
2.16.2

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH] dri3: allow building against older xcb (v3)

[Dylan Baker]

Quoting Dave Airlie (2018-03-13 13:06:00)
> From: Dave Airlie 
> 
> I'm not sure everyone wants to be updating their dri3 in a forced
> march setting, this allows a nicer approach, esp when you want
> to build on distro that aren't brand new.
> 
> I'm sure there are plenty of ways this patch could be cleaner,
> and I've also not built it against an updated dri3.
> 
> For meson I've just left it alone, since if you are using meson
> you probably don't mind xcb updates, and if you are using meson
> you can fix this better than me.
> 
> v3: just don't put a version in for dri3/present without
> modifiers, should allow building with 1.11 as well
> 
> (feel free to supply meson followups)
> 
> Signed-off-by: Dave Airlie 
> ---
>  configure.ac | 12 +---
>  meson.build  |  2 +-
>  src/egl/drivers/dri2/platform_x11_dri3.c |  4 
>  src/loader/loader_dri3_helper.c  | 22 --
>  src/loader/loader_dri3_helper.h  |  3 ++-
>  src/vulkan/wsi/wsi_common_x11.c  | 12 ++--
>  6 files changed, 42 insertions(+), 13 deletions(-)
> 
> diff --git a/configure.ac b/configure.ac
> index 1553ce99da..dcf3f924ee 100644
> --- a/configure.ac
> +++ b/configure.ac
> @@ -92,9 +92,9 @@ WAYLAND_REQUIRED=1.11
>  WAYLAND_PROTOCOLS_REQUIRED=1.8
>  XCB_REQUIRED=1.9.3
>  XCBDRI2_REQUIRED=1.8
> -XCBDRI3_REQUIRED=1.13
> +XCBDRI3_MODIFIERS_REQUIRED=1.13
>  XCBGLX_REQUIRED=1.8.1
> -XCBPRESENT_REQUIRED=1.13
> +XCBPRESENT_MODIFIERS_REQUIRED=1.13
>  XDAMAGE_REQUIRED=1.1
>  XSHMFENCE_REQUIRED=1.1
>  XVMC_REQUIRED=1.0.6
> @@ -1851,8 +1851,14 @@ fi
>  if test x"$enable_dri3" = xyes; then
>  DEFINES="$DEFINES -DHAVE_DRI3"
>  
> -dri3_modules="x11-xcb xcb >= $XCB_REQUIRED xcb-dri3 >= $XCBDRI3_REQUIRED 
> xcb-xfixes xcb-present >= $XCBPRESENT_REQUIRED xcb-sync xshmfence >= 
> $XSHMFENCE_REQUIRED"
> +dri3_modules="x11-xcb xcb >= $XCB_REQUIRED xcb-dri3 xcb-xfixes 
> xcb-present xcb-sync xshmfence >= $XSHMFENCE_REQUIRED"
>  PKG_CHECK_MODULES([XCB_DRI3], [$dri3_modules])
> +dri3_modifier_modules="xcb-dri3 >= $XCBDRI3_MODIFIERS_REQUIRED 
> xcb-present >= $XCBPRESENT_MODIFIERS_REQUIRES"
> +PKG_CHECK_MODULES([XCB_DRI3_MODIFIERS], [$dri3_modifier_modules], 
> [have_dri3_modifiers=yes], [have_dri3_modifiers=no])
> +
> +if test "x$have_dri3_modifiers" == xyes; then
> +DEFINES="$DEFINES -DHAVE_DRI3_MODIFIERS"
> +fi
>  fi
>  
>  AM_CONDITIONAL(HAVE_PLATFORM_X11, echo "$platforms" | grep -q 'x11')
> diff --git a/meson.build b/meson.build
> index 3c63f38438..0012815254 100644
> --- a/meson.build
> +++ b/meson.build
> @@ -1235,7 +1235,7 @@ if with_platform_x11
>  dep_xcb_dri2 = dependency('xcb-dri2', version : '>= 1.8')
>  
>  if with_dri3
> -  pre_args += '-DHAVE_DRI3'
> +  pre_args += '-DHAVE_DRI3 -DHAVE_DRI3_MODIFIERS'

That should be `pre_args += ['-DHAVE_DRI3', '-DHAVE_DRI3_MODFIERS']`

I don't personally care about libxcb < 1.13, so this approach is fine with me. I
don't the that the version of meson that ships with any of the LTS/EL type
releases this matters for will build mesa anyway.

Dylan


signature.asc
Description: signature
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [RFC] Mesa 17.3.x release problems and process improvements

[Mark Janes]

Daniel Vetter  writes:

> On Tue, Mar 13, 2018 at 4:46 PM, Mark Janes  wrote:
>> Daniel Vetter  writes:
>>
>>> On Mon, Mar 12, 2018 at 11:54:45PM -0700, Kenneth Graunke wrote:
 On Friday, March 9, 2018 12:12:28 PM PDT Mark Janes wrote:
 [snip]
 > I've been doing this for Intel.  Developers are on the hook to fix their
 > bugs, but you can't make them do it.  They have many pressures on them,
 > and a maintainer can't make the call as to whether a rendering bug is
 > more important than day-1 vulkan conformance, for example.
 >
 > We could heighten the transparency of what is blocking the build by
 > publicizing the authors of bisected blocking bugs to Phoronix, which
 > might get things moving.

 I hope you're being sarcastic here, or else I'm misunderstanding your
 proposal.  Public shaming of developers who create bugs has absolutely
 no place in the Mesa community, IMHO.  It would foster the kind of toxic
 community that none of us want to be a part of.

 Sometimes, people who create bugs are the very people that work the
 hardest, who the project may not even exist without.  Would you want
 to chew out someone for creating a bug in a Vulkan driver when...if it
 weren't for that person, you wouldn't have a Vulkan driver at all?  Or,
 maybe they caused a couple bad bugs...but also fixed hundreds of them.

 Other times, they're new contributors or volunteers who do this, not as
 their day job.  Frankly, those people are under no obligation to help us
 at all, so we need to thank them and appreciate the time and effort they
 spend - and give them a hand fixing things when they're too busy, or
 don't have the relevant hardware or skill to track down a regression.

 It's easy to be pissed off when there are bugs, and things seem to not
 be making progress, but let's try and keep things positive and work
 together to make Mesa the best we can.
>>>
>>> I'd like to second this with my experience from the kernel community. The
>>> public shaming game for when you create a regression is very strong there,
>>> lead by Linus Torvalds. In my experience this directly causes:
>>>
>>> - Maintainers to hide bug reports and regressions reports at all costs,
>>>   because having Linus destroy you just aint never worth it. The meta game
>>>   becomes "avoid getting railed" instead of "deliver quality code", and
>>>   there's lots of ways to easily achieve the former that serious hurt the
>>>   latter.
>>>
>>> - Best practice (in my experience) is to not mention the dreaded
>>>   "REGRESSION" tag when you need another maintainer's help to fix a
>>>   regression, because it's too likely they'll just panic. That means they
>>>   start screaming at you to go away, or brain locks up and they can't
>>>   effectively help you track down the bug (seen both cases).
>>>
>>> - Creates a culture where talking about process/tooling improvements to
>>>   prevent regressions and/or handle them quicker becomes too dangerous,
>>>   because it all turns into a personal shaming game of who maintains the
>>>   worst subsystem.
>>>
>>> Long term you end up with a culture fucked up for good :-/
>>>
>>> Imo the only way to make this better is to try analyzing why a regressions
>>> happened, and fix the tooling to prevent that in the future. Maybe better
>>> test coverage (and long term efforts to fix known gaps), maybe better
>>> presentation of automated checks (stuff like github pull requests that
>>> automatically run CI and report full results, blocking the merge if
>>> anything is amiss).
>>
>> You have to have a very strong CI to use it to block commits.  i965 Mesa
>> has a big CI which identifies many regressions, but I wouldn't want to
>> checkpoint commits in an automated way.  A large pool of obsolete
>> CI hardware will have lower reliability than the mesa master branch --
>> which generates noise for developers and impedes progress.
>
> This was all in general about blaming regressions on people, not
> specifically for the stable-backporting-from-master issue here.
>
> And if parts of your CI can't autogate then you can make it more
> informal - there's definitely stuff you want to autogate, like "does
> it compile everywhere in all configs", and probably you don't want to
> autogate on gen2 dying :-)

It's a bit different for us, because multiple companies and volunteers
can push.  We have a buildtest which prevents intel engineers and any CI
user from breaking radeon for example.  However, radeon still breaks
when AMD devs push LLVM-version-dependent patches.  We can't stop that,
and there are a set of similar situations where builds break.  Reverts
and quick fixes are fine for this IMO.

> My point was if you don't want regressions, make it as easy as
> possible for people to never push a regression (whether master or
> stable trees) instead of a 

Re: [Mesa-dev] [PATCH 0/2] nir: Move the si vote lowering to common code

[Jason Ekstrand]

On Tue, Mar 13, 2018 at 11:39 AM, Bas Nieuwenhuizen  wrote:

> Thanks a lot!
>

You're welcome.  Classic case of writing code is easier than reviewing it.
:-)


> Reviewed-by: Bas Nieuwenhuizen 
>

Thanks!  Pushed.


> for the series.
>
> On Sat, Mar 10, 2018 at 7:42 PM, Jason Ekstrand 
> wrote:
> > On Sat, Mar 10, 2018 at 10:18 AM, Jason Ekstrand 
> > wrote:
> >>
> >> This tiny series moves the pass that Bas wrote for lowering vote
> >> instructions to ballots into common code.  As you can see from the
> >> diffstat
> >> below, it cuts the size of the pass in half by removing boilerplate.
> The
> >> new version (in nir_lower_subgroups) also contains two bugfixes:
> >>
> >>  1) The old pass wasn't actually inserting the RFI instruction
> >>
> >>  2) The old pass wouldn't handle NaN correctly in feq because it
> switched
> >> to effectively using ineg(fne(a, b)) which is not the same as feq(a,
> >> b)
> >> when NaN is present.
> >>
> >> This has not been tested at all beyond compile-testing (and I didn't
> even
> >> compile-test radv).
> >
> >
> > I hacked up anv to use it and ran the subgroups tests from the 1.1 CTS.
> > This pointed out some bugs which I've now fixed and I sent a v2 which
> works
> > at least for anv.
> >
> >>
> >> Cc: Bas Nieuwenhuizen 
> >> Cc: Timothy Arceri 
> >>
> >> Jason Ekstrand (2):
> >>   nir/subgroups: Add lowering for vote_ieq/vote_feq to a ballot
> >>   ac/nir: Use lower_vote_eq_to_ballot instead of ac_nir_lower_subgroups
> >>
> >>  src/amd/Makefile.sources |  1 -
> >>  src/amd/common/ac_lower_subgroups.c  | 92
> >> 
> >>  src/amd/common/ac_nir_to_llvm.c  |  3 -
> >>  src/amd/common/ac_nir_to_llvm.h  |  2 -
> >>  src/amd/common/meson.build   |  1 -
> >>  src/compiler/nir/nir.h   |  1 +
> >>  src/compiler/nir/nir_lower_subgroups.c   | 48 +++
> >>  src/gallium/drivers/radeonsi/si_shader_nir.c |  1 +
> >>  8 files changed, 50 insertions(+), 99 deletions(-)
> >>  delete mode 100644 src/amd/common/ac_lower_subgroups.c
> >>
> >> --
> >> 2.5.0.400.gff86faf
> >>
> >
>
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH] nir: lower_load_const_to_scalar fix for 8/16b types

[Jason Ekstrand]

On Tue, Mar 13, 2018 at 12:45 PM, Rob Clark  wrote:

> Signed-off-by: Rob Clark 
> ---
>  src/compiler/nir/nir_lower_load_const_to_scalar.c | 9 +++--
>  1 file changed, 7 insertions(+), 2 deletions(-)
>
> diff --git a/src/compiler/nir/nir_lower_load_const_to_scalar.c
> b/src/compiler/nir/nir_lower_load_const_to_scalar.c
> index e494facfd21..9d37e3fecef 100644
> --- a/src/compiler/nir/nir_lower_load_const_to_scalar.c
> +++ b/src/compiler/nir/nir_lower_load_const_to_scalar.c
> @@ -52,9 +52,14 @@ lower_load_const_instr_scalar(nir_load_const_instr
> *lower)
>   nir_load_const_instr_create(b.shader, 1, lower->def.bit_size);
>if (lower->def.bit_size == 64)
>   load_comp->value.f64[0] = lower->value.f64[i];
> -  else
> +  else if (lower->def.bit_size == 32)
>   load_comp->value.u32[0] = lower->value.u32[i];
> -  assert(lower->def.bit_size == 64 || lower->def.bit_size == 32);
> +  else if (lower->def.bit_size == 16)
> + load_comp->value.u16[0] = lower->value.u16[i];
> +  else if (lower->def.bit_size == 8)
> + load_comp->value.u8[0] = lower->value.u8[i];
> +  else
> + assert(!"invalid bit size");
>

Let's make it a switch since we have 4 cases which are all == constant.


>nir_builder_instr_insert(, _comp->instr);
>loads[i] = _comp->def;
> }
> --
> 2.14.3
>
>
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH] dri3: allow building against older xcb (v3)

[Dave Airlie]

From: Dave Airlie 

I'm not sure everyone wants to be updating their dri3 in a forced
march setting, this allows a nicer approach, esp when you want
to build on distro that aren't brand new.

I'm sure there are plenty of ways this patch could be cleaner,
and I've also not built it against an updated dri3.

For meson I've just left it alone, since if you are using meson
you probably don't mind xcb updates, and if you are using meson
you can fix this better than me.

v3: just don't put a version in for dri3/present without
modifiers, should allow building with 1.11 as well

(feel free to supply meson followups)

Signed-off-by: Dave Airlie 
---
 configure.ac | 12 +---
 meson.build  |  2 +-
 src/egl/drivers/dri2/platform_x11_dri3.c |  4 
 src/loader/loader_dri3_helper.c  | 22 --
 src/loader/loader_dri3_helper.h  |  3 ++-
 src/vulkan/wsi/wsi_common_x11.c  | 12 ++--
 6 files changed, 42 insertions(+), 13 deletions(-)

diff --git a/configure.ac b/configure.ac
index 1553ce99da..dcf3f924ee 100644
--- a/configure.ac
+++ b/configure.ac
@@ -92,9 +92,9 @@ WAYLAND_REQUIRED=1.11
 WAYLAND_PROTOCOLS_REQUIRED=1.8
 XCB_REQUIRED=1.9.3
 XCBDRI2_REQUIRED=1.8
-XCBDRI3_REQUIRED=1.13
+XCBDRI3_MODIFIERS_REQUIRED=1.13
 XCBGLX_REQUIRED=1.8.1
-XCBPRESENT_REQUIRED=1.13
+XCBPRESENT_MODIFIERS_REQUIRED=1.13
 XDAMAGE_REQUIRED=1.1
 XSHMFENCE_REQUIRED=1.1
 XVMC_REQUIRED=1.0.6
@@ -1851,8 +1851,14 @@ fi
 if test x"$enable_dri3" = xyes; then
 DEFINES="$DEFINES -DHAVE_DRI3"
 
-dri3_modules="x11-xcb xcb >= $XCB_REQUIRED xcb-dri3 >= $XCBDRI3_REQUIRED 
xcb-xfixes xcb-present >= $XCBPRESENT_REQUIRED xcb-sync xshmfence >= 
$XSHMFENCE_REQUIRED"
+dri3_modules="x11-xcb xcb >= $XCB_REQUIRED xcb-dri3 xcb-xfixes xcb-present 
xcb-sync xshmfence >= $XSHMFENCE_REQUIRED"
 PKG_CHECK_MODULES([XCB_DRI3], [$dri3_modules])
+dri3_modifier_modules="xcb-dri3 >= $XCBDRI3_MODIFIERS_REQUIRED xcb-present 
>= $XCBPRESENT_MODIFIERS_REQUIRES"
+PKG_CHECK_MODULES([XCB_DRI3_MODIFIERS], [$dri3_modifier_modules], 
[have_dri3_modifiers=yes], [have_dri3_modifiers=no])
+
+if test "x$have_dri3_modifiers" == xyes; then
+DEFINES="$DEFINES -DHAVE_DRI3_MODIFIERS"
+fi
 fi
 
 AM_CONDITIONAL(HAVE_PLATFORM_X11, echo "$platforms" | grep -q 'x11')
diff --git a/meson.build b/meson.build
index 3c63f38438..0012815254 100644
--- a/meson.build
+++ b/meson.build
@@ -1235,7 +1235,7 @@ if with_platform_x11
 dep_xcb_dri2 = dependency('xcb-dri2', version : '>= 1.8')
 
 if with_dri3
-  pre_args += '-DHAVE_DRI3'
+  pre_args += '-DHAVE_DRI3 -DHAVE_DRI3_MODIFIERS'
   dep_xcb_dri3 = dependency('xcb-dri3', version : '>= 1.13')
   dep_xcb_present = dependency('xcb-present', version: '>= 1.13')
   dep_xcb_sync = dependency('xcb-sync')
diff --git a/src/egl/drivers/dri2/platform_x11_dri3.c 
b/src/egl/drivers/dri2/platform_x11_dri3.c
index dce33561a6..de60e952da 100644
--- a/src/egl/drivers/dri2/platform_x11_dri3.c
+++ b/src/egl/drivers/dri2/platform_x11_dri3.c
@@ -327,6 +327,7 @@ dri3_create_image_khr_pixmap_from_buffers(_EGLDisplay 
*disp, _EGLContext *ctx,
   EGLClientBuffer buffer,
   const EGLint *attr_list)
 {
+#ifdef HAVE_DRI3_MODIFIERS
struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp);
struct dri2_egl_image *dri2_img;
xcb_dri3_buffers_from_pixmap_cookie_t bp_cookie;
@@ -376,6 +377,9 @@ dri3_create_image_khr_pixmap_from_buffers(_EGLDisplay 
*disp, _EGLContext *ctx,
}
 
return _img->base;
+#else
+   return NULL;
+#endif
 }
 
 static _EGLImage *
diff --git a/src/loader/loader_dri3_helper.c b/src/loader/loader_dri3_helper.c
index 585f7ce3ec..c1d94c3c21 100644
--- a/src/loader/loader_dri3_helper.c
+++ b/src/loader/loader_dri3_helper.c
@@ -389,6 +389,7 @@ dri3_handle_present_event(struct loader_dri3_drawable *draw,
 /* If the server tells us that our allocation is suboptimal, we
   * reallocate once.
   */
+#ifdef HAVE_DRI3_MODIFIERS
  if (ce->mode == XCB_PRESENT_COMPLETE_MODE_SUBOPTIMAL_COPY &&
  draw->last_present_mode != ce->mode) {
 for (int b = 0; b < ARRAY_SIZE(draw->buffers); b++) {
@@ -396,7 +397,7 @@ dri3_handle_present_event(struct loader_dri3_drawable *draw,
   draw->buffers[b]->reallocate = true;
 }
  }
-
+#endif
  draw->last_present_mode = ce->mode;
 
  if (draw->vtable->show_fps)
@@ -903,10 +904,10 @@ loader_dri3_swap_buffers_msc(struct loader_dri3_drawable 
*draw,
*/
   if (!loader_dri3_have_image_blit(draw) && draw->cur_blit_source != -1)
  options |= XCB_PRESENT_OPTION_COPY;
-
+#ifdef HAVE_DRI3_MODIFIERS
   if (draw->multiplanes_available)
  options |= XCB_PRESENT_OPTION_SUBOPTIMAL;
-
+#endif
   back->busy = 1;
   

Re: [Mesa-dev] [PATCH 1/2] util: Implement a hash table cloning function

[Thomas Helland]

2018-03-12 19:48 GMT+01:00 Emil Velikov :
> Hi Thomas,
>
> On 12 March 2018 at 17:55, Thomas Helland  wrote:
>> V2: Don't rzalloc; we are about to rewrite the whole thing (Vladislav)
>> ---
>>  src/util/hash_table.c | 22 ++
>>  src/util/hash_table.h |  2 ++
>>  2 files changed, 24 insertions(+)
>>
>> diff --git a/src/util/hash_table.c b/src/util/hash_table.c
>> index b7421a0144..f8d5d0f88a 100644
>> --- a/src/util/hash_table.c
>> +++ b/src/util/hash_table.c
>> @@ -141,6 +141,28 @@ _mesa_hash_table_create(void *mem_ctx,
>> return ht;
>>  }
>>
>> +struct hash_table *
>> +_mesa_hash_table_clone(struct hash_table *src, void *dst_mem_ctx)
>> +{
>> +   struct hash_table *ht;
>> +
>> +   ht = ralloc(dst_mem_ctx, struct hash_table);
>> +   if (ht == NULL)
>> +  return NULL;
>> +
>> +   memcpy(ht, src, sizeof(struct hash_table));
>> +
>> +   ht->table = ralloc_array(ht, struct hash_entry, ht->size);
>> +   if (ht->table == NULL) {
>> +  ralloc_free(ht);
>> +  return NULL;
>> +   }
>> +
>> +   memcpy(ht->table, src->table, ht->size * sizeof(struct hash_entry));
>> +
> Thinking out loud:
>
> I'm wondering if it won't make sense to reuse _mesa_hash_table_create,
> instead of open-coding it?
>
> -Emil

That wont work like you might expect. The hash table will then be initialized
to the wrong size. We want an exact copy, so we have to make sure we copy
also things like size, deleted_entries, etc. If we don't we can not memcpy
the array of entries, defeating the main purpose which is to avoid all the
insertions into the hash table,

-Thomas
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [RFC] Mesa 17.3.x release problems and process improvements

[Eric Anholt]

Kenneth Graunke  writes:

> [ Unknown signature status ]
> On Friday, March 9, 2018 12:12:28 PM PDT Mark Janes wrote:
> [snip]
>> I've been doing this for Intel.  Developers are on the hook to fix their
>> bugs, but you can't make them do it.  They have many pressures on them,
>> and a maintainer can't make the call as to whether a rendering bug is
>> more important than day-1 vulkan conformance, for example.
>> 
>> We could heighten the transparency of what is blocking the build by
>> publicizing the authors of bisected blocking bugs to Phoronix, which
>> might get things moving.
>
> I hope you're being sarcastic here, or else I'm misunderstanding your
> proposal.  Public shaming of developers who create bugs has absolutely
> no place in the Mesa community, IMHO.  It would foster the kind of toxic
> community that none of us want to be a part of.

Agreed!


signature.asc
Description: PGP signature
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 4/5 v6] clover/llvm: Add get_[cl|language]_version, validation and some helpers

[Pierre Moreau]

Sorry, partially forgot about it. I’ll look at it over the weekend, as I don’t
have time before. :-/

Pierre


signature.asc
Description: PGP signature
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH] nir: lower_load_const_to_scalar fix for 8/16b types

[Rob Clark]

Signed-off-by: Rob Clark 
---
 src/compiler/nir/nir_lower_load_const_to_scalar.c | 9 +++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/src/compiler/nir/nir_lower_load_const_to_scalar.c 
b/src/compiler/nir/nir_lower_load_const_to_scalar.c
index e494facfd21..9d37e3fecef 100644
--- a/src/compiler/nir/nir_lower_load_const_to_scalar.c
+++ b/src/compiler/nir/nir_lower_load_const_to_scalar.c
@@ -52,9 +52,14 @@ lower_load_const_instr_scalar(nir_load_const_instr *lower)
  nir_load_const_instr_create(b.shader, 1, lower->def.bit_size);
   if (lower->def.bit_size == 64)
  load_comp->value.f64[0] = lower->value.f64[i];
-  else
+  else if (lower->def.bit_size == 32)
  load_comp->value.u32[0] = lower->value.u32[i];
-  assert(lower->def.bit_size == 64 || lower->def.bit_size == 32);
+  else if (lower->def.bit_size == 16)
+ load_comp->value.u16[0] = lower->value.u16[i];
+  else if (lower->def.bit_size == 8)
+ load_comp->value.u8[0] = lower->value.u8[i];
+  else
+ assert(!"invalid bit size");
   nir_builder_instr_insert(, _comp->instr);
   loads[i] = _comp->def;
}
-- 
2.14.3

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 2/2] radv: align tessellation patch limits with amdvlk driver.

[Dave Airlie]

From: Dave Airlie 

AMDVLK says 16 for pre-GFX9 and 64 for GFX9.

This seems to help fix:
https://bugs.freedesktop.org/show_bug.cgi?id=105464
on Polaris.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105464
Signed-off-by: Dave Airlie 
---
 src/amd/vulkan/radv_pipeline.c | 10 +++---
 1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index f8f09a7e166..3fe4559dcfe 100644
--- a/src/amd/vulkan/radv_pipeline.c
+++ b/src/amd/vulkan/radv_pipeline.c
@@ -1317,7 +1317,7 @@ calculate_tess_state(struct radv_pipeline *pipeline,
unsigned input_patch_size, output_patch_size, output_patch0_offset;
unsigned lds_size, hardware_lds_size;
unsigned perpatch_output_offset;
-   unsigned num_patches;
+   unsigned num_patches, hw_optimal;
struct radv_tessellation_state tess = {0};
 
/* This calculates how shader inputs and outputs among VS, TCS, and TES
@@ -1357,9 +1357,13 @@ calculate_tess_state(struct radv_pipeline *pipeline,
output_patch_size);
 
/* Not necessary for correctness, but improves performance. The
-* specific value is taken from the proprietary driver.
+* specific value is taken from the AMDVLK driver.
 */
-   num_patches = MIN2(num_patches, 40);
+   if (pipeline->device->physical_device->rad_info.chip_class >= GFX9)
+   hw_optimal = 64;
+   else
+   hw_optimal = 16;
+   num_patches = MIN2(num_patches, hw_optimal);
 
/* SI bug workaround - limit LS-HS threadgroups to only one wave. */
if (pipeline->device->physical_device->rad_info.chip_class == SI) {
-- 
2.14.3

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 1/2] radv: get correct offset into LDS for indexed vars.

[Dave Airlie]

From: Dave Airlie 

This seems more correct to me, since if we have an array
of floats they'll be vec4 aligned, and if we do af[2],
we want the const index to increase by 2 slots in the non
compact case.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105464
Fixes: 94f9591995 (radv/ac: add support for TCS/TES inputs/outputs.)
Signed-off-by: Dave Airlie 
---
 src/amd/common/ac_nir_to_llvm.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 9b850698608..7f0d808b07e 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -2835,7 +2835,7 @@ get_dw_address(struct radv_shader_context *ctx,
LLVMConstInt(ctx->ac.i32, 
4, false), ""), "");
else if (const_index && !compact_const_index)
dw_addr = LLVMBuildAdd(ctx->ac.builder, dw_addr,
-  LLVMConstInt(ctx->ac.i32, const_index, 
false), "");
+  LLVMConstInt(ctx->ac.i32, const_index * 
4, false), "");
 
dw_addr = LLVMBuildAdd(ctx->ac.builder, dw_addr,
   LLVMConstInt(ctx->ac.i32, param * 4, false), "");
-- 
2.14.3

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] tizonia egl build fail

[Dylan Baker]

Quoting Andy Furniss (2018-03-06 15:12:37)
> make[5]: Entering directory 
> '/mnt/sdc1/Gits/mesa/src/gallium/state_trackers/omx/tizonia'
>CC   h264dprc.lo
> In file included from h264dprc.c:45:0:
> ../../../../../src/egl/drivers/dri2/egl_dri2.h:47:10: fatal error: 
> wayland/wayland-egl/wayland-egl-backend.h: No such file or directory
>   #include "wayland/wayland-egl/wayland-egl-backend.h"
>^~~
> compilation terminated.
> 
> 
> below will fix the build - no idea if it breaks anything else/is sane.
> 
> diff --git a/src/egl/drivers/dri2/egl_dri2.h 
> b/src/egl/drivers/dri2/egl_dri2.h
> index d36d02c3c4..3459216917 100644
> --- a/src/egl/drivers/dri2/egl_dri2.h
> +++ b/src/egl/drivers/dri2/egl_dri2.h
> @@ -44,7 +44,7 @@
> 
>   #ifdef HAVE_WAYLAND_PLATFORM
>   #include 
> -#include "wayland/wayland-egl/wayland-egl-backend.h"
> +#include "egl/wayland/wayland-egl/wayland-egl-backend.h"
>   /* forward declarations of protocol elements */
>   struct zwp_linux_dmabuf_v1;
>   #endif
> ___
> mesa-dev mailing list
> mesa-dev@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Emil, this was the other patch.

Dylan


signature.asc
Description: signature
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 2/3] meson: Use the same version for all libdrm checks

[Dylan Baker]

Quoting Ilia Mirkin (2018-03-13 12:15:08)
> On Tue, Mar 13, 2018 at 3:05 PM, Emil Velikov  
> wrote:
> > On 13 March 2018 at 18:52, Dylan Baker  wrote:
> >> Currently each driver specifies it's own version, and core libdrm
> >> specifies a version. In the most common case this is fine, since there
> >> will be exactly one libdrm installed on a system, but if there are more
> >> than one it's possible that mesa will be linked against different
> >> versions of libdrm. There is also the possibility that the current
> >> approach makes the pkg-config files we generate incorrect, since there
> >> could be #defines that use newer features if they're available.
> >>
> >> This patch corrects all of that. All of the versions are still set by
> >> driver (along with a default core version). Then all of the drivers that
> >> are enabled have their versions compared and the highest version is
> >> selected, then all libdrm checks are made with that version.
> >>
> >> Signed-off-by: Dylan Baker 
> >> ---
> >>  meson.build | 67 +-
> >>  1 file changed, 46 insertions(+), 21 deletions(-)
> >>
> >> diff --git a/meson.build b/meson.build
> >> index e747d99..6019008 100644
> >> --- a/meson.build
> >> +++ b/meson.build
> >> @@ -1015,35 +1015,60 @@ dep_expat = dependency('expat')
> >>  # its not linux and and wont
> >>  dep_m = cc.find_library('m', required : false)
> >>
> >> +# Check for libdrm. various drivers have different libdrm version 
> >> requirements,
> >> +# but we always want to use the same version for all libdrm modules. That 
> >> means
> >> +# even if driver foo requires 2.4.0 and driver bar requires 2.4.3, if foo 
> >> and
> >> +# bar are both on use 2.4.3 for both of them
> >>  dep_libdrm_amdgpu = []
> >>  dep_libdrm_radeon = []
> >>  dep_libdrm_nouveau = []
> >>  dep_libdrm_etnaviv = []
> >>  dep_libdrm_freedreno = []
> >>  dep_libdrm_intel = []
> >> -if with_dri_i915 or with_gallium_i915
> >> -  dep_libdrm_intel = dependency('libdrm_intel', version : '>= 2.4.75')
> >> -endif
> >> -if with_amd_vk or with_gallium_radeonsi
> >> -  dep_libdrm_amdgpu = dependency('libdrm_amdgpu', version : '>= 2.4.90')
> >> -endif
> >> -if (with_gallium_radeonsi or with_dri_r100 or with_dri_r200 or
> >> -with_gallium_r300 or with_gallium_r600)
> >> -  dep_libdrm_radeon = dependency('libdrm_radeon', version : '>= 2.4.71')
> >> -endif
> >> -if with_gallium_nouveau or with_dri_nouveau
> >> -  dep_libdrm_nouveau = dependency('libdrm_nouveau', version : '>= 2.4.66')
> >> -endif
> >> -if with_gallium_etnaviv
> >> -  dep_libdrm_etnaviv = dependency('libdrm_etnaviv', version : '>= 2.4.82')
> >> -endif
> >> -if with_gallium_freedreno
> >> -  dep_libdrm_freedreno = dependency('libdrm_freedreno', version : '>= 
> >> 2.4.91')
> >> -endif
> >> +
> >> +_drm_amdgpu_ver = '2.4.90'
> >> +_drm_radeon_ver = '2.4.71'
> >> +_drm_nouveau_ver = '2.4.66'
> >> +_drm_etnaviv_ver = '2.4.82'
> >> +_drm_freedreno_ver = '2.4.91'
> >> +_drm_intel_ver = '2.4.75'
> >> +_drm_ver = '2.4.75'
> >> +
> >> +_libdrm_checks = [
> >> +  [with_dri_i915 or with_gallium_i915, 'intel'],
> >> +  [with_amd_vk or with_gallium_radeonsi, 'amdgpu'],
> >> +  [(with_gallium_radeonsi or with_dri_r100 or with_dri_r200 or
> >> +   with_gallium_r300 or with_gallium_r600),
> >> +   'radeon'],
> >> +  [(with_gallium_nouveau or with_dri_nouveau), 'nouveau'],
> >> +  [with_gallium_etnaviv, 'etnaviv'],
> >> +  [with_gallium_freedreno, 'freedreno'],
> >> +]
> >> +
> >> +# Loop over the enables versions and get the highest libdrm requirement 
> >> for all
> >> +# active drivers.
> >> +foreach d : _libdrm_checks
> >> +  ver = get_variable('_drm_@0@_ver'.format(d[1]))
> >> +  if d[0] and ver.version_compare('>' + _drm_ver)
> >> +_drm_ver = ver
> >> +  endif
> >> +endforeach
> >> +
> >> +# Then get each libdrm module
> >> +foreach d : _libdrm_checks
> >> +  if d[0]
> >> +set_variable(
> >> +  'dep_libdrm_' + d[1],
> >> +  dependency('libdrm_' + d[1], version : '>=' + _drm_ver)
> >> +)
> >> +  endif
> >> +endforeach
> >>
> >>  with_gallium_drisw_kms = false
> >> -dep_libdrm = dependency('libdrm', version : '>= 2.4.75',
> >> -required : with_dri2 or with_dri3)
> >> +dep_libdrm = dependency(
> >> +  'libdrm', version : '>=' + _drm_ver,
> >> +  required : with_dri2 or with_dri3
> >> +)
> >>  if dep_libdrm.found()
> >>pre_args += '-DHAVE_LIBDRM'
> >>if with_dri_platform == 'drm' and with_dri
> >
> > IIRC a few developers had some suggestions about this in the past, I
> > think Dave and Ilia were mostly interested.
> > Namely - both libdrm and libdrm_$vendor should meet the
> > $vendor_version requirement.
> >
> > I'd give it a quick check with them, since I don't know the specifics
> > on their setups.
> >
> > -Emil
> 
> A quick glance over this makes sense. You basically say that if you
> have $drivera and $driverb 

Re: [Mesa-dev] [PATCH 2/3] meson: Use the same version for all libdrm checks

[Ilia Mirkin]

On Tue, Mar 13, 2018 at 3:05 PM, Emil Velikov  wrote:
> On 13 March 2018 at 18:52, Dylan Baker  wrote:
>> Currently each driver specifies it's own version, and core libdrm
>> specifies a version. In the most common case this is fine, since there
>> will be exactly one libdrm installed on a system, but if there are more
>> than one it's possible that mesa will be linked against different
>> versions of libdrm. There is also the possibility that the current
>> approach makes the pkg-config files we generate incorrect, since there
>> could be #defines that use newer features if they're available.
>>
>> This patch corrects all of that. All of the versions are still set by
>> driver (along with a default core version). Then all of the drivers that
>> are enabled have their versions compared and the highest version is
>> selected, then all libdrm checks are made with that version.
>>
>> Signed-off-by: Dylan Baker 
>> ---
>>  meson.build | 67 +-
>>  1 file changed, 46 insertions(+), 21 deletions(-)
>>
>> diff --git a/meson.build b/meson.build
>> index e747d99..6019008 100644
>> --- a/meson.build
>> +++ b/meson.build
>> @@ -1015,35 +1015,60 @@ dep_expat = dependency('expat')
>>  # its not linux and and wont
>>  dep_m = cc.find_library('m', required : false)
>>
>> +# Check for libdrm. various drivers have different libdrm version 
>> requirements,
>> +# but we always want to use the same version for all libdrm modules. That 
>> means
>> +# even if driver foo requires 2.4.0 and driver bar requires 2.4.3, if foo 
>> and
>> +# bar are both on use 2.4.3 for both of them
>>  dep_libdrm_amdgpu = []
>>  dep_libdrm_radeon = []
>>  dep_libdrm_nouveau = []
>>  dep_libdrm_etnaviv = []
>>  dep_libdrm_freedreno = []
>>  dep_libdrm_intel = []
>> -if with_dri_i915 or with_gallium_i915
>> -  dep_libdrm_intel = dependency('libdrm_intel', version : '>= 2.4.75')
>> -endif
>> -if with_amd_vk or with_gallium_radeonsi
>> -  dep_libdrm_amdgpu = dependency('libdrm_amdgpu', version : '>= 2.4.90')
>> -endif
>> -if (with_gallium_radeonsi or with_dri_r100 or with_dri_r200 or
>> -with_gallium_r300 or with_gallium_r600)
>> -  dep_libdrm_radeon = dependency('libdrm_radeon', version : '>= 2.4.71')
>> -endif
>> -if with_gallium_nouveau or with_dri_nouveau
>> -  dep_libdrm_nouveau = dependency('libdrm_nouveau', version : '>= 2.4.66')
>> -endif
>> -if with_gallium_etnaviv
>> -  dep_libdrm_etnaviv = dependency('libdrm_etnaviv', version : '>= 2.4.82')
>> -endif
>> -if with_gallium_freedreno
>> -  dep_libdrm_freedreno = dependency('libdrm_freedreno', version : '>= 
>> 2.4.91')
>> -endif
>> +
>> +_drm_amdgpu_ver = '2.4.90'
>> +_drm_radeon_ver = '2.4.71'
>> +_drm_nouveau_ver = '2.4.66'
>> +_drm_etnaviv_ver = '2.4.82'
>> +_drm_freedreno_ver = '2.4.91'
>> +_drm_intel_ver = '2.4.75'
>> +_drm_ver = '2.4.75'
>> +
>> +_libdrm_checks = [
>> +  [with_dri_i915 or with_gallium_i915, 'intel'],
>> +  [with_amd_vk or with_gallium_radeonsi, 'amdgpu'],
>> +  [(with_gallium_radeonsi or with_dri_r100 or with_dri_r200 or
>> +   with_gallium_r300 or with_gallium_r600),
>> +   'radeon'],
>> +  [(with_gallium_nouveau or with_dri_nouveau), 'nouveau'],
>> +  [with_gallium_etnaviv, 'etnaviv'],
>> +  [with_gallium_freedreno, 'freedreno'],
>> +]
>> +
>> +# Loop over the enables versions and get the highest libdrm requirement for 
>> all
>> +# active drivers.
>> +foreach d : _libdrm_checks
>> +  ver = get_variable('_drm_@0@_ver'.format(d[1]))
>> +  if d[0] and ver.version_compare('>' + _drm_ver)
>> +_drm_ver = ver
>> +  endif
>> +endforeach
>> +
>> +# Then get each libdrm module
>> +foreach d : _libdrm_checks
>> +  if d[0]
>> +set_variable(
>> +  'dep_libdrm_' + d[1],
>> +  dependency('libdrm_' + d[1], version : '>=' + _drm_ver)
>> +)
>> +  endif
>> +endforeach
>>
>>  with_gallium_drisw_kms = false
>> -dep_libdrm = dependency('libdrm', version : '>= 2.4.75',
>> -required : with_dri2 or with_dri3)
>> +dep_libdrm = dependency(
>> +  'libdrm', version : '>=' + _drm_ver,
>> +  required : with_dri2 or with_dri3
>> +)
>>  if dep_libdrm.found()
>>pre_args += '-DHAVE_LIBDRM'
>>if with_dri_platform == 'drm' and with_dri
>
> IIRC a few developers had some suggestions about this in the past, I
> think Dave and Ilia were mostly interested.
> Namely - both libdrm and libdrm_$vendor should meet the
> $vendor_version requirement.
>
> I'd give it a quick check with them, since I don't know the specifics
> on their setups.
>
> -Emil

A quick glance over this makes sense. You basically say that if you
have $drivera and $driverb enabled, take each of them, and say libdrm*
> $drivera and libdrm* > $driverb, which in effect says that the max
of those is the minimum required. But if driverc is not enabled, then
its version requirements are not taken into account.

Is this an accurate interpretation of what your patch does?

Re: [Mesa-dev] [PATCH] radv: Fix CmdCopyImage between uncompressed and compressed images

[Dave Airlie]

On 13 March 2018 at 01:38, Alex Smith  wrote:
> From the spec:
>
> "When copying between compressed and uncompressed formats the
>  extent members represent the texel dimensions of the source
>  image and not the destination."
>
> However, as per 7b890a36, we must still use the destination image type
> when clamping the extent so that we copy the correct number of layers
> for 2D to 3D copies.
>
> Fixes: 7b890a36 "radv: Fix vkCmdCopyImage for 2d slices into 3d Images"
> Cc: 
> Signed-off-by: Alex Smith 

Reviewed-by: Dave Airlie 

Might be worth filing a cts issue to see if someone wants to write
tests for this sort of hole.

Dave.
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 2/3] meson: Use the same version for all libdrm checks

[Emil Velikov]

On 13 March 2018 at 18:52, Dylan Baker  wrote:
> Currently each driver specifies it's own version, and core libdrm
> specifies a version. In the most common case this is fine, since there
> will be exactly one libdrm installed on a system, but if there are more
> than one it's possible that mesa will be linked against different
> versions of libdrm. There is also the possibility that the current
> approach makes the pkg-config files we generate incorrect, since there
> could be #defines that use newer features if they're available.
>
> This patch corrects all of that. All of the versions are still set by
> driver (along with a default core version). Then all of the drivers that
> are enabled have their versions compared and the highest version is
> selected, then all libdrm checks are made with that version.
>
> Signed-off-by: Dylan Baker 
> ---
>  meson.build | 67 +-
>  1 file changed, 46 insertions(+), 21 deletions(-)
>
> diff --git a/meson.build b/meson.build
> index e747d99..6019008 100644
> --- a/meson.build
> +++ b/meson.build
> @@ -1015,35 +1015,60 @@ dep_expat = dependency('expat')
>  # its not linux and and wont
>  dep_m = cc.find_library('m', required : false)
>
> +# Check for libdrm. various drivers have different libdrm version 
> requirements,
> +# but we always want to use the same version for all libdrm modules. That 
> means
> +# even if driver foo requires 2.4.0 and driver bar requires 2.4.3, if foo and
> +# bar are both on use 2.4.3 for both of them
>  dep_libdrm_amdgpu = []
>  dep_libdrm_radeon = []
>  dep_libdrm_nouveau = []
>  dep_libdrm_etnaviv = []
>  dep_libdrm_freedreno = []
>  dep_libdrm_intel = []
> -if with_dri_i915 or with_gallium_i915
> -  dep_libdrm_intel = dependency('libdrm_intel', version : '>= 2.4.75')
> -endif
> -if with_amd_vk or with_gallium_radeonsi
> -  dep_libdrm_amdgpu = dependency('libdrm_amdgpu', version : '>= 2.4.90')
> -endif
> -if (with_gallium_radeonsi or with_dri_r100 or with_dri_r200 or
> -with_gallium_r300 or with_gallium_r600)
> -  dep_libdrm_radeon = dependency('libdrm_radeon', version : '>= 2.4.71')
> -endif
> -if with_gallium_nouveau or with_dri_nouveau
> -  dep_libdrm_nouveau = dependency('libdrm_nouveau', version : '>= 2.4.66')
> -endif
> -if with_gallium_etnaviv
> -  dep_libdrm_etnaviv = dependency('libdrm_etnaviv', version : '>= 2.4.82')
> -endif
> -if with_gallium_freedreno
> -  dep_libdrm_freedreno = dependency('libdrm_freedreno', version : '>= 
> 2.4.91')
> -endif
> +
> +_drm_amdgpu_ver = '2.4.90'
> +_drm_radeon_ver = '2.4.71'
> +_drm_nouveau_ver = '2.4.66'
> +_drm_etnaviv_ver = '2.4.82'
> +_drm_freedreno_ver = '2.4.91'
> +_drm_intel_ver = '2.4.75'
> +_drm_ver = '2.4.75'
> +
> +_libdrm_checks = [
> +  [with_dri_i915 or with_gallium_i915, 'intel'],
> +  [with_amd_vk or with_gallium_radeonsi, 'amdgpu'],
> +  [(with_gallium_radeonsi or with_dri_r100 or with_dri_r200 or
> +   with_gallium_r300 or with_gallium_r600),
> +   'radeon'],
> +  [(with_gallium_nouveau or with_dri_nouveau), 'nouveau'],
> +  [with_gallium_etnaviv, 'etnaviv'],
> +  [with_gallium_freedreno, 'freedreno'],
> +]
> +
> +# Loop over the enables versions and get the highest libdrm requirement for 
> all
> +# active drivers.
> +foreach d : _libdrm_checks
> +  ver = get_variable('_drm_@0@_ver'.format(d[1]))
> +  if d[0] and ver.version_compare('>' + _drm_ver)
> +_drm_ver = ver
> +  endif
> +endforeach
> +
> +# Then get each libdrm module
> +foreach d : _libdrm_checks
> +  if d[0]
> +set_variable(
> +  'dep_libdrm_' + d[1],
> +  dependency('libdrm_' + d[1], version : '>=' + _drm_ver)
> +)
> +  endif
> +endforeach
>
>  with_gallium_drisw_kms = false
> -dep_libdrm = dependency('libdrm', version : '>= 2.4.75',
> -required : with_dri2 or with_dri3)
> +dep_libdrm = dependency(
> +  'libdrm', version : '>=' + _drm_ver,
> +  required : with_dri2 or with_dri3
> +)
>  if dep_libdrm.found()
>pre_args += '-DHAVE_LIBDRM'
>if with_dri_platform == 'drm' and with_dri

IIRC a few developers had some suggestions about this in the past, I
think Dave and Ilia were mostly interested.
Namely - both libdrm and libdrm_$vendor should meet the
$vendor_version requirement.

I'd give it a quick check with them, since I don't know the specifics
on their setups.

-Emil
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 2/2] autotools: add -I/src/egl to tizonia

[Emil Velikov]

On 13 March 2018 at 18:23, Dylan Baker  wrote:
> Quoting Emil Velikov (2018-03-13 09:41:47)
>> On 7 March 2018 at 23:13, Dylan Baker  wrote:
>> > meson got the same fix.
>> >
>> > cc: Emil Veliov 
>> > Signed-off-by: Dylan Baker 
>> > ---
>> >
>> > I don't know hat the "right" fix is here Emil, I just picked one and 
>> > applied it
>> > to both meson and autotools.
>> >
>> Hmm I've misread Tim's reply - I've assumed this has landed as well.
>>
>> >  src/gallium/state_trackers/omx/tizonia/Makefile.am | 1 +
>> >  1 file changed, 1 insertion(+)
>> >
>> > diff --git a/src/gallium/state_trackers/omx/tizonia/Makefile.am 
>> > b/src/gallium/state_trackers/omx/tizonia/Makefile.am
>> > index 3149afa7bbb..0eac85a319e 100644
>> > --- a/src/gallium/state_trackers/omx/tizonia/Makefile.am
>> > +++ b/src/gallium/state_trackers/omx/tizonia/Makefile.am
>> > @@ -27,6 +27,7 @@ AM_CFLAGS = \
>> > -I$(top_srcdir)/src/mesa \
>> > -I$(top_builddir)/src/mesa/drivers/dri/common \
>> > -I$(top_srcdir)/src/mesa/drivers/dri/common \
>> > +   -I$(top_srcdir)/src/egl \
>>
>> From a quick look no obvious reason comes up why we'd need this.
>> The meson patch does not mention anything either - can you please
>> share the error message that you've seen?
>> Be that with meson or autotools.
>>
>> Thanks
>> Emil
>
> The tizonia state tracker includes some headers as "egl/..." Someone else had
> sent a patch to make that import relative, but the meson patch that added egl 
> as
> an include path had already landed so I sent this.
>
I cannot spot anything - do you have any keywords/message ID to look for?

The only thing I could find (include + egl) was the meson commit
7598dedfde49391564cdb3d355e7bd98e1880782.
Latter of which says "It needs to have ... " and not why.

Meh, it should hurt so let's merge it.
Acked-by: Emil Velikov 

-Emil
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 3/3] meson: use dep_libdrm version for pkg-config

[Dylan Baker]

This corrects pkg-config to use the libdrm version (as computed by the
previous patch) instead of using a hardcoded value that may or may not
(probably not) be right.

Signed-off-by: Dylan Baker 
---
 src/gallium/targets/d3dadapter9/meson.build | 2 +-
 src/mesa/drivers/dri/meson.build| 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/gallium/targets/d3dadapter9/meson.build 
b/src/gallium/targets/d3dadapter9/meson.build
index e3f4ae5..2cdc0e0 100644
--- a/src/gallium/targets/d3dadapter9/meson.build
+++ b/src/gallium/targets/d3dadapter9/meson.build
@@ -71,6 +71,6 @@ pkg.generate(
   name : 'd3d',
   description : 'Native D3D driver modules',
   version : '.'.join(nine_version),
-  requires_private : 'libdrm >= 2.4.75',
+  requires_private : 'libdrm >= ' + dep_libdrm.version(),
   variables : ['moduledir=${prefix}/@0@'.format(d3d_drivers_path)],
 )
diff --git a/src/mesa/drivers/dri/meson.build b/src/mesa/drivers/dri/meson.build
index 6342168..8e23fd4 100644
--- a/src/mesa/drivers/dri/meson.build
+++ b/src/mesa/drivers/dri/meson.build
@@ -69,7 +69,7 @@ endif
 if with_dri
   dri_req_private = []
   if dep_libdrm.found()
-dri_req_private = ['libdrm >= 2.4.75']  # FIXME: don't hardcode this
+dri_req_private = ['libdrm >= ' + dep_libdrm.version()]
   endif
 
   pkg.generate(
-- 
git-series 0.9.1
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 2/3] meson: Use the same version for all libdrm checks

[Dylan Baker]

Currently each driver specifies it's own version, and core libdrm
specifies a version. In the most common case this is fine, since there
will be exactly one libdrm installed on a system, but if there are more
than one it's possible that mesa will be linked against different
versions of libdrm. There is also the possibility that the current
approach makes the pkg-config files we generate incorrect, since there
could be #defines that use newer features if they're available.

This patch corrects all of that. All of the versions are still set by
driver (along with a default core version). Then all of the drivers that
are enabled have their versions compared and the highest version is
selected, then all libdrm checks are made with that version.

Signed-off-by: Dylan Baker 
---
 meson.build | 67 +-
 1 file changed, 46 insertions(+), 21 deletions(-)

diff --git a/meson.build b/meson.build
index e747d99..6019008 100644
--- a/meson.build
+++ b/meson.build
@@ -1015,35 +1015,60 @@ dep_expat = dependency('expat')
 # its not linux and and wont
 dep_m = cc.find_library('m', required : false)
 
+# Check for libdrm. various drivers have different libdrm version requirements,
+# but we always want to use the same version for all libdrm modules. That means
+# even if driver foo requires 2.4.0 and driver bar requires 2.4.3, if foo and
+# bar are both on use 2.4.3 for both of them
 dep_libdrm_amdgpu = []
 dep_libdrm_radeon = []
 dep_libdrm_nouveau = []
 dep_libdrm_etnaviv = []
 dep_libdrm_freedreno = []
 dep_libdrm_intel = []
-if with_dri_i915 or with_gallium_i915
-  dep_libdrm_intel = dependency('libdrm_intel', version : '>= 2.4.75')
-endif
-if with_amd_vk or with_gallium_radeonsi
-  dep_libdrm_amdgpu = dependency('libdrm_amdgpu', version : '>= 2.4.90')
-endif
-if (with_gallium_radeonsi or with_dri_r100 or with_dri_r200 or
-with_gallium_r300 or with_gallium_r600)
-  dep_libdrm_radeon = dependency('libdrm_radeon', version : '>= 2.4.71')
-endif
-if with_gallium_nouveau or with_dri_nouveau
-  dep_libdrm_nouveau = dependency('libdrm_nouveau', version : '>= 2.4.66')
-endif
-if with_gallium_etnaviv
-  dep_libdrm_etnaviv = dependency('libdrm_etnaviv', version : '>= 2.4.82')
-endif
-if with_gallium_freedreno
-  dep_libdrm_freedreno = dependency('libdrm_freedreno', version : '>= 2.4.91')
-endif
+
+_drm_amdgpu_ver = '2.4.90'
+_drm_radeon_ver = '2.4.71'
+_drm_nouveau_ver = '2.4.66'
+_drm_etnaviv_ver = '2.4.82'
+_drm_freedreno_ver = '2.4.91'
+_drm_intel_ver = '2.4.75'
+_drm_ver = '2.4.75'
+
+_libdrm_checks = [
+  [with_dri_i915 or with_gallium_i915, 'intel'],
+  [with_amd_vk or with_gallium_radeonsi, 'amdgpu'],
+  [(with_gallium_radeonsi or with_dri_r100 or with_dri_r200 or
+   with_gallium_r300 or with_gallium_r600),
+   'radeon'],
+  [(with_gallium_nouveau or with_dri_nouveau), 'nouveau'],
+  [with_gallium_etnaviv, 'etnaviv'],
+  [with_gallium_freedreno, 'freedreno'],
+]
+
+# Loop over the enables versions and get the highest libdrm requirement for all
+# active drivers.
+foreach d : _libdrm_checks
+  ver = get_variable('_drm_@0@_ver'.format(d[1]))
+  if d[0] and ver.version_compare('>' + _drm_ver)
+_drm_ver = ver
+  endif
+endforeach
+
+# Then get each libdrm module
+foreach d : _libdrm_checks
+  if d[0]
+set_variable(
+  'dep_libdrm_' + d[1],
+  dependency('libdrm_' + d[1], version : '>=' + _drm_ver)
+)
+  endif
+endforeach
 
 with_gallium_drisw_kms = false
-dep_libdrm = dependency('libdrm', version : '>= 2.4.75',
-required : with_dri2 or with_dri3)
+dep_libdrm = dependency(
+  'libdrm', version : '>=' + _drm_ver,
+  required : with_dri2 or with_dri3
+)
 if dep_libdrm.found()
   pre_args += '-DHAVE_LIBDRM'
   if with_dri_platform == 'drm' and with_dri
-- 
git-series 0.9.1
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 1/3] meson: group libdrm dependencies

[Dylan Baker]

The reason libdrm is after libdrm_* will be made clear in later patches.

Signed-off-by: Dylan Baker 
---
 meson.build | 29 ++---
 1 file changed, 14 insertions(+), 15 deletions(-)

diff --git a/meson.build b/meson.build
index 51b4702..e747d99 100644
--- a/meson.build
+++ b/meson.build
@@ -228,11 +228,6 @@ if with_gallium_tegra and not with_gallium_nouveau
   error('tegra driver requires nouveau driver')
 endif
 
-dep_libdrm_intel = []
-if with_dri_i915 or with_gallium_i915
-  dep_libdrm_intel = dependency('libdrm_intel', version : '>= 2.4.75')
-endif
-
 if host_machine.system() == 'darwin'
   with_dri_platform = 'apple'
 elif ['windows', 'cygwin'].contains(host_machine.system())
@@ -1000,16 +995,6 @@ else
   dep_clock = cc.find_library('rt')
 endif
 
-with_gallium_drisw_kms = false
-dep_libdrm = dependency('libdrm', version : '>= 2.4.75',
-required : with_dri2 or with_dri3)
-if dep_libdrm.found()
-  pre_args += '-DHAVE_LIBDRM'
-  if with_dri_platform == 'drm' and with_dri
-with_gallium_drisw_kms = true
-  endif
-endif
-
 # TODO: some of these may be conditional
 dep_zlib = dependency('zlib', version : '>= 1.2.3')
 pre_args += '-DHAVE_ZLIB'
@@ -1035,6 +1020,10 @@ dep_libdrm_radeon = []
 dep_libdrm_nouveau = []
 dep_libdrm_etnaviv = []
 dep_libdrm_freedreno = []
+dep_libdrm_intel = []
+if with_dri_i915 or with_gallium_i915
+  dep_libdrm_intel = dependency('libdrm_intel', version : '>= 2.4.75')
+endif
 if with_amd_vk or with_gallium_radeonsi
   dep_libdrm_amdgpu = dependency('libdrm_amdgpu', version : '>= 2.4.90')
 endif
@@ -1052,6 +1041,16 @@ if with_gallium_freedreno
   dep_libdrm_freedreno = dependency('libdrm_freedreno', version : '>= 2.4.91')
 endif
 
+with_gallium_drisw_kms = false
+dep_libdrm = dependency('libdrm', version : '>= 2.4.75',
+required : with_dri2 or with_dri3)
+if dep_libdrm.found()
+  pre_args += '-DHAVE_LIBDRM'
+  if with_dri_platform == 'drm' and with_dri
+with_gallium_drisw_kms = true
+  endif
+endif
+
 llvm_modules = ['bitwriter', 'engine', 'mcdisassembler', 'mcjit']
 if with_amd_vk or with_gallium_radeonsi or with_gallium_r600
   llvm_modules += ['amdgpu', 'bitreader', 'ipo']

base-commit: 8247a30838a74dcdd27cc2468bff8a3d8def640e
-- 
git-series 0.9.1
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 0/2] nir: Move the si vote lowering to common code

[Bas Nieuwenhuizen]

Thanks a lot!

Reviewed-by: Bas Nieuwenhuizen 

for the series.

On Sat, Mar 10, 2018 at 7:42 PM, Jason Ekstrand  wrote:
> On Sat, Mar 10, 2018 at 10:18 AM, Jason Ekstrand 
> wrote:
>>
>> This tiny series moves the pass that Bas wrote for lowering vote
>> instructions to ballots into common code.  As you can see from the
>> diffstat
>> below, it cuts the size of the pass in half by removing boilerplate.  The
>> new version (in nir_lower_subgroups) also contains two bugfixes:
>>
>>  1) The old pass wasn't actually inserting the RFI instruction
>>
>>  2) The old pass wouldn't handle NaN correctly in feq because it switched
>> to effectively using ineg(fne(a, b)) which is not the same as feq(a,
>> b)
>> when NaN is present.
>>
>> This has not been tested at all beyond compile-testing (and I didn't even
>> compile-test radv).
>
>
> I hacked up anv to use it and ran the subgroups tests from the 1.1 CTS.
> This pointed out some bugs which I've now fixed and I sent a v2 which works
> at least for anv.
>
>>
>> Cc: Bas Nieuwenhuizen 
>> Cc: Timothy Arceri 
>>
>> Jason Ekstrand (2):
>>   nir/subgroups: Add lowering for vote_ieq/vote_feq to a ballot
>>   ac/nir: Use lower_vote_eq_to_ballot instead of ac_nir_lower_subgroups
>>
>>  src/amd/Makefile.sources |  1 -
>>  src/amd/common/ac_lower_subgroups.c  | 92
>> 
>>  src/amd/common/ac_nir_to_llvm.c  |  3 -
>>  src/amd/common/ac_nir_to_llvm.h  |  2 -
>>  src/amd/common/meson.build   |  1 -
>>  src/compiler/nir/nir.h   |  1 +
>>  src/compiler/nir/nir_lower_subgroups.c   | 48 +++
>>  src/gallium/drivers/radeonsi/si_shader_nir.c |  1 +
>>  8 files changed, 50 insertions(+), 99 deletions(-)
>>  delete mode 100644 src/amd/common/ac_lower_subgroups.c
>>
>> --
>> 2.5.0.400.gff86faf
>>
>
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 2/2] autotools: add -I/src/egl to tizonia

[Dylan Baker]

Quoting Emil Velikov (2018-03-13 09:41:47)
> On 7 March 2018 at 23:13, Dylan Baker  wrote:
> > meson got the same fix.
> >
> > cc: Emil Veliov 
> > Signed-off-by: Dylan Baker 
> > ---
> >
> > I don't know hat the "right" fix is here Emil, I just picked one and 
> > applied it
> > to both meson and autotools.
> >
> Hmm I've misread Tim's reply - I've assumed this has landed as well.
> 
> >  src/gallium/state_trackers/omx/tizonia/Makefile.am | 1 +
> >  1 file changed, 1 insertion(+)
> >
> > diff --git a/src/gallium/state_trackers/omx/tizonia/Makefile.am 
> > b/src/gallium/state_trackers/omx/tizonia/Makefile.am
> > index 3149afa7bbb..0eac85a319e 100644
> > --- a/src/gallium/state_trackers/omx/tizonia/Makefile.am
> > +++ b/src/gallium/state_trackers/omx/tizonia/Makefile.am
> > @@ -27,6 +27,7 @@ AM_CFLAGS = \
> > -I$(top_srcdir)/src/mesa \
> > -I$(top_builddir)/src/mesa/drivers/dri/common \
> > -I$(top_srcdir)/src/mesa/drivers/dri/common \
> > +   -I$(top_srcdir)/src/egl \
> 
> From a quick look no obvious reason comes up why we'd need this.
> The meson patch does not mention anything either - can you please
> share the error message that you've seen?
> Be that with meson or autotools.
> 
> Thanks
> Emil

The tizonia state tracker includes some headers as "egl/..." Someone else had
sent a patch to make that import relative, but the meson patch that added egl as
an include path had already landed so I sent this.

Dylan


signature.asc
Description: signature
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH v3 1/2] spirv: fix OpSConvert when the source is unsigned

[Jason Ekstrand]

On Tue, Mar 13, 2018 at 5:40 AM, Samuel Iglesias Gonsálvez <
sigles...@igalia.com> wrote:

> OpSConvert interprets the MSB of the unsigned value as the sign bit and
> extends it to the new type. If we want to preserve the value, we need
> to use OpUConvert opcode.
>
> v2:
> - No need to check dst type.
> - Fix typo in comment.
>
> v3:
> - Use src/dst bitsize to get the proper conversion opcode. (Jason)
>
> Signed-off-by: Samuel Iglesias Gonsálvez 
> ---
>  src/compiler/spirv/vtn_alu.c | 11 ++-
>  1 file changed, 10 insertions(+), 1 deletion(-)
>
> diff --git a/src/compiler/spirv/vtn_alu.c b/src/compiler/spirv/vtn_alu.c
> index d0c9e316935..9dcd183a48d 100644
> --- a/src/compiler/spirv/vtn_alu.c
> +++ b/src/compiler/spirv/vtn_alu.c
> @@ -354,10 +354,19 @@ vtn_nir_alu_op_for_spirv_opcode(struct vtn_builder
> *b,
> case SpvOpConvertFToS:
> case SpvOpConvertSToF:
> case SpvOpConvertUToF:
>

We probably need to fix SToF and UToF as well.

I'm starting to wonder if we don't want to do them all at once.  Maybe
something like this:

nir_alu_type src_type;
switch (opcode) {
case SpvOpConvertFToS:
case SpvOpConvertFToU:
case SpvOpFConvert:
   src_type = nir_type_float;
   break;
case SpvOpConvertSToF:
case SpvOpSConvert:
   src_type = nir_type_int;
   break;
case SpvOpConvertUToF:
case SpvOpUConvert:
   src_type = nir_type_uint;
   break;
default:
   unreachable("Invalid opcode");
}
src_type |= nir_alu_type_get_type_size(src);

nir_alu_type dst_type;
switch (opcode) {
...
default:
   unreachable("Invalid opcode");
}
dst_type |= nir_alu_type_get_type_size(dst);

While we're at it, since types don't really matter (only bit sizes), maybe
nir_alu_op_for_spirv_opcode should just take bit sizes instead of types.
It would make things simpler and make it more obvious what data actually
gets used.

Sorry I didn't notice the other conversion opcodes earlier. :-(


> -   case SpvOpSConvert:
> case SpvOpFConvert:
>return nir_type_conversion_op(src, dst, nir_rounding_mode_undef);
>
> +   case SpvOpSConvert: {
> +  /* SPIR-V expects to interpret the unsigned value as signed and
> +   * sign extend. Return the opcode accordingly.
> +   */
> +  unsigned src_bit_size = nir_alu_type_get_type_size(src);
> +  nir_alu_type src_type = nir_type_int | src_bit_size;
>
+  unsigned dst_bit_size = nir_alu_type_get_type_size(dst);
> +  nir_alu_type dst_type = nir_type_int | dst_bit_size;
> +  return nir_type_conversion_op(src_type, dst_type,
> nir_rounding_mode_undef);
> +   }
> /* Derivatives: */
> case SpvOpDPdx: return nir_op_fddx;
> case SpvOpDPdy: return nir_op_fddy;
> --
> 2.14.1
>
> ___
> mesa-dev mailing list
> mesa-dev@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/mesa-dev
>
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 1/4] intel/blorp: Fix compiler warning about num_layers.

[Lionel Landwerlin]

On 13/03/18 17:38, Eric Anholt wrote:

The compiler doesn't notice that the condition for num_layers to be
undefined already defined it above (as our assert checked in a debug
build).

Cc: Jason Ekstrand 
---
  src/mesa/drivers/dri/i965/brw_blorp.c | 1 +
  1 file changed, 1 insertion(+)

diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c 
b/src/mesa/drivers/dri/i965/brw_blorp.c
index 1d586e5ef38d..2b8d913fa282 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.c
+++ b/src/mesa/drivers/dri/i965/brw_blorp.c
@@ -1408,6 +1408,7 @@ brw_blorp_clear_depth_stencil(struct brw_context *brw,
   assert(level == irb->mt_level);
   assert(start_layer == irb->mt_layer);
   assert(num_layers == fb->MaxNumLayers ? irb->layer_count : 1);
+ num_layers = fb->MaxNumLayers ? irb->layer_count : 1;
} else {
   level = irb->mt_level;
   start_layer = irb->mt_layer;


I guess if we're going to assign it in both block, better put it 
before/after the 2 blocks.


What's your compiler? :)

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH] spirv: Handle doubles when multiplying a mat by a scalar

[Jason Ekstrand]

Reviewed-by: Jason Ekstrand 

On Tue, Mar 13, 2018 at 9:16 AM, Neil Roberts  wrote:

> The code to handle mat multipication by a scalar tries to pick either
> imul or fmul depending on whether the matrix is float or integer.
> However it was doing this by checking whether the base type is float.
> This was making it choose the int path for doubles (and presumably
> float16s).
>
> ---
>
> This was discovered from running the arb_gpu_shader_fp64 tests through
> the GL_ARB_gl_spirv branch. For example:
> arb_gpu_shader_fp64@execution@built-in-functions@vs-op-div-dmat4-double.
> Note however these tests are hidden behind a glslang bug:
>
> https://github.com/KhronosGroup/glslang/issues/1278
>
> The fix in that issue along with this patch makes them all pass.
>
> There’s also a little test case for this with VkRunner here:
>
> https://github.com/Igalia/vkrunner/blob/tests/examples/
> dmat-mul-scalar.shader_test
>
>  src/compiler/spirv/vtn_alu.c | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/src/compiler/spirv/vtn_alu.c b/src/compiler/spirv/vtn_alu.c
> index d0c9e316935..110fcec2a60 100644
> --- a/src/compiler/spirv/vtn_alu.c
> +++ b/src/compiler/spirv/vtn_alu.c
> @@ -142,10 +142,10 @@ mat_times_scalar(struct vtn_builder *b,
>  {
> struct vtn_ssa_value *dest = vtn_create_ssa_value(b, mat->type);
> for (unsigned i = 0; i < glsl_get_matrix_columns(mat->type); i++) {
> -  if (glsl_get_base_type(mat->type) == GLSL_TYPE_FLOAT)
> - dest->elems[i]->def = nir_fmul(>nb, mat->elems[i]->def,
> scalar);
> -  else
> +  if (glsl_base_type_is_integer(glsl_get_base_type(mat->type)))
>   dest->elems[i]->def = nir_imul(>nb, mat->elems[i]->def,
> scalar);
> +  else
> + dest->elems[i]->def = nir_fmul(>nb, mat->elems[i]->def,
> scalar);
> }
>
> return dest;
> --
> 2.14.3
>
> ___
> mesa-dev mailing list
> mesa-dev@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/mesa-dev
>
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [RFC] Mesa 17.3.x release problems and process improvements

[Daniel Vetter]

On Tue, Mar 13, 2018 at 4:46 PM, Mark Janes  wrote:
> Daniel Vetter  writes:
>
>> On Mon, Mar 12, 2018 at 11:54:45PM -0700, Kenneth Graunke wrote:
>>> On Friday, March 9, 2018 12:12:28 PM PDT Mark Janes wrote:
>>> [snip]
>>> > I've been doing this for Intel.  Developers are on the hook to fix their
>>> > bugs, but you can't make them do it.  They have many pressures on them,
>>> > and a maintainer can't make the call as to whether a rendering bug is
>>> > more important than day-1 vulkan conformance, for example.
>>> >
>>> > We could heighten the transparency of what is blocking the build by
>>> > publicizing the authors of bisected blocking bugs to Phoronix, which
>>> > might get things moving.
>>>
>>> I hope you're being sarcastic here, or else I'm misunderstanding your
>>> proposal.  Public shaming of developers who create bugs has absolutely
>>> no place in the Mesa community, IMHO.  It would foster the kind of toxic
>>> community that none of us want to be a part of.
>>>
>>> Sometimes, people who create bugs are the very people that work the
>>> hardest, who the project may not even exist without.  Would you want
>>> to chew out someone for creating a bug in a Vulkan driver when...if it
>>> weren't for that person, you wouldn't have a Vulkan driver at all?  Or,
>>> maybe they caused a couple bad bugs...but also fixed hundreds of them.
>>>
>>> Other times, they're new contributors or volunteers who do this, not as
>>> their day job.  Frankly, those people are under no obligation to help us
>>> at all, so we need to thank them and appreciate the time and effort they
>>> spend - and give them a hand fixing things when they're too busy, or
>>> don't have the relevant hardware or skill to track down a regression.
>>>
>>> It's easy to be pissed off when there are bugs, and things seem to not
>>> be making progress, but let's try and keep things positive and work
>>> together to make Mesa the best we can.
>>
>> I'd like to second this with my experience from the kernel community. The
>> public shaming game for when you create a regression is very strong there,
>> lead by Linus Torvalds. In my experience this directly causes:
>>
>> - Maintainers to hide bug reports and regressions reports at all costs,
>>   because having Linus destroy you just aint never worth it. The meta game
>>   becomes "avoid getting railed" instead of "deliver quality code", and
>>   there's lots of ways to easily achieve the former that serious hurt the
>>   latter.
>>
>> - Best practice (in my experience) is to not mention the dreaded
>>   "REGRESSION" tag when you need another maintainer's help to fix a
>>   regression, because it's too likely they'll just panic. That means they
>>   start screaming at you to go away, or brain locks up and they can't
>>   effectively help you track down the bug (seen both cases).
>>
>> - Creates a culture where talking about process/tooling improvements to
>>   prevent regressions and/or handle them quicker becomes too dangerous,
>>   because it all turns into a personal shaming game of who maintains the
>>   worst subsystem.
>>
>> Long term you end up with a culture fucked up for good :-/
>>
>> Imo the only way to make this better is to try analyzing why a regressions
>> happened, and fix the tooling to prevent that in the future. Maybe better
>> test coverage (and long term efforts to fix known gaps), maybe better
>> presentation of automated checks (stuff like github pull requests that
>> automatically run CI and report full results, blocking the merge if
>> anything is amiss).
>
> You have to have a very strong CI to use it to block commits.  i965 Mesa
> has a big CI which identifies many regressions, but I wouldn't want to
> checkpoint commits in an automated way.  A large pool of obsolete
> CI hardware will have lower reliability than the mesa master branch --
> which generates noise for developers and impedes progress.

This was all in general about blaming regressions on people, not
specifically for the stable-backporting-from-master issue here.

And if parts of your CI can't autogate then you can make it more
informal - there's definitely stuff you want to autogate, like "does
it compile everywhere in all configs", and probably you don't want to
autogate on gen2 dying :-)

My point was if you don't want regressions, make it as easy as
possible for people to never push a regression (whether master or
stable trees) instead of a pillory or other blaming exercises. Litlle
things (like whether your CI results is in some mail somewhere, maybe
for an oudated version of your patches on a different baseline, or
right next to the "do you really want to merge" button) matters.
-Daniel

>> Personally I have high hopes for gitlab.fd.o to enable us to do a lot of
>> that automation in a much better and much more discoverable way, but it's
>> some ways in the future still. Besides better quality that would also help
>> us ramp up new contributors, since instead of 

Re: [Mesa-dev] [PATCH 4/4] anv: Silence warning about heap_size.

[Lionel Landwerlin]

On 13/03/18 17:38, Eric Anholt wrote:

We only get VK_SUCCESS if it was initialized, but apparently my compiler
doesn't track that far.

Cc: Jason Ekstrand 


I guess it doesn't hurt.

Reviewed-by: Lionel Landwerlin 


---
  src/intel/vulkan/anv_device.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c
index d8c4e9863164..030862a6753c 100644
--- a/src/intel/vulkan/anv_device.c
+++ b/src/intel/vulkan/anv_device.c
@@ -110,7 +110,7 @@ anv_physical_device_init_heaps(struct anv_physical_device 
*device, int fd)
 device->supports_48bit_addresses =
(device->info.gen >= 8) && anv_gem_supports_48b_addresses(fd);
  
-   uint64_t heap_size;

+   uint64_t heap_size = 0;
 VkResult result = anv_compute_heap_size(fd, _size);
 if (result != VK_SUCCESS)
return result;



___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 3/4] i965: Silence compiler warning about promoted_constants.

[Lionel Landwerlin]

On 13/03/18 17:38, Eric Anholt wrote:

We only have a cfg != NULL if we went through one of the paths that set
it, but my compiler doesn't figure that out.

Cc: Jason Ekstrand 


Reviewed-by: Lionel Landwerlin 


Fixes: 6411defdcd6f ("intel/cs: Re-run final NIR optimizations for each SIMD 
size")
---
  src/intel/compiler/brw_fs.cpp | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp
index 422eedcf0af1..8529fda6f091 100644
--- a/src/intel/compiler/brw_fs.cpp
+++ b/src/intel/compiler/brw_fs.cpp
@@ -7220,7 +7220,7 @@ brw_compile_cs(const struct brw_compiler *compiler, void 
*log_data,
 fs_visitor *v8 = NULL, *v16 = NULL, *v32 = NULL;
 cfg_t *cfg = NULL;
 const char *fail_msg = NULL;
-   unsigned promoted_constants;
+   unsigned promoted_constants = 0;
  
 /* Now the main event: Visit the shader IR and generate our CS IR for it.

  */



___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 2/4] anv: Silence compiler warnings about uninitialized bind_offset.

[Lionel Landwerlin]

On 13/03/18 17:38, Eric Anholt wrote:

This is a legitimate warning: if anv's blorp_alloc_binding_table() throws
an error from anv_cmd_buffer_alloc_blorp_binding_table(), we silently
continue to use this undefined value.  The rest of this code doesn't seem
very allocation-error-proof, though, either.

Cc: Jason Ekstrand 


Reviewed-by: Lionel Landwerlin 


---
  src/intel/blorp/blorp_genX_exec.h | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/intel/blorp/blorp_genX_exec.h 
b/src/intel/blorp/blorp_genX_exec.h
index 1348659233c4..5b59af491ee8 100644
--- a/src/intel/blorp/blorp_genX_exec.h
+++ b/src/intel/blorp/blorp_genX_exec.h
@@ -1388,7 +1388,7 @@ blorp_emit_surface_states(struct blorp_batch *batch,
const struct blorp_params *params)
  {
 const struct isl_device *isl_dev = batch->blorp->isl_dev;
-   uint32_t bind_offset, surface_offsets[2];
+   uint32_t bind_offset = 0, surface_offsets[2];
 void *surface_maps[2];
  
 MAYBE_UNUSED bool has_indirect_clear_color = false;



___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [Mesa-stable] [PATCH] [RFC] gallivm: Use new LLVM fast-math-flags API

[Juan A. Suarez Romero]

On Tue, 2018-03-13 at 16:53 +, Emil Velikov wrote:
> On 13 March 2018 at 15:40, Marek Olšák  wrote:
> > Piglit+CTS+dEQP look good on Polaris12 with Mesa 17.3 and LLVM 6.0.
> > 
> 
> Thank you very much Marek!
> 
> Meanwhile I've gone through the results in the LunarG tool. Everything
> looks good for the 88 games tested.
> Feel free to login and check if you're interested.
> 

That's nice! Thanks both.


> I believe Juan is chasing regressions elsewhere in the tree, in
> preparation for 117.3.7.
> 

17.3.7, actually :D


Yes, after dealing with some regressions, I think now everything is fine.
Waiting for Intel CI to confirm it is OK, and make the pre-release.

J.A.

> Hopefully they will be sorted quickly.
> 
> -Emil
> 
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 3/4] i965: Silence compiler warning about promoted_constants.

[Eric Anholt]

We only have a cfg != NULL if we went through one of the paths that set
it, but my compiler doesn't figure that out.

Cc: Jason Ekstrand 
Fixes: 6411defdcd6f ("intel/cs: Re-run final NIR optimizations for each SIMD 
size")
---
 src/intel/compiler/brw_fs.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp
index 422eedcf0af1..8529fda6f091 100644
--- a/src/intel/compiler/brw_fs.cpp
+++ b/src/intel/compiler/brw_fs.cpp
@@ -7220,7 +7220,7 @@ brw_compile_cs(const struct brw_compiler *compiler, void 
*log_data,
fs_visitor *v8 = NULL, *v16 = NULL, *v32 = NULL;
cfg_t *cfg = NULL;
const char *fail_msg = NULL;
-   unsigned promoted_constants;
+   unsigned promoted_constants = 0;
 
/* Now the main event: Visit the shader IR and generate our CS IR for it.
 */
-- 
2.16.2

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 4/4] anv: Silence warning about heap_size.

[Eric Anholt]

We only get VK_SUCCESS if it was initialized, but apparently my compiler
doesn't track that far.

Cc: Jason Ekstrand 
---
 src/intel/vulkan/anv_device.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c
index d8c4e9863164..030862a6753c 100644
--- a/src/intel/vulkan/anv_device.c
+++ b/src/intel/vulkan/anv_device.c
@@ -110,7 +110,7 @@ anv_physical_device_init_heaps(struct anv_physical_device 
*device, int fd)
device->supports_48bit_addresses =
   (device->info.gen >= 8) && anv_gem_supports_48b_addresses(fd);
 
-   uint64_t heap_size;
+   uint64_t heap_size = 0;
VkResult result = anv_compute_heap_size(fd, _size);
if (result != VK_SUCCESS)
   return result;
-- 
2.16.2

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 2/4] anv: Silence compiler warnings about uninitialized bind_offset.

[Eric Anholt]

This is a legitimate warning: if anv's blorp_alloc_binding_table() throws
an error from anv_cmd_buffer_alloc_blorp_binding_table(), we silently
continue to use this undefined value.  The rest of this code doesn't seem
very allocation-error-proof, though, either.

Cc: Jason Ekstrand 
---
 src/intel/blorp/blorp_genX_exec.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/intel/blorp/blorp_genX_exec.h 
b/src/intel/blorp/blorp_genX_exec.h
index 1348659233c4..5b59af491ee8 100644
--- a/src/intel/blorp/blorp_genX_exec.h
+++ b/src/intel/blorp/blorp_genX_exec.h
@@ -1388,7 +1388,7 @@ blorp_emit_surface_states(struct blorp_batch *batch,
   const struct blorp_params *params)
 {
const struct isl_device *isl_dev = batch->blorp->isl_dev;
-   uint32_t bind_offset, surface_offsets[2];
+   uint32_t bind_offset = 0, surface_offsets[2];
void *surface_maps[2];
 
MAYBE_UNUSED bool has_indirect_clear_color = false;
-- 
2.16.2

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 1/4] intel/blorp: Fix compiler warning about num_layers.

[Eric Anholt]

The compiler doesn't notice that the condition for num_layers to be
undefined already defined it above (as our assert checked in a debug
build).

Cc: Jason Ekstrand 
---
 src/mesa/drivers/dri/i965/brw_blorp.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c 
b/src/mesa/drivers/dri/i965/brw_blorp.c
index 1d586e5ef38d..2b8d913fa282 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.c
+++ b/src/mesa/drivers/dri/i965/brw_blorp.c
@@ -1408,6 +1408,7 @@ brw_blorp_clear_depth_stencil(struct brw_context *brw,
  assert(level == irb->mt_level);
  assert(start_layer == irb->mt_layer);
  assert(num_layers == fb->MaxNumLayers ? irb->layer_count : 1);
+ num_layers = fb->MaxNumLayers ? irb->layer_count : 1;
   } else {
  level = irb->mt_level;
  start_layer = irb->mt_layer;
-- 
2.16.2

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [Mesa-stable] [PATCH] [RFC] gallivm: Use new LLVM fast-math-flags API

[Emil Velikov]

On 13 March 2018 at 15:40, Marek Olšák  wrote:
> Piglit+CTS+dEQP look good on Polaris12 with Mesa 17.3 and LLVM 6.0.
>
Thank you very much Marek!

Meanwhile I've gone through the results in the LunarG tool. Everything
looks good for the 88 games tested.
Feel free to login and check if you're interested.

I believe Juan is chasing regressions elsewhere in the tree, in
preparation for 117.3.7.
Hopefully they will be sorted quickly.

-Emil
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev