[Mesa-dev] [Bug 106337] eglWaitClient() doesn't work as documented using DRI2 backend

https://bugs.freedesktop.org/show_bug.cgi?id=106337 Tapani Pälli changed: What|Removed |Added Status|NEW |ASSIGNED

Re: [Mesa-dev] [PATCH v2] egl: check if colorspace/surface type is supported

Reviewed-by: Tapani Pälli On 02.05.2018 19:23, Juan A. Suarez Romero wrote: According to EGL 1.4 spec, section 3.5.1 ("Creating On-Screen Rendering Surfaces"), if config does not support the colorspace or alpha format attributes specified in attrib_list (as defined for

Re: [Mesa-dev] [PATCH 20/22] i965: account for NIR uniforms without name

Reviewed-by: Timothy Arceri On 18/04/18 00:36, Alejandro Piñeiro wrote: From: Eduardo Lima Mitev Right now, the BRW linker code assumes nir_variable::name is always non-NULL, but thanks to ARB_gl_spirv we will soon be linking SPIR-V programs, and

Re: [Mesa-dev] [PATCH 12/22] compiler/link: add linker_util.h, move linker_error/warning to it

After looking at patch 16 I've changed my mind, this seems ok but should be moved to src/compiler/glsl/ and at the top of the file you should add that these functions are shared between the GLSL IR and NIR linkers. On 03/05/18 12:43, Timothy Arceri wrote: NAK as per discussion about moving

Re: [Mesa-dev] [PATCH 16/22] compiler/link: move add_program_resource to linker_util

I'd rename add_program_resource -> link_util_add_program_resource or something like that. And add at the top of the file that these functions are shared between the GLSL IR and NIR linkers. Also the new file should now be located in src/compiler/glsl/ On 18/04/18 00:36, Alejandro Piñeiro

Re: [Mesa-dev] [PATCH 12/22] compiler/link: add linker_util.h, move linker_error/warning to it

NAK as per discussion about moving nir helpers into src/compiler/glsl this patch should no longer be needed. On 18/04/18 00:36, Alejandro Piñeiro wrote: Linker utilities common to glsl and nir. As a first step, it moves linker_error/warning from glsl/linker.h --- src/compiler/Makefile.sources

Re: [Mesa-dev] [PATCH 06/22] nir/types: Add a glsl_get_component_slots() utility

Reviewed-by: Timothy Arceri On 18/04/18 00:36, Alejandro Piñeiro wrote: From: Eduardo Lima Mitev It is basically a wrapper around glsl_type::component_slots(). --- src/compiler/nir_types.cpp | 6 ++ src/compiler/nir_types.h | 1 + 2 files

Re: [Mesa-dev] [PATCH 04/22] nir: Add explicit_binding to nir_variable

Reviewed-by: Timothy Arceri On 18/04/18 00:36, Alejandro Piñeiro wrote: From: Neil Roberts This is copied from the corresponding value in ir_variable. The intention is to eventually use it in a pure-NIR linker. ---

Re: [Mesa-dev] [PATCH 03/22] mesa/main: add NULL name check when searching for a resource name

Reviewed-by: Timothy Arceri On 18/04/18 00:36, Alejandro Piñeiro wrote: Since ARB_gl_spirv name reflection can be missing. piglit shader_runner does several resource checking, so this commit is useful to get even the more simple piglit tests running without crashing on

Re: [Mesa-dev] [PATCH v2 3/3] mesa: enable geom shaders in OpenGL 3.2 Compat profile

On Wed, May 2, 2018 at 10:05 PM, Timothy Arceri wrote: > On 03/05/18 11:55, Ilia Mirkin wrote: >> >> On Wed, May 2, 2018 at 9:27 PM, Timothy Arceri >> wrote: >>> >>> As far as I understand it apiexec.py came about because of the need to >>> not >>>

Re: [Mesa-dev] [PATCH v2 3/3] mesa: enable geom shaders in OpenGL 3.2 Compat profile

On 03/05/18 11:55, Ilia Mirkin wrote: On Wed, May 2, 2018 at 9:27 PM, Timothy Arceri wrote: As far as I understand it apiexec.py came about because of the need to not expose functionality in compat. Always setting compat to core would bi-pass that getting us back to

Re: [Mesa-dev] [PATCH v2 3/3] mesa: enable geom shaders in OpenGL 3.2 Compat profile

On Wed, May 2, 2018 at 9:27 PM, Timothy Arceri wrote: > As far as I understand it apiexec.py came about because of the need to not > expose functionality in compat. Always setting compat to core would bi-pass > that getting us back to where we started. Other way around -

Re: [Mesa-dev] [PATCH v2 3/3] mesa: enable geom shaders in OpenGL 3.2 Compat profile

On 03/05/18 10:49, Ilia Mirkin wrote: On Wed, May 2, 2018 at 7:21 PM, Timothy Arceri wrote: On 03/05/18 02:58, Ilia Mirkin wrote: On Wed, May 2, 2018 at 6:27 AM, Timothy Arceri wrote: --- src/mapi/glapi/gen/apiexec.py | 4 ++-- 1 file

Re: [Mesa-dev] [PATCH v2 7.5/18] intel/compiler: support negate and abs of half float immediates

Reviewed-by: Jason Ekstrand Have I reviewed everything? Can we land shaderInt16 now? --Jason On Wed, May 2, 2018 at 5:18 PM, Jose Maria Casanova Crespo < jmcasan...@igalia.com> wrote: > --- > src/intel/compiler/brw_shader.cpp | 6 -- > 1 file changed, 4

Re: [Mesa-dev] [PATCH v2 3/3] mesa: enable geom shaders in OpenGL 3.2 Compat profile

On Wed, May 2, 2018 at 7:21 PM, Timothy Arceri wrote: > > > On 03/05/18 02:58, Ilia Mirkin wrote: >> >> On Wed, May 2, 2018 at 6:27 AM, Timothy Arceri >> wrote: >>> >>> --- >>> src/mapi/glapi/gen/apiexec.py | 4 ++-- >>> 1 file changed, 2

Re: [Mesa-dev] [PATCH v3] intel/compiler: fix 16-bit int brw_negate_immediate and brw_abs_immediate

Rb On May 2, 2018 16:44:52 Jose Maria Casanova Crespo wrote: From Intel Skylake PRM, vol 07, "Immediate" section (page 768): "For a word, unsigned word, or half-float immediate data, software must replicate the same 16-bit immediate value to both the lower word and

[Mesa-dev] [PATCH 12/14] ac/gpu_info: add has_sparse_vm_mappings

From: Marek Olšák --- src/amd/common/ac_gpu_info.c | 8 src/amd/common/ac_gpu_info.h | 1 + src/gallium/drivers/radeonsi/si_get.c | 13 ++--- src/gallium/winsys/radeon/drm/radeon_drm_winsys.c | 1 + 4

[Mesa-dev] [PATCH 10/14] radeonsi: expose ARB_query_buffer_object on ancient kernels too

From: Marek Olšák It doesn't use indirect dispatches. --- src/gallium/drivers/radeonsi/si_get.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_get.c b/src/gallium/drivers/radeonsi/si_get.c index

[Mesa-dev] [PATCH 08/14] ac/gpu_info: add kernel_flushes_tc_l2_after_ib

From: Marek Olšák --- src/amd/common/ac_gpu_info.c | 4 src/amd/common/ac_gpu_info.h | 1 + src/gallium/drivers/radeonsi/si_gfx_cs.c | 3 +-- src/gallium/winsys/radeon/drm/radeon_drm_winsys.c | 1 + 4 files changed, 7

[Mesa-dev] [PATCH 03/14] ac/gpu_info: add si_TA_CS_BC_BASE_ADDR_allowed

From: Marek Olšák --- src/amd/common/ac_gpu_info.c | 2 ++ src/amd/common/ac_gpu_info.h | 1 + src/gallium/drivers/radeonsi/si_compute.c | 4 +--- src/gallium/winsys/radeon/drm/radeon_drm_winsys.c | 1 + 4 files changed, 5

[Mesa-dev] [PATCH 09/14] ac/gpu_info: add has_indirect_compute_dispatch

From: Marek Olšák --- src/amd/common/ac_gpu_info.c | 2 ++ src/amd/common/ac_gpu_info.h | 1 + src/gallium/drivers/radeonsi/si_get.c| 16 +++- .../winsys/radeon/drm/radeon_drm_winsys.c| 5 + 4

[Mesa-dev] [PATCH 05/14] radeonsi: clean up the reset status query implementation

From: Marek Olšák --- src/amd/common/ac_gpu_info.c | 4 +++ src/amd/common/ac_gpu_info.h | 2 ++ src/gallium/drivers/radeonsi/si_get.c | 5 ++- src/gallium/drivers/radeonsi/si_pipe.c| 36 +--

[Mesa-dev] [PATCH 13/14] ac/gpu_info: add has_2d_tiling

From: Marek Olšák --- src/amd/common/ac_gpu_info.c | 2 ++ src/amd/common/ac_gpu_info.h | 1 + src/gallium/drivers/radeonsi/si_get.c | 6 +- src/gallium/winsys/radeon/drm/radeon_drm_winsys.c | 2 ++ 4 files changed,

[Mesa-dev] [PATCH 11/14] ac/gpu_info: add has_unaligned_shader_loads

From: Marek Olšák --- src/amd/common/ac_gpu_info.c | 3 +++ src/amd/common/ac_gpu_info.h | 1 + src/gallium/drivers/radeonsi/si_get.c | 6 +- src/gallium/winsys/radeon/drm/radeon_drm_winsys.c | 3 +++ 4 files

[Mesa-dev] [PATCH 14/14] ac/gpu_info: add has_read_registers_query

From: Marek Olšák --- src/amd/common/ac_gpu_info.c | 2 ++ src/amd/common/ac_gpu_info.h | 1 + src/gallium/drivers/radeonsi/si_debug.c | 5 ++--- src/gallium/winsys/radeon/drm/radeon_drm_winsys.c | 1 + 4 files changed, 6

[Mesa-dev] [PATCH 04/14] ac/gpu_info: add has_bo_metadata

From: Marek Olšák --- src/amd/common/ac_gpu_info.c | 2 ++ src/amd/common/ac_gpu_info.h | 1 + src/gallium/drivers/radeonsi/si_texture.c | 3 +-- src/gallium/winsys/radeon/drm/radeon_drm_winsys.c | 1 + 4 files changed, 5

[Mesa-dev] [PATCH 02/14] ac/gpu_info: add htile_cmask_support_1d_tiling

From: Marek Olšák --- src/amd/common/ac_gpu_info.c | 2 ++ src/amd/common/ac_gpu_info.h | 1 + src/gallium/drivers/radeonsi/si_clear.c | 7 ++- src/gallium/drivers/radeonsi/si_texture.c | 6 ++

[Mesa-dev] [PATCH 07/14] ac/gpu_info: add has_format_bc1_through_bc7

From: Marek Olšák --- src/amd/common/ac_gpu_info.c | 2 ++ src/amd/common/ac_gpu_info.h | 1 + src/gallium/drivers/radeonsi/si_state.c | 9 +++-- src/gallium/winsys/radeon/drm/radeon_drm_winsys.c | 1 + 4 files

[Mesa-dev] [PATCH 06/14] ac/gpu_info: add has_eqaa_surface_allocator

From: Marek Olšák --- src/amd/common/ac_gpu_info.c | 4 +++- src/amd/common/ac_gpu_info.h | 3 ++- src/gallium/drivers/radeonsi/si_pipe.c| 2 +- src/gallium/winsys/radeon/drm/radeon_drm_winsys.c | 1 + 4 files changed, 7

[Mesa-dev] [PATCH 01/14] ac/gpu_info: add kernel_flushes_hdp_before_ib

From: Marek Olšák --- src/amd/common/ac_gpu_info.c | 2 ++ src/amd/common/ac_gpu_info.h | 1 + src/gallium/drivers/radeonsi/si_buffer.c | 6 ++ src/gallium/winsys/radeon/drm/radeon_drm_winsys.c | 1 + 4 files changed, 6

[Mesa-dev] [PATCH v2 7.5/18] intel/compiler: support negate and abs of half float immediates

--- src/intel/compiler/brw_shader.cpp | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/src/intel/compiler/brw_shader.cpp b/src/intel/compiler/brw_shader.cpp index 284c2e8233c..537defd05d9 100644 --- a/src/intel/compiler/brw_shader.cpp +++

Re: [Mesa-dev] [PATCH v2 3/3] mesa: enable geom shaders in OpenGL 3.2 Compat profile

On Wed, May 2, 2018 at 6:27 AM, Timothy Arceri wrote: > --- > src/mapi/glapi/gen/apiexec.py | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/src/mapi/glapi/gen/apiexec.py b/src/mapi/glapi/gen/apiexec.py > index b5e0ad4a179..d33cc85d47f 100644 >

[Mesa-dev] [PATCH v3] intel/compiler: fix 16-bit int brw_negate_immediate and brw_abs_immediate

From Intel Skylake PRM, vol 07, "Immediate" section (page 768): "For a word, unsigned word, or half-float immediate data, software must replicate the same 16-bit immediate value to both the lower word and the high word of the 32-bit immediate field in a GEN instruction." This fixes the

[Mesa-dev] [PATCH v3] intel/compiler: fix brw_imm_w for negative 16-bit integers

16-bit immediates need to replicate the 16-bit immediate value in both words of the 32-bit value. This needs to be careful to avoid sign-extension, which the previous implementation was not handling properly. For example, with the previous implementation, storing the value -3 would generate imm.d

Re: [Mesa-dev] [PATCH v2 3/3] mesa: enable geom shaders in OpenGL 3.2 Compat profile

On 03/05/18 02:58, Ilia Mirkin wrote: On Wed, May 2, 2018 at 6:27 AM, Timothy Arceri wrote: --- src/mapi/glapi/gen/apiexec.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mapi/glapi/gen/apiexec.py b/src/mapi/glapi/gen/apiexec.py index

Re: [Mesa-dev] [PATCH v2 07/18] intel/compiler: fix brw_negate_immediate for 16-bit types

El 30/04/18 a las 23:14, Jason Ekstrand escribió: > > > On Mon, Apr 30, 2018 at 7:18 AM, Iago Toral Quiroga > wrote: > > From: Jose Maria Casanova Crespo > > > From Intel Skylake

Re: [Mesa-dev] [PATCH v2 2/3] mesa: actually support GLSL version overrides in compat profile

On 03/05/18 02:51, Emil Velikov wrote: On 2 May 2018 at 11:27, Timothy Arceri wrote: --- src/mesa/main/version.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/mesa/main/version.c b/src/mesa/main/version.c index 84babd69e2f..540f5482034 100644 ---

Re: [Mesa-dev] [PATCH 9/9] radeonsi: add an environment variable that forces EQAA for MSAA allocations

FYI, the environment variable will only have effect on amdgpu. Marek On Wed, May 2, 2018 at 12:13 AM, Marek Olšák wrote: > From: Marek Olšák > > This is for testing and experiments. > --- > src/gallium/drivers/radeonsi/si_pipe.c| 22

Re: [Mesa-dev] [PATCH v2] egl: check if colorspace/surface type is supported

Reviewed-by: Marek Olšák Marek On Wed, May 2, 2018 at 12:23 PM, Juan A. Suarez Romero wrote: > According to EGL 1.4 spec, section 3.5.1 ("Creating On-Screen Rendering > Surfaces"), if config does not support the colorspace or alpha format > attributes

[Mesa-dev] [PATCH] intel/genxml: recognize 0x, 0o and 0b when setting default value

Remove the need of converting values that are documented in hexadecimal. This patch would allow writing instead of --- src/intel/genxml/gen_pack_header.py | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/intel/genxml/gen_pack_header.py

Re: [Mesa-dev] [PATCH] opencl: autotools: Fix linking order for OpenCL target

On Wed, 2018-05-02 at 18:38 +0200, Kai Wasserbäch wrote: > Hey Jan, > Jan Vesely wrote on 01.05.2018 23:59: > > On Tue, 2018-05-01 at 18:23 +0200, Kai Wasserbäch wrote: > > > Jan Vesely wrote on 01.05.2018 17:19: > > > > On Tue, 2018-05-01 at 14:14 +0200, Kai Wasserbäch wrote: > > > > > [...] > >

Re: [Mesa-dev] [PATCH 5/9] anv: Add vma_heap allocators in anv_device

Quoting Scott D Phillips (2018-05-02 20:24:01) > Chris Wilson writes: > > > Quoting Scott D Phillips (2018-05-02 17:01:05) > >> +bool > >> +anv_vma_alloc(struct anv_device *device, struct anv_bo *bo) > >> +{ > >> + if (!(bo->flags & EXEC_OBJECT_PINNED)) > >> +

[Mesa-dev] [Bug 104302] Wolfenstein 2 (2017) under wine graphical artifacting on RADV

https://bugs.freedesktop.org/show_bug.cgi?id=104302 --- Comment #18 from Charadon --- I dunno if this information helps, but the face issue doesn't exist in AMD's enterprise drivers. -- You are receiving this mail because: You are the assignee for the bug. You are the

Re: [Mesa-dev] [PATCH 5/9] anv: Add vma_heap allocators in anv_device

Chris Wilson writes: > Quoting Scott D Phillips (2018-05-02 17:01:05) >> +bool >> +anv_vma_alloc(struct anv_device *device, struct anv_bo *bo) >> +{ >> + if (!(bo->flags & EXEC_OBJECT_PINNED)) >> + return true; >> + >> + pthread_mutex_lock(>vma_mutex); >> + >>

Re: [Mesa-dev] [PATCH 02/16] ac: enable both RBs on Kaveri

The changed field in PA_SC_RASTER_CONFIG is pretty clear here: 0 - RB0 renders all pixels (default for single rb per pkr configs) 1 - RB0 renders rb_tile_id==1, RB1 renders rb_tile_id==0 2 - RB0 renders rb_tile_id==0, RB1 renders rb_tile_id==1 3 - RB1 renders all pixels So you see that values 0

Re: [Mesa-dev] [PATCH 02/16] ac: enable both RBs on Kaveri

If you are shader-bound, you won't see any difference. In order to become RB-bound, you need more work in RBs than shaders. Blending or MSAA might help add that. Marek On Wed, May 2, 2018 at 5:31 AM, Michel Dänzer wrote: > On 2018-05-02 06:00 AM, Marek Olšák wrote: > >

Re: [Mesa-dev] [PATCH 1/9] util: Add a virtual memory allocator

Hi Jason, The radeon kernel driver only allows 4GB or 8GB of virtual address space, so we are talking about 33 usable bits. The radeon winsys also has to support 32-bit allocations where the high bits are 0, and it uses a separate allocator if the address space size is 8GB, or not if it's just

Re: [Mesa-dev] [PATCH v3] intel/compiler: fix 16-bit comparisons

On Wed, May 2, 2018 at 3:48 AM, Iago Toral Quiroga wrote: > NIR assumes that booleans are always 32-bit, but Intel hardware produces > 16-bit booleans for 16-bit comparisons. This means that we need to convert > the 16-bit result to 32-bit. > > In the future we want to add an

Re: [Mesa-dev] [PATCH 1/9] util: Add a virtual memory allocator

Marek & Nicolai, FYI, I am NOT trying to NIH anything here. My hope was that eventually, the radeon winsys code and the Intel drivers should share an allocator. I considered starting by pulling the one out of the radeon winsys code and modifying it but there were a couple of issues (mentioned

Re: [Mesa-dev] [PATCH] spirv: Apply OriginUpperLeft to FragCoord

On Wed, May 2, 2018 at 10:49 AM, Neil Roberts wrote: > This behaviour was changed in 1e5b09f42f694687ac. The commit message > for that says it is just a “tidy up” so my assumption is that the > behaviour change was a mistake. It’s a little hard to decipher looking > at the

[Mesa-dev] [Bug 106337] eglWaitClient() doesn't work as documented using DRI2 backend

https://bugs.freedesktop.org/show_bug.cgi?id=106337 --- Comment #7 from Tapani Pälli --- (In reply to Mike Gorchak from comment #6) > I was able to test your changes and had to add following addition to the > intel_screen.c: > > @@ -171,7 +176,7 @@ > } > > static const

Re: [Mesa-dev] [PATCH] spirv: Apply OriginUpperLeft to FragCoord

Looks good to me. Thanks for catching this! Reviewed-by: Jason Ekstrand Fixes: 1e5b09f42f694687ac "spirv: Tidy some repeated if checks..." On Wed, May 2, 2018 at 10:49 AM, Neil Roberts wrote: > This behaviour was changed in 1e5b09f42f694687ac. The

Re: [Mesa-dev] [PATCH 0/4] improve buffer cache and reuse

On Wed, 2 May 2018 14:18:21 +0300 Eero Tamminen wrote: > Hi, > > On 02.05.2018 02:25, James Xiong wrote: > > From: "Xiong, James" > > > > With the current implementation, brw_bufmgr may round up a request > > size to the next bucket size,

Re: [Mesa-dev] [PATCH v2 06/18] intel/compiler: fix brw_imm_w for negative 16-bit integers

On Wed, May 2, 2018 at 8:19 AM, Chema Casanova wrote: > > > El 01/05/18 a las 01:22, Jason Ekstrand escribió: > > On Mon, Apr 30, 2018 at 3:53 PM, Chema Casanova > > wrote: > > > > > > > > On 30/04/18 23:12, Jason

Re: [Mesa-dev] [PATCH v2] spirv: convert some operands for bitwise shift and bitwise ops to uint32

On Wed, May 2, 2018 at 1:10 AM, Samuel Iglesias Gonsálvez < sigles...@igalia.com> wrote: > SPIR-V allows to define the shift, offset and count operands for > shift and bitfield opcodes with a bit-size different than 32 bits, > but in NIR the opcodes have that limitation. As agreed in the >

Re: [Mesa-dev] [PATCH] intel: fix aubinator include

On Wed, May 2, 2018 at 9:52 AM, Lionel Landwerlin wrote: > Signed-off-by: Lionel Landwerlin > Fixes: 7c22c150c40b3 ("intel: Move batch decoder/disassembler from tools/ to > common/") > --- > src/intel/tools/aubinator.c | 2 +- > 1

Re: [Mesa-dev] [PATCH] anv: Advertise variableMultisampleRate

On Mon, Apr 30, 2018 at 3:10 PM, Jason Ekstrand wrote: > > Initially, I didn't understand this feature. Turns out that all it > means is that you can switch multisample rates in the middle of a > zero-attachment subpass. We've been able to do this since forever. > --- >

Re: [Mesa-dev] [PATCH 2/2] intel: aubinator: add an option to limit the number of decoded VBO lines

On Wednesday, May 2, 2018 10:42:05 AM PDT Lionel Landwerlin wrote: > Signed-off-by: Lionel Landwerlin > --- > src/intel/tools/aubinator.c | 39 ++--- > 1 file changed, 23 insertions(+), 16 deletions(-) > > diff --git

[Mesa-dev] [PATCH] spirv: Apply OriginUpperLeft to FragCoord

This behaviour was changed in 1e5b09f42f694687ac. The commit message for that says it is just a “tidy up” so my assumption is that the behaviour change was a mistake. It’s a little hard to decipher looking at the diff, but the previous code before that patch was: if (builtin ==

[Mesa-dev] [PATCH 2/2] intel: aubinator: add an option to limit the number of decoded VBO lines

Signed-off-by: Lionel Landwerlin --- src/intel/tools/aubinator.c | 39 ++--- 1 file changed, 23 insertions(+), 16 deletions(-) diff --git a/src/intel/tools/aubinator.c b/src/intel/tools/aubinator.c index bc263dbf846..3120e82b22e

[Mesa-dev] [PATCH 1/2] intel: decoder: limit to the number decoded lines from VBO

By default we set no limit, but the debug batch decoder in i965 sets it to 100. Signed-off-by: Lionel Landwerlin --- src/intel/common/gen_batch_decoder.c | 22 --- src/intel/common/gen_decoder.h| 2 ++

Re: [Mesa-dev] [PATCH v2] nir: Implement optional b2f->iand lowering

Thanks! Reviewed-by: Matt Turner ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH v3] i965: Fix ETC2/EAC GetCompressed* functions on Gen7 GPUs

On Wed, May 2, 2018 at 9:13 AM, Eleni Maria Stea wrote: > Gen 7 GPUs store the compressed EAC/ETC2 images in other non-compressed > formats that can render. When GetCompressed* functions are called, the > pixels are returned in the non-compressed format that is used for the >

Re: [Mesa-dev] [PATCH] nir: add missing dependency in meson.build

On Wednesday, May 2, 2018 9:49:34 AM PDT Rob Clark wrote: > nir_builder_opcodes.h also depends on nir_intrinsics.py for generating > the system-value builders. > > Reported-by: Christoph Haag > Reported-by: Kenneth Graunke > Signed-off-by: Rob Clark

Re: [Mesa-dev] [PATCH] intel: Fix 3DSTATE_CONSTANT buffer decoding.

On Wednesday, May 2, 2018 9:50:33 AM PDT Lionel Landwerlin wrote: > On 02/05/18 17:45, Kenneth Graunke wrote: > > First, this was iterating over the 3DSTATE_CONSTANT_* instruction > > but trying to process fields of the 3DSTATE_CONSTANT_BODY substructure. > > > > Secondly, the fields have been

Re: [Mesa-dev] [PATCH 2/9] util/set: add a set_clear function

On Wednesday, May 2, 2018 9:01:02 AM PDT Scott D Phillips wrote: > Clear a set back to the state of having zero entries. > --- > src/util/set.c | 23 +++ > src/util/set.h | 3 +++ > 2 files changed, 26 insertions(+) > > diff --git a/src/util/set.c b/src/util/set.c > index

Re: [Mesa-dev] [PATCH v2 3/3] mesa: enable geom shaders in OpenGL 3.2 Compat profile

On Wed, May 2, 2018 at 6:27 AM, Timothy Arceri wrote: > --- > src/mapi/glapi/gen/apiexec.py | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/src/mapi/glapi/gen/apiexec.py b/src/mapi/glapi/gen/apiexec.py > index b5e0ad4a179..d33cc85d47f 100644 >

Re: [Mesa-dev] [PATCH v2 3/3] mesa: enable geom shaders in OpenGL 3.2 Compat profile

On 2 May 2018 at 11:27, Timothy Arceri wrote: > --- > src/mapi/glapi/gen/apiexec.py | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/src/mapi/glapi/gen/apiexec.py b/src/mapi/glapi/gen/apiexec.py > index b5e0ad4a179..d33cc85d47f 100644 > ---

[Mesa-dev] [PATCH] intel: fix aubinator include

Signed-off-by: Lionel Landwerlin Fixes: 7c22c150c40b3 ("intel: Move batch decoder/disassembler from tools/ to common/") --- src/intel/tools/aubinator.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/intel/tools/aubinator.c

Re: [Mesa-dev] [PATCH v2 2/3] mesa: actually support GLSL version overrides in compat profile

On 2 May 2018 at 11:27, Timothy Arceri wrote: > --- > src/mesa/main/version.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/src/mesa/main/version.c b/src/mesa/main/version.c > index 84babd69e2f..540f5482034 100644 > --- a/src/mesa/main/version.c > +++

Re: [Mesa-dev] [PATCH] intel: Fix 3DSTATE_CONSTANT buffer decoding.

On 02/05/18 17:45, Kenneth Graunke wrote: First, this was iterating over the 3DSTATE_CONSTANT_* instruction but trying to process fields of the 3DSTATE_CONSTANT_BODY substructure. Secondly, the fields have been called Buffer[0] and Read Length[0], for a while now, and we were not handling the

[Mesa-dev] [PATCH] nir: add missing dependency in meson.build

nir_builder_opcodes.h also depends on nir_intrinsics.py for generating the system-value builders. Reported-by: Christoph Haag Reported-by: Kenneth Graunke Signed-off-by: Rob Clark --- src/compiler/nir/meson.build | 2 +- 1 file

[Mesa-dev] [PATCH] intel: Fix 3DSTATE_CONSTANT buffer decoding.

First, this was iterating over the 3DSTATE_CONSTANT_* instruction but trying to process fields of the 3DSTATE_CONSTANT_BODY substructure. Secondly, the fields have been called Buffer[0] and Read Length[0], for a while now, and we were not handling the subscripts correctly. ---

[Mesa-dev] [Bug 106337] eglWaitClient() doesn't work as documented using DRI2 backend

https://bugs.freedesktop.org/show_bug.cgi?id=106337 --- Comment #6 from mgorc...@qnx.com --- I was able to test your changes and had to add following addition to the intel_screen.c: @@ -171,7 +176,7 @@ } static const struct __DRI2flushExtensionRec intelFlushExtension = { -

[Mesa-dev] [PATCH] nv50/ir: fix spilling regression introduced by 5428066f5e

this is just a minor mistake done while moving the code out into a new function. The function contained a loop which might have been terminated earlier and skipped setting noSpill to 1. After the refactoring it was always set. Fixes: 5428066f5e1ef5ea6ae04c84019f270023cfc6aa ("nv50/ir:

Re: [Mesa-dev] [PATCH] opencl: autotools: Fix linking order for OpenCL target

Hey Jan, Jan Vesely wrote on 01.05.2018 23:59: > On Tue, 2018-05-01 at 18:23 +0200, Kai Wasserbäch wrote: >> Jan Vesely wrote on 01.05.2018 17:19: >>> On Tue, 2018-05-01 at 14:14 +0200, Kai Wasserbäch wrote: [...] src/gallium/targets/opencl/Makefile.am | 3 +-- 1 file changed,

Re: [Mesa-dev] [PATCH 5/9] anv: Add vma_heap allocators in anv_device

Quoting Scott D Phillips (2018-05-02 17:01:05) > +bool > +anv_vma_alloc(struct anv_device *device, struct anv_bo *bo) > +{ > + if (!(bo->flags & EXEC_OBJECT_PINNED)) > + return true; > + > + pthread_mutex_lock(>vma_mutex); > + > + bo->offset = 0; So bo are device scoped. There can only

[Mesa-dev] [PATCH v2] egl: check if colorspace/surface type is supported

According to EGL 1.4 spec, section 3.5.1 ("Creating On-Screen Rendering Surfaces"), if config does not support the colorspace or alpha format attributes specified in attrib_list (as defined for eglCreateWindowSurface), an EGL_BAD_MATCH error is generated. This fixes

[Mesa-dev] [PATCH v3] i965: Fix ETC2/EAC GetCompressed* functions on Gen7 GPUs

Gen 7 GPUs store the compressed EAC/ETC2 images in other non-compressed formats that can render. When GetCompressed* functions are called, the pixels are returned in the non-compressed format that is used for the rendering. With this patch we store both the compressed and non-compressed versions

Re: [Mesa-dev] [Mesa-stable] [PATCH] radeon/vcn: fix mpeg4 msg buffer settings

Leo Liu writes: > Reviewed-by: Leo Liu > > And Cc Mesa-stable as well. Please include stable tags in your commit message, eg: Cc: 18.0 18.1 > On 2018-04-24 04:49 PM, boyuan.zh...@amd.com wrote: >> From: Boyuan Zhang

Re: [Mesa-dev] [PATCH 4/5] intel: decoder: fix starting dword of struct fields

On Wednesday, May 2, 2018 2:57:50 AM PDT Lionel Landwerlin wrote: > On 02/05/18 07:44, Kenneth Graunke wrote: > > On Tuesday, May 1, 2018 4:43:05 PM PDT Lionel Landwerlin wrote: > >> Struct fields might span several dwords, but iter_dword is incremented > >> up to the last dword of the current

[Mesa-dev] [PATCH 2/9] util/set: add a set_clear function

Clear a set back to the state of having zero entries. --- src/util/set.c | 23 +++ src/util/set.h | 3 +++ 2 files changed, 26 insertions(+) diff --git a/src/util/set.c b/src/util/set.c index d71f771807f..2c9b09319ff 100644 --- a/src/util/set.c +++ b/src/util/set.c @@ -155,6

[Mesa-dev] [PATCH 7/9] anv: use a separate pool for binding tables when soft pinning

Soft pinning lets us satisfy the binding table address requirements without using both sides of a growing state_pool. If you do use both sides of a state pool, then you need to read the state pool's center_bo_offset (with the device mutex held) to know the final offset of relocations that target

[Mesa-dev] [PATCH 3/9] anv: remove unused field anv_queue::pool

The last use of the field was removed in 2015's ("48a87f4ba06 anv/queue: Get rid of the serial") --- src/intel/vulkan/anv_device.c | 1 - src/intel/vulkan/anv_private.h | 2 -- 2 files changed, 3 deletions(-) diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c index

[Mesa-dev] [PATCH 8/9] anv: elide relocations to pinned target bos

References to pinned bos won't need relocated, so just write the final value of the reference into the bo. Add a `set` to the relocation lists for tracking dependencies that were previously tracked by relocations. --- src/intel/vulkan/anv_batch_chain.c | 36

[Mesa-dev] [PATCH 9/9] anv: soft pin the remaining bos

--- src/intel/vulkan/anv_allocator.c | 16 +++- src/intel/vulkan/anv_batch_chain.c | 27 +-- src/intel/vulkan/anv_device.c | 32 src/intel/vulkan/anv_private.h | 16 src/intel/vulkan/anv_queue.c

[Mesa-dev] [PATCH 5/9] anv: Add vma_heap allocators in anv_device

These will be used to assign virtual addresses to soft pinned buffers in a later patch. --- src/intel/vulkan/anv_device.c | 75 ++ src/intel/vulkan/anv_private.h | 11 +++ 2 files changed, 86 insertions(+) diff --git a/src/intel/vulkan/anv_device.c

[Mesa-dev] [PATCH 6/9] anv: soft pin state pools

The state_pools reserve virtual address space of the full BLOCK_POOL_MEMFD_SIZE, but maintain the current behavior of growing from the middle. --- src/intel/vulkan/anv_allocator.c | 25 + src/intel/vulkan/anv_device.c| 13 + src/intel/vulkan/anv_private.h

[Mesa-dev] [PATCH 4/9] anv: move canonical_address calculation into a separate function

A later patch will make use of this in other places. Also, remove dependency on undefined behavior of left-shifting a signed value. --- src/intel/vulkan/anv_batch_chain.c | 12 +--- src/intel/vulkan/anv_private.h | 15 +++ 2 files changed, 16 insertions(+), 11 deletions(-)

[Mesa-dev] [PATCH 1/9] util: Add a virtual memory allocator

From: Jason Ekstrand This is simple linear-walk first-fit allocator roughly based on the allocator in the radeon winsys code. This allocator has two primary functional differences: 1) It cleanly returns 0 on allocation failure 2) It allocates addresses top-down

[Mesa-dev] [PATCH 0/9] anv: softpin

This series teaches anv how to pick its own virtual graphics addresses instead of using the relocation facility provided by the kernel. Jason Ekstrand (1): util: Add a virtual memory allocator Scott D Phillips (8): util/set: add a set_clear function anv: remove unused field anv_queue::pool

Re: [Mesa-dev] [PATCH 2/3] intel: Give the batch decoder a callback to ask about state size.

On 02/05/18 16:45, Kenneth Graunke wrote: On Wednesday, May 2, 2018 3:52:22 AM PDT Lionel Landwerlin wrote: On 02/05/18 06:50, Kenneth Graunke wrote: Given an arbitrary batch, we don't always know what the size of certain things are, such as how many entries are in a binding table. But it's

Re: [Mesa-dev] [PATCH v2 1/3] mesa: actually support compat profile creation with MESA_GL_VERSION_OVERRIDE

On 03/05/18 01:41, Emil Velikov wrote: On 2 May 2018 at 11:27, Timothy Arceri wrote: Since this has gone unnoticed for a while, it proves to be subtle. Add some commit message elaborating on the issue/solution. --- src/mesa/drivers/dri/common/dri_util.c | 9

Re: [Mesa-dev] [PATCH 2/3] intel: Give the batch decoder a callback to ask about state size.

On Wednesday, May 2, 2018 3:52:22 AM PDT Lionel Landwerlin wrote: > On 02/05/18 06:50, Kenneth Graunke wrote: > > Given an arbitrary batch, we don't always know what the size of certain > > things are, such as how many entries are in a binding table. But it's > > easy for the driver to track that

Re: [Mesa-dev] [PATCH v2 1/3] mesa: actually support compat profile creation with MESA_GL_VERSION_OVERRIDE

On 2 May 2018 at 11:27, Timothy Arceri wrote: Since this has gone unnoticed for a while, it proves to be subtle. Add some commit message elaborating on the issue/solution. > --- > src/mesa/drivers/dri/common/dri_util.c | 9 + > 1 file changed, 5 insertions(+), 4

Re: [Mesa-dev] [PATCH v2 06/18] intel/compiler: fix brw_imm_w for negative 16-bit integers

El 01/05/18 a las 01:22, Jason Ekstrand escribió: > On Mon, Apr 30, 2018 at 3:53 PM, Chema Casanova > wrote: > > > > On 30/04/18 23:12, Jason Ekstrand wrote: > > On Mon, Apr 30, 2018 at 7:18 AM, Iago Toral Quiroga

[Mesa-dev] [Bug 106039] Undefined version strings in pc files with meson build

https://bugs.freedesktop.org/show_bug.cgi?id=106039 Juan A. Suarez changed: What|Removed |Added Status|NEW |RESOLVED

[Mesa-dev] [PATCH] st/vdpau: allow progressive video surface with interop

mpv now interop with video surface instead of output surface previously, so it fails with "vlVdpVideoSurfaceDMABuf", this's fine for Mesa GL, since the code path will fall back to "vlVdpVideoSurfaceGallium", but this's not the case for others Signed-off-by: Leo Liu Cc: Christian

[Mesa-dev] [Bug 106355] Strange artifacts when using Chromium with hardware acceleration

https://bugs.freedesktop.org/show_bug.cgi?id=106355 Michel Dänzer changed: What|Removed |Added QA Contact|mesa-dev@lists.freedesktop.

[Mesa-dev] [Bug 106355] Strange artifacts when using Chromium with hardware acceleration

https://bugs.freedesktop.org/show_bug.cgi?id=106355 Bug ID: 106355 Summary: Strange artifacts when using Chromium with hardware acceleration Product: Mesa Version: git Hardware: x86-64 (AMD64) OS: Linux

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