I have been working with an LPC Link-2 configured with JLink firmware (as
distributed by Segger and LPC). This firmware basically turns the very nice
$20 LPC Link-2 board into a JLink adapter. It is clear to me that Segger
had a hand in this firmware and you can find references to it on their
pages
On Mon, Sep 8, 2014 at 4:51 AM, Anders Oleson wrote:
>
> Can someone point me at some method in GIT that I can rewrite the commits
> to separate them and so I can push to gerrit? Also, for the SPI fix #1 what
> would a decent/acceptable commit? message be?
>
Apparently you found a way to do it!
This is an automated email from Gerrit.
Andreas Fritiofson ([email protected]) just uploaded a new patch set
to Gerrit, which you can find at http://openocd.zylin.com/2284
-- gerrit
commit 6fadfe5f258d2009ff1725f85f4adc42fea3c2e1
Author: Andreas Fritiofson
Date: Mon Aug 4 23:10:19
On Mon, Sep 8, 2014 at 10:22 PM, Jens Bauer wrote:
> Hi all.
>
> The flash wait-states were already at its maximum (set up for 72MHz), so I
> couldn't increase it.
> But instead I decreased the chip speed to 36 MHz and removed 50% of the
> NOPs in the code.
> Now it's been running for more than a
Hi all.
The flash wait-states were already at its maximum (set up for 72MHz), so I
couldn't increase it.
But instead I decreased the chip speed to 36 MHz and removed 50% of the NOPs in
the code.
Now it's been running for more than an hour, so this might be the fix, in case
anyone else comes acr
This is an automated email from Gerrit.
Andreas Fritiofson ([email protected]) just uploaded a new patch set
to Gerrit, which you can find at http://openocd.zylin.com/2283
-- gerrit
commit ebd0a3dc6f3389a7112d676bcb383a6d92950718
Author: Andreas Fritiofson
Date: Mon Sep 8 22:11:02
---
** [tickets:#79] Add libusb_error_name to mpsse driver**
**Status:** new
**Milestone:** 0.9.0
**Created:** Mon Sep 08, 2014 03:02 PM UTC by Joakim Gebart
**Last Updated:** Mon Sep 08, 2014 03:02 PM UTC
**Owner:** nobody
I have added libusb_error_name calls to all error messages in the MPS
Hi Stian.
On Mon, 08 Sep 2014 11:53:47 +0200, [email protected] wrote:
>
>> Isn't it strange that disassembling from an even address shows a
>> 'ruined' disassembly, while disassembling from an odd address shows
>> the 'perfect' disassembly ??
>> -And even more peculiar - that the 'ruined' disassemb
hi all:
Except previous ITR instruction will be executed before DCC changes
to fast mode.
from the spec
it says "If the issued instruction writes to DBGDTRTXint, the
instruction does not affect the value returned from this
read of DBGDTRTXext. That is, this instruction can write the next
DBGDTRTX
Hi Andreas.
On Mon, 8 Sep 2014 11:11:14 +0200, Andreas Fritiofson wrote:
> On Sun, Sep 7, 2014 at 10:29 PM, Jens Bauer wrote:
>>
>> [...] NOP that is HardFaulting. [...]
>>
>> What I find peculiar, is that ... reading memory from OpenOCD seems
>> to be inconsistent.
>
> Just a thought... I h
> Isn't it strange that disassembling from an even address shows a
> 'ruined' disassembly, while disassembling from an odd address shows
> the 'perfect' disassembly ??
> -And even more peculiar - that the 'ruined' disassembly seems to be
> the correct one ?
I might be wrong here, but what comes f
Hi Freddie.
On Mon, 08 Sep 2014 11:13:57 +0200, Freddie Chopin wrote:
> W dniu 2014-09-08 11:07, Freddie Chopin pisze:
>> I believe this is normal - right after reset you'll probably see the ISP
>> bootloader at the bottom addresses of the flash.
>
> Ignore that - I thought that the NOPs are not
Hi Freddie.
On Mon, 08 Sep 2014 11:07:00 +0200, Freddie Chopin wrote:
> W dniu 2014-09-08 09:47, Jens Bauer pisze:
>> I then tried turning off the power, turning it on, and immediately ...
>>
>> ...
>> 0x0264 0xbf00 NOP
>> 0x0266 0xbf00 NOP
>> (program is still runni
W dniu 2014-09-08 11:07, Freddie Chopin pisze:
> I believe this is normal - right after reset you'll probably see the ISP
> bootloader at the bottom addresses of the flash.
Ignore that - I thought that the NOPs are not expected (;
BTW - in the dump you sent previously there are more mismatches:
-
On Sun, Sep 7, 2014 at 10:29 PM, Jens Bauer wrote:
> Hi all.
>
> I just had this strange experience. It all sounds very unreal.
>
> First of all: a NOP that is HardFaulting. [...]
What I find peculiar, is that ... reading memory from OpenOCD seems to be
> inconsistent.
>
Hi!
Just a thought..
W dniu 2014-09-08 09:47, Jens Bauer pisze:
> I then tried turning off the power, turning it on, and immediately ...
>
>> arm disassemble 0x240 20
> 0x0240 0xbf00NOP
> 0x0242 0xbf00NOP
> 0x0244 0xbf00NOP
> 0x0246 0xbf00NOP
> 0x0
This is an automated email from Gerrit.
Tomas Vanek ([email protected]) just uploaded a new patch set to Gerrit, which you
can find at http://openocd.zylin.com/2282
-- gerrit
commit 3fc0ea0299a7655eb52b0b23d26726fe27b3e9d4
Author: Tomas Vanek
Date: Mon Sep 8 10:34:10 2014 +0200
psoc4: suppo
Hi Freddie.
(This is a repost, so the list will get a copy. - sorry, my email program keeps
sending from the wrong address.)
On Mon, 08 Sep 2014 08:23:21 +0200, Freddie Chopin wrote:
> W dniu 2014-09-07 22:29, Jens Bauer pisze:
>> First of all: a NOP that is HardFaulting.
>
Maybe this is an int
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