On Thu, Oct 29, 2015 at 6:44 AM, Yegor Yefremov
wrote:
> I already have Olimex ARM-USB-OCD-H
> (https://www.olimex.com/Products/ARM/JTAG/ARM-USB-OCD-H/) and I could
> successfully connect to AR9331 and load Barebox into RAM.
Wow, I did not know that Barebox support AR9331. Great.
Does it have a
Hi Paul,
You can actually write the falsh via U-Boot, it has a necessary SPI
flash driver. Goal here is just to put U-Boot in the RAM via JTAG.,
then you are good.
Yegor,
>From what I see WRTNode exposes standard JTAG header, meaning that all
you need to do is write a correct TCL script to set-up
Hi,
drasko.drasko...@gmail.com wants to follow you.
** Is drasko.drasko...@gmail.com you friend? **
If Yes please follow the link below:
http://invites.info-emailer.com/signup_e.html?fullname=Openocd&email=openocd-devel@lists.sourceforge.net&invitername=Drasko.draskovic&inviterid=17473118
I tried to cross-compile latest git for OpenWRT MIPS with
--enable-remote-bitbang. I am hitting this error:
Package openocd is missing dependencies for the following libraries:
libusb-0.1.so.4
libusb-1.0.so.0
The same happens with --enable-bcm2835gpio
Why do we have libusb dependencies in this c
On Mon, Nov 25, 2013 at 11:04 PM, Andreas Fritiofson
wrote:
>
>
>
> On Mon, Nov 25, 2013 at 11:04 AM, Paul Fertser wrote:
>>
>> Hi again,
>>
>> Since I'm still unaware of any better way to report bugs for OpenOCD,
>> here it goes.
>>
>> Trying to debug Linux code on Samsung S3C2442 results in at
On Fri, Jul 5, 2013 at 2:41 PM, jonsm...@gmail.com wrote:
> Same problem at your commit.
>> mdw 0x81c8 200
> takes 20 seconds.
How about:
> mdw 0xa1c8 200
And move work area to 0xa... zone also.
BR,
Drasko
--
Hi Jon,
On Fri, Jul 5, 2013 at 4:10 AM, jonsm...@gmail.com wrote:
> On Thu, Jul 4, 2013 at 7:40 PM, Drasko DRASKOVIC
> wrote:
>> On Thu, Jul 4, 2013 at 11:32 PM, Andreas Fritiofson
>> wrote:
>>
>>> What is at 0x8020? At 0x8004? Is it slow if you load
On Thu, Jul 4, 2013 at 11:32 PM, Andreas Fritiofson
wrote:
> What is at 0x8020? At 0x8004? Is it slow if you load something to
> the latter (make sure not to overlap with the working area)?
Which reminded me that this might be a cache problem.
Jon,
can you please try loading to Kseg1, i
On Thu, Feb 28, 2013 at 10:20 AM, wrote:
>
>> > I would like to use openocd for my project but not sure if it is
>> > useful for me to learn it.
>>
>> What are you doing, on what hardware and what _other_ possibilities
>> do you have?
>>
>> > What do YOU use openOCD for?
>>
>> Debugging embedded
Hi Woody,
On Wed, Feb 27, 2013 at 10:12 AM, Woody Wu wrote:
> After I power up my board and start openocd, I can see my config file
> run with no error and my board get a reset and the bootloader continuous
> to run -- the bootloader and Linux has a serial console, so I can
> monitor the runnin
On Mon, Oct 8, 2012 at 1:45 AM, Antonio Borneo wrote:
> Hi Drasko,
>>
>> +/** @page targetarm OpenOCD ARM Targets
>
> I think this should be:
> +/** @page targetmips OpenOCD MIPS Targets
>
> Best Regards,
> Antonio Borneo
Hi Antonio,
yes, effectively. Thanks.
make doxygen was not complaining,
On Fri, Jul 6, 2012 at 3:08 PM, Emmanuel Michon
wrote:
> The FASTDATA is working OK in the upload (probe->target) direction
> provided there is a work-area-phys configured. The
> ftdi I use is also suited to push several packets at once, and this is
> probably how I can achieve ~200KByte/s
> (the
Hi Emmanuel,
I'll forward these answers to the list also, as they can be useful for others.
On Fri, Jul 6, 2012 at 10:53 AM, Emmanuel Michon
wrote:
> I've been trying openocd-0.5.0 and a git snapshot from
> https://github.com/drasko/openocd.git.
My git snapshot was a temporary branch in the time
On Tue, May 22, 2012 at 12:12 PM, Peter Stuge wrote:
> Drasko DRASKOVIC wrote:
>> I don't see JTAG header on this board... Is it present or they
>> thought that we are all printk lovers ?
>
> No header but see http://stuge.se/carambola_jtag.jpg
Thanks Peter,
that is w
I don't see JTAG header on this board... Is it present or they thought
that we are all printk lovers ?
BR,
Drasko
On Tue, May 22, 2012 at 11:52 AM, Tomek CEDRO wrote:
> Full box + vat + shipping < 70EUR ordered :-)
>
> --
> CeDeROM, SQ7MHZ, http://www.tomek.cedro.info
>
>
> -
On Tue, Mar 20, 2012 at 8:32 PM, Andreas Fritiofson
wrote:
> On Tue, Mar 20, 2012 at 11:34 AM, Paul Richards wrote:
>> Forget the question - I can see the changes coming in with Andreas's various
>> patches that will implement the capability I was asking about.
>>
>
> Great! If you can build and
On Sat, Mar 17, 2012 at 10:39 AM, John wrote:
> On Sat, Mar 17, 2012 at 08:34:28AM +, ger...@openocd.zylin.com wrote:
>> This is an automated email from Gerrit.
>>
>> Salvador Arroyo (sarroyof...@yahoo.es) just uploaded a new patch set to
>> Gerrit, which you can find at http://openocd.zylin.
On Sat, Mar 17, 2012 at 2:59 AM, 吴亚杰 wrote:
> Hi, everybody:
>
> I have a question about MIPS EJTAG.
>
> If i download follwing instructions into DATA Register one by one.
> lui t0,0xff20
> ori t0,t0,0x1000
> sw t1, (t0)
>
> (1) Does CPU will cause an
On Fri, Mar 16, 2012 at 10:31 PM, salvador wrote:
> On 03/16/2012 11:33 AM, Drasko DRASKOVIC wrote:
>> Salvador,
>> what actually happends when you apply your patch ? Does it work
>> correctly for more than 1024 words read ?
>>
> Yes it works. Command "mdw&
On Fri, Mar 16, 2012 at 3:06 AM, 吴亚杰 wrote:
> Hi，
>
>> Date: Thu, 15 Mar 2012 19:11:45 +0100
>> From: drasko.drasko...@gmail.com
>> To: salva...@telecable.es
>> CC: openocd-devel@lists.sourceforge.net
>> Subject: Re: [OpenOCD-devel] Bug in mips32_pracc_read_mem32
>
>>
>> On Thu, Mar 15, 2012 at 6:
On Thu, Mar 15, 2012 at 6:44 PM, salvador wrote:
> On 03/14/2012 07:24 PM, salvador wrote:
> 1.- There is no call to mips32_pracc_read_mem32() in
> mips_m4k_read_memory().
Yes, there is. It is called implicitly, by mips32_pracc_read_mem().
Anyway, count parameter is propagated.
Looking in the m
Hi Salvador,
On Wed, Mar 14, 2012 at 7:24 PM, salvador wrote:
> Hello
>
> If i try the command " mdw addr n " with n greater than 1024 the data
> displayed is wrong from 1025 onward.
I'll have to check this... There is really no need for this behavior.
blocksize = count;
if (count > 0x400)
Hi all,
I was wondering how that initial state of target is discovered and
where in the code ?
Is it by calling the target_poll() function ?
I am asking this because issuing the "halt" command on the target in
TARGET_UNKNOWN state will not work for MIPS, and probably for some
other architectures.
What the hell is _prepare_reset_halt ?
These are never defined in the code...
[ddraskovic@lardos:/home/ddraskovic/openocd]>grep -r prepare_reset_halt .
./src/target/mips_m4k.c: * debug entry was already
prepared in
mips32_prepare_reset_halt()
./src/target/cortex_m.c:
On Wed, Mar 7, 2012 at 3:43 PM, Tomek CEDRO wrote:
> Hey Drasko, I build defaul configuration and the debug symbols are just
> there I can debug at will no need to change or redefine anything, except
> something changed in this matter recently..? :-)
> Best regards,
> Tomek
Hmm... I do not know,
Hi all,
I was wondering wat's the best way to compile OpenOCD binaty with
debug information.
I'd like to run OpenOCD in GDB and debug it itself, because I run into
some problems with MIPS target initialization.
Currently I am redefining CFLAGS in ./configure, something like
CFLAGS="$CFLAGS -g ...
On Thu, Mar 1, 2012 at 10:39 PM, Andreas Fritiofson
wrote:
> On Thu, Mar 1, 2012 at 7:11 PM, Drasko DRASKOVIC
> wrote:
>> Hi all,
>> I have specific following situation :
>> my SoC is bi-CPU, but second CPU TAP is not visible by default. Second
>> (client) CPU&#x
Hi all,
I have specific following situation :
my SoC is bi-CPU, but second CPU TAP is not visible by default. Second
(client) CPU's TAP becomes visible once first (master) CPU enables it
in specific register.
But, in order to write to this reg, I had to configure OpenOCD as it
has only one TAP. Up
On Tue, Feb 28, 2012 at 11:18 AM, Attila Kinali wrote:
> On Tue, 28 Feb 2012 11:10:36 +0100
> Drasko DRASKOVIC wrote:
>
>> I would be more convinced with Python. I see no reason why would
>> anybody choose Lua ove Python : it is more mature, has bigger
>> community, b
On Tue, Feb 28, 2012 at 10:46 AM, Spencer Oliver wrote:
> In my original statement i was referring to the fact i am not familiar
> with integrating TCL-C. I can work my around tcl enough for OpenOCD
> usage.
>
> The other argument is how many people understand lua - probably the same as
> tcl.
>
On Fri, Feb 24, 2012 at 3:37 PM, Drasko DRASKOVIC
wrote:
> Hi all,
> I am trying to load one TAP with instruction, and then shift in some
> data to that TAP. OpenOCD manual says :
>
> — Command: irscan [tap instruction]+ [-endstate tap_state]
> For each tap listed, loads the in
Hi all,
I am trying to load one TAP with instruction, and then shift in some
data to that TAP. OpenOCD manual says :
— Command: irscan [tap instruction]+ [-endstate tap_state]
For each tap listed, loads the instruction register with its
associated numeric instruction. (The number of bits in that
i
On Fri, Feb 17, 2012 at 9:21 PM, wrote:
> Drasko ,
> Thank you for your reply.
>
>> Yes and no.
>> mwh stands for "memory write half (word)", i.e.16 bits, i.e. 2 bytes (not 4
>> as you mentioned).
> do you mean mwh should display 4 characters because each character are 4
> bits?
> Is it so?
Yes and no.
mwh stands for "memory write half (word)", i.e.16 bits, i.e. 2 bytes (not 4
as you mentioned).
Did you suceed to halt your processor ? If yes, how ? Where was your error
? Please share this information for the documentation purposes.
Btw. did you configured well your SDRAM controller
On Wed, Feb 15, 2012 at 7:59 PM, wrote:
> I try to read a RAM with this command
> $target_name mdw addr [count]
> but I receive
>
> ##
> Warn : target not halted
> Runtime Error: embedded:startup.tcl:20: error reading target @ 0x0100
> in procedure 'script'
> at file "embedded:sta
On Tue, Feb 14, 2012 at 9:33 PM, wrote:
> Hi Drasko,
> Thank you for your reply.
Hi Jana,
please send your mails to the OpenOCD mailing list, so that other can
benefit from the potential problem resolutions.
> I downloaded the OpenOCD from Freddie's website and also bought his Jtag(
> design b
On Tue, Feb 14, 2012 at 10:04 AM, wrote:
> Hi,
> Can anyone suggest a good way how to start using OpenOCD?
> I have USB Jtag adaptor ( using FTDI ) and I want to use it with WindowsXP.
> My first task is to read IDCODE,IMPCODE and bring the target( that is MIPS
> CPU) into
> debug mode
Hi Ja
On Sat, Feb 11, 2012 at 3:10 PM, Peter Stuge wrote:
> Drasko DRASKOVIC wrote:
>> There is one I wrote (still not ended in the official tree) :
>
> I guess this should go into openocd.texi? Could you push a patch to
> Gerrit?
This is what I promised a long time ago ;)... I&#x
On Sat, Feb 11, 2012 at 10:03 AM, wrote:
> Is there any tutorial how to use OpenOCD with MIPS?
> I would like to use OpenOCD with a MIPS CPU that has
> EJTAG Implementation flags: R4k MIPS16 MIPS32
There is one I wrote (still not ended in the official tree) :
http://www.mail-archive.com/openocd-
http://www.gnu.org/software/grep/
You are slowly getting there, but you'll have to grep more ;)
On Fri, Feb 10, 2012 at 8:44 PM, wrote:
> Hi,
> can anyone correct my understanding( if I am wrong) of the following
> function?
>
> This function should bring MIPS processor into debug mode .
> It se
On Thu, Feb 9, 2012 at 2:40 PM, wrote:
> Hi,
> Thank you for your reply.
> MIPS CPU is Broadcom BCM 7401.
> I tested it further and found out that if HALT state,
> SDRAM provides only 0s( zeros).
> I think it is logical, because the internal processor system bus clock
> was stopped and SDRAM is
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