Re: [PEDA] Autorouting or manual routing, or both?
Dear Matt, Normally I only route the boards by hand (4 & 6 layers) , my expierence with autorouting utillities (not only Protel) is that you still want to change tracks which you don't like so you will wind up re routing the whole board :) The only thing i sometimes use the autorouter for is routing the databus on the pcb, only if there aren't any other tracks routed or else you get your swiss cheese... Remco van den Heuvel. Hardware Engineer. Please feel welcome to visit our website at: http://www.fusionelectronics.org --- Willem Alexanderweg 87, NL-3945 CH Cothen email: [EMAIL PROTECTED] tel: (+31)343590600 fax (+31)343578599 --- - Original Message - From: Matt Polak <[EMAIL PROTECTED]> To: Protel EDA Forum <[EMAIL PROTECTED]> Sent: Monday, January 21, 2002 4:51 PM Subject: [PEDA] Autorouting or manual routing, or both? > > Hey folks, > > It seems that a majority of you are doing some very dense, high-speed > layouts with 4-6 layers being quite a common occurrence. I'm just wondering > how much you typically route by hand, and how much you let the auto-router > whack away at. > > Being primarily self-taught in the ways of Protel, and with the help of a > few 'older school' engineer friends here and there, I've done a number of > successful design layouts thus far, but these have been relatively simple 2 > and 4 layer designs without many small-pitch/high pin-count devices. I'm > moving more towards laying out more high-speed designs in the near future > where a lot of stuff needs to be fit into a small place, and all connect > together without traces and vias meandering all over. > > When I look at sample six layer boards (such as the 5407 EVM reference > design Motorola has released) the bussing and interconnects are extremely > elegant and efficient in appearance. For fun, I unrouted the 5407 board and > then let the autorouter chew on it. It immediately made 'via swiss-cheese' > out of the board and created little more than a large mess. I'm GUESSING > quite a bit of these sort of designs are laid out by hand, or at least > pre-routed to give the auto-router a sense of direction? > > Can anyone offer some basic pointers to getting started into planning and > laying out PCBs for multi-layer, high-speed designs such as these? I have > no idea where one would really even start with something like this. It > seems most of the important knowledge gets passed directly from engineer to > engineer; there are certainly no university classes (that I know of, > anyway) that teach you how to lay out a dense, 6 layer board. :/ I > appreciate the patience and wisdom of those who remember once being where I > am now, who are willing to take the time to pass some of the tips and > tricks down the engineering family tree. > > Thanks again for any pointers anyone can provide (either through the list, > or privately.) > > Best regards, > -- Matt > > * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
[PEDA] New version of the Protel/AutoCAD 3D modeler.
Greetings All, This email is to inform you of the release of a new version of the Protel/AutoCAD 3D modeler. New features include: Bi-directional operation Support for remote operation - ie uses an AutoCAD licence across the network. User definable outlines for auto created 3D parts Support for AutoCAD 2000, 2000i and 2002. There is a free 30 day trial available for download. For more info, go to www.desktop-eda.com.au Wayne Trow PCB Design Technician Gallagher Group LTD Hamilton New Zealand * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Autorouting or manual routing, or both?
A very good website that deals with high speed design is www.signalintegrity.com. It is hosted by Dr Howard Johnston and has articles on specific aspects of PCB design like terminations, bypassing, planes, routing impedance etc. ___ Clive Broome IDT Sydney Design CentrePh: +61 2 9763 3513 8 Bayswater Dr, HomebushFax:+61 2 9763 3409 Sydney, NSW, 2127 Email:[EMAIL PROTECTED] Australia ___ "Matt Polak" <[EMAIL PROTECTED]> on 01/22/2002 01:51:20 AM Please respond to "Protel EDA Forum" <[EMAIL PROTECTED]> To: "Protel EDA Forum" <[EMAIL PROTECTED]> cc:(bcc: Clive Broome/sdc) Subject: [PEDA] Autorouting or manual routing, or both? Hey folks, It seems that a majority of you are doing some very dense, high-speed layouts with 4-6 layers being quite a common occurrence. I'm just wondering how much you typically route by hand, and how much you let the auto-router whack away at. Being primarily self-taught in the ways of Protel, and with the help of a few 'older school' engineer friends here and there, I've done a number of successful design layouts thus far, but these have been relatively simple 2 and 4 layer designs without many small-pitch/high pin-count devices. I'm moving more towards laying out more high-speed designs in the near future where a lot of stuff needs to be fit into a small place, and all connect together without traces and vias meandering all over. When I look at sample six layer boards (such as the 5407 EVM reference design Motorola has released) the bussing and interconnects are extremely elegant and efficient in appearance. For fun, I unrouted the 5407 board and then let the autorouter chew on it. It immediately made 'via swiss-cheese' out of the board and created little more than a large mess. I'm GUESSING quite a bit of these sort of designs are laid out by hand, or at least pre-routed to give the auto-router a sense of direction? Can anyone offer some basic pointers to getting started into planning and laying out PCBs for multi-layer, high-speed designs such as these? I have no idea where one would really even start with something like this. It seems most of the important knowledge gets passed directly from engineer to engineer; there are certainly no university classes (that I know of, anyway) that teach you how to lay out a dense, 6 layer board. :/ I appreciate the patience and wisdom of those who remember once being where I am now, who are willing to take the time to pass some of the tips and tricks down the engineering family tree. Thanks again for any pointers anyone can provide (either through the list, or privately.) Best regards, -- Matt * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Room Placement Issues
At 02:21 PM 1/21/2002 -0500, Fred A Rupinski wrote: >The basic procedure is to select >components in Schematic, then use the Tool pulldown to select the same PCB >components. In PCB, assign the selections to specified Classes. Then create >Rooms and assign the appropriate Classes to them. Yes, that's what I suggested Thanks to Mr. Rupinski for laying out the details. [EMAIL PROTECTED] Abdulrahman Lomax Easthampton, Massachusetts USA * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Room Placement Issues
"Rooms" is a shining light among Protel's features. I lament Altium's dearth
of information about its workings, which no doubt leaves many Protel users
unaware of its capability. I recall that the few posts I've seen on the
subject were positive. Clearly, Mr Lomax appreciates Rooms, and I appreciate
his comments.
It is instructive to distinguish among the various abstractions applicable
to the term, "Rooms". Rooms certainly provide an effective tool for PCB
organization, areal utilization of PCB real estate, and component placement.
Another useful concept is the manipulation of Room boundaries to minimize
ratsnest crossings, thus allowing easier routing. These concepts apply
exclusively to the geometric aspects of PCB layout.
But Rooms have another meaning to many engineers; namely, they are
functional blocks of components grouped to perform specific definable
tasks. The blocks are created and positioned to provide logical signal flow
and cohesive physical structure. Note that this often results in
hierarchical schematic sheets. In most cases the groupings are specified and
the Rooms are definable before the first PCB sheet is generated. When all is
ready, engineers want the capability to transfer these groupings to the PCB.
I previously wrote: " ... the claim ... ('Protel 99 SE includes features
that help you TRANSFER this grouping information from the schematic to the
PCB.') is FALSE so far as I can tell. A more veracious statement is: 'Protel
99 SE includes features that help you CONSTRUCT the schematic grouping
information while editing the PCB'." Subsequently, I learned that transfer
IS actually possible, albeit somewhat indirectly (Except through sub-sheets,
Rooms cannot be defined in the Schematic). I've outlined a method for group
transfers in the dialog below.
- Original Message -
From: "Abd ul-Rahman Lomax" <[EMAIL PROTECTED]>
To: "Protel EDA Forum" <[EMAIL PROTECTED]>
Sent: Friday, January 18, 2002 2:11 PM
Subject: Re: [PEDA] Room Placement Issues
> At 10:40 AM 1/18/2002 -0500, Fred A Rupinski wrote:
> > > There may be some way to use cross-probing to select a set of
components
> > > on Schematic and thus the corresponding components on PCB; this would
then be
> > > used by the Class Generator (Design/Classes/Component/Add/Class
Generator)
> > > to create a class. The class would then be assigned a room.
> >
> >This sounds involved. I think it is easier and more intuitive to
pre-define
> >the rooms on the PCB sheet, and then assign components in the normal way
> >after the PCB is updated from the schematic. However, it might be
> >instructive to see how far your suggestion takes me, time permitting
> >I'll see.
>
> The point is that you can rather easily and quickly assign a set of
> selected components to a room. You create a class from the selection and
> then assign the selection to the room. You can assign components to a room
> individually, but it multiplies rules and is cumbersome; much easier to
> create a class for the components and then assign the class -- or classes
> -- to the room.
This dialog up until now has cleared up several issues, but not the issue of
TRANSFER from the Schematic to the PCB. I tried "to use cross-probing to
select a set of components", but that indeed is very involved. But Mr
Lomax's point and Altium's claims continued to resonate (sometimes
dissonantly), so I re-visited the manual and further explored the software.
As a consequence, I devised the following recipe :
* Update the PCB from the schematic.
* Set up the Schematic and PCB on a split screen.
* In Schematic;
- Select (highlight) the desired grouping of parts
- Tools>>Select_PCB_Components
* In PCB
- Design>>Classes...
- Component tab
- Add...
- (Enter class name; say 'AntiAlias')
- Selection='True'
- ' > ' (to list selected parts)
- OK, OK, Close
* Don't forget to deselect both PCB and Schematic objects!
* Repeat procedure (using, say, PreAmp for the class name).
* Repeat procedure (using, say, Limiter for the class name).
* Repeat procedure for each additional schematic grouping of parts selected.
* Click on 'Room' icon in 'PlacementTools' toolbar. Estimate area needed for
group and draw rectangle.
* Double click on the rectangle.
* Enter the 'Rule Name' (say, SignalConditioner)
* Scroll 'Filter kind' to 'Component Class'
* Scroll 'Component Class' to desired selection (say 'AntiAlias')
* Click 'And...'
* Scroll 'Filter kind' to 'Component Class'
* Scroll 'Component Class' to desired selection (say 'Preamp')
* OK
* From 'ComponentPlacement' toolbar select 'Arrange components within room'
icon.
* Click on Room. Components are placed into Room.
* Place and name another Room (Say, 'Limiter')
* Scroll 'Filter kind' to 'Component Class'
* Scroll 'Component Class' to desired selection (say 'Limiter')
* OK
* From 'ComponentPlacement' toolbar select 'Arrange components within room'
icon.
* Click on Room. Components are placed into Room.
* Two room
Re: [PEDA] Autorouting or manual routing, or both?
Matt I am a circuit/system designer who is is self-taught on PCB design. I design my own pcb's because I design portable electronics and the flexibility of placing the components at the time I'm designing the electronic package, etc. gives me some incredibly efficient packaging results. I only design portables. I recently used Protel Successfully to route a Pentium-III Portable mainboard with 12 layers and several BGA devices. The first spin of the board booted Windows. If I were to contract out to a pure PCB designer, then I would have much less flexibility in the overall design, electronic, mechanical, and interconnect. SO I do it myself first, then contract out for production once I get the design up and running. I have had some serious battles with Protel software. But I have set up and run the autorouter, and once when I sent a board out and had the SPECCTRA autorouter run, the difference between the two was not as great as I would have guessed. Remember, that's from a layman in terms of PCB routing efficiency. Personally, I am going to give the next release of Protel a long, hard look. I have resisted the move to PADS because of the expense and learning curve - I have been using Protel for several years. -Original Message- From: Matt Polak [mailto:[EMAIL PROTECTED]] Sent: Monday, January 21, 2002 9:51 AM To: Protel EDA Forum Subject: [PEDA] Autorouting or manual routing, or both? Hey folks, It seems that a majority of you are doing some very dense, high-speed layouts with 4-6 layers being quite a common occurrence. I'm just wondering how much you typically route by hand, and how much you let the auto-router whack away at. Being primarily self-taught in the ways of Protel, and with the help of a few 'older school' engineer friends here and there, I've done a number of successful design layouts thus far, but these have been relatively simple 2 and 4 layer designs without many small-pitch/high pin-count devices. I'm moving more towards laying out more high-speed designs in the near future where a lot of stuff needs to be fit into a small place, and all connect together without traces and vias meandering all over. When I look at sample six layer boards (such as the 5407 EVM reference design Motorola has released) the bussing and interconnects are extremely elegant and efficient in appearance. For fun, I unrouted the 5407 board and then let the autorouter chew on it. It immediately made 'via swiss-cheese' out of the board and created little more than a large mess. I'm GUESSING quite a bit of these sort of designs are laid out by hand, or at least pre-routed to give the auto-router a sense of direction? Can anyone offer some basic pointers to getting started into planning and laying out PCBs for multi-layer, high-speed designs such as these? I have no idea where one would really even start with something like this. It seems most of the important knowledge gets passed directly from engineer to engineer; there are certainly no university classes (that I know of, anyway) that teach you how to lay out a dense, 6 layer board. :/ I appreciate the patience and wisdom of those who remember once being where I am now, who are willing to take the time to pass some of the tips and tricks down the engineering family tree. Thanks again for any pointers anyone can provide (either through the list, or privately.) Best regards, -- Matt * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Autorouting or manual routing, or both?
At 10:51 AM 1/21/2002 -0500, Matt Polak wrote: > It seems that a majority of you are doing some very dense, > high-speed layouts with 4-6 layers being quite a common occurrence. I'm > just wondering how much you typically route by hand, and how much you let > the auto-router whack away at. I don't know about the majority, many of us are doing simple designs. We do both, but the vast majority of our designs are hand-routed. Sometimes, perhaps, we should be autorouting these boards, but we have a preference > Being primarily self-taught in the ways of Protel, and with the > help of a few 'older school' engineer friends here and there, I've done a > number of successful design layouts thus far, but these have been > relatively simple 2 and 4 layer designs without many small-pitch/high > pin-count devices. I'm moving more towards laying out more high-speed > designs in the near future where a lot of stuff needs to be fit into a > small place, and all connect together without traces and vias meandering > all over. It may be some time before you see an autorouter that will be fully satisfactory. At the present time, autorouters are especially good with boards that are complex in terms of numbers of connections but do not require space and layer optimization. In other words, they have room. Perhaps a company wants to make a test fixture, it has lots of parts but only a few are going to be made. In that case, the improved layout quality possible with hand routing is not cost-effective. It's not just a matter of aesthetics. Good manual routing will, given the present state of the art, typically have shorter track lengths and fewer vias. As autorouter technology advances, I expect this advantage to be lost. How long it will take, I do not know. > When I look at sample six layer boards (such as the 5407 EVM > reference design Motorola has released) the bussing and interconnects are > extremely elegant and efficient in appearance. For fun, I unrouted the > 5407 board and then let the autorouter chew on it. It immediately made > 'via swiss-cheese' out of the board and created little more than a large > mess. I'm GUESSING quite a bit of these sort of designs are laid out by > hand, or at least pre-routed to give the auto-router a sense of direction? Probably. But Protel's current router, under some conditions, can make fairly pretty boards. And that board may have been routed, say, with Specctra, which can cost, by itself, substantially more than the whole Protel suite. > Can anyone offer some basic pointers to getting started into > planning and laying out PCBs for multi-layer, high-speed designs such as > these? I have no idea where one would really even start with something > like this. It seems most of the important knowledge gets passed directly > from engineer to engineer; there are certainly no university classes > (that I know of, anyway) that teach you how to lay out a dense, 6 layer > board. :/ I appreciate the patience and wisdom of those who remember once > being where I am now, who are willing to take the time to pass some of > the tips and tricks down the engineering family tree. I'll try to pull something out of my head. I tend to place and route at the same time, placing components that seem to naturally go together -- perhaps they share a bus or busses -- and making the placement as tight as might be reasonable. At least I do enough routing, if any is necessary, to satisfy myself that this section of the board is going to route properly and efficiently. I might reassign gates or I/O ports at this time. These sections are then arranged in the board space. As a result, you might see, with one of my designs, tight space and empty space. This is because tighter, in general, is better. One can always, if it makes a difference, spread parts out, though usually it is not worth the effort. But making a design tighter can be anywhere from time-consuming to impossible. So aim tight. It's also typically better, when done intelligently, from a noise perspective. [EMAIL PROTECTED] Abdulrahman Lomax Easthampton, Massachusetts USA * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Illegal Operation crash
Re: [PEDA] Illegal Operation crash
Michael, i had the same problem with Win95 some time ago. Protel did not liked the Microsoft fax printer driver (Exchange) that time. After deinstalling the fax driver protel printed ok. Best way is to deinstall all your printer drivers and reinstall them one by one, checking which of them is the troublemaker (hopefully not your default printer). Rolf Molitor Ingenieurbuero i2e Remscheid/Germany -Ursprüngliche Nachricht- Von: <[EMAIL PROTECTED]> An: "Protel EDA Forum" <[EMAIL PROTECTED]> Gesendet: Montag, 21. Januar 2002 17:36 Betreff: [PEDA] Illegal Operation crash > > > Hello all, > > Can somebody help me with this one? > > Since about half way through today, every time I try to print something > from Protel, I get a dialog box saying that Protel has performed an illegal > operation, and that the program will be shut down. > > I have tried restarting the program, but I cannot get it to work. > > Any ideas? This is Protel99SE on Win95. > > Thanks in anticipation, > > Mike. > > Michael Binning > (Applications Engineer) > Zarlink Semiconductor > Cheney Manor Ind. Est. > Swindon > Wiltshire > SN2 2QW > Tel. 0/+44 1793-518234 > Fax. 0/+44 1793-518453 > mailto:[EMAIL PROTECTED] > http://www.zarlink.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Uncorrupting Database (Autorouter Stability Problems)
At 08:23 AM 1/21/2002 +0100, Edi Im Hof wrote: >>The Protel ASCII database is self-documenting (which is why it can be a >>*huge* file), but it can be very handy for dealing with obscure problems. >>All Protel users should be aware that it is possible to directly edit the >>ASCII database; naturally, one should always keep backups of the database >>when attempting to edit it directly, because there can be subtle >>interactions between data elements easily overlooked, and a slip of the >>keys could make a database unloadable. But there is definitely no harm in >>using a text editor to find a rogue primitive!!! > >I would love to export library files as ascii to!!! >Protel, are you listening?? >BTW, I hope "Phoenix" still has an ascii export. So do I. We are seeing some signs that anti-competitive forces within Altium are gaining the upper hand. Some companies regard the database as proprietary (which it is) and therefore confidential (which is a separate step and harmful to customers). As to exporting library files, schematic library files can be written as ASCII already. PCB library files, as I recall, do not have that option, but it is not difficult to work around this. Simply create a PCB with one copy of every part in the library and then write that PCB file as ASCII. You can autoplace the parts by generating a library report and massaging that into Protel netlist format. This technique, in fact, is how I imported all my Tango libraries to Protel. [EMAIL PROTECTED] Abdulrahman Lomax Easthampton, Massachusetts USA * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Illegal Operation crash
I usually find that if Protel has got into this sort of routine, then it's time to re-boot the PC (often needing power-cycling, just to make sure). The same applies with Windows 2000, although it's not needed nearly as often as with 95! Regards Andy Gulliver > -Original Message- > From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED]] > Sent: 21 January 2002 16:37 > To: Protel EDA Forum > Subject: [PEDA] Illegal Operation crash > > > > > Hello all, > > Can somebody help me with this one? > > Since about half way through today, every time I try to print something > from Protel, I get a dialog box saying that Protel has performed > an illegal > operation, and that the program will be shut down. > > I have tried restarting the program, but I cannot get it to work. > > Any ideas? This is Protel99SE on Win95. > > Thanks in anticipation, > > Mike. > > Michael Binning > (Applications Engineer) > Zarlink Semiconductor > Cheney Manor Ind. Est. > Swindon > Wiltshire > SN2 2QW > Tel. 0/+44 1793-518234 > Fax. 0/+44 1793-518453 > mailto:[EMAIL PROTECTED] > http://www.zarlink.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
[PEDA] Illegal Operation crash
Hello all, Can somebody help me with this one? Since about half way through today, every time I try to print something from Protel, I get a dialog box saying that Protel has performed an illegal operation, and that the program will be shut down. I have tried restarting the program, but I cannot get it to work. Any ideas? This is Protel99SE on Win95. Thanks in anticipation, Mike. Michael Binning (Applications Engineer) Zarlink Semiconductor Cheney Manor Ind. Est. Swindon Wiltshire SN2 2QW Tel. 0/+44 1793-518234 Fax. 0/+44 1793-518453 mailto:[EMAIL PROTECTED] http://www.zarlink.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
[PEDA] Autorouting or manual routing, or both?
Hey folks, It seems that a majority of you are doing some very dense, high-speed layouts with 4-6 layers being quite a common occurrence. I'm just wondering how much you typically route by hand, and how much you let the auto-router whack away at. Being primarily self-taught in the ways of Protel, and with the help of a few 'older school' engineer friends here and there, I've done a number of successful design layouts thus far, but these have been relatively simple 2 and 4 layer designs without many small-pitch/high pin-count devices. I'm moving more towards laying out more high-speed designs in the near future where a lot of stuff needs to be fit into a small place, and all connect together without traces and vias meandering all over. When I look at sample six layer boards (such as the 5407 EVM reference design Motorola has released) the bussing and interconnects are extremely elegant and efficient in appearance. For fun, I unrouted the 5407 board and then let the autorouter chew on it. It immediately made 'via swiss-cheese' out of the board and created little more than a large mess. I'm GUESSING quite a bit of these sort of designs are laid out by hand, or at least pre-routed to give the auto-router a sense of direction? Can anyone offer some basic pointers to getting started into planning and laying out PCBs for multi-layer, high-speed designs such as these? I have no idea where one would really even start with something like this. It seems most of the important knowledge gets passed directly from engineer to engineer; there are certainly no university classes (that I know of, anyway) that teach you how to lay out a dense, 6 layer board. :/ I appreciate the patience and wisdom of those who remember once being where I am now, who are willing to take the time to pass some of the tips and tricks down the engineering family tree. Thanks again for any pointers anyone can provide (either through the list, or privately.) Best regards, -- Matt * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
[PEDA] SUCCESSFUL CONCLUSION - Autorouter Stability Problems
Hi Guys It was extra work, but I exported my PCB file as PADS ASCII (Not Protel ASCII, this didn't fix the problem), then imported it back in. I received a message that 4 entities could not be converted. This must have REALLY worked, because the autorouter has run fine since then. Thanks, guys, for all the assistance and advice you guys gave me, or I would not be looking at the routed board right now! John -Original Message- From: Ian Wilson [mailto:[EMAIL PROTECTED]] Sent: Sunday, January 20, 2002 3:03 PM To: Protel EDA Forum Subject: Re: [PEDA] Autorouter Stability Problems On 10:13 AM 19/01/2002 -0800, Brian Sherer said: >1) Protel doesn't flag buffer overruns at all, in any server. It can occur >when >for instance >multiple Polygon Pours are used instead of Split Planes on a multilayer >design. >It seems >that Polygons are handled as a multiplicity of primitives, while Split Planes >are handled as >single entities. Database size seems to grow exponentially if Polygon Pours >are >used. >In a "failure to initialize" or crash situation, this is often related to item >2. Brian, Can you explain more about this please? I have never heard of buffer overruns used in this context. Yes, as others have said, large polygons do cause the PCB file size to increase. But in my experience this has been a linear increase reflecting the number of tracks in the polygon. In the past there has been discussion on methods of reducing the sizes of polygons. Again, I have not come across the concept of "buffer overruns" in the context of a file format such as Protels. The Access database format (DDB) is only used to store proprietary BLOB data, and from memory the capacity of Access (for blobs) is 2 GB. Since 32-bit handles are used throughout the servers (as far as I can see from the SDK anyway) this would imply roughly 4 billion entities per file. Now it is possible that Protel chokes on larger files due to bugs or memory handling problems. And I know that there are certain actions using select and move selections that can cause groups of entities to become "sort-of" invisible. But this is not related to file size and I can see how this could be described as a buffer overrun. I would like certainly like to know more about the buffer overruns you describe - especially in regard to the interaction with the autorouter. Thanks, Ian Wilson * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
