[PEDA] P98 SE Schematic ERC for Electrical Pin Types

2004-09-08 Thread Jeff Condit
OK; basic question: In P98 SE, how do you configure the electrical types of pins to be 
input/output/power/passive/unknown etc. such that in schematic you can do such things 
as run an ERC and find nets that don't have an output?  How exactly do you initiate 
such an ERC?  How can you override noted conditions that are really acceptable ones 
such that you don't have to keep rummaging through them every time?

NOTE: One of my customers masters all his schematics exclusively in Protel 98 SE using 
flat topology and is not about to change, so I must use it for the schematic tool in 
this particular case.  It is not practical to convert to DXP and back for each minor 
change.

Jeff Condit
6946 Clark Rd.
Paradise, CA 95969
Office: (530) 877-6443
Cell: (530) 228-6780
[EMAIL PROTECTED]

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Re: [PEDA] P98 SE Schematic ERC for Electrical Pin Types

2004-09-08 Thread Jeff Condit
I also changed Tools-ERC-Setup-Net Identifier Scope to 'Net Labels and
Ports Global' which got rid of 16 pages of  input errors and warnings
flagged because they were only connected to a port symbol.

Jeff Condit

- Original Message - 
From: Jeff Condit [EMAIL PROTECTED]
To: Protel EDA Forum [EMAIL PROTECTED]
Sent: Wednesday, September 08, 2004 7:33 AM
Subject: [PEDA] P98 SE Schematic ERC for Electrical Pin Types


OK; basic question: In P98 SE, how do you configure the electrical types of
pins to be input/output/power/passive/unknown etc. such that in schematic
you can do such things as run an ERC and find nets that don't have an
output?  How exactly do you initiate such an ERC?  How can you override
noted conditions that are really acceptable ones such that you don't have to
keep rummaging through them every time?

NOTE: One of my customers masters all his schematics exclusively in Protel
98 SE using flat topology and is not about to change, so I must use it for
the schematic tool in this particular case.  It is not practical to convert
to DXP and back for each minor change.

Jeff Condit
6946 Clark Rd.
Paradise, CA 95969
Office: (530) 877-6443
Cell: (530) 228-6780
[EMAIL PROTECTED]





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Re: [PEDA] P98 SE Schematic ERC for Electrical Pin Types

2004-09-08 Thread Jeff Condit
I set the options for Unconnected Ports within the connection matrix for the
8 cells where * Port crosses Unconnected?  Now ERC shows unconnected
ports.

Does Protel sometimes flag more than one error at the same location?  If so,
how can No ERC Directives correctly identify which error to not report?

Is there any way to change to electrical type definition of a pin on the
schematic?  PLDs with hundreds of pins intrinsically designated as I/O
regardless of programming give rise to a very large number of warnings, such
as an IO=Output clash.  If I could, for example, magically change and I/O
pin to an input where applicable it would make these errors go away.
However, since the same PLD part type is used in many designs with different
programming, I don't want to change the pin definitions in the library.

What about nets with no outputs?  How can these be checked to make sure they
are what is wanted?  For example, when 2 boards are interconnected in a
system, one could have only an output (and connector pin) while the other
has only inputs (and a connector pin).

Is there any way to check that Port directions make sense with regard to pin
electrical types?  For example, the port should point into an input and away
from an output?

Jeff Condit
6946 Clark Rd.
Paradise, CA 95969
Office: (530) 877-6443
Cell: (530) 228-6780
[EMAIL PROTECTED]

- Original Message - 
From: Jeff Condit [EMAIL PROTECTED]
To: Protel EDA Forum [EMAIL PROTECTED]
Sent: Wednesday, September 08, 2004 8:20 AM
Subject: Re: [PEDA] P98 SE Schematic ERC for Electrical Pin Types


 I also changed Tools-ERC-Setup-Net Identifier Scope to 'Net Labels and
 Ports Global' which got rid of 16 pages of  input errors and warnings
 flagged because they were only connected to a port symbol.

 Jeff Condit

 - Original Message - 
 From: Jeff Condit [EMAIL PROTECTED]
 To: Protel EDA Forum [EMAIL PROTECTED]
 Sent: Wednesday, September 08, 2004 7:33 AM
 Subject: [PEDA] P98 SE Schematic ERC for Electrical Pin Types


 OK; basic question: In P98 SE, how do you configure the electrical types
of
 pins to be input/output/power/passive/unknown etc. such that in schematic
 you can do such things as run an ERC and find nets that don't have an
 output?  How exactly do you initiate such an ERC?  How can you override
 noted conditions that are really acceptable ones such that you don't have
to
 keep rummaging through them every time?

 NOTE: One of my customers masters all his schematics exclusively in Protel
 98 SE using flat topology and is not about to change, so I must use it for
 the schematic tool in this particular case.  It is not practical to
convert
 to DXP and back for each minor change.

 Jeff Condit
 6946 Clark Rd.
 Paradise, CA 95969
 Office: (530) 877-6443
 Cell: (530) 228-6780
 [EMAIL PROTECTED]










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Re: [PEDA] P98 SE Schematic ERC for Electrical Pin Types

2004-09-08 Thread ajenkins
You mean P99SE, yes? Or do you mean P98?

Pin types are defined at the component level, and the part editors are
used to define these characteristics. 

Once the target part has been brought into the part editor, it's simply
a matter of doublwe-clicking a pin, then examining the resultant
pin-edit window to determine and/or modify its electrical type.

Good luck,

aj

-Original Message-
From: Jeff Condit [mailto:[EMAIL PROTECTED] 
Sent: Wednesday, September 08, 2004 10:33 AM
To: Protel EDA Forum
Subject: [PEDA] P98 SE Schematic ERC for Electrical Pin Types

OK; basic question: In P98 SE, how do you configure the 
electrical types of pins to be 
input/output/power/passive/unknown etc. such that in schematic 
you can do such things as run an ERC and find nets that don't 
have an output?  How exactly do you initiate such an ERC?  How 
can you override noted conditions that are really acceptable 
ones such that you don't have to keep rummaging through them 
every time?




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Re: [PEDA] P98 SE Schematic ERC for Electrical Pin Types

2004-09-08 Thread Jeff Condit
Hi AJ!

I meant P98SE.

I guess what I was balking at was not being able to reconfigure a pin's
electrical type from schematic.  The reason is that generic PLDs don't
really have an electrical type until they are programmed.  Then the pins can
become inputs, outputs, tri-state, or whatever you want.  If in the library
they are all just set to I/O, then the schematic reports a lot of warnings
and can miss some errors.  If you know what you want the pins to be (which
is only sometimes the case) and can set the pin electrical types
accordingly, then the ERC is much more meaningful.  This could be done in
the parts editor, but then the part would be wrong on other designs where
the pins are used differently.  Thus, the desire to be able to characterize
them in schematic.

Anyway, that was the thought.

Jeff Condit

- Original Message - 
From: [EMAIL PROTECTED]
To: [EMAIL PROTECTED]
Sent: Wednesday, September 08, 2004 10:29 AM
Subject: Re: [PEDA] P98 SE Schematic ERC for Electrical Pin Types


 You mean P99SE, yes? Or do you mean P98?

 Pin types are defined at the component level, and the part editors are
 used to define these characteristics.

 Once the target part has been brought into the part editor, it's simply
 a matter of doublwe-clicking a pin, then examining the resultant
 pin-edit window to determine and/or modify its electrical type.

 Good luck,

 aj

 -Original Message-
 From: Jeff Condit [mailto:[EMAIL PROTECTED]
 Sent: Wednesday, September 08, 2004 10:33 AM
 To: Protel EDA Forum
 Subject: [PEDA] P98 SE Schematic ERC for Electrical Pin Types
 
 OK; basic question: In P98 SE, how do you configure the
 electrical types of pins to be
 input/output/power/passive/unknown etc. such that in schematic
 you can do such things as run an ERC and find nets that don't
 have an output?  How exactly do you initiate such an ERC?  How
 can you override noted conditions that are really acceptable
 ones such that you don't have to keep rummaging through them
 every time?
 









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Re: [PEDA] P98 SE Schematic ERC for Electrical Pin Types

2004-09-08 Thread Jeff Condit
I found the Tools-ERC menu option.  I think I missed it first time around
because I was not on a schematic document at the time.  So this answers the
portion regarding how to initiate ERC.  I also found Place-Directives-No
ERC which is used to mark things like unused inputs.  This is helpful, but
doesn't do the job an override does.

Still looking for input on this subject.  Thanks,

Jeff Condit

- Original Message - 
From: Jeff Condit [EMAIL PROTECTED]
To: Protel EDA Forum [EMAIL PROTECTED]
Sent: Wednesday, September 08, 2004 7:33 AM
Subject: [PEDA] P98 SE Schematic ERC for Electrical Pin Types


OK; basic question: In P98 SE, how do you configure the electrical types of
pins to be input/output/power/passive/unknown etc. such that in schematic
you can do such things as run an ERC and find nets that don't have an
output?  How exactly do you initiate such an ERC?  How can you override
noted conditions that are really acceptable ones such that you don't have to
keep rummaging through them every time?

NOTE: One of my customers masters all his schematics exclusively in Protel
98 SE using flat topology and is not about to change, so I must use it for
the schematic tool in this particular case.  It is not practical to convert
to DXP and back for each minor change.

Jeff Condit
6946 Clark Rd.
Paradise, CA 95969
Office: (530) 877-6443
Cell: (530) 228-6780
[EMAIL PROTECTED]





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Re: [PEDA] P98 SE Schematic ERC for Electrical Pin Types

2004-09-08 Thread Peter Bennett
Jeff Condit wrote:
Hi AJ!
I meant P98SE.
I guess what I was balking at was not being able to reconfigure a pin's
electrical type from schematic.  The reason is that generic PLDs don't
really have an electrical type until they are programmed.  Then the pins can
become inputs, outputs, tri-state, or whatever you want.  If in the library
they are all just set to I/O, then the schematic reports a lot of warnings
and can miss some errors.  If you know what you want the pins to be (which
is only sometimes the case) and can set the pin electrical types
accordingly, then the ERC is much more meaningful.  This could be done in
the parts editor, but then the part would be wrong on other designs where
the pins are used differently.  Thus, the desire to be able to characterize
them in schematic.
Anyway, that was the thought.
Jeff Condit
For large programmable parts like Altera's FPGAs, I make a special schematic 
symbol for each application, with the pins named and positioned (and set the 
the correct type) to suit the application.  I find it much easier to 
understand the schematic with the pins named for their functions, rather than 
all being called I/On

--
Peter Bennett
TRIUMF
4004 Wesbrook Mall, Vancouver, BC, Canada
GPS and NMEA info and programs:
http://vancouver-webpages.com/peter/index.html


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Re: [PEDA] P98 SE Schematic ERC for Electrical Pin Types

2004-09-08 Thread Jeff Condit
Thanks Peter.  That's what I like to do as well, but its takes a little more
time to do and the customer is not always willing to pay for it.  In this
particular case, the customer made it the way it is and wants it that way,
so the customer gets what the customer wants.

Jeff Condit

- Original Message - 
From: Peter Bennett [EMAIL PROTECTED]
To: Protel EDA Forum [EMAIL PROTECTED]
Sent: Wednesday, September 08, 2004 2:50 PM
Subject: Re: [PEDA] P98 SE Schematic ERC for Electrical Pin Types


 Jeff Condit wrote:

  Hi AJ!
 
  I meant P98SE.
 
  I guess what I was balking at was not being able to reconfigure a pin's
  electrical type from schematic.  The reason is that generic PLDs don't
  really have an electrical type until they are programmed.  Then the pins
can
  become inputs, outputs, tri-state, or whatever you want.  If in the
library
  they are all just set to I/O, then the schematic reports a lot of
warnings
  and can miss some errors.  If you know what you want the pins to be
(which
  is only sometimes the case) and can set the pin electrical types
  accordingly, then the ERC is much more meaningful.  This could be done
in
  the parts editor, but then the part would be wrong on other designs
where
  the pins are used differently.  Thus, the desire to be able to
characterize
  them in schematic.
 
  Anyway, that was the thought.
 
  Jeff Condit

 For large programmable parts like Altera's FPGAs, I make a special
schematic
 symbol for each application, with the pins named and positioned (and set
the
 the correct type) to suit the application.  I find it much easier to
 understand the schematic with the pins named for their functions, rather
than
 all being called I/On

 -- 
 Peter Bennett
 TRIUMF
 4004 Wesbrook Mall, Vancouver, BC, Canada
 GPS and NMEA info and programs:
 http://vancouver-webpages.com/peter/index.html











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