[PEDA] Adding extra tracks and vias.
I'm working on a layout with two quad flat packs. A substantial number of pins on each chip have no connection. Because of the difficulty of hand-soldering to fine pitch pins, I would like to add a track and a via to each unused pin for possible use later. I'm have two issues: 1. DRC flags these extra tracks and vias as violations. 2. I get no protection from the design rules that specify minimum clearances and such. I think this must be a common problem. Is there an easy way to fix this without changing the schematic? Protel 99 SE sp6. Thanks, Matt __ Do You Yahoo!? LAUNCH - Your Yahoo! Music Experience http://launch.yahoo.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Adding extra tracks and vias.
Re: [PEDA] Adding extra tracks and vias.
In the sch editor create net list and check include single pin nets. In the pcb editor load the net list this will allow you to add tracks and vias with rules applying. Jerry Fisher Assoc. Engineer Pelco 10 Corporate Dr. Orangeburg NY 10962 (845) 398-8700 [EMAIL PROTECTED] -Original Message- From: Embedded Matt [mailto:[EMAIL PROTECTED]] Sent: Thursday, May 23, 2002 2:10 PM To: Protel EDA Forum Subject: [PEDA] Adding extra tracks and vias. I'm working on a layout with two quad flat packs. A substantial number of pins on each chip have no connection. Because of the difficulty of hand-soldering to fine pitch pins, I would like to add a track and a via to each unused pin for possible use later. I'm have two issues: 1. DRC flags these extra tracks and vias as violations. 2. I get no protection from the design rules that specify minimum clearances and such. I think this must be a common problem. Is there an easy way to fix this without changing the schematic? Protel 99 SE sp6. Thanks, Matt __ Do You Yahoo!? LAUNCH - Your Yahoo! Music Experience http://launch.yahoo.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Adding extra tracks and vias.
Matt, what reason does the DRC flag these extra tracks and vias? What is the violation? I believe it would probably be because they are No Net connections. This is also 'possibly' why they don't follow your spacing DRC rules. For clearance rules you have to watch the net issues because if you do not have the board - board general clearance rule and other rules are all net related, then the 'no net' connections may not be checked for violations. Sincerely, Brad Velander. Lead PCB Designer Norsat International Inc. Microwave Products Tel (604) 292-9089 (direct line) Fax (604) 292-9010 email: [EMAIL PROTECTED] http://www.norsat.com Visit us at Booth 2G2-09 at CommunicAsia 2002 in Singapore June 18-21. -Original Message- From: Embedded Matt [mailto:[EMAIL PROTECTED]] Sent: Thursday, May 23, 2002 11:10 AM To: Protel EDA Forum Subject: [PEDA] Adding extra tracks and vias. I'm working on a layout with two quad flat packs. A substantial number of pins on each chip have no connection. Because of the difficulty of hand-soldering to fine pitch pins, I would like to add a track and a via to each unused pin for possible use later. I'm have two issues: 1. DRC flags these extra tracks and vias as violations. 2. I get no protection from the design rules that specify minimum clearances and such. I think this must be a common problem. Is there an easy way to fix this without changing the schematic? Protel 99 SE sp6. Thanks, Matt * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Adding extra tracks and vias.
Another solution, besides those already given, is to use, in the footprint, through pads the size of vias and with the same hole size, given the same net as the SM pad. You will have complete DRC protection Another solution which might be better in some ways is to add a test point (single hole) part, one on each unused pin. Once one knows how to copy and paste, it would be very quick to add these to the schematic, one click per pad or even several pads with a single click. These will then be incorporated into the net list; an advantage is that they can each be given a number which can appear on the legend, making such changes easier to document and recognise. There are also ways to speed up the PCB side of this, but I won't go into detail now. Note that it is an advantage to be able to move the test or wiring points if routing requires it... You can move pads included inside a footprint by unlocking the footprint in the Edit dialog; but I'd prefer adding separate parts; the separate parts can be made into a Union with the flat pack to which they adhere, so they will move around together. At 11:10 AM 5/23/2002 -0700, Embedded Matt wrote: I'm working on a layout with two quad flat packs. A substantial number of pins on each chip have no connection. Because of the difficulty of hand-soldering to fine pitch pins, I would like to add a track and a via to each unused pin for possible use later. I'm have two issues: 1. DRC flags these extra tracks and vias as violations. 2. I get no protection from the design rules that specify minimum clearances and such. I think this must be a common problem. Is there an easy way to fix this without changing the schematic? Protel 99 SE sp6. * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Adding extra tracks and vias.
I have a special schematic component : a single pin connector. On the pcb component side I have two footprints to choose from : 1) a single pad, topside only, rectangular, no hole, 50x100 mil - great to solder a wire 2) a single pad, multilayer, round 32/62mil great for the scope probe to stick in The schematic component lets me choose between the two mentioned bcb footprints. Works great Rene -- Ing.Buero R.Tschaggelar - http://www.ibrtses.com Embedded Matt wrote: I'm working on a layout with two quad flat packs. A substantial number of pins on each chip have no connection. Because of the difficulty of hand-soldering to fine pitch pins, I would like to add a track and a via to each unused pin for possible use later. I'm have two issues: 1. DRC flags these extra tracks and vias as violations. 2. I get no protection from the design rules that specify minimum clearances and such. I think this must be a common problem. Is there an easy way to fix this without changing the schematic? * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
