: "Protel EDA Forum" <[EMAIL PROTECTED]>
Sent: Wednesday, May 28, 2003 6:45 AM
Subject: Re: [PEDA] Polygon ground question
> If I read this right, then your solution might be to set your design rules
> right; make sure you have specified a clearance between polygons and al
Madhu
-Original Message-
From: Miao, Yi-Jun ( [ @ v IAC-N) [mailto:[EMAIL PROTECTED]
Sent: Tuesday, May 27, 2003 9:25 PM
To: [EMAIL PROTECTED]
Subject: [PEDA] Polygon ground question
Dear sir:
In placing polygon ground, there always exist some tiny polygon,
these tiny trace will
On 11:25 AM 28/05/2003, =?big5?B?Ik1pYW8sIFlpLUp1biAowVukQLZ2IElBQy1OKSI=?=
said:
Dear sir:
In placing polygon ground, there always exist some tiny
polygon, these tiny trace will interfer signal trace.
I have 2 methods to deal with this:
1: dobule click the p
> In placing polygon ground, there always exist some tiny polygon, these
tiny trace will interfer signal trace.
When placing or editing the polygon plane, click on the "Remove dead copper"
box. This will clear all unconnected copper "bits"
Ian Rozowsky
R&D Director
Centurion Systems (Pty) Ltd.
Bo
Dear sir:
In
placing polygon ground, there always exist some tiny polygon, these
tiny trace will interfer signal trace.
I
have 2 methods to deal with this:
1: dobule click the polygon plane, unlock primitive ,then modify the tiny
traces.
The
