Author: Richard Plangger
Branch: s390x-backend
Changeset: r82276:c9f5118bcf08
Date: 2016-02-16 09:51 +0100
http://bitbucket.org/pypy/pypy/changeset/c9f5118bcf08/
Log:catchup with default
diff --git a/rpython/annotator/bookkeeper.py b/rpython/annotator/bookkeeper.py
--- a/rpython/annotator/bo
Author: Richard Plangger
Branch: s390x-backend
Changeset: r82277:b41c97d15afd
Date: 2016-02-16 11:38 +0100
http://bitbucket.org/pypy/pypy/changeset/b41c97d15afd/
Log:stacklet switch command s390x was broken due to saving of f8-f15,
storing them into the standard frame in unused slots
Author: Richard Plangger
Branch: s390x-backend
Changeset: r82278:024d0fe16089
Date: 2016-02-16 11:53 +0100
http://bitbucket.org/pypy/pypy/changeset/024d0fe16089/
Log:added skip for s390x on _vmprof tests in module
diff --git a/pypy/module/_vmprof/conftest.py b/pypy/module/_vmprof/conftest.py
Author: Richard Plangger
Branch: s390x-backend
Changeset: r82280:713aaa7859d5
Date: 2016-02-16 14:26 +0100
http://bitbucket.org/pypy/pypy/changeset/713aaa7859d5/
Log:some more tests stressing the reg allocation of register pairs
diff --git a/rpython/jit/backend/zarch/regalloc.py
b/rpython/j
Author: Richard Plangger
Branch: s390x-backend
Changeset: r82279:9a63f13fcdbd
Date: 2016-02-16 13:01 +0100
http://bitbucket.org/pypy/pypy/changeset/9a63f13fcdbd/
Log:regalloc has now one more pair, SPP is now r12 (was r11) rewritten
regalloc pairs. it is now simpler and easier to unde
Author: Richard Plangger
Branch: s390x-backend
Changeset: r82319:705395ae74a3
Date: 2016-02-18 15:16 +0100
http://bitbucket.org/pypy/pypy/changeset/705395ae74a3/
Log:some more fixes, wrong offset was calculated by push/pop to jit
frame
diff --git a/rpython/jit/backend/zarch/assembler
Author: Richard Plangger
Branch: s390x-backend
Changeset: r82350:c2d76c8ce81a
Date: 2016-02-21 10:16 +0100
http://bitbucket.org/pypy/pypy/changeset/c2d76c8ce81a/
Log:do not use registers other than r2->r11 for that test
diff --git a/rpython/jit/backend/zarch/test/test_assembler.py
b/rpython
Author: Richard Plangger
Branch:
Changeset: r82376:eff2a2c4481f
Date: 2016-02-21 22:50 +0100
http://bitbucket.org/pypy/pypy/changeset/eff2a2c4481f/
Log:(mjacob, plan_rich) universal newlines enforced in the tokenizer.
the compile builtin must convert crlf and cr to line feeds. py3.3
Author: Richard Plangger
Branch: py3k
Changeset: r82377:c87ebc4db701
Date: 2016-02-21 23:05 +0100
http://bitbucket.org/pypy/pypy/changeset/c87ebc4db701/
Log:(mjacob, plan_rich) merge default into py3k
diff --git a/.hgignore b/.hgignore
--- a/.hgignore
+++ b/.hgignore
@@ -22,6 +22,7
Author: Richard Plangger
Branch: py3.3
Changeset: r82378:d5aed0c8694d
Date: 2016-02-21 23:06 +0100
http://bitbucket.org/pypy/pypy/changeset/d5aed0c8694d/
Log:(mjacob, plan_rich) merge py3k into py3.3
diff --git a/.hgignore b/.hgignore
--- a/.hgignore
+++ b/.hgignore
@@ -22,6 +22,7 @@
^pypy
Author: Richard Plangger
Branch:
Changeset: r82391:fd5943132b71
Date: 2016-02-22 14:15 +0100
http://bitbucket.org/pypy/pypy/changeset/fd5943132b71/
Log:(cfbolz, arigato, plan_rich) progress on fixing the new introduced
bug in ll2ctypes, added two tests
diff --git a/rpython/rtyper
Author: Richard Plangger
Branch: regalloc
Changeset: r82404:b52b80aa52f6
Date: 2016-02-22 18:31 +0100
http://bitbucket.org/pypy/pypy/changeset/b52b80aa52f6/
Log:added a new test file to inspect properties of the regalloc in
certain circumstances
diff --git a/rpython/jit/backend/llsup
Author: Richard Plangger
Branch: regalloc
Changeset: r82420:b765f3e0ddd4
Date: 2016-02-23 11:11 +0100
http://bitbucket.org/pypy/pypy/changeset/b765f3e0ddd4/
Log:progress on faking the reg alloc for testing internal properties
diff --git a/rpython/jit/backend/llsupport/test/test_regalloc_call
Author: Richard Plangger
Branch: regalloc
Changeset: r82423:f8ee5bddeb4b
Date: 2016-02-23 11:53 +0100
http://bitbucket.org/pypy/pypy/changeset/f8ee5bddeb4b/
Log:(remi, plan_rich) work in progress
diff --git a/rpython/jit/backend/llsupport/test/test_regalloc_call.py
b/rpython/jit/backend
Author: Richard Plangger
Branch: regalloc
Changeset: r82424:84ffabb00046
Date: 2016-02-23 12:05 +0100
http://bitbucket.org/pypy/pypy/changeset/84ffabb00046/
Log:(remi, plan_rich) reordering seems to work for the first test case
diff --git a/rpython/jit/backend/llsupport/test
Author: Richard Plangger
Branch: regalloc
Changeset: r82427:82e72df75cb3
Date: 2016-02-23 12:35 +0100
http://bitbucket.org/pypy/pypy/changeset/82e72df75cb3/
Log:(remi, plan_rich) changed the test case to force reordering at jump
diff --git a/rpython/jit/backend/llsupport/test
Author: Richard Plangger
Branch: fix-longevity
Changeset: r82436:099af271b5bc
Date: 2016-02-23 14:13 +0100
http://bitbucket.org/pypy/pypy/changeset/099af271b5bc/
Log:(remi, plan_rich) lookup of initial binding works on this new branch
diff --git a/rpython/jit/backend/llsupport/test
Author: Richard Plangger
Branch: fix-longevity
Changeset: r82439:a5af78134022
Date: 2016-02-23 14:58 +0100
http://bitbucket.org/pypy/pypy/changeset/a5af78134022/
Log:(remi, plan_rich) new test involving a call
diff --git a/rpython/jit/backend/llsupport/test/test_regalloc_call.py
b/rpython
Author: Richard Plangger
Branch: fix-longevity
Changeset: r82441:efbb3a7664a1
Date: 2016-02-23 15:28 +0100
http://bitbucket.org/pypy/pypy/changeset/efbb3a7664a1/
Log:(remi, plan_rich) resolved one issue in the allocation. this avoids
reloading from the frame if one variable is
Author: Richard Plangger
Branch: fix-longevity
Changeset: r82449:e1c902c90c70
Date: 2016-02-23 16:55 +0100
http://bitbucket.org/pypy/pypy/changeset/e1c902c90c70/
Log:(remi, plan_rich) a new test to check that liveranges containing
calls will prefer callee_saved registers
diff --git
Author: Richard Plangger
Branch: fix-longevity
Changeset: r82451:848d331e295a
Date: 2016-02-23 17:22 +0100
http://bitbucket.org/pypy/pypy/changeset/848d331e295a/
Log:(remi, plan_rich) refactored the register manager to use the
LiveRanges class
diff --git a/rpython/jit/backend
Author: Richard Plangger
Branch: fix-longevity
Changeset: r82460:98153a101dda
Date: 2016-02-23 19:09 +0100
http://bitbucket.org/pypy/pypy/changeset/98153a101dda/
Log:(remi, plan_rich) refactored free_reg into two lists (caller saved
and callee saved list)
diff --git a/rpython/jit
Author: Richard Plangger
Branch: fix-longevity
Changeset: r82494:dad960bd604f
Date: 2016-02-25 12:42 +0100
http://bitbucket.org/pypy/pypy/changeset/dad960bd604f/
Log:(remi, plan_rich) missing changes that should have been commited
earlier?
diff --git a/rpython/jit/backend/llsupport
Author: Richard Plangger
Branch: fix-longevity
Changeset: r82496:1b6e563e6cb0
Date: 2016-02-25 13:11 +0100
http://bitbucket.org/pypy/pypy/changeset/1b6e563e6cb0/
Log:(remi, plan_rich) fixed all broken tests because of our refactoring
diff --git a/rpython/jit/backend/llsupport/regalloc.py
b
Author: Richard Plangger
Branch: fix-longevity
Changeset: r82497:ed33bb43fa34
Date: 2016-02-25 13:21 +0100
http://bitbucket.org/pypy/pypy/changeset/ed33bb43fa34/
Log:(remi, plan_rich) renamed index property to value
diff --git a/rpython/jit/backend/llsupport/regalloc.py
b/rpython/jit
Author: Richard Plangger
Branch: fix-longevity
Changeset: r82507:5678f7fbd0b3
Date: 2016-02-25 15:49 +0100
http://bitbucket.org/pypy/pypy/changeset/5678f7fbd0b3/
Log:(remi, plan_rich) forward with argument allocation for calls
diff --git a/rpython/jit/backend/llsupport/regalloc.py
b
Author: Richard Plangger
Branch: fix-longevity
Changeset: r82508:947d61d6c498
Date: 2016-02-25 15:51 +0100
http://bitbucket.org/pypy/pypy/changeset/947d61d6c498/
Log:merged fix-longevity
diff --git a/rpython/jit/backend/llsupport/test/test_regalloc_integration.py
b/rpython/jit/backend/llsup
Author: Richard Plangger
Branch: fix-longevity
Changeset: r82510:9823e109f391
Date: 2016-02-25 16:30 +0100
http://bitbucket.org/pypy/pypy/changeset/9823e109f391/
Log:(remi, plan_rich) the first version that correctly considers call
args and live ranges that survive calls
diff --git
Author: Richard Plangger
Branch: fix-longevity
Changeset: r82511:bcfdedbf3019
Date: 2016-02-25 16:35 +0100
http://bitbucket.org/pypy/pypy/changeset/bcfdedbf3019/
Log:(remi, plan_rich) did not save two files
diff --git a/rpython/jit/backend/llsupport/regalloc.py
b/rpython/jit/backend
Author: Richard Plangger
Branch: fix-longevity
Changeset: r82521:3dce5a6242ac
Date: 2016-02-25 17:58 +0100
http://bitbucket.org/pypy/pypy/changeset/3dce5a6242ac/
Log:(remi, plan_rich) merged default
diff too long, truncating to 2000 out of 2557 lines
diff --git a/LICENSE b/LICENSE
--- a
Author: Richard Plangger
Branch: fix-longevity
Changeset: r82522:7cf8129ae01d
Date: 2016-02-25 18:25 +0100
http://bitbucket.org/pypy/pypy/changeset/7cf8129ae01d/
Log:(remi, plan_rich) fixed translation
diff --git a/rpython/jit/backend/llsupport/regalloc.py
b/rpython/jit/backend/llsupport
Author: Richard Plangger
Branch: new-jit-log
Changeset: r82567:2e7a4736bf22
Date: 2016-02-26 16:20 +0100
http://bitbucket.org/pypy/pypy/changeset/2e7a4736bf22/
Log:added jitlog as a replacement of the current PYPYLOG, does not run
yet
diff --git a/rpython/jit/metainterp/jitlog.py b/r
Author: Richard Plangger
Branch: new-jit-log
Changeset: r82584:ed87960a6c98
Date: 2016-02-26 19:13 +0100
http://bitbucket.org/pypy/pypy/changeset/ed87960a6c98/
Log:finished a first (not yet compiling) version that both writes loops
and bridges in a more condensed format
diff --git a/
Author: Richard Plangger
Branch: new-jit-log
Changeset: r82585:e3c8440d6583
Date: 2016-02-27 09:46 +0100
http://bitbucket.org/pypy/pypy/changeset/e3c8440d6583/
Log:remove some errors in the c code of the jitlog file
diff --git a/rpython/rlib/rvmprof/src/jitlog_main.h
b/rpython/rlib/rvmprof/
Author: Richard Plangger
Branch: s390x-backend
Changeset: r82588:22b3fac614dd
Date: 2016-02-27 11:58 +0100
http://bitbucket.org/pypy/pypy/changeset/22b3fac614dd/
Log:minor changes while going through the code with arigato
diff --git a/rpython/jit/backend/zarch/opassembler.py
b/rpython/jit/b
Author: Richard Plangger
Branch: s390x-backend
Changeset: r82591:a2ccecb333f0
Date: 2016-02-27 19:15 +0100
http://bitbucket.org/pypy/pypy/changeset/a2ccecb333f0/
Log:added new module gcstress that compiles a very minimal language in a
zrpy test and feed it with input from hypothesis (
Author: Richard Plangger
Branch: s390x-backend
Changeset: r82611:4560bc0454eb
Date: 2016-02-29 14:30 +0100
http://bitbucket.org/pypy/pypy/changeset/4560bc0454eb/
Log:removed some old files that where moved in the last commit
diff --git a/rpython/jit/backend/llsupport/gcstress/__init__.py
b/
Author: Richard Plangger
Branch: s390x-backend
Changeset: r82610:061da05db893
Date: 2016-02-29 14:27 +0100
http://bitbucket.org/pypy/pypy/changeset/061da05db893/
Log:renamed module, first hypothesis test that ensures that each interp
function works as expected
diff --git a/.hgignore
Author: Richard Plangger
Branch: s390x-backend
Changeset: r82612:df3c1340c16f
Date: 2016-02-29 14:58 +0100
http://bitbucket.org/pypy/pypy/changeset/df3c1340c16f/
Log:list create, list concat
diff --git a/rpython/jit/backend/llsupport/tl/code.py
b/rpython/jit/backend/llsupport/tl/code.py
---
Author: Richard Plangger
Branch: s390x-backend
Changeset: r82621:53b6b15a4a97
Date: 2016-03-01 08:05 +0100
http://bitbucket.org/pypy/pypy/changeset/53b6b15a4a97/
Log:list append, insert, del. indexing functions do not generate byte
code if IndexError would be raised
diff --git a/rpyt
Author: Richard Plangger
Branch: memop-simplify3
Changeset: r82623:6f7d32f89861
Date: 2016-03-01 08:32 +0100
http://bitbucket.org/pypy/pypy/changeset/6f7d32f89861/
Log:calculate index value (const scale, const offset) before emiting the
load for ConstPtrs
diff --git a/rpython/jit/bac
Author: Richard Plangger
Branch: memop-simplify3
Changeset: r82624:08f7c1c3571d
Date: 2016-03-01 08:34 +0100
http://bitbucket.org/pypy/pypy/changeset/08f7c1c3571d/
Log:removed getfield_gc_pure_* which where removed on default some time
ago
diff --git a/rpython/jit/backend/llsupport/r
Author: Richard Plangger
Branch: memop-simplify3
Changeset: r82622:6593ec12ff85
Date: 2016-03-01 08:16 +0100
http://bitbucket.org/pypy/pypy/changeset/6593ec12ff85/
Log:merged default
diff too long, truncating to 2000 out of 25290 lines
diff --git a/.hgignore b/.hgignore
--- a/.hgignore
+++
Author: Richard Plangger
Branch: s390x-backend
Changeset: r82625:1e7875e46f1c
Date: 2016-03-01 09:47 +0100
http://bitbucket.org/pypy/pypy/changeset/1e7875e46f1c/
Log:assembly instructions now check the immediate values, asserting if a
value too big/small is passed
diff --git a/rpytho
Author: Richard Plangger
Branch: s390x-backend
Changeset: r82626:9fc4da160aeb
Date: 2016-03-01 09:56 +0100
http://bitbucket.org/pypy/pypy/changeset/9fc4da160aeb/
Log:RISBGN use RISBG (does alter the cc), changed parameter of
build_rie_f (signed to unsigned). removed some unnecessay as
Author: Richard Plangger
Branch: s390x-backend
Changeset: r82630:2ea190038b88
Date: 2016-03-01 12:43 +0100
http://bitbucket.org/pypy/pypy/changeset/2ea190038b88/
Log:undo some of the changes of memop-simplify3 and pass length to the
length parameter instead of byte size
diff --git a/
Author: Richard Plangger
Branch: s390x-backend
Changeset: r82636:a5ef58cc
Date: 2016-03-01 15:02 +0100
http://bitbucket.org/pypy/pypy/changeset/a5ef58cc/
Log:removed the function field _arguments_, a new function rebuilds the
information needed for the auto encoding test
diff
Author: Richard Plangger
Branch: s390x-backend
Changeset: r82637:9eab49cb6677
Date: 2016-03-01 15:45 +0100
http://bitbucket.org/pypy/pypy/changeset/9eab49cb6677/
Log:trying to translate the current interpreter in a test and later feed
it with hypothesis. in addition fixed a bug that o
Author: Richard Plangger
Branch: s390x-backend
Changeset: r82638:ae5c221a741c
Date: 2016-03-01 17:25 +0100
http://bitbucket.org/pypy/pypy/changeset/ae5c221a741c/
Log:translating the interpreter and feeding it with hypothesis, it
compiles but does not correctly enter the dispatch loop
Author: Richard Plangger
Branch: s390x-backend
Changeset: r82640:b9cd7126874f
Date: 2016-03-01 17:57 +0100
http://bitbucket.org/pypy/pypy/changeset/b9cd7126874f/
Log:bytecode and constants are correctly passed, need to modify
hypothesis to generate correct programs
diff --git a/rpyth
Author: Richard Plangger
Branch: s390x-backend
Changeset: r82655:2c9ed008895a
Date: 2016-03-01 18:48 +0100
http://bitbucket.org/pypy/pypy/changeset/2c9ed008895a/
Log:created a test that tries to execute a byte code block (stack is not
prepared)
diff --git a/rpython/jit/backend/llsupp
Author: Richard Plangger
Branch: s390x-backend
Changeset: r82657:3e0b424d69d1
Date: 2016-03-02 16:02 +0100
http://bitbucket.org/pypy/pypy/changeset/3e0b424d69d1/
Log:ignore register 13 in pair allocation
diff --git a/rpython/jit/backend/llsupport/tl/test/zrpy_gc_hypo_test.py
b/rpython/jit/b
Author: Richard Plangger
Branch: s390x-backend
Changeset: r82656:62b48d6dd7ca
Date: 2016-03-02 14:41 +0100
http://bitbucket.org/pypy/pypy/changeset/62b48d6dd7ca/
Log:removed pool and loading constant using immediate values,
test_runner passes already
diff --git a/rpython/jit/backend/
Author: Richard Plangger
Branch: s390x-backend
Changeset: r82664:7ec50a9c18a6
Date: 2016-03-02 21:44 +0100
http://bitbucket.org/pypy/pypy/changeset/7ec50a9c18a6/
Log:fix in assembly. 1 func for addr generation of
gc_load/gc_store(_indexed) instead of 4
diff --git a/rpython/jit/backen
Author: Richard Plangger
Branch: s390x-backend
Changeset: r82665:90730c0a4880
Date: 2016-03-02 21:57 +0100
http://bitbucket.org/pypy/pypy/changeset/90730c0a4880/
Log:catchup default
diff too long, truncating to 2000 out of 12259 lines
diff --git a/.hgignore b/.hgignore
--- a/.hgignore
+++ b
Author: Richard Plangger
Branch: gcstress-hypothesis
Changeset: r82666:f2615fd00d55
Date: 2016-03-02 22:11 +0100
http://bitbucket.org/pypy/pypy/changeset/f2615fd00d55/
Log:moved out test test into new branch
diff --git a/rpython/jit/backend/llsupport/tl/__init__.py
b/rpython/jit/backend/lls
Author: Richard Plangger
Branch: s390x-backend
Changeset: r82667:178b2f4db5aa
Date: 2016-03-02 22:13 +0100
http://bitbucket.org/pypy/pypy/changeset/178b2f4db5aa/
Log:removed test files that where moved to gcstress-hypothesis
diff --git a/rpython/jit/backend/llsupport/tl/__init__.py
b/rpytho
Author: Richard Plangger
Branch: gcstress-hypothesis
Changeset: r82768:5ae35a1cd368
Date: 2016-03-03 10:52 +0100
http://bitbucket.org/pypy/pypy/changeset/5ae35a1cd368/
Log:creating a list of byte codes using hypothesis. the state along each
instruction is passed using shared
diff --g
Author: Richard Plangger
Branch: gcstress-hypothesis
Changeset: r82769:13234c967ffc
Date: 2016-03-04 10:40 +0100
http://bitbucket.org/pypy/pypy/changeset/13234c967ffc/
Log:added some tests to ensure bytecode generation considers the top
elements on the stack
diff --git a/rpython/jit/
Author: Richard Plangger
Branch: gcstress-hypothesis
Changeset: r82770:4dbf54a3736b
Date: 2016-03-04 15:58 +0100
http://bitbucket.org/pypy/pypy/changeset/4dbf54a3736b/
Log:block of bytecodes is now supported, it seems that some cases are
generated that trash the constraint max_size of
Author: Richard Plangger
Branch: s390x-backend
Changeset: r82807:9ff14f05a92d
Date: 2016-03-06 10:24 +0100
http://bitbucket.org/pypy/pypy/changeset/9ff14f05a92d/
Log:catchup with default
diff --git a/pypy/doc/contributor.rst b/pypy/doc/contributor.rst
--- a/pypy/doc/contributor.rst
+++ b/pyp
Author: Richard Plangger
Branch: s390x-backend
Changeset: r82806:f563f1ea7c20
Date: 2016-03-06 10:21 +0100
http://bitbucket.org/pypy/pypy/changeset/f563f1ea7c20/
Log:fixed some tests
diff --git a/rpython/jit/backend/llsupport/test/test_gc_integration.py
b/rpython/jit/backend/llsupport/test/
Author: Richard Plangger
Branch: s390x-backend
Changeset: r82808:572470f1b45a
Date: 2016-03-06 11:57 +0100
http://bitbucket.org/pypy/pypy/changeset/572470f1b45a/
Log:reverted x86 assembler (malloc_cond_varsize), related to the issue
with bytesize and length
diff --git a/rpython/jit/b
Author: Richard Plangger
Branch: s390x-backend
Changeset: r82810:71943846762a
Date: 2016-03-06 12:01 +0100
http://bitbucket.org/pypy/pypy/changeset/71943846762a/
Log:added whats new entry for memop-simplify3
diff --git a/pypy/doc/whatsnew-head.rst b/pypy/doc/whatsnew-head.rst
--- a/pypy/doc/
Author: Richard Plangger
Branch: memop-simplify3
Changeset: r82809:1cd36e0809b5
Date: 2016-03-06 11:58 +0100
http://bitbucket.org/pypy/pypy/changeset/1cd36e0809b5/
Log:close branch
___
pypy-commit mailing list
pypy-commit@python.org
https://mail.py
Author: Richard Plangger
Branch: s390x-backend
Changeset: r82811:5e9210fd34f7
Date: 2016-03-06 12:10 +0100
http://bitbucket.org/pypy/pypy/changeset/5e9210fd34f7/
Log:fixed messed up whatsnew entry by merge...
diff --git a/pypy/doc/whatsnew-5.0.0.rst b/pypy/doc/whatsnew-5.0.0.rst
--- a/pypy/d
Author: Richard Plangger
Branch: s390x-backend
Changeset: r82815:372d00e95882
Date: 2016-03-06 17:02 +0100
http://bitbucket.org/pypy/pypy/changeset/372d00e95882/
Log:fixed resop comment + param count
diff --git a/rpython/jit/backend/llsupport/rewrite.py
b/rpython/jit/backend/llsupport/rewri
Author: Richard Plangger
Branch: s390x-backend
Changeset: r82818:8ab56b6e79d4
Date: 2016-03-06 18:28 +0100
http://bitbucket.org/pypy/pypy/changeset/8ab56b6e79d4/
Log:(untested) fix zero array for ppc
diff --git a/rpython/jit/backend/ppc/opassembler.py
b/rpython/jit/backend/ppc/opassembler.p
Author: Richard Plangger
Branch: s390x-backend
Changeset: r82819:539acda35771
Date: 2016-03-06 18:35 +0100
http://bitbucket.org/pypy/pypy/changeset/539acda35771/
Log:kill unused methods (_apply_scale, _multiply_by_constant)
diff --git a/rpython/jit/backend/ppc/opassembler.py
b/rpython/jit/b
Author: Richard Plangger
Branch: s390x-backend
Changeset: r82820:974fa6a90ecd
Date: 2016-03-06 18:37 +0100
http://bitbucket.org/pypy/pypy/changeset/974fa6a90ecd/
Log:typo it is curRpos
diff --git a/rpython/jit/backend/ppc/opassembler.py
b/rpython/jit/backend/ppc/opassembler.py
--- a/rpython
Author: Richard Plangger
Branch: s390x-backend
Changeset: r82821:64b4e6d07aed
Date: 2016-03-06 18:38 +0100
http://bitbucket.org/pypy/pypy/changeset/64b4e6d07aed/
Log:_multiply_by_constant is still used by malloc_cond_varsize
diff --git a/rpython/jit/backend/ppc/opassembler.py
b/rpython/jit/
Author: Richard Plangger
Branch: s390x-backend
Changeset: r82824:4cca8fad1c1f
Date: 2016-03-06 19:17 +0100
http://bitbucket.org/pypy/pypy/changeset/4cca8fad1c1f/
Log:(untested) fixed two issues in the ppc zero_array
diff --git a/rpython/jit/backend/ppc/opassembler.py
b/rpython/jit/backend/p
Author: Richard Plangger
Branch: s390x-backend
Changeset: r82829:1afedf2dd2d2
Date: 2016-03-06 20:49 +0100
http://bitbucket.org/pypy/pypy/changeset/1afedf2dd2d2/
Log:(untested) length is imm, we still need to check if enough space can
be written. eliminated first stdux, doing addr cal
Author: Richard Plangger
Branch: s390x-backend
Changeset: r82832:b31ac68c3821
Date: 2016-03-06 21:35 +0100
http://bitbucket.org/pypy/pypy/changeset/b31ac68c3821/
Log:catchup with default
diff --git a/pypy/doc/release-5.0.0.rst b/pypy/doc/release-5.0.0.rst
--- a/pypy/doc/release-5.0.0.rst
+++
Author: Richard Plangger
Branch: s390x-backend
Changeset: r82836:04dc68d8235f
Date: 2016-03-07 08:20 +0100
http://bitbucket.org/pypy/pypy/changeset/04dc68d8235f/
Log:r.length_loc does not exist! removed "r."
diff --git a/rpython/jit/backend/ppc/opassembler.py
b/rpython/jit/backend/ppc/opass
Author: Richard Plangger
Branch: s390x-enhance-speed
Changeset: r82843:9c1e430cbed5
Date: 2016-03-07 12:00 +0100
http://bitbucket.org/pypy/pypy/changeset/9c1e430cbed5/
Log:partly enabling the literal pool. it is now simpler and does not
allocate 32bit values
diff --git a/rpython/jit/
Author: Richard Plangger
Branch: s390x-backend
Changeset: r82844:a144c706eae1
Date: 2016-03-07 12:18 +0100
http://bitbucket.org/pypy/pypy/changeset/a144c706eae1/
Log:updated s390x docu
diff --git a/rpython/doc/s390x.rst b/rpython/doc/s390x.rst
--- a/rpython/doc/s390x.rst
+++ b/rpython/doc/s3
Author: Richard Plangger
Branch: s390x-enhance-speed
Changeset: r82845:62241a24deb5
Date: 2016-03-07 15:10 +0100
http://bitbucket.org/pypy/pypy/changeset/62241a24deb5/
Log:using load_imm using pool instead of load_imm_plus for gcrootmap
(root stack top addr). there is not gain for doi
Author: Richard Plangger
Branch: s390x-enhance-speed
Changeset: r82848:adcad73cca0f
Date: 2016-03-07 16:28 +0100
http://bitbucket.org/pypy/pypy/changeset/adcad73cca0f/
Log:missing module import, wrong attr access
diff --git a/rpython/jit/backend/zarch/pool.py
b/rpython/jit/backend/zarch/poo
Author: Richard Plangger
Branch: s390x-enhance-speed
Changeset: r82847:cc0fd9f1b25f
Date: 2016-03-07 15:38 +0100
http://bitbucket.org/pypy/pypy/changeset/cc0fd9f1b25f/
Log:added two more pointer to the literal pool, exchanged some registers
for better pipeline flow
diff --git a/rpyth
Author: Richard Plangger
Branch: s390x-backend
Changeset: r82869:014ea5f68140
Date: 2016-03-07 19:47 +0100
http://bitbucket.org/pypy/pypy/changeset/014ea5f68140/
Log:correct shift for ppc zero array, ofs_loc can be a register
diff --git a/rpython/jit/backend/ppc/opassembler.py
b/rpython/jit
Author: Richard Plangger
Branch: s390x-backend
Changeset: r82871:89a10fc86c4b
Date: 2016-03-07 20:47 +0100
http://bitbucket.org/pypy/pypy/changeset/89a10fc86c4b/
Log:correct positioning of the ptr to write
diff --git a/rpython/jit/backend/ppc/opassembler.py
b/rpython/jit/backend/ppc/opassem
Author: Richard Plangger
Branch: s390x-backend
Changeset: r82874:78f8d539bef6
Date: 2016-03-08 09:25 +0100
http://bitbucket.org/pypy/pypy/changeset/78f8d539bef6/
Log:jump location was off, shift by parameter of sradi is weird (but it
works now)
diff --git a/rpython/jit/backend/ppc/op
Author: Richard Plangger
Branch: s390x-backend
Changeset: r82899:c63346ce0b33
Date: 2016-03-09 09:46 +0100
http://bitbucket.org/pypy/pypy/changeset/c63346ce0b33/
Log:merged the speed improvements from s390x-enhance-speed
diff --git a/rpython/jit/backend/zarch/assembler.py
b/rpython/jit/back
Author: Richard Plangger
Branch: s390x-backend
Changeset: r82900:acc1954c74fa
Date: 2016-03-09 09:52 +0100
http://bitbucket.org/pypy/pypy/changeset/acc1954c74fa/
Log:merged default
diff --git a/LICENSE b/LICENSE
--- a/LICENSE
+++ b/LICENSE
@@ -240,6 +240,7 @@
Kristjan Valur Jonsson
Dav
Author: Richard Plangger
Branch: s390x-backend
Changeset: r82901:2d40f0c2257e
Date: 2016-03-09 10:39 +0100
http://bitbucket.org/pypy/pypy/changeset/2d40f0c2257e/
Log:removed skip from signal test
diff --git a/pypy/module/__pypy__/test/test_signal.py
b/pypy/module/__pypy__/test/test_signal.p
Author: Richard Plangger
Branch:
Changeset: r991:2041ec4f50e8
Date: 2016-03-09 10:57 +0100
http://bitbucket.org/pypy/buildbot/changeset/2041ec4f50e8/
Log:replaced python vm for building pypy with pypy! builds for s390x now
spawn NOT at the same time, but shifted by 2-3h
diff --git a
Author: Richard Plangger
Branch: s390x-backend
Changeset: r82927:290a4a57f4ac
Date: 2016-03-10 09:48 +0100
http://bitbucket.org/pypy/pypy/changeset/290a4a57f4ac/
Log:added print statement to test
diff --git a/rpython/rlib/test/test_rthread.py
b/rpython/rlib/test/test_rthread.py
--- a/rpytho
Author: Richard Plangger
Branch: s390x-backend
Changeset: r82926:8cdcda35c815
Date: 2016-03-10 08:47 +0100
http://bitbucket.org/pypy/pypy/changeset/8cdcda35c815/
Log:test fixes broken by merge
diff --git a/pypy/doc/whatsnew-head.rst b/pypy/doc/whatsnew-head.rst
--- a/pypy/doc/whatsnew-head.r
Author: Richard Plangger
Branch: s390x-backend
Changeset: r82931:87b9598ed2c7
Date: 2016-03-10 11:32 +0100
http://bitbucket.org/pypy/pypy/changeset/87b9598ed2c7/
Log:condition code to jmp param included a case it should not have!
__sync_lock_test_and_set changed to do exactly the same
Author: Richard Plangger
Branch: s390x-backend
Changeset: r82932:632d518f2072
Date: 2016-03-10 11:40 +0100
http://bitbucket.org/pypy/pypy/changeset/632d518f2072/
Log:added serialization point (to test if this is a problem for the
threading issues)
diff --git a/rpython/jit/backend/zar
Author: Richard Plangger
Branch:
Changeset: r82941:308a29538cda
Date: 2016-03-10 15:40 +0100
http://bitbucket.org/pypy/pypy/changeset/308a29538cda/
Log:merge the new s390x backend
diff too long, truncating to 2000 out of 11876 lines
diff --git a/.hgignore b/.hgignore
--- a/.hgignore
+++ b/
Author: Richard Plangger
Branch: s390x-enhance-speed
Changeset: r82943:a0123b0e67f5
Date: 2016-03-10 15:44 +0100
http://bitbucket.org/pypy/pypy/changeset/a0123b0e67f5/
Log:close branch
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Author: Richard Plangger
Branch: s390x-backend
Changeset: r82942:9a366b997dcc
Date: 2016-03-10 15:44 +0100
http://bitbucket.org/pypy/pypy/changeset/9a366b997dcc/
Log:close branch
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Author: Richard Plangger
Branch:
Changeset: r992:c21ef5322a5a
Date: 2016-03-10 16:12 +0100
http://bitbucket.org/pypy/buildbot/changeset/c21ef5322a5a/
Log:s390x buildbot now nightly builds default
diff --git a/bot2/pypybuildbot/master.py b/bot2/pypybuildbot/master.py
--- a/bot2/pypybuildbot/
Author: Richard Plangger
Branch:
Changeset: r82952:ea3532fc750b
Date: 2016-03-11 07:05 +0100
http://bitbucket.org/pypy/pypy/changeset/ea3532fc750b/
Log:these branches where not merged to default, so do not document them
(added docu to s390x-backend)
diff --git a/pypy/doc/whatsnew-he
Author: Richard Plangger
Branch:
Changeset: r82953:253deb8fdde5
Date: 2016-03-11 07:19 +0100
http://bitbucket.org/pypy/pypy/changeset/253deb8fdde5/
Log:removed some dead code in the literal pool, removed some comments,
unnecessary instruction
diff --git a/rpython/jit/backend/zarch/a
Author: Richard Plangger
Branch:
Changeset: r82960:4475205e86ba
Date: 2016-03-11 07:55 +0100
http://bitbucket.org/pypy/pypy/changeset/4475205e86ba/
Log:added enum34 package which is otherwise not picked up by pip on
s390x build bot
diff --git a/requirements.txt b/requirements.txt
--
Author: Richard Plangger
Branch:
Changeset: r82961:3cab2735d806
Date: 2016-03-11 12:07 +0100
http://bitbucket.org/pypy/pypy/changeset/3cab2735d806/
Log:os.uname not avail. on windows (thx matti for pointing it out)
diff --git a/pypy/module/_vmprof/conftest.py b/pypy/module/_vmprof/conftest.
Author: Richard Plangger
Branch: gcstress-hypothesis
Changeset: r82980:2eb2117bac14
Date: 2016-03-11 17:04 +0100
http://bitbucket.org/pypy/pypy/changeset/2eb2117bac14/
Log:finally a basic block of instructions can be generated, list
strategy may not append some drawn values (critical
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