Re: [Rfi] usb: dwc2: Kernel 4.5 and socfpga problem

2016-03-19 Thread Phil Reid
On 18/03/2016 10:41 PM, Dinh Nguyen wrote: On 03/17/2016 09:35 PM, Phil Reid wrote: G'day, Has anyone successful run the usb dwc2 from kenerl 4.5 on an socfpga. Yes. I just tested on the devkit and USB is working fine: [0.655761] ffb4.usb supply vusb_d not found, using

[Rfi] usb: dwc2: Kernel 4.5 and socfpga problem

2016-03-19 Thread Phil Reid
g all the driver code to the 4.4 tree results in things working again. -- Regards Phil Reid ___ Rfi mailing list Rfi@lists.rocketboards.org http://lists.rocketboards.org/cgi-bin/mailman/listinfo/rfi

Re: [Rfi] RS485 half-duplex

2016-05-18 Thread Phil Reid
io to remap the hps gpio pins so that you can use the driver as is. I did similar to get a PPS signal from a GPS module into the hps uart on the correct signal for gpsd to work. -- Regards Phil Reid ___ Rfi mailing list Rfi@lists.rocketboards.org

Re: [Rfi] RS485 half-duplex

2016-05-18 Thread Phil Reid
ins so that you can use the driver as is. I did similar to get a PPS signal from a GPS module into the hps uart on the correct signal for gpsd to work. -- Regards Phil Reid ___ Rfi mailing list Rfi@lists.rocketboards.org http://lists.rocketboards.org/cgi-bin/mailman/listinfo/rfi

Re: [Rfi] Sopc2Dts not generating usable device tree

2016-06-03 Thread Phil Reid
you platform you may have different periphals enabled. Also don't forget that the spl / uboot need to be updated if you change HPS pin muxes. This includes fpga bridges etc. Also does the generic timer you add have the necessary _hw.tcl code to add entri

Re: [Rfi] Sopc2Dts not generating usable device tree

2016-06-08 Thread Phil Reid
mic dts support in the linux kernel. Our reloading fpga images either. -- Regards Phil Reid ___ Rfi mailing list Rfi@lists.rocketboards.org http://lists.rocketboards.org/cgi-bin/mailman/listinfo/rfi

Re: [Rfi] gpio-altera driver reading output values

2016-06-19 Thread Phil Reid
he problem, provided you don't want to use the input for something else. Otherwise you'll need to write you own ip core with a better register interface. -- Regards Phil Reid ___ Rfi mailing list Rfi@lists.rocketboards.org http://lists.rock

[Rfi] Remote FPGA debugging

2016-06-20 Thread Phil Reid
s) have already been claimed, and the new claims are not compatible with the existing claims(s). while executing "open_service master $mstr" --- I've had a search for error message but so far no luck figuring out what I

Re: [Rfi] Remote FPGA debugging

2016-06-22 Thread Phil Reid
als in the name so I'll give that a go. -- Regards Phil Reid ___ Rfi mailing list Rfi@lists.rocketboards.org http://lists.rocketboards.org/cgi-bin/mailman/listinfo/rfi

Re: [Rfi] fpga_manager fpga0: Error requesting firmware

2016-06-29 Thread Phil Reid
ting the new framework to program FPGA through DTB overlay. But after I execute "echo socfpga_gen3cam_fpga.dtbo > /config/device-tree/overlays/socwks/path", I get error "fpga_manager fpga0: Error requesting firmware cyclonev_bw.rbf". FYI, I have put cyclonev_bw.rbf

Re: [Rfi] fpga_manager fpga0: Error requesting firmware

2016-07-22 Thread Phil Reid
one5_socwks_fpga_overlay.dtb > > >>> /config/device-tree/overlays/s > >>> ocwks/path > >>> [ 256.010219] fpga_manager fpga0: writing soc_system.rbf to Altera > >>> SOCFPGA FPGA Manager > >>> # > >&

Re: [Rfi] fpga_manager fpga0: Error requesting firmware

2016-07-24 Thread Phil Reid
On 25/07/2016 14:10, Teoh Choon Zone wrote: On Mon, Jul 25, 2016 at 8:43 AM, Phil Reid mailto:pr...@electromag.com.au>> wrote: G'day Tim, On 22/07/2016 23:09, Tim Sander wrote: Hi Phil Am Freitag, 22. Juli 2016, 16:52:25 schrieb Phil Reid:

Re: [Rfi] fpga_manager fpga0: Error requesting firmware

2016-07-25 Thread Phil Reid
that's related. Someone with a bit more knowledge may be able to offer some advice. cc: Alan Tull -- Regards Phil Reid ElectroMagnetic Imaging Technology Pty Ltd Development of Geophysical Instrumentation & Software www.electromag.com.au 3 The Avenue, M

Re: [Rfi] fpga_manager fpga0: Error requesting firmware

2016-07-25 Thread Phil Reid
On 25/07/2016 16:58, Tim Sander wrote: Hi Phil Am Montag, 25. Juli 2016, 16:47:22 schrieb Phil Reid: On 25/07/2016 15:09, Teoh Choon Zone wrote: Whats in brgmodrst (0xFFD0501C)? 0xFF401FD0 is the lw hps2fpga bridge. 0xC00D looks a bit odd for lw hps2fpga bridge devices

Re: [Rfi] fpga_manager fpga0: Error requesting firmware

2016-07-26 Thread Phil Reid
mainline kernel as yet. It got added to my kernel branch with the following patch I picked up from one of the altera branches ( I don't remember which). Author: Dinh Nguyen 2014-08-05 05:43:12 Committer: Phil Reid 2016-07-22 14:51:56 Parent: eb446030fd86f80eaf28181523a305094906af2d (F

[Rfi] Cyclone V i2c Bus Recovery

2016-08-16 Thread Phil Reid
y ideas on how to implement i2c recovery? -- Regards Phil Reid ___ Rfi mailing list Rfi@lists.rocketboards.org http://lists.rocketboards.org/cgi-bin/mailman/listinfo/rfi

Re: [Rfi] I2C not working

2016-09-26 Thread Phil Reid
dated correctly. You can also try the i2c tests in uboot to remove the kernel from the equation. There's the equivalent "i2c probe" uboot command. -- Regards Phil Reid ___ Rfi mailing list Rfi@lists.rocketboards.org http://lists.ro

Re: [Rfi] ALTERA TSE

2016-10-10 Thread Phil Reid
ceive packet issue with Altera SGDMA is in your tree. -- Regards Phil Reid ___ Rfi mailing list Rfi@lists.rocketboards.org http://lists.rocketboards.org/cgi-bin/mailman/listinfo/rfi

Re: [Rfi] Memory controller frequency VS DDR3 speed grade

2016-10-24 Thread Phil Reid
dex.php/t-35838.html -- Regards Phil Reid ElectroMagnetic Imaging Technology Pty Ltd Development of Geophysical Instrumentation & Software www.electromag.com.au 3 The Avenue, Midland WA 6056, AUSTRALIA Ph: +61 8 9250 8100 Fax: +61 8 9250 7100 Email: pr..

Re: [Rfi] Altera TSE Mac

2016-11-09 Thread Phil Reid
egister to adjust the timing, some have per pin skew adjustment. It'll depend on your board layout and the individual phy. -- Regards Phil Reid ___ Rfi mailing list Rfi@lists.rocketboards.org http://lists.rocketboards.org/cgi-bin/mailman/listinfo/rfi

Re: [Rfi] how to change ram size in u boot

2017-06-19 Thread Phil Reid
ot version you're using I think. With uboot v2016.01 I had to set PHYS_SDRAM_1_SIZE in the header for the board. include\configs\socfpga_*.h Newer version of uboot have migrated more settings to the board config. configs\socfpga_*defconfig Not sure where that one lives. -- Re

Re: [Rfi] -sh: flash_erase: command not found

2017-09-10 Thread Phil Reid
X KERNEL to enable flash_erase, etc. ? Or what am I missing ?? I built the default zImage too and tried it. I think your image needs mtd-utils. You may be able to: > opkg update > opkg install mtd-utils -- Regards Phil Reid ElectroMagnetic Imaging Technology Pty Ltd Development

Re: [Rfi] Yocto Source Package

2017-09-10 Thread Phil Reid
the altera layer: https://github.com/kraj/meta-altera/tree/master/recipes-kernel/linux Or roll your own. The mainline kernel / uboot pretty much has everything needed for the C-V's now. -- Regards Phil Reid ___ Rfi mailing list Rfi@lists.rocketboards.org

Re: [Rfi] Yocto Source Package

2017-09-13 Thread Phil Reid
/1784395188 - Original Message - From: "Phil Reid" To: "Janet Estabridis" , "rfi" Sent: Sunday, September 10, 2017 4:28:00 PM Subject: Re: [Rfi] Yocto Source Package On 9/09/2017 01:09, Janet Estabridis wrote: Thanks in advance. So, I'm wanting t