CVS commit: src/sys/arch/arm/footbridge
Module Name:src
Committed By: skrll
Date: Fri Aug 13 11:40:43 UTC 2021
Modified Files:
src/sys/arch/arm/footbridge: footbridge.c footbridge_clock.c
footbridge_com.c footbridge_com_io.c footbridge_intr.h
footbridge_io.c footbridge_irqhandler.c footbridge_pci.c
src/sys/arch/arm/footbridge/isa: dsrtc.c isa_io.c isa_io_asm.S
isa_machdep.c
Log Message:
Trailing whitespace
To generate a diff of this commit:
cvs rdiff -u -r1.28 -r1.29 src/sys/arch/arm/footbridge/footbridge.c
cvs rdiff -u -r1.26 -r1.27 src/sys/arch/arm/footbridge/footbridge_clock.c
cvs rdiff -u -r1.39 -r1.40 src/sys/arch/arm/footbridge/footbridge_com.c
cvs rdiff -u -r1.9 -r1.10 src/sys/arch/arm/footbridge/footbridge_com_io.c
cvs rdiff -u -r1.21 -r1.22 src/sys/arch/arm/footbridge/footbridge_intr.h
cvs rdiff -u -r1.24 -r1.25 src/sys/arch/arm/footbridge/footbridge_io.c
cvs rdiff -u -r1.27 -r1.28 \
src/sys/arch/arm/footbridge/footbridge_irqhandler.c
cvs rdiff -u -r1.32 -r1.33 src/sys/arch/arm/footbridge/footbridge_pci.c
cvs rdiff -u -r1.12 -r1.13 src/sys/arch/arm/footbridge/isa/dsrtc.c
cvs rdiff -u -r1.9 -r1.10 src/sys/arch/arm/footbridge/isa/isa_io.c
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/arm/footbridge/isa/isa_io_asm.S
cvs rdiff -u -r1.23 -r1.24 src/sys/arch/arm/footbridge/isa/isa_machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/footbridge/footbridge.c
diff -u src/sys/arch/arm/footbridge/footbridge.c:1.28 src/sys/arch/arm/footbridge/footbridge.c:1.29
--- src/sys/arch/arm/footbridge/footbridge.c:1.28 Sat Aug 7 16:18:43 2021
+++ src/sys/arch/arm/footbridge/footbridge.c Fri Aug 13 11:40:43 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: footbridge.c,v 1.28 2021/08/07 16:18:43 thorpej Exp $ */
+/* $NetBSD: footbridge.c,v 1.29 2021/08/13 11:40:43 skrll Exp $ */
/*
* Copyright (c) 1997,1998 Mark Brinicombe.
@@ -35,7 +35,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: footbridge.c,v 1.28 2021/08/07 16:18:43 thorpej Exp $");
+__KERNEL_RCSID(0, "$NetBSD: footbridge.c,v 1.29 2021/08/13 11:40:43 skrll Exp $");
#include
#include
@@ -58,7 +58,7 @@ __KERNEL_RCSID(0, "$NetBSD: footbridge.c
#include
#include
#include
-
+
/*
* DC21285 'Footbridge' device
*
@@ -126,8 +126,8 @@ footbridge_print(void *aux, const char *
* int footbridge_match(device_t parent, cfdata_t cf, void *aux)
*
* Just return ok for this if it is device 0
- */
-
+ */
+
static int
footbridge_match(device_t parent, cfdata_t cf, void *aux)
{
@@ -141,7 +141,7 @@ footbridge_match(device_t parent, cfdata
* void footbridge_attach(device_t parent, device_t dev, void *aux)
*
*/
-
+
static void
footbridge_attach(device_t parent, device_t self, void *aux)
{
@@ -188,7 +188,7 @@ footbridge_attach(device_t parent, devic
"targ abt", footbridge_intr, sc);
sc->sc_parity_ih = footbridge_intr_claim(IRQ_PARITY, IPL_HIGH,
"parity", footbridge_intr, sc);
-
+
/* Set up the PCI bus tags */
footbridge_create_io_bs_tag(_pci_io_bs_tag,
(void *)DC21285_PCI_IO_VBASE);
@@ -220,7 +220,7 @@ footbridge_attach(device_t parent, devic
break;
mask--;
mask &= SDRAM_MASK_256MB;
-
+
/*
* configure the mask, the offset into SDRAM and the address
* SDRAM is exposed on the PCI bus.
@@ -255,7 +255,7 @@ footbridge_attach(device_t parent, devic
fba.fba_fca.fca_tx_irq = IRQ_SERIAL_TX;
config_found(self, _fca, footbridge_print,
CFARGS(.iattr = "footbridge"));
-
+
/* Setup fast SA110 cache clean area */
#ifdef CPU_SA110
if (cputype == CPU_ID_SA110)
Index: src/sys/arch/arm/footbridge/footbridge_clock.c
diff -u src/sys/arch/arm/footbridge/footbridge_clock.c:1.26 src/sys/arch/arm/footbridge/footbridge_clock.c:1.27
--- src/sys/arch/arm/footbridge/footbridge_clock.c:1.26 Tue Jul 21 07:35:55 2009
+++ src/sys/arch/arm/footbridge/footbridge_clock.c Fri Aug 13 11:40:43 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: footbridge_clock.c,v 1.26 2009/07/21 07:35:55 skrll Exp $ */
+/* $NetBSD: footbridge_clock.c,v 1.27 2021/08/13 11:40:43 skrll Exp $ */
/*
* Copyright (c) 1997 Mark Brinicombe.
@@ -35,7 +35,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: footbridge_clock.c,v 1.26 2009/07/21 07:35:55 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: footbridge_clock.c,v 1.27 2021/08/13 11:40:43 skrll Exp $");
/* Include header files */
@@ -88,8 +88,8 @@ CFATTACH_DECL_NEW(footbridge_clock, size
* int clockmatch(device_t parent, cfdata_t cf, void *aux);
*
* Just return ok for this if it is device 0
- */
-
+ */
+
static int
clockmatch(device_t parent, cfdata_t cf, void *aux)
{
@@ -105,7 +105,7 @@ clockmatch(device_t parent, cfdata_t cf,
* void clockattach(device_t parent, device_t self, void *aux)
*
*/
-
+
static void
clockattach(device_t parent, device_t self, void *aux)
{
@@ -119,7 +119,7 @@ clockattach(device_t parent, device_t se
clock_sc = sc;
/*
CVS commit: src/sys/arch/arm/cortex
Module Name:src Committed By: jmcneill Date: Tue Aug 10 17:12:31 UTC 2021 Modified Files: src/sys/arch/arm/cortex: files.cortex gic.c gicv3.c Log Message: Make gic_splfuncs optional and disable it by default until it has had more testing. To generate a diff of this commit: cvs rdiff -u -r1.15 -r1.16 src/sys/arch/arm/cortex/files.cortex cvs rdiff -u -r1.48 -r1.49 src/sys/arch/arm/cortex/gic.c cvs rdiff -u -r1.45 -r1.46 src/sys/arch/arm/cortex/gicv3.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/cortex/files.cortex diff -u src/sys/arch/arm/cortex/files.cortex:1.15 src/sys/arch/arm/cortex/files.cortex:1.16 --- src/sys/arch/arm/cortex/files.cortex:1.15 Tue Aug 10 15:33:09 2021 +++ src/sys/arch/arm/cortex/files.cortex Tue Aug 10 17:12:31 2021 @@ -1,4 +1,4 @@ -# $NetBSD: files.cortex,v 1.15 2021/08/10 15:33:09 jmcneill Exp $ +# $NetBSD: files.cortex,v 1.16 2021/08/10 17:12:31 jmcneill Exp $ defflag opt_cpu_in_cksum.h NEON_IN_CKSUM @@ -11,16 +11,16 @@ device armperiph: mpcorebus attach armperiph at mainbus file arch/arm/cortex/armperiph.c armperiph -define gic_splfuncs +defflag opt_gic.hGIC_SPLFUNCS file arch/arm/cortex/gic_splfuncs.c gic_splfuncs # ARM Generic Interrupt Controller (initially on Cortex-A9) -device armgic: pic, pic_splfuncs, gic_splfuncs +device armgic: pic, pic_splfuncs attach armgic at mpcorebus file arch/arm/cortex/gic.c armgic # ARM Generic Interrupt Controller v3+ -device gicvthree: pic, pic_splfuncs, gic_splfuncs +device gicvthree: pic, pic_splfuncs file arch/arm/cortex/gicv3.c gicvthree file arch/arm/cortex/gicv3_its.c gicvthree & pci & __have_pci_msi_msix Index: src/sys/arch/arm/cortex/gic.c diff -u src/sys/arch/arm/cortex/gic.c:1.48 src/sys/arch/arm/cortex/gic.c:1.49 --- src/sys/arch/arm/cortex/gic.c:1.48 Tue Aug 10 15:33:09 2021 +++ src/sys/arch/arm/cortex/gic.c Tue Aug 10 17:12:31 2021 @@ -1,4 +1,4 @@ -/* $NetBSD: gic.c,v 1.48 2021/08/10 15:33:09 jmcneill Exp $ */ +/* $NetBSD: gic.c,v 1.49 2021/08/10 17:12:31 jmcneill Exp $ */ /*- * Copyright (c) 2012 The NetBSD Foundation, Inc. * All rights reserved. @@ -30,11 +30,12 @@ #include "opt_ddb.h" #include "opt_multiprocessor.h" +#include "opt_gic.h" #define _INTR_PRIVATE #include -__KERNEL_RCSID(0, "$NetBSD: gic.c,v 1.48 2021/08/10 15:33:09 jmcneill Exp $"); +__KERNEL_RCSID(0, "$NetBSD: gic.c,v 1.49 2021/08/10 17:12:31 jmcneill Exp $"); #include #include @@ -50,9 +51,12 @@ __KERNEL_RCSID(0, "$NetBSD: gic.c,v 1.48 #include #include -#include #include +#ifdef GIC_SPLFUNCS +#include +#endif + void armgic_irq_handler(void *); #define ARMGIC_SGI_IPIBASE 0 @@ -730,7 +734,9 @@ armgic_attach(device_t parent, device_t "%u SGIs\n", priorities, sc->sc_gic_lines - ppis - sgis, ppis, sgis); +#ifdef GIC_SPLFUNCS gic_spl_init(); +#endif } CFATTACH_DECL_NEW(armgic, 0, Index: src/sys/arch/arm/cortex/gicv3.c diff -u src/sys/arch/arm/cortex/gicv3.c:1.45 src/sys/arch/arm/cortex/gicv3.c:1.46 --- src/sys/arch/arm/cortex/gicv3.c:1.45 Tue Aug 10 15:33:09 2021 +++ src/sys/arch/arm/cortex/gicv3.c Tue Aug 10 17:12:31 2021 @@ -1,4 +1,4 @@ -/* $NetBSD: gicv3.c,v 1.45 2021/08/10 15:33:09 jmcneill Exp $ */ +/* $NetBSD: gicv3.c,v 1.46 2021/08/10 17:12:31 jmcneill Exp $ */ /*- * Copyright (c) 2018 Jared McNeill @@ -27,11 +27,12 @@ */ #include "opt_multiprocessor.h" +#include "opt_gic.h" #define _INTR_PRIVATE #include -__KERNEL_RCSID(0, "$NetBSD: gicv3.c,v 1.45 2021/08/10 15:33:09 jmcneill Exp $"); +__KERNEL_RCSID(0, "$NetBSD: gicv3.c,v 1.46 2021/08/10 17:12:31 jmcneill Exp $"); #include #include @@ -51,7 +52,10 @@ __KERNEL_RCSID(0, "$NetBSD: gicv3.c,v 1. #include #include + +#ifdef GIC_SPLFUNCS #include +#endif #define PICTOSOFTC(pic) \ ((void *)((uintptr_t)(pic) - offsetof(struct gicv3_softc, sc_pic))) @@ -952,7 +956,9 @@ gicv3_init(struct gicv3_softc *sc) #endif #endif +#ifdef GIC_SPLFUNCS gic_spl_init(); +#endif return 0; }
CVS commit: src/sys/arch/arm/dts
Module Name:src
Committed By: jmcneill
Date: Tue Aug 10 16:52:43 UTC 2021
Modified Files:
src/sys/arch/arm/dts: sun50i-a64-sopine-baseboard.dts
Log Message:
Enable DVFS
To generate a diff of this commit:
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/arm/dts/sun50i-a64-sopine-baseboard.dts
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/dts/sun50i-a64-sopine-baseboard.dts
diff -u src/sys/arch/arm/dts/sun50i-a64-sopine-baseboard.dts:1.4 src/sys/arch/arm/dts/sun50i-a64-sopine-baseboard.dts:1.5
--- src/sys/arch/arm/dts/sun50i-a64-sopine-baseboard.dts:1.4 Wed Jun 30 06:24:02 2021
+++ src/sys/arch/arm/dts/sun50i-a64-sopine-baseboard.dts Tue Aug 10 16:52:43 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: sun50i-a64-sopine-baseboard.dts,v 1.4 2021/06/30 06:24:02 skrll Exp $ */
+/* $NetBSD: sun50i-a64-sopine-baseboard.dts,v 1.5 2021/08/10 16:52:43 jmcneill Exp $ */
/*-
* Copyright (c) 2018 Jared McNeill
@@ -37,3 +37,15 @@
status = "okay";
};
+ {
+cpu-supply = <_dcdc2>;
+operating-points = <
+/* kHzuV */
+1152000 130
+1104000 126
+1008000 120
+816000 108
+648000 104
+408000 100
+>;
+};
CVS commit: src/sys/arch/arm/cortex
Module Name:src
Committed By: jmcneill
Date: Tue Aug 10 15:33:09 UTC 2021
Modified Files:
src/sys/arch/arm/cortex: files.cortex gic.c gicv3.c
Added Files:
src/sys/arch/arm/cortex: gic_splfuncs.c gic_splfuncs.h
Log Message:
Use custom spl funcs for GIC and avoid unnecessary pmr register accesses
in splx.
To generate a diff of this commit:
cvs rdiff -u -r1.14 -r1.15 src/sys/arch/arm/cortex/files.cortex
cvs rdiff -u -r1.47 -r1.48 src/sys/arch/arm/cortex/gic.c
cvs rdiff -u -r0 -r1.1 src/sys/arch/arm/cortex/gic_splfuncs.c \
src/sys/arch/arm/cortex/gic_splfuncs.h
cvs rdiff -u -r1.44 -r1.45 src/sys/arch/arm/cortex/gicv3.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/cortex/files.cortex
diff -u src/sys/arch/arm/cortex/files.cortex:1.14 src/sys/arch/arm/cortex/files.cortex:1.15
--- src/sys/arch/arm/cortex/files.cortex:1.14 Tue Sep 29 19:58:50 2020
+++ src/sys/arch/arm/cortex/files.cortex Tue Aug 10 15:33:09 2021
@@ -1,4 +1,4 @@
-# $NetBSD: files.cortex,v 1.14 2020/09/29 19:58:50 jmcneill Exp $
+# $NetBSD: files.cortex,v 1.15 2021/08/10 15:33:09 jmcneill Exp $
defflag opt_cpu_in_cksum.h NEON_IN_CKSUM
@@ -11,13 +11,16 @@ device armperiph: mpcorebus
attach armperiph at mainbus
file arch/arm/cortex/armperiph.c armperiph
+define gic_splfuncs
+file arch/arm/cortex/gic_splfuncs.c gic_splfuncs
+
# ARM Generic Interrupt Controller (initially on Cortex-A9)
-device armgic: pic, pic_splfuncs
+device armgic: pic, pic_splfuncs, gic_splfuncs
attach armgic at mpcorebus
file arch/arm/cortex/gic.c armgic
# ARM Generic Interrupt Controller v3+
-device gicvthree: pic, pic_splfuncs
+device gicvthree: pic, pic_splfuncs, gic_splfuncs
file arch/arm/cortex/gicv3.c gicvthree
file arch/arm/cortex/gicv3_its.c gicvthree & pci & __have_pci_msi_msix
Index: src/sys/arch/arm/cortex/gic.c
diff -u src/sys/arch/arm/cortex/gic.c:1.47 src/sys/arch/arm/cortex/gic.c:1.48
--- src/sys/arch/arm/cortex/gic.c:1.47 Sun Mar 28 09:11:38 2021
+++ src/sys/arch/arm/cortex/gic.c Tue Aug 10 15:33:09 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: gic.c,v 1.47 2021/03/28 09:11:38 skrll Exp $ */
+/* $NetBSD: gic.c,v 1.48 2021/08/10 15:33:09 jmcneill Exp $ */
/*-
* Copyright (c) 2012 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -34,7 +34,7 @@
#define _INTR_PRIVATE
#include
-__KERNEL_RCSID(0, "$NetBSD: gic.c,v 1.47 2021/03/28 09:11:38 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: gic.c,v 1.48 2021/08/10 15:33:09 jmcneill Exp $");
#include
#include
@@ -50,6 +50,7 @@ __KERNEL_RCSID(0, "$NetBSD: gic.c,v 1.47
#include
#include
+#include
#include
void armgic_irq_handler(void *);
@@ -224,11 +225,10 @@ armgic_set_priority(struct pic_softc *pi
struct armgic_softc * const sc = PICTOSOFTC(pic);
struct cpu_info * const ci = curcpu();
- const uint32_t priority = armgic_ipl_to_priority(ipl);
- if (priority > ci->ci_hwpl) {
+ if (ipl < ci->ci_hwpl) {
/* Lowering priority mask */
- ci->ci_hwpl = priority;
- gicc_write(sc, GICC_PMR, priority);
+ ci->ci_hwpl = ipl;
+ gicc_write(sc, GICC_PMR, armgic_ipl_to_priority(ipl));
}
}
@@ -327,10 +327,9 @@ armgic_irq_handler(void *tf)
ci->ci_data.cpu_nintr++;
- const uint32_t priority = armgic_ipl_to_priority(old_ipl);
- if (ci->ci_hwpl != priority) {
- ci->ci_hwpl = priority;
- gicc_write(sc, GICC_PMR, priority);
+ if (ci->ci_hwpl != old_ipl) {
+ ci->ci_hwpl = old_ipl;
+ gicc_write(sc, GICC_PMR, armgic_ipl_to_priority(old_ipl));
if (old_ipl == IPL_HIGH) {
return;
}
@@ -545,7 +544,7 @@ armgic_cpu_init(struct pic_softc *pic, s
sc->sc_enabled_local);
}
}
- ci->ci_hwpl = armgic_ipl_to_priority(ci->ci_cpl);
+ ci->ci_hwpl = ci->ci_cpl;
gicc_write(sc, GICC_PMR, armgic_ipl_to_priority(ci->ci_cpl)); // set PMR
gicc_write(sc, GICC_CTRL, GICC_CTRL_V1_Enable); // enable interrupt
ENABLE_INTERRUPT();// allow IRQ exceptions
@@ -730,6 +729,8 @@ armgic_attach(device_t parent, device_t
aprint_normal_dev(sc->sc_dev, "%u Priorities, %zu SPIs, %u PPIs, "
"%u SGIs\n", priorities, sc->sc_gic_lines - ppis - sgis, ppis,
sgis);
+
+ gic_spl_init();
}
CFATTACH_DECL_NEW(armgic, 0,
Index: src/sys/arch/arm/cortex/gicv3.c
diff -u src/sys/arch/arm/cortex/gicv3.c:1.44 src/sys/arch/arm/cortex/gicv3.c:1.45
--- src/sys/arch/arm/cortex/gicv3.c:1.44 Sun Mar 28 11:13:24 2021
+++ src/sys/arch/arm/cortex/gicv3.c Tue Aug 10 15:33:09 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: gicv3.c,v 1.44 2021/03/28 11:13:24 jmcneill Exp $ */
+/* $NetBSD: gicv3.c,v 1.45 2021/08/10 15:33:09 jmcneill Exp $ */
/*-
* Copyright (c) 2018 Jared McNeill
@@ -31,7 +31,7 @@
#define _INTR_PRIVATE
#include
-__KERNEL_RCSID(0, "$NetBSD: gicv3.c,v 1.44 2021/03/28 11:13:24 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: gicv3.c,v 1.45 2021/08/10 15:33:09 jmcneill Exp $");
#include
#include
@@ -51,6 +51,7 @@ __KERNEL_RCSID(0, "$NetBSD:
CVS commit: src/sys/arch/arm/pic
Module Name:src
Committed By: jmcneill
Date: Tue Aug 10 15:31:55 UTC 2021
Modified Files:
src/sys/arch/arm/pic: pic_splfuncs.c picvar.h
Log Message:
arm: pic: allow overriding _splraise/_spllower/splx
To generate a diff of this commit:
cvs rdiff -u -r1.20 -r1.21 src/sys/arch/arm/pic/pic_splfuncs.c
cvs rdiff -u -r1.34 -r1.35 src/sys/arch/arm/pic/picvar.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/pic/pic_splfuncs.c
diff -u src/sys/arch/arm/pic/pic_splfuncs.c:1.20 src/sys/arch/arm/pic/pic_splfuncs.c:1.21
--- src/sys/arch/arm/pic/pic_splfuncs.c:1.20 Sat Mar 27 12:15:09 2021
+++ src/sys/arch/arm/pic/pic_splfuncs.c Tue Aug 10 15:31:55 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: pic_splfuncs.c,v 1.20 2021/03/27 12:15:09 jmcneill Exp $ */
+/* $NetBSD: pic_splfuncs.c,v 1.21 2021/08/10 15:31:55 jmcneill Exp $ */
/*-
* Copyright (c) 2008 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -28,7 +28,7 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: pic_splfuncs.c,v 1.20 2021/03/27 12:15:09 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pic_splfuncs.c,v 1.21 2021/08/10 15:31:55 jmcneill Exp $");
#define _INTR_PRIVATE
#include
@@ -46,9 +46,16 @@ __KERNEL_RCSID(0, "$NetBSD: pic_splfuncs
#include
+static int pic_default_splraise(int);
+static int pic_default_spllower(int);
+static void pic_default_splx(int);
+
+int (*_splraise)(int) = pic_default_splraise;
+int (*_spllower)(int) = pic_default_spllower;
+void (*splx)(int) = pic_default_splx;
-int
-_splraise(int newipl)
+static int
+pic_default_splraise(int newipl)
{
struct cpu_info * const ci = curcpu();
const int oldipl = ci->ci_cpl;
@@ -58,8 +65,9 @@ _splraise(int newipl)
}
return oldipl;
}
-int
-_spllower(int newipl)
+
+static int
+pic_default_spllower(int newipl)
{
struct cpu_info * const ci = curcpu();
const int oldipl = ci->ci_cpl;
@@ -76,8 +84,8 @@ _spllower(int newipl)
return oldipl;
}
-void
-splx(int savedipl)
+static void
+pic_default_splx(int savedipl)
{
struct cpu_info * const ci = curcpu();
KASSERT(savedipl < NIPL);
Index: src/sys/arch/arm/pic/picvar.h
diff -u src/sys/arch/arm/pic/picvar.h:1.34 src/sys/arch/arm/pic/picvar.h:1.35
--- src/sys/arch/arm/pic/picvar.h:1.34 Sat Mar 27 12:15:09 2021
+++ src/sys/arch/arm/pic/picvar.h Tue Aug 10 15:31:55 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: picvar.h,v 1.34 2021/03/27 12:15:09 jmcneill Exp $ */
+/* $NetBSD: picvar.h,v 1.35 2021/08/10 15:31:55 jmcneill Exp $ */
/*-
* Copyright (c) 2008 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -40,9 +40,10 @@
typedef uint32_t intr_handle_t; /* for ACPI */
-int _splraise(int);
-int _spllower(int);
-void splx(int);
+extern int (*_splraise)(int);
+extern int (*_spllower)(int);
+extern void (*splx)(int);
+
const char *
intr_typename(int);
CVS commit: src/sys/arch/arm/acpi
Module Name:src
Committed By: jmcneill
Date: Tue Aug 10 15:31:38 UTC 2021
Modified Files:
src/sys/arch/arm/acpi: acpipchb.c
Log Message:
Disable MSI if the linux,pcie-nomsi flag is present
To generate a diff of this commit:
cvs rdiff -u -r1.27 -r1.28 src/sys/arch/arm/acpi/acpipchb.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/acpi/acpipchb.c
diff -u src/sys/arch/arm/acpi/acpipchb.c:1.27 src/sys/arch/arm/acpi/acpipchb.c:1.28
--- src/sys/arch/arm/acpi/acpipchb.c:1.27 Sat Aug 7 21:27:53 2021
+++ src/sys/arch/arm/acpi/acpipchb.c Tue Aug 10 15:31:38 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: acpipchb.c,v 1.27 2021/08/07 21:27:53 jmcneill Exp $ */
+/* $NetBSD: acpipchb.c,v 1.28 2021/08/10 15:31:38 jmcneill Exp $ */
/*-
* Copyright (c) 2018 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: acpipchb.c,v 1.27 2021/08/07 21:27:53 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: acpipchb.c,v 1.28 2021/08/10 15:31:38 jmcneill Exp $");
#include
#include
@@ -123,7 +123,7 @@ acpipchb_attach(device_t parent, device_
struct acpipchb_softc * const sc = device_private(self);
struct acpi_attach_args *aa = aux;
struct pcibus_attach_args pba;
- ACPI_INTEGER seg;
+ ACPI_INTEGER seg, nomsi;
ACPI_STATUS rv;
uint16_t bus_start;
@@ -148,6 +148,11 @@ acpipchb_attach(device_t parent, device_
seg = 0;
}
+ if (ACPI_FAILURE(acpi_dsd_integer(sc->sc_handle, "linux,pcie-nomsi",
+ ))) {
+ nomsi = 0;
+ }
+
aprint_naive("\n");
aprint_normal(": PCI Express Host Bridge\n");
@@ -156,6 +161,9 @@ acpipchb_attach(device_t parent, device_
memset(, 0, sizeof(pba));
pba.pba_flags = aa->aa_pciflags &
~(PCI_FLAGS_MEM_OKAY | PCI_FLAGS_IO_OKAY);
+ if (nomsi) {
+ pba.pba_flags &= ~(PCI_FLAGS_MSI_OKAY | PCI_FLAGS_MSIX_OKAY);
+ }
pba.pba_memt = 0;
pba.pba_iot = 0;
pba.pba_dmat = aa->aa_dmat;
CVS commit: src/sys/arch/arm/broadcom
Module Name:src
Committed By: jmcneill
Date: Sun Aug 8 18:55:12 UTC 2021
Modified Files:
src/sys/arch/arm/broadcom: bcm2835_com_acpi.c
Log Message:
Adjust register base and size
To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/broadcom/bcm2835_com_acpi.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/broadcom/bcm2835_com_acpi.c
diff -u src/sys/arch/arm/broadcom/bcm2835_com_acpi.c:1.1 src/sys/arch/arm/broadcom/bcm2835_com_acpi.c:1.2
--- src/sys/arch/arm/broadcom/bcm2835_com_acpi.c:1.1 Sun Aug 8 18:43:21 2021
+++ src/sys/arch/arm/broadcom/bcm2835_com_acpi.c Sun Aug 8 18:55:12 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: bcm2835_com_acpi.c,v 1.1 2021/08/08 18:43:21 jmcneill Exp $ */
+/* $NetBSD: bcm2835_com_acpi.c,v 1.2 2021/08/08 18:55:12 jmcneill Exp $ */
/*
* Copyright (c) 2021 Jared McNeill
@@ -26,7 +26,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: bcm2835_com_acpi.c,v 1.1 2021/08/08 18:43:21 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: bcm2835_com_acpi.c,v 1.2 2021/08/08 18:55:12 jmcneill Exp $");
#include
#include
@@ -100,8 +100,8 @@ bcmcom_acpi_attach(device_t parent, devi
}
iot = aa->aa_memt;
- base = mem->ar_base;
- size = mem->ar_length;
+ base = mem->ar_base + 0x40;
+ size = mem->ar_length - 0x40;
irq = acpi_res_irq(, 0);
if (irq == NULL) {
CVS commit: src/sys/arch/arm/broadcom
Module Name:src
Committed By: jmcneill
Date: Sun Aug 8 18:43:21 UTC 2021
Modified Files:
src/sys/arch/arm/broadcom: files.bcm2835
Added Files:
src/sys/arch/arm/broadcom: bcm2835_com_acpi.c
Log Message:
broadcom: ACPI: Add support for mini UART in ACPI mode.
To generate a diff of this commit:
cvs rdiff -u -r0 -r1.1 src/sys/arch/arm/broadcom/bcm2835_com_acpi.c
cvs rdiff -u -r1.41 -r1.42 src/sys/arch/arm/broadcom/files.bcm2835
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/broadcom/files.bcm2835
diff -u src/sys/arch/arm/broadcom/files.bcm2835:1.41 src/sys/arch/arm/broadcom/files.bcm2835:1.42
--- src/sys/arch/arm/broadcom/files.bcm2835:1.41 Sun Aug 8 10:32:26 2021
+++ src/sys/arch/arm/broadcom/files.bcm2835 Sun Aug 8 18:43:21 2021
@@ -1,4 +1,4 @@
-# $NetBSD: files.bcm2835,v 1.41 2021/08/08 10:32:26 jmcneill Exp $
+# $NetBSD: files.bcm2835,v 1.42 2021/08/08 18:43:21 jmcneill Exp $
#
# Configuration info for Broadcom BCM2835 ARM Peripherals
#
@@ -60,6 +60,11 @@ file arch/arm/broadcom/bcm2835_aux.c bc
attach com at fdt with bcmcom
file arch/arm/broadcom/bcm2835_com.c bcmcom
+ifdef acpinodebus
+attach com at acpinodebus with bcmcom_acpi
+file arch/arm/broadcom/bcm2835_com_acpi.c bcmcom_acpi
+endif
+
# External Mass Media Controller (BCM2835_EMMC_BASE)
attach sdhc at fdt with bcmemmc
file arch/arm/broadcom/bcm2835_emmc.c bcmemmc
Added files:
Index: src/sys/arch/arm/broadcom/bcm2835_com_acpi.c
diff -u /dev/null src/sys/arch/arm/broadcom/bcm2835_com_acpi.c:1.1
--- /dev/null Sun Aug 8 18:43:21 2021
+++ src/sys/arch/arm/broadcom/bcm2835_com_acpi.c Sun Aug 8 18:43:21 2021
@@ -0,0 +1,168 @@
+/* $NetBSD: bcm2835_com_acpi.c,v 1.1 2021/08/08 18:43:21 jmcneill Exp $ */
+
+/*
+ * Copyright (c) 2021 Jared McNeill
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. The name of the author may not be used to endorse or promote products
+ *derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include
+__KERNEL_RCSID(0, "$NetBSD: bcm2835_com_acpi.c,v 1.1 2021/08/08 18:43:21 jmcneill Exp $");
+
+#include
+#include
+#include
+#include
+
+#include
+#include
+
+#include
+
+#include
+#include
+#include
+
+static int bcmcom_acpi_match(device_t, cfdata_t , void *);
+static void bcmcom_acpi_attach(device_t, device_t, void *);
+
+static u_int bcmcom_acpi_get_clockrate(device_t);
+
+struct vcmbox_clockrate_request {
+ struct vcprop_buffer_hdr vb_hdr;
+ struct vcprop_tag_clockrate vbt_clockrate;
+ struct vcprop_tag end;
+} __packed;
+
+CFATTACH_DECL_NEW(bcmcom_acpi, sizeof(struct com_softc), bcmcom_acpi_match,
+bcmcom_acpi_attach, NULL, NULL);
+
+static const struct device_compatible_entry compat_data[] = {
+ { .compat = "BCM2836", .value = COM_TYPE_BCMAUXUART },
+ DEVICE_COMPAT_EOL
+};
+
+static int
+bcmcom_acpi_match(device_t parent, cfdata_t match, void *aux)
+{
+ struct acpi_attach_args *aa = aux;
+
+ return acpi_compatible_match(aa, compat_data);
+}
+
+static void
+bcmcom_acpi_attach(device_t parent, device_t self, void *aux)
+{
+ struct com_softc *sc = device_private(self);
+ struct acpi_attach_args *aa = aux;
+ const struct device_compatible_entry *dce;
+ struct acpi_resources res;
+ struct acpi_mem *mem;
+ struct acpi_irq *irq;
+ bus_space_tag_t iot;
+ bus_space_handle_t ioh;
+ bus_addr_t base;
+ bus_size_t size;
+ ACPI_STATUS rv;
+ void *ih;
+
+ sc->sc_dev = self;
+
+ rv = acpi_resource_parse(sc->sc_dev, aa->aa_node->ad_handle, "_CRS",
+ , _resource_parse_ops_default);
+ if (ACPI_FAILURE(rv)) {
+ return;
+ }
+
+ mem = acpi_res_mem(, 0);
+ if (mem == NULL) {
+ aprint_error_dev(self, "couldn't find mem resource\n");
+ goto cleanup;
+ }
+
+ iot = aa->aa_memt;
+ base = mem->ar_base;
+ size = mem->ar_length;
+
+ irq = acpi_res_irq(, 0);
+ if (irq == NULL) {
+ aprint_error_dev(self, "couldn't find irq resource\n");
+
CVS commit: src/sys/arch/arm/arm
Module Name:src
Committed By: jmcneill
Date: Sun Aug 8 13:43:09 UTC 2021
Modified Files:
src/sys/arch/arm/arm: smccc.c
Log Message:
fix armv7 build
To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/arm/arm/smccc.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/arm/smccc.c
diff -u src/sys/arch/arm/arm/smccc.c:1.2 src/sys/arch/arm/arm/smccc.c:1.3
--- src/sys/arch/arm/arm/smccc.c:1.2 Sat Aug 7 21:21:49 2021
+++ src/sys/arch/arm/arm/smccc.c Sun Aug 8 13:43:09 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: smccc.c,v 1.2 2021/08/07 21:21:49 jmcneill Exp $ */
+/* $NetBSD: smccc.c,v 1.3 2021/08/08 13:43:09 jmcneill Exp $ */
/*-
* Copyright (c) 2021 Jared McNeill
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: smccc.c,v 1.2 2021/08/07 21:21:49 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: smccc.c,v 1.3 2021/08/08 13:43:09 jmcneill Exp $");
#include
#include
@@ -35,6 +35,12 @@ __KERNEL_RCSID(0, "$NetBSD: smccc.c,v 1.
#include
#include
+#if defined(__arm__)
+#define SMCCC_ARCH_ATTRIBUTE __attribute__ ((target("arch=armv7ve")))
+#else
+#define SMCCC_ARCH_ATTRIBUTE
+#endif
+
/* Minimum supported PSCI version for SMCCC discovery */
#define PSCI_VERSION_1_0 0x1
@@ -89,7 +95,7 @@ smccc_version(void)
*
* Generic call interface for SMC/HVC calls.
*/
-int
+SMCCC_ARCH_ATTRIBUTE int
smccc_call(uint32_t fid,
register_t arg1, register_t arg2, register_t arg3, register_t arg4,
register_t *res0, register_t *res1, register_t *res2, register_t *res3)
CVS commit: src/sys/arch/arm/acpi
Module Name:src Committed By: jmcneill Date: Sun Aug 8 12:09:52 UTC 2021 Modified Files: src/sys/arch/arm/acpi: acpi_pci_machdep.c Log Message: Install the shared PCI INTx interrupt handler at IPL_VM to workaround a possible interrupt storm at boot. Need to revisit this. To generate a diff of this commit: cvs rdiff -u -r1.19 -r1.20 src/sys/arch/arm/acpi/acpi_pci_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/acpi/acpi_pci_machdep.c diff -u src/sys/arch/arm/acpi/acpi_pci_machdep.c:1.19 src/sys/arch/arm/acpi/acpi_pci_machdep.c:1.20 --- src/sys/arch/arm/acpi/acpi_pci_machdep.c:1.19 Sat Aug 7 21:27:53 2021 +++ src/sys/arch/arm/acpi/acpi_pci_machdep.c Sun Aug 8 12:09:52 2021 @@ -1,4 +1,4 @@ -/* $NetBSD: acpi_pci_machdep.c,v 1.19 2021/08/07 21:27:53 jmcneill Exp $ */ +/* $NetBSD: acpi_pci_machdep.c,v 1.20 2021/08/08 12:09:52 jmcneill Exp $ */ /*- * Copyright (c) 2018, 2020 The NetBSD Foundation, Inc. @@ -34,7 +34,7 @@ #define _INTR_PRIVATE #include -__KERNEL_RCSID(0, "$NetBSD: acpi_pci_machdep.c,v 1.19 2021/08/07 21:27:53 jmcneill Exp $"); +__KERNEL_RCSID(0, "$NetBSD: acpi_pci_machdep.c,v 1.20 2021/08/08 12:09:52 jmcneill Exp $"); #include #include @@ -536,7 +536,7 @@ acpi_pci_md_intr_establish(void *v, pci_ pi->pi_pic.pic_ops = _pci_pic_ops; pi->pi_irqbase = pic_add(>pi_pic, PIC_IRQBASE_ALLOC); TAILQ_INSERT_TAIL(_pci_intrs, pi, pi_list); - pi->pi_ih = intr_establish_xname(irq, IPL_SCHED, IST_LEVEL | IST_MPSAFE, + pi->pi_ih = intr_establish_xname(irq, IPL_VM, IST_LEVEL | IST_MPSAFE, pic_handle_intr, >pi_pic, device_xname(ap->ap_dev)); } if (pi->pi_ih == NULL)
CVS commit: src/sys/arch/arm/broadcom
Module Name:src Committed By: jmcneill Date: Sun Aug 8 10:59:27 UTC 2021 Modified Files: src/sys/arch/arm/broadcom: bcm2838_emmc2_acpi.c Log Message: disable DMA for now... To generate a diff of this commit: cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/broadcom/bcm2838_emmc2_acpi.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/broadcom/bcm2838_emmc2_acpi.c diff -u src/sys/arch/arm/broadcom/bcm2838_emmc2_acpi.c:1.1 src/sys/arch/arm/broadcom/bcm2838_emmc2_acpi.c:1.2 --- src/sys/arch/arm/broadcom/bcm2838_emmc2_acpi.c:1.1 Sun Aug 8 10:32:26 2021 +++ src/sys/arch/arm/broadcom/bcm2838_emmc2_acpi.c Sun Aug 8 10:59:27 2021 @@ -1,4 +1,4 @@ -/* $NetBSD: bcm2838_emmc2_acpi.c,v 1.1 2021/08/08 10:32:26 jmcneill Exp $ */ +/* $NetBSD: bcm2838_emmc2_acpi.c,v 1.2 2021/08/08 10:59:27 jmcneill Exp $ */ /* * Copyright (c) 2021 Jared McNeill @@ -26,7 +26,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: bcm2838_emmc2_acpi.c,v 1.1 2021/08/08 10:32:26 jmcneill Exp $"); +__KERNEL_RCSID(0, "$NetBSD: bcm2838_emmc2_acpi.c,v 1.2 2021/08/08 10:59:27 jmcneill Exp $"); #include #include @@ -119,8 +119,10 @@ bcmemmc2_acpi_attach(device_t parent, de * disable UHS modes. */ sc->sc.sc_flags = SDHC_FLAG_32BIT_ACCESS | +#if notyet SDHC_FLAG_USE_DMA | SDHC_FLAG_USE_ADMA2 | +#endif SDHC_FLAG_NO_1_8_V; sc->sc_ih = acpi_intr_establish(self,
CVS commit: src/sys/arch/arm/broadcom
Module Name:src
Committed By: jmcneill
Date: Sun Aug 8 10:32:27 UTC 2021
Modified Files:
src/sys/arch/arm/broadcom: files.bcm2835
Added Files:
src/sys/arch/arm/broadcom: bcm2838_emmc2_acpi.c
Log Message:
bcm2838: Add ACPI support for the EMMC2 SDHCI controller.
To generate a diff of this commit:
cvs rdiff -u -r0 -r1.1 src/sys/arch/arm/broadcom/bcm2838_emmc2_acpi.c
cvs rdiff -u -r1.40 -r1.41 src/sys/arch/arm/broadcom/files.bcm2835
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/broadcom/files.bcm2835
diff -u src/sys/arch/arm/broadcom/files.bcm2835:1.40 src/sys/arch/arm/broadcom/files.bcm2835:1.41
--- src/sys/arch/arm/broadcom/files.bcm2835:1.40 Wed Mar 10 11:03:48 2021
+++ src/sys/arch/arm/broadcom/files.bcm2835 Sun Aug 8 10:32:26 2021
@@ -1,4 +1,4 @@
-# $NetBSD: files.bcm2835,v 1.40 2021/03/10 11:03:48 mlelstv Exp $
+# $NetBSD: files.bcm2835,v 1.41 2021/08/08 10:32:26 jmcneill Exp $
#
# Configuration info for Broadcom BCM2835 ARM Peripherals
#
@@ -67,6 +67,8 @@ file arch/arm/broadcom/bcm2835_emmc.c bc
ifdef acpinodebus
attach sdhc at acpinodebus with bcmemmc_acpi
file arch/arm/broadcom/bcm2835_emmc_acpi.c bcmemmc_acpi
+attach sdhc at acpinodebus with bcmemmc2_acpi
+file arch/arm/broadcom/bcm2838_emmc2_acpi.c bcmemmc2_acpi
endif
# SD Host Controller (BCM2835_SDHOST_BASE)
Added files:
Index: src/sys/arch/arm/broadcom/bcm2838_emmc2_acpi.c
diff -u /dev/null src/sys/arch/arm/broadcom/bcm2838_emmc2_acpi.c:1.1
--- /dev/null Sun Aug 8 10:32:27 2021
+++ src/sys/arch/arm/broadcom/bcm2838_emmc2_acpi.c Sun Aug 8 10:32:26 2021
@@ -0,0 +1,164 @@
+/* $NetBSD: bcm2838_emmc2_acpi.c,v 1.1 2021/08/08 10:32:26 jmcneill Exp $ */
+
+/*
+ * Copyright (c) 2021 Jared McNeill
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. The name of the author may not be used to endorse or promote products
+ *derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include
+__KERNEL_RCSID(0, "$NetBSD: bcm2838_emmc2_acpi.c,v 1.1 2021/08/08 10:32:26 jmcneill Exp $");
+
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+
+#include
+#include
+#include
+
+#define _COMPONENT ACPI_RESOURCE_COMPONENT
+ACPI_MODULE_NAME ("bcmemmc2_acpi")
+
+static int bcmemmc2_acpi_match(device_t, cfdata_t, void *);
+static void bcmemmc2_acpi_attach(device_t, device_t, void *);
+static void bcmemmc2_acpi_attach1(device_t);
+
+static const char * const compatible[] = {
+ "BRCME88C",
+ NULL
+};
+
+struct bcmemmc2_acpi_softc {
+ struct sdhc_softc sc;
+ bus_space_tag_t sc_memt;
+ bus_space_handle_t sc_memh;
+ bus_size_t sc_memsize;
+ void *sc_ih;
+ struct sdhc_host *sc_hosts[1];
+};
+
+CFATTACH_DECL_NEW(bcmemmc2_acpi, sizeof(struct bcmemmc2_acpi_softc),
+bcmemmc2_acpi_match, bcmemmc2_acpi_attach, NULL, NULL);
+
+static int
+bcmemmc2_acpi_match(device_t parent, cfdata_t match, void *opaque)
+{
+ struct acpi_attach_args *aa = opaque;
+
+ if (aa->aa_node->ad_type != ACPI_TYPE_DEVICE)
+ return 0;
+
+ return acpi_match_hid(aa->aa_node->ad_devinfo, compatible);
+}
+
+static void
+bcmemmc2_acpi_attach(device_t parent, device_t self, void *opaque)
+{
+ struct bcmemmc2_acpi_softc *sc = device_private(self);
+ struct acpi_attach_args *aa = opaque;
+ struct acpi_resources res;
+ struct acpi_mem *mem;
+ struct acpi_irq *irq;
+ ACPI_STATUS rv;
+
+ sc->sc.sc_dev = self;
+ sc->sc.sc_dmat = aa->aa_dmat;
+ sc->sc.sc_host = sc->sc_hosts;
+ sc->sc_memt = aa->aa_memt;
+
+ rv = acpi_resource_parse(self, aa->aa_node->ad_handle, "_CRS",
+ , _resource_parse_ops_default);
+ if (ACPI_FAILURE(rv))
+ return;
+
+ mem = acpi_res_mem(, 0);
+ irq = acpi_res_irq(, 0);
+ if (mem == NULL || irq == NULL) {
+ aprint_error_dev(self, "incomplete resources\n");
+ goto cleanup;
+ }
+ if (mem->ar_length == 0) {
+ aprint_error_dev(self, "zero length memory resource\n");
+ goto
CVS commit: src/sys/arch/arm/acpi
Module Name:src
Committed By: jmcneill
Date: Sun Aug 8 10:28:26 UTC 2021
Modified Files:
src/sys/arch/arm/acpi: acpi_machdep.c
Log Message:
arm: ACPI: Add support for simple sharing of platform interrupts
Allow sharing of platform interrupts provided that the type, ipl, and
mpsafe-ness are the same.
To generate a diff of this commit:
cvs rdiff -u -r1.24 -r1.25 src/sys/arch/arm/acpi/acpi_machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/acpi/acpi_machdep.c
diff -u src/sys/arch/arm/acpi/acpi_machdep.c:1.24 src/sys/arch/arm/acpi/acpi_machdep.c:1.25
--- src/sys/arch/arm/acpi/acpi_machdep.c:1.24 Sat Aug 7 18:40:45 2021
+++ src/sys/arch/arm/acpi/acpi_machdep.c Sun Aug 8 10:28:26 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: acpi_machdep.c,v 1.24 2021/08/07 18:40:45 jmcneill Exp $ */
+/* $NetBSD: acpi_machdep.c,v 1.25 2021/08/08 10:28:26 jmcneill Exp $ */
/*-
* Copyright (c) 2018 The NetBSD Foundation, Inc.
@@ -32,7 +32,7 @@
#include "pci.h"
#include
-__KERNEL_RCSID(0, "$NetBSD: acpi_machdep.c,v 1.24 2021/08/07 18:40:45 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: acpi_machdep.c,v 1.25 2021/08/08 10:28:26 jmcneill Exp $");
#include
#include
@@ -63,6 +63,27 @@ extern struct bus_space arm_generic_bs_t
extern struct arm32_bus_dma_tag acpi_coherent_dma_tag;
extern struct arm32_bus_dma_tag arm_generic_dma_tag;
+struct acpi_intrhandler {
+ int(*ah_fn)(void *);
+ void*ah_arg;
+ TAILQ_ENTRY(acpi_intrhandler) ah_list;
+};
+
+struct acpi_intrvec {
+ intai_irq;
+ intai_ipl;
+ intai_type;
+ boolai_mpsafe;
+ intai_refcnt;
+ void*ai_arg;
+ void*ai_ih;
+ TAILQ_HEAD(, acpi_intrhandler) ai_handlers;
+ TAILQ_ENTRY(acpi_intrvec) ai_list;
+};
+
+static TAILQ_HEAD(, acpi_intrvec) acpi_intrvecs =
+TAILQ_HEAD_INITIALIZER(acpi_intrvecs);
+
bus_dma_tag_t arm_acpi_dma32_tag(struct acpi_softc *, struct acpi_devnode *);
bus_dma_tag_t arm_acpi_dma64_tag(struct acpi_softc *, struct acpi_devnode *);
@@ -256,28 +277,128 @@ acpi_md_OsDisableInterrupt(void)
cpsid(I32_bit);
}
+static struct acpi_intrvec *
+acpi_md_intr_lookup(int irq)
+{
+ struct acpi_intrvec *ai;
+
+ TAILQ_FOREACH(ai, _intrvecs, ai_list) {
+ if (ai->ai_irq == irq) {
+ return ai;
+ }
+ }
+
+ return NULL;
+}
+
+static int
+acpi_md_intr(void *arg)
+{
+ struct acpi_intrvec *ai = arg;
+ struct acpi_intrhandler *ah;
+ int rv = 0;
+
+ TAILQ_FOREACH(ah, >ai_handlers, ah_list) {
+ rv += ah->ah_fn(ah->ah_arg);
+ }
+
+ return rv;
+}
+
void *
acpi_md_intr_establish(uint32_t irq, int ipl, int type, int (*handler)(void *), void *arg, bool mpsafe, const char *xname)
{
- return intr_establish_xname(irq, ipl, type | (mpsafe ? IST_MPSAFE : 0), handler, arg, xname);
+ struct acpi_intrvec *ai;
+ struct acpi_intrhandler *ah;
+
+ ai = acpi_md_intr_lookup(irq);
+ if (ai == NULL) {
+ ai = kmem_zalloc(sizeof(*ai), KM_SLEEP);
+ ai->ai_refcnt = 0;
+ ai->ai_irq = irq;
+ ai->ai_ipl = ipl;
+ ai->ai_type = type;
+ ai->ai_mpsafe = mpsafe;
+ ai->ai_arg = arg;
+ TAILQ_INIT(>ai_handlers);
+ if (arg == NULL) {
+ ai->ai_ih = intr_establish_xname(irq, ipl,
+ type | (mpsafe ? IST_MPSAFE : 0), handler, NULL,
+ xname);
+ } else {
+ ai->ai_ih = intr_establish_xname(irq, ipl,
+ type | (mpsafe ? IST_MPSAFE : 0), acpi_md_intr, ai,
+ xname);
+ }
+ if (ai->ai_ih == NULL) {
+ kmem_free(ai, sizeof(*ai));
+ return NULL;
+ }
+ TAILQ_INSERT_TAIL(_intrvecs, ai, ai_list);
+ } else {
+ if (ai->ai_arg == NULL) {
+ printf("ACPI: cannot share irq with NULL arg\n");
+ return NULL;
+ }
+ if (ai->ai_ipl != ipl) {
+ printf("ACPI: cannot share irq with different ipl\n");
+ return NULL;
+ }
+ if (ai->ai_type != type) {
+ printf("ACPI: cannot share edge and level interrupts\n");
+ return NULL;
+ }
+ if (ai->ai_mpsafe != mpsafe) {
+ printf("ACPI: cannot share between mpsafe/non-mpsafe\n");
+ return NULL;
+ }
+ }
+
+ ai->ai_refcnt++;
+
+ ah = kmem_zalloc(sizeof(*ah), KM_SLEEP);
+ ah->ah_fn = handler;
+ ah->ah_arg = arg;
+ TAILQ_INSERT_TAIL(>ai_handlers, ah, ah_list);
+
+ return ai->ai_ih;
}
void
-acpi_md_intr_mask(void *ih)
+acpi_md_intr_disestablish(void *ih)
{
- intr_mask(ih);
+ struct acpi_intrvec *ai;
+ struct acpi_intrhandler *ah;
+
+ TAILQ_FOREACH(ai, _intrvecs, ai_list) {
+ if (ai->ai_ih == ih) {
+ KASSERT(ai->ai_refcnt > 0);
+ if (ai->ai_refcnt > 1) {
+panic("%s: cannot disestablish shared irq", __func__);
+ }
+
+ TAILQ_REMOVE(_intrvecs, ai, ai_list);
+ ah = TAILQ_FIRST(>ai_handlers);
+ kmem_free(ah, sizeof(*ah));
+ intr_disestablish(ai->ai_ih);
+ kmem_free(ai, sizeof(*ai));
+ return;
+ }
+ }
+
+ panic("%s: interrupt not established", __func__);
}
void
-acpi_md_intr_unmask(void *ih)
+acpi_md_intr_mask(void *ih)
{
- intr_unmask(ih);
+ intr_mask(ih);
}
void
-acpi_md_intr_disestablish(void *ih)
+acpi_md_intr_unmask(void *ih)
CVS commit: src/sys/arch/arm/acpi
Module Name:src
Committed By: jmcneill
Date: Sat Aug 7 21:27:53 UTC 2021
Modified Files:
src/sys/arch/arm/acpi: acpi_pci_machdep.c acpi_pci_machdep.h acpipchb.c
files.acpi
Added Files:
src/sys/arch/arm/acpi: acpi_pci_smccc.c
Log Message:
arm: acpi: Add support for SMCCC based PCI config access.
To generate a diff of this commit:
cvs rdiff -u -r1.18 -r1.19 src/sys/arch/arm/acpi/acpi_pci_machdep.c
cvs rdiff -u -r1.7 -r1.8 src/sys/arch/arm/acpi/acpi_pci_machdep.h
cvs rdiff -u -r0 -r1.1 src/sys/arch/arm/acpi/acpi_pci_smccc.c
cvs rdiff -u -r1.26 -r1.27 src/sys/arch/arm/acpi/acpipchb.c
cvs rdiff -u -r1.12 -r1.13 src/sys/arch/arm/acpi/files.acpi
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/acpi/acpi_pci_machdep.c
diff -u src/sys/arch/arm/acpi/acpi_pci_machdep.c:1.18 src/sys/arch/arm/acpi/acpi_pci_machdep.c:1.19
--- src/sys/arch/arm/acpi/acpi_pci_machdep.c:1.18 Wed Jun 17 06:45:09 2020
+++ src/sys/arch/arm/acpi/acpi_pci_machdep.c Sat Aug 7 21:27:53 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: acpi_pci_machdep.c,v 1.18 2020/06/17 06:45:09 thorpej Exp $ */
+/* $NetBSD: acpi_pci_machdep.c,v 1.19 2021/08/07 21:27:53 jmcneill Exp $ */
/*-
* Copyright (c) 2018, 2020 The NetBSD Foundation, Inc.
@@ -29,10 +29,12 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
+#include "opt_pci.h"
+
#define _INTR_PRIVATE
#include
-__KERNEL_RCSID(0, "$NetBSD: acpi_pci_machdep.c,v 1.18 2020/06/17 06:45:09 thorpej Exp $");
+__KERNEL_RCSID(0, "$NetBSD: acpi_pci_machdep.c,v 1.19 2021/08/07 21:27:53 jmcneill Exp $");
#include
#include
@@ -60,6 +62,10 @@ __KERNEL_RCSID(0, "$NetBSD: acpi_pci_mac
#include
#include
+#ifdef PCI_SMCCC
+#include
+#endif
+
#include
struct acpi_pci_prt {
@@ -94,7 +100,7 @@ struct acpi_pci_intr {
static TAILQ_HEAD(, acpi_pci_intr) acpi_pci_intrs =
TAILQ_HEAD_INITIALIZER(acpi_pci_intrs);
-static const struct acpi_pci_quirk acpi_pci_quirks[] = {
+static const struct acpi_pci_quirk acpi_pci_mcfg_quirks[] = {
/* OEM ID OEM Table ID Revision Seg Func */
{ "AMAZON", "GRAVITON", 0, -1, acpi_pci_graviton_init },
{ "ARMLTD", "ARMN1SDP", 0x20181101, 0, acpi_pci_n1sdp_init },
@@ -102,6 +108,13 @@ static const struct acpi_pci_quirk acpi_
{ "NXP ", "LX2160 ", 0, -1, acpi_pci_layerscape_gen4_init },
};
+#ifdef PCI_SMCCC
+static const struct acpi_pci_quirk acpi_pci_smccc_quirk = {
+ .q_segment = -1,
+ .q_init = acpi_pci_smccc_init,
+};
+#endif
+
pci_chipset_tag_t acpi_pci_md_get_chipset_tag(struct acpi_softc *, int, int);
static void acpi_pci_md_attach_hook(device_t, device_t,
@@ -554,11 +567,19 @@ acpi_pci_md_find_quirk(int seg)
u_int n;
rv = AcpiGetTable(ACPI_SIG_MCFG, 0, (ACPI_TABLE_HEADER **));
- if (ACPI_FAILURE(rv))
+ if (ACPI_FAILURE(rv)) {
+#ifdef PCI_SMCCC
+ uint32_t ver = pci_smccc_version();
+ aprint_debug("%s: SMCCC version %#x\n", __func__, ver);
+ if (PCI_SMCCC_SUCCESS(ver)) {
+ return _pci_smccc_quirk;
+ }
+#endif
return NULL;
+ }
- for (n = 0; n < __arraycount(acpi_pci_quirks); n++) {
- const struct acpi_pci_quirk *q = _pci_quirks[n];
+ for (n = 0; n < __arraycount(acpi_pci_mcfg_quirks); n++) {
+ const struct acpi_pci_quirk *q = _pci_mcfg_quirks[n];
if (memcmp(q->q_oemid, mcfg->Header.OemId, ACPI_OEM_ID_SIZE) == 0 &&
memcmp(q->q_oemtableid, mcfg->Header.OemTableId, ACPI_OEM_TABLE_ID_SIZE) == 0 &&
q->q_oemrevision == mcfg->Header.OemRevision &&
@@ -589,6 +610,7 @@ acpi_pci_md_get_chipset_tag(struct acpi_
pct->pct_ap.ap_pc.pc_intr_v = >pct_ap;
pct->pct_ap.ap_seg = seg;
pct->pct_ap.ap_bus = bbn;
+ pct->pct_ap.ap_maxbus = -1;
pct->pct_ap.ap_bst = acpi_softc->sc_memt;
q = acpi_pci_md_find_quirk(seg);
Index: src/sys/arch/arm/acpi/acpi_pci_machdep.h
diff -u src/sys/arch/arm/acpi/acpi_pci_machdep.h:1.7 src/sys/arch/arm/acpi/acpi_pci_machdep.h:1.8
--- src/sys/arch/arm/acpi/acpi_pci_machdep.h:1.7 Sat Feb 1 13:26:43 2020
+++ src/sys/arch/arm/acpi/acpi_pci_machdep.h Sat Aug 7 21:27:53 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: acpi_pci_machdep.h,v 1.7 2020/02/01 13:26:43 jmcneill Exp $ */
+/* $NetBSD: acpi_pci_machdep.h,v 1.8 2021/08/07 21:27:53 jmcneill Exp $ */
/*-
* Copyright (c) 2018 The NetBSD Foundation, Inc.
@@ -39,12 +39,15 @@ struct acpi_pci_context {
device_t ap_dev;
u_int ap_seg;
int ap_bus;
+ int ap_maxbus;
bus_space_tag_t ap_bst;
bus_space_handle_t ap_conf_bsh;
int (*ap_conf_read)(pci_chipset_tag_t, pcitag_t, int, pcireg_t *);
int (*ap_conf_write)(pci_chipset_tag_t, pcitag_t, int, pcireg_t);
void *ap_conf_priv;
int ap_pciflags_clear;
+ u_int ap_flags;
+#define ACPI_PCI_FLAG_NO_MCFG __BIT(0) /* ignore MCFG table */
};
struct acpi_pci_quirk {
@@ -57,6 +60,7 @@ struct acpi_pci_quirk {
const struct acpi_pci_quirk * acpi_pci_md_find_quirk(int);
+void acpi_pci_smccc_init(struct acpi_pci_context *);
void
CVS commit: src/sys/arch/arm/acpi
Module Name:src
Committed By: jmcneill
Date: Sat Aug 7 21:24:56 UTC 2021
Modified Files:
src/sys/arch/arm/acpi: acpi_platform.c
Log Message:
acpi: call smccc_probe() after PSCI init
To generate a diff of this commit:
cvs rdiff -u -r1.27 -r1.28 src/sys/arch/arm/acpi/acpi_platform.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/acpi/acpi_platform.c
diff -u src/sys/arch/arm/acpi/acpi_platform.c:1.27 src/sys/arch/arm/acpi/acpi_platform.c:1.28
--- src/sys/arch/arm/acpi/acpi_platform.c:1.27 Fri Aug 6 19:38:53 2021
+++ src/sys/arch/arm/acpi/acpi_platform.c Sat Aug 7 21:24:56 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: acpi_platform.c,v 1.27 2021/08/06 19:38:53 jmcneill Exp $ */
+/* $NetBSD: acpi_platform.c,v 1.28 2021/08/07 21:24:56 jmcneill Exp $ */
/*-
* Copyright (c) 2018 The NetBSD Foundation, Inc.
@@ -35,7 +35,7 @@
#include "opt_multiprocessor.h"
#include
-__KERNEL_RCSID(0, "$NetBSD: acpi_platform.c,v 1.27 2021/08/06 19:38:53 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: acpi_platform.c,v 1.28 2021/08/07 21:24:56 jmcneill Exp $");
#include
#include
@@ -253,6 +253,7 @@ acpi_platform_startup(void)
} else {
psci_init(psci_call_smc);
}
+ smccc_probe();
}
acpi_table_unmap((ACPI_TABLE_HEADER *)fadt);
}
CVS commit: src/sys/arch/arm/pci
Module Name:src
Committed By: jmcneill
Date: Sat Aug 7 21:23:37 UTC 2021
Modified Files:
src/sys/arch/arm/pci: files.pci
Added Files:
src/sys/arch/arm/pci: pci_smccc.c pci_smccc.h
Log Message:
arm: PCI: Add support for Arm PCI Config Space Access Firmware Interface
This adds basic support for the PCI Config Access interface defined in
Arm DEN0115.
To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/pci/files.pci
cvs rdiff -u -r0 -r1.1 src/sys/arch/arm/pci/pci_smccc.c \
src/sys/arch/arm/pci/pci_smccc.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/pci/files.pci
diff -u src/sys/arch/arm/pci/files.pci:1.1 src/sys/arch/arm/pci/files.pci:1.2
--- src/sys/arch/arm/pci/files.pci:1.1 Sun Oct 21 00:42:06 2018
+++ src/sys/arch/arm/pci/files.pci Sat Aug 7 21:23:37 2021
@@ -1,4 +1,8 @@
-# $NetBSD: files.pci,v 1.1 2018/10/21 00:42:06 jmcneill Exp $
+# $NetBSD: files.pci,v 1.2 2021/08/07 21:23:37 jmcneill Exp $
# PCI MSI/MSI-X support
file arch/arm/pci/pci_msi_machdep.c pci & __have_pci_msi_msix
+
+# Arm PCI Configuration Space Access Firmware Interface (DEN0115)
+defflag opt_pci.h PCI_SMCCC
+file arch/arm/pci/pci_smccc.c pci_smccc
Added files:
Index: src/sys/arch/arm/pci/pci_smccc.c
diff -u /dev/null src/sys/arch/arm/pci/pci_smccc.c:1.1
--- /dev/null Sat Aug 7 21:23:37 2021
+++ src/sys/arch/arm/pci/pci_smccc.c Sat Aug 7 21:23:37 2021
@@ -0,0 +1,122 @@
+/* $NetBSD: pci_smccc.c,v 1.1 2021/08/07 21:23:37 jmcneill Exp $ */
+
+/*-
+ * Copyright (c) 2021 Jared McNeill
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include
+__KERNEL_RCSID(0, "$NetBSD: pci_smccc.c,v 1.1 2021/08/07 21:23:37 jmcneill Exp $");
+
+#include
+#include
+
+#include
+#include
+
+/* Minimum SMCCC version required for PCI_VERSION call. */
+#define SMCCC_VERSION_1_1 0x10001
+
+/* PCI Configuration Space Access ABI functions */
+#define PCI_VERSION 0x84000130
+#define PCI_FEATURES 0x84000131
+#define PCI_READ 0x84000132
+#define PCI_WRITE 0x84000133
+#define PCI_GET_SEG_INFO 0x84000134
+#define GET_SEG_INFO_BUS_START __BITS(7,0)
+#define GET_SEG_INFO_BUS_END __BITS(15,8)
+
+static int
+pci_smccc_call(uint32_t fid,
+register_t arg1, register_t arg2, register_t arg3, register_t arg4,
+register_t *res0, register_t *res1, register_t *res2, register_t *res3)
+{
+ static int smccc_ver;
+
+ if (smccc_ver == 0) {
+ smccc_ver = smccc_version();
+ }
+ if (smccc_ver < SMCCC_VERSION_1_1) {
+ return SMCCC_NOT_SUPPORTED;
+ }
+
+ return smccc_call(fid, arg1, arg2, arg3, arg4,
+ res0, res1, res2, res3);
+}
+
+int
+pci_smccc_version(void)
+{
+ return pci_smccc_call(PCI_VERSION, 0, 0, 0, 0,
+ NULL, NULL, NULL, NULL);
+}
+
+int
+pci_smccc_features(uint32_t fid)
+{
+ return pci_smccc_call(PCI_FEATURES, fid, 0, 0, 0,
+ NULL, NULL, NULL, NULL);
+}
+
+int
+pci_smccc_read(uint32_t sbdf, uint32_t offset, uint32_t access_size,
+uint32_t *data)
+{
+ register_t value;
+ int status;
+
+ status = pci_smccc_call(PCI_READ, sbdf, offset, access_size, 0,
+NULL, , NULL, NULL);
+ if (status == SMCCC_SUCCESS) {
+ *data = value;
+ }
+
+ return status;
+}
+
+int
+pci_smccc_write(uint32_t sbdf, uint32_t offset, uint32_t access_size,
+uint32_t data)
+{
+ return pci_smccc_call(PCI_WRITE, sbdf, offset, access_size, data,
+ NULL, NULL, NULL, NULL);
+}
+
+int
+pci_smccc_get_seg_info(uint16_t seg, uint8_t *bus_start, uint8_t *bus_end,
+uint16_t *next_seg)
+{
+ register_t res1, res2;
+ int status;
+
+ status = pci_smccc_call(PCI_GET_SEG_INFO, seg, 0, 0, 0,
+NULL, , , NULL);
+ if (status == SMCCC_SUCCESS) {
+
CVS commit: src/sys/arch/arm/arm
Module Name:src
Committed By: jmcneill
Date: Sat Aug 7 21:21:49 UTC 2021
Modified Files:
src/sys/arch/arm/arm: smccc.c smccc.h
Log Message:
arm: SMCCC: Add return values to smccc_call
To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/arm/smccc.c \
src/sys/arch/arm/arm/smccc.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/arm/smccc.c
diff -u src/sys/arch/arm/arm/smccc.c:1.1 src/sys/arch/arm/arm/smccc.c:1.2
--- src/sys/arch/arm/arm/smccc.c:1.1 Fri Aug 6 19:38:53 2021
+++ src/sys/arch/arm/arm/smccc.c Sat Aug 7 21:21:49 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: smccc.c,v 1.1 2021/08/06 19:38:53 jmcneill Exp $ */
+/* $NetBSD: smccc.c,v 1.2 2021/08/07 21:21:49 jmcneill Exp $ */
/*-
* Copyright (c) 2021 Jared McNeill
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: smccc.c,v 1.1 2021/08/06 19:38:53 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: smccc.c,v 1.2 2021/08/07 21:21:49 jmcneill Exp $");
#include
#include
@@ -42,7 +42,10 @@ __KERNEL_RCSID(0, "$NetBSD: smccc.c,v 1.
#define SMCCC_VERSION 0x8000
/* True if SMCCC is detected. */
-static bool smccc_present;
+static bool smccc_present;
+
+/* SMCCC conduit (SMC or HVC) */
+static enum psci_conduit smccc_conduit = PSCI_CONDUIT_NONE;
/*
* smccc_probe --
@@ -58,6 +61,13 @@ smccc_probe(void)
}
smccc_present = psci_features(SMCCC_VERSION) == PSCI_SUCCESS;
+ if (smccc_present) {
+ smccc_conduit = psci_conduit();
+
+ aprint_debug("SMCCC: Version %#x (%s)\n",
+ smccc_version(),
+ smccc_conduit == PSCI_CONDUIT_SMC ? "SMC" : "HVC");
+ }
}
return smccc_present;
}
@@ -70,7 +80,8 @@ smccc_probe(void)
int
smccc_version(void)
{
- return smccc_call(SMCCC_VERSION, 0, 0, 0);
+ return smccc_call(SMCCC_VERSION, 0, 0, 0, 0,
+ NULL, NULL, NULL, NULL);
}
/*
@@ -79,11 +90,54 @@ smccc_version(void)
* Generic call interface for SMC/HVC calls.
*/
int
-smccc_call(register_t fid, register_t arg1, register_t arg2, register_t arg3)
+smccc_call(uint32_t fid,
+register_t arg1, register_t arg2, register_t arg3, register_t arg4,
+register_t *res0, register_t *res1, register_t *res2, register_t *res3)
{
+ register_t args[5] = { fid, arg1, arg2, arg3, arg4 };
+
+ register register_t r0 asm ("r0");
+ register register_t r1 asm ("r1");
+ register register_t r2 asm ("r2");
+ register register_t r3 asm ("r3");
+ register register_t r4 asm ("r4");
+
if (!smccc_present) {
return SMCCC_NOT_SUPPORTED;
}
- return psci_call(fid, arg1, arg2, arg3);
+ KASSERT(smccc_conduit != PSCI_CONDUIT_NONE);
+
+ r0 = args[0];
+ r1 = args[1];
+ r2 = args[2];
+ r3 = args[3];
+ r4 = args[4];
+
+ if (smccc_conduit == PSCI_CONDUIT_SMC) {
+ asm volatile ("smc #0" :
+ "=r" (r0), "=r" (r1), "=r" (r2), "=r" (r3) :
+ "r" (r0), "r" (r1), "r" (r2), "r" (r3), "r" (r4) :
+ "memory");
+ } else {
+ asm volatile ("hvc #0" :
+ "=r" (r0), "=r" (r1), "=r" (r2), "=r" (r3) :
+ "r" (r0), "r" (r1), "r" (r2), "r" (r3), "r" (r4) :
+ "memory");
+ }
+
+ if (res0) {
+ *res0 = r0;
+ }
+ if (res1) {
+ *res1 = r1;
+ }
+ if (res2) {
+ *res2 = r2;
+ }
+ if (res3) {
+ *res3 = r3;
+ }
+
+ return r0;
}
Index: src/sys/arch/arm/arm/smccc.h
diff -u src/sys/arch/arm/arm/smccc.h:1.1 src/sys/arch/arm/arm/smccc.h:1.2
--- src/sys/arch/arm/arm/smccc.h:1.1 Fri Aug 6 19:38:53 2021
+++ src/sys/arch/arm/arm/smccc.h Sat Aug 7 21:21:49 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: smccc.h,v 1.1 2021/08/06 19:38:53 jmcneill Exp $ */
+/* $NetBSD: smccc.h,v 1.2 2021/08/07 21:21:49 jmcneill Exp $ */
/*-
* Copyright (c) 2021 Jared McNeill
@@ -50,6 +50,7 @@ int smccc_version(void);
/*
* Call an SMC/HVC service.
*/
-int smccc_call(register_t, register_t, register_t, register_t);
+int smccc_call(uint32_t, register_t, register_t, register_t, register_t,
+ register_t *, register_t *, register_t *, register_t *);
#endif /* _ARM_SMCCC_H */
CVS commit: src/sys/arch/arm/arm
Module Name:src
Committed By: jmcneill
Date: Sat Aug 7 21:20:14 UTC 2021
Modified Files:
src/sys/arch/arm/arm: psci.c psci.h
Log Message:
arm: PSCI: Add a function to return the PSCI conduit.
To generate a diff of this commit:
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/arm/arm/psci.c
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/arm/arm/psci.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/arm/psci.c
diff -u src/sys/arch/arm/arm/psci.c:1.6 src/sys/arch/arm/arm/psci.c:1.7
--- src/sys/arch/arm/arm/psci.c:1.6 Fri Aug 6 19:38:53 2021
+++ src/sys/arch/arm/arm/psci.c Sat Aug 7 21:20:14 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: psci.c,v 1.6 2021/08/06 19:38:53 jmcneill Exp $ */
+/* $NetBSD: psci.c,v 1.7 2021/08/07 21:20:14 jmcneill Exp $ */
/*-
* Copyright (c) 2017 Jared McNeill
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: psci.c,v 1.6 2021/08/06 19:38:53 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: psci.c,v 1.7 2021/08/07 21:20:14 jmcneill Exp $");
#include
#include
@@ -68,6 +68,18 @@ psci_call(register_t fid, register_t arg
return psci_call_fn(fid, arg1, arg2, arg3);
}
+enum psci_conduit
+psci_conduit(void)
+{
+ if (psci_call_fn == psci_call_smc) {
+ return PSCI_CONDUIT_SMC;
+ } else if (psci_call_fn == psci_call_hvc) {
+ return PSCI_CONDUIT_HVC;
+ } else {
+ return PSCI_CONDUIT_NONE;
+ }
+}
+
uint32_t
psci_version(void)
{
Index: src/sys/arch/arm/arm/psci.h
diff -u src/sys/arch/arm/arm/psci.h:1.3 src/sys/arch/arm/arm/psci.h:1.4
--- src/sys/arch/arm/arm/psci.h:1.3 Fri Aug 6 19:38:53 2021
+++ src/sys/arch/arm/arm/psci.h Sat Aug 7 21:20:14 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: psci.h,v 1.3 2021/08/06 19:38:53 jmcneill Exp $ */
+/* $NetBSD: psci.h,v 1.4 2021/08/07 21:20:14 jmcneill Exp $ */
/*-
* Copyright (c) 2017 Jared McNeill
@@ -42,6 +42,15 @@ enum psci_function {
};
/*
+ * Possible PSCI conduits.
+ */
+enum psci_conduit {
+ PSCI_CONDUIT_NONE,
+ PSCI_CONDUIT_SMC,
+ PSCI_CONDUIT_HVC,
+};
+
+/*
* PSCI error codes
*/
#define PSCI_SUCCESS 0
@@ -71,6 +80,11 @@ void psci_init(psci_fn);
bool psci_available(void);
/*
+ * Return the PSCI conduit type.
+ */
+enum psci_conduit psci_conduit(void);
+
+/*
* PSCI call methods, implemented in psci.S
*/
int psci_call_smc(register_t, register_t, register_t, register_t);
CVS commit: src/sys/arch/arm/acpi
Module Name:src
Committed By: jmcneill
Date: Sat Aug 7 18:40:45 UTC 2021
Modified Files:
src/sys/arch/arm/acpi: acpi_machdep.c
Log Message:
acpi: DMA: Use acpi_resource_parse_any to parse _DMA resources
_DMA resources really should be marked ResourceProducer, so use
acpi_resource_parse_any to pick these up.
To generate a diff of this commit:
cvs rdiff -u -r1.23 -r1.24 src/sys/arch/arm/acpi/acpi_machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/acpi/acpi_machdep.c
diff -u src/sys/arch/arm/acpi/acpi_machdep.c:1.23 src/sys/arch/arm/acpi/acpi_machdep.c:1.24
--- src/sys/arch/arm/acpi/acpi_machdep.c:1.23 Sat Aug 7 16:18:42 2021
+++ src/sys/arch/arm/acpi/acpi_machdep.c Sat Aug 7 18:40:45 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: acpi_machdep.c,v 1.23 2021/08/07 16:18:42 thorpej Exp $ */
+/* $NetBSD: acpi_machdep.c,v 1.24 2021/08/07 18:40:45 jmcneill Exp $ */
/*-
* Copyright (c) 2018 The NetBSD Foundation, Inc.
@@ -32,7 +32,7 @@
#include "pci.h"
#include
-__KERNEL_RCSID(0, "$NetBSD: acpi_machdep.c,v 1.23 2021/08/07 16:18:42 thorpej Exp $");
+__KERNEL_RCSID(0, "$NetBSD: acpi_machdep.c,v 1.24 2021/08/07 18:40:45 jmcneill Exp $");
#include
#include
@@ -417,7 +417,7 @@ default_tag:
return;
}
- rv = acpi_resource_parse(sc->sc_dev, module, "_DMA", ,
+ rv = acpi_resource_parse_any(sc->sc_dev, module, "_DMA", ,
_resource_parse_ops_quiet);
if (ACPI_FAILURE(rv)) {
aprint_error_dev(sc->sc_dev,
CVS commit: src/sys/arch/arm/sunxi
Module Name:src
Committed By: riastradh
Date: Sat Aug 7 15:41:01 UTC 2021
Modified Files:
src/sys/arch/arm/sunxi: sun8i_crypto.c
Log Message:
sun8icrypto(4): Call crypto_unblock when a task completes.
Otherwise under load this would presumably just hang after returning
ERESTART to opencrypto.
To generate a diff of this commit:
cvs rdiff -u -r1.25 -r1.26 src/sys/arch/arm/sunxi/sun8i_crypto.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/sunxi/sun8i_crypto.c
diff -u src/sys/arch/arm/sunxi/sun8i_crypto.c:1.25 src/sys/arch/arm/sunxi/sun8i_crypto.c:1.26
--- src/sys/arch/arm/sunxi/sun8i_crypto.c:1.25 Wed Apr 28 16:57:05 2021
+++ src/sys/arch/arm/sunxi/sun8i_crypto.c Sat Aug 7 15:41:00 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: sun8i_crypto.c,v 1.25 2021/04/28 16:57:05 bad Exp $ */
+/* $NetBSD: sun8i_crypto.c,v 1.26 2021/08/07 15:41:00 riastradh Exp $ */
/*-
* Copyright (c) 2019 The NetBSD Foundation, Inc.
@@ -43,7 +43,7 @@
*/
#include
-__KERNEL_RCSID(1, "$NetBSD: sun8i_crypto.c,v 1.25 2021/04/28 16:57:05 bad Exp $");
+__KERNEL_RCSID(1, "$NetBSD: sun8i_crypto.c,v 1.26 2021/08/07 15:41:00 riastradh Exp $");
#include
#include
@@ -211,7 +211,7 @@ static void sun8i_crypto_timeout(void *)
static int sun8i_crypto_intr(void *);
static void sun8i_crypto_schedule_worker(struct sun8i_crypto_softc *);
static void sun8i_crypto_worker(struct work *, void *);
-static void sun8i_crypto_chan_done(struct sun8i_crypto_softc *, unsigned,
+static bool sun8i_crypto_chan_done(struct sun8i_crypto_softc *, unsigned,
int);
static int sun8i_crypto_allocbuf(struct sun8i_crypto_softc *, size_t,
@@ -1051,6 +1051,7 @@ sun8i_crypto_worker(struct work *wk, voi
struct sun8i_crypto_softc *sc = cookie;
uint32_t done, esr, esr_chan;
unsigned i, now;
+ bool unblock = false;
int error;
/*
@@ -1084,7 +1085,8 @@ sun8i_crypto_worker(struct work *wk, voi
if ((sc->sc_chan[i].cc_task != NULL) &&
((now - sc->sc_chan[i].cc_starttime) >=
SUN8I_CRYPTO_TIMEOUT))
-sun8i_crypto_chan_done(sc, i, ETIMEDOUT);
+unblock |= sun8i_crypto_chan_done(sc, i,
+ETIMEDOUT);
continue;
}
@@ -1112,11 +1114,23 @@ sun8i_crypto_worker(struct work *wk, voi
* Notify the task of completion. May release the lock
* to invoke a callback.
*/
- sun8i_crypto_chan_done(sc, i, error);
+ unblock |= sun8i_crypto_chan_done(sc, i, error);
}
/* All one; release the lock one last time. */
mutex_exit(>sc_lock);
+
+ /*
+ * If we cleared any channels, it is time to allow opencrypto
+ * to issue new operations. Asymmetric operations (which we
+ * don't support, at the moment, but we could) and symmetric
+ * operations (which we do) use the same task channels, so we
+ * unblock both kinds.
+ */
+ if (unblock) {
+ crypto_unblock(sc->sc_opencrypto.co_driverid,
+ CRYPTO_SYMQ|CRYPTO_ASYMQ);
+ }
}
/*
@@ -1125,7 +1139,7 @@ sun8i_crypto_worker(struct work *wk, voi
* Notify the callback for the task on channel i, if there is one,
* of the specified error, or 0 for success.
*/
-static void
+static bool
sun8i_crypto_chan_done(struct sun8i_crypto_softc *sc, unsigned i, int error)
{
struct sun8i_crypto_task *task;
@@ -1140,7 +1154,8 @@ sun8i_crypto_chan_done(struct sun8i_cryp
if ((task = sc->sc_chan[i].cc_task) == NULL) {
device_printf(sc->sc_dev, "channel %u: no task but error=%d\n",
i, error);
- return;
+ /* We did not clear a channel. */
+ return false;
}
sc->sc_chan[i].cc_task = NULL;
@@ -1183,6 +1198,9 @@ sun8i_crypto_chan_done(struct sun8i_cryp
SDT_PROBE2(sdt, sun8i_crypto, task, done, task, error);
(*task->ct_callback)(sc, task, task->ct_cookie, error);
mutex_enter(>sc_lock);
+
+ /* We cleared a channel. */
+ return true;
}
/*
@@ -1811,7 +1829,7 @@ sun8i_crypto_register1(struct sun8i_cryp
* Called by opencrypto to allocate a new session. We don't keep
* track of sessions, since there are no persistent keys in the
* hardware that we take advantage of, so this only validates the
- * crypto operations and returns a zero session id.
+ * crypto operations and returns a dummy session id of 1.
*/
static int
sun8i_crypto_newsession(void *cookie, uint32_t *sidp, struct cryptoini *cri)
@@ -1823,7 +1841,7 @@ sun8i_crypto_newsession(void *cookie, ui
/*
* No variation of rounds is supported here. (XXX Unused and
- * unimplemented in opencrypto(9) altogether?
+ * unimplemented in opencrypto(9) altogether?)
*/
if (cri->cri_rnd)
return EINVAL;
CVS commit: src/sys/arch/arm/xscale
Module Name:src
Committed By: rin
Date: Fri Aug 6 09:01:36 UTC 2021
Modified Files:
src/sys/arch/arm/xscale: i80321_icu.c i80321var.h
Log Message:
Simplify i80321_intr_calculate_masks().
G/C unused members of struct intrq.
No functional changes intended.
To generate a diff of this commit:
cvs rdiff -u -r1.26 -r1.27 src/sys/arch/arm/xscale/i80321_icu.c
cvs rdiff -u -r1.13 -r1.14 src/sys/arch/arm/xscale/i80321var.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/xscale/i80321_icu.c
diff -u src/sys/arch/arm/xscale/i80321_icu.c:1.26 src/sys/arch/arm/xscale/i80321_icu.c:1.27
--- src/sys/arch/arm/xscale/i80321_icu.c:1.26 Fri Nov 20 18:49:45 2020
+++ src/sys/arch/arm/xscale/i80321_icu.c Fri Aug 6 09:01:36 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: i80321_icu.c,v 1.26 2020/11/20 18:49:45 thorpej Exp $ */
+/* $NetBSD: i80321_icu.c,v 1.27 2021/08/06 09:01:36 rin Exp $ */
/*
* Copyright (c) 2001, 2002, 2006 Wasabi Systems, Inc.
@@ -36,7 +36,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: i80321_icu.c,v 1.26 2020/11/20 18:49:45 thorpej Exp $");
+__KERNEL_RCSID(0, "$NetBSD: i80321_icu.c,v 1.27 2021/08/06 09:01:36 rin Exp $");
#ifndef EVBARM_SPL_NOINLINE
#define EVBARM_SPL_NOINLINE
@@ -166,26 +166,22 @@ i80321_intr_calculate_masks(void)
struct intrhand *ih;
int irq, ipl;
- /* First, figure out which IPLs each IRQ has. */
+ /* Disable all IRQs. */
+ for (irq = 0; irq < NIRQ; irq++)
+ i80321_disable_irq(irq);
+
+ /* Figure out which IRQs are used by each IPL. */
+ for (ipl = 0; ipl < NIPL; ipl++)
+ i80321_imask[ipl] = 0;
for (irq = 0; irq < NIRQ; irq++) {
- int levels = 0;
iq = [irq];
- i80321_disable_irq(irq);
- for (ih = TAILQ_FIRST(>iq_list); ih != NULL;
- ih = TAILQ_NEXT(ih, ih_list))
- levels |= (1U << ih->ih_ipl);
- iq->iq_levels = levels;
+ TAILQ_FOREACH(ih, >iq_list, ih_list)
+ i80321_imask[ih->ih_ipl] |= (1U << irq);
}
- /* Next, figure out which IRQs are used by each IPL. */
- for (ipl = 0; ipl < NIPL; ipl++) {
- int irqs = 0;
- for (irq = 0; irq < NIRQ; irq++) {
- if (intrq[irq].iq_levels & (1U << ipl))
-irqs |= (1U << irq);
- }
- i80321_imask[ipl] = irqs;
- }
+ /* All IPLs block everything blocked by any lower IPL. */
+ for (ipl = 1; ipl < NIPL; ipl++)
+ i80321_imask[ipl] |= i80321_imask[ipl - 1];
KASSERT(i80321_imask[IPL_NONE] == 0);
KASSERT(i80321_imask[IPL_SOFTCLOCK] == 0);
@@ -193,38 +189,11 @@ i80321_intr_calculate_masks(void)
KASSERT(i80321_imask[IPL_SOFTNET] == 0);
KASSERT(i80321_imask[IPL_SOFTSERIAL] == 0);
- /*
- * Enforce a hierarchy that gives "slow" device (or devices with
- * limited input buffer space/"real-time" requirements) a better
- * chance at not dropping data.
- */
-
-#if 0
- /*
- * This assert might be useful, but only after some interrupts
- * are configured. As it stands now, it will always fire early
- * in the initialization phase. If it's useful enough to re-
- * enable, it should be conditionalized on something else like
- * having at least something in the levels/irqs above.
- */
- KASSERT(i80321_imask[IPL_VM] != 0);
-#endif
- i80321_imask[IPL_SCHED] |= i80321_imask[IPL_VM];
- i80321_imask[IPL_HIGH] |= i80321_imask[IPL_SCHED];
-
- /*
- * Now compute which IRQs must be blocked when servicing any
- * given IRQ.
- */
+ /* Enable IRQs in use. */
for (irq = 0; irq < NIRQ; irq++) {
- int irqs = (1U << irq);
iq = [irq];
- if (TAILQ_FIRST(>iq_list) != NULL)
+ if (!TAILQ_EMPTY(>iq_list))
i80321_enable_irq(irq);
- for (ih = TAILQ_FIRST(>iq_list); ih != NULL;
- ih = TAILQ_NEXT(ih, ih_list))
- irqs |= i80321_imask[ih->ih_ipl];
- iq->iq_mask = irqs;
}
}
Index: src/sys/arch/arm/xscale/i80321var.h
diff -u src/sys/arch/arm/xscale/i80321var.h:1.13 src/sys/arch/arm/xscale/i80321var.h:1.14
--- src/sys/arch/arm/xscale/i80321var.h:1.13 Sun Feb 12 16:31:01 2012
+++ src/sys/arch/arm/xscale/i80321var.h Fri Aug 6 09:01:36 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: i80321var.h,v 1.13 2012/02/12 16:31:01 matt Exp $ */
+/* $NetBSD: i80321var.h,v 1.14 2021/08/06 09:01:36 rin Exp $ */
/*
* Copyright (c) 2002, 2003 Wasabi Systems, Inc.
@@ -59,8 +59,6 @@ struct intrhand {
struct intrq {
TAILQ_HEAD(, intrhand) iq_list; /* handler list */
struct evcnt iq_ev; /* event counter */
- int iq_mask; /* IRQs to mask while handling */
- int iq_levels; /* IPL_*'s this IRQ has */
int iq_ist; /* share type */
};
CVS commit: src/sys/arch/arm/xscale
Module Name:src
Committed By: rin
Date: Fri Aug 6 08:58:42 UTC 2021
Modified Files:
src/sys/arch/arm/xscale: i80321_intr.h
Log Message:
Do *NOT* lower IPL in i80321_splraise().
Fix various strange crashes for DIAGNOSTIC kernel on evbarm/HDL_G,
including one worked around by if_wm.c rev 1.706:
http://cvsweb.netbsd.org/bsdweb.cgi/src/sys/dev/pci/if_wm.c#rev1.706
To generate a diff of this commit:
cvs rdiff -u -r1.12 -r1.13 src/sys/arch/arm/xscale/i80321_intr.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/xscale/i80321_intr.h
diff -u src/sys/arch/arm/xscale/i80321_intr.h:1.12 src/sys/arch/arm/xscale/i80321_intr.h:1.13
--- src/sys/arch/arm/xscale/i80321_intr.h:1.12 Wed Jan 24 09:04:45 2018
+++ src/sys/arch/arm/xscale/i80321_intr.h Fri Aug 6 08:58:42 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: i80321_intr.h,v 1.12 2018/01/24 09:04:45 skrll Exp $ */
+/* $NetBSD: i80321_intr.h,v 1.13 2021/08/06 08:58:42 rin Exp $ */
/*
* Copyright (c) 2001, 2002, 2006 Wasabi Systems, Inc.
@@ -95,10 +95,15 @@ static inline int __attribute__((__unuse
i80321_splraise(int ipl)
{
int old = curcpl();
- set_curcpl(ipl);
- /* Don't let the compiler re-order this code with subsequent code */
- __insn_barrier();
+ if (ipl > old) {
+ set_curcpl(ipl);
+ /*
+ * Don't let the compiler re-order this code with
+ * subsequent code
+ */
+ __insn_barrier();
+ }
return (old);
}
CVS commit: src/sys/arch/arm/sunxi
Module Name:src
Committed By: tnn
Date: Sat Jul 31 11:34:40 UTC 2021
Modified Files:
src/sys/arch/arm/sunxi: sunxi_platform.c
Log Message:
sunxi_platform: declare UART FIFO sizes for SoCs we support
To generate a diff of this commit:
cvs rdiff -u -r1.44 -r1.45 src/sys/arch/arm/sunxi/sunxi_platform.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/sunxi/sunxi_platform.c
diff -u src/sys/arch/arm/sunxi/sunxi_platform.c:1.44 src/sys/arch/arm/sunxi/sunxi_platform.c:1.45
--- src/sys/arch/arm/sunxi/sunxi_platform.c:1.44 Fri Jul 30 12:46:46 2021
+++ src/sys/arch/arm/sunxi/sunxi_platform.c Sat Jul 31 11:34:40 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: sunxi_platform.c,v 1.44 2021/07/30 12:46:46 tnn Exp $ */
+/* $NetBSD: sunxi_platform.c,v 1.45 2021/07/31 11:34:40 tnn Exp $ */
/*-
* Copyright (c) 2017 Jared McNeill
@@ -31,7 +31,7 @@
#include "opt_console.h"
#include
-__KERNEL_RCSID(0, "$NetBSD: sunxi_platform.c,v 1.44 2021/07/30 12:46:46 tnn Exp $");
+__KERNEL_RCSID(0, "$NetBSD: sunxi_platform.c,v 1.45 2021/07/31 11:34:40 tnn Exp $");
#include
#include
@@ -241,11 +241,23 @@ sunxi_platform_device_register(device_t
if (device_is_a(self, "com")) {
static const struct device_compatible_entry compat_data[] = {
- { .compat = "allwinner,sun7i-a20" },
+ { .compat = "allwinner,sun4i-a10", .value = 64 },
+ { .compat = "allwinner,sun5i-a13", .value = 64 },
+ { .compat = "allwinner,sun6i-a31", .value = 64 },
+ { .compat = "allwinner,sun7i-a20", .value = 64 },
+ { .compat = "allwinner,sun8i-h2-plus", .value = 64 },
+ { .compat = "allwinner,sun8i-h3", .value = 64 },
+ { .compat = "allwinner,sun8i-a83t", .value = 64 },
+ { .compat = "allwinner,sun9i-a80", .value = 64 },
+ { .compat = "allwinner,sun50i-a64", .value = 64 },
+ { .compat = "allwinner,sun50i-h5", .value = 64 },
+ { .compat = "allwinner,sun50i-h6", .value = 256 },
DEVICE_COMPAT_EOL
};
- if (of_compatible_match(OF_finddevice("/"), compat_data))
- prop_dictionary_set_uint(prop, "fifolen", 64);
+ const struct device_compatible_entry *dce =
+ of_compatible_lookup(OF_finddevice("/"), compat_data);
+ if (dce != NULL)
+ prop_dictionary_set_uint(prop, "fifolen", dce->value);
}
}
CVS commit: src/sys/arch/arm/rockchip
Module Name:src Committed By: jmcneill Date: Sun Jul 25 11:14:16 UTC 2021 Modified Files: src/sys/arch/arm/rockchip: rk_anxdp.c Log Message: rockchip: edp: Force VOPB as CRTC for eDP. Fixes display init on Pinebook Pro w/ U-Boot 2021.07. To generate a diff of this commit: cvs rdiff -u -r1.3 -r1.4 src/sys/arch/arm/rockchip/rk_anxdp.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/rockchip/rk_anxdp.c diff -u src/sys/arch/arm/rockchip/rk_anxdp.c:1.3 src/sys/arch/arm/rockchip/rk_anxdp.c:1.4 --- src/sys/arch/arm/rockchip/rk_anxdp.c:1.3 Wed Jan 27 03:10:19 2021 +++ src/sys/arch/arm/rockchip/rk_anxdp.c Sun Jul 25 11:14:15 2021 @@ -1,4 +1,4 @@ -/* $NetBSD: rk_anxdp.c,v 1.3 2021/01/27 03:10:19 thorpej Exp $ */ +/* $NetBSD: rk_anxdp.c,v 1.4 2021/07/25 11:14:15 jmcneill Exp $ */ /*- * Copyright (c) 2019 Jonathan A. Kollasch @@ -27,7 +27,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: rk_anxdp.c,v 1.3 2021/01/27 03:10:19 thorpej Exp $"); +__KERNEL_RCSID(0, "$NetBSD: rk_anxdp.c,v 1.4 2021/07/25 11:14:15 jmcneill Exp $"); #include #include @@ -172,7 +172,7 @@ rk_anxdp_ep_activate(device_t dev, struc break; } - sc->sc_encoder.possible_crtcs = 0x3; /* XXX */ + sc->sc_encoder.possible_crtcs = 0x2; /* VOPB only */ drm_encoder_init(crtc->dev, >sc_encoder, _anxdp_encoder_funcs, DRM_MODE_ENCODER_TMDS); drm_encoder_helper_add(>sc_encoder, _anxdp_encoder_helper_funcs);
CVS commit: src/sys/arch/arm/fdt
Module Name:src
Committed By: jmcneill
Date: Fri Jul 23 21:33:35 UTC 2021
Modified Files:
src/sys/arch/arm/fdt: acpi_fdt.c
Log Message:
smbios: Support SMBIOS 2.x tables.
To generate a diff of this commit:
cvs rdiff -u -r1.20 -r1.21 src/sys/arch/arm/fdt/acpi_fdt.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/fdt/acpi_fdt.c
diff -u src/sys/arch/arm/fdt/acpi_fdt.c:1.20 src/sys/arch/arm/fdt/acpi_fdt.c:1.21
--- src/sys/arch/arm/fdt/acpi_fdt.c:1.20 Thu Jul 22 00:47:55 2021
+++ src/sys/arch/arm/fdt/acpi_fdt.c Fri Jul 23 21:33:35 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: acpi_fdt.c,v 1.20 2021/07/22 00:47:55 jmcneill Exp $ */
+/* $NetBSD: acpi_fdt.c,v 1.21 2021/07/23 21:33:35 jmcneill Exp $ */
/*-
* Copyright (c) 2015-2017 Jared McNeill
@@ -30,7 +30,7 @@
#include "opt_efi.h"
#include
-__KERNEL_RCSID(0, "$NetBSD: acpi_fdt.c,v 1.20 2021/07/22 00:47:55 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: acpi_fdt.c,v 1.21 2021/07/23 21:33:35 jmcneill Exp $");
#include
#include
@@ -140,11 +140,36 @@ acpi_fdt_poweroff(device_t dev)
psci_system_off();
}
+static int
+acpi_fdt_smbios_version(void)
+{
+ uint8_t *hdr;
+ int smbver;
+
+ if (smbios_table == 0) {
+ return 0;
+ }
+
+ hdr = AcpiOsMapMemory(smbios_table, 24);
+ if (hdr == NULL) {
+ return 0;
+ }
+ if (smbios3_check_header(hdr)) {
+ smbver = 3;
+ } else if (smbios2_check_header(hdr)) {
+ smbver = 2;
+ } else {
+ smbver = 0;
+ }
+ AcpiOsUnmapMemory(hdr, 24);
+ return smbver;
+}
+
static void
acpi_fdt_smbios_init(device_t dev)
{
- struct smb3hdr *sh;
uint8_t *ptr;
+ int smbver;
const int chosen = OF_finddevice("/chosen");
if (chosen >= 0) {
@@ -154,29 +179,48 @@ acpi_fdt_smbios_init(device_t dev)
return;
}
- sh = AcpiOsMapMemory(smbios_table, sizeof(*sh));
- if (sh == NULL) {
- return;
- }
- if (!smbios3_check_header((uint8_t *)sh)) {
- AcpiOsUnmapMemory(sh, sizeof(*sh));
- return;
- }
+ smbver = acpi_fdt_smbios_version();
+ if (smbver == 3) {
+ struct smb3hdr *sh = AcpiOsMapMemory(smbios_table, sizeof(*sh));
+ if (sh == NULL) {
+ return;
+ }
+
+ ptr = AcpiOsMapMemory(sh->addr, sh->size);
+ if (ptr != NULL) {
+ smbios_entry.addr = ptr;
+ smbios_entry.len = sh->size;
+ smbios_entry.rev = sh->eprev;
+ smbios_entry.mjr = sh->majrev;
+ smbios_entry.min = sh->minrev;
+ smbios_entry.doc = sh->docrev;
+ smbios_entry.count = UINT16_MAX;
+ }
- ptr = AcpiOsMapMemory(sh->addr, sh->size);
- if (ptr != NULL) {
- smbios_entry.addr = ptr;
- smbios_entry.len = sh->size;
- smbios_entry.rev = sh->eprev;
- smbios_entry.mjr = sh->majrev;
- smbios_entry.min = sh->minrev;
- smbios_entry.doc = sh->docrev;
- smbios_entry.count = UINT16_MAX;
-
- device_printf(dev, "SMBIOS rev. %d.%d.%d @ 0x%lx\n",
+ aprint_normal_dev(dev, "SMBIOS rev. %d.%d.%d @ 0x%lx\n",
sh->majrev, sh->minrev, sh->docrev, (u_long)sh->addr);
+ AcpiOsUnmapMemory(sh, sizeof(*sh));
+ } else if (smbver == 2) {
+ struct smbhdr *sh = AcpiOsMapMemory(smbios_table, sizeof(*sh));
+ if (sh == NULL) {
+ return;
+ }
+
+ ptr = AcpiOsMapMemory(sh->addr, sh->size);
+ if (ptr != NULL) {
+ smbios_entry.addr = ptr;
+ smbios_entry.len = sh->size;
+ smbios_entry.rev = 0;
+ smbios_entry.mjr = sh->majrev;
+ smbios_entry.min = sh->minrev;
+ smbios_entry.doc = 0;
+ smbios_entry.count = sh->count;
+ }
+
+ aprint_normal_dev(dev, "SMBIOS rev. %d.%d @ 0x%lx (%d entries)\n",
+ sh->majrev, sh->minrev, (u_long)sh->addr, sh->count);
+ AcpiOsUnmapMemory(sh, sizeof(*sh));
}
- AcpiOsUnmapMemory(sh, sizeof(*sh));
}
static void
CVS commit: src/sys/arch/arm/fdt
Module Name:src
Committed By: jmcneill
Date: Thu Jul 22 00:47:56 UTC 2021
Modified Files:
src/sys/arch/arm/fdt: acpi_fdt.c files.fdt
Log Message:
Expose SMBIOS tables using sysctl machdep.dmi.*, same as x86.
To generate a diff of this commit:
cvs rdiff -u -r1.19 -r1.20 src/sys/arch/arm/fdt/acpi_fdt.c
cvs rdiff -u -r1.33 -r1.34 src/sys/arch/arm/fdt/files.fdt
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/fdt/acpi_fdt.c
diff -u src/sys/arch/arm/fdt/acpi_fdt.c:1.19 src/sys/arch/arm/fdt/acpi_fdt.c:1.20
--- src/sys/arch/arm/fdt/acpi_fdt.c:1.19 Sat Apr 24 23:36:26 2021
+++ src/sys/arch/arm/fdt/acpi_fdt.c Thu Jul 22 00:47:55 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: acpi_fdt.c,v 1.19 2021/04/24 23:36:26 thorpej Exp $ */
+/* $NetBSD: acpi_fdt.c,v 1.20 2021/07/22 00:47:55 jmcneill Exp $ */
/*-
* Copyright (c) 2015-2017 Jared McNeill
@@ -30,7 +30,7 @@
#include "opt_efi.h"
#include
-__KERNEL_RCSID(0, "$NetBSD: acpi_fdt.c,v 1.19 2021/04/24 23:36:26 thorpej Exp $");
+__KERNEL_RCSID(0, "$NetBSD: acpi_fdt.c,v 1.20 2021/07/22 00:47:55 jmcneill Exp $");
#include
#include
@@ -47,6 +47,7 @@ __KERNEL_RCSID(0, "$NetBSD: acpi_fdt.c,v
#include
#include
+#include
#include
@@ -61,6 +62,7 @@ static void acpi_fdt_attach(device_t, de
static void acpi_fdt_poweroff(device_t);
+static void acpi_fdt_smbios_init(device_t);
static void acpi_fdt_sysctl_init(void);
extern struct arm32_bus_dma_tag acpi_coherent_dma_tag;
@@ -89,18 +91,24 @@ acpi_fdt_match(device_t parent, cfdata_t
static void
acpi_fdt_attach(device_t parent, device_t self, void *aux)
{
+ extern void platform_init(void); /* XXX */
struct fdt_attach_args * const faa = aux;
struct acpibus_attach_args aa;
aprint_naive("\n");
aprint_normal("\n");
+ acpi_fdt_smbios_init(self);
+ platform_init();
+
fdtbus_register_power_controller(self, faa->faa_phandle,
_fdt_power_funcs);
if (!acpi_probe())
panic("ACPI subsystem failed to initialize");
+ platform_init();
+
memset(, 0, sizeof(aa));
#if NPCI > 0
aa.aa_pciflags =
@@ -133,26 +141,64 @@ acpi_fdt_poweroff(device_t dev)
}
static void
+acpi_fdt_smbios_init(device_t dev)
+{
+ struct smb3hdr *sh;
+ uint8_t *ptr;
+
+ const int chosen = OF_finddevice("/chosen");
+ if (chosen >= 0) {
+ of_getprop_uint64(chosen, "netbsd,smbios-table", _table);
+ }
+ if (smbios_table == 0) {
+ return;
+ }
+
+ sh = AcpiOsMapMemory(smbios_table, sizeof(*sh));
+ if (sh == NULL) {
+ return;
+ }
+ if (!smbios3_check_header((uint8_t *)sh)) {
+ AcpiOsUnmapMemory(sh, sizeof(*sh));
+ return;
+ }
+
+ ptr = AcpiOsMapMemory(sh->addr, sh->size);
+ if (ptr != NULL) {
+ smbios_entry.addr = ptr;
+ smbios_entry.len = sh->size;
+ smbios_entry.rev = sh->eprev;
+ smbios_entry.mjr = sh->majrev;
+ smbios_entry.min = sh->minrev;
+ smbios_entry.doc = sh->docrev;
+ smbios_entry.count = UINT16_MAX;
+
+ device_printf(dev, "SMBIOS rev. %d.%d.%d @ 0x%lx\n",
+ sh->majrev, sh->minrev, sh->docrev, (u_long)sh->addr);
+ }
+ AcpiOsUnmapMemory(sh, sizeof(*sh));
+}
+
+static void
acpi_fdt_sysctl_init(void)
{
const struct sysctlnode *rnode;
int error;
- const int chosen = OF_finddevice("/chosen");
- if (chosen >= 0)
- of_getprop_uint64(chosen, "netbsd,smbios-table", _table);
+ if (smbios_table == 0) {
+ return;
+ }
error = sysctl_createv(NULL, 0, NULL, ,
CTLFLAG_PERMANENT, CTLTYPE_NODE, "machdep", NULL,
NULL, 0, NULL, 0, CTL_MACHDEP, CTL_EOL);
- if (error)
+ if (error) {
return;
-
- if (smbios_table != 0) {
- (void)sysctl_createv(NULL, 0, , NULL,
- CTLFLAG_PERMANENT | CTLFLAG_READONLY | CTLFLAG_HEX, CTLTYPE_QUAD,
- "smbios", SYSCTL_DESCR("SMBIOS table pointer"),
- NULL, 0, _table, sizeof(smbios_table),
- CTL_CREATE, CTL_EOL);
}
+
+ (void)sysctl_createv(NULL, 0, , NULL,
+ CTLFLAG_PERMANENT | CTLFLAG_READONLY | CTLFLAG_HEX, CTLTYPE_QUAD,
+ "smbios", SYSCTL_DESCR("SMBIOS table pointer"),
+ NULL, 0, _table, sizeof(smbios_table),
+ CTL_CREATE, CTL_EOL);
}
Index: src/sys/arch/arm/fdt/files.fdt
diff -u src/sys/arch/arm/fdt/files.fdt:1.33 src/sys/arch/arm/fdt/files.fdt:1.34
--- src/sys/arch/arm/fdt/files.fdt:1.33 Mon Apr 26 14:44:16 2021
+++ src/sys/arch/arm/fdt/files.fdt Thu Jul 22 00:47:55 2021
@@ -1,4 +1,4 @@
-# $NetBSD: files.fdt,v 1.33 2021/04/26 14:44:16 thorpej Exp $
+# $NetBSD: files.fdt,v 1.34 2021/07/22 00:47:55 jmcneill Exp $
include "dev/pckbport/files.pckbport"
@@ -75,6 +75,7 @@ file arch/arm/fdt/pmu_fdt.c pmu_fdt
attach genfb at fdt with plfb_fdt: fdt_display_timing
file arch/arm/fdt/plfb_fdt.c plfb_fdt
-device acpifdt: acpibus
+device acpifdt: acpibus, smbios
attach acpifdt at fdt with acpi_fdt
file arch/arm/fdt/acpi_fdt.c acpi_fdt
+file dev/smbios_platform.c acpi_fdt
CVS commit: src/sys/arch/arm/arm32
Module Name:src
Committed By: skrll
Date: Tue Jul 6 08:34:28 UTC 2021
Modified Files:
src/sys/arch/arm/arm32: cpu.c
Log Message:
Assume all ARM11[37]6 r0 variants are missing ISAR and friends. This is
certainly the case for r0 variants I could find TRMs for.
PR/50596 CPU_ID_ARM1136JS r0p4 does not support feature registers
To generate a diff of this commit:
cvs rdiff -u -r1.147 -r1.148 src/sys/arch/arm/arm32/cpu.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/arm32/cpu.c
diff -u src/sys/arch/arm/arm32/cpu.c:1.147 src/sys/arch/arm/arm32/cpu.c:1.148
--- src/sys/arch/arm/arm32/cpu.c:1.147 Thu Jul 2 11:49:48 2020
+++ src/sys/arch/arm/arm32/cpu.c Tue Jul 6 08:34:28 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu.c,v 1.147 2020/07/02 11:49:48 martin Exp $ */
+/* $NetBSD: cpu.c,v 1.148 2021/07/06 08:34:28 skrll Exp $ */
/*
* Copyright (c) 1995 Mark Brinicombe.
@@ -46,7 +46,7 @@
#include "opt_multiprocessor.h"
#include
-__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.147 2020/07/02 11:49:48 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.148 2021/07/06 08:34:28 skrll Exp $");
#include
@@ -739,7 +739,10 @@ identify_arm_cpu(device_t dv, struct cpu
aprint_normal("\n");
if (CPU_ID_CORTEX_P(arm_cpuid) || CPU_ID_ARM11_P(arm_cpuid) || CPU_ID_MV88SV58XX_P(arm_cpuid)) {
- identify_features(dv);
+ if ((arm_cpuid & CPU_ID_CPU_MASK) != CPU_ID_ARM1136JS &&
+ (arm_cpuid & CPU_ID_CPU_MASK) != CPU_ID_ARM1176JZS) {
+ identify_features(dv);
+ }
}
/* Print cache info. */
CVS commit: src/sys/arch/arm/arm
Module Name:src Committed By: skrll Date: Fri Jul 2 07:15:35 UTC 2021 Modified Files: src/sys/arch/arm/arm: cpufunc.c Log Message: Be consistent about #ifndef ARM32_DISABLE_ALIGNMENT_FAULTS. NFCI. To generate a diff of this commit: cvs rdiff -u -r1.180 -r1.181 src/sys/arch/arm/arm/cpufunc.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/arm/cpufunc.c diff -u src/sys/arch/arm/arm/cpufunc.c:1.180 src/sys/arch/arm/arm/cpufunc.c:1.181 --- src/sys/arch/arm/arm/cpufunc.c:1.180 Sun Jan 31 05:59:55 2021 +++ src/sys/arch/arm/arm/cpufunc.c Fri Jul 2 07:15:35 2021 @@ -1,4 +1,4 @@ -/* $NetBSD: cpufunc.c,v 1.180 2021/01/31 05:59:55 skrll Exp $ */ +/* $NetBSD: cpufunc.c,v 1.181 2021/07/02 07:15:35 skrll Exp $ */ /* * arm7tdmi support code Copyright (c) 2001 John Fremlin @@ -49,7 +49,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.180 2021/01/31 05:59:55 skrll Exp $"); +__KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.181 2021/07/02 07:15:35 skrll Exp $"); #include "opt_arm_start.h" #include "opt_compat_netbsd.h" @@ -2868,10 +2868,10 @@ pj4bv7_setup(char *args) pj4b_config(); cpuctrl = CPU_CONTROL_MMU_ENABLE; -#ifdef ARM32_DISABLE_ALIGNMENT_FAULTS - cpuctrl |= CPU_CONTROL_UNAL_ENABLE; -#else +#ifndef ARM32_DISABLE_ALIGNMENT_FAULTS cpuctrl |= CPU_CONTROL_AFLT_ENABLE; +#else + cpuctrl |= CPU_CONTROL_UNAL_ENABLE; #endif cpuctrl |= CPU_CONTROL_DC_ENABLE; cpuctrl |= CPU_CONTROL_IC_ENABLE;
CVS commit: src/sys/arch/arm/dts
Module Name:src
Committed By: skrll
Date: Wed Jun 30 06:24:03 UTC 2021
Modified Files:
src/sys/arch/arm/dts: sun50i-a64-sopine-baseboard.dts
Log Message:
Revert previous. Apparently it's wrong.
To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/arm/dts/sun50i-a64-sopine-baseboard.dts
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/dts/sun50i-a64-sopine-baseboard.dts
diff -u src/sys/arch/arm/dts/sun50i-a64-sopine-baseboard.dts:1.3 src/sys/arch/arm/dts/sun50i-a64-sopine-baseboard.dts:1.4
--- src/sys/arch/arm/dts/sun50i-a64-sopine-baseboard.dts:1.3 Fri Jun 25 07:03:28 2021
+++ src/sys/arch/arm/dts/sun50i-a64-sopine-baseboard.dts Wed Jun 30 06:24:02 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: sun50i-a64-sopine-baseboard.dts,v 1.3 2021/06/25 07:03:28 skrll Exp $ */
+/* $NetBSD: sun50i-a64-sopine-baseboard.dts,v 1.4 2021/06/30 06:24:02 skrll Exp $ */
/*-
* Copyright (c) 2018 Jared McNeill
@@ -37,7 +37,3 @@
status = "okay";
};
- {
- allwinner,tx-delay-ps = <500>;
-};
-
CVS commit: src/sys/arch/arm/dts
Module Name:src
Committed By: skrll
Date: Fri Jun 25 07:03:28 UTC 2021
Modified Files:
src/sys/arch/arm/dts: sun50i-a64-sopine-baseboard.dts
Log Message:
PR/56095 SOPINE Clusterboard unable to transmit network data
Add allwinner,tx-delay-ps = <500> using the diff supplied by tnn@
To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/arm/dts/sun50i-a64-sopine-baseboard.dts
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/dts/sun50i-a64-sopine-baseboard.dts
diff -u src/sys/arch/arm/dts/sun50i-a64-sopine-baseboard.dts:1.2 src/sys/arch/arm/dts/sun50i-a64-sopine-baseboard.dts:1.3
--- src/sys/arch/arm/dts/sun50i-a64-sopine-baseboard.dts:1.2 Sun Nov 17 17:35:10 2019
+++ src/sys/arch/arm/dts/sun50i-a64-sopine-baseboard.dts Fri Jun 25 07:03:28 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: sun50i-a64-sopine-baseboard.dts,v 1.2 2019/11/17 17:35:10 jmcneill Exp $ */
+/* $NetBSD: sun50i-a64-sopine-baseboard.dts,v 1.3 2021/06/25 07:03:28 skrll Exp $ */
/*-
* Copyright (c) 2018 Jared McNeill
@@ -36,3 +36,8 @@
_hdmi {
status = "okay";
};
+
+ {
+ allwinner,tx-delay-ps = <500>;
+};
+
CVS commit: src/sys/arch/arm/omap
Module Name:src
Committed By: christos
Date: Mon Jun 21 03:18:40 UTC 2021
Modified Files:
src/sys/arch/arm/omap: omap3_ehci.c
Log Message:
fix proplib deprecation
To generate a diff of this commit:
cvs rdiff -u -r1.14 -r1.15 src/sys/arch/arm/omap/omap3_ehci.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/omap/omap3_ehci.c
diff -u src/sys/arch/arm/omap/omap3_ehci.c:1.14 src/sys/arch/arm/omap/omap3_ehci.c:1.15
--- src/sys/arch/arm/omap/omap3_ehci.c:1.14 Sat Apr 24 19:36:28 2021
+++ src/sys/arch/arm/omap/omap3_ehci.c Sun Jun 20 23:18:40 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: omap3_ehci.c,v 1.14 2021/04/24 23:36:28 thorpej Exp $ */
+/* $NetBSD: omap3_ehci.c,v 1.15 2021/06/21 03:18:40 christos Exp $ */
/*-
* Copyright (c) 2010-2012 Jared D. McNeill
@@ -26,7 +26,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: omap3_ehci.c,v 1.14 2021/04/24 23:36:28 thorpej Exp $");
+__KERNEL_RCSID(0, "$NetBSD: omap3_ehci.c,v 1.15 2021/06/21 03:18:40 christos Exp $");
#include "locators.h"
@@ -365,7 +365,7 @@ omap3_ehci_get_port_mode(prop_dictionary
const char *s = NULL;
enum omap3_ehci_port_mode mode = OMAP3_EHCI_PORT_MODE_NONE;
- if (prop_dictionary_get_cstring_nocopy(prop, key, ) && s != NULL) {
+ if (prop_dictionary_get_string(prop, key, ) && s != NULL) {
if (strcmp(s, "phy") == 0) {
mode = OMAP3_EHCI_PORT_MODE_PHY;
#ifdef OMAP_3XXX
CVS commit: src/sys/arch/arm/nvidia
Module Name:src Committed By: christos Date: Mon Jun 21 03:15:22 UTC 2021 Modified Files: src/sys/arch/arm/nvidia: tegra_cec.c Log Message: fix proplib deprecation To generate a diff of this commit: cvs rdiff -u -r1.9 -r1.10 src/sys/arch/arm/nvidia/tegra_cec.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/nvidia/tegra_cec.c diff -u src/sys/arch/arm/nvidia/tegra_cec.c:1.9 src/sys/arch/arm/nvidia/tegra_cec.c:1.10 --- src/sys/arch/arm/nvidia/tegra_cec.c:1.9 Sat Apr 24 19:36:27 2021 +++ src/sys/arch/arm/nvidia/tegra_cec.c Sun Jun 20 23:15:22 2021 @@ -1,4 +1,4 @@ -/* $NetBSD: tegra_cec.c,v 1.9 2021/04/24 23:36:27 thorpej Exp $ */ +/* $NetBSD: tegra_cec.c,v 1.10 2021/06/21 03:15:22 christos Exp $ */ /*- * Copyright (c) 2015 Jared D. McNeill @@ -27,7 +27,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: tegra_cec.c,v 1.9 2021/04/24 23:36:27 thorpej Exp $"); +__KERNEL_RCSID(0, "$NetBSD: tegra_cec.c,v 1.10 2021/06/21 03:15:22 christos Exp $"); #include #include @@ -179,7 +179,7 @@ tegra_cec_attach(device_t parent, device } aprint_normal_dev(self, "interrupting on %s\n", intrstr); - prop_dictionary_get_cstring_nocopy(prop, "hdmi-device", + prop_dictionary_get_string(prop, "hdmi-device", >sc_hdmidevname); fdtbus_reset_assert(sc->sc_rst);
CVS commit: src/sys/arch/arm/rockchip
Module Name:src
Committed By: mrg
Date: Sat Jun 12 00:04:46 UTC 2021
Modified Files:
src/sys/arch/arm/rockchip: rk_tsadc.c
Log Message:
fix comment to talk about correct units (kelvin, not seconds).
To generate a diff of this commit:
cvs rdiff -u -r1.12 -r1.13 src/sys/arch/arm/rockchip/rk_tsadc.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/rockchip/rk_tsadc.c
diff -u src/sys/arch/arm/rockchip/rk_tsadc.c:1.12 src/sys/arch/arm/rockchip/rk_tsadc.c:1.13
--- src/sys/arch/arm/rockchip/rk_tsadc.c:1.12 Wed Jan 27 03:10:19 2021
+++ src/sys/arch/arm/rockchip/rk_tsadc.c Sat Jun 12 00:04:46 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: rk_tsadc.c,v 1.12 2021/01/27 03:10:19 thorpej Exp $ */
+/* $NetBSD: rk_tsadc.c,v 1.13 2021/06/12 00:04:46 mrg Exp $ */
/*
* Copyright (c) 2019 Matthew R. Green
@@ -30,7 +30,7 @@
#include
-__KERNEL_RCSID(0, "$NetBSD: rk_tsadc.c,v 1.12 2021/01/27 03:10:19 thorpej Exp $");
+__KERNEL_RCSID(0, "$NetBSD: rk_tsadc.c,v 1.13 2021/06/12 00:04:46 mrg Exp $");
/*
* Driver for the TSADC temperature sensor monitor in RK3328 and RK3399.
@@ -449,7 +449,7 @@ rk_tsadc_attach(device_t parent, device_
TSHUT_DEF_TEMP);
tshut_temp = TSHUT_DEF_TEMP;
}
- tshut_temp *= 1000; /* convert fdt ms -> us */
+ tshut_temp *= 1000; /* convert fdt mK -> uK */
memcpy(sc->sc_sensors, rk_tsadc_sensors, sizeof(sc->sc_sensors));
for (unsigned n = 0; n < sc->sc_rd->rd_num_sensors; n++) {
CVS commit: src/sys/arch/arm/arm32
Module Name:src
Committed By: skrll
Date: Thu Jun 3 07:06:22 UTC 2021
Modified Files:
src/sys/arch/arm/arm32: arm32_boot.c
Log Message:
Mirror changes to passing pages to UVM into aarch64_machdep.c
Two fixes for loading free pages into UVM
- Only consider a boot_physmem (inner loop) range that has its end
(bp_end) after the bootconfig.dram (outer loop) range start (start).
This was harmless as a later condition correctly checks there is only
something to do if start < bp_end.
- Stop processing boot_physmem ranges if all the bootconfig.dram range has
been passed to UVM. This fixes a boot problem for simon@
Copy a comment over and do the VPRINTF before the uvm_page_physload in
the same way as aarch64_machdep.c as well.
To generate a diff of this commit:
cvs rdiff -u -r1.42 -r1.43 src/sys/arch/arm/arm32/arm32_boot.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/arm32/arm32_boot.c
diff -u src/sys/arch/arm/arm32/arm32_boot.c:1.42 src/sys/arch/arm/arm32/arm32_boot.c:1.43
--- src/sys/arch/arm/arm32/arm32_boot.c:1.42 Tue Jun 1 16:55:07 2021
+++ src/sys/arch/arm/arm32/arm32_boot.c Thu Jun 3 07:06:22 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: arm32_boot.c,v 1.42 2021/06/01 16:55:07 skrll Exp $ */
+/* $NetBSD: arm32_boot.c,v 1.43 2021/06/03 07:06:22 skrll Exp $ */
/*
* Copyright (c) 2002, 2003, 2005 Genetec Corporation. All rights reserved.
@@ -122,7 +122,7 @@
*/
#include
-__KERNEL_RCSID(1, "$NetBSD: arm32_boot.c,v 1.42 2021/06/01 16:55:07 skrll Exp $");
+__KERNEL_RCSID(1, "$NetBSD: arm32_boot.c,v 1.43 2021/06/03 07:06:22 skrll Exp $");
#include "opt_arm_debug.h"
#include "opt_cputypes.h"
@@ -261,15 +261,21 @@ initarm_common(vaddr_t kvm_base, vsize_t
continue;
}
VPRINTF("\n");
+
+ /*
+ * This assumes the bp list is sorted in ascending
+ * order.
+ */
paddr_t segend = end;
- for (size_t j = 0; j < nbp; j++) {
+ for (size_t j = 0; j < nbp && start < end; j++) {
paddr_t bp_start = bp[j].bp_start;
paddr_t bp_end = bp_start + bp[j].bp_pages;
VPRINTF(" bp %2zu start %08lx end %08lx\n",
j, ptoa(bp_start), ptoa(bp_end));
+
KASSERT(bp_start < bp_end);
- if (start > bp_end || segend < bp_start)
+ if (start >= bp_end || segend < bp_start)
continue;
if (start < bp_start)
@@ -281,11 +287,13 @@ initarm_common(vaddr_t kvm_base, vsize_t
}
vm_freelist = bp[j].bp_freelist;
-uvm_page_physload(start, segend, start, segend,
-vm_freelist);
VPRINTF(" start %08lx end %08lx"
"... loading in freelist %d\n", ptoa(start),
ptoa(segend), vm_freelist);
+
+uvm_page_physload(start, segend, start, segend,
+vm_freelist);
+
start = segend;
segend = end;
}
CVS commit: src/sys/arch/arm/arm32
Module Name:src
Committed By: skrll
Date: Tue Jun 1 16:55:07 UTC 2021
Modified Files:
src/sys/arch/arm/arm32: arm32_boot.c
Log Message:
G/C
To generate a diff of this commit:
cvs rdiff -u -r1.41 -r1.42 src/sys/arch/arm/arm32/arm32_boot.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/arm32/arm32_boot.c
diff -u src/sys/arch/arm/arm32/arm32_boot.c:1.41 src/sys/arch/arm/arm32/arm32_boot.c:1.42
--- src/sys/arch/arm/arm32/arm32_boot.c:1.41 Tue Dec 1 02:43:14 2020
+++ src/sys/arch/arm/arm32/arm32_boot.c Tue Jun 1 16:55:07 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: arm32_boot.c,v 1.41 2020/12/01 02:43:14 rin Exp $ */
+/* $NetBSD: arm32_boot.c,v 1.42 2021/06/01 16:55:07 skrll Exp $ */
/*
* Copyright (c) 2002, 2003, 2005 Genetec Corporation. All rights reserved.
@@ -122,7 +122,7 @@
*/
#include
-__KERNEL_RCSID(1, "$NetBSD: arm32_boot.c,v 1.41 2020/12/01 02:43:14 rin Exp $");
+__KERNEL_RCSID(1, "$NetBSD: arm32_boot.c,v 1.42 2021/06/01 16:55:07 skrll Exp $");
#include "opt_arm_debug.h"
#include "opt_cputypes.h"
@@ -262,7 +262,7 @@ initarm_common(vaddr_t kvm_base, vsize_t
}
VPRINTF("\n");
paddr_t segend = end;
- for (size_t j = 0; j < nbp; j++ /*, start = segend, segend = end */) {
+ for (size_t j = 0; j < nbp; j++) {
paddr_t bp_start = bp[j].bp_start;
paddr_t bp_end = bp_start + bp[j].bp_pages;
CVS commit: src/sys/arch/arm/vfp
Module Name:src
Committed By: rin
Date: Tue Jun 1 00:30:22 UTC 2021
Modified Files:
src/sys/arch/arm/vfp: vfp_init.c
Log Message:
PR port-arm/55790
Fix KASSERT failure with floating-point exception in userland.
Consider the case in which curlwp owns enabled FPU in vfp_handler().
If FPE is raised, we must skip pcu_load(9) rather than just falling
through. Otherwise, KASSERT fires in vfp_state_load(), since curlwp
already owns enabled FPU.
No regression for ATF is introduced.
To generate a diff of this commit:
cvs rdiff -u -r1.73 -r1.74 src/sys/arch/arm/vfp/vfp_init.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/vfp/vfp_init.c
diff -u src/sys/arch/arm/vfp/vfp_init.c:1.73 src/sys/arch/arm/vfp/vfp_init.c:1.74
--- src/sys/arch/arm/vfp/vfp_init.c:1.73 Tue Jun 1 00:13:19 2021
+++ src/sys/arch/arm/vfp/vfp_init.c Tue Jun 1 00:30:22 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: vfp_init.c,v 1.73 2021/06/01 00:13:19 rin Exp $ */
+/* $NetBSD: vfp_init.c,v 1.74 2021/06/01 00:30:22 rin Exp $ */
/*
* Copyright (c) 2008 ARM Ltd
@@ -32,7 +32,7 @@
#include "opt_cputypes.h"
#include
-__KERNEL_RCSID(0, "$NetBSD: vfp_init.c,v 1.73 2021/06/01 00:13:19 rin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: vfp_init.c,v 1.74 2021/06/01 00:30:22 rin Exp $");
#include
#include
@@ -423,6 +423,7 @@ static int
vfp_handler(u_int address, u_int insn, trapframe_t *frame, int fault_code)
{
struct cpu_info * const ci = curcpu();
+ uint32_t fpexc;
/* This shouldn't ever happen. */
if (fault_code != FAULT_USER &&
@@ -436,12 +437,19 @@ vfp_handler(u_int address, u_int insn, t
/*
* If we already own the FPU and it's enabled (and no exception), raise
- * SIGILL. If there is an exception, drop through to raise a SIGFPE.
+ * SIGILL. If there is an exception, raise SIGFPE.
*/
- if (curlwp->l_pcu_cpu[PCU_FPU] == ci
- && (armreg_fpexc_read() & (VFP_FPEXC_EX|VFP_FPEXC_EN)) == VFP_FPEXC_EN) {
+ if (curlwp->l_pcu_cpu[PCU_FPU] == ci) {
KASSERT(ci->ci_pcu_curlwp[PCU_FPU] == curlwp);
- return 1;
+
+ fpexc = armreg_fpexc_read();
+ if (fpexc & VFP_FPEXC_EN) {
+ if ((fpexc & VFP_FPEXC_EX) == 0) {
+return 1; /* SIGILL */
+ } else {
+goto fpe; /* SIGFPE; skip pcu_load(9) */
+ }
+ }
}
/*
@@ -449,11 +457,12 @@ vfp_handler(u_int address, u_int insn, t
*/
pcu_load(_vfp_ops);
- uint32_t fpexc = armreg_fpexc_read();
+ fpexc = armreg_fpexc_read();
if (fpexc & VFP_FPEXC_EX) {
ksiginfo_t ksi;
KASSERT(fpexc & VFP_FPEXC_EN);
+fpe:
curcpu()->ci_vfp_evs[2].ev_count++;
/*
CVS commit: src/sys/arch/arm/vfp
Module Name:src
Committed By: rin
Date: Tue Jun 1 00:13:19 UTC 2021
Modified Files:
src/sys/arch/arm/vfp: vfp_init.c
Log Message:
PR port-arm/55790
Style fix for clarity, in preparation of main fix.
Replace condition ``curcpu()->ci_pcu_curlwp[PCU_FPU] == curlwp'' with
``curlwp->l_pcu_cpu[PCU_FPU] == curcpu()''. And add KASSERT to check
the two conditions are equivalent, as done for MI pcu code:
https://nxr.netbsd.org/xref/src/sys/kern/subr_pcu.c#323
No functional changes.
To generate a diff of this commit:
cvs rdiff -u -r1.72 -r1.73 src/sys/arch/arm/vfp/vfp_init.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/vfp/vfp_init.c
diff -u src/sys/arch/arm/vfp/vfp_init.c:1.72 src/sys/arch/arm/vfp/vfp_init.c:1.73
--- src/sys/arch/arm/vfp/vfp_init.c:1.72 Fri Oct 30 18:54:37 2020
+++ src/sys/arch/arm/vfp/vfp_init.c Tue Jun 1 00:13:19 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: vfp_init.c,v 1.72 2020/10/30 18:54:37 skrll Exp $ */
+/* $NetBSD: vfp_init.c,v 1.73 2021/06/01 00:13:19 rin Exp $ */
/*
* Copyright (c) 2008 ARM Ltd
@@ -32,7 +32,7 @@
#include "opt_cputypes.h"
#include
-__KERNEL_RCSID(0, "$NetBSD: vfp_init.c,v 1.72 2020/10/30 18:54:37 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: vfp_init.c,v 1.73 2021/06/01 00:13:19 rin Exp $");
#include
#include
@@ -438,9 +438,11 @@ vfp_handler(u_int address, u_int insn, t
* If we already own the FPU and it's enabled (and no exception), raise
* SIGILL. If there is an exception, drop through to raise a SIGFPE.
*/
- if (curcpu()->ci_pcu_curlwp[PCU_FPU] == curlwp
- && (armreg_fpexc_read() & (VFP_FPEXC_EX|VFP_FPEXC_EN)) == VFP_FPEXC_EN)
+ if (curlwp->l_pcu_cpu[PCU_FPU] == ci
+ && (armreg_fpexc_read() & (VFP_FPEXC_EX|VFP_FPEXC_EN)) == VFP_FPEXC_EN) {
+ KASSERT(ci->ci_pcu_curlwp[PCU_FPU] == curlwp);
return 1;
+ }
/*
* Make sure we own the FP.
CVS commit: src/sys/arch/arm/include/arm32
Module Name:src Committed By: rin Date: Sun May 30 07:20:00 UTC 2021 Modified Files: src/sys/arch/arm/include/arm32: param.h Log Message: Include opt_param.h for MSGBUFSIZE ifdef _KERNEL_OPT. To generate a diff of this commit: cvs rdiff -u -r1.33 -r1.34 src/sys/arch/arm/include/arm32/param.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/arm32/param.h diff -u src/sys/arch/arm/include/arm32/param.h:1.33 src/sys/arch/arm/include/arm32/param.h:1.34 --- src/sys/arch/arm/include/arm32/param.h:1.33 Fri Jul 10 12:25:09 2020 +++ src/sys/arch/arm/include/arm32/param.h Sun May 30 07:20:00 2021 @@ -1,4 +1,4 @@ -/* $NetBSD: param.h,v 1.33 2020/07/10 12:25:09 skrll Exp $ */ +/* $NetBSD: param.h,v 1.34 2021/05/30 07:20:00 rin Exp $ */ /* * Copyright (c) 1994,1995 Mark Brinicombe. @@ -38,6 +38,7 @@ #ifdef _KERNEL_OPT #include "opt_arm32_pmap.h" #include "opt_kasan.h" +#include "opt_param.h" #endif /*
CVS commit: src/sys/arch/arm/arm32
Module Name:src
Committed By: dholland
Date: Sun May 30 06:53:15 UTC 2021
Modified Files:
src/sys/arch/arm/arm32: cpuswitch.S
Log Message:
typo in comment
To generate a diff of this commit:
cvs rdiff -u -r1.104 -r1.105 src/sys/arch/arm/arm32/cpuswitch.S
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/arm32/cpuswitch.S
diff -u src/sys/arch/arm/arm32/cpuswitch.S:1.104 src/sys/arch/arm/arm32/cpuswitch.S:1.105
--- src/sys/arch/arm/arm32/cpuswitch.S:1.104 Sat Nov 21 19:44:52 2020
+++ src/sys/arch/arm/arm32/cpuswitch.S Sun May 30 06:53:15 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: cpuswitch.S,v 1.104 2020/11/21 19:44:52 skrll Exp $ */
+/* $NetBSD: cpuswitch.S,v 1.105 2021/05/30 06:53:15 dholland Exp $ */
/*
* Copyright 2003 Wasabi Systems, Inc.
@@ -87,7 +87,7 @@
#include
#include
- RCSID("$NetBSD: cpuswitch.S,v 1.104 2020/11/21 19:44:52 skrll Exp $")
+ RCSID("$NetBSD: cpuswitch.S,v 1.105 2021/05/30 06:53:15 dholland Exp $")
/* LINTSTUB: include */
@@ -136,7 +136,7 @@ ENTRY(cpu_switchto)
mov ip, sp
push {r4-r7, ip, lr}
- /* move lwps into caller saved registers */
+ /* move lwps into callee saved registers */
mov r6, r1
mov r4, r0
CVS commit: src/sys/arch/arm/include
Module Name:src
Committed By: joerg
Date: Sun May 30 02:28:59 UTC 2021
Modified Files:
src/sys/arch/arm/include: lock.h
Log Message:
Don't use V8 atomic instruction for AA32 mode.
To generate a diff of this commit:
cvs rdiff -u -r1.38 -r1.39 src/sys/arch/arm/include/lock.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/include/lock.h
diff -u src/sys/arch/arm/include/lock.h:1.38 src/sys/arch/arm/include/lock.h:1.39
--- src/sys/arch/arm/include/lock.h:1.38 Tue Apr 27 06:03:09 2021
+++ src/sys/arch/arm/include/lock.h Sun May 30 02:28:59 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: lock.h,v 1.38 2021/04/27 06:03:09 skrll Exp $ */
+/* $NetBSD: lock.h,v 1.39 2021/05/30 02:28:59 joerg Exp $ */
/*-
* Copyright (c) 2000, 2001 The NetBSD Foundation, Inc.
@@ -204,7 +204,7 @@ static __inline void __unused
__cpu_simple_unlock(__cpu_simple_lock_t *__alp)
{
-#if defined(_ARM_ARCH_8)
+#if defined(_ARM_ARCH_8) && defined(__LP64__)
if (sizeof(*__alp) == 1) {
__asm __volatile("stlrb\t%w0, [%1]"
:: "r"(__SIMPLELOCK_UNLOCKED), "r"(__alp) : "memory");
CVS commit: src/sys/arch/arm/rockchip
Module Name:src
Committed By: jmcneill
Date: Fri May 21 09:33:27 UTC 2021
Modified Files:
src/sys/arch/arm/rockchip: rk_fb.c
Log Message:
whitespace cleanup
To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/rockchip/rk_fb.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/rockchip/rk_fb.c
diff -u src/sys/arch/arm/rockchip/rk_fb.c:1.1 src/sys/arch/arm/rockchip/rk_fb.c:1.2
--- src/sys/arch/arm/rockchip/rk_fb.c:1.1 Sat Nov 9 23:30:14 2019
+++ src/sys/arch/arm/rockchip/rk_fb.c Fri May 21 09:33:27 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: rk_fb.c,v 1.1 2019/11/09 23:30:14 jmcneill Exp $ */
+/* $NetBSD: rk_fb.c,v 1.2 2021/05/21 09:33:27 jmcneill Exp $ */
/*-
* Copyright (c) 2015-2019 Jared McNeill
@@ -29,7 +29,7 @@
#include "opt_wsdisplay_compat.h"
#include
-__KERNEL_RCSID(0, "$NetBSD: rk_fb.c,v 1.1 2019/11/09 23:30:14 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: rk_fb.c,v 1.2 2021/05/21 09:33:27 jmcneill Exp $");
#include
#include
@@ -61,7 +61,6 @@ static int rk_fb_ioctl(struct drmfb_soft
static const struct drmfb_params rkfb_drmfb_params = {
.dp_mmapfb = rk_fb_mmapfb,
.dp_ioctl = rk_fb_ioctl,
-
};
CFATTACH_DECL_NEW(rk_fb, sizeof(struct rk_fb_softc),
CVS commit: src/sys/arch/arm/rockchip
Module Name:src
Committed By: msaitoh
Date: Thu May 20 01:41:55 UTC 2021
Modified Files:
src/sys/arch/arm/rockchip: rk_cru_composite.c
Log Message:
Fix wrong calculation found by kUBSan. OK'd by jmcneill.
The output was:
UBSan: Undefined Behavior in ../../../../arch/arm/rockchip/
rk_cru_composite.c:86:21, unsigned integer overflow: 0 divrem 0 cannot be
represented in type 'unsigned int'
To generate a diff of this commit:
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/arm/rockchip/rk_cru_composite.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/rockchip/rk_cru_composite.c
diff -u src/sys/arch/arm/rockchip/rk_cru_composite.c:1.5 src/sys/arch/arm/rockchip/rk_cru_composite.c:1.6
--- src/sys/arch/arm/rockchip/rk_cru_composite.c:1.5 Sat Nov 16 13:23:13 2019
+++ src/sys/arch/arm/rockchip/rk_cru_composite.c Thu May 20 01:41:55 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: rk_cru_composite.c,v 1.5 2019/11/16 13:23:13 jmcneill Exp $ */
+/* $NetBSD: rk_cru_composite.c,v 1.6 2021/05/20 01:41:55 msaitoh Exp $ */
/*-
* Copyright (c) 2018 Jared McNeill
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: rk_cru_composite.c,v 1.5 2019/11/16 13:23:13 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: rk_cru_composite.c,v 1.6 2021/05/20 01:41:55 msaitoh Exp $");
#include
#include
@@ -83,7 +83,8 @@ rk_cru_composite_get_rate(struct rk_cru_
return (u_int)((uint64_t)prate * num / den);
} else {
const uint32_t val = CRU_READ(sc, composite->muxdiv_reg);
- const u_int div = __SHIFTOUT(val, composite->div_mask) + 1;
+ const u_int div = (composite->div_mask != 0)
+ ? __SHIFTOUT(val, composite->div_mask) + 1 : 1;
return prate / div;
}
CVS commit: src/sys/arch/arm/rockchip
Module Name:src
Committed By: msaitoh
Date: Thu May 20 01:07:24 UTC 2021
Modified Files:
src/sys/arch/arm/rockchip: rk3399_cru.c
Log Message:
Fix signed integer overflow found by kUBSan. OK'd by jmcneill.
The output was:
UBSan: Undefined Behavior in ../../../../arch/arm/rockchip/rk3399_cru.c:
284:13, signed integer overflow: 59400 - -2086967296 cannot be
represented in type 'int'
To generate a diff of this commit:
cvs rdiff -u -r1.21 -r1.22 src/sys/arch/arm/rockchip/rk3399_cru.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/rockchip/rk3399_cru.c
diff -u src/sys/arch/arm/rockchip/rk3399_cru.c:1.21 src/sys/arch/arm/rockchip/rk3399_cru.c:1.22
--- src/sys/arch/arm/rockchip/rk3399_cru.c:1.21 Wed Jan 27 03:10:19 2021
+++ src/sys/arch/arm/rockchip/rk3399_cru.c Thu May 20 01:07:24 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: rk3399_cru.c,v 1.21 2021/01/27 03:10:19 thorpej Exp $ */
+/* $NetBSD: rk3399_cru.c,v 1.22 2021/05/20 01:07:24 msaitoh Exp $ */
/*-
* Copyright (c) 2018 Jared McNeill
@@ -28,7 +28,7 @@
#include
-__KERNEL_RCSID(1, "$NetBSD: rk3399_cru.c,v 1.21 2021/01/27 03:10:19 thorpej Exp $");
+__KERNEL_RCSID(1, "$NetBSD: rk3399_cru.c,v 1.22 2021/05/20 01:07:24 msaitoh Exp $");
#include
#include
@@ -281,10 +281,15 @@ rk3399_cru_pll_set_rate(struct rk_cru_so
best_diff = INT_MAX;
for (int i = 0; i < pll->nrates; i++) {
- const int diff = (int)rate - (int)pll->rates[i].rate;
- if (abs(diff) < best_diff) {
+ int diff;
+
+ if (rate > pll->rates[i].rate)
+ diff = rate - pll->rates[i].rate;
+ else
+ diff = pll->rates[i].rate - rate;
+ if (diff < best_diff) {
pll_rate = >rates[i];
- best_diff = abs(diff);
+ best_diff = diff;
}
}
CVS commit: src/sys/arch/arm/rockchip
Module Name:src
Committed By: mrg
Date: Sat May 15 08:46:01 UTC 2021
Modified Files:
src/sys/arch/arm/rockchip: rk3328_cru.c rk_spi.c
Log Message:
add SPI support to rk3328, tested on rock64.
simply adding the SPI clocks (and pwm while here) and enabling
the config match was sufficient, though my first rock64 seems
to have a deal SPI now (does not probe in u-boot or netbsd.)
To generate a diff of this commit:
cvs rdiff -u -r1.7 -r1.8 src/sys/arch/arm/rockchip/rk3328_cru.c
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/arm/rockchip/rk_spi.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/rockchip/rk3328_cru.c
diff -u src/sys/arch/arm/rockchip/rk3328_cru.c:1.7 src/sys/arch/arm/rockchip/rk3328_cru.c:1.8
--- src/sys/arch/arm/rockchip/rk3328_cru.c:1.7 Wed Jan 27 03:10:19 2021
+++ src/sys/arch/arm/rockchip/rk3328_cru.c Sat May 15 08:46:00 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: rk3328_cru.c,v 1.7 2021/01/27 03:10:19 thorpej Exp $ */
+/* $NetBSD: rk3328_cru.c,v 1.8 2021/05/15 08:46:00 mrg Exp $ */
/*-
* Copyright (c) 2018 Jared McNeill
@@ -28,7 +28,7 @@
#include
-__KERNEL_RCSID(1, "$NetBSD: rk3328_cru.c,v 1.7 2021/01/27 03:10:19 thorpej Exp $");
+__KERNEL_RCSID(1, "$NetBSD: rk3328_cru.c,v 1.8 2021/05/15 08:46:00 mrg Exp $");
#include
#include
@@ -218,6 +218,20 @@ static struct rk_cru_clk rk3328_cru_clks
CLKGATE_CON(8), /* gate_reg */
__BIT(2), /* gate_mask */
0),
+ RK_COMPOSITE(RK3328_SCLK_SPI, "clk_spi", mux_2plls_parents,
+ CLKSEL_CON(24), /* muxdiv_reg */
+ __BIT(7), /* mux_mask */
+ __BITS(6,0), /* div_mask */
+ CLKGATE_CON(2), /* gate_reg */
+ __BIT(7), /* gate_mask */
+ 0),
+ RK_COMPOSITE(RK3328_SCLK_PWM, "clk_pwm", mux_2plls_parents,
+ CLKSEL_CON(24), /* muxdiv_reg */
+ __BIT(15), /* mux_mask */
+ __BITS(14,8), /* div_mask */
+ CLKGATE_CON(2), /* gate_reg */
+ __BIT(8), /* gate_mask */
+ 0),
RK_COMPOSITE(RK3328_ACLK_PERI_PRE, "aclk_peri_pre", aclk_peri_pre_parents,
CLKSEL_CON(28), /* muxdiv_reg */
__BITS(7,6), /* mux_mask */
@@ -239,7 +253,7 @@ static struct rk_cru_clk rk3328_cru_clks
__BIT(1), /* gate_mask */
0),
RK_COMPOSITE(RK3328_SCLK_SDMMC, "clk_sdmmc", mmc_parents,
- CLKSEL_CON(30), /* muxdiv_reg */
+ CLKSEL_CON(30), /* muxdiv_reg */
__BITS(9,8), /* mux_mask */
__BITS(7,0), /* div_mask */
CLKGATE_CON(4), /* gate_reg */
@@ -360,6 +374,8 @@ static struct rk_cru_clk rk3328_cru_clks
RK_GATE(RK3328_PCLK_I2C1, "pclk_i2c1", "pclk_bus", CLKGATE_CON(16), 0),
RK_GATE(RK3328_PCLK_I2C2, "pclk_i2c2", "pclk_bus", CLKGATE_CON(16), 1),
RK_GATE(RK3328_PCLK_I2C3, "pclk_i2c3", "pclk_bus", CLKGATE_CON(16), 2),
+ RK_GATE(RK3328_PCLK_SPI, "pclk_spi", "pclk_bus", CLKGATE_CON(16), 5),
+ RK_GATE(RK3328_PCLK_PWM, "pclk_rk_pwm", "pclk_bus", CLKGATE_CON(16), 6),
RK_GATE(RK3328_PCLK_GPIO0, "pclk_gpio0", "pclk_bus", CLKGATE_CON(16), 7),
RK_GATE(RK3328_PCLK_GPIO1, "pclk_gpio1", "pclk_bus", CLKGATE_CON(16), 8),
RK_GATE(RK3328_PCLK_GPIO2, "pclk_gpio2", "pclk_bus", CLKGATE_CON(16), 9),
Index: src/sys/arch/arm/rockchip/rk_spi.c
diff -u src/sys/arch/arm/rockchip/rk_spi.c:1.6 src/sys/arch/arm/rockchip/rk_spi.c:1.7
--- src/sys/arch/arm/rockchip/rk_spi.c:1.6 Wed Jan 27 03:10:19 2021
+++ src/sys/arch/arm/rockchip/rk_spi.c Sat May 15 08:46:00 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: rk_spi.c,v 1.6 2021/01/27 03:10:19 thorpej Exp $ */
+/* $NetBSD: rk_spi.c,v 1.7 2021/05/15 08:46:00 mrg Exp $ */
/*
* Copyright (c) 2019 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: rk_spi.c,v 1.6 2021/01/27 03:10:19 thorpej Exp $");
+__KERNEL_RCSID(0, "$NetBSD: rk_spi.c,v 1.7 2021/05/15 08:46:00 mrg Exp $");
#include
#include
@@ -144,10 +144,8 @@ __KERNEL_RCSID(0, "$NetBSD: rk_spi.c,v 1
#define SPI_FIFOLEN 32
static const struct device_compatible_entry compat_data[] = {
-#if 0 /* should work on RK3328 but untested */
{ .compat = "rockchip,rk3066-spi" },
{ .compat = "rockchip,rk3328-spi" },
-#endif
{ .compat = "rockchip,rk3399-spi" },
DEVICE_COMPAT_EOL
};
CVS commit: src/sys/arch/arm/rockchip
Module Name:src
Committed By: msaitoh
Date: Thu May 13 06:15:41 UTC 2021
Modified Files:
src/sys/arch/arm/rockchip: rk3399_iomux.c
Log Message:
Use unsigned to avoid undefined behavior in GRF_GPIO_P_{CTL,WRITE_EN}.
Found by kUBSan.
To generate a diff of this commit:
cvs rdiff -u -r1.11 -r1.12 src/sys/arch/arm/rockchip/rk3399_iomux.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/rockchip/rk3399_iomux.c
diff -u src/sys/arch/arm/rockchip/rk3399_iomux.c:1.11 src/sys/arch/arm/rockchip/rk3399_iomux.c:1.12
--- src/sys/arch/arm/rockchip/rk3399_iomux.c:1.11 Sat Apr 24 23:36:28 2021
+++ src/sys/arch/arm/rockchip/rk3399_iomux.c Thu May 13 06:15:41 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: rk3399_iomux.c,v 1.11 2021/04/24 23:36:28 thorpej Exp $ */
+/* $NetBSD: rk3399_iomux.c,v 1.12 2021/05/13 06:15:41 msaitoh Exp $ */
/*-
* Copyright (c) 2018 Jared McNeill
@@ -29,7 +29,7 @@
//#define RK3399_IOMUX_DEBUG
#include
-__KERNEL_RCSID(0, "$NetBSD: rk3399_iomux.c,v 1.11 2021/04/24 23:36:28 thorpej Exp $");
+__KERNEL_RCSID(0, "$NetBSD: rk3399_iomux.c,v 1.12 2021/05/13 06:15:41 msaitoh Exp $");
#include
#include
@@ -45,8 +45,8 @@ __KERNEL_RCSID(0, "$NetBSD: rk3399_iomux
#include
/* PU/PD control */
-#define GRF_GPIO_P_CTL(_idx) (0x3 << (((_idx) & 7) * 2))
-#define GRF_GPIO_P_WRITE_EN(_idx) (0x3 << (((_idx) & 7) * 2 + 16))
+#define GRF_GPIO_P_CTL(_idx) (0x3U << (((_idx) & 7) * 2))
+#define GRF_GPIO_P_WRITE_EN(_idx) (0x3U << (((_idx) & 7) * 2 + 16))
/* Different bias value mapping based on pull type of pin */
#define IO_DEF_GPIO_P_CTL_Z 0
#define IO_DEF_GPIO_P_CTL_PULLUP 1
CVS commit: src/sys/arch/arm/acpi
Module Name:src
Committed By: thorpej
Date: Wed May 12 21:56:13 UTC 2021
Modified Files:
src/sys/arch/arm/acpi: acpipchb.c
Log Message:
Pass along our devhandle to the PCI bus instance we attach.
To generate a diff of this commit:
cvs rdiff -u -r1.24 -r1.25 src/sys/arch/arm/acpi/acpipchb.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/acpi/acpipchb.c
diff -u src/sys/arch/arm/acpi/acpipchb.c:1.24 src/sys/arch/arm/acpi/acpipchb.c:1.25
--- src/sys/arch/arm/acpi/acpipchb.c:1.24 Sat Apr 24 23:36:25 2021
+++ src/sys/arch/arm/acpi/acpipchb.c Wed May 12 21:56:13 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: acpipchb.c,v 1.24 2021/04/24 23:36:25 thorpej Exp $ */
+/* $NetBSD: acpipchb.c,v 1.25 2021/05/12 21:56:13 thorpej Exp $ */
/*-
* Copyright (c) 2018 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: acpipchb.c,v 1.24 2021/04/24 23:36:25 thorpej Exp $");
+__KERNEL_RCSID(0, "$NetBSD: acpipchb.c,v 1.25 2021/05/12 21:56:13 thorpej Exp $");
#include
#include
@@ -174,7 +174,9 @@ acpipchb_attach(device_t parent, device_
acpipchb_setup_ranges(sc, );
acpipchb_setup_quirks(sc, );
- config_found(self, , pcibusprint, CFARG_EOL);
+ config_found(self, , pcibusprint,
+ CFARG_DEVHANDLE, device_handle(self),
+ CFARG_EOL);
}
struct acpipchb_setup_ranges_args {
CVS commit: src/sys/arch/arm/sunxi
Module Name:src
Committed By: jmcneill
Date: Wed May 5 20:58:03 UTC 2021
Modified Files:
src/sys/arch/arm/sunxi: sunxi_codec.c sunxi_codec.h
Log Message:
Fix GENERIC64 build
To generate a diff of this commit:
cvs rdiff -u -r1.13 -r1.14 src/sys/arch/arm/sunxi/sunxi_codec.c
cvs rdiff -u -r1.7 -r1.8 src/sys/arch/arm/sunxi/sunxi_codec.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/sunxi/sunxi_codec.c
diff -u src/sys/arch/arm/sunxi/sunxi_codec.c:1.13 src/sys/arch/arm/sunxi/sunxi_codec.c:1.14
--- src/sys/arch/arm/sunxi/sunxi_codec.c:1.13 Wed May 5 10:24:04 2021
+++ src/sys/arch/arm/sunxi/sunxi_codec.c Wed May 5 20:58:03 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: sunxi_codec.c,v 1.13 2021/05/05 10:24:04 jmcneill Exp $ */
+/* $NetBSD: sunxi_codec.c,v 1.14 2021/05/05 20:58:03 jmcneill Exp $ */
/*-
* Copyright (c) 2014-2017 Jared McNeill
@@ -29,7 +29,7 @@
#include "opt_ddb.h"
#include
-__KERNEL_RCSID(0, "$NetBSD: sunxi_codec.c,v 1.13 2021/05/05 10:24:04 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: sunxi_codec.c,v 1.14 2021/05/05 20:58:03 jmcneill Exp $");
#include
#include
@@ -89,10 +89,10 @@ __KERNEL_RCSID(0, "$NetBSD: sunxi_codec.
#define AC_ADC_CNT(_sc) ((_sc)->sc_cfg->ADC_CNT)
static const struct device_compatible_entry compat_data[] = {
- A10_CODEC_COMPATDATA,
- A31_CODEC_COMPATDATA,
- H3_CODEC_COMPATDATA,
- V3S_CODEC_COMPATDATA,
+ A10_CODEC_COMPATDATA
+ A31_CODEC_COMPATDATA
+ H3_CODEC_COMPATDATA
+ V3S_CODEC_COMPATDATA
DEVICE_COMPAT_EOL
};
Index: src/sys/arch/arm/sunxi/sunxi_codec.h
diff -u src/sys/arch/arm/sunxi/sunxi_codec.h:1.7 src/sys/arch/arm/sunxi/sunxi_codec.h:1.8
--- src/sys/arch/arm/sunxi/sunxi_codec.h:1.7 Wed May 5 10:24:04 2021
+++ src/sys/arch/arm/sunxi/sunxi_codec.h Wed May 5 20:58:03 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: sunxi_codec.h,v 1.7 2021/05/05 10:24:04 jmcneill Exp $ */
+/* $NetBSD: sunxi_codec.h,v 1.8 2021/05/05 20:58:03 jmcneill Exp $ */
/*-
* Copyright (c) 2014-2017 Jared McNeill
@@ -121,7 +121,7 @@ struct sunxi_codec_softc {
extern const struct sunxi_codec_conf sun8i_h3_codecconf;
#define H3_CODEC_COMPATDATA \
{ .compat = "allwinner,sun8i-h3-codec",\
- .data = _h3_codecconf }
+ .data = _h3_codecconf },
#else
#define H3_CODEC_COMPATDATA
#endif
@@ -130,7 +130,7 @@ extern const struct sunxi_codec_conf sun
extern const struct sunxi_codec_conf sun8i_v3s_codecconf;
#define V3S_CODEC_COMPATDATA \
{ .compat = "allwinner,sun8i-v3s-codec", \
- .data = _v3s_codecconf }
+ .data = _v3s_codecconf },
#else
#define V3S_CODEC_COMPATDATA
#endif
@@ -140,11 +140,11 @@ extern const struct sunxi_codec_conf sun
{ .compat = "allwinner,sun4i-a10-codec", \
.data = _a10_codecconf }, \
{ .compat = "allwinner,sun7i-a20-codec", \
- .data = _a10_codecconf }
+ .data = _a10_codecconf },
extern const struct sunxi_codec_conf sun6i_a31_codecconf;
#define A31_CODEC_COMPATDATA \
{ .compat = "allwinner,sun6i-a31-codec", \
- .data = _a31_codecconf }
+ .data = _a31_codecconf },
#endif /* !_ARM_SUNXI_CODEC_H */
CVS commit: src/sys/arch/arm/include/arm32
Module Name:src
Committed By: skrll
Date: Tue May 4 09:02:21 UTC 2021
Modified Files:
src/sys/arch/arm/include/arm32: pmap.h
Log Message:
Provide pte_{value,valid_p}
To generate a diff of this commit:
cvs rdiff -u -r1.169 -r1.170 src/sys/arch/arm/include/arm32/pmap.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/include/arm32/pmap.h
diff -u src/sys/arch/arm/include/arm32/pmap.h:1.169 src/sys/arch/arm/include/arm32/pmap.h:1.170
--- src/sys/arch/arm/include/arm32/pmap.h:1.169 Fri Oct 30 18:54:36 2020
+++ src/sys/arch/arm/include/arm32/pmap.h Tue May 4 09:02:21 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: pmap.h,v 1.169 2020/10/30 18:54:36 skrll Exp $ */
+/* $NetBSD: pmap.h,v 1.170 2021/05/04 09:02:21 skrll Exp $ */
/*
* Copyright (c) 2002, 2003 Wasabi Systems, Inc.
@@ -627,6 +627,20 @@ l2pte_reset(pt_entry_t *ptep)
#define pmap_pte_v(pte) l2pte_valid_p(*(pte))
#define pmap_pte_pa(pte) l2pte_pa(*(pte))
+static inline uint32_t
+pte_value(pt_entry_t pte)
+{
+ return pte;
+}
+
+static inline bool
+pte_valid_p(pt_entry_t pte)
+{
+
+ return l2pte_valid_p(pte);
+}
+
+
/* Size of the kernel part of the L1 page table */
#define KERNEL_PD_SIZE \
(L1_TABLE_SIZE - (KERNEL_BASE >> L1_S_SHIFT) * sizeof(pd_entry_t))
CVS commit: src/sys/arch/arm/broadcom
Module Name:src
Committed By: tnn
Date: Mon May 3 18:56:38 UTC 2021
Modified Files:
src/sys/arch/arm/broadcom: bcm2838_pcie.c
Log Message:
bcm2838_pcie: match brcm,bcm2711-pcie
To generate a diff of this commit:
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/arm/broadcom/bcm2838_pcie.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/broadcom/bcm2838_pcie.c
diff -u src/sys/arch/arm/broadcom/bcm2838_pcie.c:1.2 src/sys/arch/arm/broadcom/bcm2838_pcie.c:1.3
--- src/sys/arch/arm/broadcom/bcm2838_pcie.c:1.2 Sat Apr 24 23:36:26 2021
+++ src/sys/arch/arm/broadcom/bcm2838_pcie.c Mon May 3 18:56:38 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: bcm2838_pcie.c,v 1.2 2021/04/24 23:36:26 thorpej Exp $ */
+/* $NetBSD: bcm2838_pcie.c,v 1.3 2021/05/03 18:56:38 tnn Exp $ */
/*-
* Copyright (c) 2020 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: bcm2838_pcie.c,v 1.2 2021/04/24 23:36:26 thorpej Exp $");
+__KERNEL_RCSID(0, "$NetBSD: bcm2838_pcie.c,v 1.3 2021/05/03 18:56:38 tnn Exp $");
#include
#include
@@ -156,6 +156,7 @@ stb_setbits(struct bcmstb_softc *sc, int
static const struct device_compatible_entry compat_data[] = {
{ .compat = "brcm,pci-plat-dev" },
+ { .compat = "brcm,bcm2711-pcie" },
DEVICE_COMPAT_EOL
};
CVS commit: src/sys/arch/arm/rockchip
Module Name:src Committed By: mrg Date: Wed Apr 28 04:51:41 UTC 2021 Modified Files: src/sys/arch/arm/rockchip: rk_drm.c Log Message: for big endian kernels use DRM_FORMAT_BGRX pixel format. now my pinebook pro console looks right with evbarm64-eb, instead of having red and green swapped, and no blue. fixes both console "text" mode and X11. To generate a diff of this commit: cvs rdiff -u -r1.5 -r1.6 src/sys/arch/arm/rockchip/rk_drm.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/rockchip/rk_drm.c diff -u src/sys/arch/arm/rockchip/rk_drm.c:1.5 src/sys/arch/arm/rockchip/rk_drm.c:1.6 --- src/sys/arch/arm/rockchip/rk_drm.c:1.5 Sat Apr 24 23:36:28 2021 +++ src/sys/arch/arm/rockchip/rk_drm.c Wed Apr 28 04:51:41 2021 @@ -1,4 +1,4 @@ -/* $NetBSD: rk_drm.c,v 1.5 2021/04/24 23:36:28 thorpej Exp $ */ +/* $NetBSD: rk_drm.c,v 1.6 2021/04/28 04:51:41 mrg Exp $ */ /*- * Copyright (c) 2019 Jared D. McNeill @@ -27,7 +27,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: rk_drm.c,v 1.5 2021/04/24 23:36:28 thorpej Exp $"); +__KERNEL_RCSID(0, "$NetBSD: rk_drm.c,v 1.6 2021/04/28 04:51:41 mrg Exp $"); #include #include @@ -330,7 +330,11 @@ rk_drm_fb_probe(struct drm_fb_helper *he fb->offsets[0] = 0; fb->width = width; fb->height = height; +#ifdef __ARM_BIG_ENDIAN + fb->pixel_format = DRM_FORMAT_BGRX; +#else fb->pixel_format = DRM_FORMAT_XRGB; +#endif drm_fb_get_bpp_depth(fb->pixel_format, >depth, >bits_per_pixel); error = drm_framebuffer_init(ddev, fb, _drm_framebuffer_funcs);
CVS commit: src/sys/arch/arm/include
Module Name:src
Committed By: skrll
Date: Tue Apr 27 06:03:09 UTC 2021
Modified Files:
src/sys/arch/arm/include: lock.h
Log Message:
Fix the barrier confusion. From Riastradh - thanks!.
To generate a diff of this commit:
cvs rdiff -u -r1.37 -r1.38 src/sys/arch/arm/include/lock.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/include/lock.h
diff -u src/sys/arch/arm/include/lock.h:1.37 src/sys/arch/arm/include/lock.h:1.38
--- src/sys/arch/arm/include/lock.h:1.37 Mon Apr 26 16:35:54 2021
+++ src/sys/arch/arm/include/lock.h Tue Apr 27 06:03:09 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: lock.h,v 1.37 2021/04/26 16:35:54 skrll Exp $ */
+/* $NetBSD: lock.h,v 1.38 2021/04/27 06:03:09 skrll Exp $ */
/*-
* Copyright (c) 2000, 2001 The NetBSD Foundation, Inc.
@@ -131,32 +131,34 @@ __swp(int __val, __cpu_simple_lock_t *__
}
#endif /* !_ARM_ARCH_6 */
+/* load/dmb implies load-acquire */
static __inline void
-__arm_membar_producer(void)
+__arm_load_dmb(void)
{
#if defined(_ARM_ARCH_7)
- __asm __volatile("dsb" ::: "memory");
+ __asm __volatile("dmb ish" ::: "memory");
#elif defined(_ARM_ARCH_6)
- __asm __volatile("mcr\tp15,0,%0,c7,c10,4" :: "r"(0) : "memory");
+ __asm __volatile("mcr\tp15,0,%0,c7,c10,5" :: "r"(0) : "memory");
#endif
}
+/* dmb/store implies store-release */
static __inline void
-__arm_membar_consumer(void)
+__arm_dmb_store(void)
{
#if defined(_ARM_ARCH_7)
- __asm __volatile("dmb" ::: "memory");
+ __asm __volatile("dmb ish" ::: "memory");
#elif defined(_ARM_ARCH_6)
__asm __volatile("mcr\tp15,0,%0,c7,c10,5" :: "r"(0) : "memory");
#endif
}
+
static __inline void __unused
__cpu_simple_lock_init(__cpu_simple_lock_t *__alp)
{
*__alp = __SIMPLELOCK_UNLOCKED;
- __arm_membar_producer();
}
#if !defined(__thumb__) || defined(_ARM_ARCH_T2)
@@ -164,12 +166,11 @@ static __inline void __unused
__cpu_simple_lock(__cpu_simple_lock_t *__alp)
{
#if defined(_ARM_ARCH_6)
- __arm_membar_consumer();
do {
/* spin */
} while (__arm_load_exclusive(__alp) != __SIMPLELOCK_UNLOCKED
|| __arm_store_exclusive(__alp, __SIMPLELOCK_LOCKED));
- __arm_membar_producer();
+ __arm_load_dmb();
#else
while (__swp(__SIMPLELOCK_LOCKED, __alp) != __SIMPLELOCK_UNLOCKED)
continue;
@@ -184,13 +185,12 @@ static __inline int __unused
__cpu_simple_lock_try(__cpu_simple_lock_t *__alp)
{
#if defined(_ARM_ARCH_6)
- __arm_membar_consumer();
do {
if (__arm_load_exclusive(__alp) != __SIMPLELOCK_UNLOCKED) {
return 0;
}
} while (__arm_store_exclusive(__alp, __SIMPLELOCK_LOCKED));
- __arm_membar_producer();
+ __arm_load_dmb();
return 1;
#else
return (__swp(__SIMPLELOCK_LOCKED, __alp) == __SIMPLELOCK_UNLOCKED);
@@ -213,9 +213,8 @@ __cpu_simple_unlock(__cpu_simple_lock_t
:: "r"(__SIMPLELOCK_UNLOCKED), "r"(__alp) : "memory");
}
#else
- __arm_membar_consumer();
+ __arm_dmb_store();
*__alp = __SIMPLELOCK_UNLOCKED;
- __arm_membar_producer();
#endif
}
CVS commit: src/sys/arch/arm/include
Module Name:src
Committed By: skrll
Date: Mon Apr 26 16:35:54 UTC 2021
Modified Files:
src/sys/arch/arm/include: lock.h
Log Message:
Change #ifdef FOO to #if defined(FOO). NFCI.
To generate a diff of this commit:
cvs rdiff -u -r1.36 -r1.37 src/sys/arch/arm/include/lock.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/include/lock.h
diff -u src/sys/arch/arm/include/lock.h:1.36 src/sys/arch/arm/include/lock.h:1.37
--- src/sys/arch/arm/include/lock.h:1.36 Sat Apr 24 07:58:12 2021
+++ src/sys/arch/arm/include/lock.h Mon Apr 26 16:35:54 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: lock.h,v 1.36 2021/04/24 07:58:12 skrll Exp $ */
+/* $NetBSD: lock.h,v 1.37 2021/04/26 16:35:54 skrll Exp $ */
/*-
* Copyright (c) 2000, 2001 The NetBSD Foundation, Inc.
@@ -65,7 +65,7 @@ __cpu_simple_lock_set(__cpu_simple_lock_
*__ptr = __SIMPLELOCK_LOCKED;
}
-#ifdef _ARM_ARCH_6
+#if defined(_ARM_ARCH_6)
static __inline unsigned int
__arm_load_exclusive(__cpu_simple_lock_t *__alp)
{
@@ -134,7 +134,7 @@ __swp(int __val, __cpu_simple_lock_t *__
static __inline void
__arm_membar_producer(void)
{
-#ifdef _ARM_ARCH_7
+#if defined(_ARM_ARCH_7)
__asm __volatile("dsb" ::: "memory");
#elif defined(_ARM_ARCH_6)
__asm __volatile("mcr\tp15,0,%0,c7,c10,4" :: "r"(0) : "memory");
@@ -144,7 +144,7 @@ __arm_membar_producer(void)
static __inline void
__arm_membar_consumer(void)
{
-#ifdef _ARM_ARCH_7
+#if defined(_ARM_ARCH_7)
__asm __volatile("dmb" ::: "memory");
#elif defined(_ARM_ARCH_6)
__asm __volatile("mcr\tp15,0,%0,c7,c10,5" :: "r"(0) : "memory");
@@ -163,7 +163,7 @@ __cpu_simple_lock_init(__cpu_simple_lock
static __inline void __unused
__cpu_simple_lock(__cpu_simple_lock_t *__alp)
{
-#ifdef _ARM_ARCH_6
+#if defined(_ARM_ARCH_6)
__arm_membar_consumer();
do {
/* spin */
@@ -183,7 +183,7 @@ void __cpu_simple_lock(__cpu_simple_lock
static __inline int __unused
__cpu_simple_lock_try(__cpu_simple_lock_t *__alp)
{
-#ifdef _ARM_ARCH_6
+#if defined(_ARM_ARCH_6)
__arm_membar_consumer();
do {
if (__arm_load_exclusive(__alp) != __SIMPLELOCK_UNLOCKED) {
@@ -204,7 +204,7 @@ static __inline void __unused
__cpu_simple_unlock(__cpu_simple_lock_t *__alp)
{
-#ifdef _ARM_ARCH_8
+#if defined(_ARM_ARCH_8)
if (sizeof(*__alp) == 1) {
__asm __volatile("stlrb\t%w0, [%1]"
:: "r"(__SIMPLELOCK_UNLOCKED), "r"(__alp) : "memory");
CVS commit: src/sys/arch/arm/fdt
Module Name:src
Committed By: thorpej
Date: Mon Apr 26 14:44:16 UTC 2021
Modified Files:
src/sys/arch/arm/fdt: files.fdt
Log Message:
armfdt does not need its own interface attribute; all of its children
attach to the "fdt" interface attribute.
To generate a diff of this commit:
cvs rdiff -u -r1.32 -r1.33 src/sys/arch/arm/fdt/files.fdt
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/fdt/files.fdt
diff -u src/sys/arch/arm/fdt/files.fdt:1.32 src/sys/arch/arm/fdt/files.fdt:1.33
--- src/sys/arch/arm/fdt/files.fdt:1.32 Sat Oct 10 15:25:31 2020
+++ src/sys/arch/arm/fdt/files.fdt Mon Apr 26 14:44:16 2021
@@ -1,8 +1,8 @@
-# $NetBSD: files.fdt,v 1.32 2020/10/10 15:25:31 jmcneill Exp $
+# $NetBSD: files.fdt,v 1.33 2021/04/26 14:44:16 thorpej Exp $
include "dev/pckbport/files.pckbport"
-device armfdt { }: bus_space_generic, fdt
+device armfdt: bus_space_generic, fdt
attach armfdt at root with arm_fdt
file arch/arm/fdt/arm_fdt.c arm_fdt
file arch/arm/fdt/arm_platform.c arm_fdt & gtmr_fdt & psci_fdt
CVS commit: src/sys/arch/arm
Module Name:src
Committed By: riastradh
Date: Sat Apr 24 13:01:35 UTC 2021
Modified Files:
src/sys/arch/arm/dts: sun50i-h5.dtsi
src/sys/arch/arm/sunxi: sun8i_crypto.c sun8i_h3_ccu.c
Log Message:
arm/sunxi: Wire up sun8icrypto(4) on Allwinner H5.
Tested on NanoPi Neo PLUS2.
To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/dts/sun50i-h5.dtsi
cvs rdiff -u -r1.23 -r1.24 src/sys/arch/arm/sunxi/sun8i_crypto.c
cvs rdiff -u -r1.17 -r1.18 src/sys/arch/arm/sunxi/sun8i_h3_ccu.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/dts/sun50i-h5.dtsi
diff -u src/sys/arch/arm/dts/sun50i-h5.dtsi:1.1 src/sys/arch/arm/dts/sun50i-h5.dtsi:1.2
--- src/sys/arch/arm/dts/sun50i-h5.dtsi:1.1 Sun Jan 28 18:31:15 2018
+++ src/sys/arch/arm/dts/sun50i-h5.dtsi Sat Apr 24 13:01:35 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: sun50i-h5.dtsi,v 1.1 2018/01/28 18:31:15 jmcneill Exp $ */
+/* $NetBSD: sun50i-h5.dtsi,v 1.2 2021/04/24 13:01:35 riastradh Exp $ */
/*-
* Copyright (c) 2018 Jared McNeill
@@ -28,6 +28,19 @@
#include "sun8i-h3.dtsi"
+/ {
+ soc {
+ crypto: crypto@1c15000 {
+ compatible = "allwinner,sun50i-h5-crypto";
+ reg = <0x01c15000 0x1000>;
+ interrupts = ;
+ clocks = < CLK_BUS_CE>, < CLK_CE>;
+ clock-names = "bus", "mod";
+ resets = < RST_BUS_CE>;
+ };
+ };
+};
+
{
compatible = "allwinner,sun50i-h5-ts";
};
Index: src/sys/arch/arm/sunxi/sun8i_crypto.c
diff -u src/sys/arch/arm/sunxi/sun8i_crypto.c:1.23 src/sys/arch/arm/sunxi/sun8i_crypto.c:1.24
--- src/sys/arch/arm/sunxi/sun8i_crypto.c:1.23 Wed Jan 27 03:10:20 2021
+++ src/sys/arch/arm/sunxi/sun8i_crypto.c Sat Apr 24 13:01:35 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: sun8i_crypto.c,v 1.23 2021/01/27 03:10:20 thorpej Exp $ */
+/* $NetBSD: sun8i_crypto.c,v 1.24 2021/04/24 13:01:35 riastradh Exp $ */
/*-
* Copyright (c) 2019 The NetBSD Foundation, Inc.
@@ -43,7 +43,7 @@
*/
#include
-__KERNEL_RCSID(1, "$NetBSD: sun8i_crypto.c,v 1.23 2021/01/27 03:10:20 thorpej Exp $");
+__KERNEL_RCSID(1, "$NetBSD: sun8i_crypto.c,v 1.24 2021/04/24 13:01:35 riastradh Exp $");
#include
#include
@@ -320,6 +320,7 @@ CFATTACH_DECL_NEW(sun8i_crypto, sizeof(s
static const struct device_compatible_entry compat_data[] = {
{ .compat = "allwinner,sun50i-a64-crypto" },
+ { .compat = "allwinner,sun50i-h5-crypto" },
DEVICE_COMPAT_EOL
};
Index: src/sys/arch/arm/sunxi/sun8i_h3_ccu.c
diff -u src/sys/arch/arm/sunxi/sun8i_h3_ccu.c:1.17 src/sys/arch/arm/sunxi/sun8i_h3_ccu.c:1.18
--- src/sys/arch/arm/sunxi/sun8i_h3_ccu.c:1.17 Wed Jan 27 03:10:20 2021
+++ src/sys/arch/arm/sunxi/sun8i_h3_ccu.c Sat Apr 24 13:01:35 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: sun8i_h3_ccu.c,v 1.17 2021/01/27 03:10:20 thorpej Exp $ */
+/* $NetBSD: sun8i_h3_ccu.c,v 1.18 2021/04/24 13:01:35 riastradh Exp $ */
/*-
* Copyright (c) 2017 Jared McNeill
@@ -29,7 +29,7 @@
#include
-__KERNEL_RCSID(1, "$NetBSD: sun8i_h3_ccu.c,v 1.17 2021/01/27 03:10:20 thorpej Exp $");
+__KERNEL_RCSID(1, "$NetBSD: sun8i_h3_ccu.c,v 1.18 2021/04/24 13:01:35 riastradh Exp $");
#include
#include
@@ -60,6 +60,7 @@ __KERNEL_RCSID(1, "$NetBSD: sun8i_h3_ccu
#define SDMMC0_CLK_REG 0x088
#define SDMMC1_CLK_REG 0x08c
#define SDMMC2_CLK_REG 0x090
+#define CE_CLK_REG 0x09c
#define SPI0_CLK_REG 0x0a0
#define SPI1_CLK_REG 0x0a4
#define USBPHY_CFG_REG 0x0cc
@@ -154,6 +155,7 @@ static const char *ahb1_parents[] = { "l
static const char *ahb2_parents[] = { "ahb1", "pll_periph0" };
static const char *apb1_parents[] = { "ahb1" };
static const char *apb2_parents[] = { "losc", "hosc", "pll_periph0" };
+static const char *ce_parents[] = { "hosc", "pll_periph0_2x", "pll_periph1_2x" };
static const char *mod_parents[] = { "hosc", "pll_periph0", "pll_periph1" };
static const char *ths_parents[] = { "hosc" };
static const char *de_parents[] = { "pll_periph0_2x", "pll_de" };
@@ -329,6 +331,14 @@ static struct sunxi_ccu_clk sun8i_h3_ccu
0, /* enable */
SUNXI_CCU_NM_POWER_OF_TWO),
+ SUNXI_CCU_NM(H3_CLK_CE, "ce", ce_parents,
+ CE_CLK_REG, /* reg */
+ __BITS(17,16), /* n */
+ __BITS(3,0), /* m */
+ __BITS(25,24), /* sel */
+ __BIT(31), /* enable */
+ SUNXI_CCU_NM_POWER_OF_TWO|SUNXI_CCU_NM_ROUND_DOWN),
+
SUNXI_CCU_DIV_GATE(H3_CLK_THS, "ths", ths_parents,
THS_CLK_REG, /* reg */
__BITS(1,0), /* div */
@@ -400,6 +410,8 @@ static struct sunxi_ccu_clk sun8i_h3_ccu
__BIT(31), /* enable */
0),
+ SUNXI_CCU_GATE(H3_CLK_BUS_CE, "bus-ce", "ahb1",
+ BUS_CLK_GATING_REG0, 5),
SUNXI_CCU_GATE(H3_CLK_BUS_DMA, "bus-dma", "ahb1",
BUS_CLK_GATING_REG0, 6),
SUNXI_CCU_GATE(H3_CLK_BUS_MMC0, "bus-mmc0", "ahb1",
CVS commit: src/sys/arch/arm/include
Module Name:src
Committed By: skrll
Date: Sat Apr 24 07:58:12 UTC 2021
Modified Files:
src/sys/arch/arm/include: lock.h
Log Message:
Fix ARMv8 instructions
To generate a diff of this commit:
cvs rdiff -u -r1.35 -r1.36 src/sys/arch/arm/include/lock.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/include/lock.h
diff -u src/sys/arch/arm/include/lock.h:1.35 src/sys/arch/arm/include/lock.h:1.36
--- src/sys/arch/arm/include/lock.h:1.35 Sat Apr 24 06:38:39 2021
+++ src/sys/arch/arm/include/lock.h Sat Apr 24 07:58:12 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: lock.h,v 1.35 2021/04/24 06:38:39 skrll Exp $ */
+/* $NetBSD: lock.h,v 1.36 2021/04/24 07:58:12 skrll Exp $ */
/*-
* Copyright (c) 2000, 2001 The NetBSD Foundation, Inc.
@@ -206,10 +206,10 @@ __cpu_simple_unlock(__cpu_simple_lock_t
#ifdef _ARM_ARCH_8
if (sizeof(*__alp) == 1) {
- __asm __volatile("stlb\t%0, [%1]"
+ __asm __volatile("stlrb\t%w0, [%1]"
:: "r"(__SIMPLELOCK_UNLOCKED), "r"(__alp) : "memory");
} else {
- __asm __volatile("stl\t%0, [%1]"
+ __asm __volatile("stlr\t%0, [%1]"
:: "r"(__SIMPLELOCK_UNLOCKED), "r"(__alp) : "memory");
}
#else
CVS commit: src/sys/arch/arm/include
Module Name:src Committed By: skrll Date: Sat Apr 24 06:38:39 UTC 2021 Modified Files: src/sys/arch/arm/include: lock.h Log Message: G/C To generate a diff of this commit: cvs rdiff -u -r1.34 -r1.35 src/sys/arch/arm/include/lock.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/include/lock.h diff -u src/sys/arch/arm/include/lock.h:1.34 src/sys/arch/arm/include/lock.h:1.35 --- src/sys/arch/arm/include/lock.h:1.34 Fri Nov 29 20:05:19 2019 +++ src/sys/arch/arm/include/lock.h Sat Apr 24 06:38:39 2021 @@ -1,4 +1,4 @@ -/* $NetBSD: lock.h,v 1.34 2019/11/29 20:05:19 riastradh Exp $ */ +/* $NetBSD: lock.h,v 1.35 2021/04/24 06:38:39 skrll Exp $ */ /*- * Copyright (c) 2000, 2001 The NetBSD Foundation, Inc. @@ -65,11 +65,6 @@ __cpu_simple_lock_set(__cpu_simple_lock_ *__ptr = __SIMPLELOCK_LOCKED; } -#ifdef _KERNEL -/* XXX Formerly included for obsolete mb_* API, maybe no longer needed. */ -#include -#endif - #ifdef _ARM_ARCH_6 static __inline unsigned int __arm_load_exclusive(__cpu_simple_lock_t *__alp)
CVS commit: src/sys/arch/arm/include
Module Name:src
Committed By: skrll
Date: Fri Apr 23 06:02:48 UTC 2021
Modified Files:
src/sys/arch/arm/include: bus_defs.h
Log Message:
Trialing whitespace
To generate a diff of this commit:
cvs rdiff -u -r1.15 -r1.16 src/sys/arch/arm/include/bus_defs.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/include/bus_defs.h
diff -u src/sys/arch/arm/include/bus_defs.h:1.15 src/sys/arch/arm/include/bus_defs.h:1.16
--- src/sys/arch/arm/include/bus_defs.h:1.15 Mon Apr 13 07:09:51 2020
+++ src/sys/arch/arm/include/bus_defs.h Fri Apr 23 06:02:48 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: bus_defs.h,v 1.15 2020/04/13 07:09:51 maxv Exp $ */
+/* $NetBSD: bus_defs.h,v 1.16 2021/04/23 06:02:48 skrll Exp $ */
/*-
* Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc.
@@ -157,7 +157,7 @@ struct bus_space {
bus_size_t, uint32_t *, bus_size_t);
void (*bs_rm_8)(void *, bus_space_handle_t,
bus_size_t, uint64_t *, bus_size_t);
-
+
/* read region */
void (*bs_rr_1)(void *, bus_space_handle_t,
bus_size_t, uint8_t *, bus_size_t);
CVS commit: src/sys/arch/arm/cortex
Module Name:src
Committed By: jmcneill
Date: Sun Mar 28 11:13:24 UTC 2021
Modified Files:
src/sys/arch/arm/cortex: gicv3.c
Log Message:
Disable 1ofN distribution of SPIs by default. This is a workaround for an
issue in the USB stack -- signaling transfer complete on multiple PEs can
cause transfer completions to be processed out of order.
To generate a diff of this commit:
cvs rdiff -u -r1.43 -r1.44 src/sys/arch/arm/cortex/gicv3.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/cortex/gicv3.c
diff -u src/sys/arch/arm/cortex/gicv3.c:1.43 src/sys/arch/arm/cortex/gicv3.c:1.44
--- src/sys/arch/arm/cortex/gicv3.c:1.43 Tue Feb 23 10:03:04 2021
+++ src/sys/arch/arm/cortex/gicv3.c Sun Mar 28 11:13:24 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: gicv3.c,v 1.43 2021/02/23 10:03:04 jmcneill Exp $ */
+/* $NetBSD: gicv3.c,v 1.44 2021/03/28 11:13:24 jmcneill Exp $ */
/*-
* Copyright (c) 2018 Jared McNeill
@@ -31,7 +31,7 @@
#define _INTR_PRIVATE
#include
-__KERNEL_RCSID(0, "$NetBSD: gicv3.c,v 1.43 2021/02/23 10:03:04 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: gicv3.c,v 1.44 2021/03/28 11:13:24 jmcneill Exp $");
#include
#include
@@ -65,6 +65,13 @@ __KERNEL_RCSID(0, "$NetBSD: gicv3.c,v 1.
#define GIC_PRIO_SHIFT_NS 4
#define GIC_PRIO_SHIFT_S 3
+/*
+ * Set to true if you want to use 1 of N interrupt distribution for SPIs
+ * when available. Disabled by default because it causes issues with the
+ * USB stack.
+ */
+bool gicv3_use_1ofn = false;
+
static struct gicv3_softc *gicv3_softc;
static inline uint32_t
@@ -195,7 +202,7 @@ gicv3_establish_irq(struct pic_softc *pi
* If 1 of N SPI routing is supported, route MP-safe interrupts to all
* participating PEs. Otherwise, just route to the primary PE.
*/
- if (is->is_mpsafe && GIC_SUPPORTS_1OFN(sc)) {
+ if (is->is_mpsafe && GIC_SUPPORTS_1OFN(sc) && gicv3_use_1ofn) {
irouter = GICD_IROUTER_Interrupt_Routing_mode;
} else {
irouter = sc->sc_irouter[0];
@@ -498,7 +505,7 @@ gicv3_set_affinity(struct pic_softc *pic
const int set = kcpuset_countset(affinity);
if (set == 1) {
irouter = sc->sc_irouter[kcpuset_ffs(affinity) - 1];
- } else if (set == ncpu && GIC_SUPPORTS_1OFN(sc)) {
+ } else if (set == ncpu && GIC_SUPPORTS_1OFN(sc) && gicv3_use_1ofn) {
irouter = GICD_IROUTER_Interrupt_Routing_mode;
} else {
return EINVAL;
CVS commit: src/sys/arch/arm/cortex
Module Name:src
Committed By: skrll
Date: Sun Mar 28 09:11:38 UTC 2021
Modified Files:
src/sys/arch/arm/cortex: gic.c
Log Message:
Only target the boot cpu for real with SPI interrupts. I tried to do
this back in 2014, but somehow I missed a spot.
This is a quick-and-dirty fix for the USB stack which expects transfer
completions to be in-order. If interrupts happen across the CPUs then
this isn't guaranteed (yet).
kern/55243 panic at usb_transfer_complete() on raspberry pi 4
To generate a diff of this commit:
cvs rdiff -u -r1.46 -r1.47 src/sys/arch/arm/cortex/gic.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/cortex/gic.c
diff -u src/sys/arch/arm/cortex/gic.c:1.46 src/sys/arch/arm/cortex/gic.c:1.47
--- src/sys/arch/arm/cortex/gic.c:1.46 Tue Feb 23 10:03:04 2021
+++ src/sys/arch/arm/cortex/gic.c Sun Mar 28 09:11:38 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: gic.c,v 1.46 2021/02/23 10:03:04 jmcneill Exp $ */
+/* $NetBSD: gic.c,v 1.47 2021/03/28 09:11:38 skrll Exp $ */
/*-
* Copyright (c) 2012 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -34,7 +34,7 @@
#define _INTR_PRIVATE
#include
-__KERNEL_RCSID(0, "$NetBSD: gic.c,v 1.46 2021/02/23 10:03:04 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: gic.c,v 1.47 2021/03/28 09:11:38 skrll Exp $");
#include
#include
@@ -517,7 +517,11 @@ armgic_cpu_init_targets(struct armgic_so
if (is != NULL && is->is_mpsafe) {
const u_int byte_shift = 8 * (irq & 3);
uint32_t targets = gicd_read(sc, targets_reg);
+#if 0
targets |= sc->sc_mptargets << byte_shift;
+#else
+ targets |= sc->sc_bptargets << byte_shift;
+#endif
gicd_write(sc, targets_reg, targets);
}
}
CVS commit: src/sys/arch/arm/omap
Module Name:src
Committed By: thorpej
Date: Thu Mar 25 16:34:59 UTC 2021
Modified Files:
src/sys/arch/arm/omap: ti_iic.c
Log Message:
ti_iic_{acquire,release}_bus are no more. Missed in rev 1.11.
To generate a diff of this commit:
cvs rdiff -u -r1.12 -r1.13 src/sys/arch/arm/omap/ti_iic.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/omap/ti_iic.c
diff -u src/sys/arch/arm/omap/ti_iic.c:1.12 src/sys/arch/arm/omap/ti_iic.c:1.13
--- src/sys/arch/arm/omap/ti_iic.c:1.12 Thu May 14 08:34:20 2020
+++ src/sys/arch/arm/omap/ti_iic.c Thu Mar 25 16:34:59 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: ti_iic.c,v 1.12 2020/05/14 08:34:20 msaitoh Exp $ */
+/* $NetBSD: ti_iic.c,v 1.13 2021/03/25 16:34:59 thorpej Exp $ */
/*
* Copyright (c) 2013 Manuel Bouyer. All rights reserved.
@@ -50,7 +50,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: ti_iic.c,v 1.12 2020/05/14 08:34:20 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: ti_iic.c,v 1.13 2021/03/25 16:34:59 thorpej Exp $");
#include "opt_omap.h"
#include "locators.h"
@@ -216,8 +216,6 @@ ti_iic_attach(device_t parent, device_t
iic_tag_init(>sc_ic);
sc->sc_ic.ic_cookie = sc;
- sc->sc_ic.ic_acquire_bus = ti_iic_acquire_bus;
- sc->sc_ic.ic_release_bus = ti_iic_release_bus;
sc->sc_ic.ic_exec = ti_iic_exec;
if (bus_space_map(obio->obio_iot, obio->obio_addr, obio->obio_size,
CVS commit: src/sys/arch/arm/arm32
Module Name:src
Committed By: skrll
Date: Tue Mar 23 10:21:49 UTC 2021
Modified Files:
src/sys/arch/arm/arm32: pmap.c
Log Message:
Another missing kpreempt_enable
To generate a diff of this commit:
cvs rdiff -u -r1.427 -r1.428 src/sys/arch/arm/arm32/pmap.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/arm32/pmap.c
diff -u src/sys/arch/arm/arm32/pmap.c:1.427 src/sys/arch/arm/arm32/pmap.c:1.428
--- src/sys/arch/arm/arm32/pmap.c:1.427 Tue Mar 23 06:35:24 2021
+++ src/sys/arch/arm/arm32/pmap.c Tue Mar 23 10:21:49 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: pmap.c,v 1.427 2021/03/23 06:35:24 skrll Exp $ */
+/* $NetBSD: pmap.c,v 1.428 2021/03/23 10:21:49 skrll Exp $ */
/*
* Copyright 2003 Wasabi Systems, Inc.
@@ -192,7 +192,7 @@
#endif
#include
-__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.427 2021/03/23 06:35:24 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.428 2021/03/23 10:21:49 skrll Exp $");
#include
#include
@@ -3985,6 +3985,8 @@ pmap_extract_coherency(pmap_t pm, vaddr_
*/
KDASSERT(pm == pmap_kernel());
pmap_release_pmap_lock(pm);
+ kpreempt_enable();
+
#if (ARM_MMU_V6 + ARM_MMU_V7) > 0
if (l1pte_supersection_p(pde)) {
pa = (pde & L1_SS_FRAME) | (va & L1_SS_OFFSET);
CVS commit: src/sys/arch/arm/arm32
Module Name:src Committed By: skrll Date: Tue Mar 23 06:35:24 UTC 2021 Modified Files: src/sys/arch/arm/arm32: pmap.c Log Message: Re-enable kpreemption in an error path. Spotted by nat@ To generate a diff of this commit: cvs rdiff -u -r1.426 -r1.427 src/sys/arch/arm/arm32/pmap.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/arm32/pmap.c diff -u src/sys/arch/arm/arm32/pmap.c:1.426 src/sys/arch/arm/arm32/pmap.c:1.427 --- src/sys/arch/arm/arm32/pmap.c:1.426 Sun Mar 14 10:36:46 2021 +++ src/sys/arch/arm/arm32/pmap.c Tue Mar 23 06:35:24 2021 @@ -1,4 +1,4 @@ -/* $NetBSD: pmap.c,v 1.426 2021/03/14 10:36:46 skrll Exp $ */ +/* $NetBSD: pmap.c,v 1.427 2021/03/23 06:35:24 skrll Exp $ */ /* * Copyright 2003 Wasabi Systems, Inc. @@ -192,7 +192,7 @@ #endif #include -__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.426 2021/03/14 10:36:46 skrll Exp $"); +__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.427 2021/03/23 06:35:24 skrll Exp $"); #include #include @@ -3281,6 +3281,8 @@ pmap_enter(pmap_t pm, vaddr_t va, paddr_ pmap_free_l2_bucket(pm, l2b, 0); UVMHIST_LOG(maphist, " <-- done (ENOMEM)", 0, 0, 0, 0); + kpreempt_enable(); + return ENOMEM; } }
CVS commit: src/sys/arch/arm/arm32
Module Name:src
Committed By: skrll
Date: Sun Mar 14 10:36:46 UTC 2021
Modified Files:
src/sys/arch/arm/arm32: pmap.c
Log Message:
Sprinkle kpreempt_{dis,en}able ready for when preemption gets turned on.
To generate a diff of this commit:
cvs rdiff -u -r1.425 -r1.426 src/sys/arch/arm/arm32/pmap.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/arm32/pmap.c
diff -u src/sys/arch/arm/arm32/pmap.c:1.425 src/sys/arch/arm/arm32/pmap.c:1.426
--- src/sys/arch/arm/arm32/pmap.c:1.425 Mon Feb 1 19:02:28 2021
+++ src/sys/arch/arm/arm32/pmap.c Sun Mar 14 10:36:46 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: pmap.c,v 1.425 2021/02/01 19:02:28 skrll Exp $ */
+/* $NetBSD: pmap.c,v 1.426 2021/03/14 10:36:46 skrll Exp $ */
/*
* Copyright 2003 Wasabi Systems, Inc.
@@ -192,7 +192,7 @@
#endif
#include
-__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.425 2021/02/01 19:02:28 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.426 2021/03/14 10:36:46 skrll Exp $");
#include
#include
@@ -2837,6 +2837,7 @@ pmap_page_remove(struct vm_page_md *md,
UVMHIST_FUNC(__func__);
UVMHIST_CALLARGS(maphist, "md %#jx pa %#jx", (uintptr_t)md, pa, 0, 0);
+ kpreempt_disable();
pmap_acquire_page_lock(md);
struct pv_entry **pvp = _FIRST(>pvh_list);
if (*pvp == NULL) {
@@ -2851,6 +2852,8 @@ pmap_page_remove(struct vm_page_md *md,
PMAP_VALIDATE_MD_PAGE(md);
#endif
pmap_release_page_lock(md);
+ kpreempt_enable();
+
return;
}
#if defined(PMAP_CACHE_VIPT) && !defined(ARM_MMU_EXTENDED)
@@ -3004,6 +3007,8 @@ pmap_page_remove(struct vm_page_md *md,
}
cpu_cpwait();
#endif /* ARM_MMU_EXTENDED */
+
+ kpreempt_enable();
}
/*
@@ -3111,6 +3116,7 @@ pmap_enter(pmap_t pm, vaddr_t va, paddr_
if (flags & PMAP_WIRED)
nflags |= PVF_WIRED;
+ kpreempt_disable();
pmap_acquire_pmap_lock(pm);
/*
@@ -3125,6 +3131,8 @@ pmap_enter(pmap_t pm, vaddr_t va, paddr_
if (l2b == NULL) {
if (flags & PMAP_CANFAIL) {
pmap_release_pmap_lock(pm);
+ kpreempt_enable();
+
error = ENOMEM;
goto free_pv;
}
@@ -3419,13 +3427,14 @@ pmap_enter(pmap_t pm, vaddr_t va, paddr_
#endif
pmap_release_pmap_lock(pm);
-
+ kpreempt_enable();
if (old_pv)
pool_put(_pv_pool, old_pv);
free_pv:
if (new_pv)
pool_put(_pv_pool, new_pv);
+
return error;
}
@@ -3470,6 +3479,7 @@ pmap_remove(pmap_t pm, vaddr_t sva, vadd
/*
* we lock in the pmap => pv_head direction
*/
+ kpreempt_disable();
pmap_acquire_pmap_lock(pm);
#ifndef ARM_MMU_EXTENDED
@@ -3637,6 +3647,8 @@ pmap_remove(pmap_t pm, vaddr_t sva, vadd
}
pmap_release_pmap_lock(pm);
+ kpreempt_enable();
+
SLIST_FOREACH_SAFE(pv, _list, pv_link, npv) {
pool_put(_pv_pool, pv);
}
@@ -3709,6 +3721,7 @@ pmap_kenter_pa(vaddr_t va, paddr_t pa, v
flags);
}
+ kpreempt_disable();
pmap_t kpm = pmap_kernel();
pmap_acquire_pmap_lock(kpm);
struct l2_bucket * const l2b = pmap_get_l2_bucket(kpm, va);
@@ -3845,6 +3858,8 @@ pmap_kenter_pa(vaddr_t va, paddr_t pa, v
pool_put(_pv_pool, pv);
#endif
}
+ kpreempt_enable();
+
if (pmap_initialized) {
UVMHIST_LOG(maphist, " <-- done (ptep %#jx: %#jx -> %#jx)",
(uintptr_t)ptep, opte, npte, 0);
@@ -3867,6 +3882,7 @@ pmap_kremove(vaddr_t va, vsize_t len)
const vaddr_t eva = va + len;
pmap_t kpm = pmap_kernel();
+ kpreempt_disable();
pmap_acquire_pmap_lock(kpm);
while (va < eva) {
@@ -3931,6 +3947,8 @@ pmap_kremove(vaddr_t va, vsize_t len)
}
pmap_release_pmap_lock(kpm);
cpu_cpwait();
+ kpreempt_enable();
+
UVMHIST_LOG(maphist, " <--- done (%ju mappings removed)",
total_mappings, 0, 0, 0);
}
@@ -3952,6 +3970,7 @@ pmap_extract_coherency(pmap_t pm, vaddr_
u_int l1slot;
bool coherent;
+ kpreempt_disable();
pmap_acquire_pmap_lock(pm);
l1slot = l1pte_index(va);
@@ -3982,11 +4001,14 @@ pmap_extract_coherency(pmap_t pm, vaddr_
if (l2 == NULL ||
(ptep = l2->l2_bucket[L2_BUCKET(l1slot)].l2b_kva) == NULL) {
pmap_release_pmap_lock(pm);
+ kpreempt_enable();
+
return false;
}
pte = ptep[l2pte_index(va)];
pmap_release_pmap_lock(pm);
+ kpreempt_enable();
if (pte == 0)
return false;
@@ -4023,6 +4045,7 @@ pmap_pv_remove(paddr_t pa)
{
struct pmap_page *pp;
+ KASSERT(kpreempt_disabled());
pp = pmap_pv_tracked(pa);
if (pp == NULL)
panic("pmap_pv_protect: page not pv-tracked: 0x%"PRIxPADDR,
@@ -4064,6 +4087,7 @@ pmap_protect(pmap_t pm, vaddr_t sva, vad
return;
}
+ kpreempt_disable();
pmap_acquire_pmap_lock(pm);
#ifndef ARM_MMU_EXTENDED
@@ -4154,6 +4178,7 @@ pmap_protect(pmap_t pm, vaddr_t sva, vad
#endif
pmap_release_pmap_lock(pm);
+ kpreempt_enable();
}
void
@@ -4364,6 +4389,7 @@ pmap_prefetchabt_fixup(void *v)
out:
kpreempt_enable();
+
return rv;
}
#endif
@@ -4392,6 +4418,7 @@ pmap_fault_fixup(pmap_t pm, vaddr_t va,
(uintptr_t)PMAP_PAI(pm,
CVS commit: src/sys/arch/arm/samsung
Module Name:src
Committed By: skrll
Date: Sun Mar 14 08:16:57 UTC 2021
Modified Files:
src/sys/arch/arm/samsung: exynos_combiner.c exynos_dwcmmc.c
exynos_ehci.c exynos_i2c.c exynos_ohci.c exynos_uart.c mct.c
Log Message:
Use fdtbus_intr_establish_xname
To generate a diff of this commit:
cvs rdiff -u -r1.13 -r1.14 src/sys/arch/arm/samsung/exynos_combiner.c
cvs rdiff -u -r1.14 -r1.15 src/sys/arch/arm/samsung/exynos_dwcmmc.c
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/arm/samsung/exynos_ehci.c
cvs rdiff -u -r1.21 -r1.22 src/sys/arch/arm/samsung/exynos_i2c.c
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/arm/samsung/exynos_ohci.c \
src/sys/arch/arm/samsung/exynos_uart.c
cvs rdiff -u -r1.17 -r1.18 src/sys/arch/arm/samsung/mct.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/samsung/exynos_combiner.c
diff -u src/sys/arch/arm/samsung/exynos_combiner.c:1.13 src/sys/arch/arm/samsung/exynos_combiner.c:1.14
--- src/sys/arch/arm/samsung/exynos_combiner.c:1.13 Wed Jan 27 03:10:19 2021
+++ src/sys/arch/arm/samsung/exynos_combiner.c Sun Mar 14 08:16:57 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: exynos_combiner.c,v 1.13 2021/01/27 03:10:19 thorpej Exp $ */
+/* $NetBSD: exynos_combiner.c,v 1.14 2021/03/14 08:16:57 skrll Exp $ */
/*-
* Copyright (c) 2015 The NetBSD Foundation, Inc.
@@ -35,7 +35,7 @@
#include "gpio.h"
#include
-__KERNEL_RCSID(1, "$NetBSD: exynos_combiner.c,v 1.13 2021/01/27 03:10:19 thorpej Exp $");
+__KERNEL_RCSID(1, "$NetBSD: exynos_combiner.c,v 1.14 2021/03/14 08:16:57 skrll Exp $");
#include
#include
@@ -254,12 +254,13 @@ exynos_combiner_establish(device_t dev,
if (!groupp) {
groupp = exynos_combiner_new_group(sc, group);
if (arg == NULL) {
- groupp->irq_ih = fdtbus_intr_establish(sc->sc_phandle,
- group, ipl /* XXX */, flags, func, NULL);
+ groupp->irq_ih = fdtbus_intr_establish_xname(
+ sc->sc_phandle, group, ipl /* XXX */, flags, func, NULL,
+ device_xname(dev));
} else {
- groupp->irq_ih = fdtbus_intr_establish(sc->sc_phandle,
- group, ipl /* XXX */, FDT_INTR_MPSAFE,
- exynos_combiner_irq, groupp);
+ groupp->irq_ih = fdtbus_intr_establish_xname(
+ sc->sc_phandle, group, ipl /* XXX */, FDT_INTR_MPSAFE,
+ exynos_combiner_irq, groupp, device_xname(dev));
}
KASSERT(groupp->irq_ih != NULL);
groupp->irq_ipl = ipl;
Index: src/sys/arch/arm/samsung/exynos_dwcmmc.c
diff -u src/sys/arch/arm/samsung/exynos_dwcmmc.c:1.14 src/sys/arch/arm/samsung/exynos_dwcmmc.c:1.15
--- src/sys/arch/arm/samsung/exynos_dwcmmc.c:1.14 Wed Jan 27 03:10:19 2021
+++ src/sys/arch/arm/samsung/exynos_dwcmmc.c Sun Mar 14 08:16:57 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: exynos_dwcmmc.c,v 1.14 2021/01/27 03:10:19 thorpej Exp $ */
+/* $NetBSD: exynos_dwcmmc.c,v 1.15 2021/03/14 08:16:57 skrll Exp $ */
/*-
* Copyright (c) 2015 Jared D. McNeill
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: exynos_dwcmmc.c,v 1.14 2021/01/27 03:10:19 thorpej Exp $");
+__KERNEL_RCSID(0, "$NetBSD: exynos_dwcmmc.c,v 1.15 2021/03/14 08:16:57 skrll Exp $");
#include
#include
@@ -165,8 +165,8 @@ exynos_dwcmmc_attach(device_t parent, de
if (dwc_mmc_init(sc) != 0)
return;
- sc->sc_ih = fdtbus_intr_establish(phandle, 0, IPL_BIO, 0,
- dwc_mmc_intr, sc);
+ sc->sc_ih = fdtbus_intr_establish_xname(phandle, 0, IPL_BIO, 0,
+ dwc_mmc_intr, sc, device_xname(self));
if (sc->sc_ih == NULL) {
aprint_error_dev(self, "couldn't establish interrupt on %s\n",
intrstr);
Index: src/sys/arch/arm/samsung/exynos_ehci.c
diff -u src/sys/arch/arm/samsung/exynos_ehci.c:1.5 src/sys/arch/arm/samsung/exynos_ehci.c:1.6
--- src/sys/arch/arm/samsung/exynos_ehci.c:1.5 Wed Jan 27 03:10:19 2021
+++ src/sys/arch/arm/samsung/exynos_ehci.c Sun Mar 14 08:16:57 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: exynos_ehci.c,v 1.5 2021/01/27 03:10:19 thorpej Exp $ */
+/* $NetBSD: exynos_ehci.c,v 1.6 2021/03/14 08:16:57 skrll Exp $ */
/*-
* Copyright (c) 2015-2018 Jared McNeill
@@ -27,7 +27,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: exynos_ehci.c,v 1.5 2021/01/27 03:10:19 thorpej Exp $");
+__KERNEL_RCSID(0, "$NetBSD: exynos_ehci.c,v 1.6 2021/03/14 08:16:57 skrll Exp $");
#include
#include
@@ -126,8 +126,8 @@ exynos_ehci_attach(device_t parent, devi
return;
}
- ih = fdtbus_intr_establish(phandle, 0, IPL_USB, FDT_INTR_MPSAFE,
- ehci_intr, sc);
+ ih = fdtbus_intr_establish_xname(phandle, 0, IPL_USB, FDT_INTR_MPSAFE,
+ ehci_intr, sc, device_xname(self));
if (ih == NULL) {
aprint_error_dev(self, "couldn't establish interrupt on %s\n",
intrstr);
Index: src/sys/arch/arm/samsung/exynos_i2c.c
diff -u src/sys/arch/arm/samsung/exynos_i2c.c:1.21 src/sys/arch/arm/samsung/exynos_i2c.c:1.22
--- src/sys/arch/arm/samsung/exynos_i2c.c:1.21 Wed Jan 27 03:10:19 2021
+++ src/sys/arch/arm/samsung/exynos_i2c.c Sun Mar 14 08:16:57 2021
@@
CVS commit: src/sys/arch/arm/cortex
Module Name:src
Committed By: skrll
Date: Sun Mar 14 08:09:20 UTC 2021
Modified Files:
src/sys/arch/arm/cortex: gic_v2m.c
Log Message:
Remove an unnecessary if statement in gic_v2m_msi_alloc when finding a
'count' that fits the available.
To generate a diff of this commit:
cvs rdiff -u -r1.10 -r1.11 src/sys/arch/arm/cortex/gic_v2m.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/cortex/gic_v2m.c
diff -u src/sys/arch/arm/cortex/gic_v2m.c:1.10 src/sys/arch/arm/cortex/gic_v2m.c:1.11
--- src/sys/arch/arm/cortex/gic_v2m.c:1.10 Fri Dec 11 21:40:50 2020
+++ src/sys/arch/arm/cortex/gic_v2m.c Sun Mar 14 08:09:20 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: gic_v2m.c,v 1.10 2020/12/11 21:40:50 jmcneill Exp $ */
+/* $NetBSD: gic_v2m.c,v 1.11 2021/03/14 08:09:20 skrll Exp $ */
/*-
* Copyright (c) 2018 The NetBSD Foundation, Inc.
@@ -32,7 +32,7 @@
#define _INTR_PRIVATE
#include
-__KERNEL_RCSID(0, "$NetBSD: gic_v2m.c,v 1.10 2020/12/11 21:40:50 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: gic_v2m.c,v 1.11 2021/03/14 08:09:20 skrll Exp $");
#include
#include
@@ -240,10 +240,9 @@ gic_v2m_msi_alloc(struct arm_pci_msi *ms
if (exact && *count > avail)
return NULL;
- while (*count > avail) {
- if (avail < *count)
- (*count) >>= 1;
- }
+ while (*count > avail)
+ (*count) >>= 1;
+
if (*count == 0)
return NULL;
CVS commit: src/sys/arch/arm/broadcom
Module Name:src
Committed By: mlelstv
Date: Wed Mar 10 11:03:49 UTC 2021
Modified Files:
src/sys/arch/arm/broadcom: files.bcm2835
Log Message:
Add PCIe driver to build.
You still need:
bcm2838pcie* at fdt?# STB PCIe host controller
in kernel config, and DTB entries like:
pci@7d50 {
compatible = "brcm,bcm2711-pcie\0brcm,pci-plat-dev";
device_type = "pci";
#address-cells = <0x03>;
#size-cells = <0x02>;
bus-range = <0x00 0x01>;
reg = <0x00 0x7d50 0x8>;
ranges = <0x200 0x00 0xf800 0x06 0x00 0x00 0x400>;
#interrupt-cells = <0x01>;
interrupt-map = <0x00 0x00 0x00 0x01 0x01 0x00 0x8f 0x04>;
interrupt-map-mask = <0x00 0x00 0x00 0x07>;
linux,pci-domain = <0x00>;
phandle = <0x90>;
};
and
pcie0 = "/scb/pci@7d50";
in __symbols__
To generate a diff of this commit:
cvs rdiff -u -r1.39 -r1.40 src/sys/arch/arm/broadcom/files.bcm2835
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/broadcom/files.bcm2835
diff -u src/sys/arch/arm/broadcom/files.bcm2835:1.39 src/sys/arch/arm/broadcom/files.bcm2835:1.40
--- src/sys/arch/arm/broadcom/files.bcm2835:1.39 Tue Mar 31 12:23:17 2020
+++ src/sys/arch/arm/broadcom/files.bcm2835 Wed Mar 10 11:03:48 2021
@@ -1,4 +1,4 @@
-# $NetBSD: files.bcm2835,v 1.39 2020/03/31 12:23:17 jmcneill Exp $
+# $NetBSD: files.bcm2835,v 1.40 2021/03/10 11:03:48 mlelstv Exp $
#
# Configuration info for Broadcom BCM2835 ARM Peripherals
#
@@ -46,6 +46,11 @@ attach bcm2838rng at fdt with bcm2838rng
file arch/arm/broadcom/bcm2838_rng.c bcm2838rng
file dev/ic/rng200.cbcm2838rng
+# Broadcom STB PCIE host
+device bcm2838pcie: pcibus
+attach bcm2838pcie at fdt with bcm2838pcie_fdt
+file arch/arm/broadcom/bcm2838_pcie.c bcm2838pcie
+
# AUX
device bcmaux
attach bcmaux at fdt with bcmaux_fdt
CVS commit: src/sys/arch/arm/broadcom
Module Name:src Committed By: mlelstv Date: Mon Mar 8 14:27:46 UTC 2021 Modified Files: src/sys/arch/arm/broadcom: bcm2835reg.h Log Message: Add comments for 2711 local peripherals To generate a diff of this commit: cvs rdiff -u -r1.31 -r1.32 src/sys/arch/arm/broadcom/bcm2835reg.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/broadcom/bcm2835reg.h diff -u src/sys/arch/arm/broadcom/bcm2835reg.h:1.31 src/sys/arch/arm/broadcom/bcm2835reg.h:1.32 --- src/sys/arch/arm/broadcom/bcm2835reg.h:1.31 Mon Mar 8 14:22:42 2021 +++ src/sys/arch/arm/broadcom/bcm2835reg.h Mon Mar 8 14:27:45 2021 @@ -1,4 +1,4 @@ -/* $NetBSD: bcm2835reg.h,v 1.31 2021/03/08 14:22:42 mlelstv Exp $ */ +/* $NetBSD: bcm2835reg.h,v 1.32 2021/03/08 14:27:45 mlelstv Exp $ */ /*- * Copyright (c) 2012 The NetBSD Foundation, Inc. @@ -179,18 +179,18 @@ #define BCM2836_ARM_LOCAL_BASE 0x4000 #define BCM2836_ARM_LOCAL_SIZE 0x1000 /* 4KBytes */ -#define BCM2836_LOCAL_CONTROL 0x000 +#define BCM2836_LOCAL_CONTROL 0x000 /* ARM_CONTROL */ #define BCM2836_LOCAL_PRESCALER 0x008 -#define BCM2836_LOCAL_GPU_INT_ROUTING 0x00c -#define BCM2836_LOCAL_PM_ROUTING_SET 0x010 -#define BCM2836_LOCAL_PM_ROUTING_CLR 0x014 +#define BCM2836_LOCAL_GPU_INT_ROUTING 0x00c /* CORE_IRQ_CONTROL */ +#define BCM2836_LOCAL_PM_ROUTING_SET 0x010 /* PMU_CONTROL_SET */ +#define BCM2836_LOCAL_PM_ROUTING_CLR 0x014 /* PMU_CONTROL_CLR */ #define BCM2836_LOCAL_TIMER_LS 0x01c #define BCM2836_LOCAL_TIMER_MS 0x020 -#define BCM2836_LOCAL_INT_ROUTING 0x024 +#define BCM2836_LOCAL_INT_ROUTING 0x024 /* PERI_IRQ_ROUTE0 */ #define BCM2836_LOCAL_AXI_COUNT 0x02c -#define BCM2836_LOCAL_AXI_IRQ 0x030 +#define BCM2836_LOCAL_AXI_IRQ 0x030 /* AXI_QUIET_TIME */ #define BCM2836_LOCAL_TIMER_CONTROL 0x034 -#define BCM2836_LOCAL_TIMER_WRITE 0x038 +#define BCM2836_LOCAL_TIMER_WRITE 0x038 /* LOCAL_TIMER_IRQ */ #define BCM2836_LOCAL_TIMER_IRQ_CONTROL_BASE 0x40
CVS commit: src/sys/arch/arm/broadcom
Module Name:src
Committed By: mlelstv
Date: Mon Mar 8 14:22:42 UTC 2021
Modified Files:
src/sys/arch/arm/broadcom: bcm2835_intr.c bcm2835reg.h
Log Message:
Move interrupt register definitions to driver.
To generate a diff of this commit:
cvs rdiff -u -r1.37 -r1.38 src/sys/arch/arm/broadcom/bcm2835_intr.c
cvs rdiff -u -r1.30 -r1.31 src/sys/arch/arm/broadcom/bcm2835reg.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/broadcom/bcm2835_intr.c
diff -u src/sys/arch/arm/broadcom/bcm2835_intr.c:1.37 src/sys/arch/arm/broadcom/bcm2835_intr.c:1.38
--- src/sys/arch/arm/broadcom/bcm2835_intr.c:1.37 Wed Jan 27 03:10:19 2021
+++ src/sys/arch/arm/broadcom/bcm2835_intr.c Mon Mar 8 14:22:42 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: bcm2835_intr.c,v 1.37 2021/01/27 03:10:19 thorpej Exp $ */
+/* $NetBSD: bcm2835_intr.c,v 1.38 2021/03/08 14:22:42 mlelstv Exp $ */
/*-
* Copyright (c) 2012, 2015, 2019 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: bcm2835_intr.c,v 1.37 2021/01/27 03:10:19 thorpej Exp $");
+__KERNEL_RCSID(0, "$NetBSD: bcm2835_intr.c,v 1.38 2021/03/08 14:22:42 mlelstv Exp $");
#define _INTR_PRIVATE
@@ -104,6 +104,49 @@ static int bcm2836mp_int_base[BCM2836_NC
#define BCM2835_INT_BASE bcm2835_int_base
#define BCM2836_INT_BASECPUN(n) bcm2836mp_int_base[(n)]
+#define BCM2836_INT_CNTPSIRQ_CPUN(n) (BCM2836_INT_BASECPUN(n) + BCM2836_INT_CNTPSIRQ)
+#define BCM2836_INT_CNTPNSIRQ_CPUN(n) (BCM2836_INT_BASECPUN(n) + BCM2836_INT_CNTPNSIRQ)
+#define BCM2836_INT_CNTVIRQ_CPUN(n) (BCM2836_INT_BASECPUN(n) + BCM2836_INT_CNTVIRQ)
+#define BCM2836_INT_CNTHPIRQ_CPUN(n) (BCM2836_INT_BASECPUN(n) + BCM2836_INT_CNTHPIRQ)
+#define BCM2836_INT_MAILBOX0_CPUN(n) (BCM2836_INT_BASECPUN(n) + BCM2836_INT_MAILBOX0)
+
+/* Periperal Interrupt sources */
+#define BCM2835_NIRQ 96
+
+#define BCM2835_INT_GPU0BASE (BCM2835_INT_BASE + 0)
+#define BCM2835_INT_TIMER0 (BCM2835_INT_GPU0BASE + 0)
+#define BCM2835_INT_TIMER1 (BCM2835_INT_GPU0BASE + 1)
+#define BCM2835_INT_TIMER2 (BCM2835_INT_GPU0BASE + 2)
+#define BCM2835_INT_TIMER3 (BCM2835_INT_GPU0BASE + 3)
+#define BCM2835_INT_USB (BCM2835_INT_GPU0BASE + 9)
+#define BCM2835_INT_DMA0 (BCM2835_INT_GPU0BASE + 16)
+#define BCM2835_INT_DMA2 (BCM2835_INT_GPU0BASE + 18)
+#define BCM2835_INT_DMA3 (BCM2835_INT_GPU0BASE + 19)
+#define BCM2835_INT_AUX (BCM2835_INT_GPU0BASE + 29)
+#define BCM2835_INT_ARM (BCM2835_INT_GPU0BASE + 30)
+
+#define BCM2835_INT_GPU1BASE (BCM2835_INT_BASE + 32)
+#define BCM2835_INT_GPIO0 (BCM2835_INT_GPU1BASE + 17)
+#define BCM2835_INT_GPIO1 (BCM2835_INT_GPU1BASE + 18)
+#define BCM2835_INT_GPIO2 (BCM2835_INT_GPU1BASE + 19)
+#define BCM2835_INT_GPIO3 (BCM2835_INT_GPU1BASE + 20)
+#define BCM2835_INT_BSC (BCM2835_INT_GPU1BASE + 21)
+#define BCM2835_INT_SPI0 (BCM2835_INT_GPU1BASE + 22)
+#define BCM2835_INT_PCM (BCM2835_INT_GPU1BASE + 23)
+#define BCM2835_INT_SDHOST (BCM2835_INT_GPU1BASE + 24)
+#define BCM2835_INT_UART0 (BCM2835_INT_GPU1BASE + 25)
+#define BCM2835_INT_EMMC (BCM2835_INT_GPU1BASE + 30)
+
+#define BCM2835_INT_BASICBASE (BCM2835_INT_BASE + 64)
+#define BCM2835_INT_ARMTIMER (BCM2835_INT_BASICBASE + 0)
+#define BCM2835_INT_ARMMAILBOX (BCM2835_INT_BASICBASE + 1)
+#define BCM2835_INT_ARMDOORBELL0 (BCM2835_INT_BASICBASE + 2)
+#define BCM2835_INT_ARMDOORBELL1 (BCM2835_INT_BASICBASE + 3)
+#define BCM2835_INT_GPU0HALTED (BCM2835_INT_BASICBASE + 4)
+#define BCM2835_INT_GPU1HALTED (BCM2835_INT_BASICBASE + 5)
+#define BCM2835_INT_ILLEGALTYPE0 (BCM2835_INT_BASICBASE + 6)
+#define BCM2835_INT_ILLEGALTYPE1 (BCM2835_INT_BASICBASE + 7)
+
static void
bcm2835_set_priority(struct pic_softc *pic, int ipl)
{
Index: src/sys/arch/arm/broadcom/bcm2835reg.h
diff -u src/sys/arch/arm/broadcom/bcm2835reg.h:1.30 src/sys/arch/arm/broadcom/bcm2835reg.h:1.31
--- src/sys/arch/arm/broadcom/bcm2835reg.h:1.30 Sat Feb 22 00:17:54 2020
+++ src/sys/arch/arm/broadcom/bcm2835reg.h Mon Mar 8 14:22:42 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: bcm2835reg.h,v 1.30 2020/02/22 00:17:54 jmcneill Exp $ */
+/* $NetBSD: bcm2835reg.h,v 1.31 2021/03/08 14:22:42 mlelstv Exp $ */
/*-
* Copyright (c) 2012 The NetBSD Foundation, Inc.
@@ -165,50 +165,6 @@
#define BCM2836_INT_TIMER 11
#define BCM2836_INT_NLOCAL 12
-#define BCM2836_INT_CNTPSIRQ_CPUN(n) (BCM2836_INT_BASECPUN(n) + BCM2836_INT_CNTPSIRQ)
-#define BCM2836_INT_CNTPNSIRQ_CPUN(n) (BCM2836_INT_BASECPUN(n) + BCM2836_INT_CNTPNSIRQ)
-#define BCM2836_INT_CNTVIRQ_CPUN(n) (BCM2836_INT_BASECPUN(n) + BCM2836_INT_CNTVIRQ)
-#define BCM2836_INT_CNTHPIRQ_CPUN(n) (BCM2836_INT_BASECPUN(n) + BCM2836_INT_CNTHPIRQ)
-#define BCM2836_INT_MAILBOX0_CPUN(n) (BCM2836_INT_BASECPUN(n) + BCM2836_INT_MAILBOX0)
-
-/* Periperal Interrupt sources */
-#define BCM2835_NIRQ 96
-
-#define BCM2835_INT_GPU0BASE (BCM2835_INT_BASE + 0)
-#define BCM2835_INT_TIMER0 (BCM2835_INT_GPU0BASE + 0)
CVS commit: src/sys/arch/arm/broadcom
Module Name:src Committed By: mlelstv Date: Mon Mar 8 13:59:29 UTC 2021 Modified Files: src/sys/arch/arm/broadcom: bcm2835_gpioreg.h Log Message: Undocumented register to multiplex emmc2 pins to legacy sdhc To generate a diff of this commit: cvs rdiff -u -r1.5 -r1.6 src/sys/arch/arm/broadcom/bcm2835_gpioreg.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/broadcom/bcm2835_gpioreg.h diff -u src/sys/arch/arm/broadcom/bcm2835_gpioreg.h:1.5 src/sys/arch/arm/broadcom/bcm2835_gpioreg.h:1.6 --- src/sys/arch/arm/broadcom/bcm2835_gpioreg.h:1.5 Sat Sep 28 07:24:52 2019 +++ src/sys/arch/arm/broadcom/bcm2835_gpioreg.h Mon Mar 8 13:59:29 2021 @@ -1,4 +1,4 @@ -/* $NetBSD: bcm2835_gpioreg.h,v 1.5 2019/09/28 07:24:52 mlelstv Exp $ */ +/* $NetBSD: bcm2835_gpioreg.h,v 1.6 2021/03/08 13:59:29 mlelstv Exp $ */ /* * Copyright (c) 2013 Jonathan A. Kollasch @@ -73,4 +73,8 @@ #define BCM2835_GPIO_ALT2 6 #define BCM2835_GPIO_ALT3 7 +/* Undocumented register to multiplex emmc2 pins to legacy sdhc */ +#define BCM2838_GPIO_MUX 0x0d0 +#define BCM2838_GPIO_MUX_LEGACY 0x2 + #endif /* _BROADCOM_BCM2835_GPIOREG_H_ */
CVS commit: src/sys/arch/arm/broadcom
Module Name:src
Committed By: mlelstv
Date: Mon Mar 8 13:49:02 UTC 2021
Added Files:
src/sys/arch/arm/broadcom: bcm2838_pcie.c bcm2838_pcie.h
Log Message:
RPI4 PCIe driver, based on pcihost_fdt.c
To generate a diff of this commit:
cvs rdiff -u -r0 -r1.1 src/sys/arch/arm/broadcom/bcm2838_pcie.c \
src/sys/arch/arm/broadcom/bcm2838_pcie.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Added files:
Index: src/sys/arch/arm/broadcom/bcm2838_pcie.c
diff -u /dev/null src/sys/arch/arm/broadcom/bcm2838_pcie.c:1.1
--- /dev/null Mon Mar 8 13:49:02 2021
+++ src/sys/arch/arm/broadcom/bcm2838_pcie.c Mon Mar 8 13:49:01 2021
@@ -0,0 +1,872 @@
+/* $NetBSD: bcm2838_pcie.c,v 1.1 2021/03/08 13:49:01 mlelstv Exp $ */
+
+/*-
+ * Copyright (c) 2020 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Michael van Elst
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include
+__KERNEL_RCSID(0, "$NetBSD: bcm2838_pcie.c,v 1.1 2021/03/08 13:49:01 mlelstv Exp $");
+
+#include
+#include
+
+#include
+#include
+#include
+
+#include
+
+#include
+#include
+
+#include
+#include
+
+#define PHYS_HI_RELO __BIT(31)
+#define PHYS_HI_PREFETCH __BIT(30)
+#define PHYS_HI_ALIASED __BIT(29)
+#define PHYS_HI_SPACE __BITS(25,24)
+#define PHYS_HI_SPACE_CFG 0
+#define PHYS_HI_SPACE_IO 1
+#define PHYS_HI_SPACE_MEM32 2
+#define PHYS_HI_SPACE_MEM64 3
+
+#define CFG_OFFSET(b,d,f,r) ((b) << 16 | (d) << 1 | (f) << 8 | (r))
+
+struct bcmstb_busspace {
+ struct bus_space bst;
+ int (*map)(void *, bus_addr_t, bus_size_t,
+int, bus_space_handle_t *);
+ int flags;
+ struct {
+ bus_addr_t bpci;
+ bus_addr_t bbus;
+ bus_size_t size;
+ } ranges[4];
+ size_t nranges;
+};
+
+struct bcmstb_softc {
+bus_space_tag_t sc_bst;
+bus_space_handle_t sc_bsh;
+ bus_dma_tag_t sc_dmat;
+
+kmutex_tsc_lock;
+const char *sc_name;
+
+ int sc_phandle;
+
+ uint32_t sc_bus_min;
+ uint32_t sc_bus_max;
+
+ struct arm32_pci_chipset sc_pc;
+
+ struct bcmstb_busspace sc_io;
+ struct bcmstb_busspace sc_mem;
+
+ int sc_pci_flags;
+};
+
+static void bcmstb_attach(device_t, struct bcmstb_softc *);
+static int bcmstb_config(struct bcmstb_softc *);
+static int bcmstb_setup(struct bcmstb_softc *);
+static void bcmstb_attach_hook(device_t, device_t, struct pcibus_attach_args *);
+static int bcmstb_bus_maxdevs(void *, int);
+static pcitag_t bcmstb_make_tag(void *, int, int, int);
+static void bcmstb_decompose_tag(void *, pcitag_t, int *, int *, int *);
+static u_int bcmstb_get_segment(void *);
+static pcireg_t bcmstb_conf_read(void *, pcitag_t, int);
+static void bcmstb_conf_write(void *, pcitag_t, int, pcireg_t);
+static int bcmstb_conf_hook(void *, int, int, int, pcireg_t);
+static void bcmstb_conf_interrupt(void *, int, int, int, int, int *);
+
+static int bcmstb_intr_map(const struct pci_attach_args *, pci_intr_handle_t *);
+static const char *bcmstb_intr_string(void *, pci_intr_handle_t, char *, size_t);
+static const struct evcnt *bcmstb_intr_evcnt(void *, pci_intr_handle_t);
+static int bcmstb_intr_setattr(void *, pci_intr_handle_t *, int, uint64_t);
+static void *bcmstb_intr_establish(void *, pci_intr_handle_t, int,
+int (*)(void *), void *, const char *);
+static void bcmstb_intr_disestablish(void *, void *);
+static int bcmstb_bus_space_map(void *, bus_addr_t,
+bus_size_t, int, bus_space_handle_t *);
+
+struct bcm2838pcie_softc {
+ device_t sc_dev;
+ struct bcmstb_softc sc_bcmstb;
+};
+
+static int
CVS commit: src/sys/arch/arm/imx
Module Name:src
Committed By: mlelstv
Date: Mon Mar 8 06:23:32 UTC 2021
Modified Files:
src/sys/arch/arm/imx: imxuart.c
Log Message:
always re-read status register in the loop.
To generate a diff of this commit:
cvs rdiff -u -r1.26 -r1.27 src/sys/arch/arm/imx/imxuart.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/imx/imxuart.c
diff -u src/sys/arch/arm/imx/imxuart.c:1.26 src/sys/arch/arm/imx/imxuart.c:1.27
--- src/sys/arch/arm/imx/imxuart.c:1.26 Fri Nov 20 18:16:40 2020
+++ src/sys/arch/arm/imx/imxuart.c Mon Mar 8 06:23:31 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: imxuart.c,v 1.26 2020/11/20 18:16:40 thorpej Exp $ */
+/* $NetBSD: imxuart.c,v 1.27 2021/03/08 06:23:31 mlelstv Exp $ */
/*
* Copyright (c) 2009, 2010 Genetec Corporation. All rights reserved.
@@ -96,7 +96,7 @@
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: imxuart.c,v 1.26 2020/11/20 18:16:40 thorpej Exp $");
+__KERNEL_RCSID(0, "$NetBSD: imxuart.c,v 1.27 2021/03/08 06:23:31 mlelstv Exp $");
#include "opt_imxuart.h"
#include "opt_ddb.h"
@@ -1720,11 +1720,11 @@ imxuintr(void *arg)
cn_check_magic(sc->sc_tty->t_dev,
CNC_BREAK, imxuart_cnm_state);
if (cn_trapped)
-continue;
+goto next;
#if defined(KGDB) && !defined(DDB)
if (ISSET(sc->sc_hwflags, IMXUART_HW_KGDB)) {
kgdb_connect(1);
-continue;
+goto next;
}
#endif
}
@@ -1776,6 +1776,7 @@ imxuintr(void *arg)
}
#endif
+next:
usr2 = bus_space_read_4(iot, ioh, IMX_USR2);
} while (usr2 & (IMX_USR2_RDR|IMX_USR2_BRCD));
CVS commit: src/sys/arch/arm/pic
Module Name:src Committed By: jmcneill Date: Sat Feb 27 14:22:07 UTC 2021 Modified Files: src/sys/arch/arm/pic: picvar.h Log Message: machine/cpufunc.h -> arm/cpufunc.h for the benefit of non-evbarm ports To generate a diff of this commit: cvs rdiff -u -r1.32 -r1.33 src/sys/arch/arm/pic/picvar.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/pic/picvar.h diff -u src/sys/arch/arm/pic/picvar.h:1.32 src/sys/arch/arm/pic/picvar.h:1.33 --- src/sys/arch/arm/pic/picvar.h:1.32 Fri Feb 26 10:06:42 2021 +++ src/sys/arch/arm/pic/picvar.h Sat Feb 27 14:22:07 2021 @@ -1,4 +1,4 @@ -/* $NetBSD: picvar.h,v 1.32 2021/02/26 10:06:42 jmcneill Exp $ */ +/* $NetBSD: picvar.h,v 1.33 2021/02/27 14:22:07 jmcneill Exp $ */ /*- * Copyright (c) 2008 The NetBSD Foundation, Inc. * All rights reserved. @@ -107,7 +107,7 @@ void intr_ipi_send(const kcpuset_t *, u_ #include #include -#include +#include #ifndef PIC_MAXPICS #define PIC_MAXPICS 32
CVS commit: src/sys/arch/arm/pic
Module Name:src
Committed By: jmcneill
Date: Fri Feb 26 10:06:42 UTC 2021
Modified Files:
src/sys/arch/arm/pic: picvar.h
Log Message:
Unfortunately we need to disable interrupts in pic_set_priority to keep
hardware and ci_cpl in sync.
To generate a diff of this commit:
cvs rdiff -u -r1.31 -r1.32 src/sys/arch/arm/pic/picvar.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/pic/picvar.h
diff -u src/sys/arch/arm/pic/picvar.h:1.31 src/sys/arch/arm/pic/picvar.h:1.32
--- src/sys/arch/arm/pic/picvar.h:1.31 Sun Feb 21 17:07:45 2021
+++ src/sys/arch/arm/pic/picvar.h Fri Feb 26 10:06:42 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: picvar.h,v 1.31 2021/02/21 17:07:45 jmcneill Exp $ */
+/* $NetBSD: picvar.h,v 1.32 2021/02/26 10:06:42 jmcneill Exp $ */
/*-
* Copyright (c) 2008 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -107,6 +107,8 @@ void intr_ipi_send(const kcpuset_t *, u_
#include
#include
+#include
+
#ifndef PIC_MAXPICS
#define PIC_MAXPICS 32
#endif
@@ -184,10 +186,14 @@ struct pic_ops {
*/
#define pic_set_priority(ci, newipl) \
do {\
+ register_t __psw = cpsid(I32_bit); \
(ci)->ci_cpl = (newipl);\
if (__predict_true(pic_list[0] != NULL)) { \
(pic_list[0]->pic_ops->pic_set_priority)(pic_list[0], newipl); \
} \
+ if ((__psw & I32_bit) == 0) {\
+ cpsie(I32_bit); \
+ } \
} while (0)
#else
#define pic_set_priority(ci, newipl) ((void)((ci)->ci_cpl = (newipl)))
CVS commit: src/sys/arch/arm/fdt
Module Name:src
Committed By: jmcneill
Date: Tue Feb 23 11:31:52 UTC 2021
Modified Files:
src/sys/arch/arm/fdt: arm_fdt.c
Log Message:
Install a default irq handler that panics when no interrupt controller
driver is installed.
To generate a diff of this commit:
cvs rdiff -u -r1.14 -r1.15 src/sys/arch/arm/fdt/arm_fdt.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/fdt/arm_fdt.c
diff -u src/sys/arch/arm/fdt/arm_fdt.c:1.14 src/sys/arch/arm/fdt/arm_fdt.c:1.15
--- src/sys/arch/arm/fdt/arm_fdt.c:1.14 Wed Jan 27 03:10:19 2021
+++ src/sys/arch/arm/fdt/arm_fdt.c Tue Feb 23 11:31:52 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: arm_fdt.c,v 1.14 2021/01/27 03:10:19 thorpej Exp $ */
+/* $NetBSD: arm_fdt.c,v 1.15 2021/02/23 11:31:52 jmcneill Exp $ */
/*-
* Copyright (c) 2017 Jared D. McNeill
@@ -31,7 +31,7 @@
#include "opt_modular.h"
#include
-__KERNEL_RCSID(0, "$NetBSD: arm_fdt.c,v 1.14 2021/01/27 03:10:19 thorpej Exp $");
+__KERNEL_RCSID(0, "$NetBSD: arm_fdt.c,v 1.15 2021/02/23 11:31:52 jmcneill Exp $");
#include
#include
@@ -56,6 +56,8 @@ __KERNEL_RCSID(0, "$NetBSD: arm_fdt.c,v
static int arm_fdt_match(device_t, cfdata_t, void *);
static void arm_fdt_attach(device_t, device_t, void *);
+static void arm_fdt_irq_default_handler(void *);
+
#ifdef EFI_RUNTIME
static void arm_fdt_efi_init(device_t);
static int arm_fdt_efi_rtc_gettime(todr_chip_handle_t, struct clock_ymdhms *);
@@ -76,7 +78,7 @@ struct arm_fdt_cpu_hatch_cb {
static TAILQ_HEAD(, arm_fdt_cpu_hatch_cb) arm_fdt_cpu_hatch_cbs =
TAILQ_HEAD_INITIALIZER(arm_fdt_cpu_hatch_cbs);
-static void (*_arm_fdt_irq_handler)(void *) = NULL;
+static void (*_arm_fdt_irq_handler)(void *) = arm_fdt_irq_default_handler;
static void (*_arm_fdt_timer_init)(void) = NULL;
int
@@ -169,10 +171,16 @@ arm_fdt_cpu_hatch(struct cpu_info *ci)
c->cb(c->priv, ci);
}
+static void
+arm_fdt_irq_default_handler(void *frame)
+{
+ panic("missing interrupt controller driver");
+}
+
void
arm_fdt_irq_set_handler(void (*irq_handler)(void *))
{
- KASSERT(_arm_fdt_irq_handler == NULL);
+ KASSERT(_arm_fdt_irq_handler == arm_fdt_irq_default_handler);
_arm_fdt_irq_handler = irq_handler;
}
CVS commit: src/sys/arch/arm/cortex
Module Name:src
Committed By: jmcneill
Date: Tue Feb 23 10:03:05 UTC 2021
Modified Files:
src/sys/arch/arm/cortex: gic.c gicv3.c
Log Message:
If we are committing a deferred splhigh() to hardware, no need to continue.
To generate a diff of this commit:
cvs rdiff -u -r1.45 -r1.46 src/sys/arch/arm/cortex/gic.c
cvs rdiff -u -r1.42 -r1.43 src/sys/arch/arm/cortex/gicv3.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/cortex/gic.c
diff -u src/sys/arch/arm/cortex/gic.c:1.45 src/sys/arch/arm/cortex/gic.c:1.46
--- src/sys/arch/arm/cortex/gic.c:1.45 Sun Feb 21 15:45:30 2021
+++ src/sys/arch/arm/cortex/gic.c Tue Feb 23 10:03:04 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: gic.c,v 1.45 2021/02/21 15:45:30 jmcneill Exp $ */
+/* $NetBSD: gic.c,v 1.46 2021/02/23 10:03:04 jmcneill Exp $ */
/*-
* Copyright (c) 2012 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -34,7 +34,7 @@
#define _INTR_PRIVATE
#include
-__KERNEL_RCSID(0, "$NetBSD: gic.c,v 1.45 2021/02/21 15:45:30 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: gic.c,v 1.46 2021/02/23 10:03:04 jmcneill Exp $");
#include
#include
@@ -331,6 +331,9 @@ armgic_irq_handler(void *tf)
if (ci->ci_hwpl != priority) {
ci->ci_hwpl = priority;
gicc_write(sc, GICC_PMR, priority);
+ if (old_ipl == IPL_HIGH) {
+ return;
+ }
}
for (;;) {
Index: src/sys/arch/arm/cortex/gicv3.c
diff -u src/sys/arch/arm/cortex/gicv3.c:1.42 src/sys/arch/arm/cortex/gicv3.c:1.43
--- src/sys/arch/arm/cortex/gicv3.c:1.42 Sun Feb 21 15:00:05 2021
+++ src/sys/arch/arm/cortex/gicv3.c Tue Feb 23 10:03:04 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: gicv3.c,v 1.42 2021/02/21 15:00:05 jmcneill Exp $ */
+/* $NetBSD: gicv3.c,v 1.43 2021/02/23 10:03:04 jmcneill Exp $ */
/*-
* Copyright (c) 2018 Jared McNeill
@@ -31,7 +31,7 @@
#define _INTR_PRIVATE
#include
-__KERNEL_RCSID(0, "$NetBSD: gicv3.c,v 1.42 2021/02/21 15:00:05 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: gicv3.c,v 1.43 2021/02/23 10:03:04 jmcneill Exp $");
#include
#include
@@ -738,6 +738,9 @@ gicv3_irq_handler(void *frame)
if (ci->ci_hwpl != pmr) {
ci->ci_hwpl = pmr;
icc_pmr_write(pmr);
+ if (oldipl == IPL_HIGH) {
+ return;
+ }
}
for (;;) {
CVS commit: src/sys/arch/arm/pic
Module Name:src
Committed By: jmcneill
Date: Mon Feb 22 21:16:25 UTC 2021
Modified Files:
src/sys/arch/arm/pic: pic_splfuncs.c
Log Message:
Make the splx fast path smaller.
To generate a diff of this commit:
cvs rdiff -u -r1.17 -r1.18 src/sys/arch/arm/pic/pic_splfuncs.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/pic/pic_splfuncs.c
diff -u src/sys/arch/arm/pic/pic_splfuncs.c:1.17 src/sys/arch/arm/pic/pic_splfuncs.c:1.18
--- src/sys/arch/arm/pic/pic_splfuncs.c:1.17 Sun Feb 21 17:07:45 2021
+++ src/sys/arch/arm/pic/pic_splfuncs.c Mon Feb 22 21:16:25 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: pic_splfuncs.c,v 1.17 2021/02/21 17:07:45 jmcneill Exp $ */
+/* $NetBSD: pic_splfuncs.c,v 1.18 2021/02/22 21:16:25 jmcneill Exp $ */
/*-
* Copyright (c) 2008 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -28,7 +28,7 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: pic_splfuncs.c,v 1.17 2021/02/21 17:07:45 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pic_splfuncs.c,v 1.18 2021/02/22 21:16:25 jmcneill Exp $");
#define _INTR_PRIVATE
#include
@@ -46,23 +46,34 @@ __KERNEL_RCSID(0, "$NetBSD: pic_splfuncs
#include
+#if defined(__HAVE_CPU_DOSOFTINTS_CI)
+#define CPU_DOSOFTINTS(ci) cpu_dosoftints_ci((ci))
+#else
+#define CPU_DOSOFTINTS(ci) cpu_dosoftints()
+#endif
+
+#if defined(__HAVE_PIC_PENDING_INTRS)
+static void splx_dopendingints(struct cpu_info *, const int);
+#endif
+
int
_splraise(int newipl)
{
struct cpu_info * const ci = curcpu();
const int oldipl = ci->ci_cpl;
- KASSERT(newipl < NIPL);
+ KDASSERT(newipl < NIPL);
if (newipl > ci->ci_cpl) {
pic_set_priority(ci, newipl);
}
return oldipl;
}
+
int
_spllower(int newipl)
{
struct cpu_info * const ci = curcpu();
const int oldipl = ci->ci_cpl;
- KASSERT(panicstr || newipl <= ci->ci_cpl);
+ KDASSERT(panicstr || newipl <= ci->ci_cpl);
if (newipl < ci->ci_cpl) {
register_t psw = cpsid(I32_bit);
ci->ci_intr_depth++;
@@ -79,17 +90,29 @@ void
splx(int savedipl)
{
struct cpu_info * const ci = curcpu();
- KASSERT(savedipl < NIPL);
+ KDASSERT(savedipl < NIPL);
if (__predict_false(savedipl == ci->ci_cpl)) {
return;
}
#if defined(__HAVE_PIC_PENDING_INTRS)
- if (__predict_true(ci->ci_pending_ipls == 0)) {
- goto skip_pending;
+ if (__predict_false(ci->ci_pending_ipls != 0)) {
+ splx_dopendingints(ci, savedipl);
}
+#endif
+
+ pic_set_priority(ci, savedipl);
+ CPU_DOSOFTINTS(ci);
+ KDASSERTMSG(ci->ci_cpl == savedipl, "cpl %d savedipl %d",
+ ci->ci_cpl, savedipl);
+}
+
+#if defined(__HAVE_PIC_PENDING_INTRS)
+static void __noinline
+splx_dopendingints(struct cpu_info *ci, const int savedipl)
+{
const register_t psw = cpsid(I32_bit);
ci->ci_intr_depth++;
while ((ci->ci_pending_ipls & ~__BIT(savedipl)) > __BIT(savedipl)) {
@@ -110,16 +133,5 @@ splx(int savedipl)
if ((psw & I32_bit) == 0) {
cpsie(I32_bit);
}
-skip_pending:
-#endif
-
- pic_set_priority(ci, savedipl);
-#if defined(__HAVE_CPU_DOSOFTINTS_CI)
- cpu_dosoftints_ci(ci);
-#else
- cpu_dosoftints();
-#endif
-
- KASSERTMSG(ci->ci_cpl == savedipl, "cpl %d savedipl %d",
- ci->ci_cpl, savedipl);
}
+#endif
CVS commit: src/sys/arch/arm/pic
Module Name:src
Committed By: jmcneill
Date: Sun Feb 21 17:07:45 UTC 2021
Modified Files:
src/sys/arch/arm/pic: pic.c pic_splfuncs.c picvar.h
Log Message:
Inline pic_set_priority and use cpu_dosoftints_ci when available.
To generate a diff of this commit:
cvs rdiff -u -r1.68 -r1.69 src/sys/arch/arm/pic/pic.c
cvs rdiff -u -r1.16 -r1.17 src/sys/arch/arm/pic/pic_splfuncs.c
cvs rdiff -u -r1.30 -r1.31 src/sys/arch/arm/pic/picvar.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/pic/pic.c
diff -u src/sys/arch/arm/pic/pic.c:1.68 src/sys/arch/arm/pic/pic.c:1.69
--- src/sys/arch/arm/pic/pic.c:1.68 Sun Feb 21 08:31:36 2021
+++ src/sys/arch/arm/pic/pic.c Sun Feb 21 17:07:45 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: pic.c,v 1.68 2021/02/21 08:31:36 skrll Exp $ */
+/* $NetBSD: pic.c,v 1.69 2021/02/21 17:07:45 jmcneill Exp $ */
/*-
* Copyright (c) 2008 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -33,7 +33,7 @@
#include "opt_multiprocessor.h"
#include
-__KERNEL_RCSID(0, "$NetBSD: pic.c,v 1.68 2021/02/21 08:31:36 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pic.c,v 1.69 2021/02/21 17:07:45 jmcneill Exp $");
#include
#include
@@ -95,34 +95,6 @@ EVCNT_ATTACH_STATIC(pic_deferral_ev);
static int pic_init(void);
-#ifdef __HAVE_PIC_SET_PRIORITY
-void
-pic_set_priority(struct cpu_info *ci, int newipl)
-{
- register_t psw = cpsid(I32_bit);
- if (pic_list[0] != NULL)
- (pic_list[0]->pic_ops->pic_set_priority)(pic_list[0], newipl);
- ci->ci_cpl = newipl;
- if ((psw & I32_bit) == 0)
- cpsie(I32_bit);
-}
-
-void
-pic_set_priority_psw(struct cpu_info *ci, register_t psw, int newipl)
-{
- if ((psw & I32_bit) == 0) {
- DISABLE_INTERRUPT();
- }
- if (pic_list[0] != NULL) {
- (pic_list[0]->pic_ops->pic_set_priority)(pic_list[0], newipl);
- }
- ci->ci_cpl = newipl;
- if ((psw & I32_bit) == 0) {
- ENABLE_INTERRUPT();
- }
-}
-#endif
-
#ifdef MULTIPROCESSOR
int
pic_ipi_ast(void *arg)
@@ -564,7 +536,7 @@ pic_do_pending_ints(register_t psw, int
if (ipl <= newipl)
break;
- pic_set_priority_psw(ci, psw, ipl);
+ pic_set_priority(ci, ipl);
pic_list_deliver_irqs(ci, psw, ipl, frame);
pic_list_unblock_irqs(ci);
}
@@ -573,12 +545,12 @@ pic_do_pending_ints(register_t psw, int
#ifdef __HAVE_PREEMPTION
struct lwp *l = curlwp;
if (newipl == IPL_NONE && (l->l_md.md_astpending & __BIT(1))) {
- pic_set_priority_psw(ci, psw, IPL_SCHED);
+ pic_set_priority(ci, IPL_SCHED);
kpreempt(0);
}
#endif
if (ci->ci_cpl != newipl)
- pic_set_priority_psw(ci, psw, newipl);
+ pic_set_priority(ci, newipl);
}
static void
Index: src/sys/arch/arm/pic/pic_splfuncs.c
diff -u src/sys/arch/arm/pic/pic_splfuncs.c:1.16 src/sys/arch/arm/pic/pic_splfuncs.c:1.17
--- src/sys/arch/arm/pic/pic_splfuncs.c:1.16 Sat Feb 20 22:53:31 2021
+++ src/sys/arch/arm/pic/pic_splfuncs.c Sun Feb 21 17:07:45 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: pic_splfuncs.c,v 1.16 2021/02/20 22:53:31 jmcneill Exp $ */
+/* $NetBSD: pic_splfuncs.c,v 1.17 2021/02/21 17:07:45 jmcneill Exp $ */
/*-
* Copyright (c) 2008 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -28,7 +28,7 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: pic_splfuncs.c,v 1.16 2021/02/20 22:53:31 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pic_splfuncs.c,v 1.17 2021/02/21 17:07:45 jmcneill Exp $");
#define _INTR_PRIVATE
#include
@@ -101,7 +101,7 @@ splx(int savedipl)
break;
}
- pic_set_priority_psw(ci, psw, ipl);
+ pic_set_priority(ci, ipl);
pic_list_deliver_irqs(ci, psw, ipl, NULL);
pic_list_unblock_irqs(ci);
}
@@ -113,11 +113,12 @@ splx(int savedipl)
skip_pending:
#endif
- ci->ci_cpl = savedipl;
- if (__predict_true(pic_list[0] != NULL)) {
- (pic_list[0]->pic_ops->pic_set_priority)(pic_list[0], savedipl);
- }
+ pic_set_priority(ci, savedipl);
+#if defined(__HAVE_CPU_DOSOFTINTS_CI)
+ cpu_dosoftints_ci(ci);
+#else
cpu_dosoftints();
+#endif
KASSERTMSG(ci->ci_cpl == savedipl, "cpl %d savedipl %d",
ci->ci_cpl, savedipl);
Index: src/sys/arch/arm/pic/picvar.h
diff -u src/sys/arch/arm/pic/picvar.h:1.30 src/sys/arch/arm/pic/picvar.h:1.31
--- src/sys/arch/arm/pic/picvar.h:1.30 Sat Feb 20 19:30:46 2021
+++ src/sys/arch/arm/pic/picvar.h Sun Feb 21 17:07:45 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: picvar.h,v 1.30 2021/02/20 19:30:46 jmcneill Exp $ */
+/* $NetBSD: picvar.h,v 1.31 2021/02/21 17:07:45 jmcneill Exp $ */
/*-
* Copyright (c) 2008 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -176,18 +176,21 @@ struct pic_ops {
#endif
};
+/* Using an inline causes catch-22 problems with cpu.h */
#ifdef __HAVE_PIC_SET_PRIORITY
/*
* This is used to update a hardware pic with a value corresponding
* to the ipl being set.
*/
-struct cpu_info;
-void pic_set_priority(struct cpu_info *, int);
-void pic_set_priority_psw(struct cpu_info *, register_t, int);
CVS commit: src/sys/arch/arm/sunxi
Module Name:src
Committed By: jmcneill
Date: Sun Feb 21 16:07:43 UTC 2021
Modified Files:
src/sys/arch/arm/sunxi: sunxi_emac.h
Log Message:
Align descriptors to 64 bytes instead of CACHE_LINE_SIZE (128) as all known
Allwinner SoCs with this part use 64-byte cache lines.
To generate a diff of this commit:
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/arm/sunxi/sunxi_emac.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/sunxi/sunxi_emac.h
diff -u src/sys/arch/arm/sunxi/sunxi_emac.h:1.4 src/sys/arch/arm/sunxi/sunxi_emac.h:1.5
--- src/sys/arch/arm/sunxi/sunxi_emac.h:1.4 Sun Oct 1 15:05:09 2017
+++ src/sys/arch/arm/sunxi/sunxi_emac.h Sun Feb 21 16:07:43 2021
@@ -203,8 +203,8 @@ struct sunxi_emac_desc {
uint32_t addr;
uint32_t next;
-} __packed __aligned(CACHE_LINE_SIZE);
+} __packed __aligned(64);
-__CTASSERT(sizeof(struct sunxi_emac_desc) == CACHE_LINE_SIZE);
+__CTASSERT(sizeof(struct sunxi_emac_desc) == 64);
#endif /* !__SUNXI_EMAC_H__ */
CVS commit: src/sys/arch/arm/cortex
Module Name:src
Committed By: jmcneill
Date: Sun Feb 21 15:45:30 UTC 2021
Modified Files:
src/sys/arch/arm/cortex: gic.c
Log Message:
Apply PMR optimizations from gicv3
To generate a diff of this commit:
cvs rdiff -u -r1.44 -r1.45 src/sys/arch/arm/cortex/gic.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/cortex/gic.c
diff -u src/sys/arch/arm/cortex/gic.c:1.44 src/sys/arch/arm/cortex/gic.c:1.45
--- src/sys/arch/arm/cortex/gic.c:1.44 Tue Feb 9 14:24:14 2021
+++ src/sys/arch/arm/cortex/gic.c Sun Feb 21 15:45:30 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: gic.c,v 1.44 2021/02/09 14:24:14 jakllsch Exp $ */
+/* $NetBSD: gic.c,v 1.45 2021/02/21 15:45:30 jmcneill Exp $ */
/*-
* Copyright (c) 2012 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -34,7 +34,7 @@
#define _INTR_PRIVATE
#include
-__KERNEL_RCSID(0, "$NetBSD: gic.c,v 1.44 2021/02/09 14:24:14 jakllsch Exp $");
+__KERNEL_RCSID(0, "$NetBSD: gic.c,v 1.45 2021/02/21 15:45:30 jmcneill Exp $");
#include
#include
@@ -222,9 +222,14 @@ static void
armgic_set_priority(struct pic_softc *pic, int ipl)
{
struct armgic_softc * const sc = PICTOSOFTC(pic);
+ struct cpu_info * const ci = curcpu();
const uint32_t priority = armgic_ipl_to_priority(ipl);
- gicc_write(sc, GICC_PMR, priority);
+ if (priority > ci->ci_hwpl) {
+ /* Lowering priority mask */
+ ci->ci_hwpl = priority;
+ gicc_write(sc, GICC_PMR, priority);
+ }
}
#ifdef MULTIPROCESSOR
@@ -322,6 +327,12 @@ armgic_irq_handler(void *tf)
ci->ci_data.cpu_nintr++;
+ const uint32_t priority = armgic_ipl_to_priority(old_ipl);
+ if (ci->ci_hwpl != priority) {
+ ci->ci_hwpl = priority;
+ gicc_write(sc, GICC_PMR, priority);
+ }
+
for (;;) {
uint32_t iar = gicc_read(sc, GICC_IAR);
uint32_t irq = __SHIFTOUT(iar, GICC_IAR_IRQ);
@@ -365,7 +376,7 @@ armgic_irq_handler(void *tf)
ipl, ci->ci_cpl,
gicc_read(sc, GICC_PMR));
gicc_write(sc, GICC_PMR, armgic_ipl_to_priority(ipl));
- ci->ci_cpl = ipl;
+ ci->ci_hwpl = ci->ci_cpl = ipl;
}
ENABLE_INTERRUPT();
pic_dispatch(is, tf);
@@ -527,6 +538,7 @@ armgic_cpu_init(struct pic_softc *pic, s
sc->sc_enabled_local);
}
}
+ ci->ci_hwpl = armgic_ipl_to_priority(ci->ci_cpl);
gicc_write(sc, GICC_PMR, armgic_ipl_to_priority(ci->ci_cpl)); // set PMR
gicc_write(sc, GICC_CTRL, GICC_CTRL_V1_Enable); // enable interrupt
ENABLE_INTERRUPT();// allow IRQ exceptions
CVS commit: src/sys/arch/arm/arm
Module Name:src
Committed By: skrll
Date: Sun Feb 21 08:47:13 UTC 2021
Modified Files:
src/sys/arch/arm/arm: arm_machdep.c
Log Message:
KNF consistency
To generate a diff of this commit:
cvs rdiff -u -r1.66 -r1.67 src/sys/arch/arm/arm/arm_machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/arm/arm_machdep.c
diff -u src/sys/arch/arm/arm/arm_machdep.c:1.66 src/sys/arch/arm/arm/arm_machdep.c:1.67
--- src/sys/arch/arm/arm/arm_machdep.c:1.66 Sun Feb 21 08:46:28 2021
+++ src/sys/arch/arm/arm/arm_machdep.c Sun Feb 21 08:47:13 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: arm_machdep.c,v 1.66 2021/02/21 08:46:28 skrll Exp $ */
+/* $NetBSD: arm_machdep.c,v 1.67 2021/02/21 08:47:13 skrll Exp $ */
/*
* Copyright (c) 2001 Wasabi Systems, Inc.
@@ -80,7 +80,7 @@
#include
-__KERNEL_RCSID(0, "$NetBSD: arm_machdep.c,v 1.66 2021/02/21 08:46:28 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: arm_machdep.c,v 1.67 2021/02/21 08:47:13 skrll Exp $");
#include
#include
@@ -310,12 +310,14 @@ cpu_intr_p(void)
struct lwp *
arm_curlwp(void)
{
+
return curlwp;
}
struct cpu_info *
arm_curcpu(void)
{
+
return curcpu();
}
#endif
@@ -340,6 +342,7 @@ cpu_kpreempt_exit(uintptr_t where)
bool
cpu_kpreempt_disabled(void)
{
+
return curcpu()->ci_cpl != IPL_NONE;
}
#endif /* __HAVE_PREEMPTION */
CVS commit: src/sys/arch/arm/arm
Module Name:src
Committed By: skrll
Date: Sun Feb 21 08:46:28 UTC 2021
Modified Files:
src/sys/arch/arm/arm: arm_machdep.c
Log Message:
Some preemption updates - still not being used (yet)
To generate a diff of this commit:
cvs rdiff -u -r1.65 -r1.66 src/sys/arch/arm/arm/arm_machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/arm/arm_machdep.c
diff -u src/sys/arch/arm/arm/arm_machdep.c:1.65 src/sys/arch/arm/arm/arm_machdep.c:1.66
--- src/sys/arch/arm/arm/arm_machdep.c:1.65 Tue Dec 1 02:43:13 2020
+++ src/sys/arch/arm/arm/arm_machdep.c Sun Feb 21 08:46:28 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: arm_machdep.c,v 1.65 2020/12/01 02:43:13 rin Exp $ */
+/* $NetBSD: arm_machdep.c,v 1.66 2021/02/21 08:46:28 skrll Exp $ */
/*
* Copyright (c) 2001 Wasabi Systems, Inc.
@@ -80,7 +80,7 @@
#include
-__KERNEL_RCSID(0, "$NetBSD: arm_machdep.c,v 1.65 2020/12/01 02:43:13 rin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: arm_machdep.c,v 1.66 2021/02/21 08:46:28 skrll Exp $");
#include
#include
@@ -223,6 +223,8 @@ void
cpu_need_resched(struct cpu_info *ci, struct lwp *l, int flags)
{
+ KASSERT(kpreempt_disabled());
+
if (flags & RESCHED_IDLE) {
#ifdef MULTIPROCESSOR
/*
@@ -322,13 +324,17 @@ arm_curcpu(void)
bool
cpu_kpreempt_enter(uintptr_t where, int s)
{
+
+ KASSERT(kpreempt_disabled());
+
return s == IPL_NONE;
}
void
cpu_kpreempt_exit(uintptr_t where)
{
- atomic_and_uint(()->ci_astpending, (unsigned int)~__BIT(1));
+
+ /* do nothing */
}
bool
CVS commit: src/sys/arch/arm/pic
Module Name:src
Committed By: skrll
Date: Sun Feb 21 08:31:36 UTC 2021
Modified Files:
src/sys/arch/arm/pic: pic.c
Log Message:
Fixup with __HAVE_PREEMPTION code which is currently unused
To generate a diff of this commit:
cvs rdiff -u -r1.67 -r1.68 src/sys/arch/arm/pic/pic.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/pic/pic.c
diff -u src/sys/arch/arm/pic/pic.c:1.67 src/sys/arch/arm/pic/pic.c:1.68
--- src/sys/arch/arm/pic/pic.c:1.67 Sat Feb 20 19:30:46 2021
+++ src/sys/arch/arm/pic/pic.c Sun Feb 21 08:31:36 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: pic.c,v 1.67 2021/02/20 19:30:46 jmcneill Exp $ */
+/* $NetBSD: pic.c,v 1.68 2021/02/21 08:31:36 skrll Exp $ */
/*-
* Copyright (c) 2008 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -33,7 +33,7 @@
#include "opt_multiprocessor.h"
#include
-__KERNEL_RCSID(0, "$NetBSD: pic.c,v 1.67 2021/02/20 19:30:46 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pic.c,v 1.68 2021/02/21 08:31:36 skrll Exp $");
#include
#include
@@ -166,7 +166,9 @@ pic_ipi_ddb(void *arg)
int
pic_ipi_kpreempt(void *arg)
{
- atomic_or_uint(()->ci_astpending, __BIT(1));
+ struct lwp *l = curlwp;
+
+ l->l_md.md_astpending |= __BIT(1);
return 1;
}
#endif /* __HAVE_PREEMPTION */
@@ -569,7 +571,8 @@ pic_do_pending_ints(register_t psw, int
}
#endif /* __HAVE_PIC_PENDING_INTRS */
#ifdef __HAVE_PREEMPTION
- if (newipl == IPL_NONE && (ci->ci_astpending & __BIT(1))) {
+ struct lwp *l = curlwp;
+ if (newipl == IPL_NONE && (l->l_md.md_astpending & __BIT(1))) {
pic_set_priority_psw(ci, psw, IPL_SCHED);
kpreempt(0);
}
CVS commit: src/sys/arch/arm/pic
Module Name:src
Committed By: jmcneill
Date: Sat Feb 20 22:53:31 UTC 2021
Modified Files:
src/sys/arch/arm/pic: pic_splfuncs.c
Log Message:
Only disable/enable interrupts if processing pending interrupts, and
inline pic_set_pending_psw.
To generate a diff of this commit:
cvs rdiff -u -r1.15 -r1.16 src/sys/arch/arm/pic/pic_splfuncs.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/pic/pic_splfuncs.c
diff -u src/sys/arch/arm/pic/pic_splfuncs.c:1.15 src/sys/arch/arm/pic/pic_splfuncs.c:1.16
--- src/sys/arch/arm/pic/pic_splfuncs.c:1.15 Sat Feb 20 19:35:07 2021
+++ src/sys/arch/arm/pic/pic_splfuncs.c Sat Feb 20 22:53:31 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: pic_splfuncs.c,v 1.15 2021/02/20 19:35:07 jmcneill Exp $ */
+/* $NetBSD: pic_splfuncs.c,v 1.16 2021/02/20 22:53:31 jmcneill Exp $ */
/*-
* Copyright (c) 2008 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -28,7 +28,7 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: pic_splfuncs.c,v 1.15 2021/02/20 19:35:07 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pic_splfuncs.c,v 1.16 2021/02/20 22:53:31 jmcneill Exp $");
#define _INTR_PRIVATE
#include
@@ -85,13 +85,12 @@ splx(int savedipl)
return;
}
- register_t psw = cpsid(I32_bit);
-
#if defined(__HAVE_PIC_PENDING_INTRS)
if (__predict_true(ci->ci_pending_ipls == 0)) {
goto skip_pending;
}
+ const register_t psw = cpsid(I32_bit);
ci->ci_intr_depth++;
while ((ci->ci_pending_ipls & ~__BIT(savedipl)) > __BIT(savedipl)) {
KASSERT(ci->ci_pending_ipls < __BIT(NIPL));
@@ -108,10 +107,16 @@ splx(int savedipl)
}
}
ci->ci_intr_depth--;
+ if ((psw & I32_bit) == 0) {
+ cpsie(I32_bit);
+ }
skip_pending:
#endif
- pic_set_priority_psw(ci, psw, savedipl);
+ ci->ci_cpl = savedipl;
+ if (__predict_true(pic_list[0] != NULL)) {
+ (pic_list[0]->pic_ops->pic_set_priority)(pic_list[0], savedipl);
+ }
cpu_dosoftints();
KASSERTMSG(ci->ci_cpl == savedipl, "cpl %d savedipl %d",
CVS commit: src/sys/arch/arm/pic
Module Name:src
Committed By: jmcneill
Date: Sat Feb 20 19:35:07 UTC 2021
Modified Files:
src/sys/arch/arm/pic: pic_splfuncs.c
Log Message:
Adjust ci_intr_depth when processing pending ints
To generate a diff of this commit:
cvs rdiff -u -r1.14 -r1.15 src/sys/arch/arm/pic/pic_splfuncs.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/pic/pic_splfuncs.c
diff -u src/sys/arch/arm/pic/pic_splfuncs.c:1.14 src/sys/arch/arm/pic/pic_splfuncs.c:1.15
--- src/sys/arch/arm/pic/pic_splfuncs.c:1.14 Sat Feb 20 19:30:46 2021
+++ src/sys/arch/arm/pic/pic_splfuncs.c Sat Feb 20 19:35:07 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: pic_splfuncs.c,v 1.14 2021/02/20 19:30:46 jmcneill Exp $ */
+/* $NetBSD: pic_splfuncs.c,v 1.15 2021/02/20 19:35:07 jmcneill Exp $ */
/*-
* Copyright (c) 2008 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -28,7 +28,7 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: pic_splfuncs.c,v 1.14 2021/02/20 19:30:46 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pic_splfuncs.c,v 1.15 2021/02/20 19:35:07 jmcneill Exp $");
#define _INTR_PRIVATE
#include
@@ -92,6 +92,7 @@ splx(int savedipl)
goto skip_pending;
}
+ ci->ci_intr_depth++;
while ((ci->ci_pending_ipls & ~__BIT(savedipl)) > __BIT(savedipl)) {
KASSERT(ci->ci_pending_ipls < __BIT(NIPL));
for (;;) {
@@ -106,6 +107,7 @@ splx(int savedipl)
pic_list_unblock_irqs(ci);
}
}
+ ci->ci_intr_depth--;
skip_pending:
#endif
CVS commit: src/sys/arch/arm/pic
Module Name:src
Committed By: jmcneill
Date: Sat Feb 20 19:30:46 UTC 2021
Modified Files:
src/sys/arch/arm/pic: pic.c pic_splfuncs.c picvar.h
Log Message:
Inline "pic_do_pending_ints" in splx and check ci_pending_ipls to optimize
the common case (hw priority, no cascaded interrupts pending).
This also removes the need for the "pic_pending_used" flag, and should fix
booting on Raspberry Pi 3.
To generate a diff of this commit:
cvs rdiff -u -r1.66 -r1.67 src/sys/arch/arm/pic/pic.c
cvs rdiff -u -r1.13 -r1.14 src/sys/arch/arm/pic/pic_splfuncs.c
cvs rdiff -u -r1.29 -r1.30 src/sys/arch/arm/pic/picvar.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/pic/pic.c
diff -u src/sys/arch/arm/pic/pic.c:1.66 src/sys/arch/arm/pic/pic.c:1.67
--- src/sys/arch/arm/pic/pic.c:1.66 Sat Feb 20 14:51:07 2021
+++ src/sys/arch/arm/pic/pic.c Sat Feb 20 19:30:46 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: pic.c,v 1.66 2021/02/20 14:51:07 jmcneill Exp $ */
+/* $NetBSD: pic.c,v 1.67 2021/02/20 19:30:46 jmcneill Exp $ */
/*-
* Copyright (c) 2008 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -33,7 +33,7 @@
#include "opt_multiprocessor.h"
#include
-__KERNEL_RCSID(0, "$NetBSD: pic.c,v 1.66 2021/02/20 14:51:07 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pic.c,v 1.67 2021/02/20 19:30:46 jmcneill Exp $");
#include
#include
@@ -60,8 +60,6 @@ __KERNEL_RCSID(0, "$NetBSD: pic.c,v 1.66
#if defined(__HAVE_PIC_PENDING_INTRS)
-bool pic_pending_used __read_mostly = false;
-
/*
* This implementation of pending interrupts on a MULTIPROCESSOR system makes
* the assumption that a PIC (pic_softc) shall only have all its interrupts
@@ -74,8 +72,6 @@ static struct pic_softc *
pic_list_find_pic_by_pending_ipl(struct cpu_info *, uint32_t);
static void
pic_deliver_irqs(struct cpu_info *, struct pic_softc *, int, void *);
-static void
- pic_list_deliver_irqs(struct cpu_info *, register_t, int, void *);
#endif /* __HAVE_PIC_PENDING_INTRS */
@@ -261,9 +257,6 @@ pic_mark_pending_source(struct pic_softc
const uint32_t ipl_mask = __BIT(is->is_ipl);
struct cpu_info * const ci = curcpu();
- if (!pic_pending_used)
- pic_pending_used = true;
-
atomic_or_32(>pic_pending_irqs[is->is_irq >> 5],
__BIT(is->is_irq & 0x1f));
@@ -296,9 +289,6 @@ pic_mark_pending_sources(struct pic_soft
if (pending == 0)
return ipl_mask;
- if (!pic_pending_used)
- pic_pending_used = true;
-
KASSERT((irq_base & 31) == 0);
(*pic->pic_ops->pic_block_irqs)(pic, irq_base, pending);
@@ -480,7 +470,7 @@ pic_deliver_irqs(struct cpu_info *ci, st
atomic_and_32(>ci_pending_pics, ~__BIT(pic->pic_id));
}
-static void
+void
pic_list_unblock_irqs(struct cpu_info *ci)
{
uint32_t blocked_pics = ci->ci_blocked_pics;
Index: src/sys/arch/arm/pic/pic_splfuncs.c
diff -u src/sys/arch/arm/pic/pic_splfuncs.c:1.13 src/sys/arch/arm/pic/pic_splfuncs.c:1.14
--- src/sys/arch/arm/pic/pic_splfuncs.c:1.13 Tue Feb 16 22:12:50 2021
+++ src/sys/arch/arm/pic/pic_splfuncs.c Sat Feb 20 19:30:46 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: pic_splfuncs.c,v 1.13 2021/02/16 22:12:50 jmcneill Exp $ */
+/* $NetBSD: pic_splfuncs.c,v 1.14 2021/02/20 19:30:46 jmcneill Exp $ */
/*-
* Copyright (c) 2008 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -28,7 +28,7 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: pic_splfuncs.c,v 1.13 2021/02/16 22:12:50 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pic_splfuncs.c,v 1.14 2021/02/20 19:30:46 jmcneill Exp $");
#define _INTR_PRIVATE
#include
@@ -46,12 +46,6 @@ __KERNEL_RCSID(0, "$NetBSD: pic_splfuncs
#include
-#if defined(__HAVE_PIC_PENDING_INTRS)
-extern bool pic_pending_used;
-#else
-#define pic_pending_used false
-#endif
-
int
_splraise(int newipl)
{
@@ -70,16 +64,12 @@ _spllower(int newipl)
const int oldipl = ci->ci_cpl;
KASSERT(panicstr || newipl <= ci->ci_cpl);
if (newipl < ci->ci_cpl) {
- if (__predict_false(pic_pending_used)) {
- register_t psw = cpsid(I32_bit);
- ci->ci_intr_depth++;
- pic_do_pending_ints(psw, newipl, NULL);
- ci->ci_intr_depth--;
- if ((psw & I32_bit) == 0 || newipl == IPL_NONE)
-cpsie(I32_bit);
- } else {
- pic_set_priority(ci, newipl);
- }
+ register_t psw = cpsid(I32_bit);
+ ci->ci_intr_depth++;
+ pic_do_pending_ints(psw, newipl, NULL);
+ ci->ci_intr_depth--;
+ if ((psw & I32_bit) == 0 || newipl == IPL_NONE)
+ cpsie(I32_bit);
cpu_dosoftints();
}
return oldipl;
@@ -95,27 +85,32 @@ splx(int savedipl)
return;
}
- if (__predict_false(pic_pending_used)) {
- register_t psw = cpsid(I32_bit);
- KASSERTMSG(panicstr != NULL || savedipl < ci->ci_cpl,
- "splx(%d) to a higher ipl than %d", savedipl, ci->ci_cpl);
+ register_t psw = cpsid(I32_bit);
- if ((psw & I32_bit) == 0) {
- ci->ci_intr_depth++;
- pic_do_pending_ints(psw, savedipl, NULL);
- ci->ci_intr_depth--;
-
CVS commit: src/sys/arch/arm/pic
Module Name:src Committed By: jmcneill Date: Sat Feb 20 18:18:53 UTC 2021 Modified Files: src/sys/arch/arm/pic: picvar.h Log Message: remove "pic_do_pending_int() prototype; no matching function To generate a diff of this commit: cvs rdiff -u -r1.28 -r1.29 src/sys/arch/arm/pic/picvar.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/pic/picvar.h diff -u src/sys/arch/arm/pic/picvar.h:1.28 src/sys/arch/arm/pic/picvar.h:1.29 --- src/sys/arch/arm/pic/picvar.h:1.28 Tue Feb 16 07:27:12 2021 +++ src/sys/arch/arm/pic/picvar.h Sat Feb 20 18:18:53 2021 @@ -1,4 +1,4 @@ -/* $NetBSD: picvar.h,v 1.28 2021/02/16 07:27:12 skrll Exp $ */ +/* $NetBSD: picvar.h,v 1.29 2021/02/20 18:18:53 jmcneill Exp $ */ /*- * Copyright (c) 2008 The NetBSD Foundation, Inc. * All rights reserved. @@ -191,7 +191,6 @@ void pic_set_priority_psw(struct cpu_inf #define PIC_IRQBASE_ALLOC (-2) int pic_add(struct pic_softc *, int); -void pic_do_pending_int(void); #ifdef MULTIPROCESSOR int pic_ipi_ast(void *); int pic_ipi_nop(void *);
CVS commit: src/sys/arch/arm/arm
Module Name:src Committed By: skrll Date: Wed Feb 17 06:54:23 UTC 2021 Modified Files: src/sys/arch/arm/arm: idle_machdep.c Log Message: Trailing whitespace. *snigger* To generate a diff of this commit: cvs rdiff -u -r1.5 -r1.6 src/sys/arch/arm/arm/idle_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/arm/idle_machdep.c diff -u src/sys/arch/arm/arm/idle_machdep.c:1.5 src/sys/arch/arm/arm/idle_machdep.c:1.6 --- src/sys/arch/arm/arm/idle_machdep.c:1.5 Sun Aug 18 06:28:18 2013 +++ src/sys/arch/arm/arm/idle_machdep.c Wed Feb 17 06:54:23 2021 @@ -1,11 +1,11 @@ -/* $NetBSD: idle_machdep.c,v 1.5 2013/08/18 06:28:18 matt Exp $ */ +/* $NetBSD: idle_machdep.c,v 1.6 2021/02/17 06:54:23 skrll Exp $ */ /*- * Copyright (c) 2007 The NetBSD Foundation, Inc. * All rights reserved. * * This code is derived from software contributed to The NetBSD Foundation - * by Nick Hudson + * by Nick Hudson * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -31,7 +31,7 @@ #include -__KERNEL_RCSID(0, "$NetBSD: idle_machdep.c,v 1.5 2013/08/18 06:28:18 matt Exp $"); +__KERNEL_RCSID(0, "$NetBSD: idle_machdep.c,v 1.6 2021/02/17 06:54:23 skrll Exp $"); #include #include
CVS commit: src/sys/arch/arm/pic
Module Name:src
Committed By: jmcneill
Date: Tue Feb 16 22:12:50 UTC 2021
Modified Files:
src/sys/arch/arm/pic: pic.c pic_splfuncs.c
Log Message:
pic: avoid pic_do_pending_ints if pic_mark_pending_* has never been called
To generate a diff of this commit:
cvs rdiff -u -r1.64 -r1.65 src/sys/arch/arm/pic/pic.c
cvs rdiff -u -r1.12 -r1.13 src/sys/arch/arm/pic/pic_splfuncs.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/pic/pic.c
diff -u src/sys/arch/arm/pic/pic.c:1.64 src/sys/arch/arm/pic/pic.c:1.65
--- src/sys/arch/arm/pic/pic.c:1.64 Mon Feb 15 16:32:07 2021
+++ src/sys/arch/arm/pic/pic.c Tue Feb 16 22:12:49 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: pic.c,v 1.64 2021/02/15 16:32:07 jmcneill Exp $ */
+/* $NetBSD: pic.c,v 1.65 2021/02/16 22:12:49 jmcneill Exp $ */
/*-
* Copyright (c) 2008 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -33,7 +33,7 @@
#include "opt_multiprocessor.h"
#include
-__KERNEL_RCSID(0, "$NetBSD: pic.c,v 1.64 2021/02/15 16:32:07 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pic.c,v 1.65 2021/02/16 22:12:49 jmcneill Exp $");
#include
#include
@@ -59,6 +59,9 @@ __KERNEL_RCSID(0, "$NetBSD: pic.c,v 1.64
#include
#if defined(__HAVE_PIC_PENDING_INTRS)
+
+bool pic_pending_used __read_mostly = false;
+
/*
* This implementation of pending interrupts on a MULTIPROCESSOR system makes
* the assumption that a PIC (pic_softc) shall only have all its interrupts
@@ -279,6 +282,9 @@ pic_mark_pending_source(struct pic_softc
{
const uint32_t ipl_mask = __BIT(is->is_ipl);
+ if (!pic_pending_used)
+ pic_pending_used = true;
+
atomic_or_32(>pic_pending_irqs[is->is_irq >> 5],
__BIT(is->is_irq & 0x1f));
@@ -309,6 +315,9 @@ pic_mark_pending_sources(struct pic_soft
volatile uint32_t *ipending = >pic_pending_irqs[irq_base >> 5];
uint32_t ipl_mask = 0;
+ if (!pic_pending_used)
+ pic_pending_used = true;
+
if (pending == 0)
return ipl_mask;
Index: src/sys/arch/arm/pic/pic_splfuncs.c
diff -u src/sys/arch/arm/pic/pic_splfuncs.c:1.12 src/sys/arch/arm/pic/pic_splfuncs.c:1.13
--- src/sys/arch/arm/pic/pic_splfuncs.c:1.12 Mon Feb 15 16:32:07 2021
+++ src/sys/arch/arm/pic/pic_splfuncs.c Tue Feb 16 22:12:50 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: pic_splfuncs.c,v 1.12 2021/02/15 16:32:07 jmcneill Exp $ */
+/* $NetBSD: pic_splfuncs.c,v 1.13 2021/02/16 22:12:50 jmcneill Exp $ */
/*-
* Copyright (c) 2008 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -28,7 +28,7 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: pic_splfuncs.c,v 1.12 2021/02/15 16:32:07 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pic_splfuncs.c,v 1.13 2021/02/16 22:12:50 jmcneill Exp $");
#define _INTR_PRIVATE
#include
@@ -46,6 +46,11 @@ __KERNEL_RCSID(0, "$NetBSD: pic_splfuncs
#include
+#if defined(__HAVE_PIC_PENDING_INTRS)
+extern bool pic_pending_used;
+#else
+#define pic_pending_used false
+#endif
int
_splraise(int newipl)
@@ -65,12 +70,16 @@ _spllower(int newipl)
const int oldipl = ci->ci_cpl;
KASSERT(panicstr || newipl <= ci->ci_cpl);
if (newipl < ci->ci_cpl) {
- register_t psw = cpsid(I32_bit);
- ci->ci_intr_depth++;
- pic_do_pending_ints(psw, newipl, NULL);
- ci->ci_intr_depth--;
- if ((psw & I32_bit) == 0 || newipl == IPL_NONE)
- cpsie(I32_bit);
+ if (__predict_false(pic_pending_used)) {
+ register_t psw = cpsid(I32_bit);
+ ci->ci_intr_depth++;
+ pic_do_pending_ints(psw, newipl, NULL);
+ ci->ci_intr_depth--;
+ if ((psw & I32_bit) == 0 || newipl == IPL_NONE)
+cpsie(I32_bit);
+ } else {
+ pic_set_priority(ci, newipl);
+ }
cpu_dosoftints();
}
return oldipl;
@@ -86,21 +95,26 @@ splx(int savedipl)
return;
}
- register_t psw = cpsid(I32_bit);
- KASSERTMSG(panicstr != NULL || savedipl < ci->ci_cpl,
- "splx(%d) to a higher ipl than %d", savedipl, ci->ci_cpl);
-
- if ((psw & I32_bit) == 0) {
- ci->ci_intr_depth++;
- pic_do_pending_ints(psw, savedipl, NULL);
- ci->ci_intr_depth--;
- KASSERTMSG(ci->ci_cpl == savedipl, "cpl %d savedipl %d",
- ci->ci_cpl, savedipl);
+ if (__predict_false(pic_pending_used)) {
+ register_t psw = cpsid(I32_bit);
+ KASSERTMSG(panicstr != NULL || savedipl < ci->ci_cpl,
+ "splx(%d) to a higher ipl than %d", savedipl, ci->ci_cpl);
- cpsie(I32_bit);
- cpu_dosoftints();
+ if ((psw & I32_bit) == 0) {
+ ci->ci_intr_depth++;
+ pic_do_pending_ints(psw, savedipl, NULL);
+ ci->ci_intr_depth--;
+ KASSERTMSG(ci->ci_cpl == savedipl, "cpl %d savedipl %d",
+ ci->ci_cpl, savedipl);
+
+ cpsie(I32_bit);
+ cpu_dosoftints();
+ } else {
+ pic_set_priority_psw(ci, psw, savedipl);
+ }
} else {
- pic_set_priority_psw(ci, psw, savedipl);
+ pic_set_priority(ci, savedipl);
+ cpu_dosoftints();
}
KASSERTMSG(ci->ci_cpl == savedipl, "cpl %d savedipl %d",
CVS commit: src/sys/arch/arm/pic
Module Name:src Committed By: skrll Date: Tue Feb 16 07:27:12 UTC 2021 Modified Files: src/sys/arch/arm/pic: picvar.h Log Message: Provide a pic_set_priority_psw in the case that __HAVE_PIC_SET_PRIORITY is not defined. To generate a diff of this commit: cvs rdiff -u -r1.27 -r1.28 src/sys/arch/arm/pic/picvar.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/pic/picvar.h diff -u src/sys/arch/arm/pic/picvar.h:1.27 src/sys/arch/arm/pic/picvar.h:1.28 --- src/sys/arch/arm/pic/picvar.h:1.27 Mon Feb 15 16:32:07 2021 +++ src/sys/arch/arm/pic/picvar.h Tue Feb 16 07:27:12 2021 @@ -1,4 +1,4 @@ -/* $NetBSD: picvar.h,v 1.27 2021/02/15 16:32:07 jmcneill Exp $ */ +/* $NetBSD: picvar.h,v 1.28 2021/02/16 07:27:12 skrll Exp $ */ /*- * Copyright (c) 2008 The NetBSD Foundation, Inc. * All rights reserved. @@ -184,7 +184,8 @@ void pic_set_priority(struct cpu_info *, void pic_set_priority_psw(struct cpu_info *, register_t, int); #else /* Using an inline causes catch-22 problems with cpu.h */ -#define pic_set_priority(ci, newipl) ((void)((ci)->ci_cpl = (newipl))) +#define pic_set_priority(ci, newipl) ((void)((ci)->ci_cpl = (newipl))) +#define pic_set_priority_psw(ci, psw, newipl) ((void)((ci)->ci_cpl = (newipl))) #endif #define PIC_IRQBASE_ALLOC (-2)
CVS commit: src/sys/arch/arm/pic
Module Name:src
Committed By: jmcneill
Date: Mon Feb 15 16:32:07 UTC 2021
Modified Files:
src/sys/arch/arm/pic: pic.c pic_splfuncs.c picvar.h
Log Message:
splx: use pic_set_priority_psw in interrupts disabled case to skip a few
more daif accesses.
To generate a diff of this commit:
cvs rdiff -u -r1.63 -r1.64 src/sys/arch/arm/pic/pic.c
cvs rdiff -u -r1.11 -r1.12 src/sys/arch/arm/pic/pic_splfuncs.c
cvs rdiff -u -r1.26 -r1.27 src/sys/arch/arm/pic/picvar.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/pic/pic.c
diff -u src/sys/arch/arm/pic/pic.c:1.63 src/sys/arch/arm/pic/pic.c:1.64
--- src/sys/arch/arm/pic/pic.c:1.63 Mon Feb 15 13:03:52 2021
+++ src/sys/arch/arm/pic/pic.c Mon Feb 15 16:32:07 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: pic.c,v 1.63 2021/02/15 13:03:52 jmcneill Exp $ */
+/* $NetBSD: pic.c,v 1.64 2021/02/15 16:32:07 jmcneill Exp $ */
/*-
* Copyright (c) 2008 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -33,7 +33,7 @@
#include "opt_multiprocessor.h"
#include
-__KERNEL_RCSID(0, "$NetBSD: pic.c,v 1.63 2021/02/15 13:03:52 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pic.c,v 1.64 2021/02/15 16:32:07 jmcneill Exp $");
#include
#include
@@ -130,7 +130,7 @@ pic_set_priority(struct cpu_info *ci, in
cpsie(I32_bit);
}
-static void
+void
pic_set_priority_psw(struct cpu_info *ci, register_t psw, int newipl)
{
if ((psw & I32_bit) == 0) {
Index: src/sys/arch/arm/pic/pic_splfuncs.c
diff -u src/sys/arch/arm/pic/pic_splfuncs.c:1.11 src/sys/arch/arm/pic/pic_splfuncs.c:1.12
--- src/sys/arch/arm/pic/pic_splfuncs.c:1.11 Mon Feb 15 16:04:01 2021
+++ src/sys/arch/arm/pic/pic_splfuncs.c Mon Feb 15 16:32:07 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: pic_splfuncs.c,v 1.11 2021/02/15 16:04:01 jmcneill Exp $ */
+/* $NetBSD: pic_splfuncs.c,v 1.12 2021/02/15 16:32:07 jmcneill Exp $ */
/*-
* Copyright (c) 2008 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -28,7 +28,7 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: pic_splfuncs.c,v 1.11 2021/02/15 16:04:01 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pic_splfuncs.c,v 1.12 2021/02/15 16:32:07 jmcneill Exp $");
#define _INTR_PRIVATE
#include
@@ -100,7 +100,7 @@ splx(int savedipl)
cpsie(I32_bit);
cpu_dosoftints();
} else {
- pic_set_priority(ci, savedipl);
+ pic_set_priority_psw(ci, psw, savedipl);
}
KASSERTMSG(ci->ci_cpl == savedipl, "cpl %d savedipl %d",
Index: src/sys/arch/arm/pic/picvar.h
diff -u src/sys/arch/arm/pic/picvar.h:1.26 src/sys/arch/arm/pic/picvar.h:1.27
--- src/sys/arch/arm/pic/picvar.h:1.26 Tue Dec 24 20:40:09 2019
+++ src/sys/arch/arm/pic/picvar.h Mon Feb 15 16:32:07 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: picvar.h,v 1.26 2019/12/24 20:40:09 skrll Exp $ */
+/* $NetBSD: picvar.h,v 1.27 2021/02/15 16:32:07 jmcneill Exp $ */
/*-
* Copyright (c) 2008 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -181,6 +181,7 @@ struct pic_ops {
*/
struct cpu_info;
void pic_set_priority(struct cpu_info *, int);
+void pic_set_priority_psw(struct cpu_info *, register_t, int);
#else
/* Using an inline causes catch-22 problems with cpu.h */
#define pic_set_priority(ci, newipl) ((void)((ci)->ci_cpl = (newipl)))
CVS commit: src/sys/arch/arm/pic
Module Name:src
Committed By: jmcneill
Date: Mon Feb 15 16:04:01 UTC 2021
Modified Files:
src/sys/arch/arm/pic: pic_splfuncs.c
Log Message:
splx: restore priority even if interrupts are disabled
To generate a diff of this commit:
cvs rdiff -u -r1.10 -r1.11 src/sys/arch/arm/pic/pic_splfuncs.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/pic/pic_splfuncs.c
diff -u src/sys/arch/arm/pic/pic_splfuncs.c:1.10 src/sys/arch/arm/pic/pic_splfuncs.c:1.11
--- src/sys/arch/arm/pic/pic_splfuncs.c:1.10 Mon Feb 15 15:42:58 2021
+++ src/sys/arch/arm/pic/pic_splfuncs.c Mon Feb 15 16:04:01 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: pic_splfuncs.c,v 1.10 2021/02/15 15:42:58 jmcneill Exp $ */
+/* $NetBSD: pic_splfuncs.c,v 1.11 2021/02/15 16:04:01 jmcneill Exp $ */
/*-
* Copyright (c) 2008 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -28,7 +28,7 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: pic_splfuncs.c,v 1.10 2021/02/15 15:42:58 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pic_splfuncs.c,v 1.11 2021/02/15 16:04:01 jmcneill Exp $");
#define _INTR_PRIVATE
#include
@@ -99,6 +99,8 @@ splx(int savedipl)
cpsie(I32_bit);
cpu_dosoftints();
+ } else {
+ pic_set_priority(ci, savedipl);
}
KASSERTMSG(ci->ci_cpl == savedipl, "cpl %d savedipl %d",
CVS commit: src/sys/arch/arm/pic
Module Name:src
Committed By: jmcneill
Date: Mon Feb 15 15:42:58 UTC 2021
Modified Files:
src/sys/arch/arm/pic: pic_splfuncs.c
Log Message:
splx: only dispatch hard interrupts if interrupts are enabled
To generate a diff of this commit:
cvs rdiff -u -r1.9 -r1.10 src/sys/arch/arm/pic/pic_splfuncs.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/pic/pic_splfuncs.c
diff -u src/sys/arch/arm/pic/pic_splfuncs.c:1.9 src/sys/arch/arm/pic/pic_splfuncs.c:1.10
--- src/sys/arch/arm/pic/pic_splfuncs.c:1.9 Mon Feb 15 15:07:47 2021
+++ src/sys/arch/arm/pic/pic_splfuncs.c Mon Feb 15 15:42:58 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: pic_splfuncs.c,v 1.9 2021/02/15 15:07:47 jmcneill Exp $ */
+/* $NetBSD: pic_splfuncs.c,v 1.10 2021/02/15 15:42:58 jmcneill Exp $ */
/*-
* Copyright (c) 2008 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -28,7 +28,7 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: pic_splfuncs.c,v 1.9 2021/02/15 15:07:47 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pic_splfuncs.c,v 1.10 2021/02/15 15:42:58 jmcneill Exp $");
#define _INTR_PRIVATE
#include
@@ -90,15 +90,17 @@ splx(int savedipl)
KASSERTMSG(panicstr != NULL || savedipl < ci->ci_cpl,
"splx(%d) to a higher ipl than %d", savedipl, ci->ci_cpl);
- ci->ci_intr_depth++;
- pic_do_pending_ints(psw, savedipl, NULL);
- ci->ci_intr_depth--;
- KASSERTMSG(ci->ci_cpl == savedipl, "cpl %d savedipl %d",
- ci->ci_cpl, savedipl);
if ((psw & I32_bit) == 0) {
+ ci->ci_intr_depth++;
+ pic_do_pending_ints(psw, savedipl, NULL);
+ ci->ci_intr_depth--;
+ KASSERTMSG(ci->ci_cpl == savedipl, "cpl %d savedipl %d",
+ ci->ci_cpl, savedipl);
+
cpsie(I32_bit);
cpu_dosoftints();
}
+
KASSERTMSG(ci->ci_cpl == savedipl, "cpl %d savedipl %d",
ci->ci_cpl, savedipl);
}
CVS commit: src/sys/arch/arm/pic
Module Name:src
Committed By: jmcneill
Date: Mon Feb 15 15:07:48 UTC 2021
Modified Files:
src/sys/arch/arm/pic: pic_splfuncs.c
Log Message:
splx: only dispatch softints if interrupts are enabled
To generate a diff of this commit:
cvs rdiff -u -r1.8 -r1.9 src/sys/arch/arm/pic/pic_splfuncs.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/pic/pic_splfuncs.c
diff -u src/sys/arch/arm/pic/pic_splfuncs.c:1.8 src/sys/arch/arm/pic/pic_splfuncs.c:1.9
--- src/sys/arch/arm/pic/pic_splfuncs.c:1.8 Sun Apr 1 04:35:04 2018
+++ src/sys/arch/arm/pic/pic_splfuncs.c Mon Feb 15 15:07:47 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: pic_splfuncs.c,v 1.8 2018/04/01 04:35:04 ryo Exp $ */
+/* $NetBSD: pic_splfuncs.c,v 1.9 2021/02/15 15:07:47 jmcneill Exp $ */
/*-
* Copyright (c) 2008 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -28,7 +28,7 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
#include
-__KERNEL_RCSID(0, "$NetBSD: pic_splfuncs.c,v 1.8 2018/04/01 04:35:04 ryo Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pic_splfuncs.c,v 1.9 2021/02/15 15:07:47 jmcneill Exp $");
#define _INTR_PRIVATE
#include
@@ -95,9 +95,10 @@ splx(int savedipl)
ci->ci_intr_depth--;
KASSERTMSG(ci->ci_cpl == savedipl, "cpl %d savedipl %d",
ci->ci_cpl, savedipl);
- if ((psw & I32_bit) == 0)
+ if ((psw & I32_bit) == 0) {
cpsie(I32_bit);
- cpu_dosoftints();
+ cpu_dosoftints();
+ }
KASSERTMSG(ci->ci_cpl == savedipl, "cpl %d savedipl %d",
ci->ci_cpl, savedipl);
}
CVS commit: src/sys/arch/arm/pic
Module Name:src
Committed By: jmcneill
Date: Mon Feb 15 13:03:52 UTC 2021
Modified Files:
src/sys/arch/arm/pic: pic.c
Log Message:
pic: reduce the number of daif accesses in pic_do_pending_ints
The caller has already provided daif state. No need to keep updating
daif via pic_set_priority if it's already in the state we need (interrupts
disabled).
To generate a diff of this commit:
cvs rdiff -u -r1.62 -r1.63 src/sys/arch/arm/pic/pic.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/pic/pic.c
diff -u src/sys/arch/arm/pic/pic.c:1.62 src/sys/arch/arm/pic/pic.c:1.63
--- src/sys/arch/arm/pic/pic.c:1.62 Sun Feb 7 21:18:37 2021
+++ src/sys/arch/arm/pic/pic.c Mon Feb 15 13:03:52 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: pic.c,v 1.62 2021/02/07 21:18:37 jmcneill Exp $ */
+/* $NetBSD: pic.c,v 1.63 2021/02/15 13:03:52 jmcneill Exp $ */
/*-
* Copyright (c) 2008 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -33,7 +33,7 @@
#include "opt_multiprocessor.h"
#include
-__KERNEL_RCSID(0, "$NetBSD: pic.c,v 1.62 2021/02/07 21:18:37 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pic.c,v 1.63 2021/02/15 13:03:52 jmcneill Exp $");
#include
#include
@@ -129,6 +129,21 @@ pic_set_priority(struct cpu_info *ci, in
if ((psw & I32_bit) == 0)
cpsie(I32_bit);
}
+
+static void
+pic_set_priority_psw(struct cpu_info *ci, register_t psw, int newipl)
+{
+ if ((psw & I32_bit) == 0) {
+ DISABLE_INTERRUPT();
+ }
+ if (pic_list[0] != NULL) {
+ (pic_list[0]->pic_ops->pic_set_priority)(pic_list[0], newipl);
+ }
+ ci->ci_cpl = newipl;
+ if ((psw & I32_bit) == 0) {
+ ENABLE_INTERRUPT();
+ }
+}
#endif
#ifdef MULTIPROCESSOR
@@ -573,7 +588,7 @@ pic_do_pending_ints(register_t psw, int
if (ipl <= newipl)
break;
- pic_set_priority(ci, ipl);
+ pic_set_priority_psw(ci, psw, ipl);
pic_list_deliver_irqs(pend, psw, ipl, frame);
pic_list_unblock_irqs(pend);
}
@@ -582,12 +597,12 @@ pic_do_pending_ints(register_t psw, int
#endif /* __HAVE_PIC_PENDING_INTRS */
#ifdef __HAVE_PREEMPTION
if (newipl == IPL_NONE && (ci->ci_astpending & __BIT(1))) {
- pic_set_priority(ci, IPL_SCHED);
+ pic_set_priority_psw(ci, psw, IPL_SCHED);
kpreempt(0);
}
#endif
if (ci->ci_cpl != newipl)
- pic_set_priority(ci, newipl);
+ pic_set_priority_psw(ci, psw, newipl);
}
static void
CVS commit: src/sys/arch/arm/amlogic
Module Name:src
Committed By: ryo
Date: Fri Feb 12 21:39:55 UTC 2021
Modified Files:
src/sys/arch/arm/amlogic: meson_uart.c
Log Message:
UART_RFIFO_REG should be masked before passing to cn_check_magic(). there is
any data in other than the lower 8 bits.
To generate a diff of this commit:
cvs rdiff -u -r1.5 -r1.6 src/sys/arch/arm/amlogic/meson_uart.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/amlogic/meson_uart.c
diff -u src/sys/arch/arm/amlogic/meson_uart.c:1.5 src/sys/arch/arm/amlogic/meson_uart.c:1.6
--- src/sys/arch/arm/amlogic/meson_uart.c:1.5 Wed Jan 27 03:10:18 2021
+++ src/sys/arch/arm/amlogic/meson_uart.c Fri Feb 12 21:39:55 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: meson_uart.c,v 1.5 2021/01/27 03:10:18 thorpej Exp $ */
+/* $NetBSD: meson_uart.c,v 1.6 2021/02/12 21:39:55 ryo Exp $ */
/*-
* Copyright (c) 2013 The NetBSD Foundation, Inc.
@@ -34,7 +34,7 @@
#include
-__KERNEL_RCSID(1, "$NetBSD: meson_uart.c,v 1.5 2021/01/27 03:10:18 thorpej Exp $");
+__KERNEL_RCSID(1, "$NetBSD: meson_uart.c,v 1.6 2021/02/12 21:39:55 ryo Exp $");
#define cn_trap() \
do {\
@@ -260,7 +260,7 @@ meson_uart_cngetc(dev_t dev)
return -1;
}
- c = bus_space_read_4(bst, bsh, UART_RFIFO_REG);
+ c = bus_space_read_4(bst, bsh, UART_RFIFO_REG) & 0xff;
#if defined(DDB)
extern int db_active;
if (!db_active)
@@ -272,7 +272,7 @@ meson_uart_cngetc(dev_t dev)
splx(s);
- return c & 0xff;
+ return c;
}
static void
CVS commit: src/sys/arch/arm/acpi
Module Name:src Committed By: jmcneill Date: Fri Feb 12 12:26:09 UTC 2021 Modified Files: src/sys/arch/arm/acpi: acpi_platform.c Log Message: Reset serial terminal to default state at boot. UEFI may leave the serial console in an undesireable state (incorrect foreground and background colour, etc) when exiting. Send ANSI escape sequences when setting up the early console attachments to turn off character attributes and erase from the cursor to the end of the screen. To generate a diff of this commit: cvs rdiff -u -r1.23 -r1.24 src/sys/arch/arm/acpi/acpi_platform.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/acpi/acpi_platform.c diff -u src/sys/arch/arm/acpi/acpi_platform.c:1.23 src/sys/arch/arm/acpi/acpi_platform.c:1.24 --- src/sys/arch/arm/acpi/acpi_platform.c:1.23 Thu Feb 4 22:36:52 2021 +++ src/sys/arch/arm/acpi/acpi_platform.c Fri Feb 12 12:26:09 2021 @@ -1,4 +1,4 @@ -/* $NetBSD: acpi_platform.c,v 1.23 2021/02/04 22:36:52 thorpej Exp $ */ +/* $NetBSD: acpi_platform.c,v 1.24 2021/02/12 12:26:09 jmcneill Exp $ */ /*- * Copyright (c) 2018 The NetBSD Foundation, Inc. @@ -35,13 +35,14 @@ #include "opt_multiprocessor.h" #include -__KERNEL_RCSID(0, "$NetBSD: acpi_platform.c,v 1.23 2021/02/04 22:36:52 thorpej Exp $"); +__KERNEL_RCSID(0, "$NetBSD: acpi_platform.c,v 1.24 2021/02/12 12:26:09 jmcneill Exp $"); #include #include #include #include #include +#include #include #include @@ -214,6 +215,13 @@ acpi_platform_attach_uart(ACPI_TABLE_SPC break; } + /* + * UEFI firmware may leave the console in an undesireable state (wrong + * foreground/background colour, etc). Reset the terminal and clear + * text from the cursor to the end of the screne. + */ +printf_flags(TOCONS|NOTSTAMP, "\033[0m"); +printf_flags(TOCONS|NOTSTAMP, "\033[0J"); } static void
CVS commit: src/sys/arch/arm/cortex
Module Name:src
Committed By: ryo
Date: Tue Feb 9 17:44:01 UTC 2021
Modified Files:
src/sys/arch/arm/cortex: gicv3.c
Log Message:
fix build without MULTIPROCESSOR
To generate a diff of this commit:
cvs rdiff -u -r1.40 -r1.41 src/sys/arch/arm/cortex/gicv3.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/cortex/gicv3.c
diff -u src/sys/arch/arm/cortex/gicv3.c:1.40 src/sys/arch/arm/cortex/gicv3.c:1.41
--- src/sys/arch/arm/cortex/gicv3.c:1.40 Sun Feb 7 21:24:50 2021
+++ src/sys/arch/arm/cortex/gicv3.c Tue Feb 9 17:44:01 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: gicv3.c,v 1.40 2021/02/07 21:24:50 jmcneill Exp $ */
+/* $NetBSD: gicv3.c,v 1.41 2021/02/09 17:44:01 ryo Exp $ */
/*-
* Copyright (c) 2018 Jared McNeill
@@ -31,7 +31,7 @@
#define _INTR_PRIVATE
#include
-__KERNEL_RCSID(0, "$NetBSD: gicv3.c,v 1.40 2021/02/07 21:24:50 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: gicv3.c,v 1.41 2021/02/09 17:44:01 ryo Exp $");
#include
#include
@@ -79,11 +79,13 @@ gicd_write_4(struct gicv3_softc *sc, bus
bus_space_write_4(sc->sc_bst, sc->sc_bsh_d, reg, val);
}
+#ifdef MULTIPROCESSOR
static inline uint64_t
gicd_read_8(struct gicv3_softc *sc, bus_size_t reg)
{
return bus_space_read_8(sc->sc_bst, sc->sc_bsh_d, reg);
}
+#endif
static inline void
gicd_write_8(struct gicv3_softc *sc, bus_size_t reg, uint64_t val)
CVS commit: src/sys/arch/arm/cortex
Module Name:src Committed By: jakllsch Date: Tue Feb 9 14:24:14 UTC 2021 Modified Files: src/sys/arch/arm/cortex: gic.c Log Message: Avoid an extra daif read when dispatching interrupts by using ENABLE_INTERRUPT() / DISABLE_INTERRUPT() instead of cpsie() / cpsid() macros. To generate a diff of this commit: cvs rdiff -u -r1.43 -r1.44 src/sys/arch/arm/cortex/gic.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/arm/cortex/gic.c diff -u src/sys/arch/arm/cortex/gic.c:1.43 src/sys/arch/arm/cortex/gic.c:1.44 --- src/sys/arch/arm/cortex/gic.c:1.43 Thu Dec 3 07:45:52 2020 +++ src/sys/arch/arm/cortex/gic.c Tue Feb 9 14:24:14 2021 @@ -1,4 +1,4 @@ -/* $NetBSD: gic.c,v 1.43 2020/12/03 07:45:52 skrll Exp $ */ +/* $NetBSD: gic.c,v 1.44 2021/02/09 14:24:14 jakllsch Exp $ */ /*- * Copyright (c) 2012 The NetBSD Foundation, Inc. * All rights reserved. @@ -34,7 +34,7 @@ #define _INTR_PRIVATE #include -__KERNEL_RCSID(0, "$NetBSD: gic.c,v 1.43 2020/12/03 07:45:52 skrll Exp $"); +__KERNEL_RCSID(0, "$NetBSD: gic.c,v 1.44 2021/02/09 14:24:14 jakllsch Exp $"); #include #include @@ -367,9 +367,9 @@ armgic_irq_handler(void *tf) gicc_write(sc, GICC_PMR, armgic_ipl_to_priority(ipl)); ci->ci_cpl = ipl; } - cpsie(I32_bit); + ENABLE_INTERRUPT(); pic_dispatch(is, tf); - cpsid(I32_bit); + DISABLE_INTERRUPT(); gicc_write(sc, GICC_EOIR, iar); #ifdef DEBUG n++; @@ -529,7 +529,7 @@ armgic_cpu_init(struct pic_softc *pic, s } gicc_write(sc, GICC_PMR, armgic_ipl_to_priority(ci->ci_cpl)); // set PMR gicc_write(sc, GICC_CTRL, GICC_CTRL_V1_Enable); // enable interrupt - cpsie(I32_bit); // allow IRQ exceptions + ENABLE_INTERRUPT();// allow IRQ exceptions } void @@ -656,7 +656,7 @@ armgic_attach(device_t parent, device_t armgic_set_priority(>sc_pic, ci->ci_cpl); // set PMR gicd_write(sc, GICD_CTRL, GICD_CTRL_Enable); // enable Distributer gicc_write(sc, GICC_CTRL, GICC_CTRL_V1_Enable); // enable CPU interrupts - cpsie(I32_bit); // allow interrupt exceptions + ENABLE_INTERRUPT();// allow interrupt exceptions /* * For each line that isn't valid, we set the intrsource for it to
CVS commit: src/sys/arch/arm/cortex
Module Name:src
Committed By: jmcneill
Date: Sun Feb 7 21:24:50 UTC 2021
Modified Files:
src/sys/arch/arm/cortex: gicv3.c
Log Message:
Optimize hardware priority updates.
In gicv3_set_priority, read the current priority mask and only update it
if we are lowering the priority. The hardware priority filter is raised
only after taking an interrupt. This makes splfoo/splx without an interrupt
in between considerably cheaper as PMR writes are relatively expensive
compared to reads.
While here, avoid an extra daif read when dispatching interrupts by using
ENABLE_INTERRUPT() / DISABLE_INTERRUPT() instead of cpsie() / cpsid() macros.
To generate a diff of this commit:
cvs rdiff -u -r1.39 -r1.40 src/sys/arch/arm/cortex/gicv3.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/cortex/gicv3.c
diff -u src/sys/arch/arm/cortex/gicv3.c:1.39 src/sys/arch/arm/cortex/gicv3.c:1.40
--- src/sys/arch/arm/cortex/gicv3.c:1.39 Sat Jan 16 21:05:15 2021
+++ src/sys/arch/arm/cortex/gicv3.c Sun Feb 7 21:24:50 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: gicv3.c,v 1.39 2021/01/16 21:05:15 jmcneill Exp $ */
+/* $NetBSD: gicv3.c,v 1.40 2021/02/07 21:24:50 jmcneill Exp $ */
/*-
* Copyright (c) 2018 Jared McNeill
@@ -31,7 +31,7 @@
#define _INTR_PRIVATE
#include
-__KERNEL_RCSID(0, "$NetBSD: gicv3.c,v 1.39 2021/01/16 21:05:15 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: gicv3.c,v 1.40 2021/02/07 21:24:50 jmcneill Exp $");
#include
#include
@@ -220,8 +220,13 @@ static void
gicv3_set_priority(struct pic_softc *pic, int ipl)
{
struct gicv3_softc * const sc = PICTOSOFTC(pic);
+ const uint8_t curpmr = icc_pmr_read();
+ const uint8_t newpmr = IPL_TO_PMR(sc, ipl);
- icc_pmr_write(IPL_TO_PMR(sc, ipl));
+ if (newpmr > curpmr) {
+ /* Lowering priority mask */
+ icc_pmr_write(newpmr);
+ }
}
static void
@@ -407,7 +412,7 @@ gicv3_cpu_init(struct pic_softc *pic, st
;
/* Set initial priority mask */
- gicv3_set_priority(pic, IPL_HIGH);
+ icc_pmr_write(IPL_TO_PMR(sc, IPL_HIGH));
/* Set the binary point field to the minimum value */
icc_bpr1_write(0);
@@ -424,7 +429,7 @@ gicv3_cpu_init(struct pic_softc *pic, st
gicv3_redist_enable(sc, ci);
/* Allow IRQ exceptions */
- cpsie(I32_bit);
+ ENABLE_INTERRUPT();
}
#ifdef MULTIPROCESSOR
@@ -722,9 +727,14 @@ gicv3_irq_handler(void *frame)
struct gicv3_softc * const sc = gicv3_softc;
struct pic_softc *pic;
const int oldipl = ci->ci_cpl;
+ const uint8_t pmr = IPL_TO_PMR(sc, oldipl);
ci->ci_data.cpu_nintr++;
+ if (icc_pmr_read() != pmr) {
+ icc_pmr_write(pmr);
+ }
+
for (;;) {
const uint32_t iar = icc_iar1_read();
dsb(sy);
@@ -745,7 +755,7 @@ gicv3_irq_handler(void *frame)
if (__predict_false(ipl < ci->ci_cpl)) {
pic_do_pending_ints(I32_bit, ipl, frame);
} else if (ci->ci_cpl != ipl) {
- gicv3_set_priority(pic, ipl);
+ icc_pmr_write(IPL_TO_PMR(sc, ipl));
ci->ci_cpl = ipl;
}
@@ -756,9 +766,9 @@ gicv3_irq_handler(void *frame)
const int64_t nintr = ci->ci_data.cpu_nintr;
- cpsie(I32_bit);
+ ENABLE_INTERRUPT();
pic_dispatch(is, frame);
- cpsid(I32_bit);
+ DISABLE_INTERRUPT();
if (nintr != ci->ci_data.cpu_nintr)
ci->ci_intr_preempt.ev_count++;
CVS commit: src/sys/arch/arm/pic
Module Name:src
Committed By: jmcneill
Date: Sun Feb 7 21:18:37 UTC 2021
Modified Files:
src/sys/arch/arm/pic: pic.c
Log Message:
Use ENABLE_INTERRUPT() / DISABLE_INTERRUPT() instead of cpsie()/cpsid() in
places where we don't care about the cpsie() return value.
To generate a diff of this commit:
cvs rdiff -u -r1.61 -r1.62 src/sys/arch/arm/pic/pic.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/pic/pic.c
diff -u src/sys/arch/arm/pic/pic.c:1.61 src/sys/arch/arm/pic/pic.c:1.62
--- src/sys/arch/arm/pic/pic.c:1.61 Sun Nov 1 14:42:05 2020
+++ src/sys/arch/arm/pic/pic.c Sun Feb 7 21:18:37 2021
@@ -1,4 +1,4 @@
-/* $NetBSD: pic.c,v 1.61 2020/11/01 14:42:05 jmcneill Exp $ */
+/* $NetBSD: pic.c,v 1.62 2021/02/07 21:18:37 jmcneill Exp $ */
/*-
* Copyright (c) 2008 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -33,7 +33,7 @@
#include "opt_multiprocessor.h"
#include
-__KERNEL_RCSID(0, "$NetBSD: pic.c,v 1.61 2020/11/01 14:42:05 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pic.c,v 1.62 2021/02/07 21:18:37 jmcneill Exp $");
#include
#include
@@ -447,13 +447,14 @@ pic_deliver_irqs(struct pic_pending *pen
atomic_and_32(ipending, ~__BIT(irq));
is = pic->pic_sources[irq_base + irq];
if (is != NULL) {
-cpsie(I32_bit);
+ENABLE_INTERRUPT();
pic_dispatch(is, frame);
-cpsid(I32_bit);
+DISABLE_INTERRUPT();
#if PIC_MAXSOURCES > 32
/*
* There is a possibility of interrupting
- * from cpsie() to cpsid().
+ * from ENABLE_INTERRUPT() to
+ * DISABLE_INTERRUPT().
*/
poi = 1;
#endif
