On Tue, 2018-03-06 at 10:51 -0700, Simon Glass wrote:
> Hi,
>
> On 5 March 2018 at 02:43, wrote:
> >
> > From: Tien Fong Chee
> >
> > This is file system generic loader which can be used to load
> > the file image from the storage into
From: Duncan Hare
>
Adding wget
Signed-off-by: Duncan Hare
---
All the code is new, and not copied from any source.
Adding
net/wget.c
include/net/wget.h
Chages to
cmd/net.c
cmd/Kconfig
Changes in v8: None
cmd/Kconfig| 93 ++--
From: Duncan Hare
All the code is new, and not copied from any source.
>
Signed-off-by: Duncan Hare
---
Routine tcp_print_buffer() is used to print portions of
non zero terminated buffers. If there is an existing routine
please let me know.
From: Duncan Hare
>
cover-letter:
Why netboot:
Central management, including logs and change control,
coupled with with enhanced security and unauthorized
change detection and remediation by exposing a
small attack surface.
Why TCP:
Currently file transfer are
Without the volatile attribute, compilers are entitled to optimize out
the same asm(). In the case of __udelay() in syscounter.c, it calls
`get_ticks()` twice, one for the starting time and the second in the
loop to check the current time. When compilers inline `get_ticks()`
they see the same
On Wed, Mar 7, 2018 at 5:20 PM, Vignesh R wrote:
> DWC3 USB3 controllers will need USB3 PHY to be enabled, in addition to
> USB2 PHY, to be functional. Therefore enable USB3 PHY when available.
>
> Signed-off-by: Vignesh R
> ---
> drivers/usb/host/xhci-dwc3.c |
On Wed, Mar 7, 2018 at 5:20 PM, Vignesh R wrote:
> Refractor PHY get/init/poweron and PHY poweroff/exit operations into
> separate function so that its easy to support multiple PHYs.
>
> Signed-off-by: Vignesh R
> ---
> drivers/usb/host/xhci-dwc3.c | 75
>
On 03/08/2018 12:12 PM, Marek Vasut wrote:
> On 03/08/2018 03:17 AM, Jaehoon Chung wrote:
>> On 03/06/2018 05:07 PM, linux-kernel-...@beckhoff.com wrote:
>>> From: Patrick Bruenn
>>>
>>> On a socfpga_cyclone5 based board the SD card, was never powered up. For
>>> other
On 03/08/2018 03:17 AM, Jaehoon Chung wrote:
On 03/06/2018 05:07 PM, linux-kernel-...@beckhoff.com wrote:
From: Patrick Bruenn
On a socfpga_cyclone5 based board the SD card, was never powered up. For
other dw_mmc based SoCs dwmci_probe() is called in the platform
On 03/06/2018 05:07 PM, linux-kernel-...@beckhoff.com wrote:
> From: Patrick Bruenn
>
> On a socfpga_cyclone5 based board the SD card, was never powered up. For
> other dw_mmc based SoCs dwmci_probe() is called in the platform specific
> probe(). It seems this call is
Hi Peng,
On 03/05/2018 05:20 PM, Peng Fan wrote:
> sd_read_ssr returns 0, means no error.
> Fixes: 5b2e72f32721484("mmc: read ssr only if MMC write support is enabled")
>
> Signed-off-by: Peng Fan
> Cc: Jaehoon Chung
> Cc: Jean-Jacques Hiblot
2018-03-07 19:02 GMT+08:00 Jagan Teki :
>
>
> On 07-Mar-2018 1:12 PM, "陳建志" wrote:
>
> 2018-03-07 15:20 GMT+08:00 Jagan Teki :
>> On Wed, Mar 7, 2018 at 12:34 PM, Andes wrote:
>>> From: Rick Chen
2018-03-07 23:45 GMT+09:00 Tom Rini :
> On Wed, Mar 07, 2018 at 03:28:20PM +0100, Patrick Delaunay wrote:
>
>> avoid warning: no previous prototype for ‘mach_cpu_init’
>>
>> Signed-off-by: Patrick Delaunay
>
> Reviewed-by: Tom Rini
Other filesystem drivers don't do this.
Signed-off-by: Marek Behun
---
fs/ext4/ext4_common.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/fs/ext4/ext4_common.c b/fs/ext4/ext4_common.c
index dac9545365..e3cc30a1e0 100644
--- a/fs/ext4/ext4_common.c
Since now we have driver for clocks on Armada 37xx, use it to determine
SQF clock frequency for the SPI driver.
Also change the default config files for Armada 37xx devices so that
the clock driver is enabled by default, otherwise the SPI driver cannot
be enabled.
Signed-off-by: Marek Behun
Lane 0 supports SGMII1 and USB3.
Lane 1 supports SGMII0 and PEX0.
Lane 2 supports SATA0 and USB3.
This is needed for Armada 37xx.
Signed-off-by: Marek Behun
---
arch/arm/dts/armada-37xx.dtsi | 5 +++--
drivers/phy/marvell/comphy_a3700.c | 36
The drivers are based on Linux driver by Gregory Clement.
The TBG clocks support only the .get_rate method.
- since setting rate is not supported, the driver computes the rates
when probing and so subsequent calls to the .get_rate method do not
read the corresponding registers again
Move the reg_set* functions into comphy.h as static inline functions.
Change return type of get_*_string to const char *.
Signed-off-by: Marek Behun
---
drivers/phy/marvell/comphy.h | 41 ++---
drivers/phy/marvell/comphy_core.c | 64
The driver is already in the tree and functional. Enable it by default
and also remove the board_early_init_f which was a temporary fix for
not having the pinctrl driver.
Signed-off-by: Marek Behun
---
board/Marvell/mvebu_armada-37xx/board.c | 32
According to specification, CFG_PM_RXDLOZ_WAIT should be set to 0x7
when reference clock is at 25 MHz. The specification (at least the
version I have) does not mentoin the setting for 40 MHz reference
clock, but Marvell's U-Boot sets 0xC in that case.
Signed-off-by: Marek Behun
Currently there is for each register special functional macro, ie:
LANE_CFG1_ADDR(u)
GLOB_CLK_SRC_LO_ADDR(u)
...
where can be either PCIE or USB3.
Change this to one function PHY_ADDR(unit, addr). The code becomes:
PHY_ADDR(PCIE, LANE_CFG1)
PHY_ADDR(PCIE, GLOB_CLK_SRC_LO)
...
The driver does not check id phy_connect failed (for example on wrong
property name in device tree). In such a case a fault occurs and the
CPU is restarted.
Signed-off-by: Marek Behun
---
drivers/net/mvneta.c | 4
1 file changed, 4 insertions(+)
diff --git
The groups pcie1, ptp and mii changed in new revision (from 2016).
Also smi was added to support enabling the MDIO pins.
Signed-off-by: Marek Behun
---
drivers/pinctrl/mvebu/pinctrl-armada-37xx.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git
Currently comphy_mux supports only trivial order of nodes in pin
selector register, that is lane N on position N*bitcount.
Add support for nontrivial order, with map stored in device tree
property mux-lane-order.
This is needed for Armada 37xx.
Signed-off-by: Marek Behun
Add support for the clk dump command on Armada 37xx.
Signed-off-by: Marek Behun
---
drivers/clk/mvebu/armada-37xx-periph.c | 36 +-
drivers/clk/mvebu/armada-37xx-tbg.c| 2 ++
2 files changed, 37 insertions(+), 1 deletion(-)
diff --git
The timeout is set to PLL_LOCK_TIMEOUT in every call to
comphy_poll_reg. Remove this parameter from the function.
Signed-off-by: Marek Behun
---
drivers/phy/marvell/comphy_a3700.c | 16 +++-
1 file changed, 3 insertions(+), 13 deletions(-)
diff --git
This commit is based on commit d9899826 by
zachary
from u-boot-marvell, see
github.com/MarvellEmbeddedProcessors/u-boot-marvell/commit/d9899826
- According to design specification, the transmitter should be set to high
impedence mode during electrical idle. Thus
In SGMII initialization PIN_PIPE_SEL has to be zero when resetting
the PHY. Since comphy_mux already set the selector register to
correct values, we have to store it's value before setting it to 0
and restore it after SGMII init.
Signed-off-by: Marek Behun
---
Signed-off-by: Marek Behun
---
drivers/phy/marvell/comphy_a3700.c | 26 +-
1 file changed, 13 insertions(+), 13 deletions(-)
diff --git a/drivers/phy/marvell/comphy_a3700.c
b/drivers/phy/marvell/comphy_a3700.c
index d283604e1a..734d4e55b1 100644
---
When USB3 is on comphy lane 2 on the Armada 37xx, the registers
have to be accessed indirectly via SATA indirect access.
Signed-off-by: Marek Behun
---
drivers/phy/marvell/comphy_a3700.c | 111 +
drivers/phy/marvell/comphy_a3700.h | 1 +
The macro phy_write16 is not used by the rest of the code,
phy_read16 is not used at all.
We also change the macro SGMIIPHY_ADDR to a static inline function.
Signed-off-by: Marek Behun
---
drivers/phy/marvell/comphy_a3700.c | 22 +++---
Create a special function for indirect register setting,
reg_set_indirect, and use it instead of the two calls to reg_set.
Signed-off-by: Marek Behun
---
drivers/phy/marvell/comphy_a3700.c | 32
1 file changed, 20 insertions(+), 12
All the calls to reg_set and friends have to cast the first argument
to void __iomem *. Lets change the return type of the MVEBU_REG macro
instead.
Signed-off-by: Marek Behun
---
drivers/phy/marvell/comphy_a3700.c | 205 -
This is a series of patches to update the support of Armada 37xx devices.
Summary:
- patches 1-6 are cosmetic patches for the Armada 37xx comphy driver
- the 7th patch adds support for USB3 on comphy lane 2, which needs indirect
register access
- patches 8-9 change USB3 phy
On Mon, Mar 5, 2018 at 2:05 PM, Álvaro Fernández Rojas
wrote:
> Signed-off-by: Álvaro Fernández Rojas
> ---
> v5: Receive as much packets as possible from bcm6348-eth and cache them in
> net_rx_packets. This is needed in order to fix flow control issues.
>
On Mon, Mar 5, 2018 at 2:05 PM, Álvaro Fernández Rojas
wrote:
> This adds channels support for dma controllers that have multiple channels
> which can transfer data to/from different devices (enet, usb...).
>
> Signed-off-by: Álvaro Fernández Rojas
>
We had a few reports coming in from people that had their autoboot chain
aborted after pinmuxing support was added for the RPi.
The culprit is easy: The UARTs may have been enabled before, but muxed
to an incorrect pin. That pin may have pulled the RX line down which again
lead to lots of zero
After the UART was initialized, we may still have bogus data in the
RX queue if it was enabled with incorrect pin muxing before.
So let's flush the RX queue whenever we initialize baud rates.
This fixes a regression with the dynamic pinmuxing code when enable_uart=1
is not set in config.txt on
After the UART was initialized, we may still have bogus data in the
RX queue if it was enabled with incorrect pin muxing before.
So let's flush the RX queue whenever we initialize baud rates.
This fixes a regression with the dynamic pinmuxing code when enable_uart=1
is not set in config.txt.
On 07.03.18 13:59, Peter Robinson wrote:
> On Tue, Mar 6, 2018 at 1:13 PM, Alexander Graf wrote:
>> After the UART was initialized, we may still have bogus data in the
>> RX queue if it was enabled with incorrect pin muxing before.
>>
>> So let's flush the RX queue whenever we
On Mon, Mar 5, 2018 at 2:05 PM, Álvaro Fernández Rojas
wrote:
> Signed-off-by: Álvaro Fernández Rojas
> ---
> v5: no changes
> v4: no changes
> v3: no changes
> v2: no changes
>
> include/phy.h | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git
Hi all,
just a quick check because I received reports internally that things are
not working: Is latest U-boot able to drive Aria 10 SoC FGPA boards
completely, or are there still some features missing that downstream
SDKs only contain?
We need upstream U-boot features for a target but are
Hi Duncan,
The subject of all these patches ("Integrating TCP and wget into
u-boot") is what should be the title of a cover letter. You need to
give each patch a reasonable subject about that patch, not all of them
together.
On Thu, Mar 1, 2018 at 8:59 PM, wrote:
> From:
On Thu, Mar 1, 2018 at 9:00 PM, wrote:
> From: Duncan Hare
>
> Too long a line in wget, line 386
> Embedded blanks and tabs in clarifying comments in tcp.c
These changes should be squashed into the previous patches.
>
> Signed-off-by: Duncan Hare
On Tue, Mar 6, 2018 at 8:39 PM, Heinrich Schuchardt wrote:
> After allocating plat the pointer is checked.
> Afterwards name is allocated and not checked.
>
> Add the missing check to avoid a possible NULL dereference.
>
> Signed-off-by: Heinrich Schuchardt
On Wed, Mar 7, 2018 at 4:40 AM, Jason Kridner wrote:
> From: Jason Kridner
>
> NETCONSOLE isn't compiled in with SPL, so the include file needs to recognize
> that.
>
> Signed-off-by: Jason Kridner
> Cc: Joe Hershberger
On 03/06/2018 10:10 AM, Madan Srinivas wrote:
> Adds a dedicated defconfig to build TI K2L secure
> devices and updates MAINTAINERS.
>
> k2l_hs_evm_defconfig is created from the k2l_evm_defconfig
> and removes support for SPL, as SPL is not supported on K2
> HS devices. Corrects SYS_TEXT_BASE for
On 7.3.2018 06:12, Vipul Kumar wrote:
> This patch added Kconfig support for CONFIG_XILINX_TB_WATCHDOG
> and enabled it in respective defconfig.
>
> Signed-off-by: Vipul Kumar
> Signed-off-by: Siva Durga Prasad Paladugu
> ---
> Changes in v3:
> - Removed
On Wed, Mar 07, 2018 at 03:28:20PM +0100, Patrick Delaunay wrote:
> avoid warning: no previous prototype for ‘mach_cpu_init’
>
> Signed-off-by: Patrick Delaunay
Reviewed-by: Tom Rini
--
Tom
signature.asc
Description: PGP signature
From: Nitin Jain
This patch is used for disable the strict alignment of data
to avoid the memory alignment issues.
Also setup this option for Xilinx Zynq.
Signed-off-by: Nitin Jain
Signed-off-by: Siva Durga Prasad Paladugu
ZynqMP Emulation board is no longer tested and there is no reason to
keep maintaining it.
Signed-off-by: Michal Simek
---
arch/arm/dts/Makefile | 1 -
arch/arm/dts/zynqmp-ep108-clk.dtsi | 172 ---
arch/arm/dts/zynqmp-ep108.dts
On Wed, Mar 07, 2018 at 02:57:19AM +0100, Heinrich Schuchardt wrote:
> kmerr: verify that malloc and calloc are followed by a check to verify
> that we are not out of memory.
>
> badzero: Compare pointer-typed values to NULL rather than 0
>
> Both checks are copied from the Linux kernel
On Wed, Mar 07, 2018 at 05:40:44AM -0500, Jason Kridner wrote:
> Enable NETCONSOLE by default. Still requires changes to the boot
> environment to enable on the platform.
>
> Signed-of-by: Jason Kridner
> Cc: Tom Rini
Reviewed-by: Tom Rini
avoid warning: no previous prototype for ‘mach_cpu_init’
Signed-off-by: Patrick Delaunay
---
Changes in v2:
- add return info for functions mach_cpu_init() and arch_cpu_init()
include/common.h | 14 ++
1 file changed, 14 insertions(+)
diff --git
On Wed, Mar 07, 2018 at 05:40:43AM -0500, Jason Kridner wrote:
> From: Jason Kridner
>
> NETCONSOLE isn't compiled in with SPL, so the include file needs to recognize
> that.
>
> Signed-off-by: Jason Kridner
> Cc: Joe Hershberger
On Wed, Mar 07, 2018 at 05:40:41AM -0500, Jason Kridner wrote:
> Texas Instruments AM3358 based low-cost board using Octavo Systems OSD3358 SIP
> with built-in TPS65217 PMIC and 512MB DDR3. Board features small 35mm x
> 55mm size, high-speed USB OTG, microSD and 72 0.1" expansion header
> pins
On Wed, Mar 07, 2018 at 05:40:42AM -0500, Jason Kridner wrote:
> This enables mainline u-boot to boot the BeagleBoard.org Debian
> distribution builds without extensive environment modifications.
>
> Some boot layouts only have a single partition on the
> MMC/eMMC. This will scan those
On Tue, Mar 06, 2018 at 11:10:09AM -0500, Madan Srinivas wrote:
> This patch updates the default u-boot env for K2L HS devices
> to install the secure boot monitor and load the fitImage during
> boot.
>
> Signed-off-by: Madan Srinivas
> Acked-by: Andrew F. Davis
>
On Wed, Mar 07, 2018 at 10:42:44AM -0300, Fabio Estevam wrote:
> Hi Yasushi ,
>
> On Wed, Mar 7, 2018 at 2:57 AM, Yasushi SHOJI wrote:
>
> > Do you guys really want to put volatile on all of these now?
> > We are at rc4 and Tom is planing to cut the release
> > March
On Tue, Mar 06, 2018 at 11:10:10AM -0500, Madan Srinivas wrote:
> Adds a dedicated defconfig to build TI K2L secure
> devices and updates MAINTAINERS.
>
> k2l_hs_evm_defconfig is created from the k2l_evm_defconfig
> and removes support for SPL, as SPL is not supported on K2
> HS devices.
Hi Simon
> -Original Message-
> From: s...@google.com [mailto:s...@google.com] On Behalf Of Simon Glass
>
> Hi Patrick,
>
> On 5 March 2018 at 07:24, Patrick Delaunay wrote:
> >
> > avoid warning: no previous prototype for ‘mach_cpu_init’
> > +/**
> > + *
From: Siva Durga Prasad Paladugu
The vcu disable bit in efuse ipdisable register is valid only
if PL powered up so, consider PL powerup status for determing
EG/EV part. If PL is not powered up, ignore EG/EV part of string.
The PL powerup status will be filled by
From: Vipul Kumar
This patch print pl clocks (pl0...pl3) and watchdog
clock using clk dump.
Signed-off-by: Vipul Kumar
Signed-off-by: Michal Simek
---
drivers/clk/clk_zynqmp.c | 75
From: Vipul Kumar
NAND erase was not happening for size 1GiB or more. Erase
command was executing successfully but in actual, it was not
erasing.
This patch fixed erase issue for 1 GiB or more size nand.
Signed-off-by: Vipul Kumar
Signed-off-by:
Hi Yasushi ,
On Wed, Mar 7, 2018 at 2:57 AM, Yasushi SHOJI wrote:
> Do you guys really want to put volatile on all of these now?
> We are at rc4 and Tom is planing to cut the release
> March 12th.
This can be done at a later step.
> I'm attaching a tentative patch to
On 03/07/2018 02:07 PM, Peter Robinson wrote:
On Tue, Mar 6, 2018 at 1:13 PM, Alexander Graf wrote:
We had a few reports coming in from people that had their autoboot chain
aborted after pinmuxing support was added for the RPi.
The culprit is easy: The UARTs may have been
On Tue, Mar 6, 2018 at 1:13 PM, Alexander Graf wrote:
> We had a few reports coming in from people that had their autoboot chain
> aborted after pinmuxing support was added for the RPi.
>
> The culprit is easy: The UARTs may have been enabled before, but muxed
> to an incorrect
On Tue, Mar 6, 2018 at 1:13 PM, Alexander Graf wrote:
> After the UART was initialized, we may still have bogus data in the
> RX queue if it was enabled with incorrect pin muxing before.
>
> So let's flush the RX queue whenever we initialize baud rates.
>
> This fixes a regression
On Tue, Mar 6, 2018 at 1:13 PM, Alexander Graf wrote:
> After the UART was initialized, we may still have bogus data in the
> RX queue if it was enabled with incorrect pin muxing before.
>
> So let's flush the RX queue whenever we initialize baud rates.
>
> This fixes a regression
Enable NETCONSOLE by default. Still requires changes to the boot
environment to enable on the platform.
Signed-of-by: Jason Kridner
Cc: Tom Rini
---
configs/am335x_evm_usbspl_defconfig | 7 +++
1 file changed, 7 insertions(+)
diff --git
This enables mainline u-boot to boot the BeagleBoard.org Debian
distribution builds without extensive environment modifications.
Some boot layouts only have a single partition on the
MMC/eMMC. This will scan those partitions after the second
partition that was already being scanned.
Some layouts
From: Jason Kridner
NETCONSOLE isn't compiled in with SPL, so the include file needs to recognize
that.
Signed-off-by: Jason Kridner
Cc: Joe Hershberger
---
include/net.h | 6 +++---
1 file changed, 3 insertions(+), 3
Texas Instruments AM3358 based low-cost board using Octavo Systems OSD3358 SIP
with built-in TPS65217 PMIC and 512MB DDR3. Board features small 35mm x
55mm size, high-speed USB OTG, microSD and 72 0.1" expansion header
pins with 2xSPI, 2xI2C, 2xUART, USB, 8xADC, up-to-44 GPIO, PRU pins and much
This series sets up the am335x_evm_usbspl_defconfig to boot the TI
AM335x based BeagleBoard.org PocketBeagle using the BeagleBoard.org
provided Debian images and enables NETCONSOLE over USB when the
environment is updated as needed.
Jason Kridner (4):
Add support for BeagleBoard.org
On Wed, Mar 7, 2018 at 4:53 PM, Adam Ford wrote:
> With the introduction of ("Boards,Need,to,Switch,DM] spi: omap3_spi:
> Full dm conversion"), Driver Model for McSPI is now available on the
> omap3. This enables the config by default on omap3_logic boards.
>
> Signed-off-by:
With the introduction of ("Boards,Need,to,Switch,DM] spi: omap3_spi:
Full dm conversion"), Driver Model for McSPI is now available on the
omap3. This enables the config by default on omap3_logic boards.
Signed-off-by: Adam Ford
diff --git a/configs/omap3_logic_defconfig
On Tue, Mar 6, 2018 at 11:00 PM, Jagan Teki wrote:
> omap3_spi now support dt along with platform data,
> respective boards need to switch into dm for the same.
>
> Signed-off-by: Jagan Teki
> ---
> Changes for v2:
> - Fixes
On 07-Mar-2018 1:12 PM, "陳建志" wrote:
2018-03-07 15:20 GMT+08:00 Jagan Teki :
> On Wed, Mar 7, 2018 at 12:34 PM, Andes wrote:
>> From: Rick Chen
>>
>> atcspi200_spi now support dt along with platform data.
From: Patrick Bruenn
To avoid board specificy LED activation code, automatically
activate gpio-leds with "default-state" property during bind().
Signed-off-by: Patrick Bruenn
---
drivers/led/led_gpio.c | 9 +
1 file changed, 9
From: Patrick Bruenn
Add support for the device tree property "default-state". This feature
might be useful for LEDs indicating "power on" or similar states.
Note: Even with this commit gpio-leds remain in reset state. That's
because the led_gpio is not probed until
From: Patrick Bruenn
main usecase in mind are LEDs which indicate a state like "power on".
With this patchset applied, all you have to do is:
Add a gpio-led node with 'default-state = "on";' property to your device
tree. And the LED will automatically light up during
DWC3 USB3 controllers will need USB3 PHY to be enabled, in addition to
USB2 PHY, to be functional. Therefore enable USB3 PHY when available.
Signed-off-by: Vignesh R
---
drivers/usb/host/xhci-dwc3.c | 11 +++
1 file changed, 11 insertions(+)
diff --git
Refractor PHY get/init/poweron and PHY poweroff/exit operations into
separate function so that its easy to support multiple PHYs.
Signed-off-by: Vignesh R
---
drivers/usb/host/xhci-dwc3.c | 75
1 file changed, 48 insertions(+), 27
This series has couple of fixes needed to get DWC3 USB3 controller to
talk to USB3 devices on AM57xx SoCs.
v2:
* Refractor PHY operations into separate functions.
Vignesh R (3):
usb: xhci-dwc3: Power on USB PHY before using
usb: xhc-dwc3: Refractor PHY operations into separate function
It is wrong that expect .phy_init() to also power on the PHY. Therefore,
explicitly, call generic_phy_power_on() after generic_phy_power_init() in
order to power on PHY before using it.
Signed-off-by: Vignesh R
Reviewed-by: Bin Meng
---
On Tue, Mar 06, 2018 at 11:38:20PM +0200, Tuomas Tynkkynen wrote:
> For some reason we seem to have documented how to build
> u-boot-sunxi-with-spl.bin manually with cat but not have a build system
> rule for it. Let's fix this to have the file built by default just like
> it is on 32-bit sunxi
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