[U-Boot] [PATCH] db410c: fix alignment of dts file
Alignment was wrong, missing one tab. fix it.
Signed-off-by: Ramon Fried
---
arch/arm/dts/dragonboard410c-uboot.dtsi | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm/dts/dragonboard410c-uboot.dtsi
b/arch/arm/dts/dragonboard410c-uboot.dtsi
index b968f5eb68..95c82a6f2d 100644
--- a/arch/arm/dts/dragonboard410c-uboot.dtsi
+++ b/arch/arm/dts/dragonboard410c-uboot.dtsi
@@ -21,14 +21,14 @@
};
};
- qcom,gcc@180 {
- u-boot,dm-pre-reloc;
- };
+ qcom,gcc@180 {
+ u-boot,dm-pre-reloc;
+ };
- serial@78b {
- u-boot,dm-pre-reloc;
+ serial@78b {
+ u-boot,dm-pre-reloc;
+ };
};
- };
};
--
2.17.1
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Re: [U-Boot] Please pull u-boot-fsl-qoriq master
On 06/08/2018 09:39 PM, Tom Rini wrote: > On Fri, Jun 08, 2018 at 11:49:32PM +, York Sun wrote: > >> Tom, >> >> The following changes since commit 71002b508a1bc0986023764f155f0db26f548db2: >> >> cmd: add missing line breaks for pr_err() (2018-06-07 20:06:29 -0400) >> >> are available in the git repository at: >> >> git://git.denx.de/u-boot-fsl-qoriq.git >> >> for you to fetch changes up to e4d594b4e0b4f81a65bd84c41fa7519b279d5432: >> >> LS1012AFRWY: Add Secure Boot support (2018-06-08 16:43:19 -0700) >> > > NAK. First, include/configs/ls1012afrwy.h needs a kernel-style SPDX This is easy to fix to follow the new format. > tag. Second (and harder) is that: > commit 6f54af8c1a4dfa66cdeb5931ba5f76a22753d139 > Author: Bhaskar Upadhaya > Date: Wed May 23 11:03:30 2018 +0530 > > board: ls1012a: FRWY-LS1012A board support > > breaks imx6dl_mamoj builds. > Can you share your build log? I am having trouble to connect to my AWS server today. This commit doesn't touch imx6dl_mamoj. York ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] Please pull u-boot-fsl-qoriq master
Thanks for the feedback. I didn't catch the failure. Travis build failed on many targets due to toolchain download. My setup doesn't cover i.mx. York Sent from my iPhone > On Jun 8, 2018, at 21:39, Tom Rini wrote: > >> On Fri, Jun 08, 2018 at 11:49:32PM +, York Sun wrote: >> >> Tom, >> >> The following changes since commit 71002b508a1bc0986023764f155f0db26f548db2: >> >> cmd: add missing line breaks for pr_err() (2018-06-07 20:06:29 -0400) >> >> are available in the git repository at: >> >> git://git.denx.de/u-boot-fsl-qoriq.git >> >> for you to fetch changes up to e4d594b4e0b4f81a65bd84c41fa7519b279d5432: >> >> LS1012AFRWY: Add Secure Boot support (2018-06-08 16:43:19 -0700) >> > > NAK. First, include/configs/ls1012afrwy.h needs a kernel-style SPDX > tag. Second (and harder) is that: > commit 6f54af8c1a4dfa66cdeb5931ba5f76a22753d139 > Author: Bhaskar Upadhaya > Date: Wed May 23 11:03:30 2018 +0530 > >board: ls1012a: FRWY-LS1012A board support > > breaks imx6dl_mamoj builds. > > -- > Tom ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] Please pull u-boot-dm
On Thu, Jun 07, 2018 at 03:18:29PM -0800, Simon Glass wrote: > Hi Tom, > > Here are the binman patches (support for hierarchical images and map > files), buildman environment support and a few test fixes. > > As you know there are more test fixes to come once we figure things out. > > > > The following changes since commit 3eceff642c01e03e055127c9cf21608faaff28ac: > > Merge branch 'master' of git://git.denx.de/u-boot-samsung > (2018-06-06 09:08:16 -0400) > > are available in the Git repository at: > > git://git.denx.de/u-boot-dm.git > > for you to fetch changes up to 844e5b20f2691eccce9ac8f7e3732bbb5d0ac757: > > binman: Mark 'align-end' as implemented (2018-06-07 11:25:08 -0800) > Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] Please pull from u-boot-i2c
On Fri, Jun 08, 2018 at 03:59:48PM +0200, Heiko Schocher wrote: > Hello Tom, > > please pull from u-boot-i2c.git master > > The following changes since commit 3eceff642c01e03e055127c9cf21608faaff28ac: > > Merge branch 'master' of git://git.denx.de/u-boot-samsung (2018-06-06 > 09:08:16 -0400) > > are available in the Git repository at: > > git://git.denx.de/u-boot-i2c.git master > > for you to fetch changes up to d78ecc733988d07a87c97f7f1c19171c437a8712: > > mvebu: turris_omnia: add note about i2c slave disable (2018-06-07 14:20:09 > +0200) > Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] Pull request: u-boot-ubi/master
On Fri, Jun 08, 2018 at 04:03:06PM +0200, Heiko Schocher wrote: > Hello Tom, > > please pull from u-boot-ubi.git master > > The following changes since commit 89d811eee694ebd7dee0766e90552b91e89f60fb: > > Merge git://git.denx.de/u-boot-marvell (2018-06-05 07:13:42 -0400) > > are available in the Git repository at: > > git://git.denx.de/u-boot-ubi.git master > > for you to fetch changes up to 78306cba118e718a3b429695ac48846b9d9afeff: > > mtd: ubi: Add missing newlines in ubi_init() (2018-06-06 10:25:13 +0200) > Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] Please pull u-boot-fsl-qoriq master
On Fri, Jun 08, 2018 at 11:49:32PM +, York Sun wrote: > Tom, > > The following changes since commit 71002b508a1bc0986023764f155f0db26f548db2: > > cmd: add missing line breaks for pr_err() (2018-06-07 20:06:29 -0400) > > are available in the git repository at: > > git://git.denx.de/u-boot-fsl-qoriq.git > > for you to fetch changes up to e4d594b4e0b4f81a65bd84c41fa7519b279d5432: > > LS1012AFRWY: Add Secure Boot support (2018-06-08 16:43:19 -0700) > NAK. First, include/configs/ls1012afrwy.h needs a kernel-style SPDX tag. Second (and harder) is that: commit 6f54af8c1a4dfa66cdeb5931ba5f76a22753d139 Author: Bhaskar Upadhaya Date: Wed May 23 11:03:30 2018 +0530 board: ls1012a: FRWY-LS1012A board support breaks imx6dl_mamoj builds. -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] fit: Enable fitImage by default if OF_LIBFDT is enabled
On Fri, Jun 08, 2018 at 04:18:43PM +0200, Marek Vasut wrote: > On 06/08/2018 01:18 PM, Tom Rini wrote: > > On Wed, May 23, 2018 at 12:49:56AM +0200, Marek Vasut wrote: > > > >> Enable fitImage by default on systems which already use libfdt. > >> The fitImage has many benefits over zImage and supersedes legacy > >> uImage, so enable it by default where possible to make it widely > >> available. > >> > >> Signed-off-by: Marek Vasut > >> Cc: Maxime Ripard > >> Cc: Michal Simek > >> Cc: Tom Rini > >> --- > >> NOTE: And make my life easier, so that every contemporary board I > >> look at supports a civilized contemporary boot image format > >> and I don't have to mess around to find the right combo of > >> zImage or uImage and DTB and the right load addresses and > >> keep loading gazilion of files every time I boot a board. > > > > You need to run this through travis or otherwise build the world. A > > number of platforms fail due to size constraints and a few others (snow > > for example) fail for other reasons. Thanks! > > Lovely, so how do we constrain those ? btw I'd have expected snow to > have fitImage enabled already ? Well, I would suggest updating their defconfigs to have the feature disabled. snow was failing for some other reason, that I'm still pretty sure was part of this patch and not some of the others I asked for changes on. -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] Please pull u-boot-fsl-qoriq master
Tom, The following changes since commit 71002b508a1bc0986023764f155f0db26f548db2: cmd: add missing line breaks for pr_err() (2018-06-07 20:06:29 -0400) are available in the git repository at: git://git.denx.de/u-boot-fsl-qoriq.git for you to fetch changes up to e4d594b4e0b4f81a65bd84c41fa7519b279d5432: LS1012AFRWY: Add Secure Boot support (2018-06-08 16:43:19 -0700) Bhaskar Upadhaya (2): board: Kconfig: Re-Arrangement of PPA firmware and header addresses board: ls1012a: FRWY-LS1012A board support Jagdish Gediya (1): arm: ls1021aqds: config: enable CONFIG_ID_EEPROM for mac command Priyanka Jain (1): board/freescale,lsch3: Add entry for 0.9v Ran Wang (1): armv8: ls1088a: Enable USB in ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig Vinitha V Pillai (1): LS1012AFRWY: Add Secure Boot support arch/arm/Kconfig | 13 ++ arch/arm/cpu/armv8/Kconfig | 1 + arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 34 -- arch/arm/dts/Makefile | 3 +- arch/arm/dts/fsl-ls1012a-frwy.dts | 43 +++ board/freescale/common/vid.c | 2 +- board/freescale/ls1012afrdm/Kconfig| 47 +++- board/freescale/ls1012afrdm/MAINTAINERS| 11 ++ board/freescale/ls1012afrdm/ls1012afrdm.c | 73 ++- board/freescale/ls1012aqds/Kconfig | 3 + board/freescale/ls1012ardb/Kconfig | 14 +++ board/freescale/ls1043aqds/Kconfig | 16 +++ board/freescale/ls1043ardb/Kconfig | 14 +++ board/freescale/ls1046aqds/Kconfig | 16 +++ board/freescale/ls1046ardb/Kconfig | 15 +++ board/freescale/ls1088a/Kconfig| 28 + board/freescale/ls2080aqds/Kconfig | 16 +++ board/freescale/ls2080ardb/Kconfig | 31 +++-- configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig | 54 + configs/ls1012afrwy_qspi_defconfig | 50 .../ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig | 7 ++ drivers/net/pfe_eth/pfe_firmware.c | 29 + include/configs/ls1012afrwy.h | 134 + include/configs/ls1021aqds.h | 9 ++ 24 files changed, 603 insertions(+), 60 deletions(-) create mode 100644 arch/arm/dts/fsl-ls1012a-frwy.dts create mode 100644 configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig create mode 100644 configs/ls1012afrwy_qspi_defconfig create mode 100644 include/configs/ls1012afrwy.h Thanks. York ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 3/3] LS1012AFRWY: Add Secure Boot support
On 05/23/2018 03:15 AM, Bhaskar Upadhaya wrote: > From: Vinitha V Pillai > > Added the following: > 1. defconfig for LS1012AFRWY Secure boot > 2. PfE Validation support > > Signed-off-by: Vinitha V Pillai > --- Applied to u-boot-fsl-qoriq master. Awaiting upstream. Thanks. York ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 2/3] board: ls1012a: FRWY-LS1012A board support
On 05/23/2018 03:15 AM, Bhaskar Upadhaya wrote: > FRWY-LS1012A belongs to LS1012A family with features > 2 1G SGMII PFE MAC, Micro SD, USB 3.0, DDR, QuadSPI, Audio, > UART. > > Signed-off-by: Bhaskar Upadhaya > --- Applied to u-boot-fsl-qoriq master. Awaiting upstream. Thanks. York ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 1/3] board: Kconfig: Re-Arrangement of PPA firmware and header addresses
On 05/23/2018 03:15 AM, Bhaskar Upadhaya wrote: > ppa firmware and header address may vary depending upon different boards, > configure ppa firmware and header address in board specific kconfig > > Signed-off-by: Vinitha V Pillai > Signed-off-by: Jagdish Gediya > Signed-off-by: Bhaskar Upadhaya > --- Applied to u-boot-fsl-qoriq master. Awaiting upstream. Thanks. York ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH] arm: ls1021aqds: config: enable CONFIG_ID_EEPROM for mac command
On 05/09/2018 04:36 AM, Jagdish Gediya wrote: > Signed-off-by: Jagdish Gediya > --- > include/configs/ls1021aqds.h | 9 + > 1 file changed, 9 insertions(+) > Applied to u-boot-fsl-qoriq master. Awaiting upstream. Thanks. York ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH] board/freescale,lsch3: Add entry for 0.9v
On 05/09/2018 12:25 AM, Priyanka Jain wrote: > As per updated hardware documentation for > lsch3 based chips like LS2088A, 0.9v support > has been added in possible supported SoC volatges > > Signed-off-by: Priyanka Jain > --- Applied to u-boot-fsl-qoriq master. Awaiting upstream. Thanks. York ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH] armv8: ls1046ardb: Enable IFC for SPL build
Commit a52ff334c5b1 ("armv8: ls1046ardb: SPL size reduction") reduced
image size for SPL. IFC was disabled. If PPA is loaded in SPL, MMU is
enabled as a result. Removing IFC skips IFC region in the MMU table,
causing later failure in RAM version U-boot when accessing CPLD
through IFC. Only disable IFC if PPA is not enabled for SPL.
Signed-off-by: York Sun
---
include/configs/ls1046a_common.h | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h
index c687c9e..2c083fc 100644
--- a/include/configs/ls1046a_common.h
+++ b/include/configs/ls1046a_common.h
@@ -19,7 +19,9 @@
#if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_NAND_BOOT))
#define SPL_NO_MMC
#endif
-#if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_SD_BOOT))
+#if defined(CONFIG_SPL_BUILD) && \
+ defined(CONFIG_SD_BOOT) && \
+ !defined(CONFIG_SPL_FSL_LS_PPA)
#define SPL_NO_IFC
#endif
--
2.7.4
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Re: [U-Boot] [PATCH v3 1/1] board: arm: Add support for Broadcom BCM7445
Florian Fainelli writes:
> On 06/06/2018 11:35 AM, Thomas Fitzsimmons wrote:
>> Add support for loading U-Boot on the Broadcom 7445 SoC. This port
>> assumes Broadcom's BOLT bootloader is acting as the second stage
>> bootloader, and U-Boot is acting as the third stage bootloader, loaded
>> as an ELF program by BOLT.
>>
>> Signed-off-by: Thomas Fitzsimmons
>> Cc: Stefan Roese
>> Cc: Tom Rini
>> Cc: Florian Fainelli
>> ---
>
> Looks good, still some minor comments about the choice of representation
> for physical addresses of peripherals, see below.
>
>> +config BCMSTB_TIMER_LOW
>> +hex "Address of BCMSTB timer low register"
>> +default 0xf0412008
>
> This looks very simplistic here since the CPU system control timer is a
> 64-bit timer.
This worked via the default get_ticks implementation in lib/time.c,
which tracks rollovers and converts to a 64-bit value. But I agree it's
better to use the high timer register, so that (among other reasons)
get_ticks reflects total uptime including time spent in BOLT. I
overrode get_ticks in v4 of the patch to use the high and low timer
registers.
> I am really not a big fan of all of those configurable addresses which
> are a) fixed given a specific SoC family (7445, 7439 etc.) and b) are
> error prone because we let an user change those without necessarily
> knowing what is the implication. I really think sticking those constants
> into a header file would be much more appropriate.
Makes sense, moved to a 7445-specific header in v4.
>> +void enable_caches(void)
>> +{
>> +/*
>> + * Nothing required here, since the prior stage bootloader has
>> + * enabled I-cache and D-cache already. Implementing this
>> + * function silences the warning in the default function.
>> + */
>
> This heavily depends on how you load your binary from BOLT, so you must
> be careful about this statement here.
In v4 I adjusted the comment and added an entry to the README to
document the expectation.
Thanks,
Thomas
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Re: [U-Boot] [PATCH v5 0/5] drivers: Add reset ctrl to drivers
Hi Ley Foon, On 3 June 2018 at 23:19, Ley Foon Tan wrote: > Add reset ctrl to dwmmc socfpga, designware Ethernet and ns16550 serial > drivers. > > A reset property is an optional feature, so only print out a warning and > do not fail if a reset property is not present. > > If a reset property is discovered, then use it to deassert, thus bringing the > IP out of reset. > > v5 change: > - Rename CONFIG_SPL_RESET_SUPPORT to CONFIG_SPL_DM_RESET > - Change to use CONFIG_IS_ENABLED(DM_RESET) in reset.h > - Added Simon's Reviewed-by in dwmmc, 16550 serial and designware emac > patches. I think it is better to also include the earlier change logs, Also you should have a change log on each patch as well as the cover letter. The patman tool does this for you, so I suggest you take a look at that. > > History: > v1: https://patchwork.ozlabs.org/cover/905519/ > v2: https://patchwork.ozlabs.org/cover/908667/ > v3: https://patchwork.ozlabs.org/cover/910018/ > v4: https://patchwork.ozlabs.org/cover/923883/ > > Ley Foon Tan (5): > reset: Rename CONFIG_SPL_RESET_SUPPORT to CONFIG_SPL_DM_RESET > include: reset: Change to use CONFIG_IS_ENABLED(DM_RESET) > mmc: dwmmc: socfpga: Add reset ctrl to driver > serial: ns16550: Add reset ctrl to driver > net: designware: Add reset ctrl to driver > > arch/arm/mach-stm32mp/Kconfig | 2 +- > common/spl/Kconfig| 2 +- > drivers/Makefile | 2 +- > drivers/mmc/socfpga_dw_mmc.c | 17 + > drivers/net/designware.c | 8 > drivers/serial/ns16550.c | 8 > include/reset.h | 2 +- > 7 files changed, 37 insertions(+), 4 deletions(-) > > -- > 2.2.2 > Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH] drivers/gpio/mxc: fix MXC GPIO name in KConfig
On Thu, Jun 7, 2018 at 7:10 AM, Hannes Schmelzer wrote: > The naming with "UART" is obviously wrong, we fix this here. > > Signed-off-by: Hannes Schmelzer > > --- > > drivers/gpio/Kconfig | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig > index b7e4ffb..29af22e 100644 > --- a/drivers/gpio/Kconfig > +++ b/drivers/gpio/Kconfig > @@ -109,7 +109,7 @@ config MSM_GPIO > - MSM8916 > > config MXC_GPIO > - bool "Freescale/NXP MXC UART driver" > + bool "Freescale/NXP MXC GPIO driver" Thanks for the fix: Reviewed-by: Fabio Estevam ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v3] lib: Add hexdump
Hi,
On 5 June 2018 at 06:17, Alexey Brodkin wrote:
> Often during debugging session it's very interesting to see
> what data we were dealing with. For example what we write or read
> to/from memory or peripherals.
>
> This change introduces functions that allow to dump binary
> data with one simple function invocation like:
> --->8
> print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, buf, len);
> --->8
>
> which gives us the following:
> --->8
> : f2 b7 c9 88 62 61 75 64 72 61 74 65 3d 31 31 35 baudrate=115
> 0010: 32 30 30 00 62 6f 6f 74 61 72 67 73 3d 63 6f 6e 200.bootargs=con
> 0020: 73 6f 6c 65 3d 74 74 79 53 33 2c 31 31 35 32 30 sole=ttyS3,11520
> 0030: 30 6e 38 00 62 6f 6f 74 64 65 6c 61 79 3d 33 00 0n8.bootdelay=3.
> 0040: 62 6f 6f 74 66 69 6c 65 3d 75 49 6d 61 67 65 00 bootfile=uImage.
> 0050: 66 64 74 63 6f 6e 74 72 6f 6c 61 64 64 72 3d 39 fdtcontroladdr=9
> 0060: 66 66 62 31 62 61 30 00 6c 6f 61 64 61 64 64 72 ffb1ba0.loadaddr
> 0070: 3d 30 78 38 32 30 30 30 30 30 30 00 73 74 64 65 =0x8200.stde
> 0080: 72 72 3d 73 65 72 69 61 6c 30 40 65 30 30 32 32 rr=serial0@e0022
> 0090: 30 30 30 00 73 74 64 69 6e 3d 73 65 72 69 61 6c 000.stdin=serial
> 00a0: 30 40 65 30 30 32 32 30 30 30 00 73 74 64 6f 75 0@e0022000.stdou
> 00b0: 74 3d 73 65 72 69 61 6c 30 40 65 30 30 32 32 30 t=serial0@e00220
> 00c0: 30 30 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00..
> ...
> --->8
>
> Source of hexdump.c was copied from Linux kernel v4.7-rc2.
>
> Signed-off-by: Alexey Brodkin
> Cc: Anatolij Gustschin
> Cc: Mario Six
> Cc: Simon Glass
> Cc: Tom Rini
> Cc: Stefan Roese
>
> ---
>
> Build-tested by Travis CI, see https://travis-ci.org/abrodkin/u-boot.
>
> Changes v2 -> v3:
> * Remove hexdump.h from common.h
> * Drop verbose level argument from print_hex_dump()
> * Update users of print_hex_dump() accordingly
>
> Changes v1 -> v2:
> * Move hexdump definitions to a separate header.
> * Move helper funcions to the header so they might be used even if
>CONFIG_HEXDUMP is not enabled and if not used they will not occupy
>extra bytes of memory being "static inline" ones.
> * While at it replace its own hex_asc[], hex_asc_{lo|hi}() and
>pack_hex_byte() in lib/vsprintf.c with generic ones from hexdump.
> * In print_hex_dump() revert back first parametr for debug level,
>otherwise existing users of the function will be broken.
>
> drivers/mtd/ubi/attach.c| 2 +-
> drivers/mtd/ubi/debug.c | 7 +-
> drivers/mtd/ubi/debug.h | 6 +-
> drivers/mtd/ubi/io.c| 7 +-
> drivers/usb/gadget/f_mass_storage.c | 1 +
> drivers/usb/gadget/storage_common.c | 4 +-
> examples/api/Makefile | 1 +
> fs/ubifs/debug.c| 6 +-
> fs/ubifs/scan.c | 3 +-
> include/hexdump.h | 91 +++
> include/linux/compat.h | 1 -
> lib/Kconfig | 5 +
> lib/Makefile| 1 +
> lib/hexdump.c | 245
> lib/vsprintf.c | 18 +-
> 15 files changed, 369 insertions(+), 29 deletions(-)
> create mode 100644 include/hexdump.h
> create mode 100644 lib/hexdump.c
This code looks good but please add a test in test/
You could use print_ut.c as an example
Regards,
Simon
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Re: [U-Boot] [PATCH 3/3] rockchip: veyron: Set vcc33_sd regulator value
On 7 June 2018 at 04:39, Carlo Caione wrote: > From: Carlo Caione > > On the veyron board the vcc33_sd regulator is used as vmmc-supply for > the SD card. This regulator is powered in the MMC core during power on > but its value is never actually set. > > In the veyron platform the reset value for the LDO output is 1.8V while > the standard (min and max) value for this regulator defined in the DTS > is 3.3V. When the MMC core enable the regulator without setting its > value, the output is automatically set to 1.8V instead of 3.3V. > > With this patch we preemptively set the value to 3.3V. > > Signed-off-by: Carlo Caione > --- > arch/arm/mach-rockchip/rk3288-board.c | 10 ++ > 1 file changed, 10 insertions(+) Reviewed-by: Simon Glass ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 2/3] rk3288: Disable JTAG function from sdmmc0 IO
On 7 June 2018 at 04:39, Carlo Caione wrote: > From: Carlo Caione > > The GRF_SOC_CON0.grf_force_jtag bit is automatically set at boot and it > is preventing the SDMMC to work correctly. Disable the JTAG function on > the assumption that a working SD has higher priority over JTAG. > > Signed-off-by: Carlo Caione > --- > arch/arm/mach-rockchip/rk3288-board.c | 4 > 1 file changed, 4 insertions(+) > Reviewed-by: Simon Glass But please expand your comment to explain why you are disabling JTAG. Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v4 04/16] sandbox: smbios: Update to support sandbox
Hi Alex, On 7 June 2018 at 12:47, Alexander Graf wrote: > > > On 07.06.18 22:41, Simon Glass wrote: >> Hi Alex, >> >> On 7 June 2018 at 12:36, Alexander Graf wrote: >>> >>> >>> On 07.06.18 22:25, Simon Glass wrote: Hi Alex, On 3 June 2018 at 04:13, Alexander Graf wrote: > > > On 25.05.18 04:42, Simon Glass wrote: >> Hi Alex, >> >> On 24 May 2018 at 06:24, Alexander Graf wrote: >>> >>> >>> On 16.05.18 17:42, Simon Glass wrote: At present this code casts addresses to pointers so cannot be used with sandbox. Update it to use mapmem instead. Signed-off-by: Simon Glass >>> >>> I really dislike the whole fact that you have to call map_sysmem() at >>> all. I don't quite understand the whole point of it either - it just >>> seems to clutter the code and make it harder to follow. >> >> The purpose is to map U-Boot addresses (e.g. 0x1234) to actual >> user-space addresses in sandbox (gd->arch.ram_buf + 0x1234). >> >> Otherwise we cannot write tests which use particular addresses, and >> people have to worry about the host memory layout when using sandbox. > > Not if we write a smart enough linker script. I can try to see when I > get around to give you an example. But basically all we need to do is > reserve a section for guest ram at a constant virtual address. Yes, but ideally that would be 0, or something small. >>> >>> You can't do 0 because 0 is protected on a good number of OSs. And if it >>> can't be 0, better use something that makes pointers easy to read. >> >> Yes this is one reason for map_sysmem(). >> >>> > >>> Can't we just simply make sandbox behave like any other target instead? >> >> Actually that's the goal of the sandbox support. Memory is modelled as >> a contiguous chunk starting at 0x0, regardless of what the OS actually >> gives U-Boot in terms of addresses. > > Most platforms don't have RAM start at 0x0 (and making sure nobody > assumes it does start at 0 is a good thing). The only bit we need to > make sure is that it always starts at *the same* address on every > invocation. But if that address is 256MB, things should still be fine. Yes but putting a 1000 base address on everything is a bit of a pain. >>> >>> Why? It's what we do on arm systems that have ram starting at higher >>> offsets already. >> >> It's a pain because you have to type 1 and 5-6 zeroes before you can >> get to the address you want. Otherwise sandbox just segfaults, which >> is annoying. > > It's the same as any other device that does not have RAM starting at 0. > The benefit of it is that you manage to catch NULL pointer accesses > quite easily, which I guess is something you'll want from a testing target. You're confusing the U-Boot memory address with the pointer address. If you use NULL in sandbox it will fault. But address 0 is valid. > > Also, you shouldn't use hard addresses in the first place. That's why we > have $kernel_addr_r and friends. As long as you stick to those, nothing > should change for you at all. See for example test_fit.py where it is very useful to know the addresses we are using. Of course we can remove this constraint, but it does make things more painful in sandbox. Also IMO using open casts to convert between addresses and pointers is not desirable, as they are not really tagged in any way. With map_sysmem(), etc., they are explicit and obvious. Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v1 3/3] cmd: usb gadget: Add a command to bind a USB gadget driver to a UDC port
Hi, On 7 June 2018 at 01:39, Lukasz Majewski wrote: > Hi Jean-Jacques, > >> Most of the time the UDC is bound to a driver when a dedicated >> command is executed, like 'dfu'. But the ethernet gadget driver must >> be bound by calling usb_ether_init() in the code otherwise the USB >> ethernet adapter is not visible to the ethernet core. >> >> In DM context, the platform code should not be used to bind UDC to a >> particular driver, so adding a new command to bind a USB device port >> to a driver. >> >> usage example: >> usbdev bind 0 usb_ether >> usbdev unbind 0 > > I would prefer a comment from Simon (so adding him to CC) - as it looks > to me that we shall try to use DM to avoid adding separate commands for > binding. We could perhaps introduce 'bind' and 'unbind' commands with similar arguments? Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v4 1/1] board: arm: Add support for Broadcom BCM7445
Add support for loading U-Boot on the Broadcom 7445 SoC. This port assumes Broadcom's BOLT bootloader is acting as the second stage bootloader, and U-Boot is acting as the third stage bootloader, loaded as an ELF program by BOLT. Signed-off-by: Thomas Fitzsimmons Cc: Stefan Roese Cc: Tom Rini Cc: Florian Fainelli --- Changes for v4: - Use high timer register for get_ticks - Move hard-coded register addresses from Kconfig to header - Document I-cache/D-cache expectation MAINTAINERS | 10 + arch/arm/Kconfig| 12 + arch/arm/Makefile | 1 + arch/arm/mach-bcmstb/Kconfig| 36 ++ arch/arm/mach-bcmstb/Makefile | 8 + arch/arm/mach-bcmstb/include/mach/gpio.h| 11 + arch/arm/mach-bcmstb/include/mach/hardware.h| 11 + arch/arm/mach-bcmstb/include/mach/prior_stage.h | 30 ++ arch/arm/mach-bcmstb/include/mach/sdhci.h | 15 + arch/arm/mach-bcmstb/include/mach/timer.h | 13 + arch/arm/mach-bcmstb/lowlevel_init.S| 21 ++ board/broadcom/bcmstb/MAINTAINERS | 7 + board/broadcom/bcmstb/Makefile | 8 + board/broadcom/bcmstb/bcmstb.c | 194 +++ configs/bcm7445_defconfig | 27 ++ doc/README.bcm7xxx | 150 drivers/mmc/Kconfig | 11 + drivers/mmc/Makefile| 1 + drivers/mmc/bcmstb_sdhci.c | 67 drivers/spi/Kconfig | 7 + drivers/spi/Makefile| 1 + drivers/spi/bcmstb_spi.c| 439 drivers/spi/spi-uclass.c| 2 +- dts/Kconfig | 7 + include/configs/bcm7445.h | 26 ++ include/configs/bcmstb.h| 183 ++ include/fdtdec.h| 4 + lib/fdtdec.c| 4 + 28 files changed, 1305 insertions(+), 1 deletion(-) create mode 100644 arch/arm/mach-bcmstb/Kconfig create mode 100644 arch/arm/mach-bcmstb/Makefile create mode 100644 arch/arm/mach-bcmstb/include/mach/gpio.h create mode 100644 arch/arm/mach-bcmstb/include/mach/hardware.h create mode 100644 arch/arm/mach-bcmstb/include/mach/prior_stage.h create mode 100644 arch/arm/mach-bcmstb/include/mach/sdhci.h create mode 100644 arch/arm/mach-bcmstb/include/mach/timer.h create mode 100644 arch/arm/mach-bcmstb/lowlevel_init.S create mode 100644 board/broadcom/bcmstb/MAINTAINERS create mode 100644 board/broadcom/bcmstb/Makefile create mode 100644 board/broadcom/bcmstb/bcmstb.c create mode 100644 configs/bcm7445_defconfig create mode 100644 doc/README.bcm7xxx create mode 100644 drivers/mmc/bcmstb_sdhci.c create mode 100644 drivers/spi/bcmstb_spi.c create mode 100644 include/configs/bcm7445.h create mode 100644 include/configs/bcmstb.h diff --git a/MAINTAINERS b/MAINTAINERS index 642c448..58634fc 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -107,6 +107,16 @@ F: drivers/video/bcm2835.c F: include/dm/platform_data/serial_bcm283x_mu.h F: drivers/pinctrl/broadcom/ +ARM BROADCOM BCMSTB +M: Thomas Fitzsimmons +S: Maintained +F: arch/arm/mach-bcmstb/ +F: board/broadcom/bcmstb/ +F: configs/bcm7445_defconfig +F: doc/README.bcm7xxx +F: drivers/mmc/bcmstb_sdhci.c +F: drivers/spi/bcmstb_spi.c + ARM FREESCALE IMX M: Stefano Babic M: Fabio Estevam diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index dde422b..fa2001b 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -533,6 +533,16 @@ config TARGET_VEXPRESS_CA15_TC2 select CPU_V7_HAS_VIRT select PL011_SERIAL +config ARCH_BCMSTB + bool "Broadcom BCM7XXX family" + select CPU_V7A + select DM + select OF_CONTROL + select OF_PRIOR_STAGE + help + This enables support for Broadcom ARM-based set-top box + chipsets, including the 7445 family of chips. + config TARGET_VEXPRESS_CA5X2 bool "Support vexpress_ca5x2" select CPU_V7A @@ -1297,6 +1307,8 @@ source "arch/arm/mach-at91/Kconfig" source "arch/arm/mach-bcm283x/Kconfig" +source "arch/arm/mach-bcmstb/Kconfig" + source "arch/arm/mach-davinci/Kconfig" source "arch/arm/mach-exynos/Kconfig" diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 680c6e8..03252fe 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -54,6 +54,7 @@ PLATFORM_CPPFLAGS += $(arch-y) $(tune-y) machine-$(CONFIG_ARCH_ASPEED) += aspeed machine-$(CONFIG_ARCH_AT91)+= at91 machine-$(CONFIG_ARCH_BCM283X) += bcm283x +machine-$(CONFIG_ARCH_BCMSTB) += bcmstb machine-$(CONFIG_ARCH_DAVINCI) += davinci machine-$(CONFIG_ARCH_EXYNOS) += exynos
[U-Boot] [PATCH v4 0/1] board: arm: Add support for Broadcom BCM7445
Add support for Broadcom BCM7445 Changes for v4: - Use high timer register for get_ticks - Move hard-coded register addresses from Kconfig to header - Document I-cache/D-cache expectation Thomas Fitzsimmons (1): board: arm: Add support for Broadcom BCM7445 MAINTAINERS | 10 + arch/arm/Kconfig| 12 + arch/arm/Makefile | 1 + arch/arm/mach-bcmstb/Kconfig| 36 ++ arch/arm/mach-bcmstb/Makefile | 8 + arch/arm/mach-bcmstb/include/mach/gpio.h| 11 + arch/arm/mach-bcmstb/include/mach/hardware.h| 11 + arch/arm/mach-bcmstb/include/mach/prior_stage.h | 30 ++ arch/arm/mach-bcmstb/include/mach/sdhci.h | 15 + arch/arm/mach-bcmstb/include/mach/timer.h | 13 + arch/arm/mach-bcmstb/lowlevel_init.S| 21 ++ board/broadcom/bcmstb/MAINTAINERS | 7 + board/broadcom/bcmstb/Makefile | 8 + board/broadcom/bcmstb/bcmstb.c | 194 +++ configs/bcm7445_defconfig | 27 ++ doc/README.bcm7xxx | 150 drivers/mmc/Kconfig | 11 + drivers/mmc/Makefile| 1 + drivers/mmc/bcmstb_sdhci.c | 67 drivers/spi/Kconfig | 7 + drivers/spi/Makefile| 1 + drivers/spi/bcmstb_spi.c| 439 drivers/spi/spi-uclass.c| 2 +- dts/Kconfig | 7 + include/configs/bcm7445.h | 26 ++ include/configs/bcmstb.h| 183 ++ include/fdtdec.h| 4 + lib/fdtdec.c| 4 + 28 files changed, 1305 insertions(+), 1 deletion(-) create mode 100644 arch/arm/mach-bcmstb/Kconfig create mode 100644 arch/arm/mach-bcmstb/Makefile create mode 100644 arch/arm/mach-bcmstb/include/mach/gpio.h create mode 100644 arch/arm/mach-bcmstb/include/mach/hardware.h create mode 100644 arch/arm/mach-bcmstb/include/mach/prior_stage.h create mode 100644 arch/arm/mach-bcmstb/include/mach/sdhci.h create mode 100644 arch/arm/mach-bcmstb/include/mach/timer.h create mode 100644 arch/arm/mach-bcmstb/lowlevel_init.S create mode 100644 board/broadcom/bcmstb/MAINTAINERS create mode 100644 board/broadcom/bcmstb/Makefile create mode 100644 board/broadcom/bcmstb/bcmstb.c create mode 100644 configs/bcm7445_defconfig create mode 100644 doc/README.bcm7xxx create mode 100644 drivers/mmc/bcmstb_sdhci.c create mode 100644 drivers/spi/bcmstb_spi.c create mode 100644 include/configs/bcm7445.h create mode 100644 include/configs/bcmstb.h -- 1.8.3.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 4/5] include: dma: Update the function description for dma_memcpy
Hi, On 3 June 2018 at 23:14, Chee, Tien Fong wrote: > On Fri, 2018-06-01 at 08:25 -0600, Simon Glass wrote: >> Hi, >> >> On 31 May 2018 at 02:08, wrote: >> > >> > From: Tien Fong Chee >> > >> > Update the dma_memcpy description on return argument for DMA330 >> > driver. >> > >> > Signed-off-by: Tien Fong Chee >> > --- >> > include/dma.h | 4 ++-- >> > 1 file changed, 2 insertions(+), 2 deletions(-) >> > >> > diff --git a/include/dma.h b/include/dma.h >> > index 0a0c9dd..b825c1e 100644 >> > --- a/include/dma.h >> > +++ b/include/dma.h >> > @@ -79,8 +79,8 @@ int dma_get_device(u32 transfer_type, struct >> > udevice **devp); >> > * @dst - destination pointer >> > * @src - souce pointer >> > * @len - data length to be copied >> > - * @return - on successful transfer returns no of bytes >> > -transferred and on failure return error code. >> > + * @return - on successful transfer returns no of bytes or >> > zero(for DMA330) >> > + * transferred and on failure return error code. >> This is a public API so you cannot change it just for one device. You >> can change the API for everyone if you like. >> >> But why would it want to return 0? >> > Because we only able to check the DMA tranferring status, full transfer > or failed. I can return the len argument user set if full tranfer is > finished. OK. My concern is that you have a comment saying that the function does something different for one device versus others. This is not the place for such a comment. Here you can just document that it can return two possible meanings. You should add comments explaining what 0 means too (e.g. completed, but length unknown?). For something in progress, you should use -EINPROGRESS / -EAGAIN Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH] cmd: fpga: Remove fit image support passed without fpga device
+Tom
Hi,
On 5 June 2018 at 04:47, Michal Simek wrote:
> The patch applied in 2010
> "cmd_fpga: cleanup help and check parameters"
> (sha1: a790b5b2326be9d7c9ad9e3d9b51a8bfabc62d07"
> was adding this checking
>
> + if (dev == FPGA_INVALID_DEVICE) {
> + puts("FPGA device not specified\n");
> + op = FPGA_NONE;
> + }
>
> which simply broke one command flow which was
> setenv fpga
> fpga loadmk // legacy image
> fpga loadmk : //fit image
>
> Also this sequence for FIT image is completely broken
> setenv fpga
> setenv fpgadata :
> fpga loadmk
> (Note: For legacy images this is working fine).
>
> even from code I don't think this has ever worked properly
> for fit image (dev = FPGA_INVALID_DEVICE should be rejected
> by fpga core). Fit image support was in 2008 added by:
> "[new uImage] Add new uImage fromat support to fpga command"
> (sha1: c28c4d193dbfb20b2dd3a5447640fd6de7fd0720)
>
> Just a summary of these facts that none found this for pretty long time
> it shouldn't be a problem to remove this flow (without fpga dev)
> completely to simplify the code.
>
> Signed-off-by: Michal Simek
> ---
>
> I am rewriting cmd/fpga.c file to use u-boot subcommand and I found
> that these flow are not working.
> ---
> cmd/fpga.c | 25 -
> 1 file changed, 25 deletions(-)
Seems like we could use a sandbox test here.
Regards,
Simon
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Re: [U-Boot] [PATCH v3 2/2] patman: add test for SPDX license
On 7 June 2018 at 00:45, Chris Packham wrote:
> Add a test to exercise the check for a valid SPDX license.
>
> Signed-off-by: Chris Packham
> ---
> This is dependent on http://patchwork.ozlabs.org/patch/914202/
>
> I also seem to get a bunch of doctest failures due to unicode strings, e.g.
>
> File "tools/patman/settings.py", line 78, in settings._ProjectConfigParser
> Failed example:
> sorted(config.items("settings"))
> Expected:
> [('am_hero', 'True')]
> Got:
> [('am_hero', u'True')
>
> I haven't attempted to fix these as I suspect they might be python
> version (2.7.12 for me) and/or locale dependent.
That is a bit odd since I would expect those lists to be the same.
Normally you can compare uincode and strings without any trouble.
>
> Changes in v3:
> - new
>
> Changes in v2: None
>
> tools/patman/test.py | 18 --
> 1 file changed, 16 insertions(+), 2 deletions(-)
>
Reviewed-by: Simon Glass
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Re: [U-Boot] [PATCH 1/4] lib: fdtdec: Fill initial ram top with DDR start value from dt
Hi,
On 7 June 2018 at 06:18, Michal Simek wrote:
> Hi,
>
> On 5.6.2018 09:20, Siva Durga Prasad Paladugu wrote:
>> Fill initial ram top with DDR base addr value from DT as not filling
>> it here always assumes it as zero while calculating relocation
>> offset and hence lead to failures in somecases. This will assumed
>> as zero if CONFIG_SYS_SDRAM_BASE is not defined.
>>
>> Signed-off-by: Siva Durga Prasad Paladugu
>> Signed-off-by: Michal Simek
>> ---
>> lib/fdtdec.c | 1 +
>> 1 file changed, 1 insertion(+)
>>
>> diff --git a/lib/fdtdec.c b/lib/fdtdec.c
>> index f4e8dbf..34ef9b8 100644
>> --- a/lib/fdtdec.c
>> +++ b/lib/fdtdec.c
>> @@ -1172,6 +1172,7 @@ int fdtdec_setup_memory_size(void)
>> }
>>
>> gd->ram_size = (phys_size_t)(res.end - res.start + 1);
>> + gd->ram_top = (unsigned long)res.start;
>> debug("%s: Initial DRAM size %llx\n", __func__,
>> (unsigned long long)gd->ram_size);
>>
>>
>
> I am curious about ram_top meaning. It is used more as ram_base.
>
> I expect we can workaround it by board_get_usable_ram_top() where we
> decode it exactly the same as patched fdtdec_setup_memory_size() but I
> don't think it is better solution than this one.
>
> Simon/Tom: any comment?
I wonder why it is not set to res.end in this patch?
Comments from global_data.h:
unsigned long ram_top; /* Top address of RAM used by U-Boot */
phys_size_t ram_size; /* RAM size */
Regards,
Simon
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Re: [U-Boot] [PATCH 1/3] rk3288: veyron: Init boot-on regulators
On 7 June 2018 at 04:39, Carlo Caione wrote: > From: Carlo Caione > > Use regulators_enable_boot_on() to init all the regulators with > regulator-boot-on property. > > Signed-off-by: Carlo Caione > --- > arch/arm/mach-rockchip/rk3288-board.c | 6 ++ > 1 file changed, 6 insertions(+) Reviewed-by: Simon Glass ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v2 1/2] dm: mdio: add a uclass for MDIO
Hi Ken,
On 6 June 2018 at 18:08, wrote:
> From: Ken Ma
>
> Add a uclass which provides access to MDIO busses and includes
> operations required by MDIO.
> The implementation is based on the existing mii/phy/mdio data
> structures and APIs.
> This patch also adds evice tree binding for MDIO bus.
>
> Signed-off-by: Ken Ma
> ---
>
> Changes in v2: None
>
> MAINTAINERS| 1 +
> doc/device-tree-bindings/mdio/mdio-bus.txt | 54 +
> drivers/Kconfig| 2 +
> drivers/Makefile | 1 +
> drivers/mdio/Kconfig | 18 +
> drivers/mdio/Makefile | 6 ++
> drivers/mdio/mdio-uclass.c | 119
> +
> include/dm/uclass-id.h | 1 +
> include/mdio.h | 62 +++
> 9 files changed, 264 insertions(+)
> create mode 100644 doc/device-tree-bindings/mdio/mdio-bus.txt
> create mode 100644 drivers/mdio/Kconfig
> create mode 100644 drivers/mdio/Makefile
> create mode 100644 drivers/mdio/mdio-uclass.c
> create mode 100644 include/mdio.h
When adding a new uclass, please add a sandbox driver and a test in
test/dm/mdio.c
> +menu "MDIO Support"
> +
> +config DM_MDIO
I don't see any CONFIG_MDIO option, so you can just make this MDIO.
The DM_ prefix is for things that are being converted to driver model,
but still have legacy code.
> + bool "Enable Driver Model for MDIO drivers"
> + depends on DM
> + help
> + Enable driver model for MDIO access.
What does MDIO stand for? You should use the full name in help at least once.
> + Drivers provide methods to management data
> + Input/Output.
> + MDIO uclass provides interfaces to get mdio
> + udevice or mii bus from its child phy node or
> + an ethernet udevice which the phy belongs to.
> +
> +endmenu
> diff --git a/drivers/mdio/Makefile b/drivers/mdio/Makefile
> new file mode 100644
> index 000..9b290c0
> --- /dev/null
> +++ b/drivers/mdio/Makefile
> @@ -0,0 +1,6 @@
> +# SPDX-License-Identifier: GPL-2.0+
> +#
> +# Copyright (C) 2018 Marvell International Ltd.
> +# Author: Ken Ma
> +
> +obj-$(CONFIG_DM_MDIO) += mdio-uclass.o
> diff --git a/drivers/mdio/mdio-uclass.c b/drivers/mdio/mdio-uclass.c
> new file mode 100644
> index 000..251776b
> --- /dev/null
> +++ b/drivers/mdio/mdio-uclass.c
> @@ -0,0 +1,119 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright (C) 2018 Marvell International Ltd.
> + * Author: Ken Ma
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +int mdio_mii_bus_get(struct udevice *mdio_dev, struct mii_dev **bus)
> +{
> + *bus = *(struct mii_dev **)dev_get_uclass_platdata(mdio_dev);
> +
> + return 0;
> +}
> +
> +int mdio_device_get_from_phy(int phy_node, struct udevice **devp)
Please can you use livetree functions, like dev_read_...() and
ofnode_..() instead the flat-tree functions?
> +{
> + int mdio_off;
> +
> + mdio_off = fdt_parent_offset(gd->fdt_blob, phy_node);
> + return uclass_get_device_by_of_offset(UCLASS_MDIO, mdio_off,
> + devp);
> +}
> +
[..]
> +static int mdio_uclass_pre_probe(struct udevice *dev)
> +{
> + struct mii_dev **pbus = dev_get_uclass_platdata(dev);
> + struct mii_dev *bus;
> + const char *name;
> +
> + bus = mdio_alloc();
> + if (!bus) {
> + printf("Failed to allocate MDIO bus @%p\n",
> + devfdt_get_addr_ptr(dev));
debug()
> + return -1;
Should return a real error, like -ENOMEM
But can you not put struct mii_dev in the private data, to avoid the
alloc? If not, you need a remove() method to free this data.
> + }
> +
> + name = fdt_getprop(gd->fdt_blob, dev_of_offset(dev),
> + "mdio-name", NULL);
> + if (name)
> + strncpy(bus->name, name, MDIO_NAME_LEN);
> + *pbus = bus;
> +
> + return 0;
> +}
> +
> +static int mdio_uclass_post_probe(struct udevice *dev)
> +{
> + struct mii_dev **pbus = dev_get_uclass_platdata(dev);
> +
> + return mdio_register(*pbus);
> +}
> +
> +UCLASS_DRIVER(mdio) = {
> + .id = UCLASS_MDIO,
> + .name = "mdio",
> + .pre_probe = mdio_uclass_pre_probe,
> + .post_probe = mdio_uclass_post_probe,
> + .per_device_platdata_auto_alloc_size = sizeof(struct mii_dev *),
> +};
> diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
> index d7f9df3..170a0cc 100644
> --- a/include/dm/uclass-id.h
> +++ b/include/dm/uclass-id.h
> @@ -49,6 +49,7 @@ enum uclass_id {
> UCLASS_LPC, /* x86 'low pin count' interface */
> UCLASS_MAILBOX, /* Mailbox controller */
>
Re: [U-Boot] [PATCH v3 1/2] patman: add option for limiting the Cc list
On 7 June 2018 at 00:45, Chris Packham wrote: > Many mailing-lists consider a long Cc list a sign of spam and will > either drop the message or mark it for moderation. Because patman > automatically invokes get_maintainer.pl the Cc list can expand > unexpectedly. Allow the user to specify a limit for the Cc list. > > This limit is applied after removing any known bouncing addresses. By > default no limit is applied. > > Signed-off-by: Chris Packham > --- > I've fallen foul of the u-boot ML Cc limit a few times recently. I'm not > sure what the actual limit is so I've left patman's default behaviour > unlimited. > > Changes in v3: > - update func_test > > Changes in v2: > - make default None to allow limit 0 to suppress the list completely > > tools/patman/func_test.py | 3 ++- > tools/patman/patman.py| 4 +++- > tools/patman/series.py| 5 - > 3 files changed, 9 insertions(+), 3 deletions(-) Reviewed-by: Simon Glass ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [ANN] U-Boot v2018.05 released
+Wolfgang Hi Tom, On 7 May 2018 at 07:34, Tom Rini wrote: > Hey all, > > It's release day, and here we are doing the release. It's live on git > and FTP and ACD (along with the PGP sig file). > This seems to be missing release stats here: https://www.denx.de/wiki/U-Boot/ReleaseCycle [..] Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH] sandbox_flattree: Switch to TPMv2 support
Hi Miquel, On 7 June 2018 at 23:36, Miquel Raynal wrote: > Hi Simon, > > On Thu, 7 Jun 2018 16:25:28 -0800, Simon Glass wrote: > >> Hi Miquel, >> >> On 6 June 2018 at 23:38, Miquel Raynal wrote: >> > Hello, >> > >> > Sorry for the delay. >> > >> > On Sat, 2 Jun 2018 10:15:17 -0600, Simon Glass wrote: >> > >> >> Hi Tom, >> >> >> >> On 1 June 2018 at 11:55, Tom Rini wrote: >> >> > >> >> > On Fri, Jun 01, 2018 at 09:25:19AM -0600, Simon Glass wrote: >> >> > > +Miquel due to sandbox TPM issue >> >> > > >> >> > > Hi Tom, >> >> > > >> >> > > On 25 May 2018 at 06:27, Tom Rini wrote: >> >> > > > In order to have the test.py tests for TPMv2 run automatically we >> >> > > > need >> >> > > > to have one of our sandbox builds use TPMv2 rather than TPMv1. >> >> > > > Switch >> >> > > > sandbox_flattree over to this style of TPM. >> >> > > >> >> > > The problem seems to be that the sandbox driver is only built with >> >> > > either TPMv1 or TPMv2. It needs to be able to build with both, so we >> >> > > can run tests with both. >> >> > >> >> > Right. But we don't have any run-time automatic tests for TPMv1 as the >> >> > 'tpm test' command needs to be done manually, at least today (unless I'm >> >> > missing something under test/py/tests/). And we can't (functionally in >> >> > real uses) have both TPM types available. Perhaps we should make TPMv2 >> >> > the default for sandbox? All of the TPMv1 code will still be getting >> >> > build-time exercised due to platforms with TPMv1 on them. >> >> >> >> I'll take a look at this. It should actually be quite easy to have two >> >> TPMs in sandbox, one v1 and one v2. At least I don't know of any >> >> impediment. >> >> >> >> > >> >> > > It really doesn't make any sense to have build-time branches for >> >> > > sandbox. >> >> > > >> >> > > We currently have: >> >> > > >> >> > > sandbox - should be used for most tests >> >> > > sandbox64 - special build that forces a 64-bit host >> >> > > sandbox_flattree - builds with dev_read_...() functions defined as >> >> > > inline. We need this build so that we can test those inline functions, >> >> > > and we cannot build with both the inline functions and the non-inline >> >> > > functions since they are named the same >> >> > > sandbox_noblk - builds without CONFIG_BLK, which means the legacy >> >> > > block drivers are used. We cannot use both the legacy and driver-model >> >> > > block drivers since they implement the same functions >> >> > > sandbox_spl - builds sandbox with SPL support, so you can run >> >> > > spl/u-boot-spl and it will start up and then load ./u-boot. We could >> >> > > probably remove this and add SPL support to the vanilla sandbox build, >> >> > > since people can still run ./u-boot directly >> >> > > >> >> > > At present there are unnecessary config differences between these >> >> > > builds. This is explained by the fact that it is a pain for people to >> >> > > have to add configs separately to each defconfig. But we should >> >> > > probably make them more common. I will take a look. >> >> > >> >> > OK. >> >> > >> >> > > What do you think about dropping sandbox_spl and make sandbox build >> >> > > SPL? It does take slightly longer to build, perhaps 25%. >> >> > >> >> > That's fine with me. >> >> > >> >> > > > Cc: Simon Glass >> >> > > > Signed-off-by: Tom Rini >> >> > > > --- >> >> > > > I'm tempted to switch the main sandbox target over instead as I >> >> > > > don't >> >> > > > quite see where we're running the tpm1.x tests automatically. Would >> >> > > > that be a better idea? >> >> > > > --- >> >> > > >> >> > > Miquel, can we adjust the code to build both TPMv1 and v2 for sandbox, >> >> > > and select at run-time? >> >> > >> >> > I thought we had talked about that before and couldn't easily? One >> >> > thing I am a bit wary of is adding indirection for build coverage sake. >> >> >> >> Yes, I am hoping that it is just different drivers with the same API >> >> but perhaps I am going to be disappointed. >> > >> > Indeed, both versions share the same 'architecture' but quite a few >> > structures/functions are defined differently for each TPM flavour in >> > different files. What makes the magic are the >> > #ifdef TPM_V1 >> > #else >> > #endif >> > blocks around includes, making them mutually exclusive. >> > >> > Choice has been made not to use both flavours at the same time in the >> > second series, when I clearly made a separation between v1 code and v2 >> > code. Trying to compile them both with just some Kconfig hacks would >> > simply not work IMHO. >> > >> > My apologies for not being helpful at all... As Tom said, there are no >> > tests running on v1 code so maybe it's better to exercise v2 code in >> > Sandbox and let people compile-test the former on their own? >> >> I had a play with this and it does not seem too tricky. >> >> With a bit of fiddling I got it to build except for this: >> >> /home/sjg/c/src/third_party/u-boot/files/cmd/tpm-v2.c:324: multiple >> definition of
Re: [U-Boot] [PATCH] drivers/gpio/mxc: fix MXC GPIO name in KConfig
On 7 June 2018 at 02:10, Hannes Schmelzer wrote: > The naming with "UART" is obviously wrong, we fix this here. > > Signed-off-by: Hannes Schmelzer > > --- > > drivers/gpio/Kconfig | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > Reviewed-by: Simon Glass ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH] env: Add !ENV_IS_IN_EXT4 dependency to ENV_IS_NOWHERE
On 7 June 2018 at 23:10, Alex Kiernan wrote: > If ENV_IS_IN_EXT4 is set you shouldn't be able to select ENV_IS_NOWHERE. > > Signed-off-by: Alex Kiernan > --- > > env/Kconfig | 1 + > 1 file changed, 1 insertion(+) > Reviewed-by: Simon Glass ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v2] tegra: nyan-big: Update CONFIG_SYS_TEXT to the default in README.chromium
On 7 June 2018 at 19:43, Peter Robinson wrote: > To build u-boot on a Nyan Big Chromebook the docs outline adjusting the > Tegra124 > defined CONFIG_SYS_TEXT_BASE but this has since been moved to individual > config > files. We should have the default required for u-boot chain loading on the U-Boot > chromebook as the default CONFIG_SYS_TEXT_BASE and update the docs to remove > this now non required step. > > Signed-off-by: Peter Robinson > --- > > v2: Update to 2018.07 RC1 > > configs/nyan-big_defconfig | 2 +- > doc/README.chromium| 27 +++ > 2 files changed, 8 insertions(+), 21 deletions(-) Other than the above: Reviewed-by: Simon Glass ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH] net: mvgbe: extract common code for SMI wait
On Wed, May 30, 2018 at 5:49 AM, Chris Packham wrote:
> Combine repeated code from smi_reg_read/smi_reg_write into a common
> function smi_wait_ready.
>
> Signed-off-by: Chris Packham
> ---
>
> drivers/net/mvgbe.c | 48 ++---
> 1 file changed, 24 insertions(+), 24 deletions(-)
>
> diff --git a/drivers/net/mvgbe.c b/drivers/net/mvgbe.c
> index 4e1aff6e3a86..ca91897fdd14 100644
> --- a/drivers/net/mvgbe.c
> +++ b/drivers/net/mvgbe.c
> @@ -40,10 +40,26 @@ DECLARE_GLOBAL_DATA_PTR;
> #define MVGBE_SMI_REG (((struct mvgbe_registers *)MVGBE0_BASE)->smi)
>
> #if defined(CONFIG_PHYLIB) || defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
> +static int smi_wait_ready(struct mvgbe_device *dmvgbe)
> +{
> + u32 timeout = MVGBE_PHY_SMI_TIMEOUT;
> + u32 smi_reg;
> +
> + do {
> + smi_reg = MVGBE_REG_RD(MVGBE_SMI_REG);
> + if (timeout-- == 0) {
> + printf("Error: SMI busy timeout\n");
> + return -EFAULT;
> + }
> + } while (smi_reg & MVGBE_PHY_SMI_BUSY_MASK);
Please use wait_for_bit_le32(MVGBE_SMI_REG, MVGBE_PHY_SMI_BUSY_MASK,
true, MVGBE_PHY_SMI_TIMEOUT_MS, false);
Convert the timeout to ms.
It's in include/wait_bit.h
> +
> + return 0;
> +}
> +
> /*
> * smi_reg_read - miiphy_read callback function.
> *
> - * Returns 16bit phy register value, or 0x on error
> + * Returns 16bit phy register value, or -EFAULT on error
> */
> static int smi_reg_read(struct mii_dev *bus, int phy_adr, int devad,
> int reg_ofs)
> @@ -74,16 +90,9 @@ static int smi_reg_read(struct mii_dev *bus, int phy_adr,
> int devad,
> return -EFAULT;
> }
>
> - timeout = MVGBE_PHY_SMI_TIMEOUT;
> /* wait till the SMI is not busy */
> - do {
> - /* read smi register */
> - smi_reg = MVGBE_REG_RD(MVGBE_SMI_REG);
> - if (timeout-- == 0) {
> - printf("Err..(%s) SMI busy timeout\n", __func__);
> - return -EFAULT;
> - }
> - } while (smi_reg & MVGBE_PHY_SMI_BUSY_MASK);
> + if (smi_wait_ready(dmvgbe) < 0)
> + return -EFAULT;
>
> /* fill the phy address and regiser offset and read opcode */
> smi_reg = (phy_adr << MVGBE_PHY_SMI_DEV_ADDR_OFFS)
> @@ -119,10 +128,9 @@ static int smi_reg_read(struct mii_dev *bus, int
> phy_adr, int devad,
> }
>
> /*
> - * smi_reg_write - imiiphy_write callback function.
> + * smi_reg_write - miiphy_write callback function.
> *
> - * Returns 0 if write succeed, -EINVAL on bad parameters
> - * -ETIME on timeout
> + * Returns 0 if write succeed, -EFAULT on error
> */
> static int smi_reg_write(struct mii_dev *bus, int phy_adr, int devad,
> int reg_ofs, u16 data)
> @@ -131,7 +139,6 @@ static int smi_reg_write(struct mii_dev *bus, int
> phy_adr, int devad,
> struct mvgbe_device *dmvgbe = to_mvgbe(dev);
> struct mvgbe_registers *regs = dmvgbe->regs;
> u32 smi_reg;
> - u32 timeout;
>
> /* Phyadr write request*/
> if (phy_adr == MV_PHY_ADR_REQUEST &&
> @@ -147,19 +154,12 @@ static int smi_reg_write(struct mii_dev *bus, int
> phy_adr, int devad,
> }
> if (reg_ofs > PHYREG_MASK) {
> printf("Err..(%s) Invalid register offset\n", __func__);
> - return -EINVAL;
> + return -EFAULT;
> }
>
> /* wait till the SMI is not busy */
> - timeout = MVGBE_PHY_SMI_TIMEOUT;
> - do {
> - /* read smi register */
> - smi_reg = MVGBE_REG_RD(MVGBE_SMI_REG);
> - if (timeout-- == 0) {
> - printf("Err..(%s) SMI busy timeout\n", __func__);
> - return -ETIME;
> - }
> - } while (smi_reg & MVGBE_PHY_SMI_BUSY_MASK);
> + if (smi_wait_ready(dmvgbe) < 0)
> + return -EFAULT;
>
> /* fill the phy addr and reg offset and write opcode and data */
> smi_reg = (data << MVGBE_PHY_SMI_DATA_OFFS);
> --
> 2.17.0
>
> ___
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> U-Boot@lists.denx.de
> https://lists.denx.de/listinfo/u-boot
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Re: [U-Boot] [PATCH v2 1/2] mvebu: neta: align DMA buffers
On Wed, May 30, 2018 at 12:52 AM, Baruch Siach wrote: > From: Jon Nettleton > > This makes sure the DMA buffers are properly aligned for the > hardware. > > Reviewed-by: Stefan Roese > Signed-off-by: Jon Nettleton > Signed-off-by: Baruch Siach Acked-by: Joe Hershberger ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v2 2/2] net: ping, arp: Fix cache alignment issues
On Wed, May 30, 2018 at 12:52 AM, Baruch Siach wrote: > From: Jon Nettleton > > Both ping_receive and arp_receive would transmit a received packet > back out using its original point. This causes problems with > certain network cards that add a custom header to the packet. > Specifically the mvneta driver for the Armada series boards has > a 2 byte Marvell header that is bypassed and passed along to > the system, but that 2 byte offset now causes a misalignment if > it is attempted to be sent back out. > > Rather than changing the driver to memcpy all the received packets > to cache aligned buffers we instead change the two offending > network commands to copy the packet into a cache aligned net_tx_packet > before sending it back out. It seems reasonable to make these match the rest of the network commands. > This fixes occasional messages like: > > CACHE: Misaligned operation at range [3fc01082, 3fc010c2] > > Reviewed-by: Stefan Roese > Signed-off-by: Jon Nettleton > Signed-off-by: Baruch Siach > --- Acked-by: Joe Hershberger ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCHv2] block: Have BLOCK_CACHE default to y in some cases
On Fri, Jun 8, 2018 at 3:20 PM Adam Ford wrote: > > On Fri, Jun 8, 2018 at 2:15 PM Tom Rini wrote: > > > > On Fri, Jun 08, 2018 at 10:30:36AM -0500, Adam Ford wrote: > > > On Tue, May 22, 2018 at 11:24 AM Tom Rini wrote: > > > > > > > > When dealing with filesystems that come from block devices we can get a > > > > noticeable performance gain in some use cases from having the block > > > > cache enabled. The code paths are valid in other cases when we have BLK > > > > set and may provide wins in raw reads in some use cases, so have this be > > > > default when BLK is enabled. > > > > > > > Tony, > > > > > > This breaks the AM3517 EVM. It appears to cause issues in MLO which > > > may not have enough RAM to cache, but I can fix it by disabling > > > BLOCK_CACHE. > > > I can submit a patch to disable it on the AM3517, but I am wondering > > > if something can/should be done to disable it or optionally disable it > > > in SPL so it's still > > > available in U-Boot. I can confirm that when disabled in SPL only, it > > > works. > > > > > > Any opinions on this? > > > > So, we had talked before about bumping SYS_MALLOC_F_LEN to 0x2000 for > > ARCH_OMAP2PLUS, but I see am3517 is already doing that. Can you see if > > there's enough room to go to say 0x4000 and it works? Otherwise, we > > I tried setting it to 0x4000, but it just hangs: > > U-Boot SPL 2018.07-rc1-00040-g71002b508a (Jun 08 2018 - 15:16:44 -0500) > Trying to boot from MMC1 > > > need to (and I was worried we might) need to add SPL_BLOCK_CACHE and > > have that default off. Thanks! > > Do you want me to work on that patch or did you want to do it? I just submitted a patch to the mailing list which fixes the AM3517. I figured I was 1/2 way there, so I just finished it. adam > > adam > > > > -- > > Tom ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH] block: Add SPL_BLOCK_CACHE and default n
When enabling BLOCK_CACHE on devices with limited RAM during SPL,
some devices may not boot. This creates an option to enable
block caching in SPL by defaults off. It is dependant on BLOCK_CACHE
and SPL_BLK
Fixes: 46960ad6d09b ("block: Have BLOCK_CACHE default to y in some cases")
Signed-off-by: Adam Ford
diff --git a/drivers/block/Kconfig b/drivers/block/Kconfig
index 0792373cfc..8ef363b3d4 100644
--- a/drivers/block/Kconfig
+++ b/drivers/block/Kconfig
@@ -37,6 +37,13 @@ config BLOCK_CACHE
it will prevent repeated reads from directory structures and other
filesystem data structures.
+config SPL_BLOCK_CACHE
+ bool "Use block device cache in SPL"
+ depends on BLOCK_CACHE && SPL_BLK
+ default n
+ help
+ This option enables the disk-block cache in SPL
+
config IDE
bool "Support IDE controllers"
select HAVE_BLOCK_DEVICE
diff --git a/drivers/block/Makefile b/drivers/block/Makefile
index 5fcafb193e..a9af28a552 100644
--- a/drivers/block/Makefile
+++ b/drivers/block/Makefile
@@ -11,4 +11,9 @@ endif
obj-$(CONFIG_IDE) += ide.o
obj-$(CONFIG_SANDBOX) += sandbox.o
+ifdef CONFIG_SPL_BUILD
+obj-$(SPL_BLOCK_CACHE) += blkcache.o
+endif
+ifndef CONFIG_SPL_BUILD
obj-$(CONFIG_BLOCK_CACHE) += blkcache.o
+endif
diff --git a/include/blk.h b/include/blk.h
index fc0c239e46..c17c5eb047 100644
--- a/include/blk.h
+++ b/include/blk.h
@@ -111,7 +111,8 @@ struct blk_desc {
#define PAD_TO_BLOCKSIZE(size, blk_desc) \
(PAD_SIZE(size, blk_desc->blksz))
-#ifdef CONFIG_BLOCK_CACHE
+#if (defined(CONFIG_BLOCK_CACHE) && !defined(CONFIG_SPL_BUILD)) || \
+(defined(CONFIG_SPL_BLOCK_CACHE) && defined(CONFIG_SPL_BUILD))
/**
* blkcache_read() - attempt to read a set of blocks from cache
*
--
2.17.1
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Re: [U-Boot] [PATCHv2] block: Have BLOCK_CACHE default to y in some cases
On Fri, Jun 8, 2018 at 2:15 PM Tom Rini wrote: > > On Fri, Jun 08, 2018 at 10:30:36AM -0500, Adam Ford wrote: > > On Tue, May 22, 2018 at 11:24 AM Tom Rini wrote: > > > > > > When dealing with filesystems that come from block devices we can get a > > > noticeable performance gain in some use cases from having the block > > > cache enabled. The code paths are valid in other cases when we have BLK > > > set and may provide wins in raw reads in some use cases, so have this be > > > default when BLK is enabled. > > > > > Tony, > > > > This breaks the AM3517 EVM. It appears to cause issues in MLO which > > may not have enough RAM to cache, but I can fix it by disabling > > BLOCK_CACHE. > > I can submit a patch to disable it on the AM3517, but I am wondering > > if something can/should be done to disable it or optionally disable it > > in SPL so it's still > > available in U-Boot. I can confirm that when disabled in SPL only, it > > works. > > > > Any opinions on this? > > So, we had talked before about bumping SYS_MALLOC_F_LEN to 0x2000 for > ARCH_OMAP2PLUS, but I see am3517 is already doing that. Can you see if > there's enough room to go to say 0x4000 and it works? Otherwise, we I tried setting it to 0x4000, but it just hangs: U-Boot SPL 2018.07-rc1-00040-g71002b508a (Jun 08 2018 - 15:16:44 -0500) Trying to boot from MMC1 > need to (and I was worried we might) need to add SPL_BLOCK_CACHE and > have that default off. Thanks! Do you want me to work on that patch or did you want to do it? adam > > -- > Tom ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] How to build multiple object files from one source?
On Fri, Jun 08, 2018 at 07:18:34PM +, Alexey Brodkin wrote: > Hello, > > I've been playing with libgcc sources imported in U-Boot [1] and so far > for some platforms it works but for some doesn't. > > The problem I just discovered is how libgcc's assembly is composed. > It has a couple of not very usual features: > 1. The same labels used in different functions > 2. A lot of functions are collected in the same source file [2] > 3. Every function is wrapped in individual #ifdef > 4. Very special target is used for compilation [3] which iterates through > the list of all those per-function defines LIB1ASMFUNCS [4] and compiles > the same one lib1funcs.S many times each time with just one define > provided and creates similarly named .o file. > Then all objects are easily collected in libgcc.s because all labels > are already resolved into offsets. > > And I'm wondering if something similar could be achieved in U-Boot? I would suggest, given that we have good Kbuild infrastructure now, and that sounds a lot like how, from the last time I skimmed the current kernel lib1asmfunc stuff for ARM, it's done today there. It's not a 1:1 but it's cleaner/clearer than what we have today. -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] How to build multiple object files from one source?
Hello, I've been playing with libgcc sources imported in U-Boot [1] and so far for some platforms it works but for some doesn't. The problem I just discovered is how libgcc's assembly is composed. It has a couple of not very usual features: 1. The same labels used in different functions 2. A lot of functions are collected in the same source file [2] 3. Every function is wrapped in individual #ifdef 4. Very special target is used for compilation [3] which iterates through the list of all those per-function defines LIB1ASMFUNCS [4] and compiles the same one lib1funcs.S many times each time with just one define provided and creates similarly named .o file. Then all objects are easily collected in libgcc.s because all labels are already resolved into offsets. And I'm wondering if something similar could be achieved in U-Boot? Ideal solution is reproduction of libgcc's original approach but that requires implementation of my own build "script" which might deal with input and output of different names. Because obviously "obj-y += xxx" won't work. That's what I want: Source file: lib1funcs.S Object files: _mulsi3.o, _umulsidi3.o, _umulsi3_highpart.o etc. [that I may achieve with creating of multiple symlinks to original lib1funcs.S] And what's even more important important I need to set per-file ASFLAGS: ASFLAGS__mulsi3.o = -DL_mulsi3, ASFLAGS__umulsidi3.o = -DL_umulsidi3, ASFLAGS__umulsi3_highpart.o = -DL_umulsi3_highpart etc. If that's not possible probably I'll need to split that combined lib1funcs.S into many files but this is: a) Pretty painful as we're talking about ~15 files b) Maintenance, i.e. the next import from future versions of GCC will be even more painful as lib1funcs.S might be restructured etc Any ideas? -Alexey [1] https://patchwork.ozlabs.org/patch/926522/ [2] https://github.com/gcc-mirror/gcc/blob/master/libgcc/config/arc/lib1funcs.S [3] https://github.com/gcc-mirror/gcc/blob/master/libgcc/Makefile.in#L473 [4] https://github.com/gcc-mirror/gcc/blob/master/libgcc/config/arc/t-arc#L24 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCHv2] block: Have BLOCK_CACHE default to y in some cases
On Fri, Jun 08, 2018 at 10:30:36AM -0500, Adam Ford wrote: > On Tue, May 22, 2018 at 11:24 AM Tom Rini wrote: > > > > When dealing with filesystems that come from block devices we can get a > > noticeable performance gain in some use cases from having the block > > cache enabled. The code paths are valid in other cases when we have BLK > > set and may provide wins in raw reads in some use cases, so have this be > > default when BLK is enabled. > > > Tony, > > This breaks the AM3517 EVM. It appears to cause issues in MLO which > may not have enough RAM to cache, but I can fix it by disabling > BLOCK_CACHE. > I can submit a patch to disable it on the AM3517, but I am wondering > if something can/should be done to disable it or optionally disable it > in SPL so it's still > available in U-Boot. I can confirm that when disabled in SPL only, it works. > > Any opinions on this? So, we had talked before about bumping SYS_MALLOC_F_LEN to 0x2000 for ARCH_OMAP2PLUS, but I see am3517 is already doing that. Can you see if there's enough room to go to say 0x4000 and it works? Otherwise, we need to (and I was worried we might) need to add SPL_BLOCK_CACHE and have that default off. Thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v2] AXS10x: add spi flash support
AXS10x boards have n25q512 spi flash IC, so add corresponding
nodes to device tree and enaple corresponding options in
defconfig.
Signed-off-by: Eugeniy Paltsev
---
NOTE: this patch has prerequisite:
http://patchwork.ozlabs.org/patch/926871/
Changes v1->v2:
* change SPI CS gpio compatible name.
arch/arc/dts/axs10x_mb.dtsi | 34 ++
configs/axs101_defconfig| 12
configs/axs103_defconfig| 12
3 files changed, 58 insertions(+)
diff --git a/arch/arc/dts/axs10x_mb.dtsi b/arch/arc/dts/axs10x_mb.dtsi
index 3855a34dc2..dfc03810ca 100644
--- a/arch/arc/dts/axs10x_mb.dtsi
+++ b/arch/arc/dts/axs10x_mb.dtsi
@@ -4,6 +4,10 @@
*/
/ {
+ aliases {
+ spi0 =
+ };
+
axs10x_mb@e000 {
compatible = "simple-bus";
#address-cells = <1>;
@@ -56,5 +60,35 @@
reg-shift = <2>;
reg-io-width = <4>;
};
+
+ spi0: spi@0 {
+ compatible = "snps,dw-apb-ssi";
+ reg = <0x0 0x100>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ spi-max-frequency = <400>;
+ clocks = <>;
+ clock-names = "spi_clk";
+ cs-gpio = <_gpio 0>;
+ spi_flash@0 {
+ compatible = "spi-flash";
+ reg = <0>;
+ spi-max-frequency = <400>;
+ };
+ };
+
+ cs_gpio: gpio@11218 {
+ compatible = "snps,creg-gpio";
+ reg = <0x11218 0x4>;
+ gpio-controller;
+ #gpio-cells = <1>;
+ gpio-bank-name = "axs-spi-cs";
+ gpio-count = <1>;
+ gpio-first-shift = <0>;
+ gpio-bit-per-line = <2>;
+ gpio-activate-val = <1>;
+ gpio-deactivate-val = <3>;
+ gpio-default-val = <1>;
+ };
};
};
diff --git a/configs/axs101_defconfig b/configs/axs101_defconfig
index d056719e14..a981398cb5 100644
--- a/configs/axs101_defconfig
+++ b/configs/axs101_defconfig
@@ -15,6 +15,8 @@ CONFIG_SYS_PROMPT="AXS# "
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
@@ -30,8 +32,15 @@ CONFIG_ENV_FAT_INTERFACE="mmc"
CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
+CONFIG_DM_GPIO=y
+CONFIG_HSDK_CREG_GPIO=y
CONFIG_MMC=y
CONFIG_MMC_DW=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_BAR=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_MTD=y
CONFIG_DM_ETH=y
CONFIG_PHY_GIGE=y
CONFIG_ETH_DESIGNWARE=y
@@ -39,6 +48,9 @@ CONFIG_DM_SERIAL=y
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_DESIGNWARE_SPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/axs103_defconfig b/configs/axs103_defconfig
index f0fccf4d9f..e524e6a9c6 100644
--- a/configs/axs103_defconfig
+++ b/configs/axs103_defconfig
@@ -15,6 +15,8 @@ CONFIG_SYS_PROMPT="AXS# "
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
@@ -30,8 +32,15 @@ CONFIG_ENV_FAT_INTERFACE="mmc"
CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
+CONFIG_DM_GPIO=y
+CONFIG_HSDK_CREG_GPIO=y
CONFIG_MMC=y
CONFIG_MMC_DW=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_BAR=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_MTD=y
CONFIG_DM_ETH=y
CONFIG_PHY_GIGE=y
CONFIG_ETH_DESIGNWARE=y
@@ -39,6 +48,9 @@ CONFIG_DM_SERIAL=y
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_DESIGNWARE_SPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_OHCI_HCD=y
--
2.14.3
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[U-Boot] [PATCH] AXS10x: add spi flash support
AXS10x boards have n25q512 spi flash IC, so add corresponding
nodes to device tree and enaple corresponding options in
defconfig.
Signed-off-by: Eugeniy Paltsev
---
NOTE: this patch has prerequisite:
http://patchwork.ozlabs.org/patch/926871/
arch/arc/dts/axs10x_mb.dtsi | 34 ++
configs/axs101_defconfig| 12
configs/axs103_defconfig| 12
3 files changed, 58 insertions(+)
diff --git a/arch/arc/dts/axs10x_mb.dtsi b/arch/arc/dts/axs10x_mb.dtsi
index 3855a34dc2..56b993fdfc 100644
--- a/arch/arc/dts/axs10x_mb.dtsi
+++ b/arch/arc/dts/axs10x_mb.dtsi
@@ -4,6 +4,10 @@
*/
/ {
+ aliases {
+ spi0 =
+ };
+
axs10x_mb@e000 {
compatible = "simple-bus";
#address-cells = <1>;
@@ -56,5 +60,35 @@
reg-shift = <2>;
reg-io-width = <4>;
};
+
+ spi0: spi@0 {
+ compatible = "snps,dw-apb-ssi";
+ reg = <0x0 0x100>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ spi-max-frequency = <400>;
+ clocks = <>;
+ clock-names = "spi_clk";
+ cs-gpio = <_gpio 0>;
+ spi_flash@0 {
+ compatible = "spi-flash";
+ reg = <0>;
+ spi-max-frequency = <400>;
+ };
+ };
+
+ cs_gpio: gpio@11218 {
+ compatible = "snps,hsdk-creg-gpio";
+ reg = <0x11218 0x4>;
+ gpio-controller;
+ #gpio-cells = <1>;
+ gpio-bank-name = "axs-spi-cs";
+ gpio-count = <1>;
+ gpio-first-shift = <0>;
+ gpio-bit-per-line = <2>;
+ gpio-activate-val = <1>;
+ gpio-deactivate-val = <3>;
+ gpio-default-val = <1>;
+ };
};
};
diff --git a/configs/axs101_defconfig b/configs/axs101_defconfig
index 25b10888ce..ae2f92faab 100644
--- a/configs/axs101_defconfig
+++ b/configs/axs101_defconfig
@@ -12,6 +12,8 @@ CONFIG_SYS_PROMPT="AXS# "
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
@@ -27,13 +29,23 @@ CONFIG_ENV_FAT_INTERFACE="mmc"
CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
+CONFIG_DM_GPIO=y
+CONFIG_HSDK_CREG_GPIO=y
CONFIG_MMC=y
CONFIG_MMC_DW=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_BAR=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_MTD=y
CONFIG_DM_ETH=y
CONFIG_PHY_GIGE=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_DM_SERIAL=y
CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_DESIGNWARE_SPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/axs103_defconfig b/configs/axs103_defconfig
index b9d387b88a..6b0edd4127 100644
--- a/configs/axs103_defconfig
+++ b/configs/axs103_defconfig
@@ -12,6 +12,8 @@ CONFIG_SYS_PROMPT="AXS# "
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
@@ -27,13 +29,23 @@ CONFIG_ENV_FAT_INTERFACE="mmc"
CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
+CONFIG_DM_GPIO=y
+CONFIG_HSDK_CREG_GPIO=y
CONFIG_MMC=y
CONFIG_MMC_DW=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_BAR=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_MTD=y
CONFIG_DM_ETH=y
CONFIG_PHY_GIGE=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_DM_SERIAL=y
CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_DESIGNWARE_SPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_OHCI_HCD=y
--
2.14.3
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Re: [U-Boot] [PATCH v3 2/4] usb: sunxi: ehci: get rid of ifdefs
On Fri, Jun 08, 2018 at 08:24:26AM -0700, Vasily Khoruzhick wrote:
> On Fri, Jun 8, 2018 at 7:24 AM, Maxime Ripard
> wrote:
> > On Thu, Jun 07, 2018 at 07:23:39PM -0700, Vasily Khoruzhick wrote:
> >> We can use compatibles instead.
> >>
> >> Signed-off-by: Vasily Khoruzhick
> >> ---
> >> v3: use ehci_sunxi_cfg instead of id
> >>
> >> drivers/usb/host/ehci-sunxi.c | 83 ++-
> >> 1 file changed, 63 insertions(+), 20 deletions(-)
> >>
> >> diff --git a/drivers/usb/host/ehci-sunxi.c b/drivers/usb/host/ehci-sunxi.c
> >> index 360efc9116..35fbe03331 100644
> >> --- a/drivers/usb/host/ehci-sunxi.c
> >> +++ b/drivers/usb/host/ehci-sunxi.c
> >> @@ -22,11 +22,17 @@
> >> #define AHB_CLK_DIST 1
> >> #endif
> >>
> >> +struct ehci_sunxi_cfg {
> >> + bool has_reset;
> >> + u32 extra_ahb_gate_mask;
> >> +};
> >> +
> >> struct ehci_sunxi_priv {
> >> struct ehci_ctrl ehci;
> >> struct sunxi_ccm_reg *ccm;
> >> int ahb_gate_mask; /* Mask of ahb_gate0 clk gate bits for this hcd */
> >
> > Ideally this should be moved to the ehci_sunxi_cfg (and this is true
> > for OHCI as well) function for consistency, but that can be done in a
> > subsequent patch.
>
> ahb_gate_mask is per-controller, i.e. it differs for EHCI0 and EHCI1
> so it can't be moved to ehci_sunxi_cfg.
Ah, right. Nevermind then :)
Maxime
--
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Re: [U-Boot] [PATCHv2] block: Have BLOCK_CACHE default to y in some cases
On Tue, May 22, 2018 at 11:24 AM Tom Rini wrote: > > When dealing with filesystems that come from block devices we can get a > noticeable performance gain in some use cases from having the block > cache enabled. The code paths are valid in other cases when we have BLK > set and may provide wins in raw reads in some use cases, so have this be > default when BLK is enabled. > Tony, This breaks the AM3517 EVM. It appears to cause issues in MLO which may not have enough RAM to cache, but I can fix it by disabling BLOCK_CACHE. I can submit a patch to disable it on the AM3517, but I am wondering if something can/should be done to disable it or optionally disable it in SPL so it's still available in U-Boot. I can confirm that when disabled in SPL only, it works. Any opinions on this? adam > Signed-off-by: Tom Rini > --- > Changes in v2: > - Make this default y, unconditionally but depend on BLK which is > required for the functionality to be used. > --- > drivers/block/Kconfig | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/block/Kconfig b/drivers/block/Kconfig > index 15fd1bcb2b7e..0792373cfc48 100644 > --- a/drivers/block/Kconfig > +++ b/drivers/block/Kconfig > @@ -29,7 +29,8 @@ config SPL_BLK > > config BLOCK_CACHE > bool "Use block device cache" > - default n > + depends on BLK > + default y > help > This option enables a disk-block cache for all block devices. > This is most useful when accessing filesystems under U-Boot since > -- > 2.7.4 > > ___ > U-Boot mailing list > U-Boot@lists.denx.de > https://lists.denx.de/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v3 2/4] usb: sunxi: ehci: get rid of ifdefs
On Fri, Jun 8, 2018 at 7:24 AM, Maxime Ripard wrote:
> On Thu, Jun 07, 2018 at 07:23:39PM -0700, Vasily Khoruzhick wrote:
>> We can use compatibles instead.
>>
>> Signed-off-by: Vasily Khoruzhick
>> ---
>> v3: use ehci_sunxi_cfg instead of id
>>
>> drivers/usb/host/ehci-sunxi.c | 83 ++-
>> 1 file changed, 63 insertions(+), 20 deletions(-)
>>
>> diff --git a/drivers/usb/host/ehci-sunxi.c b/drivers/usb/host/ehci-sunxi.c
>> index 360efc9116..35fbe03331 100644
>> --- a/drivers/usb/host/ehci-sunxi.c
>> +++ b/drivers/usb/host/ehci-sunxi.c
>> @@ -22,11 +22,17 @@
>> #define AHB_CLK_DIST 1
>> #endif
>>
>> +struct ehci_sunxi_cfg {
>> + bool has_reset;
>> + u32 extra_ahb_gate_mask;
>> +};
>> +
>> struct ehci_sunxi_priv {
>> struct ehci_ctrl ehci;
>> struct sunxi_ccm_reg *ccm;
>> int ahb_gate_mask; /* Mask of ahb_gate0 clk gate bits for this hcd */
>
> Ideally this should be moved to the ehci_sunxi_cfg (and this is true
> for OHCI as well) function for consistency, but that can be done in a
> subsequent patch.
ahb_gate_mask is per-controller, i.e. it differs for EHCI0 and EHCI1
so it can't be moved to ehci_sunxi_cfg.
> It looks good otherwise, thanks!
> Maxime
>
> --
> Maxime Ripard, Bootlin (formerly Free Electrons)
> Embedded Linux and Kernel engineering
> https://bootlin.com
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Re: [U-Boot] [PATCH RESEND 1/2] rockchip: make_fit_atf: use elf entry point
Mian,
Did you change anything or is this just a resend with the same content?
I didn’t have a chance to review this yet, so wanted to make sure I work off
the latest version...
Thanks,
Philipp.
> On 8 Jun 2018, at 10:47, Mian Yousaf Kaukab wrote:
>
> make_fit_atf.py uses physical address of first segment as the
> entry point to bl31. It is incorrect and causes following abort
> when bl31_entry() is called:
>
> U-Boot SPL board initTrying to boot from MMC1
> "Synchronous Abort" handler, esr 0x0200
> elr: lr : ff8c7e8c
> x 0: ff8e x 1:
> x 2: x 3: ff8e0180
> x 4: x 5:
> x 6: 0030 x 7: ff8e0188
> x 8: 01e0 x 9:
> x10: 0007fcdc x11: 002881b8
> x12: 01a2 x13: 0198
> x14: 0007fdcc x15: 002881b8
> x16: 003c0724 x17: 003c0718
> x18: 0007fe80 x19: ff8e
> x20: 0020 x21: ff8e
> x22: x23: 0007fe30
> x24: ff8d1c3c x25: ff8d5000
> x26: deadbeef x27: 04a0
> x28: 009c x29: 0007fd90
>
> Fix it by using the entry point from the elf header.
>
> Signed-off-by: Mian Yousaf Kaukab
> ---
> arch/arm/mach-rockchip/make_fit_atf.py | 7 ---
> 1 file changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm/mach-rockchip/make_fit_atf.py
> b/arch/arm/mach-rockchip/make_fit_atf.py
> index 6b3d9201c9..b88a5e1f16 100755
> --- a/arch/arm/mach-rockchip/make_fit_atf.py
> +++ b/arch/arm/mach-rockchip/make_fit_atf.py
> @@ -53,7 +53,7 @@ DT_END="""
> };
> """
>
> -def append_atf_node(file, atf_index, phy_addr):
> +def append_atf_node(file, atf_index, phy_addr, elf_entry):
> """
> Append ATF DT node to input FIT dts file.
> """
> @@ -67,7 +67,7 @@ def append_atf_node(file, atf_index, phy_addr):
> print >> file, '\t\t\tcompression = "none";'
> print >> file, '\t\t\tload = <0x%08x>;' % phy_addr
> if atf_index == 1:
> -print >> file, '\t\t\tentry = <0x%08x>;' % phy_addr
> +print >> file, '\t\t\tentry = <0x%08x>;' % elf_entry
> print >> file, '\t\t};'
> print >> file, ''
>
> @@ -141,12 +141,13 @@ def generate_atf_fit_dts(fit_file_name, bl31_file_name,
> uboot_file_name, dtbs_fi
>
> with open(bl31_file_name) as bl31_file:
> bl31 = ELFFile(bl31_file)
> +elf_entry = bl31.header['e_entry']
> for i in range(bl31.num_segments()):
> seg = bl31.get_segment(i)
> if ('PT_LOAD' == seg.__getitem__(ELF_SEG_P_TYPE)):
> paddr = seg.__getitem__(ELF_SEG_P_PADDR)
> p= seg.__getitem__(ELF_SEG_P_PADDR)
> -append_atf_node(fit_file, i+1, paddr)
> +append_atf_node(fit_file, i+1, paddr, elf_entry)
> atf_cnt = i+1
> append_fdt_node(fit_file, dtbs_file_name)
> print >> fit_file, '%s' % DT_IMAGES_NODE_END
> --
> 2.11.0
>
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[U-Boot] [PATCH 2/2] CREG GPIO: add device tree bindings
Signed-off-by: Eugeniy Paltsev
---
MAINTAINERS | 1 +
doc/device-tree-bindings/gpio/snps,creg-gpio.txt | 43
2 files changed, 44 insertions(+)
create mode 100644 doc/device-tree-bindings/gpio/snps,creg-gpio.txt
diff --git a/MAINTAINERS b/MAINTAINERS
index 642c448093..0ea730e33c 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -74,6 +74,7 @@ ARC HSDK CREG GPIO
M: Eugeniy Paltsev
S: Maintained
L: uboot-snps-...@synopsys.com
+F: doc/device-tree-bindings/gpio/snps,creg-gpio.txt
F: drivers/gpio/hsdk-creg-gpio.c
ARM
diff --git a/doc/device-tree-bindings/gpio/snps,creg-gpio.txt
b/doc/device-tree-bindings/gpio/snps,creg-gpio.txt
new file mode 100644
index 00..46ceb65c53
--- /dev/null
+++ b/doc/device-tree-bindings/gpio/snps,creg-gpio.txt
@@ -0,0 +1,43 @@
+GPIO via CREG (control registers) driver
+
+31 975 0 < bit number
+| ||| |
+[ not used | gpio-1 | gpio-0 | <-shift-> ] < 32 bit register
+ ^^
+ ||
+write 0x2 == set output to "1" (activate)
+write 0x3 == set output to "0" (deactivate)
+
+Required properties:
+- compatible : "snps,creg-gpio"
+- reg : Exactly one register range with length 0x4.
+- #gpio-cells : Should be one - the pin number.
+- gpio-controller : Marks the device node as a GPIO controller.
+- gpio-count: Number of GPIO pins.
+- gpio-bit-per-line: Number of bits per gpio line (see picture).
+- gpio-first-shift: Shift (in bits) of the first GPIO field in register
+ (see picture).
+- gpio-activate-val: Value should be set in corresponding field to set
+ output to "1" (see picture). Applied to all GPIO ports.
+- gpio-deactivate-val: Value should be set in corresponding field to set
+ output to "0" (see picture). Applied to all GPIO ports.
+
+Optional properties:
+- gpio-bank-name: name of bank (as default driver name is used is used)
+- gpio-default-val: array of default output values (must me 0 or 1)
+
+Example (see picture):
+
+gpio: gpio@f00014b0 {
+ compatible = "snps,creg-gpio";
+ reg = <0xf00014b0 0x4>;
+ gpio-controller;
+ #gpio-cells = <1>;
+ gpio-bank-name = "hsdk-spi-cs";
+ gpio-count = <2>;
+ gpio-first-shift = <5>;
+ gpio-bit-per-line = <2>;
+ gpio-activate-val = <2>;
+ gpio-deactivate-val = <3>;
+ gpio-default-val = <1 1>;
+};
--
2.14.3
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[U-Boot] [PATCH 0/2] GPIO: CREG: improve flexibility of hsdk-creg-gpio driver
CREG GPIO is a driver for weird soc-specific output ports, which are controlled by some fields in memory mapped register. Example: 31 975 0 < bit number | ||| | [ not used | gpio-1 | gpio-0 | <-shift-> ] < 32 bit register ^^ || write 0x2 == set output to "1" (activate) write 0x3 == set output to "0" (deactivate) As of tooday we only support fixed (hardcoded) bit per gpio line, activate / deactivatei and shift values. Fix that by read them from device tree to be able to use this driver for other boards. Eugeniy Paltsev (2): GPIO: CREG: improve flexibility of hsdk-creg-gpio driver CREG GPIO: add device tree bindings MAINTAINERS | 1 + arch/arc/dts/hsdk.dts| 7 +- doc/device-tree-bindings/gpio/snps,creg-gpio.txt | 43 ++ drivers/gpio/hsdk-creg-gpio.c| 103 ++- 4 files changed, 131 insertions(+), 23 deletions(-) create mode 100644 doc/device-tree-bindings/gpio/snps,creg-gpio.txt -- 2.14.3 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 1/2] GPIO: CREG: improve flexibility of hsdk-creg-gpio driver
CREG GPIO is a driver for weird soc-specific output ports, which are
controlled by some fields in memory mapped register.
Example:
31 975 0 < bit number
| ||| |
[ not used | gpio-1 | gpio-0 | <-shift-> ] < 32 bit register
^^
||
write 0x2 == set output to "1" (activate)
write 0x3 == set output to "0" (deactivate)
As of tooday we only support fixed (hardcoded) bit per gpio line,
activate / deactivatei and shift values. Fix that by read them from
device tree to be able to use this driver for other boards.
Remove "hsdk" prefix from compatible string as this driver can be
used with different boards like HSDK, AXS101, AXS103, etc.
Signed-off-by: Eugeniy Paltsev
---
arch/arc/dts/hsdk.dts | 7 ++-
drivers/gpio/hsdk-creg-gpio.c | 103 +-
2 files changed, 87 insertions(+), 23 deletions(-)
diff --git a/arch/arc/dts/hsdk.dts b/arch/arc/dts/hsdk.dts
index 264512877e..e41e4ce84b 100644
--- a/arch/arc/dts/hsdk.dts
+++ b/arch/arc/dts/hsdk.dts
@@ -101,11 +101,16 @@
};
cs_gpio: gpio@f00014b0 {
- compatible = "snps,hsdk-creg-gpio";
+ compatible = "snps,creg-gpio";
reg = <0xf00014b0 0x4>;
gpio-controller;
#gpio-cells = <1>;
gpio-bank-name = "hsdk-spi-cs";
gpio-count = <1>;
+ gpio-first-shift = <0>;
+ gpio-bit-per-line = <2>;
+ gpio-activate-val = <2>;
+ gpio-deactivate-val = <3>;
+ gpio-default-val = <1>;
};
};
diff --git a/drivers/gpio/hsdk-creg-gpio.c b/drivers/gpio/hsdk-creg-gpio.c
index 084a2da652..800027f18e 100644
--- a/drivers/gpio/hsdk-creg-gpio.c
+++ b/drivers/gpio/hsdk-creg-gpio.c
@@ -16,25 +16,24 @@
#include
#include
-#define HSDK_CREG_MAX_GPIO 8
-
-#define GPIO_ACTIVATE 0x2
-#define GPIO_DEACTIVATE0x3
-#define GPIO_PIN_MASK 0x3
-#define BIT_PER_GPIO 2
+#define DRV_NAME "gpio_creg"
struct hsdk_creg_gpio {
- uint32_t *regs;
+ u32 *regs;
+ u8 shift;
+ u8 activate;
+ u8 deactivate;
+ u8 bit_per_gpio;
};
static int hsdk_creg_gpio_set_value(struct udevice *dev, unsigned oft, int val)
{
struct hsdk_creg_gpio *hcg = dev_get_priv(dev);
- uint32_t reg = readl(hcg->regs);
- uint32_t cmd = val ? GPIO_DEACTIVATE : GPIO_ACTIVATE;
+ u8 reg_shift = oft * hcg->bit_per_gpio + hcg->shift;
+ u32 reg = readl(hcg->regs);
- reg &= ~(GPIO_PIN_MASK << (oft * BIT_PER_GPIO));
- reg |= (cmd << (oft * BIT_PER_GPIO));
+ reg &= ~(GENMASK(hcg->bit_per_gpio - 1, 0) << reg_shift);
+ reg |= ((val ? hcg->deactivate : hcg->activate) << reg_shift);
writel(reg, hcg->regs);
@@ -51,7 +50,9 @@ static int hsdk_creg_gpio_direction_output(struct udevice
*dev, unsigned oft,
static int hsdk_creg_gpio_direction_input(struct udevice *dev, unsigned oft)
{
- pr_err("hsdk-creg-gpio can't be used as input!\n");
+ struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
+
+ pr_err("%s can't be used as input!\n", uc_priv->bank_name);
return -ENOTSUPP;
}
@@ -59,10 +60,11 @@ static int hsdk_creg_gpio_direction_input(struct udevice
*dev, unsigned oft)
static int hsdk_creg_gpio_get_value(struct udevice *dev, unsigned int oft)
{
struct hsdk_creg_gpio *hcg = dev_get_priv(dev);
- uint32_t val = readl(hcg->regs);
+ u32 val = readl(hcg->regs);
- val = (val >> (oft * BIT_PER_GPIO)) & GPIO_PIN_MASK;
- return (val == GPIO_DEACTIVATE) ? 1 : 0;
+ val >>= oft * hcg->bit_per_gpio + hcg->shift;
+ val &= GENMASK(hcg->bit_per_gpio - 1, 0);
+ return (val == hcg->deactivate) ? 1 : 0;
}
static const struct dm_gpio_ops hsdk_creg_gpio_ops = {
@@ -76,17 +78,74 @@ static int hsdk_creg_gpio_probe(struct udevice *dev)
{
struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
struct hsdk_creg_gpio *hcg = dev_get_priv(dev);
+ u32 shift, bit_per_gpio, activate, deactivate, gpio_count;
+ const u8 *defaults;
- hcg->regs = (uint32_t *)devfdt_get_addr_ptr(dev);
-
- uc_priv->gpio_count = dev_read_u32_default(dev, "gpio-count", 1);
- if (uc_priv->gpio_count > HSDK_CREG_MAX_GPIO)
- uc_priv->gpio_count = HSDK_CREG_MAX_GPIO;
+ hcg->regs = (u32 *)devfdt_get_addr_ptr(dev);
+ gpio_count = dev_read_u32_default(dev, "gpio-count", 1);
+ shift = dev_read_u32_default(dev, "gpio-first-shift", 0);
+ bit_per_gpio = dev_read_u32_default(dev, "gpio-bit-per-line", 1);
+ activate = dev_read_u32_default(dev, "gpio-activate-val", 1);
+ deactivate = dev_read_u32_default(dev,
Re: [U-Boot] [U-Boot,v4,5/6] cmd: iotrace: add dump trace command
On Fri, Jun 8, 2018 at 2:18 PM, Tom Rini wrote:
> On Wed, May 30, 2018 at 11:10:01PM +0300, Ramon Fried wrote:
>
>> Add dump trace command which dump all trace
>> buffer content in a much more readable fashion
>> than md.
>>
>> Signed-off-by: Ramon Fried
>> Reviewed-by: Simon Glass
>> ---
>>
>> Changes in v4: None
>> Changes in v3: None
>> Changes in v2: None
>> Changes in v1: None
>>
>> cmd/iotrace.c | 36 +++-
>> 1 file changed, 35 insertions(+), 1 deletion(-)
>>
>> diff --git a/cmd/iotrace.c b/cmd/iotrace.c
>> index 601b8c8e32..f50a3c3a1a 100644
>> --- a/cmd/iotrace.c
>> +++ b/cmd/iotrace.c
>> @@ -24,6 +24,36 @@ static void do_print_stats(void)
>> printf("CRC32: %08lx\n", (ulong)iotrace_get_checksum());
>> }
>>
>> +static void do_print_trace(void)
>> +{
>> + ulong start, size, offset, count;
>> +
>> + struct iotrace_record *cur_record;
>> +
>> + iotrace_get_buffer(, , , );
>> +
>> + if (!start || !size || !count)
>> + return;
>> +
>> + printf("Timestamp Value Address\n");
>> +
>> + cur_record = (struct iotrace_record *)start;
>> + for (int i = 0; i < count; i++) {
>> + if (cur_record->flags & IOT_WRITE)
>> + printf("%08llu: 0x%08lx --> 0x%08lx\n",
>> +cur_record->timestamp,
>> + cur_record->value,
>> + cur_record->addr);
>> + else
>> + printf("%08llu: 0x%08lx <-- 0x%08lx\n",
>> +cur_record->timestamp,
>> + cur_record->value,
>> + cur_record->addr);
>> +
>> + cur_record++;
>> + }
>> +}
>
> This isn't portable. If you build for sandbox64:
> cmd/iotrace.c: In function ‘do_print_trace’:
> cmd/iotrace.c:44:11: warning: format ‘%lx’ expects argument of type ‘long
> unsigned int’, but argument 4 has type ‘phys_addr_t {aka unsigned int}’
> [-Wformat=]
> printf("%08llu: 0x%08lx --> 0x%08lx\n",
>^
> cmd/iotrace.c:49:11: warning: format ‘%lx’ expects argument of type ‘long
> unsigned int’, but argument 4 has type ‘phys_addr_t {aka unsigned int}’
> [-Wformat=]
> printf("%08llu: 0x%08lx <-- 0x%08lx\n",
>^
> t
>
> Also, as-is, with clang-7:
> u-boot/cmd/iotrace.c:47:6: warning: format specifies type 'unsigned long' but
> the argument has type 'phys_addr_t' (aka 'unsigned int') [-Wformat]
> cur_record->addr);
> ^~~~
> cmd/iotrace.c:52:6: warning: format specifies type 'unsigned long' but the
> argument has type 'phys_addr_t' (aka 'unsigned int') [-Wformat]
> cur_record->addr);
> ^~~~
>
> --
> Tom
Fixed it and resent the patches. Thanks.
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[U-Boot] [PATCH v5 4/6] iotrace: move record definitons to header file
The header definitions are needed for reading
record information in cmd/iotrace.c
Signed-off-by: Ramon Fried
Reviewed-by: Simon Glass
---
Changes in v5:
- Removed common.h include that caused werid compliation problems
in other boards (trini)
Changes in v4: None
Changes in v3: None
Changes in v2: None
Changes in v1: None
common/iotrace.c | 27 ---
include/iotrace.h | 28
2 files changed, 28 insertions(+), 27 deletions(-)
diff --git a/common/iotrace.c b/common/iotrace.c
index 2f03a6082e..83691b1dba 100644
--- a/common/iotrace.c
+++ b/common/iotrace.c
@@ -11,33 +11,6 @@
DECLARE_GLOBAL_DATA_PTR;
-/* Support up to the machine word length for now */
-typedef ulong iovalue_t;
-
-enum iotrace_flags {
- IOT_8 = 0,
- IOT_16,
- IOT_32,
-
- IOT_READ = 0 << 3,
- IOT_WRITE = 1 << 3,
-};
-
-/**
- * struct iotrace_record - Holds a single I/O trace record
- *
- * @flags: I/O access type
- * @timestamp: Timestamp of access
- * @addr: Address of access
- * @value: Value written or read
- */
-struct iotrace_record {
- enum iotrace_flags flags;
- u64 timestamp;
- phys_addr_t addr;
- iovalue_t value;
-};
-
/**
* struct iotrace - current trace status and checksum
*
diff --git a/include/iotrace.h b/include/iotrace.h
index 1efb117343..063371f23f 100644
--- a/include/iotrace.h
+++ b/include/iotrace.h
@@ -6,8 +6,36 @@
#ifndef __IOTRACE_H
#define __IOTRACE_H
+//#include
#include
+/* Support up to the machine word length for now */
+typedef ulong iovalue_t;
+
+enum iotrace_flags {
+ IOT_8 = 0,
+ IOT_16,
+ IOT_32,
+
+ IOT_READ = 0 << 3,
+ IOT_WRITE = 1 << 3,
+};
+
+/**
+ * struct iotrace_record - Holds a single I/O trace record
+ *
+ * @flags: I/O access type
+ * @timestamp: Timestamp of access
+ * @addr: Address of access
+ * @value: Value written or read
+ */
+struct iotrace_record {
+ enum iotrace_flags flags;
+ u64 timestamp;
+ phys_addr_t addr;
+ iovalue_t value;
+};
+
/*
* This file is designed to be included in arch//include/asm/io.h.
* It redirects all IO access through a tracing/checksumming feature for
--
2.17.1
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[U-Boot] [PATCH v5 6/6] iotrace: fix behaviour when buffer is full
Don't continue updating the offset when buffer is full.
When the buffer size exhausts and there's no space left to write
warn the user and update only the needed size and not both the
offset and needed size.
Add needed buffer size information in the iotrace command.
Signed-off-by: Ramon Fried
---
Changes in v5: None
Changes in v4: None
Changes in v3:
- fixed wrong usage of WARN_ONCE
Changes in v2:
- introduced needed_size to notify the user about the needed buffer size.
Changes in v1: None
cmd/iotrace.c | 11 ++-
common/iotrace.c | 13 +++--
include/iotrace.h | 5 +++--
3 files changed, 20 insertions(+), 9 deletions(-)
diff --git a/cmd/iotrace.c b/cmd/iotrace.c
index f8ce3398af..fa6c68b198 100644
--- a/cmd/iotrace.c
+++ b/cmd/iotrace.c
@@ -9,12 +9,13 @@
static void do_print_stats(void)
{
- ulong start, size, offset, count;
+ ulong start, size, needed_size, offset, count;
printf("iotrace is %sabled\n", iotrace_get_enabled() ? "en" : "dis");
- iotrace_get_buffer(, , , );
+ iotrace_get_buffer(, , _size, , );
printf("Start: %08lx\n", start);
- printf("Size: %08lx\n", size);
+ printf("Actual Size: %08lx\n", size);
+ printf("Needed Size: %08lx\n", needed_size);
iotrace_get_region(, );
printf("Region: %08lx\n", start);
printf("Size: %08lx\n", size);
@@ -26,11 +27,11 @@ static void do_print_stats(void)
static void do_print_trace(void)
{
- ulong start, size, offset, count;
+ ulong start, size, needed_size, offset, count;
struct iotrace_record *cur_record;
- iotrace_get_buffer(, , , );
+ iotrace_get_buffer(, , _size, , );
if (!start || !size || !count)
return;
diff --git a/common/iotrace.c b/common/iotrace.c
index 83691b1dba..49bee3c92a 100644
--- a/common/iotrace.c
+++ b/common/iotrace.c
@@ -15,7 +15,8 @@ DECLARE_GLOBAL_DATA_PTR;
* struct iotrace - current trace status and checksum
*
* @start: Start address of iotrace buffer
- * @size: Size of iotrace buffer in bytes
+ * @size: Actual size of iotrace buffer in bytes
+ * @needed_size: Needed of iotrace buffer in bytes
* @offset:Current write offset into iotrace buffer
* @region_start: Address of IO region to trace
* @region_size: Size of region to trace. if 0 will trace all address space
@@ -25,6 +26,7 @@ DECLARE_GLOBAL_DATA_PTR;
static struct iotrace {
ulong start;
ulong size;
+ ulong needed_size;
ulong offset;
ulong region_start;
ulong region_size;
@@ -55,7 +57,12 @@ static void add_record(int flags, const void *ptr, ulong
value)
rec = (struct iotrace_record *)map_sysmem(
iotrace.start + iotrace.offset,
sizeof(value));
+ } else {
+ WARN_ONCE(1, "WARNING: iotrace buffer exhausted, please check
needed length using \"iotrace stats\"\n");
+ iotrace.needed_size += sizeof(struct iotrace_record);
+ return;
}
+
rec->timestamp = timer_get_us();
rec->flags = flags;
rec->addr = map_to_sysmem(ptr);
@@ -65,6 +72,7 @@ static void add_record(int flags, const void *ptr, ulong
value)
iotrace.crc32 = crc32(iotrace.crc32, (unsigned char *)rec,
sizeof(*rec));
+ iotrace.needed_size += sizeof(struct iotrace_record);
iotrace.offset += sizeof(struct iotrace_record);
}
@@ -162,10 +170,11 @@ void iotrace_set_buffer(ulong start, ulong size)
iotrace.crc32 = 0;
}
-void iotrace_get_buffer(ulong *start, ulong *size, ulong *offset, ulong *count)
+void iotrace_get_buffer(ulong *start, ulong *size, ulong *needed_size, ulong
*offset, ulong *count)
{
*start = iotrace.start;
*size = iotrace.size;
+ *needed_size = iotrace.needed_size;
*offset = iotrace.offset;
*count = iotrace.offset / sizeof(struct iotrace_record);
}
diff --git a/include/iotrace.h b/include/iotrace.h
index 063371f23f..be1d2753e1 100644
--- a/include/iotrace.h
+++ b/include/iotrace.h
@@ -146,11 +146,12 @@ void iotrace_set_buffer(ulong start, ulong size);
* iotrace_get_buffer() - Get buffer information
*
* @start: Returns start address of buffer
- * @size: Returns size of buffer in bytes
+ * @size: Returns actual size of buffer in bytes
+ * @needed_size: Returns needed size of buffer in bytes
* @offset: Returns the byte offset where the next output trace record will
* @count: Returns the number of trace records recorded
* be written (or would be if the buffer was large enough)
*/
-void iotrace_get_buffer(ulong *start, ulong *size, ulong *offset, ulong
*count);
+void iotrace_get_buffer(ulong *start, ulong *size, ulong *needed_size, ulong
*offset, ulong *count);
#endif /* __IOTRACE_H */
--
2.17.1
___
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[U-Boot] [PATCH v5 5/6] cmd: iotrace: add dump trace command
Add dump trace command which dump all trace
buffer content in a much more readable fashion
than md.
Signed-off-by: Ramon Fried
Reviewed-by: Simon Glass
---
Changes in v5:
- Fixed portability issue in printf (trini)
Changes in v4: None
Changes in v3: None
Changes in v2: None
Changes in v1: None
cmd/iotrace.c | 36 +++-
1 file changed, 35 insertions(+), 1 deletion(-)
diff --git a/cmd/iotrace.c b/cmd/iotrace.c
index 601b8c8e32..f8ce3398af 100644
--- a/cmd/iotrace.c
+++ b/cmd/iotrace.c
@@ -24,6 +24,36 @@ static void do_print_stats(void)
printf("CRC32: %08lx\n", (ulong)iotrace_get_checksum());
}
+static void do_print_trace(void)
+{
+ ulong start, size, offset, count;
+
+ struct iotrace_record *cur_record;
+
+ iotrace_get_buffer(, , , );
+
+ if (!start || !size || !count)
+ return;
+
+ printf("Timestamp Value Address\n");
+
+ cur_record = (struct iotrace_record *)start;
+ for (int i = 0; i < count; i++) {
+ if (cur_record->flags & IOT_WRITE)
+ printf("%08llu: 0x%08lx --> 0x%08llx\n",
+ cur_record->timestamp,
+ cur_record->value,
+ (unsigned long long)cur_record->addr);
+ else
+ printf("%08llu: 0x%08lx <-- 0x%08llx\n",
+ cur_record->timestamp,
+ cur_record->value,
+ (unsigned long long)cur_record->addr);
+
+ cur_record++;
+ }
+}
+
static int do_set_buffer(int argc, char * const argv[])
{
ulong addr = 0, size = 0;
@@ -76,6 +106,9 @@ int do_iotrace(cmd_tbl_t *cmdtp, int flag, int argc, char *
const argv[])
case 's':
do_print_stats();
break;
+ case 'd':
+ do_print_trace();
+ break;
default:
return CMD_RET_USAGE;
}
@@ -90,5 +123,6 @@ U_BOOT_CMD(
"iotrace buffer- set iotrace buffer\n"
"iotrace limit - set iotrace region limit\n"
"iotrace pause- pause tracing\n"
- "iotrace resume - resume tracing"
+ "iotrace resume - resume tracing\n"
+ "iotrace dump - dump iotrace buffer"
);
--
2.17.1
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[U-Boot] [PATCH v5 2/6] iotrace: add IO region limit
When dealing with a lot of IO regions, sometimes
it makes sense only to trace a specific one.
This patch adds support for region limits.
If region is not set, the iotrace works the same as it was.
If region is set, the iotrace only logs io operation that falls
in the defined region.
Signed-off-by: Ramon Fried
Reviewed-by: Simon Glass
---
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
Changes in v1: None
common/iotrace.c | 27 +++
include/iotrace.h | 24
2 files changed, 51 insertions(+)
diff --git a/common/iotrace.c b/common/iotrace.c
index b16b0d612d..f39885663a 100644
--- a/common/iotrace.c
+++ b/common/iotrace.c
@@ -42,6 +42,8 @@ struct iotrace_record {
* @start: Start address of iotrace buffer
* @size: Size of iotrace buffer in bytes
* @offset:Current write offset into iotrace buffer
+ * @region_start: Address of IO region to trace
+ * @region_size: Size of region to trace. if 0 will trace all address space
* @crc32: Current value of CRC chceksum of trace records
* @enabled: true if enabled, false if disabled
*/
@@ -49,6 +51,8 @@ static struct iotrace {
ulong start;
ulong size;
ulong offset;
+ ulong region_start;
+ ulong region_size;
u32 crc32;
bool enabled;
} iotrace;
@@ -66,6 +70,11 @@ static void add_record(int flags, const void *ptr, ulong
value)
if (!(gd->flags & GD_FLG_RELOC) || !iotrace.enabled)
return;
+ if (iotrace.region_size)
+ if ((ulong)ptr < iotrace.region_start ||
+ (ulong)ptr > iotrace.region_start + iotrace.region_size)
+ return;
+
/* Store it if there is room */
if (iotrace.offset + sizeof(*rec) < iotrace.size) {
rec = (struct iotrace_record *)map_sysmem(
@@ -142,6 +151,24 @@ u32 iotrace_get_checksum(void)
return iotrace.crc32;
}
+void iotrace_set_region(ulong start, ulong size)
+{
+ iotrace.region_start = start;
+ iotrace.region_size = size;
+}
+
+void iotrace_reset_region(void)
+{
+ iotrace.region_start = 0;
+ iotrace.region_size = 0;
+}
+
+void iotrace_get_region(ulong *start, ulong *size)
+{
+ *start = iotrace.region_start;
+ *size = iotrace.region_size;
+}
+
void iotrace_set_enabled(int enable)
{
iotrace.enabled = enable;
diff --git a/include/iotrace.h b/include/iotrace.h
index 9fe5733f87..1efb117343 100644
--- a/include/iotrace.h
+++ b/include/iotrace.h
@@ -58,6 +58,30 @@ void iotrace_reset_checksum(void);
*/
u32 iotrace_get_checksum(void);
+/**
+ * iotrace_set_region() - Set whether iotrace is limited to a specific
+ * io region.
+ *
+ * Defines the address and size of the limited region.
+ *
+ * @start: address of the beginning of the region
+ * @size: size of the region in bytes.
+ */
+void iotrace_set_region(ulong start, ulong size);
+
+/**
+ * iotrace_reset_region() - Reset the region limit
+ */
+void iotrace_reset_region(void);
+
+/**
+ * iotrace_get_region() - Get region information
+ *
+ * @start: Returns start address of region
+ * @size: Returns size of region in bytes
+ */
+void iotrace_get_region(ulong *start, ulong *size);
+
/**
* iotrace_set_enabled() - Set whether iotracing is enabled or not
*
--
2.17.1
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[U-Boot] [PATCH v5 3/6] common: iotrace: add timestamp to iotrace records
Add timestamp to each iotrace record to aid in debugging
of IO timing access bugs.
Signed-off-by: Ramon Fried
Reviewed-by: Simon Glass
---
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
Changes in v1:
- Change timestamp function to get_ticks()
common/iotrace.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/common/iotrace.c b/common/iotrace.c
index f39885663a..2f03a6082e 100644
--- a/common/iotrace.c
+++ b/common/iotrace.c
@@ -27,11 +27,13 @@ enum iotrace_flags {
* struct iotrace_record - Holds a single I/O trace record
*
* @flags: I/O access type
+ * @timestamp: Timestamp of access
* @addr: Address of access
* @value: Value written or read
*/
struct iotrace_record {
enum iotrace_flags flags;
+ u64 timestamp;
phys_addr_t addr;
iovalue_t value;
};
@@ -81,7 +83,7 @@ static void add_record(int flags, const void *ptr, ulong
value)
iotrace.start + iotrace.offset,
sizeof(value));
}
-
+ rec->timestamp = timer_get_us();
rec->flags = flags;
rec->addr = map_to_sysmem(ptr);
rec->value = value;
--
2.17.1
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[U-Boot] [PATCH v5 1/6] cmd: iotrace: add set region command
Signed-off-by: Ramon Fried
Reviewed-by: Simon Glass
---
Changes in v5: None
Changes in v4:
- Resend complete patchset with patman
Changes in v3: None
Changes in v2: None
Changes in v1: None
cmd/iotrace.c | 22 ++
1 file changed, 22 insertions(+)
diff --git a/cmd/iotrace.c b/cmd/iotrace.c
index e496787e0d..601b8c8e32 100644
--- a/cmd/iotrace.c
+++ b/cmd/iotrace.c
@@ -15,6 +15,9 @@ static void do_print_stats(void)
iotrace_get_buffer(, , , );
printf("Start: %08lx\n", start);
printf("Size: %08lx\n", size);
+ iotrace_get_region(, );
+ printf("Region: %08lx\n", start);
+ printf("Size: %08lx\n", size);
printf("Offset: %08lx\n", offset);
printf("Output: %08lx\n", start + offset);
printf("Count: %08lx\n", count);
@@ -37,6 +40,22 @@ static int do_set_buffer(int argc, char * const argv[])
return 0;
}
+static int do_set_region(int argc, char * const argv[])
+{
+ ulong addr = 0, size = 0;
+
+ if (argc == 2) {
+ addr = simple_strtoul(*argv++, NULL, 16);
+ size = simple_strtoul(*argv++, NULL, 16);
+ } else if (argc != 0) {
+ return CMD_RET_USAGE;
+ }
+
+ iotrace_set_region(addr, size);
+
+ return 0;
+}
+
int do_iotrace(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
const char *cmd = argc < 2 ? NULL : argv[1];
@@ -46,6 +65,8 @@ int do_iotrace(cmd_tbl_t *cmdtp, int flag, int argc, char *
const argv[])
switch (*cmd) {
case 'b':
return do_set_buffer(argc - 2, argv + 2);
+ case 'l':
+ return do_set_region(argc - 2, argv + 2);
case 'p':
iotrace_set_enabled(0);
break;
@@ -67,6 +88,7 @@ U_BOOT_CMD(
"iotrace utility commands",
"stats- display iotrace stats\n"
"iotrace buffer- set iotrace buffer\n"
+ "iotrace limit - set iotrace region limit\n"
"iotrace pause- pause tracing\n"
"iotrace resume - resume tracing"
);
--
2.17.1
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[U-Boot] [PATCH v5 0/6] Iotrace improvements
These set of patches add few improvements to iotrace. * Region limiting - allows setting an address and size where only io operations that falls into that address are logged. * Timestamping - Timestamp every iotrace record with current timestamp * dumping - iotrace dump command for dumping all records from buffer in a readable fashion. In terms of backwards compatibility, the timestamp is not backward compatible as it changes the iotrace record. so if one developed an offline parsing tool it will be broken. I though of adding #ifdef specific for that, but eventually I didn't. Changes in v5: - Removed common.h include that caused werid compliation problems in other boards (trini) - Fixed portability issue in printf (trini) Changes in v4: - Resend complete patchset with patman Changes in v3: - fixed wrong usage of WARN_ONCE Changes in v2: - introduced needed_size to notify the user about the needed buffer size. Changes in v1: - Change timestamp function to get_ticks() Ramon Fried (6): cmd: iotrace: add set region command iotrace: add IO region limit common: iotrace: add timestamp to iotrace records iotrace: move record definitons to header file cmd: iotrace: add dump trace command iotrace: fix behaviour when buffer is full cmd/iotrace.c | 63 ++--- common/iotrace.c | 65 +++ include/iotrace.h | 57 +++-- 3 files changed, 153 insertions(+), 32 deletions(-) -- 2.17.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH] ARM: DTS: resync a3517.dtsi with Linux 4.17
Linux 4.17 was just released with some minor changes to the
am3517.dtsi. This patch re-syncs the file.
Signed-off-by: Adam Ford
diff --git a/arch/arm/dts/am3517.dtsi b/arch/arm/dts/am3517.dtsi
index 00da3f2c40..ca294914bb 100644
--- a/arch/arm/dts/am3517.dtsi
+++ b/arch/arm/dts/am3517.dtsi
@@ -26,7 +26,7 @@
interrupt-names = "mc";
};
- davinci_emac: ethernet@0x5c00 {
+ davinci_emac: ethernet@5c00 {
compatible = "ti,am3517-emac";
ti,hwmods = "davinci_emac";
status = "disabled";
@@ -41,7 +41,7 @@
local-mac-address = [ 00 00 00 00 00 00 ];
};
- davinci_mdio: ethernet@0x5c03 {
+ davinci_mdio: ethernet@5c03 {
compatible = "ti,davinci_mdio";
ti,hwmods = "davinci_mdio";
status = "disabled";
@@ -99,9 +99,5 @@
status = "disabled";
};
-_mpu_iva {
- status = "disabled";
-};
-
/include/ "am35xx-clocks.dtsi"
/include/ "omap36xx-am35xx-omap3430es2plus-clocks.dtsi"
--
2.17.1
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Re: [U-Boot] fit: Enable fitImage by default if OF_LIBFDT is enabled
On 06/08/2018 01:18 PM, Tom Rini wrote: > On Wed, May 23, 2018 at 12:49:56AM +0200, Marek Vasut wrote: > >> Enable fitImage by default on systems which already use libfdt. >> The fitImage has many benefits over zImage and supersedes legacy >> uImage, so enable it by default where possible to make it widely >> available. >> >> Signed-off-by: Marek Vasut >> Cc: Maxime Ripard >> Cc: Michal Simek >> Cc: Tom Rini >> --- >> NOTE: And make my life easier, so that every contemporary board I >> look at supports a civilized contemporary boot image format >> and I don't have to mess around to find the right combo of >> zImage or uImage and DTB and the right load addresses and >> keep loading gazilion of files every time I boot a board. > > You need to run this through travis or otherwise build the world. A > number of platforms fail due to size constraints and a few others (snow > for example) fail for other reasons. Thanks! Lovely, so how do we constrain those ? btw I'd have expected snow to have fitImage enabled already ? -- Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v3 2/4] usb: sunxi: ehci: get rid of ifdefs
On Thu, Jun 07, 2018 at 07:23:39PM -0700, Vasily Khoruzhick wrote:
> We can use compatibles instead.
>
> Signed-off-by: Vasily Khoruzhick
> ---
> v3: use ehci_sunxi_cfg instead of id
>
> drivers/usb/host/ehci-sunxi.c | 83 ++-
> 1 file changed, 63 insertions(+), 20 deletions(-)
>
> diff --git a/drivers/usb/host/ehci-sunxi.c b/drivers/usb/host/ehci-sunxi.c
> index 360efc9116..35fbe03331 100644
> --- a/drivers/usb/host/ehci-sunxi.c
> +++ b/drivers/usb/host/ehci-sunxi.c
> @@ -22,11 +22,17 @@
> #define AHB_CLK_DIST 1
> #endif
>
> +struct ehci_sunxi_cfg {
> + bool has_reset;
> + u32 extra_ahb_gate_mask;
> +};
> +
> struct ehci_sunxi_priv {
> struct ehci_ctrl ehci;
> struct sunxi_ccm_reg *ccm;
> int ahb_gate_mask; /* Mask of ahb_gate0 clk gate bits for this hcd */
Ideally this should be moved to the ehci_sunxi_cfg (and this is true
for OHCI as well) function for consistency, but that can be done in a
subsequent patch.
It looks good otherwise, thanks!
Maxime
--
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Embedded Linux and Kernel engineering
https://bootlin.com
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[U-Boot] [PATCH] ARM: am3517_evm: Enable SPL_OF_CONTROL and SPL_OF_PLATDATA
The SPL doesn't have much room, so in order to support OF_CONTROL
in SPL, we need the extra functionality of SPL_OF_PLATDATA.
Adding these features allows us to remove a small part of code without
losing the serial port during SPL.
Signed-off-by: Adam Ford
diff --git a/board/logicpd/am3517evm/am3517evm.c
b/board/logicpd/am3517evm/am3517evm.c
index bcd3588818..da8be22085 100644
--- a/board/logicpd/am3517evm/am3517evm.c
+++ b/board/logicpd/am3517evm/am3517evm.c
@@ -37,20 +37,6 @@ DECLARE_GLOBAL_DATA_PTR;
#define CPGMACSS_SW_RST(1 << 1)
#define PHY_GPIO 30
-/* This is only needed until SPL gets OF support */
-#ifdef CONFIG_SPL_BUILD
-static const struct ns16550_platdata am3517_serial = {
- .base = OMAP34XX_UART3,
- .reg_shift = 2,
- .clock = V_NS16550_CLK,
- .fcr = UART_FCR_DEFVAL,
-};
-
-U_BOOT_DEVICE(am3517_uart) = {
- "ns16550_serial",
- _serial
-};
-#endif
/*
* Routine: board_init
diff --git a/configs/am3517_evm_defconfig b/configs/am3517_evm_defconfig
index 6643f93e33..3b8e2900eb 100644
--- a/configs/am3517_evm_defconfig
+++ b/configs/am3517_evm_defconfig
@@ -30,6 +30,8 @@ CONFIG_MTDIDS_DEFAULT="nand0=omap2-nand.0"
CONFIG_MTDPARTS_DEFAULT="mtdparts=omap2-nand.0:512k(MLO),1920k(u-boot),256k(u-boot-env),8m(kernel),512k(dtb),-(rootfs)"
CONFIG_CMD_UBI=y
CONFIG_OF_CONTROL=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_SPL_OF_PLATDATA=y
# CONFIG_ENV_IS_IN_FAT is not set
CONFIG_ENV_IS_IN_NAND=y
CONFIG_MMC_OMAP_HS=y
@@ -43,3 +45,4 @@ CONFIG_USB=y
CONFIG_USB_MUSB_HOST=y
CONFIG_USB_MUSB_AM35X=y
CONFIG_BCH=y
+# CONFIG_SPL_OF_LIBFDT is not set
--
2.17.1
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[U-Boot] Pull request: u-boot-ubi/master
Hello Tom, please pull from u-boot-ubi.git master The following changes since commit 89d811eee694ebd7dee0766e90552b91e89f60fb: Merge git://git.denx.de/u-boot-marvell (2018-06-05 07:13:42 -0400) are available in the Git repository at: git://git.denx.de/u-boot-ubi.git master for you to fetch changes up to 78306cba118e718a3b429695ac48846b9d9afeff: mtd: ubi: Add missing newlines in ubi_init() (2018-06-06 10:25:13 +0200) Stefan Roese (1): mtd: ubi: Add missing newlines in ubi_init() drivers/mtd/ubi/build.c | 12 ++-- 1 file changed, 6 insertions(+), 6 deletions(-) travis builds clean, see: https://travis-ci.org/hsdenx/u-boot-ubi/builds/388656143 no errors found in my tbot tests. bye, Heiko -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-52 Fax: +49-8142-66989-80 Email: h...@denx.de ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH] mtd: ubi: Add missing newlines in ubi_init()
Hello Stefan, Am 29.05.2018 um 15:28 schrieb Stefan Roese: I just stumbled over some cluttered UBI messages. It seems some newline chars are missing in the current U-Boot UBI source. Lets fix this in U-Boot as well (Linux has those fixes already). Signed-off-by: Stefan Roese Cc: Heiko Schocher --- drivers/mtd/ubi/build.c | 12 ++-- 1 file changed, 6 insertions(+), 6 deletions(-) Applied to u-boot-ubi.git master Thanks! bye, Heiko -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-52 Fax: +49-8142-66989-80 Email: h...@denx.de ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] Please pull from u-boot-i2c
Hello Tom, please pull from u-boot-i2c.git master The following changes since commit 3eceff642c01e03e055127c9cf21608faaff28ac: Merge branch 'master' of git://git.denx.de/u-boot-samsung (2018-06-06 09:08:16 -0400) are available in the Git repository at: git://git.denx.de/u-boot-i2c.git master for you to fetch changes up to d78ecc733988d07a87c97f7f1c19171c437a8712: mvebu: turris_omnia: add note about i2c slave disable (2018-06-07 14:20:09 +0200) Baruch Siach (2): i2c: mvtwsi: disable i2c slave on Armada 38x mvebu: turris_omnia: add note about i2c slave disable board/CZ.NIC/turris_omnia/turris_omnia.c | 6 +- drivers/i2c/mvtwsi.c | 24 +++- 2 files changed, 28 insertions(+), 2 deletions(-) Clean travis build, see: https://travis-ci.org/hsdenx/u-boot-i2c/builds/389219977 v4 not tested with tbot, but v2, found no problems. bye, Heiko -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-52 Fax: +49-8142-66989-80 Email: h...@denx.de ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v4 2/2] mvebu: turris_omnia: add note about i2c slave disable
Hello Baruch, Am 07.06.2018 um 11:38 schrieb Baruch Siach: Code that disables the i2c slave is now in the mvtwsi i2c driver. Platform must enable DM_I2C to use that code. Add a comment in the code as a reminder for the planned DM_I2C migration of Turris Omnia. Reviewed-by: Heiko Schocher Signed-off-by: Baruch Siach --- v2: Add Reviewed-by from Heiko --- board/CZ.NIC/turris_omnia/turris_omnia.c | 6 +- 1 file changed, 5 insertions(+), 1 deletion(-) Applied to u-boot-i2c.git master Thanks! bye, Heiko -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-52 Fax: +49-8142-66989-80 Email: h...@denx.de ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v4 1/2] i2c: mvtwsi: disable i2c slave on Armada 38x
Hello Baruch, Am 07.06.2018 um 11:38 schrieb Baruch Siach: Equivalent code that disables the hidden i2c0 slave already exists in the Turris Omnia platform specific code. But this hidden i2c0 slave that interferes the i2c bus is not board specific. Armada 38x SoCs and at least some Kirkwood variants are affected as well. Add code to disable this slave to the i2c bus driver to make it work on all affected hardware. Use the bind callback because we want this to always run at boot, regardless of whether U-Boot uses the i2c bus. Cc: Rabeeh Khoury Cc: Chris Packham Reviewed-by: Stefan Roese Reviewed-by: Heiko Schocher Signed-off-by: Baruch Siach --- v4: * Add dummy 'debug' field to sunxi instead of platform #ifdef around the 'debug' field access (Stefan Roese, Heiko Schocher) v3: * Fix build for SUNXI (Heiko Schocher) v2: * Use clrbits_le32 (Stefan Roese) * Apply to Kirkwood (Chris Packham) * Add review tags from Stefan and Heiko --- drivers/i2c/mvtwsi.c | 24 +++- 1 file changed, 23 insertions(+), 1 deletion(-) Applied to u-boot-i2c.git master Thanks! bye, Heiko -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-52 Fax: +49-8142-66989-80 Email: h...@denx.de ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot, v4, 4/6] iotrace: move record definitons to header file
On Fri, Jun 8, 2018 at 3:49 PM, Ramon Fried wrote: > On Fri, Jun 8, 2018 at 2:19 PM, Tom Rini wrote: >> On Wed, May 30, 2018 at 11:10:00PM +0300, Ramon Fried wrote: >> >>> The header definitions are needed for reading >>> record information in cmd/iotrace.c >>> >>> Signed-off-by: Ramon Fried >>> Reviewed-by: Simon Glass >> >> This change ends up breaking a number of platforms including k2l_hs_evm >> in a very odd way. > It's very odd indeed. basically, just adding #include > breaks the build. > I'm investigating. Didn't find how it breaks, but I actually don't need common.h so I removed it and now it works. I will resend the patch shortly. > Thanks, > Ramon. > >> >> -- >> Tom ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot, v4, 4/6] iotrace: move record definitons to header file
On Fri, Jun 8, 2018 at 2:19 PM, Tom Rini wrote: > On Wed, May 30, 2018 at 11:10:00PM +0300, Ramon Fried wrote: > >> The header definitions are needed for reading >> record information in cmd/iotrace.c >> >> Signed-off-by: Ramon Fried >> Reviewed-by: Simon Glass > > This change ends up breaking a number of platforms including k2l_hs_evm > in a very odd way. It's very odd indeed. basically, just adding #include breaks the build. I'm investigating. Thanks, Ramon. > > -- > Tom ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] Uboot as x86_64 EFI payload
Hi,
On Mon, Jan 29, 2018 at 11:18 PM, Juan Alfonso Reyes Ajenjo
wrote:
> Hi,
> I am Juan Alfonso Reyes, a firmware engineer in GMV. Currently we are
> developing new boards based in Apollo Lake CPU. We are trying to load uboot
> from UEFI. Using the default qemu-x86_efi_payload64_defconfig we are getting
> "U-Boot EFI Payload 2002 No memory map" error code.
> As I can see in the code 2002 means (efi_stub.c):
>
> ret = boot->get_memory_map(, NULL, , _size, );
> if (ret != EFI_BUFFER_TOO_SMALL) {
> printhex2(BITS_PER_LONG);
> printhex2(ret);
> puts(" No memory map\n");
> while(1);
> return ret;
> }
>
> 0x20 -> BITS_PER_LONG 32bits
> 0x02 -> EFI_INVALID_PARAMETER
>
> 32bits sounds weird for me, so I changed config to use CONFIG_X86_RUN_64BIT
> instead of CONFIG_X86_RUN_32BIT. I have changed it and I got a compilation
> error:
>
> In file included from include/common.h:53:0,
> from cmd/efi.c:8:
> cmd/efi.c: In function 'do_efi_mem':
> ./arch/x86/include/asm/global_data.h:117:12: error: 'global_data_ptr'
> undeclared (first use in this function)
> #define gd global_data_ptr
>
>
> I have surfed in the code and I have found this in
> ./arch/x86/include/asm/global_data.h
>
> # if defined(CONFIG_EFI_APP) || CONFIG_IS_ENABLED(X86_64)
> /* TODO(s...@chromium.org): Consider using a fixed
> register for gd on x86_64 */
> #define gd global_data_ptr
>
> What do you mean with "Consider using a fixed register for gd" ?Can you help
> us to make this work? Are we in the correct direction?
>
The EFI 64-bit payload support is broken now. I will send a patch to
fix this soon.
Regards,
Bin
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Re: [U-Boot] [PATCH v2] xilinx: zynq: Add support to secure images
On 7.6.2018 09:28, Siva Durga Prasad Paladugu wrote:
> This patch basically adds two new commands for loadig secure
> images/bitstreams.
> 1. zynq rsa adds support to load secure image which can be both
>authenticated or encrypted or both authenticated and encrypted
>image in xilinx bootimage(BOOT.bin) format.
> 2. zynq aes command adds support to decrypted and load encrypted
>image either back to DDR or it can load an encrypted bitsream
>to PL directly by decrypting it. The image has to be encrypted
>using xilinx bootgen tool and to get only the encrypted
>image from tool use -split option while invoking bootgen.
>
> Signed-off-by: Siva Durga Prasad Paladugu
> ---
> Changes from v1:
> - Defined two config synbols for RSA and AES separately
> and used them wherever required.
> - Used U_BOOT_CMD_KENT as per comment
> - Cleared DEVCFG_CTRL_PCAP_RATE_EN_MASK once decryption is
> done.
>
> Changes from RFC:
> - Moved zynqaes to board/xilinx/zynq/cmds.c and renamed as
> "zynq aes".
> - Moved boot image parsing code to a separate file.
> - Squashed in to a single patch.
> - Fixed coding style comments.
> ---
> arch/arm/Kconfig | 1 +
> board/xilinx/zynq/Kconfig| 32 +++
> board/xilinx/zynq/Makefile | 5 +
> board/xilinx/zynq/bootimg.c | 143 +++
> board/xilinx/zynq/cmds.c | 556
> +++
> drivers/fpga/zynqpl.c| 67 ++
> include/u-boot/rsa-mod-exp.h | 4 +
> include/zynq_bootimg.h | 33 +++
> include/zynqpl.h | 5 +
> lib/rsa/rsa-mod-exp.c| 52
> 10 files changed, 898 insertions(+)
> create mode 100644 board/xilinx/zynq/Kconfig
> create mode 100644 board/xilinx/zynq/bootimg.c
> create mode 100644 board/xilinx/zynq/cmds.c
> create mode 100644 include/zynq_bootimg.h
>
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index 3e05f79..e78e1a4 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -1428,6 +1428,7 @@ source "board/toradex/colibri_pxa270/Kconfig"
> source "board/vscom/baltos/Kconfig"
> source "board/woodburn/Kconfig"
> source "board/work-microwave/work_92105/Kconfig"
> +source "board/xilinx/zynq/Kconfig"
> source "board/xilinx/zynqmp/Kconfig"
> source "board/zipitz2/Kconfig"
>
> diff --git a/board/xilinx/zynq/Kconfig b/board/xilinx/zynq/Kconfig
> new file mode 100644
> index 000..e665c8d
> --- /dev/null
> +++ b/board/xilinx/zynq/Kconfig
> @@ -0,0 +1,32 @@
> +# Copyright (c) 2018, Xilinx, Inc.
> +#
> +# SPDX-License-Identifier: GPL-2.0
> +
> +if ARCH_ZYNQ
> +
> +config CMD_ZYNQ
> + bool "Enable Zynq specific commands"
> + default y
> + help
> + Enables Zynq specific commands.
> +
> +config CMD_ZYNQ_AES
> + bool "Enable zynq aes command for decryption of encrypted images"
> + depends on CMD_ZYNQ
> + help
> + Decrypts the encrypted image present in source address
> + and places the decrypted image at destination address.
> +
> +config CMD_ZYNQ_RSA
> + bool "Enable zynq rsa command for loading secure images"
> + default y
> + depends on CMD_ZYNQ
> + select CMD_ZYNQ_AES
> + help
> + Enabling this will support zynq secure image verification.
> + The secure image is a xilinx specific BOOT.BIN with
> + either authentication or encryption or both encryption
> + and authentication feature enabled while generating
> + BOOT.BIN using Xilinx bootgen tool.
> +
> +endif
> diff --git a/board/xilinx/zynq/Makefile b/board/xilinx/zynq/Makefile
> index 5a76a26..f4996fa 100644
> --- a/board/xilinx/zynq/Makefile
> +++ b/board/xilinx/zynq/Makefile
> @@ -18,6 +18,11 @@ $(warning Put custom ps7_init_gpl.c/h to
> board/xilinx/zynq/custom_hw_platform/))
> endif
> endif
>
> +ifndef CONFIG_SPL_BUILD
> +obj-$(CONFIG_CMD_ZYNQ) += cmds.o
> +obj-$(CONFIG_CMD_ZYNQ_RSA) += bootimg.o
> +endif
> +
> obj-$(CONFIG_SPL_BUILD) += $(init-objs)
>
> # Suppress "warning: function declaration isn't a prototype"
> diff --git a/board/xilinx/zynq/bootimg.c b/board/xilinx/zynq/bootimg.c
> new file mode 100644
> index 000..b069e2b
> --- /dev/null
> +++ b/board/xilinx/zynq/bootimg.c
> @@ -0,0 +1,143 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright (C) 2018 Xilinx, Inc.
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +#define ZYNQ_IMAGE_PHDR_OFFSET 0x09C
> +#define ZYNQ_IMAGE_FSBL_LEN_OFFSET 0x040
> +#define ZYNQ_PART_HDR_CHKSUM_WORD_COUNT 0x0F
> +#define ZYNQ_PART_HDR_WORD_COUNT 0x10
> +#define ZYNQ_MAXIMUM_IMAGE_WORD_LEN 0x4000
> +#define MD5_CHECKSUM_SIZE16
> +
> +struct headerarray {
> + u32 fields[16];
> +};
> +
> +/*
> + * Check whether the given partition is last partition or not
> + */
> +static int zynq_islastpartition(struct headerarray *head)
> +{
> + int index;
> +
> + debug("%s\n", __func__);
> + if
[U-Boot] [RFC PATCH] fpga: zynq: Add encrypted bitstream support with auto detect
From: Stefan Herbrechtsmeier
Signed-off-by: Stefan Herbrechtsmeier
---
drivers/fpga/zynqpl.c | 73 ---
1 file changed, 57 insertions(+), 16 deletions(-)
diff --git a/drivers/fpga/zynqpl.c b/drivers/fpga/zynqpl.c
index fd37d18..6622750 100644
--- a/drivers/fpga/zynqpl.c
+++ b/drivers/fpga/zynqpl.c
@@ -17,6 +17,7 @@
#define DEVCFG_CTRL_PCFG_PROG_B0x4000
#define DEVCFG_CTRL_PCFG_AES_EFUSE_MASK0x1000
+#define DEVCFG_CTRL_PCAP_RATE_EN_MASK 0x0200
#define DEVCFG_ISR_FATAL_ERROR_MASK0x00740040
#define DEVCFG_ISR_ERROR_FLAGS_MASK0x00340840
#define DEVCFG_ISR_RX_FIFO_OV 0x0004
@@ -38,18 +39,16 @@
#define CONFIG_SYS_FPGA_PROG_TIME (CONFIG_SYS_HZ * 4) /* 4 s */
#endif
+#define NOP_WORD 0x2000
+#define CTRL0_WORD 0x3000a001
+#define MASK_WORD 0x3000c001
#define DUMMY_WORD 0x
+#define CTRL0_DEC_MASK BIT(6)
+
/* Xilinx binary format header */
+#define MAX_DUMMY_WORD_COUNT 8
static const u32 bin_format[] = {
- DUMMY_WORD, /* Dummy words */
- DUMMY_WORD,
- DUMMY_WORD,
- DUMMY_WORD,
- DUMMY_WORD,
- DUMMY_WORD,
- DUMMY_WORD,
- DUMMY_WORD,
0x00bb, /* Sync word */
0x11220044, /* Sync word */
DUMMY_WORD,
@@ -85,7 +84,23 @@ static u32 load_word(const void *buf, u32 swap)
return word;
}
-static u32 check_header(const void *buf)
+static void *skip_dummy_words(const void *buf)
+{
+ u32 *test = (u32 *)buf;
+ u32 i;
+
+ for (i = 0; i < MAX_DUMMY_WORD_COUNT; i++) {
+ if (load_word([i], SWAP_NO) != DUMMY_WORD) {
+ debug("%s: Found no dummy word at position %d/%x\n",
+ __func__, i, (u32)[i]);
+ return [i];
+ }
+ }
+
+ return [i];
+}
+
+static u32 check_header(const void *buf, bool *encrypted)
{
u32 i, pattern;
int swap = SWAP_NO;
@@ -93,6 +108,8 @@ static u32 check_header(const void *buf)
debug("%s: Let's check bitstream header\n", __func__);
+ test = (u32 *)skip_dummy_words(buf);
+
/* Checking that passing bin is not a bitstream */
for (i = 0; i < ARRAY_SIZE(bin_format); i++) {
pattern = load_word([i], swap);
@@ -112,18 +129,34 @@ static u32 check_header(const void *buf)
debug("%s: %d/%x: pattern %x/%x bin_format\n", __func__, i,
(u32)[i], pattern, bin_format[i]);
+
if (pattern != bin_format[i]) {
debug("%s: Bitstream is not recognized\n", __func__);
return 0;
}
}
- debug("%s: Found bitstream header at %x %s swapinng\n", __func__,
- (u32)buf, swap == SWAP_NO ? "without" : "with");
+
+ test = [i];
+
+ /* Checking if passing bin is an encrypted bitstream */
+ if ((load_word([0], swap) == NOP_WORD) &&
+ (load_word([1], swap) == MASK_WORD) &&
+ (load_word([2], swap) & CTRL0_DEC_MASK) &&
+ (load_word([3], swap) == CTRL0_WORD) &&
+ (load_word([4], swap) & CTRL0_DEC_MASK) &&
+ (load_word([5], swap) == NOP_WORD))
+ *encrypted = true;
+ else
+ *encrypted = false;
+
+ debug("%s: Found %sencrypted bitstream header at %x %s swapping\n",
+ __func__, *encrypted ? "" : "un", (u32)buf,
+ swap == SWAP_NO ? "without" : "with");
return swap;
}
-static void *check_data(u8 *buf, size_t bsize, u32 *swap)
+static void *check_data(u8 *buf, size_t bsize, u32 *swap, bool *encrypted)
{
u32 word, p = 0; /* possition */
@@ -136,7 +169,7 @@ static void *check_data(u8 *buf, size_t bsize, u32 *swap)
if (word == DUMMY_WORD) {
debug("%s: Found dummy word at position %x/%x\n",
__func__, p, (u32)[p]);
- *swap = check_header([p]);
+ *swap = check_header([p], encrypted);
if (*swap) {
/* FIXME add full bitstream checking here */
return [p];
@@ -191,7 +224,7 @@ static int zynq_dma_transfer(u32 srcbuf, u32 srclen, u32
dstbuf, u32 dstlen)
return FPGA_SUCCESS;
}
-static int zynq_dma_xfer_init(bitstream_type bstype)
+static int zynq_dma_xfer_init(bitstream_type bstype, bool encrypted)
{
u32 status, control, isr_status;
unsigned long ts;
@@ -291,6 +324,13 @@ static int zynq_dma_xfer_init(bitstream_type bstype)
writel(DEVCFG_STATUS_DMA_DONE_CNT_MASK, _base->status);
}
+ control = readl(_base->ctrl);
+ if (encrypted)
+ control |= DEVCFG_CTRL_PCAP_RATE_EN_MASK;
+ else
+ control &= ~DEVCFG_CTRL_PCAP_RATE_EN_MASK;
+ writel(control,
[U-Boot] [PATCH v2 3/4] arm: zynq: Add Nand flash mini u-boot configuration for zynq
Add configuration files/dtses for mini u-boot configuration
which runs on smaller footprint of memory. This configuration
has only required nand flash support.
Signed-off-by: Siva Durga Prasad Paladugu
---
Changes from v1:
- Update memory node as per comment
- Removed intc and fclk as per comment
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/zynq-cse-nand.dts | 80 +
configs/zynq_cse_nand_defconfig | 50 ++
3 files changed, 131 insertions(+)
create mode 100644 arch/arm/dts/zynq-cse-nand.dts
create mode 100644 configs/zynq_cse_nand_defconfig
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index a0349a8..71b7c3a 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -128,6 +128,7 @@ dtb-$(CONFIG_ARCH_UNIPHIER_SLD8) += \
dtb-$(CONFIG_ARCH_ZYNQ) += \
zynq-cc108.dtb \
+ zynq-cse-nand.dtb \
zynq-cse-qspi-single.dtb \
zynq-microzed.dtb \
zynq-picozed.dtb \
diff --git a/arch/arm/dts/zynq-cse-nand.dts b/arch/arm/dts/zynq-cse-nand.dts
new file mode 100644
index 000..9b1dd19
--- /dev/null
+++ b/arch/arm/dts/zynq-cse-nand.dts
@@ -0,0 +1,80 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Xilinx CSE NAND board DTS
+ *
+ * Copyright (C) 2018 Xilinx, Inc.
+ */
+/dts-v1/;
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ model = "Zynq CSE NAND Board";
+ compatible = "xlnx,zynq-cse-nand", "xlnx,zynq-7000";
+
+ aliases {
+ serial0 =
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x40>;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ dcc: dcc {
+ compatible = "arm,dcc";
+ status = "disabled";
+ u-boot,dm-pre-reloc;
+ };
+
+ amba: amba {
+ u-boot,dm-pre-reloc;
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ slcr: slcr@f800 {
+ u-boot,dm-pre-reloc;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "xlnx,zynq-slcr", "syscon", "simple-bus";
+ reg = <0xF800 0x1000>;
+ ranges;
+ clkc: clkc@100 {
+ u-boot,dm-pre-reloc;
+ #clock-cells = <1>;
+ compatible = "xlnx,ps7-clkc";
+ clock-output-names = "armpll", "ddrpll",
+ "iopll", "cpu_6or4x",
+ "cpu_3or2x", "cpu_2x", "cpu_1x",
+ "ddr2x", "ddr3x", "dci",
+ "lqspi", "smc", "pcap", "gem0",
+ "gem1", "fclk0", "fclk1",
+ "fclk2", "fclk3", "can0",
+ "can1", "sdio0", "sdio1",
+ "uart0", "uart1", "spi0",
+ "spi1", "dma", "usb0_aper",
+ "usb1_aper", "gem0_aper",
+ "gem1_aper", "sdio0_aper",
+ "sdio1_aper", "spi0_aper",
+ "spi1_aper", "can0_aper",
+ "can1_aper", "i2c0_aper",
+ "i2c1_aper", "uart0_aper",
+ "uart1_aper", "gpio_aper",
+ "lqspi_aper", "smc_aper",
+ "swdt", "dbg_trc", "dbg_apb";
+ reg = <0x100 0x100>;
+ };
+ };
+ };
+
+};
+
+ {
+ status = "okay";
+};
diff --git a/configs/zynq_cse_nand_defconfig b/configs/zynq_cse_nand_defconfig
new file mode 100644
index 000..7c7e143
--- /dev/null
+++ b/configs/zynq_cse_nand_defconfig
@@ -0,0 +1,50 @@
+CONFIG_ARM=y
+CONFIG_SYS_CONFIG_NAME="zynq_cse"
+CONFIG_ARCH_ZYNQ=y
+CONFIG_SYS_TEXT_BASE=0x10
+CONFIG_SPL_STACK_R_ADDR=0x20
+CONFIG_SYS_MALLOC_LEN=0x2
+CONFIG_DEFAULT_DEVICE_TREE="zynq-cse-nand"
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_SPL=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SYS_PROMPT="Zynq> "
+# CONFIG_CMD_BDI is not set
+# CONFIG_CMD_CONSOLE is not set
+# CONFIG_CMD_BOOTD is not set
+# CONFIG_CMD_BOOTM is not set
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_FDT is not set
+# CONFIG_CMD_GO is not set
+# CONFIG_CMD_RUN is not set
+# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_XIMG is
[U-Boot] [PATCH v2 2/4] arm: zynq: Dont define SDRAM_BASE and SDRAM_SIZE in .h
Remove the SDRAM_BASE nad SDRAM_SIZE as it can now get these details from DT. Signed-off-by: Siva Durga Prasad Paladugu --- Changes from v1: - Removed commit reference from description as per comment --- include/configs/zynq_cse.h | 3 --- 1 file changed, 3 deletions(-) diff --git a/include/configs/zynq_cse.h b/include/configs/zynq_cse.h index 2f5843f..adc02f0 100644 --- a/include/configs/zynq_cse.h +++ b/include/configs/zynq_cse.h @@ -41,7 +41,4 @@ #undef CONFIG_SYS_MALLOC_LEN #define CONFIG_SYS_MALLOC_LEN 0x1000 -#define CONFIG_SYS_SDRAM_BASE 0xfffc -#define CONFIG_SYS_SDRAM_SIZE 0x4 - #endif /* __CONFIG_ZYNQ_CSE_H */ -- 2.7.4 This email and any attachments are intended for the sole use of the named recipient(s) and contain(s) confidential information that may be proprietary, privileged or copyrighted under applicable law. If you are not the intended recipient, do not read, copy, or forward this email message or any attachments. Delete this email message and any attachments immediately. ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v2 4/4] arm: zynq: Add parallel NOR flash mini u-boot configuration for zynq
Add configuration files/dtses for mini u-boot configuration
which runs on smaller footprint OCM memory. This configuration
only has required parallel nor flash support.
Signed-off-by: Siva Durga Prasad Paladugu
---
Changes from v1:
- None
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/zynq-cse-nor.dts | 88 ++
configs/zynq_cse_nor_defconfig | 50
3 files changed, 139 insertions(+)
create mode 100644 arch/arm/dts/zynq-cse-nor.dts
create mode 100644 configs/zynq_cse_nor_defconfig
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 71b7c3a..9e29fe6 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -129,6 +129,7 @@ dtb-$(CONFIG_ARCH_UNIPHIER_SLD8) += \
dtb-$(CONFIG_ARCH_ZYNQ) += \
zynq-cc108.dtb \
zynq-cse-nand.dtb \
+ zynq-cse-nor.dtb \
zynq-cse-qspi-single.dtb \
zynq-microzed.dtb \
zynq-picozed.dtb \
diff --git a/arch/arm/dts/zynq-cse-nor.dts b/arch/arm/dts/zynq-cse-nor.dts
new file mode 100644
index 000..ba6f9a1
--- /dev/null
+++ b/arch/arm/dts/zynq-cse-nor.dts
@@ -0,0 +1,88 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Xilinx CSE NOR board DTS
+ *
+ * Copyright (C) 2018 Xilinx, Inc.
+ */
+/dts-v1/;
+#include "zynq-7000.dtsi"
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ model = "Zynq CSE NOR Board";
+ compatible = "xlnx,zynq-cse-nor", "xlnx,zynq-7000";
+
+ aliases {
+ serial0 =
+ };
+
+ memory@fffc {
+ device_type = "memory";
+ reg = <0xFFFC 0x4>;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ dcc: dcc {
+ compatible = "arm,dcc";
+ status = "disabled";
+ u-boot,dm-pre-reloc;
+ };
+
+ amba: amba {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ interrupt-parent = <>;
+ ranges;
+
+ intc: interrupt-controller@f8f01000 {
+ compatible = "arm,cortex-a9-gic";
+ #interrupt-cells = <3>;
+ interrupt-controller;
+ reg = <0xF8F01000 0x1000>,
+ <0xF8F00100 0x100>;
+ };
+
+ slcr: slcr@f800 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "xlnx,zynq-slcr", "syscon", "simple-bus";
+ reg = <0xF800 0x1000>;
+ ranges;
+ clkc: clkc@100 {
+ #clock-cells = <1>;
+ compatible = "xlnx,ps7-clkc";
+ fclk-enable = <0xf>;
+ clock-output-names = "armpll", "ddrpll",
+ "iopll", "cpu_6or4x",
+ "cpu_3or2x", "cpu_2x", "cpu_1x",
+ "ddr2x", "ddr3x", "dci",
+ "lqspi", "smc", "pcap", "gem0",
+ "gem1", "fclk0", "fclk1",
+ "fclk2", "fclk3", "can0",
+ "can1", "sdio0", "sdio1",
+ "uart0", "uart1", "spi0",
+ "spi1", "dma", "usb0_aper",
+ "usb1_aper", "gem0_aper",
+ "gem1_aper", "sdio0_aper",
+ "sdio1_aper", "spi0_aper",
+ "spi1_aper", "can0_aper",
+ "can1_aper", "i2c0_aper",
+ "i2c1_aper", "uart0_aper",
+ "uart1_aper", "gpio_aper",
+ "lqspi_aper", "smc_aper",
+ "swdt", "dbg_trc", "dbg_apb";
+ reg = <0x100 0x100>;
+ };
+ };
+ };
+
+};
+
+ {
+ status = "okay";
+};
diff --git a/configs/zynq_cse_nor_defconfig b/configs/zynq_cse_nor_defconfig
new file mode 100644
index 000..842d520
--- /dev/null
+++ b/configs/zynq_cse_nor_defconfig
@@ -0,0 +1,50 @@
+CONFIG_ARM=y
+CONFIG_SYS_CONFIG_NAME="zynq_cse"
+CONFIG_ARCH_ZYNQ=y
+CONFIG_SYS_TEXT_BASE=0xFFFC
+CONFIG_SPL_STACK_R_ADDR=0x20
+CONFIG_SYS_MALLOC_LEN=0x1000
+CONFIG_ZYNQ_M29EW_WB_HACK=y
+CONFIG_DEFAULT_DEVICE_TREE="zynq-cse-nor"
+CONFIG_BOOTDELAY=-1
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_SPL=y
[U-Boot] [PATCH v2 1/4] lib: fdtdec: Fill initial ram top with DDR start value from dt
Fill initial ram top with DDR base addr value from DT as not filling
it here always assumes it as zero while calculating relocation
offset and hence lead to failures in somecases. This will assumed
as zero if CONFIG_SYS_SDRAM_BASE is not defined.
Signed-off-by: Siva Durga Prasad Paladugu
Signed-off-by: Michal Simek
---
Changes from v1:
- None
---
lib/fdtdec.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index f4e8dbf..34ef9b8 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -1172,6 +1172,7 @@ int fdtdec_setup_memory_size(void)
}
gd->ram_size = (phys_size_t)(res.end - res.start + 1);
+ gd->ram_top = (unsigned long)res.start;
debug("%s: Initial DRAM size %llx\n", __func__,
(unsigned long long)gd->ram_size);
--
2.7.4
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Delete this email message and any attachments immediately.
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[U-Boot] [PATCH] arm: zynq: Add missing watchdog header
Add missing header detected by sparse. Signed-off-by: Michal Simek --- board/xilinx/zynq/board.c | 1 + 1 file changed, 1 insertion(+) diff --git a/board/xilinx/zynq/board.c b/board/xilinx/zynq/board.c index e4f86d187a73..1106f5c2a892 100644 --- a/board/xilinx/zynq/board.c +++ b/board/xilinx/zynq/board.c @@ -9,6 +9,7 @@ #include #include #include +#include #include #include #include -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot, UNTESTED] ARM: orion5x: fix use of callee-saved registers in lowloevel_init
On Mon, May 07, 2018 at 11:10:47AM +0100, Mans Rullgard wrote: > The lowlevel_init function uses r4 and r6 without preserving their > values as required by the AAPCS. Use r0 and r2 instead as these > are call-clobbered. > > Signed-off-by: Mans Rullgard > Reviewed-by: Chris Packham Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH] ARC: Import entire libgcc from GCC 8.1.0
On Thu, Jun 07, 2018 at 08:31:49PM +0300, Alexey Brodkin wrote: > Some background on private libgcc on ARC first. > > The whole point of having private libgcc in U-Boot is to be > toolchain agnostic. I.e. have an ability to use any more or less > up-to-date ARC GNU tools for building U-Boot for any platform with > ARC core. > > As of today we have at least 6 (sic!) flavors of GNU toolchains for ARC. > 1. Little-endian multilib Elf32 > 2. Big-endian multilib Elf32 > 3. Little-endian uClibc for ARC700 (ARCompact or ARCv1 ISA) > 4. Big-endian uClibc for ARC700 > 5. Little-endian uClibc for ARC HS (ARCv2 ISA) > 6. Big-endian uClibc for ARC HS > > In foreseeable future we'll have multilib Linux toolchain so > we'll cut number of tools down to 4. Anyways... > > In general we don't need Linux toolchain for building U-Boot and since > Elf32 GNU tools have libs for most of "standard" ARC core templates [1] > it might be a good toolchain for U-Boot. But: > 1. Still big-/little-endian platforms require different tools > 2. Developers need to have Linux toolchain for user-space stuff > because of C-library > 3. People tend to build more Linux tools, like Linux kernel crootools > > So it looks like multilib Linux toolchain might be a bit more convenient > option, at least it addresses (2) and (3) from above, i.e. we'll only > need to deal with big-/little-endian story and that should be fine as > not that many developers in the world play simultaneously with platforms > of both types. > > But no! Linux multilib toolchain will only be built for very limited > list of mcpu's [2]. Basically only "arc700" and "archs" (with few > flavors for HS38 templates). That's because only those cores are capable > of running Linux and uClibc/glibc couldn't be built for others. I.e. all > the simpler cores where U-Boot could be perfectly used [and in fact is > used more and more] won't have libgcc pre-built as the part of the > toolchain. > > And really ultimate solution is to build libgcc as a part of U-Boot and > have no external dependencies. That's something that we used to do for > quite some time [3] with limited amount of functions really required by > existing platforms. But with addition of more platforms like those with > missing multiplier (MPY and friends) we need to have more libgcc > functions and to make things simple and at the same time very optimal > we're importing entire libgcc for ARC from latest stable GCC (8.1.0 as of > today). > > [1] > https://github.com/gcc-mirror/gcc/blob/master/gcc/config/arc/t-multilib#L24 > [2] > https://github.com/gcc-mirror/gcc/blob/master/gcc/config/arc/t-multilib-linux#L19 > [3] > http://git.denx.de/?p=u-boot.git;a=commit;h=a67ef280f46803e319639f5380ff8da6c6b7fbe7 > > Signed-off-by: Alexey Brodkin > --- > > Since that's an import from GCC I intentionally didn't do any changes > to imported files. And that means checkpatch.pl is pretty unhappy. > In particular because: > 1. SPDX license header is missing > 2. Some identation made with spaces > 3. Spaces are missing in code or there're more than needed > 4. A couple of "#if 0" > etc etc. > > And that poses a question: what is mandatory to be fixed and what not? > > 1. I guess SPDX license header MUST be inserted, right? Yes. And this is what we've done for other GCC imports as well btw. > 2. All the rest I'd really like to keep as it is now to simplify > subsequent updates of newer libgcc versions. Yes, leaving the style otherwise non-matching is OK. -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot, 3/3] cmd: add missing line breaks for pr_err()
On Mon, Jun 04, 2018 at 04:04:51PM +0900, Seung-Woo Kim wrote:
> After the commit 9b643e312d52 ("treewide: replace with error() with
> pr_err()"), there are some pr_err() with no line break. Add missing
> line breaks.
>
> Signed-off-by: Seung-Woo Kim
Applied to u-boot/master, thanks!
--
Tom
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Re: [U-Boot] [U-Boot, v4, 3/6] common: iotrace: add timestamp to iotrace records
On Wed, May 30, 2018 at 11:09:59PM +0300, Ramon Fried wrote: > Add timestamp to each iotrace record to aid in debugging > of IO timing access bugs. > > Signed-off-by: Ramon Fried > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] script: Make get_default_envs.sh script exclude tools/env
On Mon, Jun 04, 2018 at 01:25:04PM +0900, Seung-Woo Kim wrote: > If building envtools, there is env directory in tools directory. > Mafe the get_default_envs.sh script exclude tools/env directory. > > Signed-off-by: Seung-Woo Kim Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot, 2/3] board: samsung: add missing line breaks for pr_err()
On Mon, Jun 04, 2018 at 04:03:05PM +0900, Seung-Woo Kim wrote:
> After the commit 9b643e312d52 ("treewide: replace with error() with
> pr_err()"), there are some pr_err() with no line break. Add missing
> line breaks.
>
> Signed-off-by: Seung-Woo Kim
> Reviewed-by: Minkyu Kang
Applied to u-boot/master, thanks!
--
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Re: [U-Boot] [U-Boot, PATCHv2] block: Have BLOCK_CACHE default to y in some cases
On Tue, May 22, 2018 at 12:24:16PM -0400, Tom Rini wrote: > When dealing with filesystems that come from block devices we can get a > noticeable performance gain in some use cases from having the block > cache enabled. The code paths are valid in other cases when we have BLK > set and may provide wins in raw reads in some use cases, so have this be > default when BLK is enabled. > > Signed-off-by: Tom Rini Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot,v3] bug.h: introduce WARN_ONCE
On Wed, Jun 06, 2018 at 12:38:59AM +0300, Ramon Fried wrote: > Add WARN_ONCE definition to allow single time notification > of warnings to the user. > Taken from Linux kernel (4.17) with slight changes > (Removed __section(.data.once)) > > Signed-off-by: Ramon Fried Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot, v4, 4/6] iotrace: move record definitons to header file
On Wed, May 30, 2018 at 11:10:00PM +0300, Ramon Fried wrote: > The header definitions are needed for reading > record information in cmd/iotrace.c > > Signed-off-by: Ramon Fried > Reviewed-by: Simon Glass This change ends up breaking a number of platforms including k2l_hs_evm in a very odd way. -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot,v4,2/6] iotrace: add IO region limit
On Wed, May 30, 2018 at 11:09:58PM +0300, Ramon Fried wrote: > When dealing with a lot of IO regions, sometimes > it makes sense only to trace a specific one. > This patch adds support for region limits. > If region is not set, the iotrace works the same as it was. > If region is set, the iotrace only logs io operation that falls > in the defined region. > > Signed-off-by: Ramon Fried > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot,v4,1/6] cmd: iotrace: add set region command
On Wed, May 30, 2018 at 11:09:57PM +0300, Ramon Fried wrote: > Signed-off-by: Ramon Fried > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] fit: Enable fitImage by default if OF_LIBFDT is enabled
On Wed, May 23, 2018 at 12:49:56AM +0200, Marek Vasut wrote: > Enable fitImage by default on systems which already use libfdt. > The fitImage has many benefits over zImage and supersedes legacy > uImage, so enable it by default where possible to make it widely > available. > > Signed-off-by: Marek Vasut > Cc: Maxime Ripard > Cc: Michal Simek > Cc: Tom Rini > --- > NOTE: And make my life easier, so that every contemporary board I > look at supports a civilized contemporary boot image format > and I don't have to mess around to find the right combo of > zImage or uImage and DTB and the right load addresses and > keep loading gazilion of files every time I boot a board. You need to run this through travis or otherwise build the world. A number of platforms fail due to size constraints and a few others (snow for example) fail for other reasons. Thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot,v4,5/6] cmd: iotrace: add dump trace command
On Wed, May 30, 2018 at 11:10:01PM +0300, Ramon Fried wrote:
> Add dump trace command which dump all trace
> buffer content in a much more readable fashion
> than md.
>
> Signed-off-by: Ramon Fried
> Reviewed-by: Simon Glass
> ---
>
> Changes in v4: None
> Changes in v3: None
> Changes in v2: None
> Changes in v1: None
>
> cmd/iotrace.c | 36 +++-
> 1 file changed, 35 insertions(+), 1 deletion(-)
>
> diff --git a/cmd/iotrace.c b/cmd/iotrace.c
> index 601b8c8e32..f50a3c3a1a 100644
> --- a/cmd/iotrace.c
> +++ b/cmd/iotrace.c
> @@ -24,6 +24,36 @@ static void do_print_stats(void)
> printf("CRC32: %08lx\n", (ulong)iotrace_get_checksum());
> }
>
> +static void do_print_trace(void)
> +{
> + ulong start, size, offset, count;
> +
> + struct iotrace_record *cur_record;
> +
> + iotrace_get_buffer(, , , );
> +
> + if (!start || !size || !count)
> + return;
> +
> + printf("Timestamp Value Address\n");
> +
> + cur_record = (struct iotrace_record *)start;
> + for (int i = 0; i < count; i++) {
> + if (cur_record->flags & IOT_WRITE)
> + printf("%08llu: 0x%08lx --> 0x%08lx\n",
> +cur_record->timestamp,
> + cur_record->value,
> + cur_record->addr);
> + else
> + printf("%08llu: 0x%08lx <-- 0x%08lx\n",
> +cur_record->timestamp,
> + cur_record->value,
> + cur_record->addr);
> +
> + cur_record++;
> + }
> +}
This isn't portable. If you build for sandbox64:
cmd/iotrace.c: In function ‘do_print_trace’:
cmd/iotrace.c:44:11: warning: format ‘%lx’ expects argument of type ‘long
unsigned int’, but argument 4 has type ‘phys_addr_t {aka unsigned int}’
[-Wformat=]
printf("%08llu: 0x%08lx --> 0x%08lx\n",
^
cmd/iotrace.c:49:11: warning: format ‘%lx’ expects argument of type ‘long
unsigned int’, but argument 4 has type ‘phys_addr_t {aka unsigned int}’
[-Wformat=]
printf("%08llu: 0x%08lx <-- 0x%08lx\n",
^
t
Also, as-is, with clang-7:
u-boot/cmd/iotrace.c:47:6: warning: format specifies type 'unsigned long' but
the argument has type 'phys_addr_t' (aka 'unsigned int') [-Wformat]
cur_record->addr);
^~~~
cmd/iotrace.c:52:6: warning: format specifies type 'unsigned long' but the
argument has type 'phys_addr_t' (aka 'unsigned int') [-Wformat]
cur_record->addr);
^~~~
--
Tom
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[U-Boot] [PATCH 2/2] dra76: fix HDMI HPD pinmux
The pin used for HDMI HPD should be set to GPIO mode on DRA76, similarly
to all the other DRA7 and AM5 SoCs.
Signed-off-by: Tomi Valkeinen
---
board/ti/dra7xx/mux_data.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/ti/dra7xx/mux_data.h b/board/ti/dra7xx/mux_data.h
index 7624152afb..f1f6bd5316 100644
--- a/board/ti/dra7xx/mux_data.h
+++ b/board/ti/dra7xx/mux_data.h
@@ -858,7 +858,7 @@ const struct pad_conf_entry dra76x_core_padconf_array[] = {
{SPI1_D1, (M0 | PIN_INPUT_PULLDOWN)}, /* spi1_d1.spi1_d1 */
{SPI1_D0, (M0 | PIN_INPUT_PULLDOWN)}, /* spi1_d0.spi1_d0 */
{SPI1_CS0, (M0 | PIN_INPUT_PULLUP)},/* spi1_cs0.spi1_cs0 */
- {SPI1_CS2, (M6 | 0x000f)}, /* spi1_cs2.hdmi1_hpd */
+ {SPI1_CS2, (M14 | PIN_INPUT_PULLDOWN)}, /* spi1_cs2.gpio7_12 */
{SPI1_CS3, (M6 | PIN_INPUT | SLEWCONTROL)}, /* spi1_cs3.hdmi1_cec */
{SPI2_SCLK, (M1 | PIN_INPUT_PULLDOWN)}, /* spi2_sclk.uart3_rxd */
{SPI2_D1, (M1 | PIN_INPUT_SLEW)}, /* spi2_d1.uart3_txd */
--
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
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[U-Boot] [PATCH 1/2] dra7/am5: remove CEC pin pull-up
HDMI CEC pins are set to pull-up, but CEC requires no pull. Fix this.
Signed-off-by: Tomi Valkeinen
---
board/ti/am57xx/mux_data.h | 6 +++---
board/ti/dra7xx/mux_data.h | 8
2 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/board/ti/am57xx/mux_data.h b/board/ti/am57xx/mux_data.h
index 4deaddc914..d4a15ae93d 100644
--- a/board/ti/am57xx/mux_data.h
+++ b/board/ti/am57xx/mux_data.h
@@ -196,7 +196,7 @@ const struct pad_conf_entry
core_padconf_array_essential_x15[] = {
{SPI1_CS0, (M14 | PIN_INPUT)}, /* spi1_cs0.gpio7_10 */
{SPI1_CS1, (M14 | PIN_INPUT)}, /* spi1_cs1.gpio7_11 */
{SPI1_CS2, (M14 | PIN_INPUT_SLEW)}, /* spi1_cs2.gpio7_12 */
- {SPI1_CS3, (M6 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /*
spi1_cs3.hdmi1_cec */
+ {SPI1_CS3, (M6 | PIN_INPUT | SLEWCONTROL)}, /* spi1_cs3.hdmi1_cec */
{SPI2_SCLK, (M14 | PIN_INPUT_PULLDOWN)},/* spi2_sclk.gpio7_14 */
{SPI2_D1, (M14 | PIN_INPUT_SLEW)}, /* spi2_d1.gpio7_15 */
{SPI2_D0, (M14 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /*
spi2_d0.gpio7_16 */
@@ -481,7 +481,7 @@ const struct pad_conf_entry
core_padconf_array_essential_am574x_idk[] = {
{SPI1_CS0, (M14 | PIN_OUTPUT)}, /* spi1_cs0.gpio7_10 */
{SPI1_CS1, (M14 | PIN_OUTPUT)}, /* spi1_cs1.gpio7_11 */
{SPI1_CS2, (M14 | PIN_INPUT_SLEW)}, /* spi1_cs2.gpio7_12 */
- {SPI1_CS3, (M6 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /*
spi1_cs3.hdmi1_cec */
+ {SPI1_CS3, (M6 | PIN_INPUT | SLEWCONTROL)}, /* spi1_cs3.hdmi1_cec */
{SPI2_SCLK, (M0 | PIN_INPUT)}, /* spi2_sclk.spi2_sclk */
{SPI2_D1, (M0 | PIN_INPUT | SLEWCONTROL)}, /* spi2_d1.spi2_d1 */
{SPI2_D0, (M0 | PIN_INPUT | SLEWCONTROL)}, /* spi2_d0.spi2_d0 */
@@ -701,7 +701,7 @@ const struct pad_conf_entry
core_padconf_array_essential_am572x_idk[] = {
{SPI1_CS0, (M14 | PIN_OUTPUT)}, /* spi1_cs0.gpio7_10 */
{SPI1_CS1, (M14 | PIN_OUTPUT)}, /* spi1_cs1.gpio7_11 */
{SPI1_CS2, (M14 | PIN_INPUT_SLEW)}, /* spi1_cs2.gpio7_12 */
- {SPI1_CS3, (M6 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /*
spi1_cs3.hdmi1_cec */
+ {SPI1_CS3, (M6 | PIN_INPUT | SLEWCONTROL)}, /* spi1_cs3.hdmi1_cec */
{SPI2_SCLK, (M0 | PIN_INPUT)}, /* spi2_sclk.spi2_sclk */
{SPI2_D1, (M0 | PIN_INPUT | SLEWCONTROL)}, /* spi2_d1.spi2_d1 */
{SPI2_D0, (M0 | PIN_INPUT | SLEWCONTROL)}, /* spi2_d0.spi2_d0 */
diff --git a/board/ti/dra7xx/mux_data.h b/board/ti/dra7xx/mux_data.h
index 72355e801b..7624152afb 100644
--- a/board/ti/dra7xx/mux_data.h
+++ b/board/ti/dra7xx/mux_data.h
@@ -139,7 +139,7 @@ const struct pad_conf_entry
dra72x_core_padconf_array_common[] = {
{SPI1_CS0, (M0 | PIN_INPUT_PULLUP)},/* spi1_cs0.spi1_cs0 */
{SPI1_CS1, (M14 | PIN_OUTPUT)}, /* spi1_cs1.gpio7_11 */
{SPI1_CS2, (M14 | PIN_INPUT_PULLDOWN)}, /* spi1_cs2.gpio7_12 */
- {SPI1_CS3, (M6 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /*
spi1_cs3.hdmi1_cec */
+ {SPI1_CS3, (M6 | PIN_INPUT | SLEWCONTROL)}, /* spi1_cs3.hdmi1_cec */
{SPI2_SCLK, (M1 | PIN_INPUT_PULLDOWN)}, /* spi2_sclk.uart3_rxd */
{SPI2_D1, (M1 | PIN_INPUT_SLEW)}, /* spi2_d1.uart3_txd */
{SPI2_D0, (M1 | PIN_INPUT_SLEW)}, /* spi2_d0.uart3_ctsn */
@@ -349,7 +349,7 @@ const struct pad_conf_entry dra71x_core_padconf_array[] = {
{SPI1_CS0, (M0 | PIN_INPUT_PULLUP)},/* spi1_cs0.spi1_cs0 */
{SPI1_CS1, (M14 | PIN_INPUT_PULLUP)}, /* spi1_cs1.gpio7_11 */
{SPI1_CS2, (M14 | PIN_INPUT_PULLDOWN)}, /* spi1_cs2.gpio7_12 */
- {SPI1_CS3, (M6 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /*
spi1_cs3.hdmi1_cec */
+ {SPI1_CS3, (M6 | PIN_INPUT | SLEWCONTROL)}, /* spi1_cs3.hdmi1_cec */
{SPI2_SCLK, (M1 | PIN_INPUT_PULLDOWN)}, /* spi2_sclk.uart3_rxd */
{SPI2_D1, (M1 | PIN_INPUT_SLEW)}, /* spi2_d1.uart3_txd */
{SPI2_D0, (M1 | PIN_INPUT_SLEW)}, /* spi2_d0.uart3_ctsn */
@@ -673,7 +673,7 @@ const struct pad_conf_entry dra74x_core_padconf_array[] = {
{SPI1_CS0, (M0 | PIN_INPUT_PULLUP)},/* spi1_cs0.spi1_cs0 */
{SPI1_CS1, (M14 | PIN_OUTPUT)}, /* spi1_cs1.gpio7_11 */
{SPI1_CS2, (M14 | PIN_INPUT_PULLDOWN)}, /* spi1_cs2.gpio7_12 */
- {SPI1_CS3, (M6 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /*
spi1_cs3.hdmi1_cec */
+ {SPI1_CS3, (M6 | PIN_INPUT | SLEWCONTROL)}, /* spi1_cs3.hdmi1_cec */
{SPI2_SCLK, (M1 | PIN_INPUT_PULLDOWN)}, /* spi2_sclk.uart3_rxd */
{SPI2_D1, (M1 | PIN_INPUT_SLEW)}, /* spi2_d1.uart3_txd */
{SPI2_D0, (M1 | PIN_INPUT_SLEW)}, /* spi2_d0.uart3_ctsn */
@@ -859,7 +859,7 @@ const struct pad_conf_entry dra76x_core_padconf_array[] = {
{SPI1_D0, (M0 | PIN_INPUT_PULLDOWN)}, /* spi1_d0.spi1_d0 */
{SPI1_CS0, (M0 | PIN_INPUT_PULLUP)},/* spi1_cs0.spi1_cs0 */
{SPI1_CS2, (M6 | 0x000f)}, /* spi1_cs2.hdmi1_hpd */
[U-Boot] [PATCH RESEND 2/2] rockchip: make_fit_atf: make python3 compatible
Make script python3 compatible. No functional changes intended.
Signed-off-by: Mian Yousaf Kaukab
---
arch/arm/mach-rockchip/make_fit_atf.py | 89 +-
1 file changed, 45 insertions(+), 44 deletions(-)
diff --git a/arch/arm/mach-rockchip/make_fit_atf.py
b/arch/arm/mach-rockchip/make_fit_atf.py
index b88a5e1f16..d72a364ff1 100755
--- a/arch/arm/mach-rockchip/make_fit_atf.py
+++ b/arch/arm/mach-rockchip/make_fit_atf.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python2
+#!/usr/bin/env python
"""
A script to generate FIT image source for rockchip boards
with ARM Trusted Firmware
@@ -43,6 +43,7 @@ DT_HEADER="""// SPDX-License-Identifier: GPL-2.0+ OR X11
compression = "none";
load = <0x%08x>;
};
+
"""
DT_IMAGES_NODE_END="""
@@ -58,18 +59,18 @@ def append_atf_node(file, atf_index, phy_addr, elf_entry):
Append ATF DT node to input FIT dts file.
"""
data = 'bl31_0x%08x.bin' % phy_addr
-print >> file, '\t\tatf@%d {' % atf_index
-print >> file, '\t\t\tdescription = \"ARM Trusted Firmware\";'
-print >> file, '\t\t\tdata = /incbin/("%s");' % data
-print >> file, '\t\t\ttype = "firmware";'
-print >> file, '\t\t\tarch = "arm64";'
-print >> file, '\t\t\tos = "arm-trusted-firmware";'
-print >> file, '\t\t\tcompression = "none";'
-print >> file, '\t\t\tload = <0x%08x>;' % phy_addr
+file.write('\t\tatf@%d {\n' % atf_index)
+file.write('\t\t\tdescription = \"ARM Trusted Firmware\";\n')
+file.write('\t\t\tdata = /incbin/("%s");\n' % data)
+file.write('\t\t\ttype = "firmware";\n')
+file.write('\t\t\tarch = "arm64";\n')
+file.write('\t\t\tos = "arm-trusted-firmware";\n')
+file.write('\t\t\tcompression = "none";\n')
+file.write('\t\t\tload = <0x%08x>;\n' % phy_addr)
if atf_index == 1:
-print >> file, '\t\t\tentry = <0x%08x>;' % elf_entry
-print >> file, '\t\t};'
-print >> file, ''
+file.write('\t\t\tentry = <0x%08x>;\n' % elf_entry)
+file.write('\t\t};\n')
+file.write('\n')
def append_fdt_node(file, dtbs):
"""
@@ -78,43 +79,43 @@ def append_fdt_node(file, dtbs):
cnt = 1
for dtb in dtbs:
dtname = os.path.basename(dtb)
-print >> file, '\t\tfdt@%d {' % cnt
-print >> file, '\t\t\tdescription = "%s";' % dtname
-print >> file, '\t\t\tdata = /incbin/("%s");' % dtb
-print >> file, '\t\t\ttype = "flat_dt";'
-print >> file, '\t\t\tcompression = "none";'
-print >> file, '\t\t};'
-print >> file, ''
+file.write('\t\tfdt@%d {\n' % cnt)
+file.write('\t\t\tdescription = "%s";\n' % dtname)
+file.write('\t\t\tdata = /incbin/("%s");\n' % dtb)
+file.write('\t\t\ttype = "flat_dt";\n')
+file.write('\t\t\tcompression = "none";\n')
+file.write('\t\t};\n')
+file.write('\n')
cnt = cnt + 1
def append_conf_section(file, cnt, dtname, atf_cnt):
-print >> file, '\t\tconfig@%d {' % cnt
-print >> file, '\t\t\tdescription = "%s";' % dtname
-print >> file, '\t\t\tfirmware = "atf@1";'
-print >> file, '\t\t\tloadables = "uboot@1",',
+file.write('\t\tconfig@%d {\n' % cnt)
+file.write('\t\t\tdescription = "%s";\n' % dtname)
+file.write('\t\t\tfirmware = "atf@1";\n')
+file.write('\t\t\tloadables = "uboot@1",')
for i in range(1, atf_cnt):
-print >> file, '"atf@%d"' % (i+1),
+file.write('"atf@%d"' % (i+1))
if i != (atf_cnt - 1):
-print >> file, ',',
+file.write(',')
else:
-print >> file, ';'
-print >> file, '\t\t\tfdt = "fdt@1";'
-print >> file, '\t\t};'
-print >> file, ''
+file.write(';\n')
+file.write('\t\t\tfdt = "fdt@1";\n')
+file.write('\t\t};\n')
+file.write('\n')
def append_conf_node(file, dtbs, atf_cnt):
"""
Append configeration nodes.
"""
cnt = 1
-print >> file, '\tconfigurations {'
-print >> file, '\t\tdefault = "config@1";'
+file.write('\tconfigurations {\n')
+file.write('\t\tdefault = "config@1";\n')
for dtb in dtbs:
dtname = os.path.basename(dtb)
append_conf_section(file, cnt, dtname, atf_cnt)
cnt = cnt + 1
-print >> file, '\t};'
-print >> file, ''
+file.write('\t};\n')
+file.write('\n')
def generate_atf_fit_dts(fit_file_name, bl31_file_name, uboot_file_name,
dtbs_file_name):
"""
@@ -127,7 +128,7 @@ def generate_atf_fit_dts(fit_file_name, bl31_file_name,
uboot_file_name, dtbs_fi
num_load_seg = 0
p_paddr = 0x
-with open(uboot_file_name) as uboot_file:
+with open(uboot_file_name, 'rb') as uboot_file:
uboot = ELFFile(uboot_file)
for i in range(uboot.num_segments()):
seg = uboot.get_segment(i)
@@ -137,9 +138,9 @@ def generate_atf_fit_dts(fit_file_name, bl31_file_name,
uboot_file_name, dtbs_fi
assert
[U-Boot] [PATCH RESEND 1/2] rockchip: make_fit_atf: use elf entry point
make_fit_atf.py uses physical address of first segment as the
entry point to bl31. It is incorrect and causes following abort
when bl31_entry() is called:
U-Boot SPL board initTrying to boot from MMC1
"Synchronous Abort" handler, esr 0x0200
elr: lr : ff8c7e8c
x 0: ff8e x 1:
x 2: x 3: ff8e0180
x 4: x 5:
x 6: 0030 x 7: ff8e0188
x 8: 01e0 x 9:
x10: 0007fcdc x11: 002881b8
x12: 01a2 x13: 0198
x14: 0007fdcc x15: 002881b8
x16: 003c0724 x17: 003c0718
x18: 0007fe80 x19: ff8e
x20: 0020 x21: ff8e
x22: x23: 0007fe30
x24: ff8d1c3c x25: ff8d5000
x26: deadbeef x27: 04a0
x28: 009c x29: 0007fd90
Fix it by using the entry point from the elf header.
Signed-off-by: Mian Yousaf Kaukab
---
arch/arm/mach-rockchip/make_fit_atf.py | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-rockchip/make_fit_atf.py
b/arch/arm/mach-rockchip/make_fit_atf.py
index 6b3d9201c9..b88a5e1f16 100755
--- a/arch/arm/mach-rockchip/make_fit_atf.py
+++ b/arch/arm/mach-rockchip/make_fit_atf.py
@@ -53,7 +53,7 @@ DT_END="""
};
"""
-def append_atf_node(file, atf_index, phy_addr):
+def append_atf_node(file, atf_index, phy_addr, elf_entry):
"""
Append ATF DT node to input FIT dts file.
"""
@@ -67,7 +67,7 @@ def append_atf_node(file, atf_index, phy_addr):
print >> file, '\t\t\tcompression = "none";'
print >> file, '\t\t\tload = <0x%08x>;' % phy_addr
if atf_index == 1:
-print >> file, '\t\t\tentry = <0x%08x>;' % phy_addr
+print >> file, '\t\t\tentry = <0x%08x>;' % elf_entry
print >> file, '\t\t};'
print >> file, ''
@@ -141,12 +141,13 @@ def generate_atf_fit_dts(fit_file_name, bl31_file_name,
uboot_file_name, dtbs_fi
with open(bl31_file_name) as bl31_file:
bl31 = ELFFile(bl31_file)
+elf_entry = bl31.header['e_entry']
for i in range(bl31.num_segments()):
seg = bl31.get_segment(i)
if ('PT_LOAD' == seg.__getitem__(ELF_SEG_P_TYPE)):
paddr = seg.__getitem__(ELF_SEG_P_PADDR)
p= seg.__getitem__(ELF_SEG_P_PADDR)
-append_atf_node(fit_file, i+1, paddr)
+append_atf_node(fit_file, i+1, paddr, elf_entry)
atf_cnt = i+1
append_fdt_node(fit_file, dtbs_file_name)
print >> fit_file, '%s' % DT_IMAGES_NODE_END
--
2.11.0
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Re: [U-Boot] [PATCH v4 2/2] test/py: add test for whitelist of variables while importing environment
Hi Stephen,
On Thu, Jun 07, 2018 at 05:21:19PM -0600, Stephen Warren wrote:
> On 06/04/2018 03:47 AM, Quentin Schulz wrote:
> > This tests that the importing of an environment with a specified
> > whitelist works as intended.
> >
> > If there are variables passed as parameter to the env import command,
> > those only should be imported in the current environment.
> >
> > For each variable passed as parameter, if
> > - foo is bar in current env and bar2 in exported env, after importing
> > exported env, foo shall be bar2,
> > - foo does not exist in current env and foo is bar2 in exported env,
> > after importing exported env, foo shall be bar2,
> > - foo is bar in current env and does not exist in exported env (but is
> > passed as parameter), after importing exported env, foo shall be empty,
> >
> > Any variable not passed as parameter should be left untouched.
> >
> > Two other tests are made to test that size cannot be '-' if the checksum
> > protection is enabled.
>
> Reviewed-by: Stephen Warren
>
> > diff --git a/test/py/tests/test_env.py b/test/py/tests/test_env.py
>
> > +def test_env_import_checksum_no_size(state_test_env):
> > +"""Test that omitted ('-') size parameter with checksum validation
> > fails the
> > + env import function.
> > +"""
> > +c = state_test_env.u_boot_console
> > +ram_base = u_boot_utils.find_ram_base(state_test_env.u_boot_console)
> > +addr = '%08x' % ram_base
> > +
> > +with c.disable_check('error_notification'):
> > +response = c.run_command('env import -c %s -' % addr)
> > +assert(response == '## Error: external checksum format must pass size')
>
> I could imagine all kinds of other useful tests here, e.g. completely
> missing the size parameter rather than passing it explicitly as - for
> example. But we can add that later if need be.
Indeed. There are a lot of tests to be added to the sandbox for
environment handling. In this patch I focused on what I actually changed
rather than the environment handling as a whole.
That was the idea behind it. Let's get the feature merged with its tests
and then work separately on other tests in sandbox.
Thanks,
Quentin
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