The nand boot require a little more memory that we had previosly
allocated so it stopped booting.
This patch increase CONFIG_SPL_SYS_MALLOC_F_LEN to 0x2000.
Signed-off-by: Michael Trimarchi
---
configs/imx6dl_icore_nand_defconfig | 1 +
configs/imx6q_icore_nand_defconfig | 1 +
2 files
On Wed, 6 Mar 2019 at 08:03, Minkyu Kang wrote:
>
> Dear Krzysztof Kozlowski,
>
> On 06/03/2019 04:57, Krzysztof Kozlowski wrote:
> > Hi,
> >
> > Changes since v3
> >
> > 1. Add accumulated review and test tags.
> > 2. Patch 6: Add "ramp" keyword to new function (as discussed
Dear Krzysztof Kozlowski,
On 06/03/2019 04:57, Krzysztof Kozlowski wrote:
> Hi,
>
> Changes since v3
>
> 1. Add accumulated review and test tags.
> 2. Patch 6: Add "ramp" keyword to new function (as discussed with
>Torsten Duwe).
> 3. Rebased on v2019.04-rc3.
>
>
> Changes
Barrier transactions from CCI400 need to be disabled till
the DDR is configured, otherwise it may lead to system hang.
The patch adds workaround to fix the erratum.
Signed-off-by: Shengzhou Liu
Signed-off-by: Alison Wang
---
arch/arm/cpu/armv7/ls102xa/Kconfig| 6 +++
Signed-off-by: Vagrant Cascadian
Reviewed-by: Bin Meng
Reviewed-by: Lukasz Majewski
---
Changes in v2:
- Add "cmd: thordown:" to define scope of the spelling fix.
- Add Reviewed-by entries.
cmd/thordown.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/cmd/thordown.c
Hi Kuldeep,
> -Original Message-
> From: Kuldeep Singh
> Sent: Tuesday, March 5, 2019 11:39 AM
> To: u-boot@lists.denx.de
> Cc: Rajesh Bhagat ; Prabhakar Kushwaha
> ; Ashish Kumar
> ; Jagdish Gediya ;
> Mingkai Hu ; Ruchika Gupta
> ; Kuldeep Singh
> Subject: [PATCH] configs: ls1046:
On 3/6/19 6:04 AM, Heinrich Schuchardt wrote:
> On 3/6/19 1:27 AM, AKASHI Takahiro wrote:
>> On Tue, Mar 05, 2019 at 08:48:37PM +0100, Heinrich Schuchardt wrote:
>>> On 3/5/19 6:53 AM, AKASHI Takahiro wrote:
It is just wrong to add devcie path protocol to image handle.
On 3/6/19 1:27 AM, AKASHI Takahiro wrote:
> On Tue, Mar 05, 2019 at 08:48:37PM +0100, Heinrich Schuchardt wrote:
>> On 3/5/19 6:53 AM, AKASHI Takahiro wrote:
>>> It is just wrong to add devcie path protocol to image handle.
>>>
>>> Signed-off-by: AKASHI Takahiro
>>> ---
>>>
On 3/5/19 10:23 AM, tien.fong.c...@intel.com wrote:
> From: Tien Fong Chee
>
> Update the default configuration file to enable the necessary functionality
> the get the kit working.
>
> Signed-off-by: Tien Fong Chee
>
> ---
>
> changes for v8
> - Moved the FIT related configs to the patch
On 3/5/19 10:23 AM, tien.fong.c...@intel.com wrote:
> From: Tien Fong Chee
>
> After some series of patches to maximise reusable of memory pool, here come
> to result of reasonable size required for whole SDMMC boot working on A10
> SoCDK. Size required come from default max cluster(0x1) +
On 3/6/19 1:41 AM, AKASHI Takahiro wrote:
> On Tue, Mar 05, 2019 at 08:56:12PM +0100, Heinrich Schuchardt wrote:
>> efi_load_pe() copies and rebases the UEFI image.
>> We do not need the buffer with the file contents afterwards.
>>
>> Signed-off-by: Heinrich Schuchardt
>> ---
>>
It looks like this patch was not in the previous 9 versions of this
series? Please try to not add new functionality to a series that is
already gone through so many reviews. It make reviewing the series
really confusing!
On 3/5/19 10:23 AM, tien.fong.c...@intel.com wrote:
> From: Tien Fong Chee
On 3/5/19 10:23 AM, tien.fong.c...@intel.com wrote:
> From: Tien Fong Chee
>
> Ensure the comment and debug messages are always consistent with the rest.
The rest of what? This patch seems unnecessary to me.
Dinh
>
> Signed-off-by: Tien Fong Chee
> ---
> drivers/fpga/socfpga_arria10.c |
On 3/6/19 1:17 AM, AKASHI Takahiro wrote:
> On Tue, Mar 05, 2019 at 08:38:40PM +0100, Heinrich Schuchardt wrote:
>> On 3/5/19 2:58 AM, AKASHI Takahiro wrote:
>>> See UEFI v2.7, section 3.1.2 for details of the specification.
>>>
>>> With efidebug command, you can run any EFI boot option as
On 3/5/19 10:23 AM, tien.fong.c...@intel.com wrote:
> From: Tien Fong Chee
>
> Update the default configuration file to enable the necessary functionality
> to get the SoCFPGA loadfs driver support. This would enable the
> implementation of programming bitstream into FPGA from MMC.
>
>
> -Original Message-
> From: Lukas Auer
> Sent: Wednesday, March 6, 2019 4:23 AM
> To: u-boot@lists.denx.de
> Cc: Atish Patra ; Anup Patel
> ; Bin Meng ; Andreas
> Schwab ; Palmer Dabbelt ;
> Alexander Graf ; Lukas Auer
> ; Anup Patel ;
> Anup Patel ; Rick Chen ;
> Baruch Siach ; Atish
> -Original Message-
> From: Lukas Auer
> Sent: Wednesday, March 6, 2019 4:23 AM
> To: u-boot@lists.denx.de
> Cc: Atish Patra ; Anup Patel
> ; Bin Meng ; Andreas
> Schwab ; Palmer Dabbelt ;
> Alexander Graf ; Lukas Auer
> ; Rick Chen ; Anup
> Patel
> Subject: [PATCH v2 7/9] riscv: do
> -Original Message-
> From: Lukas Auer
> Sent: Wednesday, March 6, 2019 4:23 AM
> To: u-boot@lists.denx.de
> Cc: Atish Patra ; Anup Patel
> ; Bin Meng ; Andreas
> Schwab ; Palmer Dabbelt ;
> Alexander Graf ; Lukas Auer
> ; Anup Patel ; Rick
> Chen ; Baruch Siach ; Stefan
> Roese ;
> -Original Message-
> From: Lukas Auer
> Sent: Wednesday, March 6, 2019 4:23 AM
> To: u-boot@lists.denx.de
> Cc: Atish Patra ; Anup Patel
> ; Bin Meng ; Andreas
> Schwab ; Palmer Dabbelt ;
> Alexander Graf ; Lukas Auer
> ; Anup Patel ; Rick
> Chen
> Subject: [PATCH v2 1/9] riscv: add
On Tue, 2019-03-05 at 21:05 +0100, Simon Goldschmidt wrote:
> Am 05.03.2019 um 17:23 schrieb tien.fong.c...@intel.com:
> >
> > From: Tien Fong Chee
> >
> > After some series of patches to maximise reusable of memory pool,
> > here come
> > to result of reasonable size required for whole SDMMC
On Tue, Mar 05, 2019 at 11:58:26PM +, Joe Hershberger wrote:
> > +static int higmac_recv(struct udevice *dev, int flags, uchar **packetp)
> > +{
> > + struct higmac_priv *priv = dev_get_priv(dev);
> > + struct higmac_desc *fqd = priv->rxfq;
> > + struct higmac_desc *bqd =
On Tue, Mar 05, 2019 at 08:56:12PM +0100, Heinrich Schuchardt wrote:
> efi_load_pe() copies and rebases the UEFI image.
> We do not need the buffer with the file contents afterwards.
>
> Signed-off-by: Heinrich Schuchardt
> ---
> lib/efi_loader/efi_boottime.c | 50
On Tue, Mar 05, 2019 at 08:48:37PM +0100, Heinrich Schuchardt wrote:
> On 3/5/19 6:53 AM, AKASHI Takahiro wrote:
> > It is just wrong to add devcie path protocol to image handle.
> >
> > Signed-off-by: AKASHI Takahiro
> > ---
> > lib/efi_loader/efi_boottime.c | 11 +--
> > 1 file
On Tue, Mar 05, 2019 at 08:38:40PM +0100, Heinrich Schuchardt wrote:
> On 3/5/19 2:58 AM, AKASHI Takahiro wrote:
> > See UEFI v2.7, section 3.1.2 for details of the specification.
> >
> > With efidebug command, you can run any EFI boot option as follows:
> > => efi boot add 1 SHELL ...
> > =>
On Sun, Feb 17, 2019 at 9:39 PM Shawn Guo wrote:
>
> It adds the driver for HIGMACV300 Ethernet controller found on HiSilicon
> SoCs like Hi3798CV200. It's based on a downstream U-Boot driver, but
> quite a lot of code gets rewritten and cleaned up to adopt driver model
> and PHY API.
>
>
On 3/6/19 12:26 AM, Eugeniu Rosca wrote:
> Simon, Marek, All,
Hi,
> Booting Linux on H3-ES2.0-Salvator-X, this patch contributes with
> below runtime errors:
>
> ERROR: reserving fdt memory region failed (addr=5400 size=300)
> ERROR: reserving fdt memory region failed (addr=5700
Simon, Marek, All,
Booting Linux on H3-ES2.0-Salvator-X, this patch contributes with
below runtime errors:
ERROR: reserving fdt memory region failed (addr=5400 size=300)
ERROR: reserving fdt memory region failed (addr=5700 size=100)
ERROR: reserving fdt memory region failed
On 3/5/19 11:28 PM, Eugeniu Rosca wrote:
> On Tue, Mar 05, 2019 at 07:56:39PM +0100, Marek Vasut wrote:
>> On 3/5/19 7:42 PM, Eugeniu Rosca wrote:
>>> Hello Marek,
>>
>> Hi,
>>
>>> May I ask for your opinion on Renesas commits [1-2] especially in
>>> light of the `bootm_size` changes done in your
Signed-off-by: Lukas Auer
Reviewed-by: Anup Patel
Reviewed-by: Bin Meng
---
Changes in v2: None
arch/riscv/lib/bootm.c | 13 -
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/arch/riscv/lib/bootm.c b/arch/riscv/lib/bootm.c
index f36b8702ef..efbd3e23e7 100644
---
Signed-off-by: Lukas Auer
Reviewed-by: Anup Patel
---
Changes in v2:
- New patch to enable SMP on the SiFive FU540, which was previously sent
independently
board/sifive/fu540/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/board/sifive/fu540/Kconfig b/board/sifive/fu540/Kconfig
RISC-V U-Boot expects the hart ID to be passed to it via register a0 by
the previous boot stage. Machine mode firmware such as BBL and OpenSBI
do this when starting their payload (U-Boot) in supervisor mode. If
U-Boot is running in machine mode, this task must be handled by the boot
ROM.
The supervisor binary interface (SBI) provides the necessary functions
to implement the platform IPI functions riscv_send_ipi() and
riscv_clear_ipi(). Use it to implement them.
This adds support for inter-processor interrupts (IPIs) on RISC-V CPUs
running in supervisor mode. Support for machine
Signed-off-by: Lukas Auer
Reviewed-by: Anup Patel
Reviewed-by: Bin Meng
---
Changes in v2: None
board/emulation/qemu-riscv/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/board/emulation/qemu-riscv/Kconfig
b/board/emulation/qemu-riscv/Kconfig
index 88d07d568e..cf057e7de6 100644
On RISC-V, all harts boot independently. To be able to run on a
multi-hart system, U-Boot must be extended with the functionality to
manage all harts in the system. All harts entering U-Boot are registered
in the available_harts mask stored in global data. A hart lottery system
as used in the
Import the supervisor binary interface (SBI) header file from Linux
(arch/riscv/include/asm/sbi.h). The last change to it was in commit
6d60b6ee0c97 ("RISC-V: Device, timer, IRQs, and the SBI").
Signed-off-by: Lukas Auer
Reviewed-by: Anup Patel
Reviewed-by: Bin Meng
---
Changes in v2: None
Move the initialization of the caches and the debug UART until after
board_init_f_init_reserve. This is in preparation for SMP support, where
code prior to this point will be executed by all harts. This ensures
that initialization will only be performed once for the main hart
running U-Boot.
Harts on RISC-V boot independently, U-Boot is responsible for managing
them. Functions are called on other harts with smp_call_function(),
which sends inter-processor interrupts (IPIs) to all other available
harts. Available harts are those marked as available in the device tree
and present in the
This patch series adds SMP support for RISC-V to U-Boot. It allows
U-Boot to run on multi-hart systems (hart is the RISC-V terminology for
hardware thread). Images passed to bootm will be started on all harts.
The bootm command is currently the only one that will boot images on all
harts, bootefi
Signed-off-by: Jordan Hand
---
FIT header verification in mkimage was treating a return code as a boolean,
which meant that failures in validating the fit were seen as successes.
Additionally, mkimage was checking all formats to find a header which
passes validation, rather than using the image
On Tue, Mar 05, 2019 at 07:56:39PM +0100, Marek Vasut wrote:
> On 3/5/19 7:42 PM, Eugeniu Rosca wrote:
> > Hello Marek,
>
> Hi,
>
> > May I ask for your opinion on Renesas commits [1-2] especially in
> > light of the `bootm_size` changes done in your patch?
> > The topics look orthogonal to me,
On 3/5/19 11:16 PM, Eugeniu Rosca wrote:
> CONFIG_NET_MULTI seems to make a comeback each time it is wiped out in:
> - v2011.12 commit 31a4f1e5b6ee ("board configs: drop NET_MULTI references")
> - v2017.11 commit 795428fc679f ("net: remove CONFIG_NET_MULTI")
> - v2018.05 commit ec5c4a8fd64a
On 3/5/19 11:13 PM, Eugeniu Rosca wrote:
> v2019.01 commit 07a8060a1277 ("ARM: rmobile: Convert to bootm_size")
> attempted converting to bootm_size of 256 MiB below targets:
> - include/configs/alt.h
> - include/configs/gose.h
> - include/configs/koelsch.h
> - include/configs/lager.h
> -
CONFIG_NET_MULTI seems to make a comeback each time it is wiped out in:
- v2011.12 commit 31a4f1e5b6ee ("board configs: drop NET_MULTI references")
- v2017.11 commit 795428fc679f ("net: remove CONFIG_NET_MULTI")
- v2018.05 commit ec5c4a8fd64a ("configs: Drop CONFIG_NET_MULTI")
Remove the
v2019.01 commit 07a8060a1277 ("ARM: rmobile: Convert to bootm_size")
attempted converting to bootm_size of 256 MiB below targets:
- include/configs/alt.h
- include/configs/gose.h
- include/configs/koelsch.h
- include/configs/lager.h
- include/configs/porter.h
-
On 3/5/19 9:13 PM, Dinh Nguyen wrote:
>
>
> On 3/5/19 1:20 PM, Marek Vasut wrote:
>> On 3/5/19 8:03 PM, Dinh Nguyen wrote:
>>> Load the PL310 L2 cache driver and allow it to setup the cache settings
>>>
>>> Signed-off-by: Dinh Nguyen
>>> ---
>>> arch/arm/mach-socfpga/misc.c | 15
On 3/5/19 9:17 PM, Dinh Nguyen wrote:
>
>
> On 3/5/19 1:20 PM, Marek Vasut wrote:
>> On 3/5/19 8:03 PM, Dinh Nguyen wrote:
>>> Enable CONFIG_MISC and CONFIG_L2X0_CACHE config options.
>>>
>>> Signed-off-by: Dinh Nguyen
>>> ---
>>> configs/socfpga_sockit_defconfig | 2 ++
>>> 1 file changed, 2
On 3/5/19 9:28 PM, Simon Goldschmidt wrote:
> Am 04.03.2019 um 22:34 schrieb Marek Vasut:
>> On 3/4/19 10:23 PM, Simon Goldschmidt wrote:
>>>
>>>
>>> Marek Vasut mailto:ma...@denx.de>> schrieb am Mo., 4.
>>> März 2019, 22:19:
>>>
>>> On 3/4/19 9:53 PM, Simon Goldschmidt wrote:
>>> > This
On 3/5/19 9:07 PM, Dinh Nguyen wrote:
>
>
> On 3/5/19 1:19 PM, Marek Vasut wrote:
>> On 3/5/19 8:03 PM, Dinh Nguyen wrote:
>>> The driver will read the cache properties from the device tree file and
>>> set it up.
>>>
>
>>>
>>> +config L2X0_CACHE
>>> + bool "L2x0 Cache support"
>>> +
Am 04.03.2019 um 22:34 schrieb Marek Vasut:
On 3/4/19 10:23 PM, Simon Goldschmidt wrote:
Marek Vasut mailto:ma...@denx.de>> schrieb am Mo., 4.
März 2019, 22:19:
On 3/4/19 9:53 PM, Simon Goldschmidt wrote:
> This commit moves common config options used in all socfpga boards
>
On 3/5/19 1:20 PM, Marek Vasut wrote:
> On 3/5/19 8:03 PM, Dinh Nguyen wrote:
>> Enable CONFIG_MISC and CONFIG_L2X0_CACHE config options.
>>
>> Signed-off-by: Dinh Nguyen
>> ---
>> configs/socfpga_sockit_defconfig | 2 ++
>> 1 file changed, 2 insertions(+)
>>
>> diff --git
On 3/5/19 1:20 PM, Marek Vasut wrote:
> On 3/5/19 8:03 PM, Dinh Nguyen wrote:
>> Load the PL310 L2 cache driver and allow it to setup the cache settings
>>
>> Signed-off-by: Dinh Nguyen
>> ---
>> arch/arm/mach-socfpga/misc.c | 15 ++-
>> 1 file changed, 2 insertions(+), 13
On 3/5/19 1:19 PM, Marek Vasut wrote:
> On 3/5/19 8:03 PM, Dinh Nguyen wrote:
>> The driver will read the cache properties from the device tree file and
>> set it up.
>>
>>
>> +config L2X0_CACHE
>> +bool "L2x0 Cache support"
>> +depends on MISC
>> +help
>> + Select this to
Am 05.03.2019 um 17:23 schrieb tien.fong.c...@intel.com:
From: Tien Fong Chee
After some series of patches to maximise reusable of memory pool, here come
to result of reasonable size required for whole SDMMC boot working on A10
SoCDK. Size required come from default max cluster(0x1) +
On 3/5/19 6:53 AM, AKASHI Takahiro wrote:
> Those two functions will be used later to re-implement do_bootefi_exec().
>
> Signed-off-by: AKASHI Takahiro
Reviewed-by: Heinrich Schuchardt
___
U-Boot mailing list
U-Boot@lists.denx.de
Add startup time to LDO regulators of S2MPS11 PMIC on Odroid XU3/XU4/HC1
family of boards to be sure the voltage is proper before relying on the
regulator.
The datasheet for all the S2MPS1x family is inconsistent here and does
not specify unambiguously the value of ramp delay for LDO. It
According to datasheet, the output on LDO regulators will start
appearing after 10-15 us.
Signed-off-by: Krzysztof Kozlowski
Tested-by: Anand Moon
---
drivers/power/regulator/s2mps11_regulator.c | 11 ++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git
Changing voltage and enabling regulator might require delays so the
regulator stabilizes at expected level.
Add support for "regulator-ramp-delay" binding which can introduce
required time to both enabling the regulator and to changing the
voltage.
Signed-off-by: Krzysztof Kozlowski
Tested-by:
Fix detection of Odroid HC1 (Exynos5422) after reboot if kernel disabled
the LDO4/VDD_ADC regulator.
The LDO4 supplies both ADC block and the ADC input AIN9. Voltage on
AIN9 will rise slowly, so use delay of 5 milliseconds instead of
timers-based loop to wait for voltage stabilization.
First
The ADC block requires VDD supply to be on so provide one.
Signed-off-by: Krzysztof Kozlowski
Reviewed-by: Lukasz Majewski
Tested-by: Anand Moon
---
arch/arm/dts/exynos5422-odroidxu3.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/dts/exynos5422-odroidxu3.dts
Detection of board revision is done early - before power setup. In case of
Odroid XU3/XU4/HC1 family, the detection is done using ADC which
is supplied by LDO4/VDD_ADC regulator. This regulator could be turned
off (e.g. by kernel before reboot). If ADC is used early, the
regulators are not yet
Printing the "Type" of board requires proper detection of revision which
can happen only late because regulators are needed.
Signed-off-by: Krzysztof Kozlowski
Tested-by: Anand Moon
---
board/samsung/common/board.c | 2 +-
configs/odroid-xu3_defconfig | 2 ++
2 files changed, 3 insertions(+),
LDO27 and LDO35 have 25 mV step, not 50 mV.
Signed-off-by: Krzysztof Kozlowski
Reviewed-by: Lukasz Majewski
Tested-by: Anand Moon
---
drivers/power/regulator/s2mps11_regulator.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/power/regulator/s2mps11_regulator.c
When stopping the ADC_V2_CON1_STC_EN should be cleared.
Signed-off-by: Krzysztof Kozlowski
Reviewed-by: Lukasz Majewski
Tested-by: Anand Moon
---
drivers/adc/exynos-adc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/adc/exynos-adc.c b/drivers/adc/exynos-adc.c
Hi,
Changes since v3
1. Add accumulated review and test tags.
2. Patch 6: Add "ramp" keyword to new function (as discussed with
Torsten Duwe).
3. Rebased on v2019.04-rc3.
Changes since v2
1. Add Lukasz review tags.
2. Patch 7: Return on error, as suggested
efi_load_pe() copies and rebases the UEFI image.
We do not need the buffer with the file contents afterwards.
Signed-off-by: Heinrich Schuchardt
---
lib/efi_loader/efi_boottime.c | 50 +--
1 file changed, 18 insertions(+), 32 deletions(-)
diff --git
On Tue, 5 Mar 2019 at 11:16, Minkyu Kang wrote:
>
> Dear Krzysztof Kozlowski,
>
> On 24/02/2019 21:55, Anand Moon wrote:
> > Hi Krzysztof,
> >
> > Please add my. on Odroid HC1
> >
> > Tested-by: Anand Moon
> >
> > Best Regards
> > -Anand
> >
> > On Sat, 16 Feb 2019 at 15:16, Krzysztof Kozlowski
On 3/5/19 6:53 AM, AKASHI Takahiro wrote:
> It is just wrong to add devcie path protocol to image handle.
>
> Signed-off-by: AKASHI Takahiro
> ---
> lib/efi_loader/efi_boottime.c | 11 +--
> 1 file changed, 1 insertion(+), 10 deletions(-)
>
> diff --git a/lib/efi_loader/efi_boottime.c
On 3/5/19 2:58 AM, AKASHI Takahiro wrote:
> See UEFI v2.7, section 3.1.2 for details of the specification.
>
> With efidebug command, you can run any EFI boot option as follows:
> => efi boot add 1 SHELL ...
> => efi boot add 2 HELLO ...
> => efi boot order 1 2
> => efi bootmgr
>
On 3/5/19 12:23 PM, Ismael Luceno Cortes wrote:
> Cosmetic change. Any call to the recover function would need to do the
> same check afterwards, so it's sensible to make it part of the function.
>
> Signed-off-by: Ismael Luceno
> ---
>
> Notes:
> Changes since v1:
> - Rebased on top
On 3/5/19 12:16 PM, Ismael Luceno Cortes wrote:
Commit message is missing :-(
> Signed-off-by: Ismael Luceno
> ---
>
> Notes:
> Changes since v1:
> - Rebased on top of patch 1050650 ("i2c: rcar_i2c: Add Gen3 SoC support")
>
> drivers/i2c/rcar_i2c.c | 2 +-
> 1 file changed, 1
On 3/5/19 8:03 PM, Dinh Nguyen wrote:
> Enable CONFIG_MISC and CONFIG_L2X0_CACHE config options.
>
> Signed-off-by: Dinh Nguyen
> ---
> configs/socfpga_sockit_defconfig | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/configs/socfpga_sockit_defconfig
>
On 3/5/19 8:03 PM, Dinh Nguyen wrote:
> The driver will read the cache properties from the device tree file and
> set it up.
>
> Signed-off-by: Dinh Nguyen
> ---
> arch/arm/include/asm/pl310.h | 3 ++
> drivers/misc/Kconfig | 7 +++
> drivers/misc/Makefile| 1 +
>
On 3/5/19 8:03 PM, Dinh Nguyen wrote:
> Load the PL310 L2 cache driver and allow it to setup the cache settings
>
> Signed-off-by: Dinh Nguyen
> ---
> arch/arm/mach-socfpga/misc.c | 15 ++-
> 1 file changed, 2 insertions(+), 13 deletions(-)
>
> diff --git
On 3/5/19 12:16 PM, Ismael Luceno Cortes wrote:
Commit message is missing :-(
The patch itself is fine though. Can you fill the commit message and do
a V3 of the series ?
> Signed-off-by: Ismael Luceno
> ---
>
> Notes:
> Changes since v1:
> - Rebased on top of patch 1050650 ("i2c:
On 3/5/19 12:16 PM, Ismael Luceno Cortes wrote:
> Do the reset before clearing the MSR, otherwise it may result in a read
> or write operation instead if the start condition is repeated.
>
> Signed-off-by: Ismael Luceno
Reviewed-by: Marek Vasut
> ---
>
> Notes:
> Changes since v1:
>
On 3/5/19 12:16 PM, Ismael Luceno Cortes wrote:
> It only needs to be done once.
As much as I hate to do it, I need to ask you to reword the commit
message again.
When I look at just the commit message and I read "It only needs to be
done once.", I literally have no clue what the change does. I
On 3/5/19 12:16 PM, Ismael Luceno Cortes wrote:
Commit message is missing :(
> Signed-off-by: Ismael Luceno
> ---
>
> Notes:
> Changes since v1:
> - Rebased on top of patch 1050650 ("i2c: rcar_i2c: Add Gen3 SoC support")
Thanks!
> drivers/i2c/rcar_i2c.c | 45
Curious, you sent out 3 versions(2x v10, and v11) within ~2 hours. What
versions should we be reviewing?
On 3/5/19 10:23 AM, tien.fong.c...@intel.com wrote:
> From: Tien Fong Chee
>
> This patch adds description on properties about file name used for both
> peripheral bitstream and core
Load the PL310 L2 cache driver and allow it to setup the cache settings
Signed-off-by: Dinh Nguyen
---
arch/arm/mach-socfpga/misc.c | 15 ++-
1 file changed, 2 insertions(+), 13 deletions(-)
diff --git a/arch/arm/mach-socfpga/misc.c b/arch/arm/mach-socfpga/misc.c
index
Enable CONFIG_MISC and CONFIG_L2X0_CACHE config options.
Signed-off-by: Dinh Nguyen
---
configs/socfpga_sockit_defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/configs/socfpga_sockit_defconfig b/configs/socfpga_sockit_defconfig
index 4c17d1a9e4..0009b0ebc3 100644
---
The driver will read the cache properties from the device tree file and
set it up.
Signed-off-by: Dinh Nguyen
---
arch/arm/include/asm/pl310.h | 3 ++
drivers/misc/Kconfig | 7 +++
drivers/misc/Makefile| 1 +
drivers/misc/cache-l2x0.c| 84
Hello,
I'm soliciting comments of this patchset. The patchset adds a driver
for the cache controller(specifically the PL310). This cache controller
can be found on many ARMv7 SoCs. I don't think it's used on ARMv8
platforms.
This driver will retrieve the cache properties from the board DTS files
On 3/5/19 7:42 PM, Eugeniu Rosca wrote:
> Hello Marek,
Hi,
> May I ask for your opinion on Renesas commits [1-2] especially in
> light of the `bootm_size` changes done in your patch?
> The topics look orthogonal to me, but I kindly ask for your confirmation.
What do you want to know ? With that
On 3/5/19 12:50 PM, matthias@kernel.org wrote:
> From: Matthias Brugger
>
> The function efi_cin_read_key can be affected by a loss of
> a character which will make u-boot to wait forever.
> Fix this by calling term_get_char instead.
>
> Signed-off-by: Matthias Brugger
You can test EFI
On 3/5/19 12:50 PM, matthias@kernel.org wrote:
> From: Matthias Brugger
>
> Function term_read_reply tries to read from the serial console until
> the end_char was read. This can hang forever if we are, for some reason,
> not be able to read the full response (e.g. serial buffer too small,
>
Hello Marek,
May I ask for your opinion on Renesas commits [1-2] especially in
light of the `bootm_size` changes done in your patch?
The topics look orthogonal to me, but I kindly ask for your confirmation.
Also, purely related to the `bootm_size` patch, compiling v2019.04-rc3
U-Boot for
Hi
On Tue, Mar 5, 2019 at 6:20 PM Tim Harvey wrote:
>
> On Tue, Mar 5, 2019 at 9:00 AM Michael Nazzareno Trimarchi
> wrote:
> >
> > Hi Tim
> >
> > On Tue, Mar 5, 2019 at 5:54 PM Tim Harvey wrote:
> > >
> > > On Tue, Mar 5, 2019 at 8:41 AM Michael Nazzareno Trimarchi
> > > wrote:
> > > >
> > >
On 3/5/19 12:50 PM, matthias@kernel.org wrote:
> From: Matthias Brugger
>
> Function term_read_reply tries to read from the serial console until
> the end_char was read. This can hang forever if we are, for some reason,
> not be able to read the full response (e.g. serial buffer too small,
>
On Tue, Mar 5, 2019 at 10:17 AM Jagan Teki wrote:
>
> On Sat, Mar 2, 2019 at 12:29 AM Joe Hershberger
> wrote:
> >
> > On Wed, Feb 27, 2019 at 12:59 PM Jagan Teki
> > wrote:
> > >
> > > Unlike other Allwinner SoC's R40 GMAC clock control register
> > > is locate in CCU, but rest located via
On Tue, Mar 5, 2019 at 9:00 AM Michael Nazzareno Trimarchi
wrote:
>
> Hi Tim
>
> On Tue, Mar 5, 2019 at 5:54 PM Tim Harvey wrote:
> >
> > On Tue, Mar 5, 2019 at 8:41 AM Michael Nazzareno Trimarchi
> > wrote:
> > >
> > > HI all
> > >
> > > On Mon, Feb 4, 2019 at 7:14 PM Tim Harvey wrote:
> > >
Hi Tim
On Tue, Mar 5, 2019 at 5:59 PM Michael Nazzareno Trimarchi
wrote:
>
> Hi Tim
>
> On Tue, Mar 5, 2019 at 5:54 PM Tim Harvey wrote:
> >
> > On Tue, Mar 5, 2019 at 8:41 AM Michael Nazzareno Trimarchi
> > wrote:
> > >
> > > HI all
> > >
> > > On Mon, Feb 4, 2019 at 7:14 PM Tim Harvey
Hi Andrejs,
https://patchwork.ozlabs.org/patch/1050177/ was applied to
http://git.denx.de/?p=u-boot/u-boot-net.git
Thanks!
-Joe
___
U-Boot mailing list
U-Boot@lists.denx.de
https://lists.denx.de/listinfo/u-boot
Hi Murali,
https://patchwork.ozlabs.org/patch/1047978/ was applied to
http://git.denx.de/?p=u-boot/u-boot-net.git
Thanks!
-Joe
___
U-Boot mailing list
U-Boot@lists.denx.de
https://lists.denx.de/listinfo/u-boot
Hi Carlo,
https://patchwork.ozlabs.org/patch/1038820/ was applied to
http://git.denx.de/?p=u-boot/u-boot-net.git
Thanks!
-Joe
___
U-Boot mailing list
U-Boot@lists.denx.de
https://lists.denx.de/listinfo/u-boot
Hi Meenakshi,
https://patchwork.ozlabs.org/patch/1048656/ was applied to
http://git.denx.de/?p=u-boot/u-boot-net.git
Thanks!
-Joe
___
U-Boot mailing list
U-Boot@lists.denx.de
https://lists.denx.de/listinfo/u-boot
Hi James,
https://patchwork.ozlabs.org/patch/1051237/ was applied to
http://git.denx.de/?p=u-boot/u-boot-net.git
Thanks!
-Joe
___
U-Boot mailing list
U-Boot@lists.denx.de
https://lists.denx.de/listinfo/u-boot
Hi Murali,
https://patchwork.ozlabs.org/patch/1047980/ was applied to
http://git.denx.de/?p=u-boot/u-boot-net.git
Thanks!
-Joe
___
U-Boot mailing list
U-Boot@lists.denx.de
https://lists.denx.de/listinfo/u-boot
Hi Michal,
https://patchwork.ozlabs.org/patch/1051139/ was applied to
http://git.denx.de/?p=u-boot/u-boot-net.git
Thanks!
-Joe
___
U-Boot mailing list
U-Boot@lists.denx.de
https://lists.denx.de/listinfo/u-boot
Hi Murali,
https://patchwork.ozlabs.org/patch/1047983/ was applied to
http://git.denx.de/?p=u-boot/u-boot-net.git
Thanks!
-Joe
___
U-Boot mailing list
U-Boot@lists.denx.de
https://lists.denx.de/listinfo/u-boot
Hi Andrejs,
https://patchwork.ozlabs.org/patch/1050178/ was applied to
http://git.denx.de/?p=u-boot/u-boot-net.git
Thanks!
-Joe
___
U-Boot mailing list
U-Boot@lists.denx.de
https://lists.denx.de/listinfo/u-boot
1 - 100 of 187 matches
Mail list logo
