> I'm wondering, where the u-boot.dtsi is included? I can't find
> any reference to it in this patch.
Hi Stefan, the include is somehow done automatically by the u-boot build
system. (See in u-boot/scripts/Makefile.lib, search for string "Try
these files in order to find the U-Boot-specific .dtsi
Hello,
I have few questions about upstreaming support for the Turris Omnia
into u-boot.
The Turris Omnia has (on I2C interface) an Atmel ATSHA204
CryptoAuthentication chip for storage of MAC adresses, device serial
number, device configuration (1 GB RAM vs 2 GB RAM). This data is
stored in the
Hello,
the Turris Omnia router uses btrfs as the main filesystem, from which
it also loads kernel and dts. We have an implementation in our internal
u-boot
(https://gitlab.labs.nic.cz/turris/turris-omnia-uboot/tree/master/fs/btrfs).
As I understand it, this code was already proposed for u-boot:
The I2C reading in the PEX vs SATA detection code often fails on the
first try. Try three times, as the code for EEPROM reading does.
Signed-off-by: Marek Behun
---
board/CZ.NIC/turris_omnia/turris_omnia.c | 11 ---
1 file changed, 8 insertions(+), 3 deletions(-)
The Turris Omnia is a open-source router created by CZ.NIC.
The code is based on the Marvell/db-88f6820-gp by Stefan Roese
with modifications from Tomas Hlavacek in the CZ.NIC turris-omnia-uboot
repository, which can be found at
https://gitlab.labs.nic.cz/turris/turris-omnia-uboot
The code does
The DDR3 training code for Marvell A38X currently computes 1t timing
when given board topology map of the Turris Omnia, but Omnia needs 2t.
This patch adds support for enforcing the 2t timing in struct
hws_topology_map, through a new enum hws_timing, which can assume
following values:
This watchdog can be found on some Armada chips.
Signed-off-by: Marek Behun
---
drivers/watchdog/Kconfig | 7 +++
drivers/watchdog/Makefile| 1 +
drivers/watchdog/orion_wdt.c | 128 +++
3 files changed, 136 insertions(+)
This series adds support for the Turris Omnia board, a router
developed by the CZ.NIC.
The first patch modifies Marvell's DDR3 training code to be more
general, so that board topology map can force 2t timing.
The second patch adds support for the hardware watchdog which
can be found on Omnia.
This is the fourth version of patches for adding support for the
Turris Omnia board, a router developed by the CZ.NIC.
Modifications from last version:
- Since the new driver model API does not expose the
watchdog_reset function, only wdt_reset, the watchdog did not
get restarted and
The DDR3 training code for Marvell A38X currently computes 1t timing
when given board topology map of the Turris Omnia, but Omnia needs 2t.
This patch adds support for enforcing the 2t timing in struct
hws_topology_map, through a new enum hws_timing, which can assume
following values:
The Orion watchdog can be found on some Marvell Armada chips.
This driver is based on the code by Tomas Hlavacek in the CZ.NIC
turris-omnia-uboot repository, which can be found at
https://gitlab.labs.nic.cz/turris/turris-omnia-uboot, and that
one is based on code by Sylver Bruneau. His code is
This I2C mux is found, for example, on the Turris Omnia board.
Signed-off-by: Marek Behun
Reviewed-by: Heiko Schocher
diff --git a/drivers/i2c/muxes/pca954x.c b/drivers/i2c/muxes/pca954x.c
index 1a6761858c..383f72f552 100644
--- a/drivers/i2c/muxes/pca954x.c
This module can be found on the Turris Omnia board connected
via the I2C interface.
Among some cryptographic functions, the chip has a 512 bit
One Time Programmable memory, 88 byte configuration memory
and 512 byte general purpose memory.
The Turris Omnia stores serial number and device MAC
The Turris Omnia is a open-source router created by CZ.NIC.
The code is based on the Marvell/db-88f6820-gp by Stefan Roese
with modifications from Tomas Hlavacek in the CZ.NIC turris-omnia-uboot
repository, which can be found at
https://gitlab.labs.nic.cz/turris/turris-omnia-uboot
By default,
On Sun, 28 May 2017 21:17:25 +0200
Pavel Machek wrote:
> Should the path be .../cz.nic/... (lowercase)?
The name of the association is conventionally uppercase, and as I have
seen other board categories in U-Boot using uppercase letters
(AndesTech, BuR, CarMedialLab, Marvell,
This device tree is taken from mainline Linux kernel commit
7b7db5ab. Added is also a -u-boot.dtsi file with these additions:
- aliases for I2C and SPI devices are added, because i2cmux and
SPI flash doesn't work otherwise
- spi_flash node has been added so that the new DM API works
-
Damn, I forgot to add the change Stefan suggested in this commit. It
will be included in next version of the patches.
On Tue, 6 Jun 2017 14:04:32 +0200
Marek Behun <marek.be...@nic.cz> wrote:
> From: Marek Behún <marek.be...@nic.cz>
>
> The DDR3 training code for M
Otherwise fs_opendir will fault.
Signed-off-by: Marek Behun
---
fs/fs.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/fs/fs.c b/fs/fs.c
index 84349f3039..9c4d67faf8 100644
--- a/fs/fs.c
+++ b/fs/fs.c
@@ -233,6 +233,7 @@ static struct fstype_info fstypes[] = {
On Fri, 6 Oct 2017 06:54:34 -0700
"J. William Campbell" wrote:
> Hi Marek,
> If the searched key is not found, isn't it an error to use
> the res value AT ALL? Setting it to 0 may cover up the warning, but
> the function shouldn't actually use it for
Marek Behún <marek.be...@nic.cz> wrote:
> Change %lu to %u. The compiler issues a warning otherwise.
>
> Signed-off-by: Marek Behun <marek.be...@nic.cz>
> ---
> fs/btrfs/super.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/fs/btrf
Reviewed-by: Marek Behun
On Fri, 29 Sep 2017 10:53:36 +1300
Chris Packham wrote:
> Commit 8e6eda7cda6c ("drivers/i2c/muxes/pca954x: Add pca9547 I2C mux
> support") introduced a chip_desc for the pca954x devices but failed to
> update
On Fri, 29 Sep 2017 10:53:36 +1300
Chris Packham wrote:
> struct pca954x_priv {
> @@ -39,14 +40,17 @@ static const struct chip_desc chips[] = {
> [PCA9544] = {
> .enable = 0x4,
> .muxtype = pca954x_ismux,
> + .width = 4,
>
This is the first version of patches for adding a single-device
read-only BTRFS support to U-Boot.
Compression (zlib/lzo) is supported.
Data checksumming is unimplemented.
The code was tested on the Turris Omnia router, where BTRFS is
used as the main filesystem from which kernel and device-tree
BTRFS on disk structures are stored in Little Endian. Add functions
to convert this structures to cpu and to disk format.
On Little Endian hosts, these functions do nothing.
On Big Endian the CALL_MACRO_FROM_EACH from variadic-macro.h is used
to define all the members for each structure on which
Add a header variadic-macro.h which defines the CALL_MACRO_FOR_EACH marco.
This macro can be used as follows:
#define TEST(x)
CALL_MACRO_FOR_EACH(TEST, a, b, c, d)
This will expand to
TEST(a) TEST(b) TEST(c) TEST(d)
The nice thing is that CALL_MACRO_FOR_EACH is a variadic macro, thus the
Add btrfs_tree.h and ctree.h from Linux which contains constants
and structures for the BTRFS filesystem.
Signed-off-by: Marek Behun
create mode 100644 fs/btrfs/btrfs_tree.h
create mode 100644 fs/btrfs/ctree.h
diff --git a/fs/btrfs/btrfs_tree.h b/fs/btrfs/btrfs_tree.h
new
This adds the proper implementation for the BTRFS filesystem.
The implementation currently supports only read-only mode and
the filesystem can be only on a single device.
Checksums of data chunks is unimplemented.
Compression is implemented (ZLIB + LZO).
Signed-off-by: Marek Behun
Signed-off-by: Marek Behun
create mode 100644 cmd/btrfs.c
diff --git a/cmd/Kconfig b/cmd/Kconfig
index d6d130edfa..77623052c4 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -1311,6 +1311,16 @@ config CMD_CROS_EC
endmenu
menu "Filesystem commands"
+config CMD_BTRFS
+
Signed-off-by: Marek Behun
diff --git a/configs/turris_omnia_defconfig b/configs/turris_omnia_defconfig
index a3834acb96..9a456e67aa 100644
--- a/configs/turris_omnia_defconfig
+++ b/configs/turris_omnia_defconfig
@@ -26,6 +26,7 @@ CONFIG_CMD_USB=y
CONFIG_CMD_TFTPPUT=y
Otherwise the linking will fail since eth_env_set_enetaddr cannot
be found.
Signed-off-by: Marek Behun
---
board/CZ.NIC/turris_omnia/turris_omnia.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/board/CZ.NIC/turris_omnia/turris_omnia.c
Signed-off-by: Marek Behun
create mode 100644 fs/btrfs/Kconfig
create mode 100644 fs/btrfs/Makefile
create mode 100644 fs/btrfs/btrfs.c
create mode 100644 include/btrfs.h
diff --git a/fs/Kconfig b/fs/Kconfig
index e6803ac8cb..1cb9831be8 100644
--- a/fs/Kconfig
+++
This is needed for BTRFS.
Signed-off-by: Marek Behun
create mode 100644 lib/crc32c.c
diff --git a/include/u-boot/crc.h b/include/u-boot/crc.h
index 6764d58bab..6d08f5df98 100644
--- a/include/u-boot/crc.h
+++ b/include/u-boot/crc.h
@@ -28,4 +28,8 @@ uint32_t crc32_no_comp
The ext4, reiserfs and zfs filesystems all have their own implementation
of the same function, *_devread. Generalize this function into fs_devread
and put the code into fs/fs_internal.c.
Signed-off-by: Marek Behun
create mode 100644 fs/fs_internal.c
create mode 100644
I accidentaly left a foreign language note in the code from development.
Signed-off-by: Marek Behun
---
fs/btrfs/inode.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/fs/btrfs/inode.c b/fs/btrfs/inode.c
index 0af04278a3..f785b600fa 100644
--- a/fs/btrfs/inode.c
+++
The variable res should be initialized to 0 in these functions,
because if the searched key is not found, the variable is used
uninitialized.
Reported-by: Coverity (CID: 167335)
Reported-by: Coverity (CID: 167336)
Reported-by: Coverity (CID: 167337)
Signed-off-by: Marek Behun
Since
rem = ((long) *tim_p) % SECSPERDAY;
the second while cycle
while (rem >= SECSPERDAY)
is dead.
Reported-by: Coverity (CID: 167334)
Signed-off-by: Marek Behun
---
include/linux/time.h | 5 -
1 file changed, 5 deletions(-)
diff --git a/include/linux/time.h
Change %lu to %u. The compiler issues a warning otherwise.
Signed-off-by: Marek Behun
---
fs/btrfs/super.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/fs/btrfs/super.c b/fs/btrfs/super.c
index 2529c2b3b6..706286ee2d 100644
--- a/fs/btrfs/super.c
+++
The DTS file for armada-37xx uses the string "marvell,armada3700-ehci",
but the code searched for "marvell,armada-3700-ehci".
Signed-off-by: Marek Behun
---
drivers/phy/marvell/comphy_a3700.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
Here are some updates for Turris Mox board.
The first patch updates Marvell's comphy driver to call function
board_update_comphy_map. The comphy driver contains a weak definition of this
function, which does nothing. Board file can then define this function to
update the serdes map before comphy
This adds a weak definition of board_update_comphy_map to comphy_core,
which does nothing. If this function is defined elsewhere, for example
in board file, the board file can change some parameters of SERDES
configuration.
This is needed on Turris Mox, where the SERDES speed on lane 1 has to
be
When SFP module is present, the SGMII lane speed should be 1.25 Gbps,
otherwise SFP won't work. Topaz still needs 3.125 Gbps.
Signed-off-by: Marek Behun
diff --git a/board/CZ.NIC/turris_mox/turris_mox.c
b/board/CZ.NIC/turris_mox/turris_mox.c
index 130d4c606d..f7fb2c2955
This can be used to detect whether the button is pressed or light the
LED diode.
Signed-off-by: Marek Behun
diff --git a/configs/turris_mox_defconfig b/configs/turris_mox_defconfig
index 7dea7157dc..9538903bd3 100644
--- a/configs/turris_mox_defconfig
+++
The first byte of the string read from SPI bus from which Mox module
toplogy is detected contains ID of the CPU module. This ID can
differentiate between the version with SD card slot and the one with
eMMC card.
Signed-off-by: Marek Behun
diff --git
Without this USB3 won't work in U-Boot.
Signed-off-by: Marek Behun
---
configs/turris_mox_defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/configs/turris_mox_defconfig b/configs/turris_mox_defconfig
index 9538903bd3..45c1399687 100644
---
Hmm, for some reason there are some items with objectid=0 and type=0
betwenn CHUNK_ITEM_KEYs, and thus the reading breaks before reading all
items. I am not sure if this is an error in our driver or there really
are such items, but yout patch solves this.
Reviewed-by: Marek Behun
On Tue, 5 Jun
Hi Alberto,
Thanks. I just forwarded this to Robert Nelson who encountered this
issue.
You can add Reviewed-by: Marek Behun
Marek
On Sat, 20 Jan 2018 09:17:57 +0200
Alberto Sánchez Molero wrote:
> Loading files stored with lzo compression from a btrfs
Hi Robert,
I just forwarded a patch by Alberto Mollero which should solve this
issue, could you test it and than maybe reply with Tested-by:?
Thanks.
Marek
On Fri, 15 Dec 2017 12:02:07 -0600
Robert Nelson wrote:
> Hi Marek,
>
> On Fri, Dec 15, 2017 at 11:43 AM, Marek
This adds a weak definition of comphy_update_map to comphy_core,
which does nothing. If this function is defined elsewhere, for example
in board file, the board file can change some parameters of SERDES
configuration.
This is needed on Turris Mox, where the SERDES speed on lane 1 has to
be set
This is second version of updates for Turris Mox.
The first version was sent three months ago, on 16th May. Sorry :).
It would be great if this got to 2018.09 release, but I will
understand if it does not.
I changed the first patch, "phy: marvell: Support changing SERDES
map in board file",
Add support for changing clock rate and parent clock for Armada 37xx
peripheral clocks.
Only clocks which can be disabled (.can_gate is true) can have parent
or rate changed.
This is needed so that Turris Mox can change SPI clock in device tree.
Signed-off-by: Marek Behun
---
The macro name CONFIG_WDT_ARMADA_3720 is called CONFIG_WDT_ARMADA_37XX
instead. Fix this so that watchdog really is enabled in board_init.
Signed-off-by: Marek Behun
---
board/CZ.NIC/turris_mox/turris_mox.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git
Restructure the board initialization source.
Remove the module_topology environment variable since it won't be
needed.
Signed-off-by: Marek Behun
---
board/CZ.NIC/turris_mox/turris_mox.c | 153 ---
1 file changed, 106 insertions(+), 47 deletions(-)
diff --git
Remove smi_pins definition since it is already in armada-37xx.dtsi.
Add assigned-clocks definitions to spi0.
Signed-off-by: Marek Behun
---
arch/arm/dts/armada-3720-turris-mox.dts | 10 +++---
1 file changed, 3 insertions(+), 7 deletions(-)
diff --git
Check if Mox modules are connected in supported mode, then configure
the MDIO addresses of switch modules.
Signed-off-by: Marek Behun
---
arch/arm/dts/armada-3720-turris-mox.dts | 11 ++
board/CZ.NIC/turris_mox/turris_mox.c| 235 +++-
2 files changed, 245
Add configuration variables to differentiate between the 512 MB and 1 GB
versions of Turris Mox and change the RAM size in U-Boot's device tree
accordingly.
Signed-off-by: Marek Behun
---
MAINTAINERS | 7 +++
Enable the pci-aardvark driver in defconfig for Turris Mox and also
enable the pci command.
Signed-off-by: Marek Behun
---
configs/turris_mox_defconfig | 5 +
1 file changed, 5 insertions(+)
diff --git a/configs/turris_mox_defconfig b/configs/turris_mox_defconfig
index
This can be used to detect whether the button is pressed or light LEDs.
Signed-off-by: Marek Behun
---
configs/turris_mox_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/turris_mox_defconfig b/configs/turris_mox_defconfig
index fb4192df56..cc28a1fe95 100644
---
When SFP module is connected directly to CPU module we want the SGMII
lane speed at 1.25 Gbps.
Signed-off-by: Marek Behun
---
board/CZ.NIC/turris_mox/turris_mox.c | 33 +
1 file changed, 33 insertions(+)
diff --git a/board/CZ.NIC/turris_mox/turris_mox.c
Patch Linux's device tree according to which Mox modules are connected.
Linux's device tree is supposed to have some nodes already
preprogrammed. If user wants to use different device tree, they should
disable CONFIG_OF_BOARD_SETUP in U-Boot's config, so that the boot
command does not fail.
If PCIe Mox module is connected we want to have PCIe node enabled
in U-Boot's device tree.
Signed-off-by: Marek Behun
---
arch/arm/dts/armada-3720-turris-mox.dts | 7 +++
board/CZ.NIC/turris_mox/turris_mox.c| 80 +
configs/turris_mox_defconfig|
If PCIe Mox module is connected we want to have PCIe node enabled
in U-Boot's device tree.
Signed-off-by: Marek Behun
---
arch/arm/dts/armada-3720-turris-mox.dts | 7 +++
board/CZ.NIC/turris_mox/turris_mox.c| 82 +
configs/turris_mox_defconfig|
The comparison
logical > item->logical + item->length
in btrfs_map_logical_to_physical is wrong and should be instead
logical >= item->logical + item->length
For example, if
item->logical = 4096
item->length = 4096
and we are looking for logical = 8192, it is not part of item (item is
The comparison
logical > item->logical + item->length
in btrfs_map_logical_to_physical is wrong and should be instead
logical >= item->logical + item->length
For example, if
item->logical = 4096
item->length = 4096
and we are looking for logical = 8192, it is not part of item (item is
Lane 0 supports SGMII1 and USB3.
Lane 1 supports SGMII0 and PEX0.
Lane 2 supports SATA0 and USB3.
This is needed for Armada 37xx.
Signed-off-by: Marek Behun
---
arch/arm/dts/armada-37xx.dtsi | 5 +++--
drivers/phy/marvell/comphy_a3700.c | 36
The drivers are based on Linux driver by Gregory Clement.
The TBG clocks support only the .get_rate method.
- since setting rate is not supported, the driver computes the rates
when probing and so subsequent calls to the .get_rate method do not
read the corresponding registers again
In SGMII initialization PIN_PIPE_SEL has to be zero when resetting
the PHY. Since comphy_mux already set the selector register to
correct values, we have to store it's value before setting it to 0
and restore it after SGMII init.
Signed-off-by: Marek Behun
---
This commit is based on commit d9899826 by
zachary
from u-boot-marvell, see
github.com/MarvellEmbeddedProcessors/u-boot-marvell/commit/d9899826
- According to design specification, the transmitter should be set to high
impedence mode during electrical idle. Thus
The groups pcie1, ptp and mii changed in new revision (from 2016).
Also smi was added to support enabling the MDIO pins.
Signed-off-by: Marek Behun
---
drivers/pinctrl/mvebu/pinctrl-armada-37xx.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git
Add support for the clk dump command on Armada 37xx.
Signed-off-by: Marek Behun
---
drivers/clk/mvebu/armada-37xx-periph.c | 36 +-
drivers/clk/mvebu/armada-37xx-tbg.c| 2 ++
2 files changed, 37 insertions(+), 1 deletion(-)
diff --git
The timeout is set to PLL_LOCK_TIMEOUT in every call to
comphy_poll_reg. Remove this parameter from the function.
Signed-off-by: Marek Behun
---
drivers/phy/marvell/comphy_a3700.c | 16 +++-
1 file changed, 3 insertions(+), 13 deletions(-)
diff --git
Currently comphy_mux supports only trivial order of nodes in pin
selector register, that is lane N on position N*bitcount.
Add support for nontrivial order, with map stored in device tree
property mux-lane-order.
This is needed for Armada 37xx.
Signed-off-by: Marek Behun
Since now we have driver for clocks on Armada 37xx, use it to determine
SQF clock frequency for the SPI driver.
Also change the default config files for Armada 37xx devices so that
the clock driver is enabled by default, otherwise the SPI driver cannot
be enabled.
Signed-off-by: Marek Behun
When USB3 is on comphy lane 2 on the Armada 37xx, the registers
have to be accessed indirectly via SATA indirect access.
Signed-off-by: Marek Behun
---
drivers/phy/marvell/comphy_a3700.c | 111 +
drivers/phy/marvell/comphy_a3700.h | 1 +
Signed-off-by: Marek Behun
---
drivers/phy/marvell/comphy_a3700.c | 26 +-
1 file changed, 13 insertions(+), 13 deletions(-)
diff --git a/drivers/phy/marvell/comphy_a3700.c
b/drivers/phy/marvell/comphy_a3700.c
index d283604e1a..734d4e55b1 100644
---
The macro phy_write16 is not used by the rest of the code,
phy_read16 is not used at all.
We also change the macro SGMIIPHY_ADDR to a static inline function.
Signed-off-by: Marek Behun
---
drivers/phy/marvell/comphy_a3700.c | 22 +++---
This is a series of patches to update the support of Armada 37xx devices.
Summary:
- patches 1-6 are cosmetic patches for the Armada 37xx comphy driver
- the 7th patch adds support for USB3 on comphy lane 2, which needs indirect
register access
- patches 8-9 change USB3 phy
Move the reg_set* functions into comphy.h as static inline functions.
Change return type of get_*_string to const char *.
Signed-off-by: Marek Behun
---
drivers/phy/marvell/comphy.h | 41 ++---
drivers/phy/marvell/comphy_core.c | 64
All the calls to reg_set and friends have to cast the first argument
to void __iomem *. Lets change the return type of the MVEBU_REG macro
instead.
Signed-off-by: Marek Behun
---
drivers/phy/marvell/comphy_a3700.c | 205 -
Create a special function for indirect register setting,
reg_set_indirect, and use it instead of the two calls to reg_set.
Signed-off-by: Marek Behun
---
drivers/phy/marvell/comphy_a3700.c | 32
1 file changed, 20 insertions(+), 12
The driver does not check id phy_connect failed (for example on wrong
property name in device tree). In such a case a fault occurs and the
CPU is restarted.
Signed-off-by: Marek Behun
---
drivers/net/mvneta.c | 4
1 file changed, 4 insertions(+)
diff --git
Currently there is for each register special functional macro, ie:
LANE_CFG1_ADDR(u)
GLOB_CLK_SRC_LO_ADDR(u)
...
where can be either PCIE or USB3.
Change this to one function PHY_ADDR(unit, addr). The code becomes:
PHY_ADDR(PCIE, LANE_CFG1)
PHY_ADDR(PCIE, GLOB_CLK_SRC_LO)
...
The driver is already in the tree and functional. Enable it by default
and also remove the board_early_init_f which was a temporary fix for
not having the pinctrl driver.
Signed-off-by: Marek Behun
---
board/Marvell/mvebu_armada-37xx/board.c | 32
According to specification, CFG_PM_RXDLOZ_WAIT should be set to 0x7
when reference clock is at 25 MHz. The specification (at least the
version I have) does not mentoin the setting for 40 MHz reference
clock, but Marvell's U-Boot sets 0xC in that case.
Signed-off-by: Marek Behun
Other filesystem drivers don't do this.
Signed-off-by: Marek Behun
---
fs/ext4/ext4_common.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/fs/ext4/ext4_common.c b/fs/ext4/ext4_common.c
index dac9545365..e3cc30a1e0 100644
--- a/fs/ext4/ext4_common.c
All the calls to reg_set and friends have to cast the first argument
to void __iomem *. Lets change the return type of the MVEBU_REG macro
instead.
Signed-off-by: Marek Behun
---
drivers/phy/marvell/comphy_a3700.c | 206 -
In U-Boot it is usually written this way.
Signed-off-by: Marek Behun
Reviewed-by: Stefan Roese
---
drivers/phy/marvell/comphy_a3700.c | 26 +-
1 file changed, 13 insertions(+), 13 deletions(-)
diff --git
This is the second version of patches for updating the support of Armada 37xx
devices. Here I also send first version of code which adds basic support for the
Turris Mox board, a router currently being developed here at CZ.NIC, which is
being crowdfunded now on Indiegogo.
Changes since v1:
-
The register addresses on lanes 0 and 1 are switched, first comes 1 and
then 0.
Signed-off-by: Marek Behun
---
drivers/phy/marvell/comphy_a3700.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/phy/marvell/comphy_a3700.h
Currently there is for each register special functional macro, ie:
LANE_CFG1_ADDR(u)
GLOB_CLK_SRC_LO_ADDR(u)
...
where can be either PCIE or USB3.
Change this to one function PHY_ADDR(unit, addr). The code becomes:
phy_addr(PCIE, LANE_CFG1)
phy_addr(PCIE, GLOB_CLK_SRC_LO)
...
The timeout is set to PLL_LOCK_TIMEOUT in every call to
comphy_poll_reg. Remove this parameter from the function.
Signed-off-by: Marek Behun
Reviewed-by: Stefan Roese
---
drivers/phy/marvell/comphy_a3700.c | 16 +++-
1 file changed, 3
According to specification, CFG_PM_RXDLOZ_WAIT should be set to 0x7
when reference clock is at 25 MHz. The specification (at least the
version I have) does not mentoin the setting for 40 MHz reference
clock, but Marvell's U-Boot sets 0xC in that case.
Signed-off-by: Marek Behun
The macro phy_write16 is not used by the rest of the code,
phy_read16 is not used at all.
We also change the macro SGMIIPHY_ADDR to a static inline function.
Signed-off-by: Marek Behun
---
drivers/phy/marvell/comphy_a3700.c | 25 ++---
The drivers are based on Linux driver by Gregory Clement.
The TBG clocks support only the .get_rate method.
- since setting rate is not supported, the driver computes the rates
when probing and so subsequent calls to the .get_rate method do not
read the corresponding registers again
Move the reg_set* functions into comphy.h as static inline functions.
Change return type of get_*_string to const char *.
Signed-off-by: Marek Behun
Reviewed-by: Stefan Roese
---
drivers/phy/marvell/comphy.h | 41 ++---
Create a special function for indirect register setting,
reg_set_indirect, and use it instead of the two calls to reg_set.
Signed-off-by: Marek Behun
Reviewed-by: Stefan Roese
---
drivers/phy/marvell/comphy_a3700.c | 32
1 file
Add support for the clk dump command on Armada 37xx.
Signed-off-by: Marek Behun
Reviewed-by: Stefan Roese
---
drivers/clk/mvebu/armada-37xx-periph.c | 36 +-
drivers/clk/mvebu/armada-37xx-tbg.c| 2 ++
2 files changed, 37
From: zachary
This commit is based on commit d9899826 by
zachary
from u-boot-marvell, see
github.com/MarvellEmbeddedProcessors/u-boot-marvell/commit/d9899826
- According to design specification, the transmitter should be set to high
impedence mode
On Wed, 21 Mar 2018 10:37:33 +0100
Stefan Roese wrote:
> Please add Jagan (on Cc) to Cc for SPI driver related changes.
Will do with next version
> Wouldn't it be easier to "select" CLK_ARMADA_3720 here instead? No
> changes to the config files necessary this way.
okay :)
>
Since now we have driver for clocks on Armada 37xx, use it to determine
SQF clock frequency for the SPI driver.
Also change the default config files for Armada 37xx devices so that
the clock driver is enabled by default, otherwise the SPI driver cannot
be enabled.
Signed-off-by: Marek Behun
ogy" if TARGET_DS414
default "CZ.NIC" if TARGET_TURRIS_OMNIA
+ default "CZ.NIC" if TARGET_TURRIS_MOX
config SYS_SOC
default "mvebu"
diff --git a/arch/arm/mach-mvebu/Makefile b/arch/arm/mach-mvebu/Makefile
index d4210af9d2..b103f34894 100644
1 - 100 of 1621 matches
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