Re: [U-Boot] [U-Boot,1/8] adc: Add driver for Rockchip Saradc

ock-chips.com> Reviewed-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> Please see below for requested changes. --- drivers/adc/Kconfig | 9 ++ drivers/adc/Makefile | 1 + drivers/adc/rockchip-saradc.c | 188 ++ 3 f

Re: [U-Boot] [U-Boot,1/8] adc: Add driver for Rockchip Saradc

ps.com> > --- > drivers/adc/Kconfig | 9 ++ > drivers/adc/Makefile | 1 + > drivers/adc/rockchip-saradc.c | 188 > ++ > 3 files changed, 198 insertions(+) > create mode 100644 drivers/adc/rockchip-sara

Re: [U-Boot] [U-Boot,3/5] power: pmic: rk805: support rk805 pmic

On Wed, 13 Sep 2017, Kever Yang wrote: From: Elaine Zhang Add Rockchip pmic rk805 support. Again: a bit more info would be helpful (see my review of patch 2/5 for a few hints). Signed-off-by: Elaine Zhang Signed-off-by: Kever Yang

Re: [U-Boot] [U-Boot, 7/8] clk: rockchip: Add rk3399 Saradc clock support

++ > 1 file changed, 34 insertions(+) > Acked-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot

Re: [U-Boot] [U-Boot, 8/8] arm: dts: rv1108: Add Saradc node at dtsi level

> Signed-off-by: David Wu <david...@rock-chips.com> > --- > arch/arm/dts/rv1108.dtsi | 11 +++ > 1 file changed, 11 insertions(+) > Acked-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> ___ U-Boot mailin

Re: [U-Boot] [U-Boot,2/5] power: pmic: rk816: support rk816 pmic

1 + > drivers/power/regulator/rk8xx.c | 212 > > include/power/rk8xx_pmic.h | 9 +- > 3 files changed, 182 insertions(+), 40 deletions(-) > Acked-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> __

Re: [U-Boot] [U-Boot,3/5] power: pmic: rk805: support rk805 pmic

| 1 + > drivers/power/regulator/rk8xx.c | 6 ++ > include/power/rk8xx_pmic.h | 1 + > 3 files changed, 8 insertions(+) > Acked-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot

Re: [U-Boot] [U-Boot, 7/8] clk: rockchip: Add rk3399 Saradc clock support

On Wed, 13 Sep 2017, David Wu wrote: The clk_saradc is dividing from the 24M, clk_saradc=24MHz/(saradc_div_con+1). Saradc integer divider control register is 8-bits width. Signed-off-by: David Wu <david...@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.toms...@theobroma-sy

Re: [U-Boot] [U-Boot, 1/5] rockchip: i2c: rk3328: support i2c for rk3328 SoC

+ > 1 file changed, 1 insertion(+) > Acked-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot

Re: [U-Boot] [U-Boot, 8/8] arm: dts: rv1108: Add Saradc node at dtsi level

> Signed-off-by: David Wu <david...@rock-chips.com> > --- > arch/arm/dts/rv1108.dtsi | 11 +++ > 1 file changed, 11 insertions(+) > Reviewed-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> ___

Re: [U-Boot] [U-Boot, 5/5] rockchip: dts: rk3328-evb: add i2c1 and rk805 nodes

> > arch/arm/dts/rk3328-evb.dts | 118 > > 1 file changed, 118 insertions(+) > Reviewed-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot

Re: [U-Boot] [U-Boot, 1/5] rockchip: i2c: rk3328: support i2c for rk3328 SoC

> From: Elaine Zhang <zhangq...@rock-chips.com> > > Add compatible to support rk3328 i2c > > Signed-off-by: Elaine Zhang <zhangq...@rock-chips.com> > Signed-off-by: Kever Yang <kever.y...@rock-chips.com> > Acked-by: Philipp Tomsich <philipp.toms...@theo

Re: [U-Boot] [U-Boot, 4/8] clk: rockchip: Add Saradc clock support for rk3288

> Signed-off-by: David Wu <david...@rock-chips.com> > Reviewed-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> > Reviewed-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> > --- > drivers/clk/rockchip/clk_rk3288.c | 45 > +

Re: [U-Boot] [U-Boot, 3/8] clk: rockchip: Add rv1108 Saradc clock support

iles changed, 42 insertions(+) > Acked-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot

Re: [U-Boot] [U-Boot,2/5] power: pmic: rk816: support rk816 pmic

On Wed, 13 Sep 2017, Kever Yang wrote: From: Elaine Zhang Add Rockchip pmic rk816 support. Could you summarise some of the key-features of the RK816 here? Just a few words, so we know how it's different from the others and what it's used for (e.g. "PMIC

Re: [U-Boot] [U-Boot, 5/8] clk: rockchip: Add rk3328 Saradc clock support

On Wed, 13 Sep 2017, David Wu wrote: The clk_saradc is dividing from the 24M, clk_saradc=24MHz/(saradc_div_con+1). Saradc integer divider control register is 10-bits width. Signed-off-by: David Wu <david...@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.toms...@theobroma-sy

Re: [U-Boot] [U-Boot, 3/8] clk: rockchip: Add rv1108 Saradc clock support

On Wed, 13 Sep 2017, David Wu wrote: Signed-off-by: David Wu <david...@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> --- arch/arm/include/asm/arch-rockchip/cru_rv1108.h | 5 drivers/clk/rockchip/clk_rv1108.c

Re: [U-Boot] [U-Boot, v3, 03/14] rockchip: clk: Add rv1108 SARADC clock support

> The clk_saradc is dividing from the 24M, clk_saradc=24MHz/(saradc_div_con+1). > SARADC integer divider control register is 10-bits width. > > Signed-off-by: David Wu <david...@rock-chips.com> > Acked-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> >

Re: [U-Boot] [U-Boot, v3, 04/14] rockchip: clk: Add SARADC clock support for rk3288

> The clk_saradc is dividing from the 24M, clk_saradc=24MHz/(saradc_div_con+1). > SARADC integer divider control register is 8-bits width. > > Signed-off-by: David Wu <david...@rock-chips.com> > Reviewed-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>

Re: [U-Boot] [U-Boot, v3, 05/14] rockchip: clk: Add rk3328 SARADC clock support

> The clk_saradc is dividing from the 24M, clk_saradc=24MHz/(saradc_div_con+1). > SARADC integer divider control register is 10-bits width. > > Signed-off-by: David Wu <david...@rock-chips.com> > Acked-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> >

Re: [U-Boot] [U-Boot, v3, 01/14] dm: adc: Add driver for Rockchip SARADC

com> > Acked-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> > Reviewed-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> > --- > > Changes in v3: None > Changes in v2: > - Order the the include file > - Use structures for I/O access

Re: [U-Boot] [U-Boot, v3, 10/14] rockchip: dts: Enable SARADC for rk3288-popmetal

_BL Mailspike blacklisted > Enable the SARADC for download key pressed detect. > > Signed-off-by: David Wu <david...@rock-chips.com> > Acked-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> > Reviewed-by: Philipp Tomsich <philipp.toms...@theobroma-

Re: [U-Boot] [U-Boot, v3, 11/14] rockchip: dts: Enable SARADC for rk3328-evb

> Enable the SARADC for download key pressed detect. > > Signed-off-by: David Wu <david...@rock-chips.com> > Acked-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> > Reviewed-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> > --- >

Re: [U-Boot] [U-Boot, v3, 07/14] rockchip: clk: Add rk3399 SARADC clock support

> The clk_saradc is dividing from the 24M, clk_saradc=24MHz/(saradc_div_con+1). > SARADC integer divider control register is 8-bits width. > > Signed-off-by: David Wu <david...@rock-chips.com> > Acked-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> >

Re: [U-Boot] [U-Boot, v3, 06/14] rockchip: clk: Add rk3368 SARADC clock support

> The clk_saradc is dividing from the 24M, clk_saradc=24MHz/(saradc_div_con+1). > SARADC integer divider control register is 8-bits width. > > Signed-off-by: David Wu <david...@rock-chips.com> > Acked-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> >

Re: [U-Boot] [U-Boot, v3, 09/14] rockchip: dts: Enable SARADC for rv1108-evb

> Enable the SARADC for download key pressed detect. > > Signed-off-by: David Wu <david...@rock-chips.com> > Acked-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> > Reviewed-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> > --- >

Re: [U-Boot] [U-Boot, v3, 08/14] rockchip: dts: rv1108: Add SARADC node at dtsi level

> Signed-off-by: David Wu <david...@rock-chips.com> > Acked-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> > Reviewed-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> > --- > > Changes in v3: None > Changes in v2: None > > a

[U-Boot] [PATCH] rockchip: imply ADC and SARADC_ROCKCHIP on supported SoCs

Enable the Rockchip SARADC driver on all supported SoCs (i.e. all except the RK3036 and RK3228, which don't have this peripheral): RK3188, RK3288, RK3328, RK3368, RK3399 and RV1108. Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> --- arch/arm/mach-rockchip/Kconfi

Re: [U-Boot] [U-Boot, v3, 02/14] rockchip: configs: Enable the ROCKCHIP_SARADC config

David, On Wed, 20 Sep 2017, David Wu wrote: Except for 3036 and 3228 Socs, which don't support SARADC, enable the ROCKCHIP_SARADC config at the other Socs' defconfig. Signed-off-by: David Wu If this is a feature of those chips, we need to do this through an

Re: [U-Boot] [U-Boot, v3, 13/14] rockchip: dts: Enable SARADC for rk3368-sheep

_BL Mailspike blacklisted > Enable the SARADC for download key pressed detect. > > Signed-off-by: David Wu <david...@rock-chips.com> > Acked-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> > Reviewed-by: Philipp Tomsich <philipp.toms...@theobroma-systems.co

Re: [U-Boot] [U-Boot, v3, 12/14] rockchip: dts: Enable SARADC for rk3368-px5-evb

> Enable the SARADC for download key pressed detect. > > Signed-off-by: David Wu <david...@rock-chips.com> > Acked-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> > Reviewed-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> > --- >

Re: [U-Boot] [U-Boot, v3, 14/14] rockchip: dts: Enable SARADC for rk3399-evb

> Enable the SARADC for download key pressed detect. > > Signed-off-by: David Wu <david...@rock-chips.com> > Acked-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> > Reviewed-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> > --- >

Re: [U-Boot] [U-Boot, v3, 11/14] rockchip: dts: Enable SARADC for rk3328-evb

> Enable the SARADC for download key pressed detect. > > Signed-off-by: David Wu <david...@rock-chips.com> > --- > > Changes in v3: > - Add commit message > > Changes in v2: None > > arch/arm/dts/rk3328-evb.dts | 4 > 1 file changed, 4 i

Re: [U-Boot] [U-Boot, v3, 13/14] rockchip: dts: Enable SARADC for rk3368-sheep

_BL Mailspike blacklisted > Enable the SARADC for download key pressed detect. > > Signed-off-by: David Wu <david...@rock-chips.com> > --- > > Changes in v3: > - Add commit message > > Changes in v2: None > > arch/arm/dts/rk3368-s

Re: [U-Boot] [U-Boot, v3, 09/14] rockchip: dts: Enable SARADC for rv1108-evb

> Enable the SARADC for download key pressed detect. > > Signed-off-by: David Wu <david...@rock-chips.com> > --- > > Changes in v3: > - Add commit message > > Changes in v2: None > > arch/arm/dts/rv1108-evb.dts | 4 > 1 file changed, 4 i

Re: [U-Boot] [U-Boot, v3, 14/14] rockchip: dts: Enable SARADC for rk3399-evb

> Enable the SARADC for download key pressed detect. > > Signed-off-by: David Wu <david...@rock-chips.com> > --- > > Changes in v3: > - Add commit message > > Changes in v2: None > > arch/arm/dts/rk3399-evb.dts | 4 > 1 file changed, 4 inse

Re: [U-Boot] [U-Boot, v3, 10/14] rockchip: dts: Enable SARADC for rk3288-popmetal

_BL Mailspike blacklisted > Enable the SARADC for download key pressed detect. > > Signed-off-by: David Wu <david...@rock-chips.com> > --- > > Changes in v3: > - Add commit message > > Changes in v2: None > > arch/arm/dts/rk3288-popmetal

Re: [U-Boot] [U-Boot, v3, 12/14] rockchip: dts: Enable SARADC for rk3368-px5-evb

> Enable the SARADC for download key pressed detect. > > Signed-off-by: David Wu <david...@rock-chips.com> > --- > > Changes in v3: > - Add commit message > > Changes in v2: None > > arch/arm/dts/rk3368-px5-evb.dts | 4 > 1 file changed, 4 i

Re: [U-Boot] [U-Boot, v3, 10/14] rockchip: dts: Enable SARADC for rk3288-popmetal

_BL Mailspike blacklisted > Enable the SARADC for download key pressed detect. > > Signed-off-by: David Wu <david...@rock-chips.com> > --- > > Changes in v3: > - Add commit message > > Changes in v2: None > > arch/arm/dts/rk3288-popme

Re: [U-Boot] [U-Boot, v3, 14/14] rockchip: dts: Enable SARADC for rk3399-evb

> Enable the SARADC for download key pressed detect. > > Signed-off-by: David Wu <david...@rock-chips.com> > --- > > Changes in v3: > - Add commit message > > Changes in v2: None > > arch/arm/dts/rk3399-evb.dts | 4 > 1 file changed, 4 i

Re: [U-Boot] [U-Boot, v3, 12/14] rockchip: dts: Enable SARADC for rk3368-px5-evb

> Enable the SARADC for download key pressed detect. > > Signed-off-by: David Wu <david...@rock-chips.com> > --- > > Changes in v3: > - Add commit message > > Changes in v2: None > > arch/arm/dts/rk3368-px5-evb.dts | 4 > 1 file changed, 4 inse

Re: [U-Boot] [U-Boot, v3, 11/14] rockchip: dts: Enable SARADC for rk3328-evb

> Enable the SARADC for download key pressed detect. > > Signed-off-by: David Wu <david...@rock-chips.com> > Acked-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> > --- > > Changes in v3: > - Add commit message > > Changes in v2: None >

Re: [U-Boot] [U-Boot, v3, 13/14] rockchip: dts: Enable SARADC for rk3368-sheep

_BL Mailspike blacklisted > Enable the SARADC for download key pressed detect. > > Signed-off-by: David Wu <david...@rock-chips.com> > --- > > Changes in v3: > - Add commit message > > Changes in v2: None > > arch/arm/dts/rk3368-shee

Re: [U-Boot] [U-Boot, v3, 09/14] rockchip: dts: Enable SARADC for rv1108-evb

> Enable the SARADC for download key pressed detect. > > Signed-off-by: David Wu <david...@rock-chips.com> > --- > > Changes in v3: > - Add commit message > > Changes in v2: None > > arch/arm/dts/rv1108-evb.dts | 4 > 1 file changed, 4 inse

[U-Boot] [PATCH v3 2/6] arm: mark save_boot_params_ret as a function

to save_boot_params_ret both for call-sites emitted as A32 and T32. Reported-by: Andy Yan <andy@rock-chips.com> Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> Tested-by: Andy Yan <andy@rock-chips.com> --- Changes in v3: - tracked the root-cause why no interwork

[U-Boot] [PATCH v3 1/6] arm: make save_boot_params_ret prototype visible for AArch64

it. Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> Tested-by: Andy Yan <andy@rock-chips.com> --- Changes in v3: None Changes in v2: None arch/arm/include/asm/system.h | 62 +-- 1 file changed, 31 insertions(+),

[U-Boot] [PATCH v3 6/6] rockchip: back-to-bootrom: allow passing a cmd to the bootrom

are adjusted to match the changed function signature. Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> Tested-by: Andy Yan <andy@rock-chips.com> --- Changes in v3: None Changes in v2: - also covers the RK3188 (which I had originally missed) arch/arm/incl

[U-Boot] [PATCH v3 5/6] rockchip: back-to-bootrom: rk3188: chain from SPL via TPL to the BROM

TPL should expect the SPL to return control and then further return to the actual bootrom by performing another back-to-bootrom transition. Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> --- Changes in v3: None Changes in v2: - [added in v2] chain back_to_bootrom call

[U-Boot] [PATCH v3 0/6] rockchip: back-to-bootrom: replace assembly-implementation with C-code

originally missed) Philipp Tomsich (6): arm: make save_boot_params_ret prototype visible for AArch64 arm: mark save_boot_params_ret as a function arm: provide a PCS-compliant setjmp implementation rockchip: back-to-bootrom: replace assembly-implementation with C-code rockchip: back-to-bootrom

[U-Boot] [PATCH v3 3/6] arm: provide a PCS-compliant setjmp implementation

robustness and ensure PCS-compliant behaviour, the setjmp and longjmp implementation are now in assembly and closely match what one would expect to find in a libc implementation. Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> Tested-by: Andy Yan <andy@rock-

[U-Boot] [PATCH v3 4/6] rockchip: back-to-bootrom: replace assembly-implementation with C-code

) and removes the older assembly-only implementation. Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> Tested-by: Andy Yan <andy@rock-chips.com> --- Changes in v3: None Changes in v2: None arch/arm/include/asm/arch-rockchip/bootrom.h | 27 --- arch/arm/m

Re: [U-Boot] rockchip: Set up default PWM flags

implement pwm_set_invert()) > --- > > drivers/pwm/rk_pwm.c | 1 + > 1 file changed, 1 insertion(+) > Acked-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot

Re: [U-Boot] rockchip: Set up default PWM flags

implement pwm_set_invert()) > --- > > drivers/pwm/rk_pwm.c | 1 + > 1 file changed, 1 insertion(+) > Reviewed-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot

Re: [U-Boot] [U-Boot, v4, 1/2] rockchip: configs: only add available BOOT_TARGET_DEVICES

> BOOT_TARGET_DEVICES should only be added if the corresponding u-boot > command is enabled. > > Signed-off-by: Klaus Goger <klaus.go...@theobroma-systems.com> > Acked-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> > Reviewed-by: Philipp Tomsich <phil

Re: [U-Boot] [U-Boot, v4, 2/2] rockchip: configs: use rockchip-common.h for rk3368

> rockchip-common.h already defines values that are missing from > rk3368_common.h > > For example BOOT_TARGET_DEVICES was defined empty and therefore > distroboot had no boot targets. > > Signed-off-by: Klaus Goger <klaus.go...@theobroma-systems.com> > Acked-by:

Re: [U-Boot] [U-Boot,2/8] rockchip: rk3128: add soc basic support

> create mode 100644 arch/arm/mach-rockchip/rk3128/Kconfig > create mode 100644 arch/arm/mach-rockchip/rk3128/Makefile > create mode 100644 arch/arm/mach-rockchip/rk3128/rk3128.c > create mode 100644 arch/arm/mach-rockchip/rk3128/syscon_rk3128.c > create mode 100644 include/confi

Re: [U-Boot] [U-Boot, v2, 1/2] rockchip: configs: only add available BOOT_TARGET_DEVICES

he > required u-boot command for distroboot > > include/configs/rockchip-common.h | 39 > +++ > 1 file changed, 27 insertions(+), 12 deletions(-) > Acked-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>

Re: [U-Boot] [U-Boot,8/8] rockchip: rk3128: add sdram driver

gt; > --- > > drivers/ram/rockchip/Makefile | 1 + > drivers/ram/rockchip/sdram_rk3128.c | 60 > + > 2 files changed, 61 insertions(+) > create mode 100644 drivers/ram/rockchip/sdram_rk3128.c > Acked-by: Phi

Re: [U-Boot] [U-Boot,4/8] rockchip: rk3128: add pinctrl driver

644 drivers/pinctrl/rockchip/pinctrl_rk3128.c > Acked-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot

Re: [U-Boot] [U-Boot,5/8] rockchip: rk3128: add sysreset driver

(+) > create mode 100644 drivers/sysreset/sysreset_rk3128.c > Acked-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot

Re: [U-Boot] [U-Boot, 7/8] rockchip: rk3128: add defconfig for evb-rk3128

tions(+) > create mode 100644 configs/evb-rk3128_defconfig > Acked-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot

Re: [U-Boot] [U-Boot,3/8] rockchip: rk3128: add clock driver

asm/arch-rockchip/cru_rk3128.h > create mode 100644 arch/arm/mach-rockchip/rk3128/clk_rk3128.c > create mode 100644 drivers/clk/rockchip/clk_rk3128.c > Acked-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> ___ U-Boot mailin

Re: [U-Boot] [U-Boot,1/8] rockchip: rk3128: add device tree file

> Add dts binding header for rk3128, files origin from kernel. > > Signed-off-by: Kever Yang <kever.y...@rock-chips.com> > Reviewed-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> > --- > > arch/arm/dts/Makefile | 1

Re: [U-Boot] [U-Boot,6/8] rockchip: rk3128: add evb-rk3128 support

gt; create mode 100644 board/rockchip/evb_rk3128/evb-rk3128.c > create mode 100644 include/configs/evb_rk3128.h > Acked-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot

[U-Boot] [PATCH v4 04/18] rockchip: mkimage: use spl_boot0 for all Rockchip SoCs

From: Kever Yang <kever.y...@rock-chips.com> Enable the spl_boot0 in SPL and use the pre-padding TAG memory, the mkimage do not need to pad it but only need to replace the value with correct TAG value. Signed-off-by: Kever Yang <kever.y...@rock-chips.com> [Updated:] Signed-off

[U-Boot] [PATCH v4 13/18] arm: provide a PCS-compliant setjmp implementation

robustness and ensure PCS-compliant behaviour, the setjmp and longjmp implementation are now in assembly and closely match what one would expect to find in a libc implementation. Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> Tested-by: Andy Yan <andy@rock-

[U-Boot] [PATCH v4 07/18] socfpga: boot0 hook: adjust to unified boot0 semantics

With the updated boot0 semantics (i.e. giving the boot0-hook control over when and where the vector table is emitted), the boot0-hook for the socfpga needs to be adjusted. Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> --- Changes in v4: None Changes in v3: None C

[U-Boot] [PATCH v4 10/18] rockchip: boot0 hook: support early return for RK3188/RK3066-style BROM

booting either a TPL (on the RK3066) or SPL (on the RK3188) using this model of having to count entries, this commit adds code to the boot0 hook to track the number of entries and handle them accordingly. Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> Signed-off-by: Paweł

[U-Boot] [PATCH v4 03/18] rockchip: enable boot0-hook for all Rockchip SoCs

to reserve the first 4-byte tag for all the Rockchip SoCs. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems> [Commit message:] Signed-off-by: Kever Yang <kever.y...@rock-chips.com> Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> --- C

[U-Boot] [PATCH v4 05/18] rockchip: rk3288: use aligned address for SPL_TEXT_BASE

From: Kever Yang <kever.y...@rock-chips.com> After we use boot0 hook, we can use offset '000' instead of '004' as SPL_TEXT_BASE. Signed-off-by: Kever Yang <kever.y...@rock-chips.com> [Updated tag in commit summary:] Signed-off-by: Philipp Tomsich <philipp.toms...@theobr

[U-Boot] [PATCH v4 02/18] rockchip: boot0: align to 0x20 for armv7 '_start'

From: Kever Yang <kever.y...@rock-chips.com> The '_start' is using as vector table base address, and will write to VBAR register, so it needs to be aligned to 0x20 for armv7. Signed-off-by: Kever Yang <kever.y...@rock-chips.com> [Updated to current code base:] Signed-off-by: Phi

[U-Boot] [PATCH v4 15/18] rockchip: rk3188: use boot0 hook to load up SPL in 2 steps

and builds a single SPL binary that utilizes the early back-to-bootrom via the boot0-hook. Consequently, the passing of the saved boot params via pmu->os_reg[2] is also removed. Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> --- Changes in v4: - after merging

[U-Boot] [PATCH v4 06/18] rockchip: rk3036: use aligned address for SPL_TEXT_BASE

With the boot0-hook inserting the additional padding to receive our SPL magic, the SPL_TEXT_BASE can be aligned again. Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> --- Changes in v4: None Changes in v3: None Changes in v2: None include/configs/rk3036_common

[U-Boot] [PATCH v4 18/18] rockchip: mkimage: remove unused code-paths (spl_boot0 is now implied)

-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> --- Changes in v4: None Changes in v3: None Changes in v2: None tools/rkcommon.c | 45 ++--- 1 file changed, 14 insertions(+), 31 deletions(-) diff --git a/tools/rkcommon.c b/tools/rkcommon.c

[U-Boot] [PATCH v4 17/18] rockchip: rk3188: move CONFIG_SPL_* entries from rk3188_common.h to Kconfig

There still are a few CONFIG_SPL_* options selected using defines from rk3188_common.h instead of via Kconfig. This migrates those over to Kconfig. Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> --- Changes in v4: None Changes in v3: None Changes in v2: None ar

[U-Boot] [PATCH v4 00/18] rockchip: back-to-bootrom: replace assembly-implementation with C-code

for armv7 '_start' rockchip: mkimage: use spl_boot0 for all Rockchip SoCs rockchip: rk3288: use aligned address for SPL_TEXT_BASE Philipp Tomsich (15): arm: boot0 hook: move boot0 hook before '_start' rockchip: enable boot0-hook for all Rockchip SoCs rockchip: rk3036: use align

[U-Boot] [PATCH v4 11/18] arm: make save_boot_params_ret prototype visible for AArch64

it. Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> Tested-by: Andy Yan <andy@rock-chips.com> --- Changes in v4: None Changes in v3: None Changes in v2: None arch/arm/include/asm/system.h | 62 +-- 1 file changed, 3

[U-Boot] [PATCH v4 08/18] bcm235xx: boot0 hook: adjust to unified boot0 semantics

This updates the BCM235xx boot0-hook to the updated boot0 semantics by emitting _start and the vector table before the boot0 hook (as was the case before). Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> --- Changes in v4: None Changes in v3: None Changes in v2

[U-Boot] [PATCH v4 09/18] bcm281xx: boot0 hook: adjust to unified boot0 semantics

This updates the BCM281xx boot0-hook to the updated boot0 semantics by emitting _start and the vector table before the boot0 hook (as was the case before). Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> --- Changes in v4: None Changes in v3: None Changes in v2

[U-Boot] [PATCH v4 16/18] rockchip: back-to-bootrom: allow passing a cmd to the bootrom

are adjusted to match the changed function signature. Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> Tested-by: Andy Yan <andy@rock-chips.com> --- Changes in v4: - no longer updates rk3188-board-tpl.c (as we have just removed it in an earlier commit) C

[U-Boot] [PATCH v4 01/18] arm: boot0 hook: move boot0 hook before '_start'

these Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> --- Changes in v4: None Changes in v3: None Changes in v2: None arch/arm/include/asm/arch-rockchip/boot0.h | 1 - arch/arm/lib/vectors.S | 54 +++--- 2 files changed, 35 inse

[U-Boot] [PATCH v4 14/18] rockchip: back-to-bootrom: replace assembly-implementation with C-code

) and removes the older assembly-only implementation. Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> Tested-by: Andy Yan <andy@rock-chips.com> --- Changes in v4: None Changes in v3: None Changes in v2: None arch/arm/include/asm/arch-rockchip/bootrom.h | 27 +

[U-Boot] [PATCH v4 12/18] arm: mark save_boot_params_ret as a function

to save_boot_params_ret both for call-sites emitted as A32 and T32. Reported-by: Andy Yan <andy@rock-chips.com> Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> Tested-by: Andy Yan <andy@rock-chips.com> --- Changes in v4: None Changes in v3: - tracked

[U-Boot] [PATCH v5 10/18] rockchip: boot0 hook: support early return for RK3188/RK3066-style BROM

booting either a TPL (on the RK3066) or SPL (on the RK3188) using this model of having to count entries, this commit adds code to the boot0 hook to track the number of entries and handle them accordingly. Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> Signed-off-by: Paweł

[U-Boot] [PATCH v5 05/18] rockchip: rk3288: use aligned address for SPL_TEXT_BASE

From: Kever Yang <kever.y...@rock-chips.com> After we use boot0 hook, we can use offset '000' instead of '004' as SPL_TEXT_BASE. Signed-off-by: Kever Yang <kever.y...@rock-chips.com> [Updated tag in commit summary:] Signed-off-by: Philipp Tomsich <philipp.toms...@theobr

[U-Boot] [PATCH v5 08/18] bcm235xx: boot0 hook: adjust to unified boot0 semantics

This updates the BCM235xx boot0-hook to the updated boot0 semantics by emitting _start and the vector table before the boot0 hook (as was the case before). Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> Version-changes: 5 - ran 'whitespace-cleanup' --- Changes

[U-Boot] [PATCH v5 13/18] arm: provide a PCS-compliant setjmp implementation

robustness and ensure PCS-compliant behaviour, the setjmp and longjmp implementation are now in assembly and closely match what one would expect to find in a libc implementation. Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> Tested-by: Andy Yan <andy@rock-

[U-Boot] [PATCH v5 11/18] arm: make save_boot_params_ret prototype visible for AArch64

it. Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> Tested-by: Andy Yan <andy@rock-chips.com> --- Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None arch/arm/include/asm/system.h | 62 +--

[U-Boot] [PATCH v5 03/18] rockchip: enable boot0-hook for all Rockchip SoCs

to reserve the first 4-byte tag for all the Rockchip SoCs. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems> [Commit message:] Signed-off-by: Kever Yang <kever.y...@rock-chips.com> Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> --- C

[U-Boot] [PATCH v5 15/18] rockchip: rk3188: use boot0 hook to load up SPL in 2 steps

and builds a single SPL binary that utilizes the early back-to-bootrom via the boot0-hook. Consequently, the passing of the saved boot params via pmu->os_reg[2] is also removed. Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> --- Changes in v5: None Changes in v4

[U-Boot] [PATCH v5 17/18] rockchip: rk3188: move CONFIG_SPL_* entries from rk3188_common.h to Kconfig

There still are a few CONFIG_SPL_* options selected using defines from rk3188_common.h instead of via Kconfig. This migrates those over to Kconfig. Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> --- Changes in v5: None Changes in v4: None Changes in v3: None C

[U-Boot] [PATCH v5 04/18] rockchip: mkimage: use spl_boot0 for all Rockchip SoCs

From: Kever Yang <kever.y...@rock-chips.com> Enable the spl_boot0 in SPL and use the pre-padding TAG memory, the mkimage do not need to pad it but only need to replace the value with correct TAG value. Signed-off-by: Kever Yang <kever.y...@rock-chips.com> [Updated:] Signed-off

[U-Boot] [PATCH v5 02/18] rockchip: boot0: align to 0x20 for armv7 '_start'

From: Kever Yang <kever.y...@rock-chips.com> The '_start' is using as vector table base address, and will write to VBAR register, so it needs to be aligned to 0x20 for armv7. Signed-off-by: Kever Yang <kever.y...@rock-chips.com> [Updated to current code base:] Signed-off-by: Phi

[U-Boot] [PATCH v5 14/18] rockchip: back-to-bootrom: replace assembly-implementation with C-code

) and removes the older assembly-only implementation. Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> Tested-by: Andy Yan <andy@rock-chips.com> --- Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None arch/arm/include/asm/arch-rockchip/bo

[U-Boot] [PATCH v5 07/18] socfpga: boot0 hook: adjust to unified boot0 semantics

With the updated boot0 semantics (i.e. giving the boot0-hook control over when and where the vector table is emitted), the boot0-hook for the socfpga needs to be adjusted. Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> --- Changes in v5: None Changes in v4: None C

[U-Boot] [PATCH v5 12/18] arm: mark save_boot_params_ret as a function

to save_boot_params_ret both for call-sites emitted as A32 and T32. Reported-by: Andy Yan <andy@rock-chips.com> Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> Tested-by: Andy Yan <andy@rock-chips.com> --- Changes in v5: None Changes in v4: None Changes in v3:

[U-Boot] [PATCH v5 09/18] bcm281xx: boot0 hook: adjust to unified boot0 semantics

This updates the BCM281xx boot0-hook to the updated boot0 semantics by emitting _start and the vector table before the boot0 hook (as was the case before). Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> --- Changes in v5: None Changes in v4: None Changes in v3

[U-Boot] [PATCH v5 01/18] arm: boot0 hook: move boot0 hook before '_start'

these Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> --- Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None arch/arm/include/asm/arch-rockchip/boot0.h | 1 - arch/arm/lib/vectors.S | 54 +++--- 2 files c

[U-Boot] [PATCH v5 18/18] rockchip: mkimage: remove unused code-paths (spl_boot0 is now implied)

-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> --- Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None tools/rkcommon.c | 45 ++--- 1 file changed, 14 insertions(+), 31 deletions(-) diff --git a/tools/rkcommon.c b

[U-Boot] [PATCH v5 16/18] rockchip: back-to-bootrom: allow passing a cmd to the bootrom

are adjusted to match the changed function signature. Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com> Tested-by: Andy Yan <andy@rock-chips.com> --- Changes in v5: None Changes in v4: - no longer updates rk3188-board-tpl.c (as we have just removed it i

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